diff --git a/arch/arm/boot/dts/adi/sc594-som.dtsi b/arch/arm/boot/dts/adi/sc594-som.dtsi index 2e5539429d6bbb..0946cd9a654c60 100644 --- a/arch/arm/boot/dts/adi/sc594-som.dtsi +++ b/arch/arm/boot/dts/adi/sc594-som.dtsi @@ -228,14 +228,6 @@ }; }; -&i2c0 { - status = "disabled"; -}; - -&i2c1 { - status = "disabled"; -}; - &i2c2 { status = "okay"; @@ -303,14 +295,6 @@ }; }; -&crc0 { - status = "disabled"; -}; - -&crc1 { - status = "disabled"; -}; - &usb0_phy { reset-gpios = <&gpg 11 GPIO_ACTIVE_LOW>; status = "okay"; diff --git a/arch/arm/boot/dts/adi/sc59x.dtsi b/arch/arm/boot/dts/adi/sc59x.dtsi index 27de4e8a57c754..97118f8df044c7 100644 --- a/arch/arm/boot/dts/adi/sc59x.dtsi +++ b/arch/arm/boot/dts/adi/sc59x.dtsi @@ -44,6 +44,9 @@ i2c0 = &i2c0; i2c1 = &i2c1; i2c2 = &i2c2; + i2c3 = &i2c3; + i2c4 = &i2c4; + i2c5 = &i2c5; i2s4 = &i2s4; mmc0 = &mmc0; sru0 = &sru_ctrl_dai0; @@ -351,7 +354,7 @@ #address-cells = <1>; #size-cells = <0>; compatible = "adi,twi"; - reg = <0x31001400 0xFF>; + reg = <0x31001400 0x100>; interrupts = ; clock-khz = <100>; clocks = <&clk ADSP_SC594_CLK_CGU0_SCLK0>; @@ -363,7 +366,7 @@ #address-cells = <1>; #size-cells = <0>; compatible = "adi,twi"; - reg = <0x31001500 0xFF>; + reg = <0x31001500 0x100>; interrupts = ; clock-khz = <100>; clocks = <&clk ADSP_SC594_CLK_CGU0_SCLK0>; @@ -375,7 +378,7 @@ #address-cells = <1>; #size-cells = <0>; compatible = "adi,twi"; - reg = <0x31001600 0xFF>; + reg = <0x31001600 0x100>; interrupts = ; clock-khz = <100>; clocks = <&clk ADSP_SC594_CLK_CGU0_SCLK0>; @@ -383,6 +386,42 @@ status = "disabled"; }; + i2c3: twi@31001000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "adi,twi"; + reg = <0x31001000 0x100>; + interrupts = ; + clock-khz = <100>; + clocks = <&clk ADSP_SC594_CLK_CGU0_SCLK0>; + clock-names = "sclk0"; + status = "disabled"; + }; + + i2c4: twi@31001100 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "adi,twi"; + reg = <0x31001100 0x100>; + interrupts = ; + clock-khz = <100>; + clocks = <&clk ADSP_SC594_CLK_CGU0_SCLK0>; + clock-names = "sclk0"; + status = "disabled"; + }; + + i2c5: twi@31001200 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "adi,twi"; + reg = <0x31001200 0x100>; + interrupts = ; + clock-khz = <100>; + clocks = <&clk ADSP_SC594_CLK_CGU0_SCLK0>; + clock-names = "sclk0"; + status = "disabled"; + }; + i2s4: i2s@4 { compatible = "adi,sc5xx-i2s-dai"; clocks = <&clk ADSP_SC594_CLK_CGU0_SCLK0>; @@ -500,24 +539,42 @@ status = "disabled"; }; - crc0: crc@31001200 { + crc0: crc@3100a500 { compatible = "adi,hmac-crc"; - reg = <0x31001200 0xFF>; - interrupts = ; + reg = <0x3100a500 0x100>; + interrupts = ; dma_channel = <8>; crypto_crc_poly = <0x5c5c5c5c>; status = "disabled"; }; - crc1: crc@31001300 { + crc1: crc@3100a600 { compatible = "adi,hmac-crc"; - reg = <0x31001300 0xFF>; - interrupts = ; + reg = <0x3100a600 0x100>; + interrupts = ; dma_channel = <18>; crypto_crc_poly = <0x5c5c5c5c>; status = "disabled"; }; + crc2: crc@3100aa00 { + compatible = "adi,hmac-crc"; + reg = <0x3100aa00 0x100>; + interrupts = ; + dma_channel = <45>; + crypto_crc_poly = <0x5c5c5c5c>; + status = "disabled"; + }; + + crc3: crc@3100ab00 { + compatible = "adi,hmac-crc"; + reg = <0x3100ab00 0x100>; + interrupts = ; + dma_channel = <47>; + crypto_crc_poly = <0x5c5c5c5c>; + status = "disabled"; + }; + pinctrl0: pinctrl@31004600 { compatible = "adi,adsp-pinctrl"; #address-cells = <1>; diff --git a/arch/arm64/boot/dts/adi/sc598-som.dtsi b/arch/arm64/boot/dts/adi/sc598-som.dtsi index 7d6d5f1fad2a47..28e2142ee255c5 100644 --- a/arch/arm64/boot/dts/adi/sc598-som.dtsi +++ b/arch/arm64/boot/dts/adi/sc598-som.dtsi @@ -204,14 +204,6 @@ cs-gpios = <&gpa 5 GPIO_ACTIVE_LOW>; }; -&i2c0 { - status = "okay"; -}; - -&i2c1 { - status = "disabled"; -}; - &i2c2 { status = "okay"; pinctrl-names = "default"; diff --git a/arch/arm64/boot/dts/adi/sc59x-64.dtsi b/arch/arm64/boot/dts/adi/sc59x-64.dtsi index ef5aee84fc129a..5b9db04d0ffd2e 100644 --- a/arch/arm64/boot/dts/adi/sc59x-64.dtsi +++ b/arch/arm64/boot/dts/adi/sc59x-64.dtsi @@ -574,7 +574,7 @@ crc0: crc@310a5000 { compatible = "adi,hmac-crc"; - reg = <0x310a5000 0xFF>; + reg = <0x310a5000 0x100>; interrupts = ; dmas = <&crc_cluster 8>; dma-names = "mdma_chan"; @@ -584,7 +584,7 @@ crc1: crc@310a6000 { compatible = "adi,hmac-crc"; - reg = <0x310a6000 0xFF>; + reg = <0x310a6000 0x100>; interrupts = ; dmas = <&crc_cluster 18>; dma-names = "mdma_chan"; @@ -592,6 +592,26 @@ status = "disabled"; }; + crc2: crc@310aa000 { + compatible = "adi,hmac-crc"; + reg = <0x310aa000 0x100>; + interrupts = ; + dmas = <&crc_cluster 45>; + dma-names = "mdma_chan"; + crypto_crc_poly = <0x04C11DB7>; + status = "disabled"; + }; + + crc3: crc@310ab000 { + compatible = "adi,hmac-crc"; + reg = <0x310ab000 0x100>; + interrupts = ; + dmas = <&crc_cluster 47>; + dma-names = "mdma_chan"; + crypto_crc_poly = <0x04C11DB7>; + status = "disabled"; + }; + pinctrl0: pinctrl@31004600 { compatible = "adi,adsp-pinctrl"; #address-cells = <1>; @@ -1198,6 +1218,22 @@ interrupt-names = "complete", "error"; adi,src-offset = <0x100>; }; + + crc2_dma: channel@45 { /* MDMA4_SRC */ + adi,id = <45>; + interrupts = , + ; + interrupt-names = "complete", "error"; + adi,src-offset = <0x200>; + }; + + crc3_dma: channel@47 { /* MDMA5_SRC */ + adi,id = <47>; + interrupts = , + ; + interrupt-names = "complete", "error"; + adi,src-offset = <0x300>; + }; }; dma_cluster2: dma@31026000 {