From a50c726430cb3f29ad4760ecafbf9bc2892fb425 Mon Sep 17 00:00:00 2001 From: Marcelo Schmitt Date: Wed, 25 Mar 2026 14:05:52 -0300 Subject: [PATCH 1/2] ARM: dts: Drop old AD7946 dts in favor of the new one The old device tree for AD7946 describes hardware in a way that is substantially different and incompatible with how we currently describe AD7946. On top of that, it uses a deprecated device driver compatible string. We already have a new device tree for AD7946 (zynq-coraz7s-ad7946-pmdz.dts), which better describes AD7946 and uses the new, upstreamed, device driver for PulSAR and similar ADCs. Drop the old AD7946 dts in favor of the new one. Signed-off-by: Marcelo Schmitt --- .../boot/dts/xilinx/zynq-coraz7s-ad7946.dts | 88 ------------------- 1 file changed, 88 deletions(-) delete mode 100644 arch/arm/boot/dts/xilinx/zynq-coraz7s-ad7946.dts diff --git a/arch/arm/boot/dts/xilinx/zynq-coraz7s-ad7946.dts b/arch/arm/boot/dts/xilinx/zynq-coraz7s-ad7946.dts deleted file mode 100644 index b37c548a2561ca..00000000000000 --- a/arch/arm/boot/dts/xilinx/zynq-coraz7s-ad7946.dts +++ /dev/null @@ -1,88 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Analog Devices AD7946 - * https://www.analog.com/en/products/ad7946.html - * - * hdl_project: - * Link: https://github.com/analogdevicesinc/hdl/tree/main/projects/pulsar_adc - * board_revision: - * - * Copyright (C) 2022 Analog Devices Inc. - */ -/dts-v1/; -#include "zynq-coraz7s.dtsi" -#include "zynq-coraz7s-axi-sysid.dtsi" -#include -#include - -/ { - vref: regulator-vref { - compatible = "regulator-fixed"; - regulator-name = "fixed-supply"; - regulator-min-microvolt = <4096000>; - regulator-max-microvolt = <4096000>; - regulator-always-on; - }; -}; - -&fpga_axi { - - adc_trigger: pwm@44b00000 { - compatible = "adi,axi-pwmgen-2.00.a"; - reg = <0x44b00000 0x1000>; - label = "adc_conversion_trigger"; - #pwm-cells = <2>; - clocks = <&clkc 15>, <&spi_clk>; - clock-names = "axi", "ext"; - }; - - spi_engine: spi@44a00000 { - compatible = "adi,legacy-axi-spi-engine-1.00.a"; - reg = <0x44a00000 0x10000>; - interrupt-parent = <&intc>; - interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clkc 15 &spi_clk>; - clock-names = "s_axi_aclk", "spi_clk"; - num-cs = <1>; - - #address-cells = <0x1>; - #size-cells = <0x0>; - - adc@0 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "adi,pulsar,ad7946"; - reg = <0>; - spi-max-frequency = <80000000>; - clocks = <&spi_clk>; - clock-names = "ref_clk"; - dmas = <&rx_dma 0>; - dma-names = "rx"; - pwms = <&adc_trigger 0 0>; - pwm-names = "cnv"; - vref-supply = <&vref>; - channel@0 { - reg = <0>; - diff-channels = <0 1>; - }; - }; - }; - - rx_dma: dma-controller@44a30000 { - compatible = "adi,axi-dmac-1.00.a"; - reg = <0x44a30000 0x1000>; - #dma-cells = <1>; - interrupt-parent = <&intc>; - interrupts = <0 57 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clkc 16>; - }; - - spi_clk: clock-controller@44a70000 { - compatible = "adi,axi-clkgen-2.00.a"; - reg = <0x44a70000 0x10000>; - #clock-cells = <0>; - clocks = <&clkc 15>, <&clkc 15>; - clock-names = "clkin1", "s_axi_aclk"; - clock-output-names = "spi_clk"; - }; -}; From 8756ec1a7cd2858fb81ca0ba0a78782d313ed44e Mon Sep 17 00:00:00 2001 From: Marcelo Schmitt Date: Wed, 25 Mar 2026 14:24:20 -0300 Subject: [PATCH 2/2] ARM: dts: Drop old AD7984 dts in favor of the new one The old device tree for AD7984 describes hardware in a way that is substantially different and incompatible with how we currently describe AD7984. On top of that, it uses a deprecated device driver compatible string. We already have a new device tree for AD7984 (zynq-coraz7s-ad7984-pmdz.dts), which better describes AD7984 and uses the new, upstreamed, device driver for PulSAR and similar ADCs. Drop the old AD7984 dts in favor of the new one. Signed-off-by: Marcelo Schmitt --- .../boot/dts/xilinx/zynq-coraz7s-ad7984.dts | 89 ------------------- 1 file changed, 89 deletions(-) delete mode 100644 arch/arm/boot/dts/xilinx/zynq-coraz7s-ad7984.dts diff --git a/arch/arm/boot/dts/xilinx/zynq-coraz7s-ad7984.dts b/arch/arm/boot/dts/xilinx/zynq-coraz7s-ad7984.dts deleted file mode 100644 index 9d93e7f1c40a2d..00000000000000 --- a/arch/arm/boot/dts/xilinx/zynq-coraz7s-ad7984.dts +++ /dev/null @@ -1,89 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Analog Devices AD7984 - * https://www.analog.com/en/products/ad7984.html - * - * hdl_project: - * Link: https://github.com/analogdevicesinc/hdl/tree/main/projects/pulsar_adc - * board_revision: - * - * Copyright (C) 2022 Analog Devices Inc. - */ -/dts-v1/; -#include "zynq-coraz7s.dtsi" -#include "zynq-coraz7s-axi-sysid.dtsi" -#include -#include - -/ { - vref: regulator-vref { - compatible = "regulator-fixed"; - regulator-name = "fixed-supply"; - regulator-min-microvolt = <4096000>; - regulator-max-microvolt = <4096000>; - regulator-always-on; - }; -}; - -&fpga_axi { - - adc_trigger: pwm@44b00000 { - compatible = "adi,axi-pwmgen-2.00.a"; - reg = <0x44b00000 0x1000>; - label = "adc_conversion_trigger"; - #pwm-cells = <2>; - clocks = <&clkc 15>, <&spi_clk>; - clock-names = "axi", "ext"; - }; - - spi_engine: spi@44a00000 { - compatible = "adi,legacy-axi-spi-engine-1.00.a"; - reg = <0x44a00000 0x10000>; - interrupt-parent = <&intc>; - interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clkc 15 &spi_clk>; - clock-names = "s_axi_aclk", "spi_clk"; - num-cs = <1>; - - #address-cells = <0x1>; - #size-cells = <0x0>; - - adc@0 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "adi,pulsar,ad7984"; - reg = <0>; - spi-max-frequency = <80000000>; - clocks = <&spi_clk>; - clock-names = "ref_clk"; - dmas = <&rx_dma 0>; - dma-names = "rx"; - pwms = <&adc_trigger 0 0>; - pwm-names = "cnv"; - vref-supply = <&vref>; - channel@0 { - reg = <0>; - bipolar; - diff-channels = <0 1>; - }; - }; - }; - - rx_dma: dma-controller@44a30000 { - compatible = "adi,axi-dmac-1.00.a"; - reg = <0x44a30000 0x1000>; - #dma-cells = <1>; - interrupt-parent = <&intc>; - interrupts = <0 57 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clkc 16>; - }; - - spi_clk: clock-controller@44a70000 { - compatible = "adi,axi-clkgen-2.00.a"; - reg = <0x44a70000 0x10000>; - #clock-cells = <0>; - clocks = <&clkc 15>, <&clkc 15>; - clock-names = "clkin1", "s_axi_aclk"; - clock-output-names = "spi_clk"; - }; -};