diff --git a/docs/user_guide/build_hdl.rst b/docs/user_guide/build_hdl.rst index 6f2a783e331..fdfc6dfdb5b 100644 --- a/docs/user_guide/build_hdl.rst +++ b/docs/user_guide/build_hdl.rst @@ -596,6 +596,8 @@ when building a project: operations. Default value is 8. - **ADI_NO_BITSTREAM_COMPRESSION**: if set, disables compression of the final bitstream file. +- **ADI_POST_ROUTE_POD_PRE_SCRIPT**: specifies the path to a Tcl script to be + executed before the phys_opt_design (POD) stage. - **ADI_POST_ROUTE_SCRIPT**: specifies the path to a Tcl script to be executed after the routing design step. - **ADI_POWER_OPTIMIZATION**: if set to 1, enables power optimization during the diff --git a/projects/adrv9361z7035/ccbob_cmos/system_project.tcl b/projects/adrv9361z7035/ccbob_cmos/system_project.tcl index 0866e033879..99a8e2e7d15 100644 --- a/projects/adrv9361z7035/ccbob_cmos/system_project.tcl +++ b/projects/adrv9361z7035/ccbob_cmos/system_project.tcl @@ -1,11 +1,12 @@ ############################################################################### -## Copyright (C) 2014-2023 Analog Devices, Inc. All rights reserved. +## Copyright (C) 2014-2023, 2025 Analog Devices, Inc. All rights reserved. ### SPDX short identifier: ADIBSD ############################################################################### source ../../../scripts/adi_env.tcl source $ad_hdl_dir/projects/scripts/adi_project_xilinx.tcl source $ad_hdl_dir/projects/scripts/adi_board.tcl +set ADI_POST_ROUTE_POD_PRE_SCRIPT [file normalize $ad_hdl_dir/projects/scripts/route_design.tcl] adi_project_create adrv9361z7035_ccbob_cmos 0 {} "xc7z035ifbg676-2L" adi_project_files adrv9361z7035_ccbob_cmos [list \ diff --git a/projects/adrv9361z7035/ccbob_lvds/system_project.tcl b/projects/adrv9361z7035/ccbob_lvds/system_project.tcl index 48c00cfafad..6bac5d4b929 100644 --- a/projects/adrv9361z7035/ccbob_lvds/system_project.tcl +++ b/projects/adrv9361z7035/ccbob_lvds/system_project.tcl @@ -1,11 +1,12 @@ ############################################################################### -## Copyright (C) 2014-2023 Analog Devices, Inc. All rights reserved. +## Copyright (C) 2014-2023, 2025 Analog Devices, Inc. All rights reserved. ### SPDX short identifier: ADIBSD ############################################################################### source ../../../scripts/adi_env.tcl source $ad_hdl_dir/projects/scripts/adi_project_xilinx.tcl source $ad_hdl_dir/projects/scripts/adi_board.tcl +set ADI_POST_ROUTE_POD_PRE_SCRIPT [file normalize $ad_hdl_dir/projects/scripts/route_design.tcl] adi_project_create adrv9361z7035_ccbob_lvds 0 {} "xc7z035ifbg676-2L" adi_project_files adrv9361z7035_ccbob_lvds [list \ diff --git a/projects/adrv9361z7035/ccfmc_lvds/system_project.tcl b/projects/adrv9361z7035/ccfmc_lvds/system_project.tcl index 0c838d86a70..de0daaa80c3 100644 --- a/projects/adrv9361z7035/ccfmc_lvds/system_project.tcl +++ b/projects/adrv9361z7035/ccfmc_lvds/system_project.tcl @@ -1,11 +1,12 @@ ############################################################################### -## Copyright (C) 2014-2023 Analog Devices, Inc. All rights reserved. +## Copyright (C) 2014-2023, 2025 Analog Devices, Inc. All rights reserved. ### SPDX short identifier: ADIBSD ############################################################################### source ../../../scripts/adi_env.tcl source $ad_hdl_dir/projects/scripts/adi_project_xilinx.tcl source $ad_hdl_dir/projects/scripts/adi_board.tcl +set ADI_POST_ROUTE_POD_PRE_SCRIPT [file normalize $ad_hdl_dir/projects/scripts/route_design.tcl] adi_project_create adrv9361z7035_ccfmc_lvds 0 {} "xc7z035ifbg676-2L" adi_project_files adrv9361z7035_ccfmc_lvds [list \ diff --git a/projects/adrv9364z7020/ccbob_cmos/system_project.tcl b/projects/adrv9364z7020/ccbob_cmos/system_project.tcl index 446eeda6a44..ffc7fab5859 100644 --- a/projects/adrv9364z7020/ccbob_cmos/system_project.tcl +++ b/projects/adrv9364z7020/ccbob_cmos/system_project.tcl @@ -1,11 +1,12 @@ ############################################################################### -## Copyright (C) 2016-2023 Analog Devices, Inc. All rights reserved. +## Copyright (C) 2016-2023, 2025 Analog Devices, Inc. All rights reserved. ### SPDX short identifier: ADIBSD ############################################################################### source ../../../scripts/adi_env.tcl source $ad_hdl_dir/projects/scripts/adi_project_xilinx.tcl source $ad_hdl_dir/projects/scripts/adi_board.tcl +set ADI_POST_ROUTE_POD_PRE_SCRIPT [file normalize $ad_hdl_dir/projects/scripts/route_design.tcl] adi_project_create adrv9364z7020_ccbob_cmos 0 {} "xc7z020clg400-1" adi_project_files adrv9364z7020_ccbob_cmos [list \ diff --git a/projects/adrv9364z7020/ccbob_lvds/system_project.tcl b/projects/adrv9364z7020/ccbob_lvds/system_project.tcl index 6f2e9e5e494..d42462a17ed 100644 --- a/projects/adrv9364z7020/ccbob_lvds/system_project.tcl +++ b/projects/adrv9364z7020/ccbob_lvds/system_project.tcl @@ -1,11 +1,12 @@ ############################################################################### -## Copyright (C) 2014-2023 Analog Devices, Inc. All rights reserved. +## Copyright (C) 2014-2023, 2025 Analog Devices, Inc. All rights reserved. ### SPDX short identifier: ADIBSD ############################################################################### source ../../../scripts/adi_env.tcl source $ad_hdl_dir/projects/scripts/adi_project_xilinx.tcl source $ad_hdl_dir/projects/scripts/adi_board.tcl +set ADI_POST_ROUTE_POD_PRE_SCRIPT [file normalize $ad_hdl_dir/projects/scripts/route_design.tcl] adi_project_create adrv9364z7020_ccbob_lvds 0 {} "xc7z020clg400-1" adi_project_files adrv9364z7020_ccbob_lvds [list \ diff --git a/projects/scripts/adi_project_xilinx.tcl b/projects/scripts/adi_project_xilinx.tcl index 5e664aa0905..b9f858abc50 100644 --- a/projects/scripts/adi_project_xilinx.tcl +++ b/projects/scripts/adi_project_xilinx.tcl @@ -324,6 +324,7 @@ proc adi_project_create {project_name mode parameter_list device {board "not-app # \param[project_files] - list of project files # proc adi_project_files {project_name project_files} { + global ADI_POST_ROUTE_POD_PRE_SCRIPT global ADI_POST_ROUTE_SCRIPT foreach pfile $project_files { @@ -334,6 +335,9 @@ proc adi_project_files {project_name project_files} { } } + if {[info exists ADI_POST_ROUTE_POD_PRE_SCRIPT]} { + add_files -fileset utils_1 -norecurse ${ADI_POST_ROUTE_POD_PRE_SCRIPT} + } if {[info exists ADI_POST_ROUTE_SCRIPT]} { add_files -fileset utils_1 -norecurse ${ADI_POST_ROUTE_SCRIPT} } @@ -356,6 +360,7 @@ proc adi_project_run {project_name} { global ADI_USE_OOC_SYNTHESIS global ADI_MAX_OOC_JOBS global ADI_GENERATE_BIN + global ADI_POST_ROUTE_POD_PRE_SCRIPT global ADI_POST_ROUTE_SCRIPT if {[info exists ::env(ADI_MAX_THREADS)]} { @@ -395,6 +400,10 @@ proc adi_project_run {project_name} { set_param board.repoPaths [get_property LOCAL_ROOT_DIR [xhub::get_xstores xilinx_board_store]] + if {[info exists ADI_POST_ROUTE_POD_PRE_SCRIPT]} { + set_property STEPS.POST_ROUTE_PHYS_OPT_DESIGN.IS_ENABLED true [get_runs impl_1] + set_property STEPS.POST_ROUTE_PHYS_OPT_DESIGN.TCL.PRE [ get_files ${ADI_POST_ROUTE_POD_PRE_SCRIPT} -of [get_fileset utils_1] ] [get_runs impl_1] + } if {[info exists ADI_POST_ROUTE_SCRIPT]} { set_property STEPS.ROUTE_DESIGN.TCL.POST [ get_files ${ADI_POST_ROUTE_SCRIPT} -of [get_fileset utils_1] ] [get_runs impl_1] } diff --git a/projects/scripts/route_design.tcl b/projects/scripts/route_design.tcl new file mode 100644 index 00000000000..2b078064a47 --- /dev/null +++ b/projects/scripts/route_design.tcl @@ -0,0 +1,7 @@ +# This script is used to fix some hold timing issues presented in more recent +# versions of vivado. This remedy was given by AMD employee through the xilinx +# forums. +# References: +# https://adaptivesupport.amd.com/s/question/0D5Pd00000pVOyuKAG/unexpected-hold-errors-when-moving-to-vivado-20251?language=en_US +# https://adaptivesupport.amd.com/s/question/0D5Pd0000153gqkKAA/persistent-hold-timing-violations-after-upgrading-to-vivado-2025x-physoptdesign-holdfix-ineffective?language=en_US +route_design