drm/amdgpu: correct register access for RLC_JUMP_TABLE_RESTORE

Le Ma · gregkh · commit aec5897b277b · 2021-12-22T09:30:58.000+01:00
commit f3a8076 upstream. should count on GC IP base address Signed-off-by: Le Ma <le.ma@amd.com> Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
@@ -3002,8 +3002,8 @@ static void gfx_v9_0_init_pg(struct amdgpu_device *adev)
 			      AMD_PG_SUPPORT_CP |
 			      AMD_PG_SUPPORT_GDS |
 			      AMD_PG_SUPPORT_RLC_SMU_HS)) {
-		WREG32(mmRLC_JUMP_TABLE_RESTORE,
-		       adev->gfx.rlc.cp_table_gpu_addr >> 8);
+		WREG32_SOC15(GC, 0, mmRLC_JUMP_TABLE_RESTORE,
+			     adev->gfx.rlc.cp_table_gpu_addr >> 8);
 		gfx_v9_0_init_gfx_power_gating(adev);
 	}
 }

Original file line number	Diff line number	Diff line change
`@@ -3002,8 +3002,8 @@ static void gfx_v9_0_init_pg(struct amdgpu_device *adev)`
`3002`	`3002`	`AMD_PG_SUPPORT_CP \|`
`3003`	`3003`	`AMD_PG_SUPPORT_GDS \|`
`3004`	`3004`	`AMD_PG_SUPPORT_RLC_SMU_HS)) {`
`3005`		`- WREG32(mmRLC_JUMP_TABLE_RESTORE,`
`3006`		`- adev->gfx.rlc.cp_table_gpu_addr >> 8);`
	`3005`	`+ WREG32_SOC15(GC, 0, mmRLC_JUMP_TABLE_RESTORE,`
	`3006`	`+ adev->gfx.rlc.cp_table_gpu_addr >> 8);`
`3007`	`3007`	`gfx_v9_0_init_gfx_power_gating(adev);`
`3008`	`3008`	`}`
`3009`	`3009`	`}`