HSD #15017937880: EDAC/altera: Fix OCRAM ECC init for the warm reset

OCRAM is initialize by Secure Device Manager(SDM). For the warm reset,
SDM do not perform the OCRAM wipe. So OCRAM ECC INITCOMPLETEA bit is not
set and ECC_EN bit of CTRL register is required to enable after the warm
reset.

Signed-off-by: Niravkumar L Rabara <nirav.rabara@altera.com>

Author: rabara

drivers/edac/altera_edac.c

@@ -1254,8 +1254,14 @@ altr_check_ocram_deps_init(struct altr_edac_device_dev *device)
 
 	/* Verify OCRAM has been initialized */
 	if (!ecc_test_bits(ALTR_A10_ECC_INITCOMPLETEA,
-			   (base + ALTR_A10_ECC_INITSTAT_OFST)))
-		return -ENODEV;
+			   (base + ALTR_A10_ECC_INITSTAT_OFST))) {
+		if (!ecc_test_bits(ALTR_A10_ECC_EN,
+				   (base + ALTR_A10_ECC_CTRL_OFST)))
+			ecc_set_bits(ALTR_A10_ECC_EN,
+				     (base + ALTR_A10_ECC_CTRL_OFST));
+		else
+			return -ENODEV;
+	}
 
 	/* Enable IRQ on Single Bit Error */
 	writel(ALTR_A10_ECC_SERRINTEN, (base + ALTR_A10_ECC_ERRINTENS_OFST));