Cant build

[Zaazik]

Python 3.12.3
Ubuntu fresh latest
Install from repo
Donor asus xonar AE

zaazik@zaazik-Z790-UD:~/PCILeechFWGenerator$ pcileech-sudo check --device 0000:06:00.0 --interactive --fix
  07:25:46 │  INFO  │ [CHECK] Running VFIO diagnostics for device 0000:06:00.0
  07:25:46 │  INFO  │ [VFIO] Starting VFIO diagnostics for device: 0000:06:00.0
  07:25:46 │  INFO  │ [VFIO] Diagnostics completed. Overall status: ok, Can proceed: True

=== VFIO DIAGNOSTIC REPORT ===
Overall: ✔ OK
Device : 0000:06:00.0
Proceed: yes

✔ Platform: Linux detected
✔ IOMMU HW: VT‑d / AMD‑Vi supported by CPU
✔ Kernel cmdline: IOMMU enabled in cmdline: intel_iommu=on, iommu=pt, iommu=on
✔ ACS bypass: Device isolated in IOMMU group 17
✔ Kernel modules: All VFIO modules loaded: vfio, vfio_pci, vfio_iommu_type1
✔ vfio-pci driver: vfio-pci registered
✔ Device: 0000:06:00.0 (0x1b21:0x2142) present
✔ IOMMU group: Group 17
✔ Driver: Already bound to vfio-pci
✔ /dev/vfio node: /dev/vfio/17

  07:25:46 │  INFO  │ [CHECK] System is VFIO-ready

pcileech-sudo build --bdf 0000:06:00.0 --board pcileech_100t484_x1 --local --vivado-path /tools/Xilinx/Vivado/2024.2 --vivado-jobs 8 --vivado-timeout 7200

ERROR TYPE BREAKDOWN:

File: 2 errors
Syntax: 2 errors
Unknown: 252 warnings

RECOMMENDATIONS:

For Syntax issues:
• Review generated PCILeech SystemVerilog modules for syntax issues
• Check TLP processing logic and PCIe configuration space definitions
• Verify module declarations in pcileech_tlps128_* files
• Regenerate firmware if syntax errors persist in generated code

log.txt

[github-actions]

In this GitHub issue, the user is reporting difficulties in building a project using the PCILeech tool on a fresh Ubuntu installation with Python 3.12.3, targeting an Asus Xonar AE device. They successfully run the VFIO diagnostics, confirming the system is VFIO-ready with all drivers and components properly configured. However, when attempting to build the firmware using the specified Vivado paths and options, the process fails, resulting in syntax errors and numerous warnings. The issue summary outlines two syntax errors and 252 unspecified warnings, with recommendations to review the generated SystemVerilog modules, reassess PCIe logic, and regenerate firmware if the problems persist. A log file with more details has been attached for further troubleshooting.