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Upstream update available: designs/src/bp_processor/dev/repo #80

@claude

Description

@claude

Upstream update available: bp_processor

Field Value
Pinned f6619cbc (2026-02-09)
Upstream 05ef10db (2026-04-24)
Commits behind 28
Days stale 74

Severity: moderate

Justification: Range is dominated by bug fixes (CCE pending-bits saturation, BE interrupt priority ordering, instret_en CSR mode, mtval/stval on instruction access fault, CCE-decode-dir-case) and verification/CI improvements (Xcelium support, coverage in VCS/Verilator, Verilator 5.045 associative-array fix). A handful of small features (icache tracer plusargs, dramsim3 mkdir-before-move). No top-level RTL architectural changes for the BlackParrot core itself — bug fixes touch existing modules (bp_be_csr, CCE) but don't reshape the pipeline.

What changed (highlights)

  • CSR fixesbp_be_csr: instret_en uses is_s_mode not is_m_mode (#1262); write faulting PC to mtval/stval on instruction access fault (#1018 / #1270).
  • Interrupt priority orderingbp_be interrupt priority fix (#1287 / #1288).
  • CCE fixes — pending-bits saturation fix (#1292); decode-dir-case bug fix.
  • Verification — Verilator 5.045 associative-array nonblocking fix (#1290); Icache tracer migrated to plusargs (#573 / #1257); cosim DPI-C uses plusargs for program name (#1277); mem-noc CID aliasing safety check (#391 / #1245).
  • MSHR / interface verifier — enhanced derived cache + flit stats (#1241); fix MSHR parameter check + typos (#1244); inline docs on bp_be_commit_pkt_s (#1239).
  • Tooling — Xcelium support added (#1304); VCS + Verilator coverage added (#1305); CI scripts bumped to v1p1 (#1291); dramsim3 makefile mkdir-before-mv (#1279).
  • Docs / housekeeping — root .editorconfig (#1247); export BP_DIR from Makefile.env (#1250); BlackParrot macOS Docker setup guide (#1252); README/eval_guide typo fixes; v2.1 release date in README; platform address maps + routing details (#1278); CCE tracer signal usage fix (#1274); PR template link update.

Recommendation

Update opportunistically — CSR and interrupt fixes are correctness improvements that HighTide's bp_uno / bp_quad variants should pick up; no major RTL reshaping. Worth a clean re-baseline of the existing _final flows once the bump lands. Re-verify the CTS-0105 workaround (#10177, ours in 81b0ed4b) still applies after the bump.


Last refreshed: 2026-05-18T10:27Z

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