Upstream update available: litepci
| Field |
Value |
| Pinned |
95f47311 (2026-05-11) |
| Upstream |
00e5bcfe (2026-05-15) |
| Commits behind |
7 |
| Days stale |
4 |
Severity: moderate
Justification: Range is dominated by test infrastructure cleanup (6 of 7 commits — slow-test split, opt-in VCD, trim workloads, temp-output metadata, LiteX-style alignment, isolated example builds), but the tip commit is RTL-affecting (tlp/packetizer: keep 128-bit 4DW payload in DATA) which directly touches the packetizer datapath.
What changed (highlights)
00e5bcf — tlp/packetizer: keep 128-bit 4DW payload in DATA (RTL packetizer datapath).9d332cd — test: split slow tests from default CI.37c4b12 — test: make simulation VCD dumps opt-in.4653b9a — test: trim high-level simulation workloads.3a13f28 — test: isolate example build outputs.b08c6b5 — test: align test style with LiteX conventions.a3cae57 — test: keep generated metadata in temp outputs.
Recommendation
Update opportunistically — the packetizer change is small but RTL-relevant; bump it together with the rest of the LiteX-family submodules (liteeth / litedram) at the next refresh window. Re-baseline timing/area on litepci after the bump.
Last refreshed: 2026-05-18T10:27Z
Upstream update available: litepci
95f47311(2026-05-11)00e5bcfe(2026-05-15)Severity: moderate
Justification: Range is dominated by test infrastructure cleanup (6 of 7 commits — slow-test split, opt-in VCD, trim workloads, temp-output metadata, LiteX-style alignment, isolated example builds), but the tip commit is RTL-affecting (
tlp/packetizer: keep 128-bit 4DW payload in DATA) which directly touches the packetizer datapath.What changed (highlights)
00e5bcf—tlp/packetizer: keep 128-bit 4DW payload in DATA(RTL packetizer datapath).9d332cd—test: split slow tests from default CI.37c4b12—test: make simulation VCD dumps opt-in.4653b9a—test: trim high-level simulation workloads.3a13f28—test: isolate example build outputs.b08c6b5—test: align test style with LiteX conventions.a3cae57—test: keep generated metadata in temp outputs.Recommendation
Update opportunistically — the packetizer change is small but RTL-relevant; bump it together with the rest of the LiteX-family submodules (liteeth / litedram) at the next refresh window. Re-baseline timing/area on litepci after the bump.
Last refreshed: 2026-05-18T10:27Z