From 8597e6061d518f6eee762ae067e944f72e2831e2 Mon Sep 17 00:00:00 2001 From: Jeff Ng Date: Thu, 12 Jun 2025 11:35:00 -0700 Subject: [PATCH] added additional_height option updated flow test to test add height; black formatting added rect_pin_mode for tight pin situations fixed track_count calculation if spare_tracks is dead on fixed we_in hardcoding in liberty + added hooks for future spreadsheet input removed comma from last pin in Verilog list Signed-off-by: Jeff Ng --- run.py | 15 +- test/au/dprf_256x256.au | 2536 ++++++++++----------- test/au/dprf_256x32.au | 12 +- test/au/dprf_256x32_h.au | 2084 +++++++++++++++++ test/au/dpsram_256x256.au | 2536 ++++++++++----------- test/au/dpsram_256x32.au | 12 +- test/au/dpsram_256x32_h.au | 2120 +++++++++++++++++ test/au/sprf_256x256.au | 8 +- test/au/sprf_256x32.au | 8 +- test/au/sprf_256x32_h.au | 1232 ++++++++++ test/au/spsram_256x32_h.au | 1303 +++++++++++ test/cfg/dprf_example.cfg | 2 + test/cfg/dpsram_example.cfg | 2 + test/cfg/sprf_example.cfg | 2 + test/cfg/spsram_example.cfg | 2 + test/dprf_flow_test.py | 1 + test/dpsram_flow_test.py | 1 + test/factory_base_test.py | 20 +- test/lef_exporter_test.py | 184 ++ test/macro_dim_test.py | 34 +- test/memory_config_test.py | 71 + test/memory_factory_test.py | 10 +- test/memory_test.py | 8 +- test/physical_test.py | 34 +- test/sprf_flow_test.py | 1 + test/spsram_flow_test.py | 1 + test/sv_bbox_test.py | 4 +- utils/class_memory.py | 22 +- utils/class_process.py | 4 +- utils/dual_port_ram.py | 17 +- utils/dual_port_regfile.py | 17 +- utils/factory_base.py | 21 +- utils/lef_exporter.py | 25 +- utils/liberty_exporter.py | 64 +- utils/memory_config.py | 48 + utils/physical_data.py | 10 +- utils/ram.py | 17 +- utils/ram_liberty_exporter.py | 2 +- utils/ram_verilog_exporter.py | 2 +- utils/reg_file.py | 19 +- utils/regfile_liberty_exporter.py | 2 +- utils/regfile_verilog_exporter.py | 2 +- utils/single_port_ram.py | 17 +- utils/single_port_ram_liberty_exporter.py | 13 +- utils/single_port_regfile.py | 17 +- utils/verilog_exporter.py | 2 +- 46 files changed, 9860 insertions(+), 2704 deletions(-) create mode 100644 test/au/dprf_256x32_h.au create mode 100644 test/au/dpsram_256x32_h.au create mode 100644 test/au/sprf_256x32_h.au create mode 100644 test/au/spsram_256x32_h.au create mode 100755 test/lef_exporter_test.py create mode 100755 test/memory_config_test.py create mode 100644 utils/memory_config.py diff --git a/run.py b/run.py index 4c68b21..f525c5f 100755 --- a/run.py +++ b/run.py @@ -5,6 +5,7 @@ from utils.run_utils import RunUtils from utils.class_process import Process +from utils.memory_config import MemoryConfig from utils.memory_factory import MemoryFactory from utils.timing_data import TimingData @@ -41,19 +42,9 @@ def main(args: argparse.Namespace): # Go through each sram and generate the lib, lef and v files for sram_data in json_data["srams"]: - name = str(sram_data["name"]) - width_in_bits = int(sram_data["width"]) - depth = int(sram_data["depth"]) - num_banks = int(sram_data["banks"]) + mem_config = MemoryConfig.from_json(sram_data) memory = MemoryFactory.create( - name, - width_in_bits, - depth, - num_banks, - memory_type, - port_config, - process, - timing_data, + mem_config, memory_type, port_config, process, timing_data ) RunUtils.write_memory(memory, args.output_dir) diff --git a/test/au/dprf_256x256.au b/test/au/dprf_256x256.au index 8231154..0369404 100644 --- a/test/au/dprf_256x256.au +++ b/test/au/dprf_256x256.au @@ -20,7 +20,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 0.048 0.024 0.072 ; + RECT 0.000 0.048 0.036 0.072 ; END END dout_a[0] PIN dout_a[1] @@ -29,7 +29,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 0.096 0.024 0.120 ; + RECT 0.000 0.096 0.036 0.120 ; END END dout_a[1] PIN dout_a[2] @@ -38,7 +38,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 0.144 0.024 0.168 ; + RECT 0.000 0.144 0.036 0.168 ; END END dout_a[2] PIN dout_a[3] @@ -47,7 +47,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 0.192 0.024 0.216 ; + RECT 0.000 0.192 0.036 0.216 ; END END dout_a[3] PIN dout_a[4] @@ -56,7 +56,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 0.240 0.024 0.264 ; + RECT 0.000 0.240 0.036 0.264 ; END END dout_a[4] PIN dout_a[5] @@ -65,7 +65,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 0.288 0.024 0.312 ; + RECT 0.000 0.288 0.036 0.312 ; END END dout_a[5] PIN dout_a[6] @@ -74,7 +74,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 0.336 0.024 0.360 ; + RECT 0.000 0.336 0.036 0.360 ; END END dout_a[6] PIN dout_a[7] @@ -83,7 +83,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 0.384 0.024 0.408 ; + RECT 0.000 0.384 0.036 0.408 ; END END dout_a[7] PIN dout_a[8] @@ -92,7 +92,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 0.432 0.024 0.456 ; + RECT 0.000 0.432 0.036 0.456 ; END END dout_a[8] PIN dout_a[9] @@ -101,7 +101,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 0.480 0.024 0.504 ; + RECT 0.000 0.480 0.036 0.504 ; END END dout_a[9] PIN dout_a[10] @@ -110,7 +110,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 0.528 0.024 0.552 ; + RECT 0.000 0.528 0.036 0.552 ; END END dout_a[10] PIN dout_a[11] @@ -119,7 +119,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 0.576 0.024 0.600 ; + RECT 0.000 0.576 0.036 0.600 ; END END dout_a[11] PIN dout_a[12] @@ -128,7 +128,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 0.624 0.024 0.648 ; + RECT 0.000 0.624 0.036 0.648 ; END END dout_a[12] PIN dout_a[13] @@ -137,7 +137,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 0.672 0.024 0.696 ; + RECT 0.000 0.672 0.036 0.696 ; END END dout_a[13] PIN dout_a[14] @@ -146,7 +146,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 0.720 0.024 0.744 ; + RECT 0.000 0.720 0.036 0.744 ; END END dout_a[14] PIN dout_a[15] @@ -155,7 +155,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 0.768 0.024 0.792 ; + RECT 0.000 0.768 0.036 0.792 ; END END dout_a[15] PIN dout_a[16] @@ -164,7 +164,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 0.816 0.024 0.840 ; + RECT 0.000 0.816 0.036 0.840 ; END END dout_a[16] PIN dout_a[17] @@ -173,7 +173,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 0.864 0.024 0.888 ; + RECT 0.000 0.864 0.036 0.888 ; END END dout_a[17] PIN dout_a[18] @@ -182,7 +182,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 0.912 0.024 0.936 ; + RECT 0.000 0.912 0.036 0.936 ; END END dout_a[18] PIN dout_a[19] @@ -191,7 +191,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 0.960 0.024 0.984 ; + RECT 0.000 0.960 0.036 0.984 ; END END dout_a[19] PIN dout_a[20] @@ -200,7 +200,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 1.008 0.024 1.032 ; + RECT 0.000 1.008 0.036 1.032 ; END END dout_a[20] PIN dout_a[21] @@ -209,7 +209,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 1.056 0.024 1.080 ; + RECT 0.000 1.056 0.036 1.080 ; END END dout_a[21] PIN dout_a[22] @@ -218,7 +218,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 1.104 0.024 1.128 ; + RECT 0.000 1.104 0.036 1.128 ; END END dout_a[22] PIN dout_a[23] @@ -227,7 +227,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 1.152 0.024 1.176 ; + RECT 0.000 1.152 0.036 1.176 ; END END dout_a[23] PIN dout_a[24] @@ -236,7 +236,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 1.200 0.024 1.224 ; + RECT 0.000 1.200 0.036 1.224 ; END END dout_a[24] PIN dout_a[25] @@ -245,7 +245,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 1.248 0.024 1.272 ; + RECT 0.000 1.248 0.036 1.272 ; END END dout_a[25] PIN dout_a[26] @@ -254,7 +254,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 1.296 0.024 1.320 ; + RECT 0.000 1.296 0.036 1.320 ; END END dout_a[26] PIN dout_a[27] @@ -263,7 +263,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 1.344 0.024 1.368 ; + RECT 0.000 1.344 0.036 1.368 ; END END dout_a[27] PIN dout_a[28] @@ -272,7 +272,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 1.392 0.024 1.416 ; + RECT 0.000 1.392 0.036 1.416 ; END END dout_a[28] PIN dout_a[29] @@ -281,7 +281,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 1.440 0.024 1.464 ; + RECT 0.000 1.440 0.036 1.464 ; END END dout_a[29] PIN dout_a[30] @@ -290,7 +290,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 1.488 0.024 1.512 ; + RECT 0.000 1.488 0.036 1.512 ; END END dout_a[30] PIN dout_a[31] @@ -299,7 +299,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 1.536 0.024 1.560 ; + RECT 0.000 1.536 0.036 1.560 ; END END dout_a[31] PIN dout_a[32] @@ -308,7 +308,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 1.584 0.024 1.608 ; + RECT 0.000 1.584 0.036 1.608 ; END END dout_a[32] PIN dout_a[33] @@ -317,7 +317,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 1.632 0.024 1.656 ; + RECT 0.000 1.632 0.036 1.656 ; END END dout_a[33] PIN dout_a[34] @@ -326,7 +326,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 1.680 0.024 1.704 ; + RECT 0.000 1.680 0.036 1.704 ; END END dout_a[34] PIN dout_a[35] @@ -335,7 +335,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 1.728 0.024 1.752 ; + RECT 0.000 1.728 0.036 1.752 ; END END dout_a[35] PIN dout_a[36] @@ -344,7 +344,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 1.776 0.024 1.800 ; + RECT 0.000 1.776 0.036 1.800 ; END END dout_a[36] PIN dout_a[37] @@ -353,7 +353,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 1.824 0.024 1.848 ; + RECT 0.000 1.824 0.036 1.848 ; END END dout_a[37] PIN dout_a[38] @@ -362,7 +362,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 1.872 0.024 1.896 ; + RECT 0.000 1.872 0.036 1.896 ; END END dout_a[38] PIN dout_a[39] @@ -371,7 +371,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 1.920 0.024 1.944 ; + RECT 0.000 1.920 0.036 1.944 ; END END dout_a[39] PIN dout_a[40] @@ -380,7 +380,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 1.968 0.024 1.992 ; + RECT 0.000 1.968 0.036 1.992 ; END END dout_a[40] PIN dout_a[41] @@ -389,7 +389,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 2.016 0.024 2.040 ; + RECT 0.000 2.016 0.036 2.040 ; END END dout_a[41] PIN dout_a[42] @@ -398,7 +398,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 2.064 0.024 2.088 ; + RECT 0.000 2.064 0.036 2.088 ; END END dout_a[42] PIN dout_a[43] @@ -407,7 +407,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 2.112 0.024 2.136 ; + RECT 0.000 2.112 0.036 2.136 ; END END dout_a[43] PIN dout_a[44] @@ -416,7 +416,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 2.160 0.024 2.184 ; + RECT 0.000 2.160 0.036 2.184 ; END END dout_a[44] PIN dout_a[45] @@ -425,7 +425,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 2.208 0.024 2.232 ; + RECT 0.000 2.208 0.036 2.232 ; END END dout_a[45] PIN dout_a[46] @@ -434,7 +434,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 2.256 0.024 2.280 ; + RECT 0.000 2.256 0.036 2.280 ; END END dout_a[46] PIN dout_a[47] @@ -443,7 +443,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 2.304 0.024 2.328 ; + RECT 0.000 2.304 0.036 2.328 ; END END dout_a[47] PIN dout_a[48] @@ -452,7 +452,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 2.352 0.024 2.376 ; + RECT 0.000 2.352 0.036 2.376 ; END END dout_a[48] PIN dout_a[49] @@ -461,7 +461,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 2.400 0.024 2.424 ; + RECT 0.000 2.400 0.036 2.424 ; END END dout_a[49] PIN dout_a[50] @@ -470,7 +470,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 2.448 0.024 2.472 ; + RECT 0.000 2.448 0.036 2.472 ; END END dout_a[50] PIN dout_a[51] @@ -479,7 +479,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 2.496 0.024 2.520 ; + RECT 0.000 2.496 0.036 2.520 ; END END dout_a[51] PIN dout_a[52] @@ -488,7 +488,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 2.544 0.024 2.568 ; + RECT 0.000 2.544 0.036 2.568 ; END END dout_a[52] PIN dout_a[53] @@ -497,7 +497,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 2.592 0.024 2.616 ; + RECT 0.000 2.592 0.036 2.616 ; END END dout_a[53] PIN dout_a[54] @@ -506,7 +506,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 2.640 0.024 2.664 ; + RECT 0.000 2.640 0.036 2.664 ; END END dout_a[54] PIN dout_a[55] @@ -515,7 +515,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 2.688 0.024 2.712 ; + RECT 0.000 2.688 0.036 2.712 ; END END dout_a[55] PIN dout_a[56] @@ -524,7 +524,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 2.736 0.024 2.760 ; + RECT 0.000 2.736 0.036 2.760 ; END END dout_a[56] PIN dout_a[57] @@ -533,7 +533,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 2.784 0.024 2.808 ; + RECT 0.000 2.784 0.036 2.808 ; END END dout_a[57] PIN dout_a[58] @@ -542,7 +542,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 2.832 0.024 2.856 ; + RECT 0.000 2.832 0.036 2.856 ; END END dout_a[58] PIN dout_a[59] @@ -551,7 +551,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 2.880 0.024 2.904 ; + RECT 0.000 2.880 0.036 2.904 ; END END dout_a[59] PIN dout_a[60] @@ -560,7 +560,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 2.928 0.024 2.952 ; + RECT 0.000 2.928 0.036 2.952 ; END END dout_a[60] PIN dout_a[61] @@ -569,7 +569,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 2.976 0.024 3.000 ; + RECT 0.000 2.976 0.036 3.000 ; END END dout_a[61] PIN dout_a[62] @@ -578,7 +578,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 3.024 0.024 3.048 ; + RECT 0.000 3.024 0.036 3.048 ; END END dout_a[62] PIN dout_a[63] @@ -587,7 +587,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 3.072 0.024 3.096 ; + RECT 0.000 3.072 0.036 3.096 ; END END dout_a[63] PIN dout_a[64] @@ -596,7 +596,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 3.120 0.024 3.144 ; + RECT 0.000 3.120 0.036 3.144 ; END END dout_a[64] PIN dout_a[65] @@ -605,7 +605,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 3.168 0.024 3.192 ; + RECT 0.000 3.168 0.036 3.192 ; END END dout_a[65] PIN dout_a[66] @@ -614,7 +614,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 3.216 0.024 3.240 ; + RECT 0.000 3.216 0.036 3.240 ; END END dout_a[66] PIN dout_a[67] @@ -623,7 +623,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 3.264 0.024 3.288 ; + RECT 0.000 3.264 0.036 3.288 ; END END dout_a[67] PIN dout_a[68] @@ -632,7 +632,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 3.312 0.024 3.336 ; + RECT 0.000 3.312 0.036 3.336 ; END END dout_a[68] PIN dout_a[69] @@ -641,7 +641,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 3.360 0.024 3.384 ; + RECT 0.000 3.360 0.036 3.384 ; END END dout_a[69] PIN dout_a[70] @@ -650,7 +650,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 3.408 0.024 3.432 ; + RECT 0.000 3.408 0.036 3.432 ; END END dout_a[70] PIN dout_a[71] @@ -659,7 +659,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 3.456 0.024 3.480 ; + RECT 0.000 3.456 0.036 3.480 ; END END dout_a[71] PIN dout_a[72] @@ -668,7 +668,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 3.504 0.024 3.528 ; + RECT 0.000 3.504 0.036 3.528 ; END END dout_a[72] PIN dout_a[73] @@ -677,7 +677,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 3.552 0.024 3.576 ; + RECT 0.000 3.552 0.036 3.576 ; END END dout_a[73] PIN dout_a[74] @@ -686,7 +686,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 3.600 0.024 3.624 ; + RECT 0.000 3.600 0.036 3.624 ; END END dout_a[74] PIN dout_a[75] @@ -695,7 +695,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 3.648 0.024 3.672 ; + RECT 0.000 3.648 0.036 3.672 ; END END dout_a[75] PIN dout_a[76] @@ -704,7 +704,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 3.696 0.024 3.720 ; + RECT 0.000 3.696 0.036 3.720 ; END END dout_a[76] PIN dout_a[77] @@ -713,7 +713,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 3.744 0.024 3.768 ; + RECT 0.000 3.744 0.036 3.768 ; END END dout_a[77] PIN dout_a[78] @@ -722,7 +722,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 3.792 0.024 3.816 ; + RECT 0.000 3.792 0.036 3.816 ; END END dout_a[78] PIN dout_a[79] @@ -731,7 +731,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 3.840 0.024 3.864 ; + RECT 0.000 3.840 0.036 3.864 ; END END dout_a[79] PIN dout_a[80] @@ -740,7 +740,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 3.888 0.024 3.912 ; + RECT 0.000 3.888 0.036 3.912 ; END END dout_a[80] PIN dout_a[81] @@ -749,7 +749,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 3.936 0.024 3.960 ; + RECT 0.000 3.936 0.036 3.960 ; END END dout_a[81] PIN dout_a[82] @@ -758,7 +758,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 3.984 0.024 4.008 ; + RECT 0.000 3.984 0.036 4.008 ; END END dout_a[82] PIN dout_a[83] @@ -767,7 +767,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 4.032 0.024 4.056 ; + RECT 0.000 4.032 0.036 4.056 ; END END dout_a[83] PIN dout_a[84] @@ -776,7 +776,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 4.080 0.024 4.104 ; + RECT 0.000 4.080 0.036 4.104 ; END END dout_a[84] PIN dout_a[85] @@ -785,7 +785,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 4.128 0.024 4.152 ; + RECT 0.000 4.128 0.036 4.152 ; END END dout_a[85] PIN dout_a[86] @@ -794,7 +794,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 4.176 0.024 4.200 ; + RECT 0.000 4.176 0.036 4.200 ; END END dout_a[86] PIN dout_a[87] @@ -803,7 +803,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 4.224 0.024 4.248 ; + RECT 0.000 4.224 0.036 4.248 ; END END dout_a[87] PIN dout_a[88] @@ -812,7 +812,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 4.272 0.024 4.296 ; + RECT 0.000 4.272 0.036 4.296 ; END END dout_a[88] PIN dout_a[89] @@ -821,7 +821,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 4.320 0.024 4.344 ; + RECT 0.000 4.320 0.036 4.344 ; END END dout_a[89] PIN dout_a[90] @@ -830,7 +830,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 4.368 0.024 4.392 ; + RECT 0.000 4.368 0.036 4.392 ; END END dout_a[90] PIN dout_a[91] @@ -839,7 +839,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 4.416 0.024 4.440 ; + RECT 0.000 4.416 0.036 4.440 ; END END dout_a[91] PIN dout_a[92] @@ -848,7 +848,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 4.464 0.024 4.488 ; + RECT 0.000 4.464 0.036 4.488 ; END END dout_a[92] PIN dout_a[93] @@ -857,7 +857,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 4.512 0.024 4.536 ; + RECT 0.000 4.512 0.036 4.536 ; END END dout_a[93] PIN dout_a[94] @@ -866,7 +866,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 4.560 0.024 4.584 ; + RECT 0.000 4.560 0.036 4.584 ; END END dout_a[94] PIN dout_a[95] @@ -875,7 +875,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 4.608 0.024 4.632 ; + RECT 0.000 4.608 0.036 4.632 ; END END dout_a[95] PIN dout_a[96] @@ -884,7 +884,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 4.656 0.024 4.680 ; + RECT 0.000 4.656 0.036 4.680 ; END END dout_a[96] PIN dout_a[97] @@ -893,7 +893,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 4.704 0.024 4.728 ; + RECT 0.000 4.704 0.036 4.728 ; END END dout_a[97] PIN dout_a[98] @@ -902,7 +902,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 4.752 0.024 4.776 ; + RECT 0.000 4.752 0.036 4.776 ; END END dout_a[98] PIN dout_a[99] @@ -911,7 +911,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 4.800 0.024 4.824 ; + RECT 0.000 4.800 0.036 4.824 ; END END dout_a[99] PIN dout_a[100] @@ -920,7 +920,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 4.848 0.024 4.872 ; + RECT 0.000 4.848 0.036 4.872 ; END END dout_a[100] PIN dout_a[101] @@ -929,7 +929,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 4.896 0.024 4.920 ; + RECT 0.000 4.896 0.036 4.920 ; END END dout_a[101] PIN dout_a[102] @@ -938,7 +938,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 4.944 0.024 4.968 ; + RECT 0.000 4.944 0.036 4.968 ; END END dout_a[102] PIN dout_a[103] @@ -947,7 +947,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 4.992 0.024 5.016 ; + RECT 0.000 4.992 0.036 5.016 ; END END dout_a[103] PIN dout_a[104] @@ -956,7 +956,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 5.040 0.024 5.064 ; + RECT 0.000 5.040 0.036 5.064 ; END END dout_a[104] PIN dout_a[105] @@ -965,7 +965,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 5.088 0.024 5.112 ; + RECT 0.000 5.088 0.036 5.112 ; END END dout_a[105] PIN dout_a[106] @@ -974,7 +974,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 5.136 0.024 5.160 ; + RECT 0.000 5.136 0.036 5.160 ; END END dout_a[106] PIN dout_a[107] @@ -983,7 +983,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 5.184 0.024 5.208 ; + RECT 0.000 5.184 0.036 5.208 ; END END dout_a[107] PIN dout_a[108] @@ -992,7 +992,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 5.232 0.024 5.256 ; + RECT 0.000 5.232 0.036 5.256 ; END END dout_a[108] PIN dout_a[109] @@ -1001,7 +1001,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 5.280 0.024 5.304 ; + RECT 0.000 5.280 0.036 5.304 ; END END dout_a[109] PIN dout_a[110] @@ -1010,7 +1010,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 5.328 0.024 5.352 ; + RECT 0.000 5.328 0.036 5.352 ; END END dout_a[110] PIN dout_a[111] @@ -1019,7 +1019,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 5.376 0.024 5.400 ; + RECT 0.000 5.376 0.036 5.400 ; END END dout_a[111] PIN dout_a[112] @@ -1028,7 +1028,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 5.424 0.024 5.448 ; + RECT 0.000 5.424 0.036 5.448 ; END END dout_a[112] PIN dout_a[113] @@ -1037,7 +1037,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 5.472 0.024 5.496 ; + RECT 0.000 5.472 0.036 5.496 ; END END dout_a[113] PIN dout_a[114] @@ -1046,7 +1046,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 5.520 0.024 5.544 ; + RECT 0.000 5.520 0.036 5.544 ; END END dout_a[114] PIN dout_a[115] @@ -1055,7 +1055,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 5.568 0.024 5.592 ; + RECT 0.000 5.568 0.036 5.592 ; END END dout_a[115] PIN dout_a[116] @@ -1064,7 +1064,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 5.616 0.024 5.640 ; + RECT 0.000 5.616 0.036 5.640 ; END END dout_a[116] PIN dout_a[117] @@ -1073,7 +1073,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 5.664 0.024 5.688 ; + RECT 0.000 5.664 0.036 5.688 ; END END dout_a[117] PIN dout_a[118] @@ -1082,7 +1082,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 5.712 0.024 5.736 ; + RECT 0.000 5.712 0.036 5.736 ; END END dout_a[118] PIN dout_a[119] @@ -1091,7 +1091,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 5.760 0.024 5.784 ; + RECT 0.000 5.760 0.036 5.784 ; END END dout_a[119] PIN dout_a[120] @@ -1100,7 +1100,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 5.808 0.024 5.832 ; + RECT 0.000 5.808 0.036 5.832 ; END END dout_a[120] PIN dout_a[121] @@ -1109,7 +1109,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 5.856 0.024 5.880 ; + RECT 0.000 5.856 0.036 5.880 ; END END dout_a[121] PIN dout_a[122] @@ -1118,7 +1118,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 5.904 0.024 5.928 ; + RECT 0.000 5.904 0.036 5.928 ; END END dout_a[122] PIN dout_a[123] @@ -1127,7 +1127,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 5.952 0.024 5.976 ; + RECT 0.000 5.952 0.036 5.976 ; END END dout_a[123] PIN dout_a[124] @@ -1136,7 +1136,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 6.000 0.024 6.024 ; + RECT 0.000 6.000 0.036 6.024 ; END END dout_a[124] PIN dout_a[125] @@ -1145,7 +1145,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 6.048 0.024 6.072 ; + RECT 0.000 6.048 0.036 6.072 ; END END dout_a[125] PIN dout_a[126] @@ -1154,7 +1154,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 6.096 0.024 6.120 ; + RECT 0.000 6.096 0.036 6.120 ; END END dout_a[126] PIN dout_a[127] @@ -1163,7 +1163,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 6.144 0.024 6.168 ; + RECT 0.000 6.144 0.036 6.168 ; END END dout_a[127] PIN dout_a[128] @@ -1172,7 +1172,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 6.192 0.024 6.216 ; + RECT 0.000 6.192 0.036 6.216 ; END END dout_a[128] PIN dout_a[129] @@ -1181,7 +1181,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 6.240 0.024 6.264 ; + RECT 0.000 6.240 0.036 6.264 ; END END dout_a[129] PIN dout_a[130] @@ -1190,7 +1190,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 6.288 0.024 6.312 ; + RECT 0.000 6.288 0.036 6.312 ; END END dout_a[130] PIN dout_a[131] @@ -1199,7 +1199,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 6.336 0.024 6.360 ; + RECT 0.000 6.336 0.036 6.360 ; END END dout_a[131] PIN dout_a[132] @@ -1208,7 +1208,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 6.384 0.024 6.408 ; + RECT 0.000 6.384 0.036 6.408 ; END END dout_a[132] PIN dout_a[133] @@ -1217,7 +1217,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 6.432 0.024 6.456 ; + RECT 0.000 6.432 0.036 6.456 ; END END dout_a[133] PIN dout_a[134] @@ -1226,7 +1226,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 6.480 0.024 6.504 ; + RECT 0.000 6.480 0.036 6.504 ; END END dout_a[134] PIN dout_a[135] @@ -1235,7 +1235,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 6.528 0.024 6.552 ; + RECT 0.000 6.528 0.036 6.552 ; END END dout_a[135] PIN dout_a[136] @@ -1244,7 +1244,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 6.576 0.024 6.600 ; + RECT 0.000 6.576 0.036 6.600 ; END END dout_a[136] PIN dout_a[137] @@ -1253,7 +1253,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 6.624 0.024 6.648 ; + RECT 0.000 6.624 0.036 6.648 ; END END dout_a[137] PIN dout_a[138] @@ -1262,7 +1262,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 6.672 0.024 6.696 ; + RECT 0.000 6.672 0.036 6.696 ; END END dout_a[138] PIN dout_a[139] @@ -1271,7 +1271,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 6.720 0.024 6.744 ; + RECT 0.000 6.720 0.036 6.744 ; END END dout_a[139] PIN dout_a[140] @@ -1280,7 +1280,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 6.768 0.024 6.792 ; + RECT 0.000 6.768 0.036 6.792 ; END END dout_a[140] PIN dout_a[141] @@ -1289,7 +1289,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 6.816 0.024 6.840 ; + RECT 0.000 6.816 0.036 6.840 ; END END dout_a[141] PIN dout_a[142] @@ -1298,7 +1298,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 6.864 0.024 6.888 ; + RECT 0.000 6.864 0.036 6.888 ; END END dout_a[142] PIN dout_a[143] @@ -1307,7 +1307,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 6.912 0.024 6.936 ; + RECT 0.000 6.912 0.036 6.936 ; END END dout_a[143] PIN dout_a[144] @@ -1316,7 +1316,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 6.960 0.024 6.984 ; + RECT 0.000 6.960 0.036 6.984 ; END END dout_a[144] PIN dout_a[145] @@ -1325,7 +1325,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 7.008 0.024 7.032 ; + RECT 0.000 7.008 0.036 7.032 ; END END dout_a[145] PIN dout_a[146] @@ -1334,7 +1334,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 7.056 0.024 7.080 ; + RECT 0.000 7.056 0.036 7.080 ; END END dout_a[146] PIN dout_a[147] @@ -1343,7 +1343,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 7.104 0.024 7.128 ; + RECT 0.000 7.104 0.036 7.128 ; END END dout_a[147] PIN dout_a[148] @@ -1352,7 +1352,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 7.152 0.024 7.176 ; + RECT 0.000 7.152 0.036 7.176 ; END END dout_a[148] PIN dout_a[149] @@ -1361,7 +1361,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 7.200 0.024 7.224 ; + RECT 0.000 7.200 0.036 7.224 ; END END dout_a[149] PIN dout_a[150] @@ -1370,7 +1370,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 7.248 0.024 7.272 ; + RECT 0.000 7.248 0.036 7.272 ; END END dout_a[150] PIN dout_a[151] @@ -1379,7 +1379,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 7.296 0.024 7.320 ; + RECT 0.000 7.296 0.036 7.320 ; END END dout_a[151] PIN dout_a[152] @@ -1388,7 +1388,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 7.344 0.024 7.368 ; + RECT 0.000 7.344 0.036 7.368 ; END END dout_a[152] PIN dout_a[153] @@ -1397,7 +1397,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 7.392 0.024 7.416 ; + RECT 0.000 7.392 0.036 7.416 ; END END dout_a[153] PIN dout_a[154] @@ -1406,7 +1406,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 7.440 0.024 7.464 ; + RECT 0.000 7.440 0.036 7.464 ; END END dout_a[154] PIN dout_a[155] @@ -1415,7 +1415,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 7.488 0.024 7.512 ; + RECT 0.000 7.488 0.036 7.512 ; END END dout_a[155] PIN dout_a[156] @@ -1424,7 +1424,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 7.536 0.024 7.560 ; + RECT 0.000 7.536 0.036 7.560 ; END END dout_a[156] PIN dout_a[157] @@ -1433,7 +1433,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 7.584 0.024 7.608 ; + RECT 0.000 7.584 0.036 7.608 ; END END dout_a[157] PIN dout_a[158] @@ -1442,7 +1442,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 7.632 0.024 7.656 ; + RECT 0.000 7.632 0.036 7.656 ; END END dout_a[158] PIN dout_a[159] @@ -1451,7 +1451,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 7.680 0.024 7.704 ; + RECT 0.000 7.680 0.036 7.704 ; END END dout_a[159] PIN dout_a[160] @@ -1460,7 +1460,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 7.728 0.024 7.752 ; + RECT 0.000 7.728 0.036 7.752 ; END END dout_a[160] PIN dout_a[161] @@ -1469,7 +1469,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 7.776 0.024 7.800 ; + RECT 0.000 7.776 0.036 7.800 ; END END dout_a[161] PIN dout_a[162] @@ -1478,7 +1478,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 7.824 0.024 7.848 ; + RECT 0.000 7.824 0.036 7.848 ; END END dout_a[162] PIN dout_a[163] @@ -1487,7 +1487,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 7.872 0.024 7.896 ; + RECT 0.000 7.872 0.036 7.896 ; END END dout_a[163] PIN dout_a[164] @@ -1496,7 +1496,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 7.920 0.024 7.944 ; + RECT 0.000 7.920 0.036 7.944 ; END END dout_a[164] PIN dout_a[165] @@ -1505,7 +1505,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 7.968 0.024 7.992 ; + RECT 0.000 7.968 0.036 7.992 ; END END dout_a[165] PIN dout_a[166] @@ -1514,7 +1514,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 8.016 0.024 8.040 ; + RECT 0.000 8.016 0.036 8.040 ; END END dout_a[166] PIN dout_a[167] @@ -1523,7 +1523,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 8.064 0.024 8.088 ; + RECT 0.000 8.064 0.036 8.088 ; END END dout_a[167] PIN dout_a[168] @@ -1532,7 +1532,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 8.112 0.024 8.136 ; + RECT 0.000 8.112 0.036 8.136 ; END END dout_a[168] PIN dout_a[169] @@ -1541,7 +1541,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 8.160 0.024 8.184 ; + RECT 0.000 8.160 0.036 8.184 ; END END dout_a[169] PIN dout_a[170] @@ -1550,7 +1550,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 8.208 0.024 8.232 ; + RECT 0.000 8.208 0.036 8.232 ; END END dout_a[170] PIN dout_a[171] @@ -1559,7 +1559,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 8.256 0.024 8.280 ; + RECT 0.000 8.256 0.036 8.280 ; END END dout_a[171] PIN dout_a[172] @@ -1568,7 +1568,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 8.304 0.024 8.328 ; + RECT 0.000 8.304 0.036 8.328 ; END END dout_a[172] PIN dout_a[173] @@ -1577,7 +1577,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 8.352 0.024 8.376 ; + RECT 0.000 8.352 0.036 8.376 ; END END dout_a[173] PIN dout_a[174] @@ -1586,7 +1586,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 8.400 0.024 8.424 ; + RECT 0.000 8.400 0.036 8.424 ; END END dout_a[174] PIN dout_a[175] @@ -1595,7 +1595,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 8.448 0.024 8.472 ; + RECT 0.000 8.448 0.036 8.472 ; END END dout_a[175] PIN dout_a[176] @@ -1604,7 +1604,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 8.496 0.024 8.520 ; + RECT 0.000 8.496 0.036 8.520 ; END END dout_a[176] PIN dout_a[177] @@ -1613,7 +1613,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 8.544 0.024 8.568 ; + RECT 0.000 8.544 0.036 8.568 ; END END dout_a[177] PIN dout_a[178] @@ -1622,7 +1622,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 8.592 0.024 8.616 ; + RECT 0.000 8.592 0.036 8.616 ; END END dout_a[178] PIN dout_a[179] @@ -1631,7 +1631,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 8.640 0.024 8.664 ; + RECT 0.000 8.640 0.036 8.664 ; END END dout_a[179] PIN dout_a[180] @@ -1640,7 +1640,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 8.688 0.024 8.712 ; + RECT 0.000 8.688 0.036 8.712 ; END END dout_a[180] PIN dout_a[181] @@ -1649,7 +1649,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 8.736 0.024 8.760 ; + RECT 0.000 8.736 0.036 8.760 ; END END dout_a[181] PIN dout_a[182] @@ -1658,7 +1658,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 8.784 0.024 8.808 ; + RECT 0.000 8.784 0.036 8.808 ; END END dout_a[182] PIN dout_a[183] @@ -1667,7 +1667,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 8.832 0.024 8.856 ; + RECT 0.000 8.832 0.036 8.856 ; END END dout_a[183] PIN dout_a[184] @@ -1676,7 +1676,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 8.880 0.024 8.904 ; + RECT 0.000 8.880 0.036 8.904 ; END END dout_a[184] PIN dout_a[185] @@ -1685,7 +1685,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 8.928 0.024 8.952 ; + RECT 0.000 8.928 0.036 8.952 ; END END dout_a[185] PIN dout_a[186] @@ -1694,7 +1694,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 8.976 0.024 9.000 ; + RECT 0.000 8.976 0.036 9.000 ; END END dout_a[186] PIN dout_a[187] @@ -1703,7 +1703,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 9.024 0.024 9.048 ; + RECT 0.000 9.024 0.036 9.048 ; END END dout_a[187] PIN dout_a[188] @@ -1712,7 +1712,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 9.072 0.024 9.096 ; + RECT 0.000 9.072 0.036 9.096 ; END END dout_a[188] PIN dout_a[189] @@ -1721,7 +1721,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 9.120 0.024 9.144 ; + RECT 0.000 9.120 0.036 9.144 ; END END dout_a[189] PIN dout_a[190] @@ -1730,7 +1730,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 9.168 0.024 9.192 ; + RECT 0.000 9.168 0.036 9.192 ; END END dout_a[190] PIN dout_a[191] @@ -1739,7 +1739,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 9.216 0.024 9.240 ; + RECT 0.000 9.216 0.036 9.240 ; END END dout_a[191] PIN dout_a[192] @@ -1748,7 +1748,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 9.264 0.024 9.288 ; + RECT 0.000 9.264 0.036 9.288 ; END END dout_a[192] PIN dout_a[193] @@ -1757,7 +1757,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 9.312 0.024 9.336 ; + RECT 0.000 9.312 0.036 9.336 ; END END dout_a[193] PIN dout_a[194] @@ -1766,7 +1766,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 9.360 0.024 9.384 ; + RECT 0.000 9.360 0.036 9.384 ; END END dout_a[194] PIN dout_a[195] @@ -1775,7 +1775,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 9.408 0.024 9.432 ; + RECT 0.000 9.408 0.036 9.432 ; END END dout_a[195] PIN dout_a[196] @@ -1784,7 +1784,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 9.456 0.024 9.480 ; + RECT 0.000 9.456 0.036 9.480 ; END END dout_a[196] PIN dout_a[197] @@ -1793,7 +1793,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 9.504 0.024 9.528 ; + RECT 0.000 9.504 0.036 9.528 ; END END dout_a[197] PIN dout_a[198] @@ -1802,7 +1802,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 9.552 0.024 9.576 ; + RECT 0.000 9.552 0.036 9.576 ; END END dout_a[198] PIN dout_a[199] @@ -1811,7 +1811,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 9.600 0.024 9.624 ; + RECT 0.000 9.600 0.036 9.624 ; END END dout_a[199] PIN dout_a[200] @@ -1820,7 +1820,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 9.648 0.024 9.672 ; + RECT 0.000 9.648 0.036 9.672 ; END END dout_a[200] PIN dout_a[201] @@ -1829,7 +1829,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 9.696 0.024 9.720 ; + RECT 0.000 9.696 0.036 9.720 ; END END dout_a[201] PIN dout_a[202] @@ -1838,7 +1838,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 9.744 0.024 9.768 ; + RECT 0.000 9.744 0.036 9.768 ; END END dout_a[202] PIN dout_a[203] @@ -1847,7 +1847,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 9.792 0.024 9.816 ; + RECT 0.000 9.792 0.036 9.816 ; END END dout_a[203] PIN dout_a[204] @@ -1856,7 +1856,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 9.840 0.024 9.864 ; + RECT 0.000 9.840 0.036 9.864 ; END END dout_a[204] PIN dout_a[205] @@ -1865,7 +1865,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 9.888 0.024 9.912 ; + RECT 0.000 9.888 0.036 9.912 ; END END dout_a[205] PIN dout_a[206] @@ -1874,7 +1874,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 9.936 0.024 9.960 ; + RECT 0.000 9.936 0.036 9.960 ; END END dout_a[206] PIN dout_a[207] @@ -1883,7 +1883,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 9.984 0.024 10.008 ; + RECT 0.000 9.984 0.036 10.008 ; END END dout_a[207] PIN dout_a[208] @@ -1892,7 +1892,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 10.032 0.024 10.056 ; + RECT 0.000 10.032 0.036 10.056 ; END END dout_a[208] PIN dout_a[209] @@ -1901,7 +1901,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 10.080 0.024 10.104 ; + RECT 0.000 10.080 0.036 10.104 ; END END dout_a[209] PIN dout_a[210] @@ -1910,7 +1910,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 10.128 0.024 10.152 ; + RECT 0.000 10.128 0.036 10.152 ; END END dout_a[210] PIN dout_a[211] @@ -1919,7 +1919,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 10.176 0.024 10.200 ; + RECT 0.000 10.176 0.036 10.200 ; END END dout_a[211] PIN dout_a[212] @@ -1928,7 +1928,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 10.224 0.024 10.248 ; + RECT 0.000 10.224 0.036 10.248 ; END END dout_a[212] PIN dout_a[213] @@ -1937,7 +1937,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 10.272 0.024 10.296 ; + RECT 0.000 10.272 0.036 10.296 ; END END dout_a[213] PIN dout_a[214] @@ -1946,7 +1946,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 10.320 0.024 10.344 ; + RECT 0.000 10.320 0.036 10.344 ; END END dout_a[214] PIN dout_a[215] @@ -1955,7 +1955,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 10.368 0.024 10.392 ; + RECT 0.000 10.368 0.036 10.392 ; END END dout_a[215] PIN dout_a[216] @@ -1964,7 +1964,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 10.416 0.024 10.440 ; + RECT 0.000 10.416 0.036 10.440 ; END END dout_a[216] PIN dout_a[217] @@ -1973,7 +1973,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 10.464 0.024 10.488 ; + RECT 0.000 10.464 0.036 10.488 ; END END dout_a[217] PIN dout_a[218] @@ -1982,7 +1982,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 10.512 0.024 10.536 ; + RECT 0.000 10.512 0.036 10.536 ; END END dout_a[218] PIN dout_a[219] @@ -1991,7 +1991,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 10.560 0.024 10.584 ; + RECT 0.000 10.560 0.036 10.584 ; END END dout_a[219] PIN dout_a[220] @@ -2000,7 +2000,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 10.608 0.024 10.632 ; + RECT 0.000 10.608 0.036 10.632 ; END END dout_a[220] PIN dout_a[221] @@ -2009,7 +2009,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 10.656 0.024 10.680 ; + RECT 0.000 10.656 0.036 10.680 ; END END dout_a[221] PIN dout_a[222] @@ -2018,7 +2018,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 10.704 0.024 10.728 ; + RECT 0.000 10.704 0.036 10.728 ; END END dout_a[222] PIN dout_a[223] @@ -2027,7 +2027,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 10.752 0.024 10.776 ; + RECT 0.000 10.752 0.036 10.776 ; END END dout_a[223] PIN dout_a[224] @@ -2036,7 +2036,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 10.800 0.024 10.824 ; + RECT 0.000 10.800 0.036 10.824 ; END END dout_a[224] PIN dout_a[225] @@ -2045,7 +2045,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 10.848 0.024 10.872 ; + RECT 0.000 10.848 0.036 10.872 ; END END dout_a[225] PIN dout_a[226] @@ -2054,7 +2054,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 10.896 0.024 10.920 ; + RECT 0.000 10.896 0.036 10.920 ; END END dout_a[226] PIN dout_a[227] @@ -2063,7 +2063,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 10.944 0.024 10.968 ; + RECT 0.000 10.944 0.036 10.968 ; END END dout_a[227] PIN dout_a[228] @@ -2072,7 +2072,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 10.992 0.024 11.016 ; + RECT 0.000 10.992 0.036 11.016 ; END END dout_a[228] PIN dout_a[229] @@ -2081,7 +2081,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 11.040 0.024 11.064 ; + RECT 0.000 11.040 0.036 11.064 ; END END dout_a[229] PIN dout_a[230] @@ -2090,7 +2090,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 11.088 0.024 11.112 ; + RECT 0.000 11.088 0.036 11.112 ; END END dout_a[230] PIN dout_a[231] @@ -2099,7 +2099,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 11.136 0.024 11.160 ; + RECT 0.000 11.136 0.036 11.160 ; END END dout_a[231] PIN dout_a[232] @@ -2108,7 +2108,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 11.184 0.024 11.208 ; + RECT 0.000 11.184 0.036 11.208 ; END END dout_a[232] PIN dout_a[233] @@ -2117,7 +2117,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 11.232 0.024 11.256 ; + RECT 0.000 11.232 0.036 11.256 ; END END dout_a[233] PIN dout_a[234] @@ -2126,7 +2126,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 11.280 0.024 11.304 ; + RECT 0.000 11.280 0.036 11.304 ; END END dout_a[234] PIN dout_a[235] @@ -2135,7 +2135,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 11.328 0.024 11.352 ; + RECT 0.000 11.328 0.036 11.352 ; END END dout_a[235] PIN dout_a[236] @@ -2144,7 +2144,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 11.376 0.024 11.400 ; + RECT 0.000 11.376 0.036 11.400 ; END END dout_a[236] PIN dout_a[237] @@ -2153,7 +2153,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 11.424 0.024 11.448 ; + RECT 0.000 11.424 0.036 11.448 ; END END dout_a[237] PIN dout_a[238] @@ -2162,7 +2162,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 11.472 0.024 11.496 ; + RECT 0.000 11.472 0.036 11.496 ; END END dout_a[238] PIN dout_a[239] @@ -2171,7 +2171,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 11.520 0.024 11.544 ; + RECT 0.000 11.520 0.036 11.544 ; END END dout_a[239] PIN dout_a[240] @@ -2180,7 +2180,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 11.568 0.024 11.592 ; + RECT 0.000 11.568 0.036 11.592 ; END END dout_a[240] PIN dout_a[241] @@ -2189,7 +2189,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 11.616 0.024 11.640 ; + RECT 0.000 11.616 0.036 11.640 ; END END dout_a[241] PIN dout_a[242] @@ -2198,7 +2198,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 11.664 0.024 11.688 ; + RECT 0.000 11.664 0.036 11.688 ; END END dout_a[242] PIN dout_a[243] @@ -2207,7 +2207,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 11.712 0.024 11.736 ; + RECT 0.000 11.712 0.036 11.736 ; END END dout_a[243] PIN dout_a[244] @@ -2216,7 +2216,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 11.760 0.024 11.784 ; + RECT 0.000 11.760 0.036 11.784 ; END END dout_a[244] PIN dout_a[245] @@ -2225,7 +2225,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 11.808 0.024 11.832 ; + RECT 0.000 11.808 0.036 11.832 ; END END dout_a[245] PIN dout_a[246] @@ -2234,7 +2234,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 11.856 0.024 11.880 ; + RECT 0.000 11.856 0.036 11.880 ; END END dout_a[246] PIN dout_a[247] @@ -2243,7 +2243,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 11.904 0.024 11.928 ; + RECT 0.000 11.904 0.036 11.928 ; END END dout_a[247] PIN dout_a[248] @@ -2252,7 +2252,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 11.952 0.024 11.976 ; + RECT 0.000 11.952 0.036 11.976 ; END END dout_a[248] PIN dout_a[249] @@ -2261,7 +2261,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 12.000 0.024 12.024 ; + RECT 0.000 12.000 0.036 12.024 ; END END dout_a[249] PIN dout_a[250] @@ -2270,7 +2270,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 12.048 0.024 12.072 ; + RECT 0.000 12.048 0.036 12.072 ; END END dout_a[250] PIN dout_a[251] @@ -2279,7 +2279,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 12.096 0.024 12.120 ; + RECT 0.000 12.096 0.036 12.120 ; END END dout_a[251] PIN dout_a[252] @@ -2288,7 +2288,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 12.144 0.024 12.168 ; + RECT 0.000 12.144 0.036 12.168 ; END END dout_a[252] PIN dout_a[253] @@ -2297,7 +2297,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 12.192 0.024 12.216 ; + RECT 0.000 12.192 0.036 12.216 ; END END dout_a[253] PIN dout_a[254] @@ -2306,7 +2306,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 12.240 0.024 12.264 ; + RECT 0.000 12.240 0.036 12.264 ; END END dout_a[254] PIN dout_a[255] @@ -2315,7 +2315,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 12.288 0.024 12.312 ; + RECT 0.000 12.288 0.036 12.312 ; END END dout_a[255] PIN din_a[0] @@ -2324,7 +2324,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 23.616 0.024 23.640 ; + RECT 0.000 23.616 0.036 23.640 ; END END din_a[0] PIN din_a[1] @@ -2333,7 +2333,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 23.664 0.024 23.688 ; + RECT 0.000 23.664 0.036 23.688 ; END END din_a[1] PIN din_a[2] @@ -2342,7 +2342,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 23.712 0.024 23.736 ; + RECT 0.000 23.712 0.036 23.736 ; END END din_a[2] PIN din_a[3] @@ -2351,7 +2351,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 23.760 0.024 23.784 ; + RECT 0.000 23.760 0.036 23.784 ; END END din_a[3] PIN din_a[4] @@ -2360,7 +2360,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 23.808 0.024 23.832 ; + RECT 0.000 23.808 0.036 23.832 ; END END din_a[4] PIN din_a[5] @@ -2369,7 +2369,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 23.856 0.024 23.880 ; + RECT 0.000 23.856 0.036 23.880 ; END END din_a[5] PIN din_a[6] @@ -2378,7 +2378,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 23.904 0.024 23.928 ; + RECT 0.000 23.904 0.036 23.928 ; END END din_a[6] PIN din_a[7] @@ -2387,7 +2387,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 23.952 0.024 23.976 ; + RECT 0.000 23.952 0.036 23.976 ; END END din_a[7] PIN din_a[8] @@ -2396,7 +2396,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 24.000 0.024 24.024 ; + RECT 0.000 24.000 0.036 24.024 ; END END din_a[8] PIN din_a[9] @@ -2405,7 +2405,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 24.048 0.024 24.072 ; + RECT 0.000 24.048 0.036 24.072 ; END END din_a[9] PIN din_a[10] @@ -2414,7 +2414,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 24.096 0.024 24.120 ; + RECT 0.000 24.096 0.036 24.120 ; END END din_a[10] PIN din_a[11] @@ -2423,7 +2423,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 24.144 0.024 24.168 ; + RECT 0.000 24.144 0.036 24.168 ; END END din_a[11] PIN din_a[12] @@ -2432,7 +2432,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 24.192 0.024 24.216 ; + RECT 0.000 24.192 0.036 24.216 ; END END din_a[12] PIN din_a[13] @@ -2441,7 +2441,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 24.240 0.024 24.264 ; + RECT 0.000 24.240 0.036 24.264 ; END END din_a[13] PIN din_a[14] @@ -2450,7 +2450,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 24.288 0.024 24.312 ; + RECT 0.000 24.288 0.036 24.312 ; END END din_a[14] PIN din_a[15] @@ -2459,7 +2459,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 24.336 0.024 24.360 ; + RECT 0.000 24.336 0.036 24.360 ; END END din_a[15] PIN din_a[16] @@ -2468,7 +2468,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 24.384 0.024 24.408 ; + RECT 0.000 24.384 0.036 24.408 ; END END din_a[16] PIN din_a[17] @@ -2477,7 +2477,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 24.432 0.024 24.456 ; + RECT 0.000 24.432 0.036 24.456 ; END END din_a[17] PIN din_a[18] @@ -2486,7 +2486,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 24.480 0.024 24.504 ; + RECT 0.000 24.480 0.036 24.504 ; END END din_a[18] PIN din_a[19] @@ -2495,7 +2495,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 24.528 0.024 24.552 ; + RECT 0.000 24.528 0.036 24.552 ; END END din_a[19] PIN din_a[20] @@ -2504,7 +2504,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 24.576 0.024 24.600 ; + RECT 0.000 24.576 0.036 24.600 ; END END din_a[20] PIN din_a[21] @@ -2513,7 +2513,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 24.624 0.024 24.648 ; + RECT 0.000 24.624 0.036 24.648 ; END END din_a[21] PIN din_a[22] @@ -2522,7 +2522,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 24.672 0.024 24.696 ; + RECT 0.000 24.672 0.036 24.696 ; END END din_a[22] PIN din_a[23] @@ -2531,7 +2531,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 24.720 0.024 24.744 ; + RECT 0.000 24.720 0.036 24.744 ; END END din_a[23] PIN din_a[24] @@ -2540,7 +2540,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 24.768 0.024 24.792 ; + RECT 0.000 24.768 0.036 24.792 ; END END din_a[24] PIN din_a[25] @@ -2549,7 +2549,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 24.816 0.024 24.840 ; + RECT 0.000 24.816 0.036 24.840 ; END END din_a[25] PIN din_a[26] @@ -2558,7 +2558,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 24.864 0.024 24.888 ; + RECT 0.000 24.864 0.036 24.888 ; END END din_a[26] PIN din_a[27] @@ -2567,7 +2567,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 24.912 0.024 24.936 ; + RECT 0.000 24.912 0.036 24.936 ; END END din_a[27] PIN din_a[28] @@ -2576,7 +2576,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 24.960 0.024 24.984 ; + RECT 0.000 24.960 0.036 24.984 ; END END din_a[28] PIN din_a[29] @@ -2585,7 +2585,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 25.008 0.024 25.032 ; + RECT 0.000 25.008 0.036 25.032 ; END END din_a[29] PIN din_a[30] @@ -2594,7 +2594,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 25.056 0.024 25.080 ; + RECT 0.000 25.056 0.036 25.080 ; END END din_a[30] PIN din_a[31] @@ -2603,7 +2603,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 25.104 0.024 25.128 ; + RECT 0.000 25.104 0.036 25.128 ; END END din_a[31] PIN din_a[32] @@ -2612,7 +2612,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 25.152 0.024 25.176 ; + RECT 0.000 25.152 0.036 25.176 ; END END din_a[32] PIN din_a[33] @@ -2621,7 +2621,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 25.200 0.024 25.224 ; + RECT 0.000 25.200 0.036 25.224 ; END END din_a[33] PIN din_a[34] @@ -2630,7 +2630,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 25.248 0.024 25.272 ; + RECT 0.000 25.248 0.036 25.272 ; END END din_a[34] PIN din_a[35] @@ -2639,7 +2639,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 25.296 0.024 25.320 ; + RECT 0.000 25.296 0.036 25.320 ; END END din_a[35] PIN din_a[36] @@ -2648,7 +2648,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 25.344 0.024 25.368 ; + RECT 0.000 25.344 0.036 25.368 ; END END din_a[36] PIN din_a[37] @@ -2657,7 +2657,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 25.392 0.024 25.416 ; + RECT 0.000 25.392 0.036 25.416 ; END END din_a[37] PIN din_a[38] @@ -2666,7 +2666,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 25.440 0.024 25.464 ; + RECT 0.000 25.440 0.036 25.464 ; END END din_a[38] PIN din_a[39] @@ -2675,7 +2675,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 25.488 0.024 25.512 ; + RECT 0.000 25.488 0.036 25.512 ; END END din_a[39] PIN din_a[40] @@ -2684,7 +2684,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 25.536 0.024 25.560 ; + RECT 0.000 25.536 0.036 25.560 ; END END din_a[40] PIN din_a[41] @@ -2693,7 +2693,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 25.584 0.024 25.608 ; + RECT 0.000 25.584 0.036 25.608 ; END END din_a[41] PIN din_a[42] @@ -2702,7 +2702,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 25.632 0.024 25.656 ; + RECT 0.000 25.632 0.036 25.656 ; END END din_a[42] PIN din_a[43] @@ -2711,7 +2711,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 25.680 0.024 25.704 ; + RECT 0.000 25.680 0.036 25.704 ; END END din_a[43] PIN din_a[44] @@ -2720,7 +2720,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 25.728 0.024 25.752 ; + RECT 0.000 25.728 0.036 25.752 ; END END din_a[44] PIN din_a[45] @@ -2729,7 +2729,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 25.776 0.024 25.800 ; + RECT 0.000 25.776 0.036 25.800 ; END END din_a[45] PIN din_a[46] @@ -2738,7 +2738,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 25.824 0.024 25.848 ; + RECT 0.000 25.824 0.036 25.848 ; END END din_a[46] PIN din_a[47] @@ -2747,7 +2747,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 25.872 0.024 25.896 ; + RECT 0.000 25.872 0.036 25.896 ; END END din_a[47] PIN din_a[48] @@ -2756,7 +2756,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 25.920 0.024 25.944 ; + RECT 0.000 25.920 0.036 25.944 ; END END din_a[48] PIN din_a[49] @@ -2765,7 +2765,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 25.968 0.024 25.992 ; + RECT 0.000 25.968 0.036 25.992 ; END END din_a[49] PIN din_a[50] @@ -2774,7 +2774,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 26.016 0.024 26.040 ; + RECT 0.000 26.016 0.036 26.040 ; END END din_a[50] PIN din_a[51] @@ -2783,7 +2783,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 26.064 0.024 26.088 ; + RECT 0.000 26.064 0.036 26.088 ; END END din_a[51] PIN din_a[52] @@ -2792,7 +2792,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 26.112 0.024 26.136 ; + RECT 0.000 26.112 0.036 26.136 ; END END din_a[52] PIN din_a[53] @@ -2801,7 +2801,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 26.160 0.024 26.184 ; + RECT 0.000 26.160 0.036 26.184 ; END END din_a[53] PIN din_a[54] @@ -2810,7 +2810,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 26.208 0.024 26.232 ; + RECT 0.000 26.208 0.036 26.232 ; END END din_a[54] PIN din_a[55] @@ -2819,7 +2819,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 26.256 0.024 26.280 ; + RECT 0.000 26.256 0.036 26.280 ; END END din_a[55] PIN din_a[56] @@ -2828,7 +2828,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 26.304 0.024 26.328 ; + RECT 0.000 26.304 0.036 26.328 ; END END din_a[56] PIN din_a[57] @@ -2837,7 +2837,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 26.352 0.024 26.376 ; + RECT 0.000 26.352 0.036 26.376 ; END END din_a[57] PIN din_a[58] @@ -2846,7 +2846,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 26.400 0.024 26.424 ; + RECT 0.000 26.400 0.036 26.424 ; END END din_a[58] PIN din_a[59] @@ -2855,7 +2855,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 26.448 0.024 26.472 ; + RECT 0.000 26.448 0.036 26.472 ; END END din_a[59] PIN din_a[60] @@ -2864,7 +2864,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 26.496 0.024 26.520 ; + RECT 0.000 26.496 0.036 26.520 ; END END din_a[60] PIN din_a[61] @@ -2873,7 +2873,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 26.544 0.024 26.568 ; + RECT 0.000 26.544 0.036 26.568 ; END END din_a[61] PIN din_a[62] @@ -2882,7 +2882,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 26.592 0.024 26.616 ; + RECT 0.000 26.592 0.036 26.616 ; END END din_a[62] PIN din_a[63] @@ -2891,7 +2891,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 26.640 0.024 26.664 ; + RECT 0.000 26.640 0.036 26.664 ; END END din_a[63] PIN din_a[64] @@ -2900,7 +2900,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 26.688 0.024 26.712 ; + RECT 0.000 26.688 0.036 26.712 ; END END din_a[64] PIN din_a[65] @@ -2909,7 +2909,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 26.736 0.024 26.760 ; + RECT 0.000 26.736 0.036 26.760 ; END END din_a[65] PIN din_a[66] @@ -2918,7 +2918,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 26.784 0.024 26.808 ; + RECT 0.000 26.784 0.036 26.808 ; END END din_a[66] PIN din_a[67] @@ -2927,7 +2927,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 26.832 0.024 26.856 ; + RECT 0.000 26.832 0.036 26.856 ; END END din_a[67] PIN din_a[68] @@ -2936,7 +2936,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 26.880 0.024 26.904 ; + RECT 0.000 26.880 0.036 26.904 ; END END din_a[68] PIN din_a[69] @@ -2945,7 +2945,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 26.928 0.024 26.952 ; + RECT 0.000 26.928 0.036 26.952 ; END END din_a[69] PIN din_a[70] @@ -2954,7 +2954,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 26.976 0.024 27.000 ; + RECT 0.000 26.976 0.036 27.000 ; END END din_a[70] PIN din_a[71] @@ -2963,7 +2963,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 27.024 0.024 27.048 ; + RECT 0.000 27.024 0.036 27.048 ; END END din_a[71] PIN din_a[72] @@ -2972,7 +2972,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 27.072 0.024 27.096 ; + RECT 0.000 27.072 0.036 27.096 ; END END din_a[72] PIN din_a[73] @@ -2981,7 +2981,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 27.120 0.024 27.144 ; + RECT 0.000 27.120 0.036 27.144 ; END END din_a[73] PIN din_a[74] @@ -2990,7 +2990,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 27.168 0.024 27.192 ; + RECT 0.000 27.168 0.036 27.192 ; END END din_a[74] PIN din_a[75] @@ -2999,7 +2999,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 27.216 0.024 27.240 ; + RECT 0.000 27.216 0.036 27.240 ; END END din_a[75] PIN din_a[76] @@ -3008,7 +3008,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 27.264 0.024 27.288 ; + RECT 0.000 27.264 0.036 27.288 ; END END din_a[76] PIN din_a[77] @@ -3017,7 +3017,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 27.312 0.024 27.336 ; + RECT 0.000 27.312 0.036 27.336 ; END END din_a[77] PIN din_a[78] @@ -3026,7 +3026,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 27.360 0.024 27.384 ; + RECT 0.000 27.360 0.036 27.384 ; END END din_a[78] PIN din_a[79] @@ -3035,7 +3035,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 27.408 0.024 27.432 ; + RECT 0.000 27.408 0.036 27.432 ; END END din_a[79] PIN din_a[80] @@ -3044,7 +3044,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 27.456 0.024 27.480 ; + RECT 0.000 27.456 0.036 27.480 ; END END din_a[80] PIN din_a[81] @@ -3053,7 +3053,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 27.504 0.024 27.528 ; + RECT 0.000 27.504 0.036 27.528 ; END END din_a[81] PIN din_a[82] @@ -3062,7 +3062,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 27.552 0.024 27.576 ; + RECT 0.000 27.552 0.036 27.576 ; END END din_a[82] PIN din_a[83] @@ -3071,7 +3071,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 27.600 0.024 27.624 ; + RECT 0.000 27.600 0.036 27.624 ; END END din_a[83] PIN din_a[84] @@ -3080,7 +3080,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 27.648 0.024 27.672 ; + RECT 0.000 27.648 0.036 27.672 ; END END din_a[84] PIN din_a[85] @@ -3089,7 +3089,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 27.696 0.024 27.720 ; + RECT 0.000 27.696 0.036 27.720 ; END END din_a[85] PIN din_a[86] @@ -3098,7 +3098,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 27.744 0.024 27.768 ; + RECT 0.000 27.744 0.036 27.768 ; END END din_a[86] PIN din_a[87] @@ -3107,7 +3107,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 27.792 0.024 27.816 ; + RECT 0.000 27.792 0.036 27.816 ; END END din_a[87] PIN din_a[88] @@ -3116,7 +3116,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 27.840 0.024 27.864 ; + RECT 0.000 27.840 0.036 27.864 ; END END din_a[88] PIN din_a[89] @@ -3125,7 +3125,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 27.888 0.024 27.912 ; + RECT 0.000 27.888 0.036 27.912 ; END END din_a[89] PIN din_a[90] @@ -3134,7 +3134,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 27.936 0.024 27.960 ; + RECT 0.000 27.936 0.036 27.960 ; END END din_a[90] PIN din_a[91] @@ -3143,7 +3143,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 27.984 0.024 28.008 ; + RECT 0.000 27.984 0.036 28.008 ; END END din_a[91] PIN din_a[92] @@ -3152,7 +3152,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 28.032 0.024 28.056 ; + RECT 0.000 28.032 0.036 28.056 ; END END din_a[92] PIN din_a[93] @@ -3161,7 +3161,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 28.080 0.024 28.104 ; + RECT 0.000 28.080 0.036 28.104 ; END END din_a[93] PIN din_a[94] @@ -3170,7 +3170,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 28.128 0.024 28.152 ; + RECT 0.000 28.128 0.036 28.152 ; END END din_a[94] PIN din_a[95] @@ -3179,7 +3179,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 28.176 0.024 28.200 ; + RECT 0.000 28.176 0.036 28.200 ; END END din_a[95] PIN din_a[96] @@ -3188,7 +3188,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 28.224 0.024 28.248 ; + RECT 0.000 28.224 0.036 28.248 ; END END din_a[96] PIN din_a[97] @@ -3197,7 +3197,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 28.272 0.024 28.296 ; + RECT 0.000 28.272 0.036 28.296 ; END END din_a[97] PIN din_a[98] @@ -3206,7 +3206,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 28.320 0.024 28.344 ; + RECT 0.000 28.320 0.036 28.344 ; END END din_a[98] PIN din_a[99] @@ -3215,7 +3215,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 28.368 0.024 28.392 ; + RECT 0.000 28.368 0.036 28.392 ; END END din_a[99] PIN din_a[100] @@ -3224,7 +3224,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 28.416 0.024 28.440 ; + RECT 0.000 28.416 0.036 28.440 ; END END din_a[100] PIN din_a[101] @@ -3233,7 +3233,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 28.464 0.024 28.488 ; + RECT 0.000 28.464 0.036 28.488 ; END END din_a[101] PIN din_a[102] @@ -3242,7 +3242,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 28.512 0.024 28.536 ; + RECT 0.000 28.512 0.036 28.536 ; END END din_a[102] PIN din_a[103] @@ -3251,7 +3251,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 28.560 0.024 28.584 ; + RECT 0.000 28.560 0.036 28.584 ; END END din_a[103] PIN din_a[104] @@ -3260,7 +3260,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 28.608 0.024 28.632 ; + RECT 0.000 28.608 0.036 28.632 ; END END din_a[104] PIN din_a[105] @@ -3269,7 +3269,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 28.656 0.024 28.680 ; + RECT 0.000 28.656 0.036 28.680 ; END END din_a[105] PIN din_a[106] @@ -3278,7 +3278,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 28.704 0.024 28.728 ; + RECT 0.000 28.704 0.036 28.728 ; END END din_a[106] PIN din_a[107] @@ -3287,7 +3287,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 28.752 0.024 28.776 ; + RECT 0.000 28.752 0.036 28.776 ; END END din_a[107] PIN din_a[108] @@ -3296,7 +3296,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 28.800 0.024 28.824 ; + RECT 0.000 28.800 0.036 28.824 ; END END din_a[108] PIN din_a[109] @@ -3305,7 +3305,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 28.848 0.024 28.872 ; + RECT 0.000 28.848 0.036 28.872 ; END END din_a[109] PIN din_a[110] @@ -3314,7 +3314,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 28.896 0.024 28.920 ; + RECT 0.000 28.896 0.036 28.920 ; END END din_a[110] PIN din_a[111] @@ -3323,7 +3323,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 28.944 0.024 28.968 ; + RECT 0.000 28.944 0.036 28.968 ; END END din_a[111] PIN din_a[112] @@ -3332,7 +3332,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 28.992 0.024 29.016 ; + RECT 0.000 28.992 0.036 29.016 ; END END din_a[112] PIN din_a[113] @@ -3341,7 +3341,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 29.040 0.024 29.064 ; + RECT 0.000 29.040 0.036 29.064 ; END END din_a[113] PIN din_a[114] @@ -3350,7 +3350,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 29.088 0.024 29.112 ; + RECT 0.000 29.088 0.036 29.112 ; END END din_a[114] PIN din_a[115] @@ -3359,7 +3359,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 29.136 0.024 29.160 ; + RECT 0.000 29.136 0.036 29.160 ; END END din_a[115] PIN din_a[116] @@ -3368,7 +3368,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 29.184 0.024 29.208 ; + RECT 0.000 29.184 0.036 29.208 ; END END din_a[116] PIN din_a[117] @@ -3377,7 +3377,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 29.232 0.024 29.256 ; + RECT 0.000 29.232 0.036 29.256 ; END END din_a[117] PIN din_a[118] @@ -3386,7 +3386,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 29.280 0.024 29.304 ; + RECT 0.000 29.280 0.036 29.304 ; END END din_a[118] PIN din_a[119] @@ -3395,7 +3395,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 29.328 0.024 29.352 ; + RECT 0.000 29.328 0.036 29.352 ; END END din_a[119] PIN din_a[120] @@ -3404,7 +3404,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 29.376 0.024 29.400 ; + RECT 0.000 29.376 0.036 29.400 ; END END din_a[120] PIN din_a[121] @@ -3413,7 +3413,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 29.424 0.024 29.448 ; + RECT 0.000 29.424 0.036 29.448 ; END END din_a[121] PIN din_a[122] @@ -3422,7 +3422,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 29.472 0.024 29.496 ; + RECT 0.000 29.472 0.036 29.496 ; END END din_a[122] PIN din_a[123] @@ -3431,7 +3431,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 29.520 0.024 29.544 ; + RECT 0.000 29.520 0.036 29.544 ; END END din_a[123] PIN din_a[124] @@ -3440,7 +3440,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 29.568 0.024 29.592 ; + RECT 0.000 29.568 0.036 29.592 ; END END din_a[124] PIN din_a[125] @@ -3449,7 +3449,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 29.616 0.024 29.640 ; + RECT 0.000 29.616 0.036 29.640 ; END END din_a[125] PIN din_a[126] @@ -3458,7 +3458,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 29.664 0.024 29.688 ; + RECT 0.000 29.664 0.036 29.688 ; END END din_a[126] PIN din_a[127] @@ -3467,7 +3467,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 29.712 0.024 29.736 ; + RECT 0.000 29.712 0.036 29.736 ; END END din_a[127] PIN din_a[128] @@ -3476,7 +3476,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 29.760 0.024 29.784 ; + RECT 0.000 29.760 0.036 29.784 ; END END din_a[128] PIN din_a[129] @@ -3485,7 +3485,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 29.808 0.024 29.832 ; + RECT 0.000 29.808 0.036 29.832 ; END END din_a[129] PIN din_a[130] @@ -3494,7 +3494,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 29.856 0.024 29.880 ; + RECT 0.000 29.856 0.036 29.880 ; END END din_a[130] PIN din_a[131] @@ -3503,7 +3503,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 29.904 0.024 29.928 ; + RECT 0.000 29.904 0.036 29.928 ; END END din_a[131] PIN din_a[132] @@ -3512,7 +3512,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 29.952 0.024 29.976 ; + RECT 0.000 29.952 0.036 29.976 ; END END din_a[132] PIN din_a[133] @@ -3521,7 +3521,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 30.000 0.024 30.024 ; + RECT 0.000 30.000 0.036 30.024 ; END END din_a[133] PIN din_a[134] @@ -3530,7 +3530,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 30.048 0.024 30.072 ; + RECT 0.000 30.048 0.036 30.072 ; END END din_a[134] PIN din_a[135] @@ -3539,7 +3539,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 30.096 0.024 30.120 ; + RECT 0.000 30.096 0.036 30.120 ; END END din_a[135] PIN din_a[136] @@ -3548,7 +3548,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 30.144 0.024 30.168 ; + RECT 0.000 30.144 0.036 30.168 ; END END din_a[136] PIN din_a[137] @@ -3557,7 +3557,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 30.192 0.024 30.216 ; + RECT 0.000 30.192 0.036 30.216 ; END END din_a[137] PIN din_a[138] @@ -3566,7 +3566,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 30.240 0.024 30.264 ; + RECT 0.000 30.240 0.036 30.264 ; END END din_a[138] PIN din_a[139] @@ -3575,7 +3575,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 30.288 0.024 30.312 ; + RECT 0.000 30.288 0.036 30.312 ; END END din_a[139] PIN din_a[140] @@ -3584,7 +3584,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 30.336 0.024 30.360 ; + RECT 0.000 30.336 0.036 30.360 ; END END din_a[140] PIN din_a[141] @@ -3593,7 +3593,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 30.384 0.024 30.408 ; + RECT 0.000 30.384 0.036 30.408 ; END END din_a[141] PIN din_a[142] @@ -3602,7 +3602,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 30.432 0.024 30.456 ; + RECT 0.000 30.432 0.036 30.456 ; END END din_a[142] PIN din_a[143] @@ -3611,7 +3611,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 30.480 0.024 30.504 ; + RECT 0.000 30.480 0.036 30.504 ; END END din_a[143] PIN din_a[144] @@ -3620,7 +3620,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 30.528 0.024 30.552 ; + RECT 0.000 30.528 0.036 30.552 ; END END din_a[144] PIN din_a[145] @@ -3629,7 +3629,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 30.576 0.024 30.600 ; + RECT 0.000 30.576 0.036 30.600 ; END END din_a[145] PIN din_a[146] @@ -3638,7 +3638,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 30.624 0.024 30.648 ; + RECT 0.000 30.624 0.036 30.648 ; END END din_a[146] PIN din_a[147] @@ -3647,7 +3647,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 30.672 0.024 30.696 ; + RECT 0.000 30.672 0.036 30.696 ; END END din_a[147] PIN din_a[148] @@ -3656,7 +3656,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 30.720 0.024 30.744 ; + RECT 0.000 30.720 0.036 30.744 ; END END din_a[148] PIN din_a[149] @@ -3665,7 +3665,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 30.768 0.024 30.792 ; + RECT 0.000 30.768 0.036 30.792 ; END END din_a[149] PIN din_a[150] @@ -3674,7 +3674,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 30.816 0.024 30.840 ; + RECT 0.000 30.816 0.036 30.840 ; END END din_a[150] PIN din_a[151] @@ -3683,7 +3683,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 30.864 0.024 30.888 ; + RECT 0.000 30.864 0.036 30.888 ; END END din_a[151] PIN din_a[152] @@ -3692,7 +3692,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 30.912 0.024 30.936 ; + RECT 0.000 30.912 0.036 30.936 ; END END din_a[152] PIN din_a[153] @@ -3701,7 +3701,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 30.960 0.024 30.984 ; + RECT 0.000 30.960 0.036 30.984 ; END END din_a[153] PIN din_a[154] @@ -3710,7 +3710,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 31.008 0.024 31.032 ; + RECT 0.000 31.008 0.036 31.032 ; END END din_a[154] PIN din_a[155] @@ -3719,7 +3719,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 31.056 0.024 31.080 ; + RECT 0.000 31.056 0.036 31.080 ; END END din_a[155] PIN din_a[156] @@ -3728,7 +3728,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 31.104 0.024 31.128 ; + RECT 0.000 31.104 0.036 31.128 ; END END din_a[156] PIN din_a[157] @@ -3737,7 +3737,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 31.152 0.024 31.176 ; + RECT 0.000 31.152 0.036 31.176 ; END END din_a[157] PIN din_a[158] @@ -3746,7 +3746,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 31.200 0.024 31.224 ; + RECT 0.000 31.200 0.036 31.224 ; END END din_a[158] PIN din_a[159] @@ -3755,7 +3755,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 31.248 0.024 31.272 ; + RECT 0.000 31.248 0.036 31.272 ; END END din_a[159] PIN din_a[160] @@ -3764,7 +3764,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 31.296 0.024 31.320 ; + RECT 0.000 31.296 0.036 31.320 ; END END din_a[160] PIN din_a[161] @@ -3773,7 +3773,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 31.344 0.024 31.368 ; + RECT 0.000 31.344 0.036 31.368 ; END END din_a[161] PIN din_a[162] @@ -3782,7 +3782,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 31.392 0.024 31.416 ; + RECT 0.000 31.392 0.036 31.416 ; END END din_a[162] PIN din_a[163] @@ -3791,7 +3791,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 31.440 0.024 31.464 ; + RECT 0.000 31.440 0.036 31.464 ; END END din_a[163] PIN din_a[164] @@ -3800,7 +3800,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 31.488 0.024 31.512 ; + RECT 0.000 31.488 0.036 31.512 ; END END din_a[164] PIN din_a[165] @@ -3809,7 +3809,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 31.536 0.024 31.560 ; + RECT 0.000 31.536 0.036 31.560 ; END END din_a[165] PIN din_a[166] @@ -3818,7 +3818,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 31.584 0.024 31.608 ; + RECT 0.000 31.584 0.036 31.608 ; END END din_a[166] PIN din_a[167] @@ -3827,7 +3827,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 31.632 0.024 31.656 ; + RECT 0.000 31.632 0.036 31.656 ; END END din_a[167] PIN din_a[168] @@ -3836,7 +3836,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 31.680 0.024 31.704 ; + RECT 0.000 31.680 0.036 31.704 ; END END din_a[168] PIN din_a[169] @@ -3845,7 +3845,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 31.728 0.024 31.752 ; + RECT 0.000 31.728 0.036 31.752 ; END END din_a[169] PIN din_a[170] @@ -3854,7 +3854,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 31.776 0.024 31.800 ; + RECT 0.000 31.776 0.036 31.800 ; END END din_a[170] PIN din_a[171] @@ -3863,7 +3863,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 31.824 0.024 31.848 ; + RECT 0.000 31.824 0.036 31.848 ; END END din_a[171] PIN din_a[172] @@ -3872,7 +3872,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 31.872 0.024 31.896 ; + RECT 0.000 31.872 0.036 31.896 ; END END din_a[172] PIN din_a[173] @@ -3881,7 +3881,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 31.920 0.024 31.944 ; + RECT 0.000 31.920 0.036 31.944 ; END END din_a[173] PIN din_a[174] @@ -3890,7 +3890,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 31.968 0.024 31.992 ; + RECT 0.000 31.968 0.036 31.992 ; END END din_a[174] PIN din_a[175] @@ -3899,7 +3899,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 32.016 0.024 32.040 ; + RECT 0.000 32.016 0.036 32.040 ; END END din_a[175] PIN din_a[176] @@ -3908,7 +3908,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 32.064 0.024 32.088 ; + RECT 0.000 32.064 0.036 32.088 ; END END din_a[176] PIN din_a[177] @@ -3917,7 +3917,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 32.112 0.024 32.136 ; + RECT 0.000 32.112 0.036 32.136 ; END END din_a[177] PIN din_a[178] @@ -3926,7 +3926,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 32.160 0.024 32.184 ; + RECT 0.000 32.160 0.036 32.184 ; END END din_a[178] PIN din_a[179] @@ -3935,7 +3935,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 32.208 0.024 32.232 ; + RECT 0.000 32.208 0.036 32.232 ; END END din_a[179] PIN din_a[180] @@ -3944,7 +3944,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 32.256 0.024 32.280 ; + RECT 0.000 32.256 0.036 32.280 ; END END din_a[180] PIN din_a[181] @@ -3953,7 +3953,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 32.304 0.024 32.328 ; + RECT 0.000 32.304 0.036 32.328 ; END END din_a[181] PIN din_a[182] @@ -3962,7 +3962,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 32.352 0.024 32.376 ; + RECT 0.000 32.352 0.036 32.376 ; END END din_a[182] PIN din_a[183] @@ -3971,7 +3971,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 32.400 0.024 32.424 ; + RECT 0.000 32.400 0.036 32.424 ; END END din_a[183] PIN din_a[184] @@ -3980,7 +3980,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 32.448 0.024 32.472 ; + RECT 0.000 32.448 0.036 32.472 ; END END din_a[184] PIN din_a[185] @@ -3989,7 +3989,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 32.496 0.024 32.520 ; + RECT 0.000 32.496 0.036 32.520 ; END END din_a[185] PIN din_a[186] @@ -3998,7 +3998,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 32.544 0.024 32.568 ; + RECT 0.000 32.544 0.036 32.568 ; END END din_a[186] PIN din_a[187] @@ -4007,7 +4007,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 32.592 0.024 32.616 ; + RECT 0.000 32.592 0.036 32.616 ; END END din_a[187] PIN din_a[188] @@ -4016,7 +4016,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 32.640 0.024 32.664 ; + RECT 0.000 32.640 0.036 32.664 ; END END din_a[188] PIN din_a[189] @@ -4025,7 +4025,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 32.688 0.024 32.712 ; + RECT 0.000 32.688 0.036 32.712 ; END END din_a[189] PIN din_a[190] @@ -4034,7 +4034,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 32.736 0.024 32.760 ; + RECT 0.000 32.736 0.036 32.760 ; END END din_a[190] PIN din_a[191] @@ -4043,7 +4043,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 32.784 0.024 32.808 ; + RECT 0.000 32.784 0.036 32.808 ; END END din_a[191] PIN din_a[192] @@ -4052,7 +4052,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 32.832 0.024 32.856 ; + RECT 0.000 32.832 0.036 32.856 ; END END din_a[192] PIN din_a[193] @@ -4061,7 +4061,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 32.880 0.024 32.904 ; + RECT 0.000 32.880 0.036 32.904 ; END END din_a[193] PIN din_a[194] @@ -4070,7 +4070,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 32.928 0.024 32.952 ; + RECT 0.000 32.928 0.036 32.952 ; END END din_a[194] PIN din_a[195] @@ -4079,7 +4079,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 32.976 0.024 33.000 ; + RECT 0.000 32.976 0.036 33.000 ; END END din_a[195] PIN din_a[196] @@ -4088,7 +4088,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 33.024 0.024 33.048 ; + RECT 0.000 33.024 0.036 33.048 ; END END din_a[196] PIN din_a[197] @@ -4097,7 +4097,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 33.072 0.024 33.096 ; + RECT 0.000 33.072 0.036 33.096 ; END END din_a[197] PIN din_a[198] @@ -4106,7 +4106,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 33.120 0.024 33.144 ; + RECT 0.000 33.120 0.036 33.144 ; END END din_a[198] PIN din_a[199] @@ -4115,7 +4115,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 33.168 0.024 33.192 ; + RECT 0.000 33.168 0.036 33.192 ; END END din_a[199] PIN din_a[200] @@ -4124,7 +4124,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 33.216 0.024 33.240 ; + RECT 0.000 33.216 0.036 33.240 ; END END din_a[200] PIN din_a[201] @@ -4133,7 +4133,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 33.264 0.024 33.288 ; + RECT 0.000 33.264 0.036 33.288 ; END END din_a[201] PIN din_a[202] @@ -4142,7 +4142,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 33.312 0.024 33.336 ; + RECT 0.000 33.312 0.036 33.336 ; END END din_a[202] PIN din_a[203] @@ -4151,7 +4151,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 33.360 0.024 33.384 ; + RECT 0.000 33.360 0.036 33.384 ; END END din_a[203] PIN din_a[204] @@ -4160,7 +4160,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 33.408 0.024 33.432 ; + RECT 0.000 33.408 0.036 33.432 ; END END din_a[204] PIN din_a[205] @@ -4169,7 +4169,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 33.456 0.024 33.480 ; + RECT 0.000 33.456 0.036 33.480 ; END END din_a[205] PIN din_a[206] @@ -4178,7 +4178,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 33.504 0.024 33.528 ; + RECT 0.000 33.504 0.036 33.528 ; END END din_a[206] PIN din_a[207] @@ -4187,7 +4187,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 33.552 0.024 33.576 ; + RECT 0.000 33.552 0.036 33.576 ; END END din_a[207] PIN din_a[208] @@ -4196,7 +4196,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 33.600 0.024 33.624 ; + RECT 0.000 33.600 0.036 33.624 ; END END din_a[208] PIN din_a[209] @@ -4205,7 +4205,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 33.648 0.024 33.672 ; + RECT 0.000 33.648 0.036 33.672 ; END END din_a[209] PIN din_a[210] @@ -4214,7 +4214,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 33.696 0.024 33.720 ; + RECT 0.000 33.696 0.036 33.720 ; END END din_a[210] PIN din_a[211] @@ -4223,7 +4223,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 33.744 0.024 33.768 ; + RECT 0.000 33.744 0.036 33.768 ; END END din_a[211] PIN din_a[212] @@ -4232,7 +4232,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 33.792 0.024 33.816 ; + RECT 0.000 33.792 0.036 33.816 ; END END din_a[212] PIN din_a[213] @@ -4241,7 +4241,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 33.840 0.024 33.864 ; + RECT 0.000 33.840 0.036 33.864 ; END END din_a[213] PIN din_a[214] @@ -4250,7 +4250,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 33.888 0.024 33.912 ; + RECT 0.000 33.888 0.036 33.912 ; END END din_a[214] PIN din_a[215] @@ -4259,7 +4259,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 33.936 0.024 33.960 ; + RECT 0.000 33.936 0.036 33.960 ; END END din_a[215] PIN din_a[216] @@ -4268,7 +4268,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 33.984 0.024 34.008 ; + RECT 0.000 33.984 0.036 34.008 ; END END din_a[216] PIN din_a[217] @@ -4277,7 +4277,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 34.032 0.024 34.056 ; + RECT 0.000 34.032 0.036 34.056 ; END END din_a[217] PIN din_a[218] @@ -4286,7 +4286,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 34.080 0.024 34.104 ; + RECT 0.000 34.080 0.036 34.104 ; END END din_a[218] PIN din_a[219] @@ -4295,7 +4295,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 34.128 0.024 34.152 ; + RECT 0.000 34.128 0.036 34.152 ; END END din_a[219] PIN din_a[220] @@ -4304,7 +4304,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 34.176 0.024 34.200 ; + RECT 0.000 34.176 0.036 34.200 ; END END din_a[220] PIN din_a[221] @@ -4313,7 +4313,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 34.224 0.024 34.248 ; + RECT 0.000 34.224 0.036 34.248 ; END END din_a[221] PIN din_a[222] @@ -4322,7 +4322,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 34.272 0.024 34.296 ; + RECT 0.000 34.272 0.036 34.296 ; END END din_a[222] PIN din_a[223] @@ -4331,7 +4331,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 34.320 0.024 34.344 ; + RECT 0.000 34.320 0.036 34.344 ; END END din_a[223] PIN din_a[224] @@ -4340,7 +4340,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 34.368 0.024 34.392 ; + RECT 0.000 34.368 0.036 34.392 ; END END din_a[224] PIN din_a[225] @@ -4349,7 +4349,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 34.416 0.024 34.440 ; + RECT 0.000 34.416 0.036 34.440 ; END END din_a[225] PIN din_a[226] @@ -4358,7 +4358,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 34.464 0.024 34.488 ; + RECT 0.000 34.464 0.036 34.488 ; END END din_a[226] PIN din_a[227] @@ -4367,7 +4367,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 34.512 0.024 34.536 ; + RECT 0.000 34.512 0.036 34.536 ; END END din_a[227] PIN din_a[228] @@ -4376,7 +4376,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 34.560 0.024 34.584 ; + RECT 0.000 34.560 0.036 34.584 ; END END din_a[228] PIN din_a[229] @@ -4385,7 +4385,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 34.608 0.024 34.632 ; + RECT 0.000 34.608 0.036 34.632 ; END END din_a[229] PIN din_a[230] @@ -4394,7 +4394,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 34.656 0.024 34.680 ; + RECT 0.000 34.656 0.036 34.680 ; END END din_a[230] PIN din_a[231] @@ -4403,7 +4403,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 34.704 0.024 34.728 ; + RECT 0.000 34.704 0.036 34.728 ; END END din_a[231] PIN din_a[232] @@ -4412,7 +4412,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 34.752 0.024 34.776 ; + RECT 0.000 34.752 0.036 34.776 ; END END din_a[232] PIN din_a[233] @@ -4421,7 +4421,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 34.800 0.024 34.824 ; + RECT 0.000 34.800 0.036 34.824 ; END END din_a[233] PIN din_a[234] @@ -4430,7 +4430,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 34.848 0.024 34.872 ; + RECT 0.000 34.848 0.036 34.872 ; END END din_a[234] PIN din_a[235] @@ -4439,7 +4439,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 34.896 0.024 34.920 ; + RECT 0.000 34.896 0.036 34.920 ; END END din_a[235] PIN din_a[236] @@ -4448,7 +4448,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 34.944 0.024 34.968 ; + RECT 0.000 34.944 0.036 34.968 ; END END din_a[236] PIN din_a[237] @@ -4457,7 +4457,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 34.992 0.024 35.016 ; + RECT 0.000 34.992 0.036 35.016 ; END END din_a[237] PIN din_a[238] @@ -4466,7 +4466,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 35.040 0.024 35.064 ; + RECT 0.000 35.040 0.036 35.064 ; END END din_a[238] PIN din_a[239] @@ -4475,7 +4475,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 35.088 0.024 35.112 ; + RECT 0.000 35.088 0.036 35.112 ; END END din_a[239] PIN din_a[240] @@ -4484,7 +4484,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 35.136 0.024 35.160 ; + RECT 0.000 35.136 0.036 35.160 ; END END din_a[240] PIN din_a[241] @@ -4493,7 +4493,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 35.184 0.024 35.208 ; + RECT 0.000 35.184 0.036 35.208 ; END END din_a[241] PIN din_a[242] @@ -4502,7 +4502,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 35.232 0.024 35.256 ; + RECT 0.000 35.232 0.036 35.256 ; END END din_a[242] PIN din_a[243] @@ -4511,7 +4511,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 35.280 0.024 35.304 ; + RECT 0.000 35.280 0.036 35.304 ; END END din_a[243] PIN din_a[244] @@ -4520,7 +4520,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 35.328 0.024 35.352 ; + RECT 0.000 35.328 0.036 35.352 ; END END din_a[244] PIN din_a[245] @@ -4529,7 +4529,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 35.376 0.024 35.400 ; + RECT 0.000 35.376 0.036 35.400 ; END END din_a[245] PIN din_a[246] @@ -4538,7 +4538,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 35.424 0.024 35.448 ; + RECT 0.000 35.424 0.036 35.448 ; END END din_a[246] PIN din_a[247] @@ -4547,7 +4547,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 35.472 0.024 35.496 ; + RECT 0.000 35.472 0.036 35.496 ; END END din_a[247] PIN din_a[248] @@ -4556,7 +4556,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 35.520 0.024 35.544 ; + RECT 0.000 35.520 0.036 35.544 ; END END din_a[248] PIN din_a[249] @@ -4565,7 +4565,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 35.568 0.024 35.592 ; + RECT 0.000 35.568 0.036 35.592 ; END END din_a[249] PIN din_a[250] @@ -4574,7 +4574,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 35.616 0.024 35.640 ; + RECT 0.000 35.616 0.036 35.640 ; END END din_a[250] PIN din_a[251] @@ -4583,7 +4583,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 35.664 0.024 35.688 ; + RECT 0.000 35.664 0.036 35.688 ; END END din_a[251] PIN din_a[252] @@ -4592,7 +4592,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 35.712 0.024 35.736 ; + RECT 0.000 35.712 0.036 35.736 ; END END din_a[252] PIN din_a[253] @@ -4601,7 +4601,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 35.760 0.024 35.784 ; + RECT 0.000 35.760 0.036 35.784 ; END END din_a[253] PIN din_a[254] @@ -4610,7 +4610,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 35.808 0.024 35.832 ; + RECT 0.000 35.808 0.036 35.832 ; END END din_a[254] PIN din_a[255] @@ -4619,7 +4619,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 35.856 0.024 35.880 ; + RECT 0.000 35.856 0.036 35.880 ; END END din_a[255] PIN addr_a[0] @@ -4628,7 +4628,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 47.184 0.024 47.208 ; + RECT 0.000 47.184 0.036 47.208 ; END END addr_a[0] PIN addr_a[1] @@ -4637,7 +4637,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 47.232 0.024 47.256 ; + RECT 0.000 47.232 0.036 47.256 ; END END addr_a[1] PIN addr_a[2] @@ -4646,7 +4646,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 47.280 0.024 47.304 ; + RECT 0.000 47.280 0.036 47.304 ; END END addr_a[2] PIN addr_a[3] @@ -4655,7 +4655,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 47.328 0.024 47.352 ; + RECT 0.000 47.328 0.036 47.352 ; END END addr_a[3] PIN addr_a[4] @@ -4664,7 +4664,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 47.376 0.024 47.400 ; + RECT 0.000 47.376 0.036 47.400 ; END END addr_a[4] PIN addr_a[5] @@ -4673,7 +4673,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 47.424 0.024 47.448 ; + RECT 0.000 47.424 0.036 47.448 ; END END addr_a[5] PIN addr_a[6] @@ -4682,7 +4682,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 47.472 0.024 47.496 ; + RECT 0.000 47.472 0.036 47.496 ; END END addr_a[6] PIN addr_a[7] @@ -4691,7 +4691,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 47.520 0.024 47.544 ; + RECT 0.000 47.520 0.036 47.544 ; END END addr_a[7] PIN dout_b[0] @@ -4700,7 +4700,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 58.848 0.024 58.872 ; + RECT 0.000 58.848 0.036 58.872 ; END END dout_b[0] PIN dout_b[1] @@ -4709,7 +4709,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 58.896 0.024 58.920 ; + RECT 0.000 58.896 0.036 58.920 ; END END dout_b[1] PIN dout_b[2] @@ -4718,7 +4718,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 58.944 0.024 58.968 ; + RECT 0.000 58.944 0.036 58.968 ; END END dout_b[2] PIN dout_b[3] @@ -4727,7 +4727,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 58.992 0.024 59.016 ; + RECT 0.000 58.992 0.036 59.016 ; END END dout_b[3] PIN dout_b[4] @@ -4736,7 +4736,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 59.040 0.024 59.064 ; + RECT 0.000 59.040 0.036 59.064 ; END END dout_b[4] PIN dout_b[5] @@ -4745,7 +4745,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 59.088 0.024 59.112 ; + RECT 0.000 59.088 0.036 59.112 ; END END dout_b[5] PIN dout_b[6] @@ -4754,7 +4754,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 59.136 0.024 59.160 ; + RECT 0.000 59.136 0.036 59.160 ; END END dout_b[6] PIN dout_b[7] @@ -4763,7 +4763,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 59.184 0.024 59.208 ; + RECT 0.000 59.184 0.036 59.208 ; END END dout_b[7] PIN dout_b[8] @@ -4772,7 +4772,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 59.232 0.024 59.256 ; + RECT 0.000 59.232 0.036 59.256 ; END END dout_b[8] PIN dout_b[9] @@ -4781,7 +4781,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 59.280 0.024 59.304 ; + RECT 0.000 59.280 0.036 59.304 ; END END dout_b[9] PIN dout_b[10] @@ -4790,7 +4790,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 59.328 0.024 59.352 ; + RECT 0.000 59.328 0.036 59.352 ; END END dout_b[10] PIN dout_b[11] @@ -4799,7 +4799,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 59.376 0.024 59.400 ; + RECT 0.000 59.376 0.036 59.400 ; END END dout_b[11] PIN dout_b[12] @@ -4808,7 +4808,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 59.424 0.024 59.448 ; + RECT 0.000 59.424 0.036 59.448 ; END END dout_b[12] PIN dout_b[13] @@ -4817,7 +4817,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 59.472 0.024 59.496 ; + RECT 0.000 59.472 0.036 59.496 ; END END dout_b[13] PIN dout_b[14] @@ -4826,7 +4826,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 59.520 0.024 59.544 ; + RECT 0.000 59.520 0.036 59.544 ; END END dout_b[14] PIN dout_b[15] @@ -4835,7 +4835,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 59.568 0.024 59.592 ; + RECT 0.000 59.568 0.036 59.592 ; END END dout_b[15] PIN dout_b[16] @@ -4844,7 +4844,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 59.616 0.024 59.640 ; + RECT 0.000 59.616 0.036 59.640 ; END END dout_b[16] PIN dout_b[17] @@ -4853,7 +4853,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 59.664 0.024 59.688 ; + RECT 0.000 59.664 0.036 59.688 ; END END dout_b[17] PIN dout_b[18] @@ -4862,7 +4862,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 59.712 0.024 59.736 ; + RECT 0.000 59.712 0.036 59.736 ; END END dout_b[18] PIN dout_b[19] @@ -4871,7 +4871,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 59.760 0.024 59.784 ; + RECT 0.000 59.760 0.036 59.784 ; END END dout_b[19] PIN dout_b[20] @@ -4880,7 +4880,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 59.808 0.024 59.832 ; + RECT 0.000 59.808 0.036 59.832 ; END END dout_b[20] PIN dout_b[21] @@ -4889,7 +4889,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 59.856 0.024 59.880 ; + RECT 0.000 59.856 0.036 59.880 ; END END dout_b[21] PIN dout_b[22] @@ -4898,7 +4898,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 59.904 0.024 59.928 ; + RECT 0.000 59.904 0.036 59.928 ; END END dout_b[22] PIN dout_b[23] @@ -4907,7 +4907,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 59.952 0.024 59.976 ; + RECT 0.000 59.952 0.036 59.976 ; END END dout_b[23] PIN dout_b[24] @@ -4916,7 +4916,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 60.000 0.024 60.024 ; + RECT 0.000 60.000 0.036 60.024 ; END END dout_b[24] PIN dout_b[25] @@ -4925,7 +4925,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 60.048 0.024 60.072 ; + RECT 0.000 60.048 0.036 60.072 ; END END dout_b[25] PIN dout_b[26] @@ -4934,7 +4934,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 60.096 0.024 60.120 ; + RECT 0.000 60.096 0.036 60.120 ; END END dout_b[26] PIN dout_b[27] @@ -4943,7 +4943,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 60.144 0.024 60.168 ; + RECT 0.000 60.144 0.036 60.168 ; END END dout_b[27] PIN dout_b[28] @@ -4952,7 +4952,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 60.192 0.024 60.216 ; + RECT 0.000 60.192 0.036 60.216 ; END END dout_b[28] PIN dout_b[29] @@ -4961,7 +4961,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 60.240 0.024 60.264 ; + RECT 0.000 60.240 0.036 60.264 ; END END dout_b[29] PIN dout_b[30] @@ -4970,7 +4970,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 60.288 0.024 60.312 ; + RECT 0.000 60.288 0.036 60.312 ; END END dout_b[30] PIN dout_b[31] @@ -4979,7 +4979,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 60.336 0.024 60.360 ; + RECT 0.000 60.336 0.036 60.360 ; END END dout_b[31] PIN dout_b[32] @@ -4988,7 +4988,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 60.384 0.024 60.408 ; + RECT 0.000 60.384 0.036 60.408 ; END END dout_b[32] PIN dout_b[33] @@ -4997,7 +4997,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 60.432 0.024 60.456 ; + RECT 0.000 60.432 0.036 60.456 ; END END dout_b[33] PIN dout_b[34] @@ -5006,7 +5006,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 60.480 0.024 60.504 ; + RECT 0.000 60.480 0.036 60.504 ; END END dout_b[34] PIN dout_b[35] @@ -5015,7 +5015,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 60.528 0.024 60.552 ; + RECT 0.000 60.528 0.036 60.552 ; END END dout_b[35] PIN dout_b[36] @@ -5024,7 +5024,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 60.576 0.024 60.600 ; + RECT 0.000 60.576 0.036 60.600 ; END END dout_b[36] PIN dout_b[37] @@ -5033,7 +5033,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 60.624 0.024 60.648 ; + RECT 0.000 60.624 0.036 60.648 ; END END dout_b[37] PIN dout_b[38] @@ -5042,7 +5042,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 60.672 0.024 60.696 ; + RECT 0.000 60.672 0.036 60.696 ; END END dout_b[38] PIN dout_b[39] @@ -5051,7 +5051,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 60.720 0.024 60.744 ; + RECT 0.000 60.720 0.036 60.744 ; END END dout_b[39] PIN dout_b[40] @@ -5060,7 +5060,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 60.768 0.024 60.792 ; + RECT 0.000 60.768 0.036 60.792 ; END END dout_b[40] PIN dout_b[41] @@ -5069,7 +5069,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 60.816 0.024 60.840 ; + RECT 0.000 60.816 0.036 60.840 ; END END dout_b[41] PIN dout_b[42] @@ -5078,7 +5078,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 60.864 0.024 60.888 ; + RECT 0.000 60.864 0.036 60.888 ; END END dout_b[42] PIN dout_b[43] @@ -5087,7 +5087,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 60.912 0.024 60.936 ; + RECT 0.000 60.912 0.036 60.936 ; END END dout_b[43] PIN dout_b[44] @@ -5096,7 +5096,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 60.960 0.024 60.984 ; + RECT 0.000 60.960 0.036 60.984 ; END END dout_b[44] PIN dout_b[45] @@ -5105,7 +5105,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 61.008 0.024 61.032 ; + RECT 0.000 61.008 0.036 61.032 ; END END dout_b[45] PIN dout_b[46] @@ -5114,7 +5114,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 61.056 0.024 61.080 ; + RECT 0.000 61.056 0.036 61.080 ; END END dout_b[46] PIN dout_b[47] @@ -5123,7 +5123,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 61.104 0.024 61.128 ; + RECT 0.000 61.104 0.036 61.128 ; END END dout_b[47] PIN dout_b[48] @@ -5132,7 +5132,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 61.152 0.024 61.176 ; + RECT 0.000 61.152 0.036 61.176 ; END END dout_b[48] PIN dout_b[49] @@ -5141,7 +5141,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 61.200 0.024 61.224 ; + RECT 0.000 61.200 0.036 61.224 ; END END dout_b[49] PIN dout_b[50] @@ -5150,7 +5150,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 61.248 0.024 61.272 ; + RECT 0.000 61.248 0.036 61.272 ; END END dout_b[50] PIN dout_b[51] @@ -5159,7 +5159,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 61.296 0.024 61.320 ; + RECT 0.000 61.296 0.036 61.320 ; END END dout_b[51] PIN dout_b[52] @@ -5168,7 +5168,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 61.344 0.024 61.368 ; + RECT 0.000 61.344 0.036 61.368 ; END END dout_b[52] PIN dout_b[53] @@ -5177,7 +5177,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 61.392 0.024 61.416 ; + RECT 0.000 61.392 0.036 61.416 ; END END dout_b[53] PIN dout_b[54] @@ -5186,7 +5186,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 61.440 0.024 61.464 ; + RECT 0.000 61.440 0.036 61.464 ; END END dout_b[54] PIN dout_b[55] @@ -5195,7 +5195,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 61.488 0.024 61.512 ; + RECT 0.000 61.488 0.036 61.512 ; END END dout_b[55] PIN dout_b[56] @@ -5204,7 +5204,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 61.536 0.024 61.560 ; + RECT 0.000 61.536 0.036 61.560 ; END END dout_b[56] PIN dout_b[57] @@ -5213,7 +5213,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 61.584 0.024 61.608 ; + RECT 0.000 61.584 0.036 61.608 ; END END dout_b[57] PIN dout_b[58] @@ -5222,7 +5222,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 61.632 0.024 61.656 ; + RECT 0.000 61.632 0.036 61.656 ; END END dout_b[58] PIN dout_b[59] @@ -5231,7 +5231,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 61.680 0.024 61.704 ; + RECT 0.000 61.680 0.036 61.704 ; END END dout_b[59] PIN dout_b[60] @@ -5240,7 +5240,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 61.728 0.024 61.752 ; + RECT 0.000 61.728 0.036 61.752 ; END END dout_b[60] PIN dout_b[61] @@ -5249,7 +5249,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 61.776 0.024 61.800 ; + RECT 0.000 61.776 0.036 61.800 ; END END dout_b[61] PIN dout_b[62] @@ -5258,7 +5258,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 61.824 0.024 61.848 ; + RECT 0.000 61.824 0.036 61.848 ; END END dout_b[62] PIN dout_b[63] @@ -5267,7 +5267,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 61.872 0.024 61.896 ; + RECT 0.000 61.872 0.036 61.896 ; END END dout_b[63] PIN dout_b[64] @@ -5276,7 +5276,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 61.920 0.024 61.944 ; + RECT 0.000 61.920 0.036 61.944 ; END END dout_b[64] PIN dout_b[65] @@ -5285,7 +5285,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 61.968 0.024 61.992 ; + RECT 0.000 61.968 0.036 61.992 ; END END dout_b[65] PIN dout_b[66] @@ -5294,7 +5294,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 62.016 0.024 62.040 ; + RECT 0.000 62.016 0.036 62.040 ; END END dout_b[66] PIN dout_b[67] @@ -5303,7 +5303,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 62.064 0.024 62.088 ; + RECT 0.000 62.064 0.036 62.088 ; END END dout_b[67] PIN dout_b[68] @@ -5312,7 +5312,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 62.112 0.024 62.136 ; + RECT 0.000 62.112 0.036 62.136 ; END END dout_b[68] PIN dout_b[69] @@ -5321,7 +5321,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 62.160 0.024 62.184 ; + RECT 0.000 62.160 0.036 62.184 ; END END dout_b[69] PIN dout_b[70] @@ -5330,7 +5330,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 62.208 0.024 62.232 ; + RECT 0.000 62.208 0.036 62.232 ; END END dout_b[70] PIN dout_b[71] @@ -5339,7 +5339,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 62.256 0.024 62.280 ; + RECT 0.000 62.256 0.036 62.280 ; END END dout_b[71] PIN dout_b[72] @@ -5348,7 +5348,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 62.304 0.024 62.328 ; + RECT 0.000 62.304 0.036 62.328 ; END END dout_b[72] PIN dout_b[73] @@ -5357,7 +5357,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 62.352 0.024 62.376 ; + RECT 0.000 62.352 0.036 62.376 ; END END dout_b[73] PIN dout_b[74] @@ -5366,7 +5366,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 62.400 0.024 62.424 ; + RECT 0.000 62.400 0.036 62.424 ; END END dout_b[74] PIN dout_b[75] @@ -5375,7 +5375,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 62.448 0.024 62.472 ; + RECT 0.000 62.448 0.036 62.472 ; END END dout_b[75] PIN dout_b[76] @@ -5384,7 +5384,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 62.496 0.024 62.520 ; + RECT 0.000 62.496 0.036 62.520 ; END END dout_b[76] PIN dout_b[77] @@ -5393,7 +5393,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 62.544 0.024 62.568 ; + RECT 0.000 62.544 0.036 62.568 ; END END dout_b[77] PIN dout_b[78] @@ -5402,7 +5402,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 62.592 0.024 62.616 ; + RECT 0.000 62.592 0.036 62.616 ; END END dout_b[78] PIN dout_b[79] @@ -5411,7 +5411,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 62.640 0.024 62.664 ; + RECT 0.000 62.640 0.036 62.664 ; END END dout_b[79] PIN dout_b[80] @@ -5420,7 +5420,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 62.688 0.024 62.712 ; + RECT 0.000 62.688 0.036 62.712 ; END END dout_b[80] PIN dout_b[81] @@ -5429,7 +5429,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 62.736 0.024 62.760 ; + RECT 0.000 62.736 0.036 62.760 ; END END dout_b[81] PIN dout_b[82] @@ -5438,7 +5438,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 62.784 0.024 62.808 ; + RECT 0.000 62.784 0.036 62.808 ; END END dout_b[82] PIN dout_b[83] @@ -5447,7 +5447,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 62.832 0.024 62.856 ; + RECT 0.000 62.832 0.036 62.856 ; END END dout_b[83] PIN dout_b[84] @@ -5456,7 +5456,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 62.880 0.024 62.904 ; + RECT 0.000 62.880 0.036 62.904 ; END END dout_b[84] PIN dout_b[85] @@ -5465,7 +5465,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 62.928 0.024 62.952 ; + RECT 0.000 62.928 0.036 62.952 ; END END dout_b[85] PIN dout_b[86] @@ -5474,7 +5474,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 62.976 0.024 63.000 ; + RECT 0.000 62.976 0.036 63.000 ; END END dout_b[86] PIN dout_b[87] @@ -5483,7 +5483,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 63.024 0.024 63.048 ; + RECT 0.000 63.024 0.036 63.048 ; END END dout_b[87] PIN dout_b[88] @@ -5492,7 +5492,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 63.072 0.024 63.096 ; + RECT 0.000 63.072 0.036 63.096 ; END END dout_b[88] PIN dout_b[89] @@ -5501,7 +5501,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 63.120 0.024 63.144 ; + RECT 0.000 63.120 0.036 63.144 ; END END dout_b[89] PIN dout_b[90] @@ -5510,7 +5510,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 63.168 0.024 63.192 ; + RECT 0.000 63.168 0.036 63.192 ; END END dout_b[90] PIN dout_b[91] @@ -5519,7 +5519,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 63.216 0.024 63.240 ; + RECT 0.000 63.216 0.036 63.240 ; END END dout_b[91] PIN dout_b[92] @@ -5528,7 +5528,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 63.264 0.024 63.288 ; + RECT 0.000 63.264 0.036 63.288 ; END END dout_b[92] PIN dout_b[93] @@ -5537,7 +5537,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 63.312 0.024 63.336 ; + RECT 0.000 63.312 0.036 63.336 ; END END dout_b[93] PIN dout_b[94] @@ -5546,7 +5546,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 63.360 0.024 63.384 ; + RECT 0.000 63.360 0.036 63.384 ; END END dout_b[94] PIN dout_b[95] @@ -5555,7 +5555,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 63.408 0.024 63.432 ; + RECT 0.000 63.408 0.036 63.432 ; END END dout_b[95] PIN dout_b[96] @@ -5564,7 +5564,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 63.456 0.024 63.480 ; + RECT 0.000 63.456 0.036 63.480 ; END END dout_b[96] PIN dout_b[97] @@ -5573,7 +5573,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 63.504 0.024 63.528 ; + RECT 0.000 63.504 0.036 63.528 ; END END dout_b[97] PIN dout_b[98] @@ -5582,7 +5582,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 63.552 0.024 63.576 ; + RECT 0.000 63.552 0.036 63.576 ; END END dout_b[98] PIN dout_b[99] @@ -5591,7 +5591,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 63.600 0.024 63.624 ; + RECT 0.000 63.600 0.036 63.624 ; END END dout_b[99] PIN dout_b[100] @@ -5600,7 +5600,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 63.648 0.024 63.672 ; + RECT 0.000 63.648 0.036 63.672 ; END END dout_b[100] PIN dout_b[101] @@ -5609,7 +5609,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 63.696 0.024 63.720 ; + RECT 0.000 63.696 0.036 63.720 ; END END dout_b[101] PIN dout_b[102] @@ -5618,7 +5618,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 63.744 0.024 63.768 ; + RECT 0.000 63.744 0.036 63.768 ; END END dout_b[102] PIN dout_b[103] @@ -5627,7 +5627,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 63.792 0.024 63.816 ; + RECT 0.000 63.792 0.036 63.816 ; END END dout_b[103] PIN dout_b[104] @@ -5636,7 +5636,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 63.840 0.024 63.864 ; + RECT 0.000 63.840 0.036 63.864 ; END END dout_b[104] PIN dout_b[105] @@ -5645,7 +5645,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 63.888 0.024 63.912 ; + RECT 0.000 63.888 0.036 63.912 ; END END dout_b[105] PIN dout_b[106] @@ -5654,7 +5654,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 63.936 0.024 63.960 ; + RECT 0.000 63.936 0.036 63.960 ; END END dout_b[106] PIN dout_b[107] @@ -5663,7 +5663,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 63.984 0.024 64.008 ; + RECT 0.000 63.984 0.036 64.008 ; END END dout_b[107] PIN dout_b[108] @@ -5672,7 +5672,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 64.032 0.024 64.056 ; + RECT 0.000 64.032 0.036 64.056 ; END END dout_b[108] PIN dout_b[109] @@ -5681,7 +5681,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 64.080 0.024 64.104 ; + RECT 0.000 64.080 0.036 64.104 ; END END dout_b[109] PIN dout_b[110] @@ -5690,7 +5690,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 64.128 0.024 64.152 ; + RECT 0.000 64.128 0.036 64.152 ; END END dout_b[110] PIN dout_b[111] @@ -5699,7 +5699,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 64.176 0.024 64.200 ; + RECT 0.000 64.176 0.036 64.200 ; END END dout_b[111] PIN dout_b[112] @@ -5708,7 +5708,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 64.224 0.024 64.248 ; + RECT 0.000 64.224 0.036 64.248 ; END END dout_b[112] PIN dout_b[113] @@ -5717,7 +5717,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 64.272 0.024 64.296 ; + RECT 0.000 64.272 0.036 64.296 ; END END dout_b[113] PIN dout_b[114] @@ -5726,7 +5726,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 64.320 0.024 64.344 ; + RECT 0.000 64.320 0.036 64.344 ; END END dout_b[114] PIN dout_b[115] @@ -5735,7 +5735,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 64.368 0.024 64.392 ; + RECT 0.000 64.368 0.036 64.392 ; END END dout_b[115] PIN dout_b[116] @@ -5744,7 +5744,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 64.416 0.024 64.440 ; + RECT 0.000 64.416 0.036 64.440 ; END END dout_b[116] PIN dout_b[117] @@ -5753,7 +5753,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 64.464 0.024 64.488 ; + RECT 0.000 64.464 0.036 64.488 ; END END dout_b[117] PIN dout_b[118] @@ -5762,7 +5762,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 64.512 0.024 64.536 ; + RECT 0.000 64.512 0.036 64.536 ; END END dout_b[118] PIN dout_b[119] @@ -5771,7 +5771,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 64.560 0.024 64.584 ; + RECT 0.000 64.560 0.036 64.584 ; END END dout_b[119] PIN dout_b[120] @@ -5780,7 +5780,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 64.608 0.024 64.632 ; + RECT 0.000 64.608 0.036 64.632 ; END END dout_b[120] PIN dout_b[121] @@ -5789,7 +5789,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 64.656 0.024 64.680 ; + RECT 0.000 64.656 0.036 64.680 ; END END dout_b[121] PIN dout_b[122] @@ -5798,7 +5798,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 64.704 0.024 64.728 ; + RECT 0.000 64.704 0.036 64.728 ; END END dout_b[122] PIN dout_b[123] @@ -5807,7 +5807,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 64.752 0.024 64.776 ; + RECT 0.000 64.752 0.036 64.776 ; END END dout_b[123] PIN dout_b[124] @@ -5816,7 +5816,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 64.800 0.024 64.824 ; + RECT 0.000 64.800 0.036 64.824 ; END END dout_b[124] PIN dout_b[125] @@ -5825,7 +5825,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 64.848 0.024 64.872 ; + RECT 0.000 64.848 0.036 64.872 ; END END dout_b[125] PIN dout_b[126] @@ -5834,7 +5834,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 64.896 0.024 64.920 ; + RECT 0.000 64.896 0.036 64.920 ; END END dout_b[126] PIN dout_b[127] @@ -5843,7 +5843,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 64.944 0.024 64.968 ; + RECT 0.000 64.944 0.036 64.968 ; END END dout_b[127] PIN dout_b[128] @@ -5852,7 +5852,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 64.992 0.024 65.016 ; + RECT 0.000 64.992 0.036 65.016 ; END END dout_b[128] PIN dout_b[129] @@ -5861,7 +5861,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 65.040 0.024 65.064 ; + RECT 0.000 65.040 0.036 65.064 ; END END dout_b[129] PIN dout_b[130] @@ -5870,7 +5870,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 65.088 0.024 65.112 ; + RECT 0.000 65.088 0.036 65.112 ; END END dout_b[130] PIN dout_b[131] @@ -5879,7 +5879,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 65.136 0.024 65.160 ; + RECT 0.000 65.136 0.036 65.160 ; END END dout_b[131] PIN dout_b[132] @@ -5888,7 +5888,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 65.184 0.024 65.208 ; + RECT 0.000 65.184 0.036 65.208 ; END END dout_b[132] PIN dout_b[133] @@ -5897,7 +5897,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 65.232 0.024 65.256 ; + RECT 0.000 65.232 0.036 65.256 ; END END dout_b[133] PIN dout_b[134] @@ -5906,7 +5906,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 65.280 0.024 65.304 ; + RECT 0.000 65.280 0.036 65.304 ; END END dout_b[134] PIN dout_b[135] @@ -5915,7 +5915,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 65.328 0.024 65.352 ; + RECT 0.000 65.328 0.036 65.352 ; END END dout_b[135] PIN dout_b[136] @@ -5924,7 +5924,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 65.376 0.024 65.400 ; + RECT 0.000 65.376 0.036 65.400 ; END END dout_b[136] PIN dout_b[137] @@ -5933,7 +5933,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 65.424 0.024 65.448 ; + RECT 0.000 65.424 0.036 65.448 ; END END dout_b[137] PIN dout_b[138] @@ -5942,7 +5942,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 65.472 0.024 65.496 ; + RECT 0.000 65.472 0.036 65.496 ; END END dout_b[138] PIN dout_b[139] @@ -5951,7 +5951,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 65.520 0.024 65.544 ; + RECT 0.000 65.520 0.036 65.544 ; END END dout_b[139] PIN dout_b[140] @@ -5960,7 +5960,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 65.568 0.024 65.592 ; + RECT 0.000 65.568 0.036 65.592 ; END END dout_b[140] PIN dout_b[141] @@ -5969,7 +5969,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 65.616 0.024 65.640 ; + RECT 0.000 65.616 0.036 65.640 ; END END dout_b[141] PIN dout_b[142] @@ -5978,7 +5978,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 65.664 0.024 65.688 ; + RECT 0.000 65.664 0.036 65.688 ; END END dout_b[142] PIN dout_b[143] @@ -5987,7 +5987,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 65.712 0.024 65.736 ; + RECT 0.000 65.712 0.036 65.736 ; END END dout_b[143] PIN dout_b[144] @@ -5996,7 +5996,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 65.760 0.024 65.784 ; + RECT 0.000 65.760 0.036 65.784 ; END END dout_b[144] PIN dout_b[145] @@ -6005,7 +6005,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 65.808 0.024 65.832 ; + RECT 0.000 65.808 0.036 65.832 ; END END dout_b[145] PIN dout_b[146] @@ -6014,7 +6014,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 65.856 0.024 65.880 ; + RECT 0.000 65.856 0.036 65.880 ; END END dout_b[146] PIN dout_b[147] @@ -6023,7 +6023,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 65.904 0.024 65.928 ; + RECT 0.000 65.904 0.036 65.928 ; END END dout_b[147] PIN dout_b[148] @@ -6032,7 +6032,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 65.952 0.024 65.976 ; + RECT 0.000 65.952 0.036 65.976 ; END END dout_b[148] PIN dout_b[149] @@ -6041,7 +6041,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 66.000 0.024 66.024 ; + RECT 0.000 66.000 0.036 66.024 ; END END dout_b[149] PIN dout_b[150] @@ -6050,7 +6050,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 66.048 0.024 66.072 ; + RECT 0.000 66.048 0.036 66.072 ; END END dout_b[150] PIN dout_b[151] @@ -6059,7 +6059,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 66.096 0.024 66.120 ; + RECT 0.000 66.096 0.036 66.120 ; END END dout_b[151] PIN dout_b[152] @@ -6068,7 +6068,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 66.144 0.024 66.168 ; + RECT 0.000 66.144 0.036 66.168 ; END END dout_b[152] PIN dout_b[153] @@ -6077,7 +6077,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 66.192 0.024 66.216 ; + RECT 0.000 66.192 0.036 66.216 ; END END dout_b[153] PIN dout_b[154] @@ -6086,7 +6086,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 66.240 0.024 66.264 ; + RECT 0.000 66.240 0.036 66.264 ; END END dout_b[154] PIN dout_b[155] @@ -6095,7 +6095,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 66.288 0.024 66.312 ; + RECT 0.000 66.288 0.036 66.312 ; END END dout_b[155] PIN dout_b[156] @@ -6104,7 +6104,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 66.336 0.024 66.360 ; + RECT 0.000 66.336 0.036 66.360 ; END END dout_b[156] PIN dout_b[157] @@ -6113,7 +6113,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 66.384 0.024 66.408 ; + RECT 0.000 66.384 0.036 66.408 ; END END dout_b[157] PIN dout_b[158] @@ -6122,7 +6122,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 66.432 0.024 66.456 ; + RECT 0.000 66.432 0.036 66.456 ; END END dout_b[158] PIN dout_b[159] @@ -6131,7 +6131,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 66.480 0.024 66.504 ; + RECT 0.000 66.480 0.036 66.504 ; END END dout_b[159] PIN dout_b[160] @@ -6140,7 +6140,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 66.528 0.024 66.552 ; + RECT 0.000 66.528 0.036 66.552 ; END END dout_b[160] PIN dout_b[161] @@ -6149,7 +6149,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 66.576 0.024 66.600 ; + RECT 0.000 66.576 0.036 66.600 ; END END dout_b[161] PIN dout_b[162] @@ -6158,7 +6158,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 66.624 0.024 66.648 ; + RECT 0.000 66.624 0.036 66.648 ; END END dout_b[162] PIN dout_b[163] @@ -6167,7 +6167,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 66.672 0.024 66.696 ; + RECT 0.000 66.672 0.036 66.696 ; END END dout_b[163] PIN dout_b[164] @@ -6176,7 +6176,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 66.720 0.024 66.744 ; + RECT 0.000 66.720 0.036 66.744 ; END END dout_b[164] PIN dout_b[165] @@ -6185,7 +6185,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 66.768 0.024 66.792 ; + RECT 0.000 66.768 0.036 66.792 ; END END dout_b[165] PIN dout_b[166] @@ -6194,7 +6194,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 66.816 0.024 66.840 ; + RECT 0.000 66.816 0.036 66.840 ; END END dout_b[166] PIN dout_b[167] @@ -6203,7 +6203,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 66.864 0.024 66.888 ; + RECT 0.000 66.864 0.036 66.888 ; END END dout_b[167] PIN dout_b[168] @@ -6212,7 +6212,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 66.912 0.024 66.936 ; + RECT 0.000 66.912 0.036 66.936 ; END END dout_b[168] PIN dout_b[169] @@ -6221,7 +6221,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 66.960 0.024 66.984 ; + RECT 0.000 66.960 0.036 66.984 ; END END dout_b[169] PIN dout_b[170] @@ -6230,7 +6230,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 67.008 0.024 67.032 ; + RECT 0.000 67.008 0.036 67.032 ; END END dout_b[170] PIN dout_b[171] @@ -6239,7 +6239,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 67.056 0.024 67.080 ; + RECT 0.000 67.056 0.036 67.080 ; END END dout_b[171] PIN dout_b[172] @@ -6248,7 +6248,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 67.104 0.024 67.128 ; + RECT 0.000 67.104 0.036 67.128 ; END END dout_b[172] PIN dout_b[173] @@ -6257,7 +6257,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 67.152 0.024 67.176 ; + RECT 0.000 67.152 0.036 67.176 ; END END dout_b[173] PIN dout_b[174] @@ -6266,7 +6266,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 67.200 0.024 67.224 ; + RECT 0.000 67.200 0.036 67.224 ; END END dout_b[174] PIN dout_b[175] @@ -6275,7 +6275,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 67.248 0.024 67.272 ; + RECT 0.000 67.248 0.036 67.272 ; END END dout_b[175] PIN dout_b[176] @@ -6284,7 +6284,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 67.296 0.024 67.320 ; + RECT 0.000 67.296 0.036 67.320 ; END END dout_b[176] PIN dout_b[177] @@ -6293,7 +6293,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 67.344 0.024 67.368 ; + RECT 0.000 67.344 0.036 67.368 ; END END dout_b[177] PIN dout_b[178] @@ -6302,7 +6302,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 67.392 0.024 67.416 ; + RECT 0.000 67.392 0.036 67.416 ; END END dout_b[178] PIN dout_b[179] @@ -6311,7 +6311,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 67.440 0.024 67.464 ; + RECT 0.000 67.440 0.036 67.464 ; END END dout_b[179] PIN dout_b[180] @@ -6320,7 +6320,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 67.488 0.024 67.512 ; + RECT 0.000 67.488 0.036 67.512 ; END END dout_b[180] PIN dout_b[181] @@ -6329,7 +6329,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 67.536 0.024 67.560 ; + RECT 0.000 67.536 0.036 67.560 ; END END dout_b[181] PIN dout_b[182] @@ -6338,7 +6338,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 67.584 0.024 67.608 ; + RECT 0.000 67.584 0.036 67.608 ; END END dout_b[182] PIN dout_b[183] @@ -6347,7 +6347,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 67.632 0.024 67.656 ; + RECT 0.000 67.632 0.036 67.656 ; END END dout_b[183] PIN dout_b[184] @@ -6356,7 +6356,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 67.680 0.024 67.704 ; + RECT 0.000 67.680 0.036 67.704 ; END END dout_b[184] PIN dout_b[185] @@ -6365,7 +6365,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 67.728 0.024 67.752 ; + RECT 0.000 67.728 0.036 67.752 ; END END dout_b[185] PIN dout_b[186] @@ -6374,7 +6374,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 67.776 0.024 67.800 ; + RECT 0.000 67.776 0.036 67.800 ; END END dout_b[186] PIN dout_b[187] @@ -6383,7 +6383,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 67.824 0.024 67.848 ; + RECT 0.000 67.824 0.036 67.848 ; END END dout_b[187] PIN dout_b[188] @@ -6392,7 +6392,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 67.872 0.024 67.896 ; + RECT 0.000 67.872 0.036 67.896 ; END END dout_b[188] PIN dout_b[189] @@ -6401,7 +6401,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 67.920 0.024 67.944 ; + RECT 0.000 67.920 0.036 67.944 ; END END dout_b[189] PIN dout_b[190] @@ -6410,7 +6410,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 67.968 0.024 67.992 ; + RECT 0.000 67.968 0.036 67.992 ; END END dout_b[190] PIN dout_b[191] @@ -6419,7 +6419,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 68.016 0.024 68.040 ; + RECT 0.000 68.016 0.036 68.040 ; END END dout_b[191] PIN dout_b[192] @@ -6428,7 +6428,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 68.064 0.024 68.088 ; + RECT 0.000 68.064 0.036 68.088 ; END END dout_b[192] PIN dout_b[193] @@ -6437,7 +6437,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 68.112 0.024 68.136 ; + RECT 0.000 68.112 0.036 68.136 ; END END dout_b[193] PIN dout_b[194] @@ -6446,7 +6446,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 68.160 0.024 68.184 ; + RECT 0.000 68.160 0.036 68.184 ; END END dout_b[194] PIN dout_b[195] @@ -6455,7 +6455,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 68.208 0.024 68.232 ; + RECT 0.000 68.208 0.036 68.232 ; END END dout_b[195] PIN dout_b[196] @@ -6464,7 +6464,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 68.256 0.024 68.280 ; + RECT 0.000 68.256 0.036 68.280 ; END END dout_b[196] PIN dout_b[197] @@ -6473,7 +6473,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 68.304 0.024 68.328 ; + RECT 0.000 68.304 0.036 68.328 ; END END dout_b[197] PIN dout_b[198] @@ -6482,7 +6482,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 68.352 0.024 68.376 ; + RECT 0.000 68.352 0.036 68.376 ; END END dout_b[198] PIN dout_b[199] @@ -6491,7 +6491,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 68.400 0.024 68.424 ; + RECT 0.000 68.400 0.036 68.424 ; END END dout_b[199] PIN dout_b[200] @@ -6500,7 +6500,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 68.448 0.024 68.472 ; + RECT 0.000 68.448 0.036 68.472 ; END END dout_b[200] PIN dout_b[201] @@ -6509,7 +6509,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 68.496 0.024 68.520 ; + RECT 0.000 68.496 0.036 68.520 ; END END dout_b[201] PIN dout_b[202] @@ -6518,7 +6518,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 68.544 0.024 68.568 ; + RECT 0.000 68.544 0.036 68.568 ; END END dout_b[202] PIN dout_b[203] @@ -6527,7 +6527,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 68.592 0.024 68.616 ; + RECT 0.000 68.592 0.036 68.616 ; END END dout_b[203] PIN dout_b[204] @@ -6536,7 +6536,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 68.640 0.024 68.664 ; + RECT 0.000 68.640 0.036 68.664 ; END END dout_b[204] PIN dout_b[205] @@ -6545,7 +6545,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 68.688 0.024 68.712 ; + RECT 0.000 68.688 0.036 68.712 ; END END dout_b[205] PIN dout_b[206] @@ -6554,7 +6554,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 68.736 0.024 68.760 ; + RECT 0.000 68.736 0.036 68.760 ; END END dout_b[206] PIN dout_b[207] @@ -6563,7 +6563,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 68.784 0.024 68.808 ; + RECT 0.000 68.784 0.036 68.808 ; END END dout_b[207] PIN dout_b[208] @@ -6572,7 +6572,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 68.832 0.024 68.856 ; + RECT 0.000 68.832 0.036 68.856 ; END END dout_b[208] PIN dout_b[209] @@ -6581,7 +6581,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 68.880 0.024 68.904 ; + RECT 0.000 68.880 0.036 68.904 ; END END dout_b[209] PIN dout_b[210] @@ -6590,7 +6590,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 68.928 0.024 68.952 ; + RECT 0.000 68.928 0.036 68.952 ; END END dout_b[210] PIN dout_b[211] @@ -6599,7 +6599,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 68.976 0.024 69.000 ; + RECT 0.000 68.976 0.036 69.000 ; END END dout_b[211] PIN dout_b[212] @@ -6608,7 +6608,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 69.024 0.024 69.048 ; + RECT 0.000 69.024 0.036 69.048 ; END END dout_b[212] PIN dout_b[213] @@ -6617,7 +6617,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 69.072 0.024 69.096 ; + RECT 0.000 69.072 0.036 69.096 ; END END dout_b[213] PIN dout_b[214] @@ -6626,7 +6626,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 69.120 0.024 69.144 ; + RECT 0.000 69.120 0.036 69.144 ; END END dout_b[214] PIN dout_b[215] @@ -6635,7 +6635,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 69.168 0.024 69.192 ; + RECT 0.000 69.168 0.036 69.192 ; END END dout_b[215] PIN dout_b[216] @@ -6644,7 +6644,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 69.216 0.024 69.240 ; + RECT 0.000 69.216 0.036 69.240 ; END END dout_b[216] PIN dout_b[217] @@ -6653,7 +6653,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 69.264 0.024 69.288 ; + RECT 0.000 69.264 0.036 69.288 ; END END dout_b[217] PIN dout_b[218] @@ -6662,7 +6662,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 69.312 0.024 69.336 ; + RECT 0.000 69.312 0.036 69.336 ; END END dout_b[218] PIN dout_b[219] @@ -6671,7 +6671,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 69.360 0.024 69.384 ; + RECT 0.000 69.360 0.036 69.384 ; END END dout_b[219] PIN dout_b[220] @@ -6680,7 +6680,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 69.408 0.024 69.432 ; + RECT 0.000 69.408 0.036 69.432 ; END END dout_b[220] PIN dout_b[221] @@ -6689,7 +6689,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 69.456 0.024 69.480 ; + RECT 0.000 69.456 0.036 69.480 ; END END dout_b[221] PIN dout_b[222] @@ -6698,7 +6698,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 69.504 0.024 69.528 ; + RECT 0.000 69.504 0.036 69.528 ; END END dout_b[222] PIN dout_b[223] @@ -6707,7 +6707,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 69.552 0.024 69.576 ; + RECT 0.000 69.552 0.036 69.576 ; END END dout_b[223] PIN dout_b[224] @@ -6716,7 +6716,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 69.600 0.024 69.624 ; + RECT 0.000 69.600 0.036 69.624 ; END END dout_b[224] PIN dout_b[225] @@ -6725,7 +6725,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 69.648 0.024 69.672 ; + RECT 0.000 69.648 0.036 69.672 ; END END dout_b[225] PIN dout_b[226] @@ -6734,7 +6734,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 69.696 0.024 69.720 ; + RECT 0.000 69.696 0.036 69.720 ; END END dout_b[226] PIN dout_b[227] @@ -6743,7 +6743,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 69.744 0.024 69.768 ; + RECT 0.000 69.744 0.036 69.768 ; END END dout_b[227] PIN dout_b[228] @@ -6752,7 +6752,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 69.792 0.024 69.816 ; + RECT 0.000 69.792 0.036 69.816 ; END END dout_b[228] PIN dout_b[229] @@ -6761,7 +6761,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 69.840 0.024 69.864 ; + RECT 0.000 69.840 0.036 69.864 ; END END dout_b[229] PIN dout_b[230] @@ -6770,7 +6770,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 69.888 0.024 69.912 ; + RECT 0.000 69.888 0.036 69.912 ; END END dout_b[230] PIN dout_b[231] @@ -6779,7 +6779,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 69.936 0.024 69.960 ; + RECT 0.000 69.936 0.036 69.960 ; END END dout_b[231] PIN dout_b[232] @@ -6788,7 +6788,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 69.984 0.024 70.008 ; + RECT 0.000 69.984 0.036 70.008 ; END END dout_b[232] PIN dout_b[233] @@ -6797,7 +6797,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 70.032 0.024 70.056 ; + RECT 0.000 70.032 0.036 70.056 ; END END dout_b[233] PIN dout_b[234] @@ -6806,7 +6806,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 70.080 0.024 70.104 ; + RECT 0.000 70.080 0.036 70.104 ; END END dout_b[234] PIN dout_b[235] @@ -6815,7 +6815,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 70.128 0.024 70.152 ; + RECT 0.000 70.128 0.036 70.152 ; END END dout_b[235] PIN dout_b[236] @@ -6824,7 +6824,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 70.176 0.024 70.200 ; + RECT 0.000 70.176 0.036 70.200 ; END END dout_b[236] PIN dout_b[237] @@ -6833,7 +6833,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 70.224 0.024 70.248 ; + RECT 0.000 70.224 0.036 70.248 ; END END dout_b[237] PIN dout_b[238] @@ -6842,7 +6842,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 70.272 0.024 70.296 ; + RECT 0.000 70.272 0.036 70.296 ; END END dout_b[238] PIN dout_b[239] @@ -6851,7 +6851,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 70.320 0.024 70.344 ; + RECT 0.000 70.320 0.036 70.344 ; END END dout_b[239] PIN dout_b[240] @@ -6860,7 +6860,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 70.368 0.024 70.392 ; + RECT 0.000 70.368 0.036 70.392 ; END END dout_b[240] PIN dout_b[241] @@ -6869,7 +6869,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 70.416 0.024 70.440 ; + RECT 0.000 70.416 0.036 70.440 ; END END dout_b[241] PIN dout_b[242] @@ -6878,7 +6878,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 70.464 0.024 70.488 ; + RECT 0.000 70.464 0.036 70.488 ; END END dout_b[242] PIN dout_b[243] @@ -6887,7 +6887,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 70.512 0.024 70.536 ; + RECT 0.000 70.512 0.036 70.536 ; END END dout_b[243] PIN dout_b[244] @@ -6896,7 +6896,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 70.560 0.024 70.584 ; + RECT 0.000 70.560 0.036 70.584 ; END END dout_b[244] PIN dout_b[245] @@ -6905,7 +6905,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 70.608 0.024 70.632 ; + RECT 0.000 70.608 0.036 70.632 ; END END dout_b[245] PIN dout_b[246] @@ -6914,7 +6914,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 70.656 0.024 70.680 ; + RECT 0.000 70.656 0.036 70.680 ; END END dout_b[246] PIN dout_b[247] @@ -6923,7 +6923,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 70.704 0.024 70.728 ; + RECT 0.000 70.704 0.036 70.728 ; END END dout_b[247] PIN dout_b[248] @@ -6932,7 +6932,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 70.752 0.024 70.776 ; + RECT 0.000 70.752 0.036 70.776 ; END END dout_b[248] PIN dout_b[249] @@ -6941,7 +6941,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 70.800 0.024 70.824 ; + RECT 0.000 70.800 0.036 70.824 ; END END dout_b[249] PIN dout_b[250] @@ -6950,7 +6950,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 70.848 0.024 70.872 ; + RECT 0.000 70.848 0.036 70.872 ; END END dout_b[250] PIN dout_b[251] @@ -6959,7 +6959,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 70.896 0.024 70.920 ; + RECT 0.000 70.896 0.036 70.920 ; END END dout_b[251] PIN dout_b[252] @@ -6968,7 +6968,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 70.944 0.024 70.968 ; + RECT 0.000 70.944 0.036 70.968 ; END END dout_b[252] PIN dout_b[253] @@ -6977,7 +6977,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 70.992 0.024 71.016 ; + RECT 0.000 70.992 0.036 71.016 ; END END dout_b[253] PIN dout_b[254] @@ -6986,7 +6986,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 71.040 0.024 71.064 ; + RECT 0.000 71.040 0.036 71.064 ; END END dout_b[254] PIN dout_b[255] @@ -6995,7 +6995,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 71.088 0.024 71.112 ; + RECT 0.000 71.088 0.036 71.112 ; END END dout_b[255] PIN din_b[0] @@ -7004,7 +7004,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 82.416 0.024 82.440 ; + RECT 0.000 82.416 0.036 82.440 ; END END din_b[0] PIN din_b[1] @@ -7013,7 +7013,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 82.464 0.024 82.488 ; + RECT 0.000 82.464 0.036 82.488 ; END END din_b[1] PIN din_b[2] @@ -7022,7 +7022,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 82.512 0.024 82.536 ; + RECT 0.000 82.512 0.036 82.536 ; END END din_b[2] PIN din_b[3] @@ -7031,7 +7031,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 82.560 0.024 82.584 ; + RECT 0.000 82.560 0.036 82.584 ; END END din_b[3] PIN din_b[4] @@ -7040,7 +7040,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 82.608 0.024 82.632 ; + RECT 0.000 82.608 0.036 82.632 ; END END din_b[4] PIN din_b[5] @@ -7049,7 +7049,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 82.656 0.024 82.680 ; + RECT 0.000 82.656 0.036 82.680 ; END END din_b[5] PIN din_b[6] @@ -7058,7 +7058,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 82.704 0.024 82.728 ; + RECT 0.000 82.704 0.036 82.728 ; END END din_b[6] PIN din_b[7] @@ -7067,7 +7067,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 82.752 0.024 82.776 ; + RECT 0.000 82.752 0.036 82.776 ; END END din_b[7] PIN din_b[8] @@ -7076,7 +7076,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 82.800 0.024 82.824 ; + RECT 0.000 82.800 0.036 82.824 ; END END din_b[8] PIN din_b[9] @@ -7085,7 +7085,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 82.848 0.024 82.872 ; + RECT 0.000 82.848 0.036 82.872 ; END END din_b[9] PIN din_b[10] @@ -7094,7 +7094,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 82.896 0.024 82.920 ; + RECT 0.000 82.896 0.036 82.920 ; END END din_b[10] PIN din_b[11] @@ -7103,7 +7103,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 82.944 0.024 82.968 ; + RECT 0.000 82.944 0.036 82.968 ; END END din_b[11] PIN din_b[12] @@ -7112,7 +7112,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 82.992 0.024 83.016 ; + RECT 0.000 82.992 0.036 83.016 ; END END din_b[12] PIN din_b[13] @@ -7121,7 +7121,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 83.040 0.024 83.064 ; + RECT 0.000 83.040 0.036 83.064 ; END END din_b[13] PIN din_b[14] @@ -7130,7 +7130,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 83.088 0.024 83.112 ; + RECT 0.000 83.088 0.036 83.112 ; END END din_b[14] PIN din_b[15] @@ -7139,7 +7139,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 83.136 0.024 83.160 ; + RECT 0.000 83.136 0.036 83.160 ; END END din_b[15] PIN din_b[16] @@ -7148,7 +7148,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 83.184 0.024 83.208 ; + RECT 0.000 83.184 0.036 83.208 ; END END din_b[16] PIN din_b[17] @@ -7157,7 +7157,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 83.232 0.024 83.256 ; + RECT 0.000 83.232 0.036 83.256 ; END END din_b[17] PIN din_b[18] @@ -7166,7 +7166,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 83.280 0.024 83.304 ; + RECT 0.000 83.280 0.036 83.304 ; END END din_b[18] PIN din_b[19] @@ -7175,7 +7175,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 83.328 0.024 83.352 ; + RECT 0.000 83.328 0.036 83.352 ; END END din_b[19] PIN din_b[20] @@ -7184,7 +7184,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 83.376 0.024 83.400 ; + RECT 0.000 83.376 0.036 83.400 ; END END din_b[20] PIN din_b[21] @@ -7193,7 +7193,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 83.424 0.024 83.448 ; + RECT 0.000 83.424 0.036 83.448 ; END END din_b[21] PIN din_b[22] @@ -7202,7 +7202,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 83.472 0.024 83.496 ; + RECT 0.000 83.472 0.036 83.496 ; END END din_b[22] PIN din_b[23] @@ -7211,7 +7211,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 83.520 0.024 83.544 ; + RECT 0.000 83.520 0.036 83.544 ; END END din_b[23] PIN din_b[24] @@ -7220,7 +7220,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 83.568 0.024 83.592 ; + RECT 0.000 83.568 0.036 83.592 ; END END din_b[24] PIN din_b[25] @@ -7229,7 +7229,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 83.616 0.024 83.640 ; + RECT 0.000 83.616 0.036 83.640 ; END END din_b[25] PIN din_b[26] @@ -7238,7 +7238,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 83.664 0.024 83.688 ; + RECT 0.000 83.664 0.036 83.688 ; END END din_b[26] PIN din_b[27] @@ -7247,7 +7247,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 83.712 0.024 83.736 ; + RECT 0.000 83.712 0.036 83.736 ; END END din_b[27] PIN din_b[28] @@ -7256,7 +7256,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 83.760 0.024 83.784 ; + RECT 0.000 83.760 0.036 83.784 ; END END din_b[28] PIN din_b[29] @@ -7265,7 +7265,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 83.808 0.024 83.832 ; + RECT 0.000 83.808 0.036 83.832 ; END END din_b[29] PIN din_b[30] @@ -7274,7 +7274,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 83.856 0.024 83.880 ; + RECT 0.000 83.856 0.036 83.880 ; END END din_b[30] PIN din_b[31] @@ -7283,7 +7283,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 83.904 0.024 83.928 ; + RECT 0.000 83.904 0.036 83.928 ; END END din_b[31] PIN din_b[32] @@ -7292,7 +7292,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 83.952 0.024 83.976 ; + RECT 0.000 83.952 0.036 83.976 ; END END din_b[32] PIN din_b[33] @@ -7301,7 +7301,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 84.000 0.024 84.024 ; + RECT 0.000 84.000 0.036 84.024 ; END END din_b[33] PIN din_b[34] @@ -7310,7 +7310,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 84.048 0.024 84.072 ; + RECT 0.000 84.048 0.036 84.072 ; END END din_b[34] PIN din_b[35] @@ -7319,7 +7319,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 84.096 0.024 84.120 ; + RECT 0.000 84.096 0.036 84.120 ; END END din_b[35] PIN din_b[36] @@ -7328,7 +7328,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 84.144 0.024 84.168 ; + RECT 0.000 84.144 0.036 84.168 ; END END din_b[36] PIN din_b[37] @@ -7337,7 +7337,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 84.192 0.024 84.216 ; + RECT 0.000 84.192 0.036 84.216 ; END END din_b[37] PIN din_b[38] @@ -7346,7 +7346,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 84.240 0.024 84.264 ; + RECT 0.000 84.240 0.036 84.264 ; END END din_b[38] PIN din_b[39] @@ -7355,7 +7355,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 84.288 0.024 84.312 ; + RECT 0.000 84.288 0.036 84.312 ; END END din_b[39] PIN din_b[40] @@ -7364,7 +7364,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 84.336 0.024 84.360 ; + RECT 0.000 84.336 0.036 84.360 ; END END din_b[40] PIN din_b[41] @@ -7373,7 +7373,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 84.384 0.024 84.408 ; + RECT 0.000 84.384 0.036 84.408 ; END END din_b[41] PIN din_b[42] @@ -7382,7 +7382,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 84.432 0.024 84.456 ; + RECT 0.000 84.432 0.036 84.456 ; END END din_b[42] PIN din_b[43] @@ -7391,7 +7391,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 84.480 0.024 84.504 ; + RECT 0.000 84.480 0.036 84.504 ; END END din_b[43] PIN din_b[44] @@ -7400,7 +7400,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 84.528 0.024 84.552 ; + RECT 0.000 84.528 0.036 84.552 ; END END din_b[44] PIN din_b[45] @@ -7409,7 +7409,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 84.576 0.024 84.600 ; + RECT 0.000 84.576 0.036 84.600 ; END END din_b[45] PIN din_b[46] @@ -7418,7 +7418,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 84.624 0.024 84.648 ; + RECT 0.000 84.624 0.036 84.648 ; END END din_b[46] PIN din_b[47] @@ -7427,7 +7427,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 84.672 0.024 84.696 ; + RECT 0.000 84.672 0.036 84.696 ; END END din_b[47] PIN din_b[48] @@ -7436,7 +7436,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 84.720 0.024 84.744 ; + RECT 0.000 84.720 0.036 84.744 ; END END din_b[48] PIN din_b[49] @@ -7445,7 +7445,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 84.768 0.024 84.792 ; + RECT 0.000 84.768 0.036 84.792 ; END END din_b[49] PIN din_b[50] @@ -7454,7 +7454,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 84.816 0.024 84.840 ; + RECT 0.000 84.816 0.036 84.840 ; END END din_b[50] PIN din_b[51] @@ -7463,7 +7463,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 84.864 0.024 84.888 ; + RECT 0.000 84.864 0.036 84.888 ; END END din_b[51] PIN din_b[52] @@ -7472,7 +7472,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 84.912 0.024 84.936 ; + RECT 0.000 84.912 0.036 84.936 ; END END din_b[52] PIN din_b[53] @@ -7481,7 +7481,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 84.960 0.024 84.984 ; + RECT 0.000 84.960 0.036 84.984 ; END END din_b[53] PIN din_b[54] @@ -7490,7 +7490,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 85.008 0.024 85.032 ; + RECT 0.000 85.008 0.036 85.032 ; END END din_b[54] PIN din_b[55] @@ -7499,7 +7499,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 85.056 0.024 85.080 ; + RECT 0.000 85.056 0.036 85.080 ; END END din_b[55] PIN din_b[56] @@ -7508,7 +7508,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 85.104 0.024 85.128 ; + RECT 0.000 85.104 0.036 85.128 ; END END din_b[56] PIN din_b[57] @@ -7517,7 +7517,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 85.152 0.024 85.176 ; + RECT 0.000 85.152 0.036 85.176 ; END END din_b[57] PIN din_b[58] @@ -7526,7 +7526,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 85.200 0.024 85.224 ; + RECT 0.000 85.200 0.036 85.224 ; END END din_b[58] PIN din_b[59] @@ -7535,7 +7535,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 85.248 0.024 85.272 ; + RECT 0.000 85.248 0.036 85.272 ; END END din_b[59] PIN din_b[60] @@ -7544,7 +7544,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 85.296 0.024 85.320 ; + RECT 0.000 85.296 0.036 85.320 ; END END din_b[60] PIN din_b[61] @@ -7553,7 +7553,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 85.344 0.024 85.368 ; + RECT 0.000 85.344 0.036 85.368 ; END END din_b[61] PIN din_b[62] @@ -7562,7 +7562,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 85.392 0.024 85.416 ; + RECT 0.000 85.392 0.036 85.416 ; END END din_b[62] PIN din_b[63] @@ -7571,7 +7571,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 85.440 0.024 85.464 ; + RECT 0.000 85.440 0.036 85.464 ; END END din_b[63] PIN din_b[64] @@ -7580,7 +7580,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 85.488 0.024 85.512 ; + RECT 0.000 85.488 0.036 85.512 ; END END din_b[64] PIN din_b[65] @@ -7589,7 +7589,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 85.536 0.024 85.560 ; + RECT 0.000 85.536 0.036 85.560 ; END END din_b[65] PIN din_b[66] @@ -7598,7 +7598,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 85.584 0.024 85.608 ; + RECT 0.000 85.584 0.036 85.608 ; END END din_b[66] PIN din_b[67] @@ -7607,7 +7607,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 85.632 0.024 85.656 ; + RECT 0.000 85.632 0.036 85.656 ; END END din_b[67] PIN din_b[68] @@ -7616,7 +7616,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 85.680 0.024 85.704 ; + RECT 0.000 85.680 0.036 85.704 ; END END din_b[68] PIN din_b[69] @@ -7625,7 +7625,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 85.728 0.024 85.752 ; + RECT 0.000 85.728 0.036 85.752 ; END END din_b[69] PIN din_b[70] @@ -7634,7 +7634,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 85.776 0.024 85.800 ; + RECT 0.000 85.776 0.036 85.800 ; END END din_b[70] PIN din_b[71] @@ -7643,7 +7643,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 85.824 0.024 85.848 ; + RECT 0.000 85.824 0.036 85.848 ; END END din_b[71] PIN din_b[72] @@ -7652,7 +7652,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 85.872 0.024 85.896 ; + RECT 0.000 85.872 0.036 85.896 ; END END din_b[72] PIN din_b[73] @@ -7661,7 +7661,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 85.920 0.024 85.944 ; + RECT 0.000 85.920 0.036 85.944 ; END END din_b[73] PIN din_b[74] @@ -7670,7 +7670,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 85.968 0.024 85.992 ; + RECT 0.000 85.968 0.036 85.992 ; END END din_b[74] PIN din_b[75] @@ -7679,7 +7679,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 86.016 0.024 86.040 ; + RECT 0.000 86.016 0.036 86.040 ; END END din_b[75] PIN din_b[76] @@ -7688,7 +7688,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 86.064 0.024 86.088 ; + RECT 0.000 86.064 0.036 86.088 ; END END din_b[76] PIN din_b[77] @@ -7697,7 +7697,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 86.112 0.024 86.136 ; + RECT 0.000 86.112 0.036 86.136 ; END END din_b[77] PIN din_b[78] @@ -7706,7 +7706,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 86.160 0.024 86.184 ; + RECT 0.000 86.160 0.036 86.184 ; END END din_b[78] PIN din_b[79] @@ -7715,7 +7715,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 86.208 0.024 86.232 ; + RECT 0.000 86.208 0.036 86.232 ; END END din_b[79] PIN din_b[80] @@ -7724,7 +7724,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 86.256 0.024 86.280 ; + RECT 0.000 86.256 0.036 86.280 ; END END din_b[80] PIN din_b[81] @@ -7733,7 +7733,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 86.304 0.024 86.328 ; + RECT 0.000 86.304 0.036 86.328 ; END END din_b[81] PIN din_b[82] @@ -7742,7 +7742,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 86.352 0.024 86.376 ; + RECT 0.000 86.352 0.036 86.376 ; END END din_b[82] PIN din_b[83] @@ -7751,7 +7751,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 86.400 0.024 86.424 ; + RECT 0.000 86.400 0.036 86.424 ; END END din_b[83] PIN din_b[84] @@ -7760,7 +7760,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 86.448 0.024 86.472 ; + RECT 0.000 86.448 0.036 86.472 ; END END din_b[84] PIN din_b[85] @@ -7769,7 +7769,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 86.496 0.024 86.520 ; + RECT 0.000 86.496 0.036 86.520 ; END END din_b[85] PIN din_b[86] @@ -7778,7 +7778,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 86.544 0.024 86.568 ; + RECT 0.000 86.544 0.036 86.568 ; END END din_b[86] PIN din_b[87] @@ -7787,7 +7787,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 86.592 0.024 86.616 ; + RECT 0.000 86.592 0.036 86.616 ; END END din_b[87] PIN din_b[88] @@ -7796,7 +7796,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 86.640 0.024 86.664 ; + RECT 0.000 86.640 0.036 86.664 ; END END din_b[88] PIN din_b[89] @@ -7805,7 +7805,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 86.688 0.024 86.712 ; + RECT 0.000 86.688 0.036 86.712 ; END END din_b[89] PIN din_b[90] @@ -7814,7 +7814,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 86.736 0.024 86.760 ; + RECT 0.000 86.736 0.036 86.760 ; END END din_b[90] PIN din_b[91] @@ -7823,7 +7823,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 86.784 0.024 86.808 ; + RECT 0.000 86.784 0.036 86.808 ; END END din_b[91] PIN din_b[92] @@ -7832,7 +7832,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 86.832 0.024 86.856 ; + RECT 0.000 86.832 0.036 86.856 ; END END din_b[92] PIN din_b[93] @@ -7841,7 +7841,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 86.880 0.024 86.904 ; + RECT 0.000 86.880 0.036 86.904 ; END END din_b[93] PIN din_b[94] @@ -7850,7 +7850,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 86.928 0.024 86.952 ; + RECT 0.000 86.928 0.036 86.952 ; END END din_b[94] PIN din_b[95] @@ -7859,7 +7859,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 86.976 0.024 87.000 ; + RECT 0.000 86.976 0.036 87.000 ; END END din_b[95] PIN din_b[96] @@ -7868,7 +7868,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 87.024 0.024 87.048 ; + RECT 0.000 87.024 0.036 87.048 ; END END din_b[96] PIN din_b[97] @@ -7877,7 +7877,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 87.072 0.024 87.096 ; + RECT 0.000 87.072 0.036 87.096 ; END END din_b[97] PIN din_b[98] @@ -7886,7 +7886,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 87.120 0.024 87.144 ; + RECT 0.000 87.120 0.036 87.144 ; END END din_b[98] PIN din_b[99] @@ -7895,7 +7895,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 87.168 0.024 87.192 ; + RECT 0.000 87.168 0.036 87.192 ; END END din_b[99] PIN din_b[100] @@ -7904,7 +7904,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 87.216 0.024 87.240 ; + RECT 0.000 87.216 0.036 87.240 ; END END din_b[100] PIN din_b[101] @@ -7913,7 +7913,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 87.264 0.024 87.288 ; + RECT 0.000 87.264 0.036 87.288 ; END END din_b[101] PIN din_b[102] @@ -7922,7 +7922,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 87.312 0.024 87.336 ; + RECT 0.000 87.312 0.036 87.336 ; END END din_b[102] PIN din_b[103] @@ -7931,7 +7931,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 87.360 0.024 87.384 ; + RECT 0.000 87.360 0.036 87.384 ; END END din_b[103] PIN din_b[104] @@ -7940,7 +7940,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 87.408 0.024 87.432 ; + RECT 0.000 87.408 0.036 87.432 ; END END din_b[104] PIN din_b[105] @@ -7949,7 +7949,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 87.456 0.024 87.480 ; + RECT 0.000 87.456 0.036 87.480 ; END END din_b[105] PIN din_b[106] @@ -7958,7 +7958,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 87.504 0.024 87.528 ; + RECT 0.000 87.504 0.036 87.528 ; END END din_b[106] PIN din_b[107] @@ -7967,7 +7967,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 87.552 0.024 87.576 ; + RECT 0.000 87.552 0.036 87.576 ; END END din_b[107] PIN din_b[108] @@ -7976,7 +7976,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 87.600 0.024 87.624 ; + RECT 0.000 87.600 0.036 87.624 ; END END din_b[108] PIN din_b[109] @@ -7985,7 +7985,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 87.648 0.024 87.672 ; + RECT 0.000 87.648 0.036 87.672 ; END END din_b[109] PIN din_b[110] @@ -7994,7 +7994,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 87.696 0.024 87.720 ; + RECT 0.000 87.696 0.036 87.720 ; END END din_b[110] PIN din_b[111] @@ -8003,7 +8003,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 87.744 0.024 87.768 ; + RECT 0.000 87.744 0.036 87.768 ; END END din_b[111] PIN din_b[112] @@ -8012,7 +8012,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 87.792 0.024 87.816 ; + RECT 0.000 87.792 0.036 87.816 ; END END din_b[112] PIN din_b[113] @@ -8021,7 +8021,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 87.840 0.024 87.864 ; + RECT 0.000 87.840 0.036 87.864 ; END END din_b[113] PIN din_b[114] @@ -8030,7 +8030,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 87.888 0.024 87.912 ; + RECT 0.000 87.888 0.036 87.912 ; END END din_b[114] PIN din_b[115] @@ -8039,7 +8039,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 87.936 0.024 87.960 ; + RECT 0.000 87.936 0.036 87.960 ; END END din_b[115] PIN din_b[116] @@ -8048,7 +8048,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 87.984 0.024 88.008 ; + RECT 0.000 87.984 0.036 88.008 ; END END din_b[116] PIN din_b[117] @@ -8057,7 +8057,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 88.032 0.024 88.056 ; + RECT 0.000 88.032 0.036 88.056 ; END END din_b[117] PIN din_b[118] @@ -8066,7 +8066,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 88.080 0.024 88.104 ; + RECT 0.000 88.080 0.036 88.104 ; END END din_b[118] PIN din_b[119] @@ -8075,7 +8075,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 88.128 0.024 88.152 ; + RECT 0.000 88.128 0.036 88.152 ; END END din_b[119] PIN din_b[120] @@ -8084,7 +8084,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 88.176 0.024 88.200 ; + RECT 0.000 88.176 0.036 88.200 ; END END din_b[120] PIN din_b[121] @@ -8093,7 +8093,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 88.224 0.024 88.248 ; + RECT 0.000 88.224 0.036 88.248 ; END END din_b[121] PIN din_b[122] @@ -8102,7 +8102,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 88.272 0.024 88.296 ; + RECT 0.000 88.272 0.036 88.296 ; END END din_b[122] PIN din_b[123] @@ -8111,7 +8111,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 88.320 0.024 88.344 ; + RECT 0.000 88.320 0.036 88.344 ; END END din_b[123] PIN din_b[124] @@ -8120,7 +8120,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 88.368 0.024 88.392 ; + RECT 0.000 88.368 0.036 88.392 ; END END din_b[124] PIN din_b[125] @@ -8129,7 +8129,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 88.416 0.024 88.440 ; + RECT 0.000 88.416 0.036 88.440 ; END END din_b[125] PIN din_b[126] @@ -8138,7 +8138,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 88.464 0.024 88.488 ; + RECT 0.000 88.464 0.036 88.488 ; END END din_b[126] PIN din_b[127] @@ -8147,7 +8147,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 88.512 0.024 88.536 ; + RECT 0.000 88.512 0.036 88.536 ; END END din_b[127] PIN din_b[128] @@ -8156,7 +8156,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 88.560 0.024 88.584 ; + RECT 0.000 88.560 0.036 88.584 ; END END din_b[128] PIN din_b[129] @@ -8165,7 +8165,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 88.608 0.024 88.632 ; + RECT 0.000 88.608 0.036 88.632 ; END END din_b[129] PIN din_b[130] @@ -8174,7 +8174,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 88.656 0.024 88.680 ; + RECT 0.000 88.656 0.036 88.680 ; END END din_b[130] PIN din_b[131] @@ -8183,7 +8183,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 88.704 0.024 88.728 ; + RECT 0.000 88.704 0.036 88.728 ; END END din_b[131] PIN din_b[132] @@ -8192,7 +8192,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 88.752 0.024 88.776 ; + RECT 0.000 88.752 0.036 88.776 ; END END din_b[132] PIN din_b[133] @@ -8201,7 +8201,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 88.800 0.024 88.824 ; + RECT 0.000 88.800 0.036 88.824 ; END END din_b[133] PIN din_b[134] @@ -8210,7 +8210,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 88.848 0.024 88.872 ; + RECT 0.000 88.848 0.036 88.872 ; END END din_b[134] PIN din_b[135] @@ -8219,7 +8219,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 88.896 0.024 88.920 ; + RECT 0.000 88.896 0.036 88.920 ; END END din_b[135] PIN din_b[136] @@ -8228,7 +8228,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 88.944 0.024 88.968 ; + RECT 0.000 88.944 0.036 88.968 ; END END din_b[136] PIN din_b[137] @@ -8237,7 +8237,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 88.992 0.024 89.016 ; + RECT 0.000 88.992 0.036 89.016 ; END END din_b[137] PIN din_b[138] @@ -8246,7 +8246,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 89.040 0.024 89.064 ; + RECT 0.000 89.040 0.036 89.064 ; END END din_b[138] PIN din_b[139] @@ -8255,7 +8255,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 89.088 0.024 89.112 ; + RECT 0.000 89.088 0.036 89.112 ; END END din_b[139] PIN din_b[140] @@ -8264,7 +8264,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 89.136 0.024 89.160 ; + RECT 0.000 89.136 0.036 89.160 ; END END din_b[140] PIN din_b[141] @@ -8273,7 +8273,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 89.184 0.024 89.208 ; + RECT 0.000 89.184 0.036 89.208 ; END END din_b[141] PIN din_b[142] @@ -8282,7 +8282,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 89.232 0.024 89.256 ; + RECT 0.000 89.232 0.036 89.256 ; END END din_b[142] PIN din_b[143] @@ -8291,7 +8291,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 89.280 0.024 89.304 ; + RECT 0.000 89.280 0.036 89.304 ; END END din_b[143] PIN din_b[144] @@ -8300,7 +8300,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 89.328 0.024 89.352 ; + RECT 0.000 89.328 0.036 89.352 ; END END din_b[144] PIN din_b[145] @@ -8309,7 +8309,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 89.376 0.024 89.400 ; + RECT 0.000 89.376 0.036 89.400 ; END END din_b[145] PIN din_b[146] @@ -8318,7 +8318,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 89.424 0.024 89.448 ; + RECT 0.000 89.424 0.036 89.448 ; END END din_b[146] PIN din_b[147] @@ -8327,7 +8327,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 89.472 0.024 89.496 ; + RECT 0.000 89.472 0.036 89.496 ; END END din_b[147] PIN din_b[148] @@ -8336,7 +8336,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 89.520 0.024 89.544 ; + RECT 0.000 89.520 0.036 89.544 ; END END din_b[148] PIN din_b[149] @@ -8345,7 +8345,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 89.568 0.024 89.592 ; + RECT 0.000 89.568 0.036 89.592 ; END END din_b[149] PIN din_b[150] @@ -8354,7 +8354,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 89.616 0.024 89.640 ; + RECT 0.000 89.616 0.036 89.640 ; END END din_b[150] PIN din_b[151] @@ -8363,7 +8363,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 89.664 0.024 89.688 ; + RECT 0.000 89.664 0.036 89.688 ; END END din_b[151] PIN din_b[152] @@ -8372,7 +8372,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 89.712 0.024 89.736 ; + RECT 0.000 89.712 0.036 89.736 ; END END din_b[152] PIN din_b[153] @@ -8381,7 +8381,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 89.760 0.024 89.784 ; + RECT 0.000 89.760 0.036 89.784 ; END END din_b[153] PIN din_b[154] @@ -8390,7 +8390,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 89.808 0.024 89.832 ; + RECT 0.000 89.808 0.036 89.832 ; END END din_b[154] PIN din_b[155] @@ -8399,7 +8399,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 89.856 0.024 89.880 ; + RECT 0.000 89.856 0.036 89.880 ; END END din_b[155] PIN din_b[156] @@ -8408,7 +8408,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 89.904 0.024 89.928 ; + RECT 0.000 89.904 0.036 89.928 ; END END din_b[156] PIN din_b[157] @@ -8417,7 +8417,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 89.952 0.024 89.976 ; + RECT 0.000 89.952 0.036 89.976 ; END END din_b[157] PIN din_b[158] @@ -8426,7 +8426,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 90.000 0.024 90.024 ; + RECT 0.000 90.000 0.036 90.024 ; END END din_b[158] PIN din_b[159] @@ -8435,7 +8435,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 90.048 0.024 90.072 ; + RECT 0.000 90.048 0.036 90.072 ; END END din_b[159] PIN din_b[160] @@ -8444,7 +8444,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 90.096 0.024 90.120 ; + RECT 0.000 90.096 0.036 90.120 ; END END din_b[160] PIN din_b[161] @@ -8453,7 +8453,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 90.144 0.024 90.168 ; + RECT 0.000 90.144 0.036 90.168 ; END END din_b[161] PIN din_b[162] @@ -8462,7 +8462,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 90.192 0.024 90.216 ; + RECT 0.000 90.192 0.036 90.216 ; END END din_b[162] PIN din_b[163] @@ -8471,7 +8471,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 90.240 0.024 90.264 ; + RECT 0.000 90.240 0.036 90.264 ; END END din_b[163] PIN din_b[164] @@ -8480,7 +8480,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 90.288 0.024 90.312 ; + RECT 0.000 90.288 0.036 90.312 ; END END din_b[164] PIN din_b[165] @@ -8489,7 +8489,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 90.336 0.024 90.360 ; + RECT 0.000 90.336 0.036 90.360 ; END END din_b[165] PIN din_b[166] @@ -8498,7 +8498,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 90.384 0.024 90.408 ; + RECT 0.000 90.384 0.036 90.408 ; END END din_b[166] PIN din_b[167] @@ -8507,7 +8507,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 90.432 0.024 90.456 ; + RECT 0.000 90.432 0.036 90.456 ; END END din_b[167] PIN din_b[168] @@ -8516,7 +8516,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 90.480 0.024 90.504 ; + RECT 0.000 90.480 0.036 90.504 ; END END din_b[168] PIN din_b[169] @@ -8525,7 +8525,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 90.528 0.024 90.552 ; + RECT 0.000 90.528 0.036 90.552 ; END END din_b[169] PIN din_b[170] @@ -8534,7 +8534,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 90.576 0.024 90.600 ; + RECT 0.000 90.576 0.036 90.600 ; END END din_b[170] PIN din_b[171] @@ -8543,7 +8543,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 90.624 0.024 90.648 ; + RECT 0.000 90.624 0.036 90.648 ; END END din_b[171] PIN din_b[172] @@ -8552,7 +8552,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 90.672 0.024 90.696 ; + RECT 0.000 90.672 0.036 90.696 ; END END din_b[172] PIN din_b[173] @@ -8561,7 +8561,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 90.720 0.024 90.744 ; + RECT 0.000 90.720 0.036 90.744 ; END END din_b[173] PIN din_b[174] @@ -8570,7 +8570,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 90.768 0.024 90.792 ; + RECT 0.000 90.768 0.036 90.792 ; END END din_b[174] PIN din_b[175] @@ -8579,7 +8579,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 90.816 0.024 90.840 ; + RECT 0.000 90.816 0.036 90.840 ; END END din_b[175] PIN din_b[176] @@ -8588,7 +8588,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 90.864 0.024 90.888 ; + RECT 0.000 90.864 0.036 90.888 ; END END din_b[176] PIN din_b[177] @@ -8597,7 +8597,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 90.912 0.024 90.936 ; + RECT 0.000 90.912 0.036 90.936 ; END END din_b[177] PIN din_b[178] @@ -8606,7 +8606,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 90.960 0.024 90.984 ; + RECT 0.000 90.960 0.036 90.984 ; END END din_b[178] PIN din_b[179] @@ -8615,7 +8615,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 91.008 0.024 91.032 ; + RECT 0.000 91.008 0.036 91.032 ; END END din_b[179] PIN din_b[180] @@ -8624,7 +8624,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 91.056 0.024 91.080 ; + RECT 0.000 91.056 0.036 91.080 ; END END din_b[180] PIN din_b[181] @@ -8633,7 +8633,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 91.104 0.024 91.128 ; + RECT 0.000 91.104 0.036 91.128 ; END END din_b[181] PIN din_b[182] @@ -8642,7 +8642,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 91.152 0.024 91.176 ; + RECT 0.000 91.152 0.036 91.176 ; END END din_b[182] PIN din_b[183] @@ -8651,7 +8651,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 91.200 0.024 91.224 ; + RECT 0.000 91.200 0.036 91.224 ; END END din_b[183] PIN din_b[184] @@ -8660,7 +8660,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 91.248 0.024 91.272 ; + RECT 0.000 91.248 0.036 91.272 ; END END din_b[184] PIN din_b[185] @@ -8669,7 +8669,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 91.296 0.024 91.320 ; + RECT 0.000 91.296 0.036 91.320 ; END END din_b[185] PIN din_b[186] @@ -8678,7 +8678,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 91.344 0.024 91.368 ; + RECT 0.000 91.344 0.036 91.368 ; END END din_b[186] PIN din_b[187] @@ -8687,7 +8687,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 91.392 0.024 91.416 ; + RECT 0.000 91.392 0.036 91.416 ; END END din_b[187] PIN din_b[188] @@ -8696,7 +8696,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 91.440 0.024 91.464 ; + RECT 0.000 91.440 0.036 91.464 ; END END din_b[188] PIN din_b[189] @@ -8705,7 +8705,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 91.488 0.024 91.512 ; + RECT 0.000 91.488 0.036 91.512 ; END END din_b[189] PIN din_b[190] @@ -8714,7 +8714,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 91.536 0.024 91.560 ; + RECT 0.000 91.536 0.036 91.560 ; END END din_b[190] PIN din_b[191] @@ -8723,7 +8723,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 91.584 0.024 91.608 ; + RECT 0.000 91.584 0.036 91.608 ; END END din_b[191] PIN din_b[192] @@ -8732,7 +8732,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 91.632 0.024 91.656 ; + RECT 0.000 91.632 0.036 91.656 ; END END din_b[192] PIN din_b[193] @@ -8741,7 +8741,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 91.680 0.024 91.704 ; + RECT 0.000 91.680 0.036 91.704 ; END END din_b[193] PIN din_b[194] @@ -8750,7 +8750,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 91.728 0.024 91.752 ; + RECT 0.000 91.728 0.036 91.752 ; END END din_b[194] PIN din_b[195] @@ -8759,7 +8759,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 91.776 0.024 91.800 ; + RECT 0.000 91.776 0.036 91.800 ; END END din_b[195] PIN din_b[196] @@ -8768,7 +8768,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 91.824 0.024 91.848 ; + RECT 0.000 91.824 0.036 91.848 ; END END din_b[196] PIN din_b[197] @@ -8777,7 +8777,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 91.872 0.024 91.896 ; + RECT 0.000 91.872 0.036 91.896 ; END END din_b[197] PIN din_b[198] @@ -8786,7 +8786,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 91.920 0.024 91.944 ; + RECT 0.000 91.920 0.036 91.944 ; END END din_b[198] PIN din_b[199] @@ -8795,7 +8795,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 91.968 0.024 91.992 ; + RECT 0.000 91.968 0.036 91.992 ; END END din_b[199] PIN din_b[200] @@ -8804,7 +8804,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 92.016 0.024 92.040 ; + RECT 0.000 92.016 0.036 92.040 ; END END din_b[200] PIN din_b[201] @@ -8813,7 +8813,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 92.064 0.024 92.088 ; + RECT 0.000 92.064 0.036 92.088 ; END END din_b[201] PIN din_b[202] @@ -8822,7 +8822,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 92.112 0.024 92.136 ; + RECT 0.000 92.112 0.036 92.136 ; END END din_b[202] PIN din_b[203] @@ -8831,7 +8831,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 92.160 0.024 92.184 ; + RECT 0.000 92.160 0.036 92.184 ; END END din_b[203] PIN din_b[204] @@ -8840,7 +8840,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 92.208 0.024 92.232 ; + RECT 0.000 92.208 0.036 92.232 ; END END din_b[204] PIN din_b[205] @@ -8849,7 +8849,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 92.256 0.024 92.280 ; + RECT 0.000 92.256 0.036 92.280 ; END END din_b[205] PIN din_b[206] @@ -8858,7 +8858,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 92.304 0.024 92.328 ; + RECT 0.000 92.304 0.036 92.328 ; END END din_b[206] PIN din_b[207] @@ -8867,7 +8867,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 92.352 0.024 92.376 ; + RECT 0.000 92.352 0.036 92.376 ; END END din_b[207] PIN din_b[208] @@ -8876,7 +8876,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 92.400 0.024 92.424 ; + RECT 0.000 92.400 0.036 92.424 ; END END din_b[208] PIN din_b[209] @@ -8885,7 +8885,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 92.448 0.024 92.472 ; + RECT 0.000 92.448 0.036 92.472 ; END END din_b[209] PIN din_b[210] @@ -8894,7 +8894,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 92.496 0.024 92.520 ; + RECT 0.000 92.496 0.036 92.520 ; END END din_b[210] PIN din_b[211] @@ -8903,7 +8903,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 92.544 0.024 92.568 ; + RECT 0.000 92.544 0.036 92.568 ; END END din_b[211] PIN din_b[212] @@ -8912,7 +8912,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 92.592 0.024 92.616 ; + RECT 0.000 92.592 0.036 92.616 ; END END din_b[212] PIN din_b[213] @@ -8921,7 +8921,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 92.640 0.024 92.664 ; + RECT 0.000 92.640 0.036 92.664 ; END END din_b[213] PIN din_b[214] @@ -8930,7 +8930,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 92.688 0.024 92.712 ; + RECT 0.000 92.688 0.036 92.712 ; END END din_b[214] PIN din_b[215] @@ -8939,7 +8939,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 92.736 0.024 92.760 ; + RECT 0.000 92.736 0.036 92.760 ; END END din_b[215] PIN din_b[216] @@ -8948,7 +8948,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 92.784 0.024 92.808 ; + RECT 0.000 92.784 0.036 92.808 ; END END din_b[216] PIN din_b[217] @@ -8957,7 +8957,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 92.832 0.024 92.856 ; + RECT 0.000 92.832 0.036 92.856 ; END END din_b[217] PIN din_b[218] @@ -8966,7 +8966,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 92.880 0.024 92.904 ; + RECT 0.000 92.880 0.036 92.904 ; END END din_b[218] PIN din_b[219] @@ -8975,7 +8975,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 92.928 0.024 92.952 ; + RECT 0.000 92.928 0.036 92.952 ; END END din_b[219] PIN din_b[220] @@ -8984,7 +8984,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 92.976 0.024 93.000 ; + RECT 0.000 92.976 0.036 93.000 ; END END din_b[220] PIN din_b[221] @@ -8993,7 +8993,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 93.024 0.024 93.048 ; + RECT 0.000 93.024 0.036 93.048 ; END END din_b[221] PIN din_b[222] @@ -9002,7 +9002,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 93.072 0.024 93.096 ; + RECT 0.000 93.072 0.036 93.096 ; END END din_b[222] PIN din_b[223] @@ -9011,7 +9011,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 93.120 0.024 93.144 ; + RECT 0.000 93.120 0.036 93.144 ; END END din_b[223] PIN din_b[224] @@ -9020,7 +9020,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 93.168 0.024 93.192 ; + RECT 0.000 93.168 0.036 93.192 ; END END din_b[224] PIN din_b[225] @@ -9029,7 +9029,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 93.216 0.024 93.240 ; + RECT 0.000 93.216 0.036 93.240 ; END END din_b[225] PIN din_b[226] @@ -9038,7 +9038,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 93.264 0.024 93.288 ; + RECT 0.000 93.264 0.036 93.288 ; END END din_b[226] PIN din_b[227] @@ -9047,7 +9047,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 93.312 0.024 93.336 ; + RECT 0.000 93.312 0.036 93.336 ; END END din_b[227] PIN din_b[228] @@ -9056,7 +9056,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 93.360 0.024 93.384 ; + RECT 0.000 93.360 0.036 93.384 ; END END din_b[228] PIN din_b[229] @@ -9065,7 +9065,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 93.408 0.024 93.432 ; + RECT 0.000 93.408 0.036 93.432 ; END END din_b[229] PIN din_b[230] @@ -9074,7 +9074,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 93.456 0.024 93.480 ; + RECT 0.000 93.456 0.036 93.480 ; END END din_b[230] PIN din_b[231] @@ -9083,7 +9083,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 93.504 0.024 93.528 ; + RECT 0.000 93.504 0.036 93.528 ; END END din_b[231] PIN din_b[232] @@ -9092,7 +9092,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 93.552 0.024 93.576 ; + RECT 0.000 93.552 0.036 93.576 ; END END din_b[232] PIN din_b[233] @@ -9101,7 +9101,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 93.600 0.024 93.624 ; + RECT 0.000 93.600 0.036 93.624 ; END END din_b[233] PIN din_b[234] @@ -9110,7 +9110,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 93.648 0.024 93.672 ; + RECT 0.000 93.648 0.036 93.672 ; END END din_b[234] PIN din_b[235] @@ -9119,7 +9119,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 93.696 0.024 93.720 ; + RECT 0.000 93.696 0.036 93.720 ; END END din_b[235] PIN din_b[236] @@ -9128,7 +9128,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 93.744 0.024 93.768 ; + RECT 0.000 93.744 0.036 93.768 ; END END din_b[236] PIN din_b[237] @@ -9137,7 +9137,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 93.792 0.024 93.816 ; + RECT 0.000 93.792 0.036 93.816 ; END END din_b[237] PIN din_b[238] @@ -9146,7 +9146,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 93.840 0.024 93.864 ; + RECT 0.000 93.840 0.036 93.864 ; END END din_b[238] PIN din_b[239] @@ -9155,7 +9155,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 93.888 0.024 93.912 ; + RECT 0.000 93.888 0.036 93.912 ; END END din_b[239] PIN din_b[240] @@ -9164,7 +9164,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 93.936 0.024 93.960 ; + RECT 0.000 93.936 0.036 93.960 ; END END din_b[240] PIN din_b[241] @@ -9173,7 +9173,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 93.984 0.024 94.008 ; + RECT 0.000 93.984 0.036 94.008 ; END END din_b[241] PIN din_b[242] @@ -9182,7 +9182,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 94.032 0.024 94.056 ; + RECT 0.000 94.032 0.036 94.056 ; END END din_b[242] PIN din_b[243] @@ -9191,7 +9191,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 94.080 0.024 94.104 ; + RECT 0.000 94.080 0.036 94.104 ; END END din_b[243] PIN din_b[244] @@ -9200,7 +9200,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 94.128 0.024 94.152 ; + RECT 0.000 94.128 0.036 94.152 ; END END din_b[244] PIN din_b[245] @@ -9209,7 +9209,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 94.176 0.024 94.200 ; + RECT 0.000 94.176 0.036 94.200 ; END END din_b[245] PIN din_b[246] @@ -9218,7 +9218,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 94.224 0.024 94.248 ; + RECT 0.000 94.224 0.036 94.248 ; END END din_b[246] PIN din_b[247] @@ -9227,7 +9227,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 94.272 0.024 94.296 ; + RECT 0.000 94.272 0.036 94.296 ; END END din_b[247] PIN din_b[248] @@ -9236,7 +9236,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 94.320 0.024 94.344 ; + RECT 0.000 94.320 0.036 94.344 ; END END din_b[248] PIN din_b[249] @@ -9245,7 +9245,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 94.368 0.024 94.392 ; + RECT 0.000 94.368 0.036 94.392 ; END END din_b[249] PIN din_b[250] @@ -9254,7 +9254,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 94.416 0.024 94.440 ; + RECT 0.000 94.416 0.036 94.440 ; END END din_b[250] PIN din_b[251] @@ -9263,7 +9263,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 94.464 0.024 94.488 ; + RECT 0.000 94.464 0.036 94.488 ; END END din_b[251] PIN din_b[252] @@ -9272,7 +9272,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 94.512 0.024 94.536 ; + RECT 0.000 94.512 0.036 94.536 ; END END din_b[252] PIN din_b[253] @@ -9281,7 +9281,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 94.560 0.024 94.584 ; + RECT 0.000 94.560 0.036 94.584 ; END END din_b[253] PIN din_b[254] @@ -9290,7 +9290,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 94.608 0.024 94.632 ; + RECT 0.000 94.608 0.036 94.632 ; END END din_b[254] PIN din_b[255] @@ -9299,7 +9299,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 94.656 0.024 94.680 ; + RECT 0.000 94.656 0.036 94.680 ; END END din_b[255] PIN addr_b[0] @@ -9308,7 +9308,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 105.984 0.024 106.008 ; + RECT 0.000 105.984 0.036 106.008 ; END END addr_b[0] PIN addr_b[1] @@ -9317,7 +9317,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 106.032 0.024 106.056 ; + RECT 0.000 106.032 0.036 106.056 ; END END addr_b[1] PIN addr_b[2] @@ -9326,7 +9326,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 106.080 0.024 106.104 ; + RECT 0.000 106.080 0.036 106.104 ; END END addr_b[2] PIN addr_b[3] @@ -9335,7 +9335,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 106.128 0.024 106.152 ; + RECT 0.000 106.128 0.036 106.152 ; END END addr_b[3] PIN addr_b[4] @@ -9344,7 +9344,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 106.176 0.024 106.200 ; + RECT 0.000 106.176 0.036 106.200 ; END END addr_b[4] PIN addr_b[5] @@ -9353,7 +9353,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 106.224 0.024 106.248 ; + RECT 0.000 106.224 0.036 106.248 ; END END addr_b[5] PIN addr_b[6] @@ -9362,7 +9362,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 106.272 0.024 106.296 ; + RECT 0.000 106.272 0.036 106.296 ; END END addr_b[6] PIN addr_b[7] @@ -9371,7 +9371,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 106.320 0.024 106.344 ; + RECT 0.000 106.320 0.036 106.344 ; END END addr_b[7] PIN we_a @@ -9380,7 +9380,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 117.648 0.024 117.672 ; + RECT 0.000 117.648 0.036 117.672 ; END END we_a PIN we_b @@ -9389,7 +9389,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 117.696 0.024 117.720 ; + RECT 0.000 117.696 0.036 117.720 ; END END we_b PIN clk @@ -9398,7 +9398,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 117.744 0.024 117.768 ; + RECT 0.000 117.744 0.036 117.768 ; END END clk PIN VSS @@ -9406,116 +9406,116 @@ MACRO dprf_256x256 USE GROUND ; PORT LAYER M4 ; - RECT 0.048 0.000 33.202 0.096 ; - RECT 0.048 0.768 33.202 0.864 ; - RECT 0.048 1.536 33.202 1.632 ; - RECT 0.048 2.304 33.202 2.400 ; - RECT 0.048 3.072 33.202 3.168 ; - RECT 0.048 3.840 33.202 3.936 ; - RECT 0.048 4.608 33.202 4.704 ; - RECT 0.048 5.376 33.202 5.472 ; - RECT 0.048 6.144 33.202 6.240 ; - RECT 0.048 6.912 33.202 7.008 ; - RECT 0.048 7.680 33.202 7.776 ; - RECT 0.048 8.448 33.202 8.544 ; - RECT 0.048 9.216 33.202 9.312 ; - RECT 0.048 9.984 33.202 10.080 ; - RECT 0.048 10.752 33.202 10.848 ; - RECT 0.048 11.520 33.202 11.616 ; - RECT 0.048 12.288 33.202 12.384 ; - RECT 0.048 13.056 33.202 13.152 ; - RECT 0.048 13.824 33.202 13.920 ; - RECT 0.048 14.592 33.202 14.688 ; - RECT 0.048 15.360 33.202 15.456 ; - RECT 0.048 16.128 33.202 16.224 ; - RECT 0.048 16.896 33.202 16.992 ; - RECT 0.048 17.664 33.202 17.760 ; - RECT 0.048 18.432 33.202 18.528 ; - RECT 0.048 19.200 33.202 19.296 ; - RECT 0.048 19.968 33.202 20.064 ; - RECT 0.048 20.736 33.202 20.832 ; - RECT 0.048 21.504 33.202 21.600 ; - RECT 0.048 22.272 33.202 22.368 ; - RECT 0.048 23.040 33.202 23.136 ; - RECT 0.048 23.808 33.202 23.904 ; - RECT 0.048 24.576 33.202 24.672 ; - RECT 0.048 25.344 33.202 25.440 ; - RECT 0.048 26.112 33.202 26.208 ; - RECT 0.048 26.880 33.202 26.976 ; - RECT 0.048 27.648 33.202 27.744 ; - RECT 0.048 28.416 33.202 28.512 ; - RECT 0.048 29.184 33.202 29.280 ; - RECT 0.048 29.952 33.202 30.048 ; - RECT 0.048 30.720 33.202 30.816 ; - RECT 0.048 31.488 33.202 31.584 ; - RECT 0.048 32.256 33.202 32.352 ; - RECT 0.048 33.024 33.202 33.120 ; - RECT 0.048 33.792 33.202 33.888 ; - RECT 0.048 34.560 33.202 34.656 ; - RECT 0.048 35.328 33.202 35.424 ; - RECT 0.048 36.096 33.202 36.192 ; - RECT 0.048 36.864 33.202 36.960 ; - RECT 0.048 37.632 33.202 37.728 ; - RECT 0.048 38.400 33.202 38.496 ; - RECT 0.048 39.168 33.202 39.264 ; - RECT 0.048 39.936 33.202 40.032 ; - RECT 0.048 40.704 33.202 40.800 ; - RECT 0.048 41.472 33.202 41.568 ; - RECT 0.048 42.240 33.202 42.336 ; - RECT 0.048 43.008 33.202 43.104 ; - RECT 0.048 43.776 33.202 43.872 ; - RECT 0.048 44.544 33.202 44.640 ; - RECT 0.048 45.312 33.202 45.408 ; - RECT 0.048 46.080 33.202 46.176 ; - RECT 0.048 46.848 33.202 46.944 ; - RECT 0.048 47.616 33.202 47.712 ; - RECT 0.048 48.384 33.202 48.480 ; - RECT 0.048 49.152 33.202 49.248 ; - RECT 0.048 49.920 33.202 50.016 ; - RECT 0.048 50.688 33.202 50.784 ; - RECT 0.048 51.456 33.202 51.552 ; - RECT 0.048 52.224 33.202 52.320 ; - RECT 0.048 52.992 33.202 53.088 ; - RECT 0.048 53.760 33.202 53.856 ; - RECT 0.048 54.528 33.202 54.624 ; - RECT 0.048 55.296 33.202 55.392 ; - RECT 0.048 56.064 33.202 56.160 ; - RECT 0.048 56.832 33.202 56.928 ; - RECT 0.048 57.600 33.202 57.696 ; - RECT 0.048 58.368 33.202 58.464 ; - RECT 0.048 59.136 33.202 59.232 ; - RECT 0.048 59.904 33.202 60.000 ; - RECT 0.048 60.672 33.202 60.768 ; - RECT 0.048 61.440 33.202 61.536 ; - RECT 0.048 62.208 33.202 62.304 ; - RECT 0.048 62.976 33.202 63.072 ; - RECT 0.048 63.744 33.202 63.840 ; - RECT 0.048 64.512 33.202 64.608 ; - RECT 0.048 65.280 33.202 65.376 ; - RECT 0.048 66.048 33.202 66.144 ; - RECT 0.048 66.816 33.202 66.912 ; - RECT 0.048 67.584 33.202 67.680 ; - RECT 0.048 68.352 33.202 68.448 ; - RECT 0.048 69.120 33.202 69.216 ; - RECT 0.048 69.888 33.202 69.984 ; - RECT 0.048 70.656 33.202 70.752 ; - RECT 0.048 71.424 33.202 71.520 ; - RECT 0.048 72.192 33.202 72.288 ; - RECT 0.048 72.960 33.202 73.056 ; - RECT 0.048 73.728 33.202 73.824 ; - RECT 0.048 74.496 33.202 74.592 ; - RECT 0.048 75.264 33.202 75.360 ; - RECT 0.048 76.032 33.202 76.128 ; - RECT 0.048 76.800 33.202 76.896 ; - RECT 0.048 77.568 33.202 77.664 ; - RECT 0.048 78.336 33.202 78.432 ; - RECT 0.048 79.104 33.202 79.200 ; - RECT 0.048 79.872 33.202 79.968 ; - RECT 0.048 80.640 33.202 80.736 ; - RECT 0.048 81.408 33.202 81.504 ; - RECT 0.048 82.176 33.202 82.272 ; - RECT 0.048 82.944 33.202 83.040 ; - RECT 0.048 83.712 33.202 83.808 ; + RECT 0.096 0.000 33.154 0.096 ; + RECT 0.096 0.768 33.154 0.864 ; + RECT 0.096 1.536 33.154 1.632 ; + RECT 0.096 2.304 33.154 2.400 ; + RECT 0.096 3.072 33.154 3.168 ; + RECT 0.096 3.840 33.154 3.936 ; + RECT 0.096 4.608 33.154 4.704 ; + RECT 0.096 5.376 33.154 5.472 ; + RECT 0.096 6.144 33.154 6.240 ; + RECT 0.096 6.912 33.154 7.008 ; + RECT 0.096 7.680 33.154 7.776 ; + RECT 0.096 8.448 33.154 8.544 ; + RECT 0.096 9.216 33.154 9.312 ; + RECT 0.096 9.984 33.154 10.080 ; + RECT 0.096 10.752 33.154 10.848 ; + RECT 0.096 11.520 33.154 11.616 ; + RECT 0.096 12.288 33.154 12.384 ; + RECT 0.096 13.056 33.154 13.152 ; + RECT 0.096 13.824 33.154 13.920 ; + RECT 0.096 14.592 33.154 14.688 ; + RECT 0.096 15.360 33.154 15.456 ; + RECT 0.096 16.128 33.154 16.224 ; + RECT 0.096 16.896 33.154 16.992 ; + RECT 0.096 17.664 33.154 17.760 ; + RECT 0.096 18.432 33.154 18.528 ; + RECT 0.096 19.200 33.154 19.296 ; + RECT 0.096 19.968 33.154 20.064 ; + RECT 0.096 20.736 33.154 20.832 ; + RECT 0.096 21.504 33.154 21.600 ; + RECT 0.096 22.272 33.154 22.368 ; + RECT 0.096 23.040 33.154 23.136 ; + RECT 0.096 23.808 33.154 23.904 ; + RECT 0.096 24.576 33.154 24.672 ; + RECT 0.096 25.344 33.154 25.440 ; + RECT 0.096 26.112 33.154 26.208 ; + RECT 0.096 26.880 33.154 26.976 ; + RECT 0.096 27.648 33.154 27.744 ; + RECT 0.096 28.416 33.154 28.512 ; + RECT 0.096 29.184 33.154 29.280 ; + RECT 0.096 29.952 33.154 30.048 ; + RECT 0.096 30.720 33.154 30.816 ; + RECT 0.096 31.488 33.154 31.584 ; + RECT 0.096 32.256 33.154 32.352 ; + RECT 0.096 33.024 33.154 33.120 ; + RECT 0.096 33.792 33.154 33.888 ; + RECT 0.096 34.560 33.154 34.656 ; + RECT 0.096 35.328 33.154 35.424 ; + RECT 0.096 36.096 33.154 36.192 ; + RECT 0.096 36.864 33.154 36.960 ; + RECT 0.096 37.632 33.154 37.728 ; + RECT 0.096 38.400 33.154 38.496 ; + RECT 0.096 39.168 33.154 39.264 ; + RECT 0.096 39.936 33.154 40.032 ; + RECT 0.096 40.704 33.154 40.800 ; + RECT 0.096 41.472 33.154 41.568 ; + RECT 0.096 42.240 33.154 42.336 ; + RECT 0.096 43.008 33.154 43.104 ; + RECT 0.096 43.776 33.154 43.872 ; + RECT 0.096 44.544 33.154 44.640 ; + RECT 0.096 45.312 33.154 45.408 ; + RECT 0.096 46.080 33.154 46.176 ; + RECT 0.096 46.848 33.154 46.944 ; + RECT 0.096 47.616 33.154 47.712 ; + RECT 0.096 48.384 33.154 48.480 ; + RECT 0.096 49.152 33.154 49.248 ; + RECT 0.096 49.920 33.154 50.016 ; + RECT 0.096 50.688 33.154 50.784 ; + RECT 0.096 51.456 33.154 51.552 ; + RECT 0.096 52.224 33.154 52.320 ; + RECT 0.096 52.992 33.154 53.088 ; + RECT 0.096 53.760 33.154 53.856 ; + RECT 0.096 54.528 33.154 54.624 ; + RECT 0.096 55.296 33.154 55.392 ; + RECT 0.096 56.064 33.154 56.160 ; + RECT 0.096 56.832 33.154 56.928 ; + RECT 0.096 57.600 33.154 57.696 ; + RECT 0.096 58.368 33.154 58.464 ; + RECT 0.096 59.136 33.154 59.232 ; + RECT 0.096 59.904 33.154 60.000 ; + RECT 0.096 60.672 33.154 60.768 ; + RECT 0.096 61.440 33.154 61.536 ; + RECT 0.096 62.208 33.154 62.304 ; + RECT 0.096 62.976 33.154 63.072 ; + RECT 0.096 63.744 33.154 63.840 ; + RECT 0.096 64.512 33.154 64.608 ; + RECT 0.096 65.280 33.154 65.376 ; + RECT 0.096 66.048 33.154 66.144 ; + RECT 0.096 66.816 33.154 66.912 ; + RECT 0.096 67.584 33.154 67.680 ; + RECT 0.096 68.352 33.154 68.448 ; + RECT 0.096 69.120 33.154 69.216 ; + RECT 0.096 69.888 33.154 69.984 ; + RECT 0.096 70.656 33.154 70.752 ; + RECT 0.096 71.424 33.154 71.520 ; + RECT 0.096 72.192 33.154 72.288 ; + RECT 0.096 72.960 33.154 73.056 ; + RECT 0.096 73.728 33.154 73.824 ; + RECT 0.096 74.496 33.154 74.592 ; + RECT 0.096 75.264 33.154 75.360 ; + RECT 0.096 76.032 33.154 76.128 ; + RECT 0.096 76.800 33.154 76.896 ; + RECT 0.096 77.568 33.154 77.664 ; + RECT 0.096 78.336 33.154 78.432 ; + RECT 0.096 79.104 33.154 79.200 ; + RECT 0.096 79.872 33.154 79.968 ; + RECT 0.096 80.640 33.154 80.736 ; + RECT 0.096 81.408 33.154 81.504 ; + RECT 0.096 82.176 33.154 82.272 ; + RECT 0.096 82.944 33.154 83.040 ; + RECT 0.096 83.712 33.154 83.808 ; END END VSS PIN VDD @@ -9523,115 +9523,115 @@ MACRO dprf_256x256 USE POWER ; PORT LAYER M4 ; - RECT 0.048 0.384 33.202 0.480 ; - RECT 0.048 1.152 33.202 1.248 ; - RECT 0.048 1.920 33.202 2.016 ; - RECT 0.048 2.688 33.202 2.784 ; - RECT 0.048 3.456 33.202 3.552 ; - RECT 0.048 4.224 33.202 4.320 ; - RECT 0.048 4.992 33.202 5.088 ; - RECT 0.048 5.760 33.202 5.856 ; - RECT 0.048 6.528 33.202 6.624 ; - RECT 0.048 7.296 33.202 7.392 ; - RECT 0.048 8.064 33.202 8.160 ; - RECT 0.048 8.832 33.202 8.928 ; - RECT 0.048 9.600 33.202 9.696 ; - RECT 0.048 10.368 33.202 10.464 ; - RECT 0.048 11.136 33.202 11.232 ; - RECT 0.048 11.904 33.202 12.000 ; - RECT 0.048 12.672 33.202 12.768 ; - RECT 0.048 13.440 33.202 13.536 ; - RECT 0.048 14.208 33.202 14.304 ; - RECT 0.048 14.976 33.202 15.072 ; - RECT 0.048 15.744 33.202 15.840 ; - RECT 0.048 16.512 33.202 16.608 ; - RECT 0.048 17.280 33.202 17.376 ; - RECT 0.048 18.048 33.202 18.144 ; - RECT 0.048 18.816 33.202 18.912 ; - RECT 0.048 19.584 33.202 19.680 ; - RECT 0.048 20.352 33.202 20.448 ; - RECT 0.048 21.120 33.202 21.216 ; - RECT 0.048 21.888 33.202 21.984 ; - RECT 0.048 22.656 33.202 22.752 ; - RECT 0.048 23.424 33.202 23.520 ; - RECT 0.048 24.192 33.202 24.288 ; - RECT 0.048 24.960 33.202 25.056 ; - RECT 0.048 25.728 33.202 25.824 ; - RECT 0.048 26.496 33.202 26.592 ; - RECT 0.048 27.264 33.202 27.360 ; - RECT 0.048 28.032 33.202 28.128 ; - RECT 0.048 28.800 33.202 28.896 ; - RECT 0.048 29.568 33.202 29.664 ; - RECT 0.048 30.336 33.202 30.432 ; - RECT 0.048 31.104 33.202 31.200 ; - RECT 0.048 31.872 33.202 31.968 ; - RECT 0.048 32.640 33.202 32.736 ; - RECT 0.048 33.408 33.202 33.504 ; - RECT 0.048 34.176 33.202 34.272 ; - RECT 0.048 34.944 33.202 35.040 ; - RECT 0.048 35.712 33.202 35.808 ; - RECT 0.048 36.480 33.202 36.576 ; - RECT 0.048 37.248 33.202 37.344 ; - RECT 0.048 38.016 33.202 38.112 ; - RECT 0.048 38.784 33.202 38.880 ; - RECT 0.048 39.552 33.202 39.648 ; - RECT 0.048 40.320 33.202 40.416 ; - RECT 0.048 41.088 33.202 41.184 ; - RECT 0.048 41.856 33.202 41.952 ; - RECT 0.048 42.624 33.202 42.720 ; - RECT 0.048 43.392 33.202 43.488 ; - RECT 0.048 44.160 33.202 44.256 ; - RECT 0.048 44.928 33.202 45.024 ; - RECT 0.048 45.696 33.202 45.792 ; - RECT 0.048 46.464 33.202 46.560 ; - RECT 0.048 47.232 33.202 47.328 ; - RECT 0.048 48.000 33.202 48.096 ; - RECT 0.048 48.768 33.202 48.864 ; - RECT 0.048 49.536 33.202 49.632 ; - RECT 0.048 50.304 33.202 50.400 ; - RECT 0.048 51.072 33.202 51.168 ; - RECT 0.048 51.840 33.202 51.936 ; - RECT 0.048 52.608 33.202 52.704 ; - RECT 0.048 53.376 33.202 53.472 ; - RECT 0.048 54.144 33.202 54.240 ; - RECT 0.048 54.912 33.202 55.008 ; - RECT 0.048 55.680 33.202 55.776 ; - RECT 0.048 56.448 33.202 56.544 ; - RECT 0.048 57.216 33.202 57.312 ; - RECT 0.048 57.984 33.202 58.080 ; - RECT 0.048 58.752 33.202 58.848 ; - RECT 0.048 59.520 33.202 59.616 ; - RECT 0.048 60.288 33.202 60.384 ; - RECT 0.048 61.056 33.202 61.152 ; - RECT 0.048 61.824 33.202 61.920 ; - RECT 0.048 62.592 33.202 62.688 ; - RECT 0.048 63.360 33.202 63.456 ; - RECT 0.048 64.128 33.202 64.224 ; - RECT 0.048 64.896 33.202 64.992 ; - RECT 0.048 65.664 33.202 65.760 ; - RECT 0.048 66.432 33.202 66.528 ; - RECT 0.048 67.200 33.202 67.296 ; - RECT 0.048 67.968 33.202 68.064 ; - RECT 0.048 68.736 33.202 68.832 ; - RECT 0.048 69.504 33.202 69.600 ; - RECT 0.048 70.272 33.202 70.368 ; - RECT 0.048 71.040 33.202 71.136 ; - RECT 0.048 71.808 33.202 71.904 ; - RECT 0.048 72.576 33.202 72.672 ; - RECT 0.048 73.344 33.202 73.440 ; - RECT 0.048 74.112 33.202 74.208 ; - RECT 0.048 74.880 33.202 74.976 ; - RECT 0.048 75.648 33.202 75.744 ; - RECT 0.048 76.416 33.202 76.512 ; - RECT 0.048 77.184 33.202 77.280 ; - RECT 0.048 77.952 33.202 78.048 ; - RECT 0.048 78.720 33.202 78.816 ; - RECT 0.048 79.488 33.202 79.584 ; - RECT 0.048 80.256 33.202 80.352 ; - RECT 0.048 81.024 33.202 81.120 ; - RECT 0.048 81.792 33.202 81.888 ; - RECT 0.048 82.560 33.202 82.656 ; - RECT 0.048 83.328 33.202 83.424 ; + RECT 0.096 0.384 33.154 0.480 ; + RECT 0.096 1.152 33.154 1.248 ; + RECT 0.096 1.920 33.154 2.016 ; + RECT 0.096 2.688 33.154 2.784 ; + RECT 0.096 3.456 33.154 3.552 ; + RECT 0.096 4.224 33.154 4.320 ; + RECT 0.096 4.992 33.154 5.088 ; + RECT 0.096 5.760 33.154 5.856 ; + RECT 0.096 6.528 33.154 6.624 ; + RECT 0.096 7.296 33.154 7.392 ; + RECT 0.096 8.064 33.154 8.160 ; + RECT 0.096 8.832 33.154 8.928 ; + RECT 0.096 9.600 33.154 9.696 ; + RECT 0.096 10.368 33.154 10.464 ; + RECT 0.096 11.136 33.154 11.232 ; + RECT 0.096 11.904 33.154 12.000 ; + RECT 0.096 12.672 33.154 12.768 ; + RECT 0.096 13.440 33.154 13.536 ; + RECT 0.096 14.208 33.154 14.304 ; + RECT 0.096 14.976 33.154 15.072 ; + RECT 0.096 15.744 33.154 15.840 ; + RECT 0.096 16.512 33.154 16.608 ; + RECT 0.096 17.280 33.154 17.376 ; + RECT 0.096 18.048 33.154 18.144 ; + RECT 0.096 18.816 33.154 18.912 ; + RECT 0.096 19.584 33.154 19.680 ; + RECT 0.096 20.352 33.154 20.448 ; + RECT 0.096 21.120 33.154 21.216 ; + RECT 0.096 21.888 33.154 21.984 ; + RECT 0.096 22.656 33.154 22.752 ; + RECT 0.096 23.424 33.154 23.520 ; + RECT 0.096 24.192 33.154 24.288 ; + RECT 0.096 24.960 33.154 25.056 ; + RECT 0.096 25.728 33.154 25.824 ; + RECT 0.096 26.496 33.154 26.592 ; + RECT 0.096 27.264 33.154 27.360 ; + RECT 0.096 28.032 33.154 28.128 ; + RECT 0.096 28.800 33.154 28.896 ; + RECT 0.096 29.568 33.154 29.664 ; + RECT 0.096 30.336 33.154 30.432 ; + RECT 0.096 31.104 33.154 31.200 ; + RECT 0.096 31.872 33.154 31.968 ; + RECT 0.096 32.640 33.154 32.736 ; + RECT 0.096 33.408 33.154 33.504 ; + RECT 0.096 34.176 33.154 34.272 ; + RECT 0.096 34.944 33.154 35.040 ; + RECT 0.096 35.712 33.154 35.808 ; + RECT 0.096 36.480 33.154 36.576 ; + RECT 0.096 37.248 33.154 37.344 ; + RECT 0.096 38.016 33.154 38.112 ; + RECT 0.096 38.784 33.154 38.880 ; + RECT 0.096 39.552 33.154 39.648 ; + RECT 0.096 40.320 33.154 40.416 ; + RECT 0.096 41.088 33.154 41.184 ; + RECT 0.096 41.856 33.154 41.952 ; + RECT 0.096 42.624 33.154 42.720 ; + RECT 0.096 43.392 33.154 43.488 ; + RECT 0.096 44.160 33.154 44.256 ; + RECT 0.096 44.928 33.154 45.024 ; + RECT 0.096 45.696 33.154 45.792 ; + RECT 0.096 46.464 33.154 46.560 ; + RECT 0.096 47.232 33.154 47.328 ; + RECT 0.096 48.000 33.154 48.096 ; + RECT 0.096 48.768 33.154 48.864 ; + RECT 0.096 49.536 33.154 49.632 ; + RECT 0.096 50.304 33.154 50.400 ; + RECT 0.096 51.072 33.154 51.168 ; + RECT 0.096 51.840 33.154 51.936 ; + RECT 0.096 52.608 33.154 52.704 ; + RECT 0.096 53.376 33.154 53.472 ; + RECT 0.096 54.144 33.154 54.240 ; + RECT 0.096 54.912 33.154 55.008 ; + RECT 0.096 55.680 33.154 55.776 ; + RECT 0.096 56.448 33.154 56.544 ; + RECT 0.096 57.216 33.154 57.312 ; + RECT 0.096 57.984 33.154 58.080 ; + RECT 0.096 58.752 33.154 58.848 ; + RECT 0.096 59.520 33.154 59.616 ; + RECT 0.096 60.288 33.154 60.384 ; + RECT 0.096 61.056 33.154 61.152 ; + RECT 0.096 61.824 33.154 61.920 ; + RECT 0.096 62.592 33.154 62.688 ; + RECT 0.096 63.360 33.154 63.456 ; + RECT 0.096 64.128 33.154 64.224 ; + RECT 0.096 64.896 33.154 64.992 ; + RECT 0.096 65.664 33.154 65.760 ; + RECT 0.096 66.432 33.154 66.528 ; + RECT 0.096 67.200 33.154 67.296 ; + RECT 0.096 67.968 33.154 68.064 ; + RECT 0.096 68.736 33.154 68.832 ; + RECT 0.096 69.504 33.154 69.600 ; + RECT 0.096 70.272 33.154 70.368 ; + RECT 0.096 71.040 33.154 71.136 ; + RECT 0.096 71.808 33.154 71.904 ; + RECT 0.096 72.576 33.154 72.672 ; + RECT 0.096 73.344 33.154 73.440 ; + RECT 0.096 74.112 33.154 74.208 ; + RECT 0.096 74.880 33.154 74.976 ; + RECT 0.096 75.648 33.154 75.744 ; + RECT 0.096 76.416 33.154 76.512 ; + RECT 0.096 77.184 33.154 77.280 ; + RECT 0.096 77.952 33.154 78.048 ; + RECT 0.096 78.720 33.154 78.816 ; + RECT 0.096 79.488 33.154 79.584 ; + RECT 0.096 80.256 33.154 80.352 ; + RECT 0.096 81.024 33.154 81.120 ; + RECT 0.096 81.792 33.154 81.888 ; + RECT 0.096 82.560 33.154 82.656 ; + RECT 0.096 83.328 33.154 83.424 ; END END VDD OBS @@ -9657,7 +9657,7 @@ module dprf_256x256 addr_b, din_b, dout_b, - clk, + clk ); parameter DATA_WIDTH = 256; parameter ADDR_WIDTH = 8; @@ -9706,7 +9706,7 @@ module dprf_256x256 ( input [7:0] addr_b, input [255:0] din_b, output reg [255:0] dout_b, - clk, + clk ); endmodule library(dprf_256x256) { @@ -9954,7 +9954,7 @@ cell(dprf_256x256) { } } internal_power(){ - when : "(! (we_in) )"; + when : "(! (we_a) )"; rise_power(dprf_256x256_energy_template_sigslew) { index_1 ("0.009, 0.227"); values ("0.013, 0.013") @@ -9965,7 +9965,7 @@ cell(dprf_256x256) { } } internal_power(){ - when : "(we_in)"; + when : "(we_a)"; rise_power(dprf_256x256_energy_template_sigslew) { index_1 ("0.009, 0.227"); values ("0.013, 0.013") @@ -10164,7 +10164,7 @@ cell(dprf_256x256) { } } internal_power(){ - when : "(! (we_in) )"; + when : "(! (we_b) )"; rise_power(dprf_256x256_energy_template_sigslew) { index_1 ("0.009, 0.227"); values ("0.013, 0.013") @@ -10175,7 +10175,7 @@ cell(dprf_256x256) { } } internal_power(){ - when : "(we_in)"; + when : "(we_b)"; rise_power(dprf_256x256_energy_template_sigslew) { index_1 ("0.009, 0.227"); values ("0.013, 0.013") diff --git a/test/au/dprf_256x32.au b/test/au/dprf_256x32.au index b5a4bc1..22db467 100644 --- a/test/au/dprf_256x32.au +++ b/test/au/dprf_256x32.au @@ -1484,7 +1484,7 @@ module dprf_256x32 addr_b, din_b, dout_b, - clk, + clk ); parameter DATA_WIDTH = 32; parameter ADDR_WIDTH = 8; @@ -1533,7 +1533,7 @@ module dprf_256x32 ( input [7:0] addr_b, input [31:0] din_b, output reg [31:0] dout_b, - clk, + clk ); endmodule library(dprf_256x32) { @@ -1781,7 +1781,7 @@ cell(dprf_256x32) { } } internal_power(){ - when : "(! (we_in) )"; + when : "(! (we_a) )"; rise_power(dprf_256x32_energy_template_sigslew) { index_1 ("0.009, 0.227"); values ("0.013, 0.013") @@ -1792,7 +1792,7 @@ cell(dprf_256x32) { } } internal_power(){ - when : "(we_in)"; + when : "(we_a)"; rise_power(dprf_256x32_energy_template_sigslew) { index_1 ("0.009, 0.227"); values ("0.013, 0.013") @@ -1991,7 +1991,7 @@ cell(dprf_256x32) { } } internal_power(){ - when : "(! (we_in) )"; + when : "(! (we_b) )"; rise_power(dprf_256x32_energy_template_sigslew) { index_1 ("0.009, 0.227"); values ("0.013, 0.013") @@ -2002,7 +2002,7 @@ cell(dprf_256x32) { } } internal_power(){ - when : "(we_in)"; + when : "(we_b)"; rise_power(dprf_256x32_energy_template_sigslew) { index_1 ("0.009, 0.227"); values ("0.013, 0.013") diff --git a/test/au/dprf_256x32_h.au b/test/au/dprf_256x32_h.au new file mode 100644 index 0000000..a9bb02a --- /dev/null +++ b/test/au/dprf_256x32_h.au @@ -0,0 +1,2084 @@ +# Generated by FakeRAM 2.0 +VERSION 5.7 ; +BUSBITCHARS "[]" ; +PROPERTYDEFINITIONS + MACRO width INTEGER ; + MACRO depth INTEGER ; + MACRO banks INTEGER ; +END PROPERTYDEFINITIONS +MACRO dprf_256x32_h + PROPERTY width 32 ; + PROPERTY depth 256 ; + PROPERTY banks 2 ; + FOREIGN dprf_256x32_h 0 0 ; + SYMMETRY X Y R90 ; + SIZE 8.360 BY 47.600 ; + CLASS BLOCK ; + PIN dout_a[0] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 0.048 0.024 0.072 ; + END + END dout_a[0] + PIN dout_a[1] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 0.336 0.024 0.360 ; + END + END dout_a[1] + PIN dout_a[2] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 0.624 0.024 0.648 ; + END + END dout_a[2] + PIN dout_a[3] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 0.912 0.024 0.936 ; + END + END dout_a[3] + PIN dout_a[4] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 1.200 0.024 1.224 ; + END + END dout_a[4] + PIN dout_a[5] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 1.488 0.024 1.512 ; + END + END dout_a[5] + PIN dout_a[6] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 1.776 0.024 1.800 ; + END + END dout_a[6] + PIN dout_a[7] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 2.064 0.024 2.088 ; + END + END dout_a[7] + PIN dout_a[8] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 2.352 0.024 2.376 ; + END + END dout_a[8] + PIN dout_a[9] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 2.640 0.024 2.664 ; + END + END dout_a[9] + PIN dout_a[10] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 2.928 0.024 2.952 ; + END + END dout_a[10] + PIN dout_a[11] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 3.216 0.024 3.240 ; + END + END dout_a[11] + PIN dout_a[12] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 3.504 0.024 3.528 ; + END + END dout_a[12] + PIN dout_a[13] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 3.792 0.024 3.816 ; + END + END dout_a[13] + PIN dout_a[14] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 4.080 0.024 4.104 ; + END + END dout_a[14] + PIN dout_a[15] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 4.368 0.024 4.392 ; + END + END dout_a[15] + PIN dout_a[16] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 4.656 0.024 4.680 ; + END + END dout_a[16] + PIN dout_a[17] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 4.944 0.024 4.968 ; + END + END dout_a[17] + PIN dout_a[18] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 5.232 0.024 5.256 ; + END + END dout_a[18] + PIN dout_a[19] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 5.520 0.024 5.544 ; + END + END dout_a[19] + PIN dout_a[20] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 5.808 0.024 5.832 ; + END + END dout_a[20] + PIN dout_a[21] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 6.096 0.024 6.120 ; + END + END dout_a[21] + PIN dout_a[22] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 6.384 0.024 6.408 ; + END + END dout_a[22] + PIN dout_a[23] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 6.672 0.024 6.696 ; + END + END dout_a[23] + PIN dout_a[24] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 6.960 0.024 6.984 ; + END + END dout_a[24] + PIN dout_a[25] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 7.248 0.024 7.272 ; + END + END dout_a[25] + PIN dout_a[26] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 7.536 0.024 7.560 ; + END + END dout_a[26] + PIN dout_a[27] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 7.824 0.024 7.848 ; + END + END dout_a[27] + PIN dout_a[28] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 8.112 0.024 8.136 ; + END + END dout_a[28] + PIN dout_a[29] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 8.400 0.024 8.424 ; + END + END dout_a[29] + PIN dout_a[30] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 8.688 0.024 8.712 ; + END + END dout_a[30] + PIN dout_a[31] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 8.976 0.024 9.000 ; + END + END dout_a[31] + PIN din_a[0] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 10.944 0.024 10.968 ; + END + END din_a[0] + PIN din_a[1] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 11.232 0.024 11.256 ; + END + END din_a[1] + PIN din_a[2] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 11.520 0.024 11.544 ; + END + END din_a[2] + PIN din_a[3] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 11.808 0.024 11.832 ; + END + END din_a[3] + PIN din_a[4] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 12.096 0.024 12.120 ; + END + END din_a[4] + PIN din_a[5] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 12.384 0.024 12.408 ; + END + END din_a[5] + PIN din_a[6] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 12.672 0.024 12.696 ; + END + END din_a[6] + PIN din_a[7] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 12.960 0.024 12.984 ; + END + END din_a[7] + PIN din_a[8] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 13.248 0.024 13.272 ; + END + END din_a[8] + PIN din_a[9] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 13.536 0.024 13.560 ; + END + END din_a[9] + PIN din_a[10] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 13.824 0.024 13.848 ; + END + END din_a[10] + PIN din_a[11] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 14.112 0.024 14.136 ; + END + END din_a[11] + PIN din_a[12] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 14.400 0.024 14.424 ; + END + END din_a[12] + PIN din_a[13] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 14.688 0.024 14.712 ; + END + END din_a[13] + PIN din_a[14] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 14.976 0.024 15.000 ; + END + END din_a[14] + PIN din_a[15] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 15.264 0.024 15.288 ; + END + END din_a[15] + PIN din_a[16] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 15.552 0.024 15.576 ; + END + END din_a[16] + PIN din_a[17] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 15.840 0.024 15.864 ; + END + END din_a[17] + PIN din_a[18] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 16.128 0.024 16.152 ; + END + END din_a[18] + PIN din_a[19] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 16.416 0.024 16.440 ; + END + END din_a[19] + PIN din_a[20] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 16.704 0.024 16.728 ; + END + END din_a[20] + PIN din_a[21] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 16.992 0.024 17.016 ; + END + END din_a[21] + PIN din_a[22] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 17.280 0.024 17.304 ; + END + END din_a[22] + PIN din_a[23] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 17.568 0.024 17.592 ; + END + END din_a[23] + PIN din_a[24] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 17.856 0.024 17.880 ; + END + END din_a[24] + PIN din_a[25] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 18.144 0.024 18.168 ; + END + END din_a[25] + PIN din_a[26] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 18.432 0.024 18.456 ; + END + END din_a[26] + PIN din_a[27] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 18.720 0.024 18.744 ; + END + END din_a[27] + PIN din_a[28] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 19.008 0.024 19.032 ; + END + END din_a[28] + PIN din_a[29] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 19.296 0.024 19.320 ; + END + END din_a[29] + PIN din_a[30] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 19.584 0.024 19.608 ; + END + END din_a[30] + PIN din_a[31] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 19.872 0.024 19.896 ; + END + END din_a[31] + PIN addr_a[0] + DIRECTION INPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 21.840 0.024 21.864 ; + END + END addr_a[0] + PIN addr_a[1] + DIRECTION INPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 22.128 0.024 22.152 ; + END + END addr_a[1] + PIN addr_a[2] + DIRECTION INPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 22.416 0.024 22.440 ; + END + END addr_a[2] + PIN addr_a[3] + DIRECTION INPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 22.704 0.024 22.728 ; + END + END addr_a[3] + PIN addr_a[4] + DIRECTION INPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 22.992 0.024 23.016 ; + END + END addr_a[4] + PIN addr_a[5] + DIRECTION INPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 23.280 0.024 23.304 ; + END + END addr_a[5] + PIN addr_a[6] + DIRECTION INPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 23.568 0.024 23.592 ; + END + END addr_a[6] + PIN addr_a[7] + DIRECTION INPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 23.856 0.024 23.880 ; + END + END addr_a[7] + PIN dout_b[0] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 25.824 0.024 25.848 ; + END + END dout_b[0] + PIN dout_b[1] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 26.112 0.024 26.136 ; + END + END dout_b[1] + PIN dout_b[2] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 26.400 0.024 26.424 ; + END + END dout_b[2] + PIN dout_b[3] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 26.688 0.024 26.712 ; + END + END dout_b[3] + PIN dout_b[4] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 26.976 0.024 27.000 ; + END + END dout_b[4] + PIN dout_b[5] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 27.264 0.024 27.288 ; + END + END dout_b[5] + PIN dout_b[6] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 27.552 0.024 27.576 ; + END + END dout_b[6] + PIN dout_b[7] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 27.840 0.024 27.864 ; + END + END dout_b[7] + PIN dout_b[8] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 28.128 0.024 28.152 ; + END + END dout_b[8] + PIN dout_b[9] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 28.416 0.024 28.440 ; + END + END dout_b[9] + PIN dout_b[10] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 28.704 0.024 28.728 ; + END + END dout_b[10] + PIN dout_b[11] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 28.992 0.024 29.016 ; + END + END dout_b[11] + PIN dout_b[12] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 29.280 0.024 29.304 ; + END + END dout_b[12] + PIN dout_b[13] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 29.568 0.024 29.592 ; + END + END dout_b[13] + PIN dout_b[14] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 29.856 0.024 29.880 ; + END + END dout_b[14] + PIN dout_b[15] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 30.144 0.024 30.168 ; + END + END dout_b[15] + PIN dout_b[16] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 30.432 0.024 30.456 ; + END + END dout_b[16] + PIN dout_b[17] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 30.720 0.024 30.744 ; + END + END dout_b[17] + PIN dout_b[18] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 31.008 0.024 31.032 ; + END + END dout_b[18] + PIN dout_b[19] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 31.296 0.024 31.320 ; + END + END dout_b[19] + PIN dout_b[20] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 31.584 0.024 31.608 ; + END + END dout_b[20] + PIN dout_b[21] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 31.872 0.024 31.896 ; + END + END dout_b[21] + PIN dout_b[22] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 32.160 0.024 32.184 ; + END + END dout_b[22] + PIN dout_b[23] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 32.448 0.024 32.472 ; + END + END dout_b[23] + PIN dout_b[24] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 32.736 0.024 32.760 ; + END + END dout_b[24] + PIN dout_b[25] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 33.024 0.024 33.048 ; + END + END dout_b[25] + PIN dout_b[26] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 33.312 0.024 33.336 ; + END + END dout_b[26] + PIN dout_b[27] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 33.600 0.024 33.624 ; + END + END dout_b[27] + PIN dout_b[28] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 33.888 0.024 33.912 ; + END + END dout_b[28] + PIN dout_b[29] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 34.176 0.024 34.200 ; + END + END dout_b[29] + PIN dout_b[30] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 34.464 0.024 34.488 ; + END + END dout_b[30] + PIN dout_b[31] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 34.752 0.024 34.776 ; + END + END dout_b[31] + PIN din_b[0] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 36.720 0.024 36.744 ; + END + END din_b[0] + PIN din_b[1] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 37.008 0.024 37.032 ; + END + END din_b[1] + PIN din_b[2] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 37.296 0.024 37.320 ; + END + END din_b[2] + PIN din_b[3] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 37.584 0.024 37.608 ; + END + END din_b[3] + PIN din_b[4] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 37.872 0.024 37.896 ; + END + END din_b[4] + PIN din_b[5] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 38.160 0.024 38.184 ; + END + END din_b[5] + PIN din_b[6] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 38.448 0.024 38.472 ; + END + END din_b[6] + PIN din_b[7] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 38.736 0.024 38.760 ; + END + END din_b[7] + PIN din_b[8] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 39.024 0.024 39.048 ; + END + END din_b[8] + PIN din_b[9] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 39.312 0.024 39.336 ; + END + END din_b[9] + PIN din_b[10] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 39.600 0.024 39.624 ; + END + END din_b[10] + PIN din_b[11] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 39.888 0.024 39.912 ; + END + END din_b[11] + PIN din_b[12] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 40.176 0.024 40.200 ; + END + END din_b[12] + PIN din_b[13] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 40.464 0.024 40.488 ; + END + END din_b[13] + PIN din_b[14] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 40.752 0.024 40.776 ; + END + END din_b[14] + PIN din_b[15] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 41.040 0.024 41.064 ; + END + END din_b[15] + PIN din_b[16] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 41.328 0.024 41.352 ; + END + END din_b[16] + PIN din_b[17] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 41.616 0.024 41.640 ; + END + END din_b[17] + PIN din_b[18] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 41.904 0.024 41.928 ; + END + END din_b[18] + PIN din_b[19] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 42.192 0.024 42.216 ; + END + END din_b[19] + PIN din_b[20] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 42.480 0.024 42.504 ; + END + END din_b[20] + PIN din_b[21] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 42.768 0.024 42.792 ; + END + END din_b[21] + PIN din_b[22] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 43.056 0.024 43.080 ; + END + END din_b[22] + PIN din_b[23] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 43.344 0.024 43.368 ; + END + END din_b[23] + PIN din_b[24] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 43.632 0.024 43.656 ; + END + END din_b[24] + PIN din_b[25] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 43.920 0.024 43.944 ; + END + END din_b[25] + PIN din_b[26] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 44.208 0.024 44.232 ; + END + END din_b[26] + PIN din_b[27] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 44.496 0.024 44.520 ; + END + END din_b[27] + PIN din_b[28] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 44.784 0.024 44.808 ; + END + END din_b[28] + PIN din_b[29] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 45.072 0.024 45.096 ; + END + END din_b[29] + PIN din_b[30] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 45.360 0.024 45.384 ; + END + END din_b[30] + PIN din_b[31] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 45.648 0.024 45.672 ; + END + END din_b[31] + PIN addr_b[0] + DIRECTION INPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 47.616 0.024 47.640 ; + END + END addr_b[0] + PIN addr_b[1] + DIRECTION INPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 47.904 0.024 47.928 ; + END + END addr_b[1] + PIN addr_b[2] + DIRECTION INPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 48.192 0.024 48.216 ; + END + END addr_b[2] + PIN addr_b[3] + DIRECTION INPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 48.480 0.024 48.504 ; + END + END addr_b[3] + PIN addr_b[4] + DIRECTION INPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 48.768 0.024 48.792 ; + END + END addr_b[4] + PIN addr_b[5] + DIRECTION INPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 49.056 0.024 49.080 ; + END + END addr_b[5] + PIN addr_b[6] + DIRECTION INPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 49.344 0.024 49.368 ; + END + END addr_b[6] + PIN addr_b[7] + DIRECTION INPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 49.632 0.024 49.656 ; + END + END addr_b[7] + PIN we_a + DIRECTION INPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 51.600 0.024 51.624 ; + END + END we_a + PIN we_b + DIRECTION INPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 51.888 0.024 51.912 ; + END + END we_b + PIN clk + DIRECTION INPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 52.176 0.024 52.200 ; + END + END clk + PIN VSS + DIRECTION INOUT ; + USE GROUND ; + PORT + LAYER M4 ; + RECT 0.048 0.000 8.312 0.096 ; + RECT 0.048 0.768 8.312 0.864 ; + RECT 0.048 1.536 8.312 1.632 ; + RECT 0.048 2.304 8.312 2.400 ; + RECT 0.048 3.072 8.312 3.168 ; + RECT 0.048 3.840 8.312 3.936 ; + RECT 0.048 4.608 8.312 4.704 ; + RECT 0.048 5.376 8.312 5.472 ; + RECT 0.048 6.144 8.312 6.240 ; + RECT 0.048 6.912 8.312 7.008 ; + RECT 0.048 7.680 8.312 7.776 ; + RECT 0.048 8.448 8.312 8.544 ; + RECT 0.048 9.216 8.312 9.312 ; + RECT 0.048 9.984 8.312 10.080 ; + RECT 0.048 10.752 8.312 10.848 ; + RECT 0.048 11.520 8.312 11.616 ; + RECT 0.048 12.288 8.312 12.384 ; + RECT 0.048 13.056 8.312 13.152 ; + RECT 0.048 13.824 8.312 13.920 ; + RECT 0.048 14.592 8.312 14.688 ; + RECT 0.048 15.360 8.312 15.456 ; + RECT 0.048 16.128 8.312 16.224 ; + RECT 0.048 16.896 8.312 16.992 ; + RECT 0.048 17.664 8.312 17.760 ; + RECT 0.048 18.432 8.312 18.528 ; + RECT 0.048 19.200 8.312 19.296 ; + RECT 0.048 19.968 8.312 20.064 ; + RECT 0.048 20.736 8.312 20.832 ; + RECT 0.048 21.504 8.312 21.600 ; + RECT 0.048 22.272 8.312 22.368 ; + RECT 0.048 23.040 8.312 23.136 ; + RECT 0.048 23.808 8.312 23.904 ; + RECT 0.048 24.576 8.312 24.672 ; + RECT 0.048 25.344 8.312 25.440 ; + RECT 0.048 26.112 8.312 26.208 ; + RECT 0.048 26.880 8.312 26.976 ; + RECT 0.048 27.648 8.312 27.744 ; + RECT 0.048 28.416 8.312 28.512 ; + RECT 0.048 29.184 8.312 29.280 ; + RECT 0.048 29.952 8.312 30.048 ; + RECT 0.048 30.720 8.312 30.816 ; + RECT 0.048 31.488 8.312 31.584 ; + RECT 0.048 32.256 8.312 32.352 ; + RECT 0.048 33.024 8.312 33.120 ; + RECT 0.048 33.792 8.312 33.888 ; + RECT 0.048 34.560 8.312 34.656 ; + RECT 0.048 35.328 8.312 35.424 ; + RECT 0.048 36.096 8.312 36.192 ; + RECT 0.048 36.864 8.312 36.960 ; + RECT 0.048 37.632 8.312 37.728 ; + RECT 0.048 38.400 8.312 38.496 ; + RECT 0.048 39.168 8.312 39.264 ; + RECT 0.048 39.936 8.312 40.032 ; + RECT 0.048 40.704 8.312 40.800 ; + RECT 0.048 41.472 8.312 41.568 ; + RECT 0.048 42.240 8.312 42.336 ; + RECT 0.048 43.008 8.312 43.104 ; + RECT 0.048 43.776 8.312 43.872 ; + RECT 0.048 44.544 8.312 44.640 ; + RECT 0.048 45.312 8.312 45.408 ; + RECT 0.048 46.080 8.312 46.176 ; + RECT 0.048 46.848 8.312 46.944 ; + END + END VSS + PIN VDD + DIRECTION INOUT ; + USE POWER ; + PORT + LAYER M4 ; + RECT 0.048 0.384 8.312 0.480 ; + RECT 0.048 1.152 8.312 1.248 ; + RECT 0.048 1.920 8.312 2.016 ; + RECT 0.048 2.688 8.312 2.784 ; + RECT 0.048 3.456 8.312 3.552 ; + RECT 0.048 4.224 8.312 4.320 ; + RECT 0.048 4.992 8.312 5.088 ; + RECT 0.048 5.760 8.312 5.856 ; + RECT 0.048 6.528 8.312 6.624 ; + RECT 0.048 7.296 8.312 7.392 ; + RECT 0.048 8.064 8.312 8.160 ; + RECT 0.048 8.832 8.312 8.928 ; + RECT 0.048 9.600 8.312 9.696 ; + RECT 0.048 10.368 8.312 10.464 ; + RECT 0.048 11.136 8.312 11.232 ; + RECT 0.048 11.904 8.312 12.000 ; + RECT 0.048 12.672 8.312 12.768 ; + RECT 0.048 13.440 8.312 13.536 ; + RECT 0.048 14.208 8.312 14.304 ; + RECT 0.048 14.976 8.312 15.072 ; + RECT 0.048 15.744 8.312 15.840 ; + RECT 0.048 16.512 8.312 16.608 ; + RECT 0.048 17.280 8.312 17.376 ; + RECT 0.048 18.048 8.312 18.144 ; + RECT 0.048 18.816 8.312 18.912 ; + RECT 0.048 19.584 8.312 19.680 ; + RECT 0.048 20.352 8.312 20.448 ; + RECT 0.048 21.120 8.312 21.216 ; + RECT 0.048 21.888 8.312 21.984 ; + RECT 0.048 22.656 8.312 22.752 ; + RECT 0.048 23.424 8.312 23.520 ; + RECT 0.048 24.192 8.312 24.288 ; + RECT 0.048 24.960 8.312 25.056 ; + RECT 0.048 25.728 8.312 25.824 ; + RECT 0.048 26.496 8.312 26.592 ; + RECT 0.048 27.264 8.312 27.360 ; + RECT 0.048 28.032 8.312 28.128 ; + RECT 0.048 28.800 8.312 28.896 ; + RECT 0.048 29.568 8.312 29.664 ; + RECT 0.048 30.336 8.312 30.432 ; + RECT 0.048 31.104 8.312 31.200 ; + RECT 0.048 31.872 8.312 31.968 ; + RECT 0.048 32.640 8.312 32.736 ; + RECT 0.048 33.408 8.312 33.504 ; + RECT 0.048 34.176 8.312 34.272 ; + RECT 0.048 34.944 8.312 35.040 ; + RECT 0.048 35.712 8.312 35.808 ; + RECT 0.048 36.480 8.312 36.576 ; + RECT 0.048 37.248 8.312 37.344 ; + RECT 0.048 38.016 8.312 38.112 ; + RECT 0.048 38.784 8.312 38.880 ; + RECT 0.048 39.552 8.312 39.648 ; + RECT 0.048 40.320 8.312 40.416 ; + RECT 0.048 41.088 8.312 41.184 ; + RECT 0.048 41.856 8.312 41.952 ; + RECT 0.048 42.624 8.312 42.720 ; + RECT 0.048 43.392 8.312 43.488 ; + RECT 0.048 44.160 8.312 44.256 ; + RECT 0.048 44.928 8.312 45.024 ; + RECT 0.048 45.696 8.312 45.792 ; + RECT 0.048 46.464 8.312 46.560 ; + RECT 0.048 47.232 8.312 47.328 ; + END + END VDD + OBS + LAYER M1 ; + RECT 0 0 8.360 47.600 ; + LAYER M2 ; + RECT 0 0 8.360 47.600 ; + LAYER M3 ; + RECT 0 0 8.360 47.600 ; + LAYER M4 ; + RECT 0 0 8.360 47.600 ; + END +END dprf_256x32_h + +END LIBRARY +module dprf_256x32_h +( + we_a, + addr_a, + din_a, + dout_a, + we_b, + addr_b, + din_b, + dout_b, + clk +); + parameter DATA_WIDTH = 32; + parameter ADDR_WIDTH = 8; + + // Port A + input wire we_a, + input wire [ADDR_WIDTH-1:0] addr_a, + input wire [DATA_WIDTH-1:0] din_a, + output reg [DATA_WIDTH-1:0] dout_a, + + // Port B + input wire we_b, + input wire [ADDR_WIDTH-1:0] addr_b, + input wire [DATA_WIDTH-1:0] din_b, + output reg [DATA_WIDTH-1:0] dout_b, + + input wire clk, + + // Memory array: 256 words of 32 bits + reg [DATA_WIDTH-1:0] mem [0:(1 << ADDR_WIDTH)-1]; + + // Synchronous Port A + always @(posedge clk) begin + if (we_a) begin + mem[addr_a] <= din_a; + end + dout_a <= mem[addr_a]; // Read occurs after write (read-after-write OK) + end + + // Synchronous Port B + always @(posedge clk) begin + if (we_b) begin + mem[addr_b] <= din_b; + end + dout_b <= mem[addr_b]; // Read occurs after write (read-after-write OK) + end + +endmodule +(* blackbox *) +module dprf_256x32_h ( + input we_a, + input [7:0] addr_a, + input [31:0] din_a, + output reg [31:0] dout_a, + input we_b, + input [7:0] addr_b, + input [31:0] din_b, + output reg [31:0] dout_b, + clk +); +endmodule +library(dprf_256x32_h) { + technology (cmos); + delay_model : table_lookup; + revision : 1.0; + comment : "SRAM"; + time_unit : "1ns"; + voltage_unit : "1V"; + current_unit : "1uA"; + leakage_power_unit : "1uW"; + nom_process : 1; + nom_temperature : 25.000; + nom_voltage : 0.7; + capacitive_load_unit (1,pf); + + pulling_resistance_unit : "1kohm"; + + operating_conditions(tt_1.0_25.0) { + process : 1; + temperature : 25.000; + voltage : 0.7; + tree_type : balanced_tree; + } + + /* default attributes */ + default_cell_leakage_power : 0; + default_fanout_load : 1; + default_inout_pin_cap : 0.0; + default_input_pin_cap : 0.0; + default_output_pin_cap : 0.0; + default_input_pin_cap : 0.0; + default_max_transition : 0.227; + + default_operating_conditions : tt_1.0_25.0; + default_leakage_power_density : 0.0; + + /* additional header data */ + slew_derate_from_library : 1.000; + slew_lower_threshold_pct_fall : 20.000; + slew_upper_threshold_pct_fall : 80.000; + slew_lower_threshold_pct_rise : 20.000; + slew_upper_threshold_pct_rise : 80.000; + input_threshold_pct_fall : 50.000; + input_threshold_pct_rise : 50.000; + output_threshold_pct_fall : 50.000; + output_threshold_pct_rise : 50.000; + + + lu_table_template(dprf_256x32_h_mem_out_delay_template) { + variable_1 : input_net_transition; + variable_2 : total_output_net_capacitance; + index_1 ("1000, 1001"); + index_2 ("1000, 1001"); + } + lu_table_template(dprf_256x32_h_mem_out_slew_template) { + variable_1 : total_output_net_capacitance; + index_1 ("1000, 1001"); + } + lu_table_template(dprf_256x32_h_constraint_template) { + variable_1 : related_pin_transition; + variable_2 : constrained_pin_transition; + index_1 ("1000, 1001"); + index_2 ("1000, 1001"); + } + power_lut_template(dprf_256x32_h_energy_template_clkslew) { + variable_1 : input_transition_time; + index_1 ("1000, 1001"); + } + power_lut_template(dprf_256x32_h_energy_template_sigslew) { + variable_1 : input_transition_time; + index_1 ("1000, 1001"); + } + library_features(report_delay_calculation); + type (dprf_256x32_h_DATA) { + base_type : array ; + data_type : bit ; + bit_width : 32; + bit_from : 31; + bit_to : 0 ; + downto : true ; + } + type (dprf_256x32_h_ADDRESS) { + base_type : array ; + data_type : bit ; + bit_width : 8; + bit_from : 7; + bit_to : 0 ; + downto : true ; + } +cell(dprf_256x32_h) { + area : 385.457; + interface_timing : true; + pin(we_a){ + direction : input; + capacitance : 0.005; + timing() { + related_pin : clk; + timing_type : setup_rising ; + rise_constraint(dprf_256x32_h_constraint_template) { + index_1 ("0.009, 0.227"); + index_2 ("0.009, 0.227"); + values ( \ + "0.050, 0.050", \ + "0.050, 0.050" \ + ) + } + fall_constraint(dprf_256x32_h_constraint_template) { + index_1 ("0.009, 0.227"); + index_2 ("0.009, 0.227"); + values ( \ + "0.050, 0.050", \ + "0.050, 0.050" \ + ) + } + } + timing() { + related_pin : clk; + timing_type : hold_rising ; + rise_constraint(dprf_256x32_h_constraint_template) { + index_1 ("0.009, 0.227"); + index_2 ("0.009, 0.227"); + values ( \ + "0.050, 0.050", \ + "0.050, 0.050" \ + ) + } + fall_constraint(dprf_256x32_h_constraint_template) { + index_1 ("0.009, 0.227"); + index_2 ("0.009, 0.227"); + values ( \ + "0.050, 0.050", \ + "0.050, 0.050" \ + ) + } + } + internal_power(){ + rise_power(dprf_256x32_h_energy_template_sigslew) { + index_1 ("0.009, 0.227"); + values ("0.013, 0.013") + } + fall_power(dprf_256x32_h_energy_template_sigslew) { + index_1 ("0.009, 0.227"); + values ("0.013, 0.013") + } + } + } + bus(addr_a) { + bus_type : dprf_256x32_h_ADDRESS; + direction : input; + capacitance : 0.005; + timing() { + related_pin : clk; + timing_type : setup_rising ; + rise_constraint(dprf_256x32_h_constraint_template) { + index_1 ("0.009, 0.227"); + index_2 ("0.009, 0.227"); + values ( \ + "0.050, 0.050", \ + "0.050, 0.050" \ + ) + } + fall_constraint(dprf_256x32_h_constraint_template) { + index_1 ("0.009, 0.227"); + index_2 ("0.009, 0.227"); + values ( \ + "0.050, 0.050", \ + "0.050, 0.050" \ + ) + } + } + timing() { + related_pin : clk; + timing_type : hold_rising ; + rise_constraint(dprf_256x32_h_constraint_template) { + index_1 ("0.009, 0.227"); + index_2 ("0.009, 0.227"); + values ( \ + "0.050, 0.050", \ + "0.050, 0.050" \ + ) + } + fall_constraint(dprf_256x32_h_constraint_template) { + index_1 ("0.009, 0.227"); + index_2 ("0.009, 0.227"); + values ( \ + "0.050, 0.050", \ + "0.050, 0.050" \ + ) + } + } + internal_power(){ + rise_power(dprf_256x32_h_energy_template_sigslew) { + index_1 ("0.009, 0.227"); + values ("0.013, 0.013") + } + fall_power(dprf_256x32_h_energy_template_sigslew) { + index_1 ("0.009, 0.227"); + values ("0.013, 0.013") + } + } + } + bus(din_a) { + bus_type : dprf_256x32_h_DATA; + direction : input; + capacitance : 0.005; + timing() { + related_pin : clk; + timing_type : setup_rising ; + rise_constraint(dprf_256x32_h_constraint_template) { + index_1 ("0.009, 0.227"); + index_2 ("0.009, 0.227"); + values ( \ + "0.050, 0.050", \ + "0.050, 0.050" \ + ) + } + fall_constraint(dprf_256x32_h_constraint_template) { + index_1 ("0.009, 0.227"); + index_2 ("0.009, 0.227"); + values ( \ + "0.050, 0.050", \ + "0.050, 0.050" \ + ) + } + } + timing() { + related_pin : clk; + timing_type : hold_rising ; + rise_constraint(dprf_256x32_h_constraint_template) { + index_1 ("0.009, 0.227"); + index_2 ("0.009, 0.227"); + values ( \ + "0.050, 0.050", \ + "0.050, 0.050" \ + ) + } + fall_constraint(dprf_256x32_h_constraint_template) { + index_1 ("0.009, 0.227"); + index_2 ("0.009, 0.227"); + values ( \ + "0.050, 0.050", \ + "0.050, 0.050" \ + ) + } + } + internal_power(){ + when : "(! (we_a) )"; + rise_power(dprf_256x32_h_energy_template_sigslew) { + index_1 ("0.009, 0.227"); + values ("0.013, 0.013") + } + fall_power(dprf_256x32_h_energy_template_sigslew) { + index_1 ("0.009, 0.227"); + values ("0.013, 0.013") + } + } + internal_power(){ + when : "(we_a)"; + rise_power(dprf_256x32_h_energy_template_sigslew) { + index_1 ("0.009, 0.227"); + values ("0.013, 0.013") + } + fall_power(dprf_256x32_h_energy_template_sigslew) { + index_1 ("0.009, 0.227"); + values ("0.013, 0.013") + } + } + } + bus(dout_a) { + bus_type : dprf_256x32_h_DATA; + direction : output; + max_capacitance : 0.500; + timing() { + related_pin : "clk" ; + timing_type : rising_edge; + timing_sense : non_unate; + cell_rise(dprf_256x32_h_mem_out_delay_template) { + index_1 ("0.009, 0.227"); + index_2 ("0.005, 0.500"); + values ( \ + "0.218, 0.218", \ + "0.218, 0.218" \ + ) + } + cell_fall(dprf_256x32_h_mem_out_delay_template) { + index_1 ("0.009, 0.227"); + index_2 ("0.005, 0.500"); + values ( \ + "0.218, 0.218", \ + "0.218, 0.218" \ + ) + } + rise_transition(dprf_256x32_h_mem_out_slew_template) { + index_1 ("0.005, 0.500"); + values ("0.009, 0.227") + } + fall_transition(dprf_256x32_h_mem_out_slew_template) { + index_1 ("0.005, 0.500"); + values ("0.009, 0.227") + } + } + } + pin(we_b){ + direction : input; + capacitance : 0.005; + timing() { + related_pin : clk; + timing_type : setup_rising ; + rise_constraint(dprf_256x32_h_constraint_template) { + index_1 ("0.009, 0.227"); + index_2 ("0.009, 0.227"); + values ( \ + "0.050, 0.050", \ + "0.050, 0.050" \ + ) + } + fall_constraint(dprf_256x32_h_constraint_template) { + index_1 ("0.009, 0.227"); + index_2 ("0.009, 0.227"); + values ( \ + "0.050, 0.050", \ + "0.050, 0.050" \ + ) + } + } + timing() { + related_pin : clk; + timing_type : hold_rising ; + rise_constraint(dprf_256x32_h_constraint_template) { + index_1 ("0.009, 0.227"); + index_2 ("0.009, 0.227"); + values ( \ + "0.050, 0.050", \ + "0.050, 0.050" \ + ) + } + fall_constraint(dprf_256x32_h_constraint_template) { + index_1 ("0.009, 0.227"); + index_2 ("0.009, 0.227"); + values ( \ + "0.050, 0.050", \ + "0.050, 0.050" \ + ) + } + } + internal_power(){ + rise_power(dprf_256x32_h_energy_template_sigslew) { + index_1 ("0.009, 0.227"); + values ("0.013, 0.013") + } + fall_power(dprf_256x32_h_energy_template_sigslew) { + index_1 ("0.009, 0.227"); + values ("0.013, 0.013") + } + } + } + bus(addr_b) { + bus_type : dprf_256x32_h_ADDRESS; + direction : input; + capacitance : 0.005; + timing() { + related_pin : clk; + timing_type : setup_rising ; + rise_constraint(dprf_256x32_h_constraint_template) { + index_1 ("0.009, 0.227"); + index_2 ("0.009, 0.227"); + values ( \ + "0.050, 0.050", \ + "0.050, 0.050" \ + ) + } + fall_constraint(dprf_256x32_h_constraint_template) { + index_1 ("0.009, 0.227"); + index_2 ("0.009, 0.227"); + values ( \ + "0.050, 0.050", \ + "0.050, 0.050" \ + ) + } + } + timing() { + related_pin : clk; + timing_type : hold_rising ; + rise_constraint(dprf_256x32_h_constraint_template) { + index_1 ("0.009, 0.227"); + index_2 ("0.009, 0.227"); + values ( \ + "0.050, 0.050", \ + "0.050, 0.050" \ + ) + } + fall_constraint(dprf_256x32_h_constraint_template) { + index_1 ("0.009, 0.227"); + index_2 ("0.009, 0.227"); + values ( \ + "0.050, 0.050", \ + "0.050, 0.050" \ + ) + } + } + internal_power(){ + rise_power(dprf_256x32_h_energy_template_sigslew) { + index_1 ("0.009, 0.227"); + values ("0.013, 0.013") + } + fall_power(dprf_256x32_h_energy_template_sigslew) { + index_1 ("0.009, 0.227"); + values ("0.013, 0.013") + } + } + } + bus(din_b) { + bus_type : dprf_256x32_h_DATA; + direction : input; + capacitance : 0.005; + timing() { + related_pin : clk; + timing_type : setup_rising ; + rise_constraint(dprf_256x32_h_constraint_template) { + index_1 ("0.009, 0.227"); + index_2 ("0.009, 0.227"); + values ( \ + "0.050, 0.050", \ + "0.050, 0.050" \ + ) + } + fall_constraint(dprf_256x32_h_constraint_template) { + index_1 ("0.009, 0.227"); + index_2 ("0.009, 0.227"); + values ( \ + "0.050, 0.050", \ + "0.050, 0.050" \ + ) + } + } + timing() { + related_pin : clk; + timing_type : hold_rising ; + rise_constraint(dprf_256x32_h_constraint_template) { + index_1 ("0.009, 0.227"); + index_2 ("0.009, 0.227"); + values ( \ + "0.050, 0.050", \ + "0.050, 0.050" \ + ) + } + fall_constraint(dprf_256x32_h_constraint_template) { + index_1 ("0.009, 0.227"); + index_2 ("0.009, 0.227"); + values ( \ + "0.050, 0.050", \ + "0.050, 0.050" \ + ) + } + } + internal_power(){ + when : "(! (we_b) )"; + rise_power(dprf_256x32_h_energy_template_sigslew) { + index_1 ("0.009, 0.227"); + values ("0.013, 0.013") + } + fall_power(dprf_256x32_h_energy_template_sigslew) { + index_1 ("0.009, 0.227"); + values ("0.013, 0.013") + } + } + internal_power(){ + when : "(we_b)"; + rise_power(dprf_256x32_h_energy_template_sigslew) { + index_1 ("0.009, 0.227"); + values ("0.013, 0.013") + } + fall_power(dprf_256x32_h_energy_template_sigslew) { + index_1 ("0.009, 0.227"); + values ("0.013, 0.013") + } + } + } + bus(dout_b) { + bus_type : dprf_256x32_h_DATA; + direction : output; + max_capacitance : 0.500; + timing() { + related_pin : "clk" ; + timing_type : rising_edge; + timing_sense : non_unate; + cell_rise(dprf_256x32_h_mem_out_delay_template) { + index_1 ("0.009, 0.227"); + index_2 ("0.005, 0.500"); + values ( \ + "0.218, 0.218", \ + "0.218, 0.218" \ + ) + } + cell_fall(dprf_256x32_h_mem_out_delay_template) { + index_1 ("0.009, 0.227"); + index_2 ("0.005, 0.500"); + values ( \ + "0.218, 0.218", \ + "0.218, 0.218" \ + ) + } + rise_transition(dprf_256x32_h_mem_out_slew_template) { + index_1 ("0.005, 0.500"); + values ("0.009, 0.227") + } + fall_transition(dprf_256x32_h_mem_out_slew_template) { + index_1 ("0.005, 0.500"); + values ("0.009, 0.227") + } + } + } + pin(clk) { + direction : input; + capacitance : 0.025; + clock : true; + min_period : 0.157 ; + internal_power(){ + rise_power(dprf_256x32_h_energy_template_clkslew) { + index_1 ("0.009, 0.227"); + values ("1.345, 1.345") + } + fall_power(dprf_256x32_h_energy_template_clkslew) { + index_1 ("0.009, 0.227"); + values ("1.345, 1.345") + } + } + } + + cell_leakage_power : 128.900; +} + +} diff --git a/test/au/dpsram_256x256.au b/test/au/dpsram_256x256.au index 4278c3e..91e9732 100644 --- a/test/au/dpsram_256x256.au +++ b/test/au/dpsram_256x256.au @@ -20,7 +20,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 0.048 0.024 0.072 ; + RECT 0.000 0.048 0.036 0.072 ; END END dout_a[0] PIN dout_a[1] @@ -29,7 +29,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 0.096 0.024 0.120 ; + RECT 0.000 0.096 0.036 0.120 ; END END dout_a[1] PIN dout_a[2] @@ -38,7 +38,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 0.144 0.024 0.168 ; + RECT 0.000 0.144 0.036 0.168 ; END END dout_a[2] PIN dout_a[3] @@ -47,7 +47,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 0.192 0.024 0.216 ; + RECT 0.000 0.192 0.036 0.216 ; END END dout_a[3] PIN dout_a[4] @@ -56,7 +56,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 0.240 0.024 0.264 ; + RECT 0.000 0.240 0.036 0.264 ; END END dout_a[4] PIN dout_a[5] @@ -65,7 +65,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 0.288 0.024 0.312 ; + RECT 0.000 0.288 0.036 0.312 ; END END dout_a[5] PIN dout_a[6] @@ -74,7 +74,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 0.336 0.024 0.360 ; + RECT 0.000 0.336 0.036 0.360 ; END END dout_a[6] PIN dout_a[7] @@ -83,7 +83,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 0.384 0.024 0.408 ; + RECT 0.000 0.384 0.036 0.408 ; END END dout_a[7] PIN dout_a[8] @@ -92,7 +92,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 0.432 0.024 0.456 ; + RECT 0.000 0.432 0.036 0.456 ; END END dout_a[8] PIN dout_a[9] @@ -101,7 +101,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 0.480 0.024 0.504 ; + RECT 0.000 0.480 0.036 0.504 ; END END dout_a[9] PIN dout_a[10] @@ -110,7 +110,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 0.528 0.024 0.552 ; + RECT 0.000 0.528 0.036 0.552 ; END END dout_a[10] PIN dout_a[11] @@ -119,7 +119,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 0.576 0.024 0.600 ; + RECT 0.000 0.576 0.036 0.600 ; END END dout_a[11] PIN dout_a[12] @@ -128,7 +128,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 0.624 0.024 0.648 ; + RECT 0.000 0.624 0.036 0.648 ; END END dout_a[12] PIN dout_a[13] @@ -137,7 +137,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 0.672 0.024 0.696 ; + RECT 0.000 0.672 0.036 0.696 ; END END dout_a[13] PIN dout_a[14] @@ -146,7 +146,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 0.720 0.024 0.744 ; + RECT 0.000 0.720 0.036 0.744 ; END END dout_a[14] PIN dout_a[15] @@ -155,7 +155,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 0.768 0.024 0.792 ; + RECT 0.000 0.768 0.036 0.792 ; END END dout_a[15] PIN dout_a[16] @@ -164,7 +164,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 0.816 0.024 0.840 ; + RECT 0.000 0.816 0.036 0.840 ; END END dout_a[16] PIN dout_a[17] @@ -173,7 +173,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 0.864 0.024 0.888 ; + RECT 0.000 0.864 0.036 0.888 ; END END dout_a[17] PIN dout_a[18] @@ -182,7 +182,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 0.912 0.024 0.936 ; + RECT 0.000 0.912 0.036 0.936 ; END END dout_a[18] PIN dout_a[19] @@ -191,7 +191,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 0.960 0.024 0.984 ; + RECT 0.000 0.960 0.036 0.984 ; END END dout_a[19] PIN dout_a[20] @@ -200,7 +200,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 1.008 0.024 1.032 ; + RECT 0.000 1.008 0.036 1.032 ; END END dout_a[20] PIN dout_a[21] @@ -209,7 +209,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 1.056 0.024 1.080 ; + RECT 0.000 1.056 0.036 1.080 ; END END dout_a[21] PIN dout_a[22] @@ -218,7 +218,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 1.104 0.024 1.128 ; + RECT 0.000 1.104 0.036 1.128 ; END END dout_a[22] PIN dout_a[23] @@ -227,7 +227,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 1.152 0.024 1.176 ; + RECT 0.000 1.152 0.036 1.176 ; END END dout_a[23] PIN dout_a[24] @@ -236,7 +236,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 1.200 0.024 1.224 ; + RECT 0.000 1.200 0.036 1.224 ; END END dout_a[24] PIN dout_a[25] @@ -245,7 +245,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 1.248 0.024 1.272 ; + RECT 0.000 1.248 0.036 1.272 ; END END dout_a[25] PIN dout_a[26] @@ -254,7 +254,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 1.296 0.024 1.320 ; + RECT 0.000 1.296 0.036 1.320 ; END END dout_a[26] PIN dout_a[27] @@ -263,7 +263,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 1.344 0.024 1.368 ; + RECT 0.000 1.344 0.036 1.368 ; END END dout_a[27] PIN dout_a[28] @@ -272,7 +272,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 1.392 0.024 1.416 ; + RECT 0.000 1.392 0.036 1.416 ; END END dout_a[28] PIN dout_a[29] @@ -281,7 +281,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 1.440 0.024 1.464 ; + RECT 0.000 1.440 0.036 1.464 ; END END dout_a[29] PIN dout_a[30] @@ -290,7 +290,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 1.488 0.024 1.512 ; + RECT 0.000 1.488 0.036 1.512 ; END END dout_a[30] PIN dout_a[31] @@ -299,7 +299,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 1.536 0.024 1.560 ; + RECT 0.000 1.536 0.036 1.560 ; END END dout_a[31] PIN dout_a[32] @@ -308,7 +308,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 1.584 0.024 1.608 ; + RECT 0.000 1.584 0.036 1.608 ; END END dout_a[32] PIN dout_a[33] @@ -317,7 +317,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 1.632 0.024 1.656 ; + RECT 0.000 1.632 0.036 1.656 ; END END dout_a[33] PIN dout_a[34] @@ -326,7 +326,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 1.680 0.024 1.704 ; + RECT 0.000 1.680 0.036 1.704 ; END END dout_a[34] PIN dout_a[35] @@ -335,7 +335,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 1.728 0.024 1.752 ; + RECT 0.000 1.728 0.036 1.752 ; END END dout_a[35] PIN dout_a[36] @@ -344,7 +344,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 1.776 0.024 1.800 ; + RECT 0.000 1.776 0.036 1.800 ; END END dout_a[36] PIN dout_a[37] @@ -353,7 +353,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 1.824 0.024 1.848 ; + RECT 0.000 1.824 0.036 1.848 ; END END dout_a[37] PIN dout_a[38] @@ -362,7 +362,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 1.872 0.024 1.896 ; + RECT 0.000 1.872 0.036 1.896 ; END END dout_a[38] PIN dout_a[39] @@ -371,7 +371,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 1.920 0.024 1.944 ; + RECT 0.000 1.920 0.036 1.944 ; END END dout_a[39] PIN dout_a[40] @@ -380,7 +380,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 1.968 0.024 1.992 ; + RECT 0.000 1.968 0.036 1.992 ; END END dout_a[40] PIN dout_a[41] @@ -389,7 +389,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 2.016 0.024 2.040 ; + RECT 0.000 2.016 0.036 2.040 ; END END dout_a[41] PIN dout_a[42] @@ -398,7 +398,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 2.064 0.024 2.088 ; + RECT 0.000 2.064 0.036 2.088 ; END END dout_a[42] PIN dout_a[43] @@ -407,7 +407,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 2.112 0.024 2.136 ; + RECT 0.000 2.112 0.036 2.136 ; END END dout_a[43] PIN dout_a[44] @@ -416,7 +416,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 2.160 0.024 2.184 ; + RECT 0.000 2.160 0.036 2.184 ; END END dout_a[44] PIN dout_a[45] @@ -425,7 +425,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 2.208 0.024 2.232 ; + RECT 0.000 2.208 0.036 2.232 ; END END dout_a[45] PIN dout_a[46] @@ -434,7 +434,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 2.256 0.024 2.280 ; + RECT 0.000 2.256 0.036 2.280 ; END END dout_a[46] PIN dout_a[47] @@ -443,7 +443,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 2.304 0.024 2.328 ; + RECT 0.000 2.304 0.036 2.328 ; END END dout_a[47] PIN dout_a[48] @@ -452,7 +452,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 2.352 0.024 2.376 ; + RECT 0.000 2.352 0.036 2.376 ; END END dout_a[48] PIN dout_a[49] @@ -461,7 +461,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 2.400 0.024 2.424 ; + RECT 0.000 2.400 0.036 2.424 ; END END dout_a[49] PIN dout_a[50] @@ -470,7 +470,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 2.448 0.024 2.472 ; + RECT 0.000 2.448 0.036 2.472 ; END END dout_a[50] PIN dout_a[51] @@ -479,7 +479,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 2.496 0.024 2.520 ; + RECT 0.000 2.496 0.036 2.520 ; END END dout_a[51] PIN dout_a[52] @@ -488,7 +488,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 2.544 0.024 2.568 ; + RECT 0.000 2.544 0.036 2.568 ; END END dout_a[52] PIN dout_a[53] @@ -497,7 +497,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 2.592 0.024 2.616 ; + RECT 0.000 2.592 0.036 2.616 ; END END dout_a[53] PIN dout_a[54] @@ -506,7 +506,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 2.640 0.024 2.664 ; + RECT 0.000 2.640 0.036 2.664 ; END END dout_a[54] PIN dout_a[55] @@ -515,7 +515,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 2.688 0.024 2.712 ; + RECT 0.000 2.688 0.036 2.712 ; END END dout_a[55] PIN dout_a[56] @@ -524,7 +524,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 2.736 0.024 2.760 ; + RECT 0.000 2.736 0.036 2.760 ; END END dout_a[56] PIN dout_a[57] @@ -533,7 +533,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 2.784 0.024 2.808 ; + RECT 0.000 2.784 0.036 2.808 ; END END dout_a[57] PIN dout_a[58] @@ -542,7 +542,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 2.832 0.024 2.856 ; + RECT 0.000 2.832 0.036 2.856 ; END END dout_a[58] PIN dout_a[59] @@ -551,7 +551,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 2.880 0.024 2.904 ; + RECT 0.000 2.880 0.036 2.904 ; END END dout_a[59] PIN dout_a[60] @@ -560,7 +560,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 2.928 0.024 2.952 ; + RECT 0.000 2.928 0.036 2.952 ; END END dout_a[60] PIN dout_a[61] @@ -569,7 +569,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 2.976 0.024 3.000 ; + RECT 0.000 2.976 0.036 3.000 ; END END dout_a[61] PIN dout_a[62] @@ -578,7 +578,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 3.024 0.024 3.048 ; + RECT 0.000 3.024 0.036 3.048 ; END END dout_a[62] PIN dout_a[63] @@ -587,7 +587,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 3.072 0.024 3.096 ; + RECT 0.000 3.072 0.036 3.096 ; END END dout_a[63] PIN dout_a[64] @@ -596,7 +596,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 3.120 0.024 3.144 ; + RECT 0.000 3.120 0.036 3.144 ; END END dout_a[64] PIN dout_a[65] @@ -605,7 +605,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 3.168 0.024 3.192 ; + RECT 0.000 3.168 0.036 3.192 ; END END dout_a[65] PIN dout_a[66] @@ -614,7 +614,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 3.216 0.024 3.240 ; + RECT 0.000 3.216 0.036 3.240 ; END END dout_a[66] PIN dout_a[67] @@ -623,7 +623,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 3.264 0.024 3.288 ; + RECT 0.000 3.264 0.036 3.288 ; END END dout_a[67] PIN dout_a[68] @@ -632,7 +632,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 3.312 0.024 3.336 ; + RECT 0.000 3.312 0.036 3.336 ; END END dout_a[68] PIN dout_a[69] @@ -641,7 +641,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 3.360 0.024 3.384 ; + RECT 0.000 3.360 0.036 3.384 ; END END dout_a[69] PIN dout_a[70] @@ -650,7 +650,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 3.408 0.024 3.432 ; + RECT 0.000 3.408 0.036 3.432 ; END END dout_a[70] PIN dout_a[71] @@ -659,7 +659,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 3.456 0.024 3.480 ; + RECT 0.000 3.456 0.036 3.480 ; END END dout_a[71] PIN dout_a[72] @@ -668,7 +668,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 3.504 0.024 3.528 ; + RECT 0.000 3.504 0.036 3.528 ; END END dout_a[72] PIN dout_a[73] @@ -677,7 +677,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 3.552 0.024 3.576 ; + RECT 0.000 3.552 0.036 3.576 ; END END dout_a[73] PIN dout_a[74] @@ -686,7 +686,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 3.600 0.024 3.624 ; + RECT 0.000 3.600 0.036 3.624 ; END END dout_a[74] PIN dout_a[75] @@ -695,7 +695,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 3.648 0.024 3.672 ; + RECT 0.000 3.648 0.036 3.672 ; END END dout_a[75] PIN dout_a[76] @@ -704,7 +704,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 3.696 0.024 3.720 ; + RECT 0.000 3.696 0.036 3.720 ; END END dout_a[76] PIN dout_a[77] @@ -713,7 +713,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 3.744 0.024 3.768 ; + RECT 0.000 3.744 0.036 3.768 ; END END dout_a[77] PIN dout_a[78] @@ -722,7 +722,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 3.792 0.024 3.816 ; + RECT 0.000 3.792 0.036 3.816 ; END END dout_a[78] PIN dout_a[79] @@ -731,7 +731,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 3.840 0.024 3.864 ; + RECT 0.000 3.840 0.036 3.864 ; END END dout_a[79] PIN dout_a[80] @@ -740,7 +740,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 3.888 0.024 3.912 ; + RECT 0.000 3.888 0.036 3.912 ; END END dout_a[80] PIN dout_a[81] @@ -749,7 +749,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 3.936 0.024 3.960 ; + RECT 0.000 3.936 0.036 3.960 ; END END dout_a[81] PIN dout_a[82] @@ -758,7 +758,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 3.984 0.024 4.008 ; + RECT 0.000 3.984 0.036 4.008 ; END END dout_a[82] PIN dout_a[83] @@ -767,7 +767,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 4.032 0.024 4.056 ; + RECT 0.000 4.032 0.036 4.056 ; END END dout_a[83] PIN dout_a[84] @@ -776,7 +776,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 4.080 0.024 4.104 ; + RECT 0.000 4.080 0.036 4.104 ; END END dout_a[84] PIN dout_a[85] @@ -785,7 +785,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 4.128 0.024 4.152 ; + RECT 0.000 4.128 0.036 4.152 ; END END dout_a[85] PIN dout_a[86] @@ -794,7 +794,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 4.176 0.024 4.200 ; + RECT 0.000 4.176 0.036 4.200 ; END END dout_a[86] PIN dout_a[87] @@ -803,7 +803,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 4.224 0.024 4.248 ; + RECT 0.000 4.224 0.036 4.248 ; END END dout_a[87] PIN dout_a[88] @@ -812,7 +812,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 4.272 0.024 4.296 ; + RECT 0.000 4.272 0.036 4.296 ; END END dout_a[88] PIN dout_a[89] @@ -821,7 +821,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 4.320 0.024 4.344 ; + RECT 0.000 4.320 0.036 4.344 ; END END dout_a[89] PIN dout_a[90] @@ -830,7 +830,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 4.368 0.024 4.392 ; + RECT 0.000 4.368 0.036 4.392 ; END END dout_a[90] PIN dout_a[91] @@ -839,7 +839,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 4.416 0.024 4.440 ; + RECT 0.000 4.416 0.036 4.440 ; END END dout_a[91] PIN dout_a[92] @@ -848,7 +848,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 4.464 0.024 4.488 ; + RECT 0.000 4.464 0.036 4.488 ; END END dout_a[92] PIN dout_a[93] @@ -857,7 +857,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 4.512 0.024 4.536 ; + RECT 0.000 4.512 0.036 4.536 ; END END dout_a[93] PIN dout_a[94] @@ -866,7 +866,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 4.560 0.024 4.584 ; + RECT 0.000 4.560 0.036 4.584 ; END END dout_a[94] PIN dout_a[95] @@ -875,7 +875,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 4.608 0.024 4.632 ; + RECT 0.000 4.608 0.036 4.632 ; END END dout_a[95] PIN dout_a[96] @@ -884,7 +884,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 4.656 0.024 4.680 ; + RECT 0.000 4.656 0.036 4.680 ; END END dout_a[96] PIN dout_a[97] @@ -893,7 +893,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 4.704 0.024 4.728 ; + RECT 0.000 4.704 0.036 4.728 ; END END dout_a[97] PIN dout_a[98] @@ -902,7 +902,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 4.752 0.024 4.776 ; + RECT 0.000 4.752 0.036 4.776 ; END END dout_a[98] PIN dout_a[99] @@ -911,7 +911,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 4.800 0.024 4.824 ; + RECT 0.000 4.800 0.036 4.824 ; END END dout_a[99] PIN dout_a[100] @@ -920,7 +920,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 4.848 0.024 4.872 ; + RECT 0.000 4.848 0.036 4.872 ; END END dout_a[100] PIN dout_a[101] @@ -929,7 +929,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 4.896 0.024 4.920 ; + RECT 0.000 4.896 0.036 4.920 ; END END dout_a[101] PIN dout_a[102] @@ -938,7 +938,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 4.944 0.024 4.968 ; + RECT 0.000 4.944 0.036 4.968 ; END END dout_a[102] PIN dout_a[103] @@ -947,7 +947,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 4.992 0.024 5.016 ; + RECT 0.000 4.992 0.036 5.016 ; END END dout_a[103] PIN dout_a[104] @@ -956,7 +956,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 5.040 0.024 5.064 ; + RECT 0.000 5.040 0.036 5.064 ; END END dout_a[104] PIN dout_a[105] @@ -965,7 +965,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 5.088 0.024 5.112 ; + RECT 0.000 5.088 0.036 5.112 ; END END dout_a[105] PIN dout_a[106] @@ -974,7 +974,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 5.136 0.024 5.160 ; + RECT 0.000 5.136 0.036 5.160 ; END END dout_a[106] PIN dout_a[107] @@ -983,7 +983,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 5.184 0.024 5.208 ; + RECT 0.000 5.184 0.036 5.208 ; END END dout_a[107] PIN dout_a[108] @@ -992,7 +992,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 5.232 0.024 5.256 ; + RECT 0.000 5.232 0.036 5.256 ; END END dout_a[108] PIN dout_a[109] @@ -1001,7 +1001,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 5.280 0.024 5.304 ; + RECT 0.000 5.280 0.036 5.304 ; END END dout_a[109] PIN dout_a[110] @@ -1010,7 +1010,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 5.328 0.024 5.352 ; + RECT 0.000 5.328 0.036 5.352 ; END END dout_a[110] PIN dout_a[111] @@ -1019,7 +1019,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 5.376 0.024 5.400 ; + RECT 0.000 5.376 0.036 5.400 ; END END dout_a[111] PIN dout_a[112] @@ -1028,7 +1028,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 5.424 0.024 5.448 ; + RECT 0.000 5.424 0.036 5.448 ; END END dout_a[112] PIN dout_a[113] @@ -1037,7 +1037,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 5.472 0.024 5.496 ; + RECT 0.000 5.472 0.036 5.496 ; END END dout_a[113] PIN dout_a[114] @@ -1046,7 +1046,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 5.520 0.024 5.544 ; + RECT 0.000 5.520 0.036 5.544 ; END END dout_a[114] PIN dout_a[115] @@ -1055,7 +1055,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 5.568 0.024 5.592 ; + RECT 0.000 5.568 0.036 5.592 ; END END dout_a[115] PIN dout_a[116] @@ -1064,7 +1064,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 5.616 0.024 5.640 ; + RECT 0.000 5.616 0.036 5.640 ; END END dout_a[116] PIN dout_a[117] @@ -1073,7 +1073,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 5.664 0.024 5.688 ; + RECT 0.000 5.664 0.036 5.688 ; END END dout_a[117] PIN dout_a[118] @@ -1082,7 +1082,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 5.712 0.024 5.736 ; + RECT 0.000 5.712 0.036 5.736 ; END END dout_a[118] PIN dout_a[119] @@ -1091,7 +1091,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 5.760 0.024 5.784 ; + RECT 0.000 5.760 0.036 5.784 ; END END dout_a[119] PIN dout_a[120] @@ -1100,7 +1100,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 5.808 0.024 5.832 ; + RECT 0.000 5.808 0.036 5.832 ; END END dout_a[120] PIN dout_a[121] @@ -1109,7 +1109,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 5.856 0.024 5.880 ; + RECT 0.000 5.856 0.036 5.880 ; END END dout_a[121] PIN dout_a[122] @@ -1118,7 +1118,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 5.904 0.024 5.928 ; + RECT 0.000 5.904 0.036 5.928 ; END END dout_a[122] PIN dout_a[123] @@ -1127,7 +1127,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 5.952 0.024 5.976 ; + RECT 0.000 5.952 0.036 5.976 ; END END dout_a[123] PIN dout_a[124] @@ -1136,7 +1136,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 6.000 0.024 6.024 ; + RECT 0.000 6.000 0.036 6.024 ; END END dout_a[124] PIN dout_a[125] @@ -1145,7 +1145,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 6.048 0.024 6.072 ; + RECT 0.000 6.048 0.036 6.072 ; END END dout_a[125] PIN dout_a[126] @@ -1154,7 +1154,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 6.096 0.024 6.120 ; + RECT 0.000 6.096 0.036 6.120 ; END END dout_a[126] PIN dout_a[127] @@ -1163,7 +1163,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 6.144 0.024 6.168 ; + RECT 0.000 6.144 0.036 6.168 ; END END dout_a[127] PIN dout_a[128] @@ -1172,7 +1172,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 6.192 0.024 6.216 ; + RECT 0.000 6.192 0.036 6.216 ; END END dout_a[128] PIN dout_a[129] @@ -1181,7 +1181,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 6.240 0.024 6.264 ; + RECT 0.000 6.240 0.036 6.264 ; END END dout_a[129] PIN dout_a[130] @@ -1190,7 +1190,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 6.288 0.024 6.312 ; + RECT 0.000 6.288 0.036 6.312 ; END END dout_a[130] PIN dout_a[131] @@ -1199,7 +1199,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 6.336 0.024 6.360 ; + RECT 0.000 6.336 0.036 6.360 ; END END dout_a[131] PIN dout_a[132] @@ -1208,7 +1208,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 6.384 0.024 6.408 ; + RECT 0.000 6.384 0.036 6.408 ; END END dout_a[132] PIN dout_a[133] @@ -1217,7 +1217,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 6.432 0.024 6.456 ; + RECT 0.000 6.432 0.036 6.456 ; END END dout_a[133] PIN dout_a[134] @@ -1226,7 +1226,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 6.480 0.024 6.504 ; + RECT 0.000 6.480 0.036 6.504 ; END END dout_a[134] PIN dout_a[135] @@ -1235,7 +1235,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 6.528 0.024 6.552 ; + RECT 0.000 6.528 0.036 6.552 ; END END dout_a[135] PIN dout_a[136] @@ -1244,7 +1244,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 6.576 0.024 6.600 ; + RECT 0.000 6.576 0.036 6.600 ; END END dout_a[136] PIN dout_a[137] @@ -1253,7 +1253,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 6.624 0.024 6.648 ; + RECT 0.000 6.624 0.036 6.648 ; END END dout_a[137] PIN dout_a[138] @@ -1262,7 +1262,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 6.672 0.024 6.696 ; + RECT 0.000 6.672 0.036 6.696 ; END END dout_a[138] PIN dout_a[139] @@ -1271,7 +1271,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 6.720 0.024 6.744 ; + RECT 0.000 6.720 0.036 6.744 ; END END dout_a[139] PIN dout_a[140] @@ -1280,7 +1280,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 6.768 0.024 6.792 ; + RECT 0.000 6.768 0.036 6.792 ; END END dout_a[140] PIN dout_a[141] @@ -1289,7 +1289,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 6.816 0.024 6.840 ; + RECT 0.000 6.816 0.036 6.840 ; END END dout_a[141] PIN dout_a[142] @@ -1298,7 +1298,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 6.864 0.024 6.888 ; + RECT 0.000 6.864 0.036 6.888 ; END END dout_a[142] PIN dout_a[143] @@ -1307,7 +1307,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 6.912 0.024 6.936 ; + RECT 0.000 6.912 0.036 6.936 ; END END dout_a[143] PIN dout_a[144] @@ -1316,7 +1316,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 6.960 0.024 6.984 ; + RECT 0.000 6.960 0.036 6.984 ; END END dout_a[144] PIN dout_a[145] @@ -1325,7 +1325,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 7.008 0.024 7.032 ; + RECT 0.000 7.008 0.036 7.032 ; END END dout_a[145] PIN dout_a[146] @@ -1334,7 +1334,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 7.056 0.024 7.080 ; + RECT 0.000 7.056 0.036 7.080 ; END END dout_a[146] PIN dout_a[147] @@ -1343,7 +1343,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 7.104 0.024 7.128 ; + RECT 0.000 7.104 0.036 7.128 ; END END dout_a[147] PIN dout_a[148] @@ -1352,7 +1352,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 7.152 0.024 7.176 ; + RECT 0.000 7.152 0.036 7.176 ; END END dout_a[148] PIN dout_a[149] @@ -1361,7 +1361,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 7.200 0.024 7.224 ; + RECT 0.000 7.200 0.036 7.224 ; END END dout_a[149] PIN dout_a[150] @@ -1370,7 +1370,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 7.248 0.024 7.272 ; + RECT 0.000 7.248 0.036 7.272 ; END END dout_a[150] PIN dout_a[151] @@ -1379,7 +1379,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 7.296 0.024 7.320 ; + RECT 0.000 7.296 0.036 7.320 ; END END dout_a[151] PIN dout_a[152] @@ -1388,7 +1388,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 7.344 0.024 7.368 ; + RECT 0.000 7.344 0.036 7.368 ; END END dout_a[152] PIN dout_a[153] @@ -1397,7 +1397,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 7.392 0.024 7.416 ; + RECT 0.000 7.392 0.036 7.416 ; END END dout_a[153] PIN dout_a[154] @@ -1406,7 +1406,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 7.440 0.024 7.464 ; + RECT 0.000 7.440 0.036 7.464 ; END END dout_a[154] PIN dout_a[155] @@ -1415,7 +1415,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 7.488 0.024 7.512 ; + RECT 0.000 7.488 0.036 7.512 ; END END dout_a[155] PIN dout_a[156] @@ -1424,7 +1424,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 7.536 0.024 7.560 ; + RECT 0.000 7.536 0.036 7.560 ; END END dout_a[156] PIN dout_a[157] @@ -1433,7 +1433,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 7.584 0.024 7.608 ; + RECT 0.000 7.584 0.036 7.608 ; END END dout_a[157] PIN dout_a[158] @@ -1442,7 +1442,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 7.632 0.024 7.656 ; + RECT 0.000 7.632 0.036 7.656 ; END END dout_a[158] PIN dout_a[159] @@ -1451,7 +1451,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 7.680 0.024 7.704 ; + RECT 0.000 7.680 0.036 7.704 ; END END dout_a[159] PIN dout_a[160] @@ -1460,7 +1460,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 7.728 0.024 7.752 ; + RECT 0.000 7.728 0.036 7.752 ; END END dout_a[160] PIN dout_a[161] @@ -1469,7 +1469,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 7.776 0.024 7.800 ; + RECT 0.000 7.776 0.036 7.800 ; END END dout_a[161] PIN dout_a[162] @@ -1478,7 +1478,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 7.824 0.024 7.848 ; + RECT 0.000 7.824 0.036 7.848 ; END END dout_a[162] PIN dout_a[163] @@ -1487,7 +1487,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 7.872 0.024 7.896 ; + RECT 0.000 7.872 0.036 7.896 ; END END dout_a[163] PIN dout_a[164] @@ -1496,7 +1496,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 7.920 0.024 7.944 ; + RECT 0.000 7.920 0.036 7.944 ; END END dout_a[164] PIN dout_a[165] @@ -1505,7 +1505,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 7.968 0.024 7.992 ; + RECT 0.000 7.968 0.036 7.992 ; END END dout_a[165] PIN dout_a[166] @@ -1514,7 +1514,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 8.016 0.024 8.040 ; + RECT 0.000 8.016 0.036 8.040 ; END END dout_a[166] PIN dout_a[167] @@ -1523,7 +1523,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 8.064 0.024 8.088 ; + RECT 0.000 8.064 0.036 8.088 ; END END dout_a[167] PIN dout_a[168] @@ -1532,7 +1532,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 8.112 0.024 8.136 ; + RECT 0.000 8.112 0.036 8.136 ; END END dout_a[168] PIN dout_a[169] @@ -1541,7 +1541,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 8.160 0.024 8.184 ; + RECT 0.000 8.160 0.036 8.184 ; END END dout_a[169] PIN dout_a[170] @@ -1550,7 +1550,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 8.208 0.024 8.232 ; + RECT 0.000 8.208 0.036 8.232 ; END END dout_a[170] PIN dout_a[171] @@ -1559,7 +1559,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 8.256 0.024 8.280 ; + RECT 0.000 8.256 0.036 8.280 ; END END dout_a[171] PIN dout_a[172] @@ -1568,7 +1568,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 8.304 0.024 8.328 ; + RECT 0.000 8.304 0.036 8.328 ; END END dout_a[172] PIN dout_a[173] @@ -1577,7 +1577,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 8.352 0.024 8.376 ; + RECT 0.000 8.352 0.036 8.376 ; END END dout_a[173] PIN dout_a[174] @@ -1586,7 +1586,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 8.400 0.024 8.424 ; + RECT 0.000 8.400 0.036 8.424 ; END END dout_a[174] PIN dout_a[175] @@ -1595,7 +1595,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 8.448 0.024 8.472 ; + RECT 0.000 8.448 0.036 8.472 ; END END dout_a[175] PIN dout_a[176] @@ -1604,7 +1604,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 8.496 0.024 8.520 ; + RECT 0.000 8.496 0.036 8.520 ; END END dout_a[176] PIN dout_a[177] @@ -1613,7 +1613,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 8.544 0.024 8.568 ; + RECT 0.000 8.544 0.036 8.568 ; END END dout_a[177] PIN dout_a[178] @@ -1622,7 +1622,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 8.592 0.024 8.616 ; + RECT 0.000 8.592 0.036 8.616 ; END END dout_a[178] PIN dout_a[179] @@ -1631,7 +1631,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 8.640 0.024 8.664 ; + RECT 0.000 8.640 0.036 8.664 ; END END dout_a[179] PIN dout_a[180] @@ -1640,7 +1640,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 8.688 0.024 8.712 ; + RECT 0.000 8.688 0.036 8.712 ; END END dout_a[180] PIN dout_a[181] @@ -1649,7 +1649,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 8.736 0.024 8.760 ; + RECT 0.000 8.736 0.036 8.760 ; END END dout_a[181] PIN dout_a[182] @@ -1658,7 +1658,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 8.784 0.024 8.808 ; + RECT 0.000 8.784 0.036 8.808 ; END END dout_a[182] PIN dout_a[183] @@ -1667,7 +1667,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 8.832 0.024 8.856 ; + RECT 0.000 8.832 0.036 8.856 ; END END dout_a[183] PIN dout_a[184] @@ -1676,7 +1676,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 8.880 0.024 8.904 ; + RECT 0.000 8.880 0.036 8.904 ; END END dout_a[184] PIN dout_a[185] @@ -1685,7 +1685,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 8.928 0.024 8.952 ; + RECT 0.000 8.928 0.036 8.952 ; END END dout_a[185] PIN dout_a[186] @@ -1694,7 +1694,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 8.976 0.024 9.000 ; + RECT 0.000 8.976 0.036 9.000 ; END END dout_a[186] PIN dout_a[187] @@ -1703,7 +1703,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 9.024 0.024 9.048 ; + RECT 0.000 9.024 0.036 9.048 ; END END dout_a[187] PIN dout_a[188] @@ -1712,7 +1712,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 9.072 0.024 9.096 ; + RECT 0.000 9.072 0.036 9.096 ; END END dout_a[188] PIN dout_a[189] @@ -1721,7 +1721,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 9.120 0.024 9.144 ; + RECT 0.000 9.120 0.036 9.144 ; END END dout_a[189] PIN dout_a[190] @@ -1730,7 +1730,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 9.168 0.024 9.192 ; + RECT 0.000 9.168 0.036 9.192 ; END END dout_a[190] PIN dout_a[191] @@ -1739,7 +1739,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 9.216 0.024 9.240 ; + RECT 0.000 9.216 0.036 9.240 ; END END dout_a[191] PIN dout_a[192] @@ -1748,7 +1748,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 9.264 0.024 9.288 ; + RECT 0.000 9.264 0.036 9.288 ; END END dout_a[192] PIN dout_a[193] @@ -1757,7 +1757,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 9.312 0.024 9.336 ; + RECT 0.000 9.312 0.036 9.336 ; END END dout_a[193] PIN dout_a[194] @@ -1766,7 +1766,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 9.360 0.024 9.384 ; + RECT 0.000 9.360 0.036 9.384 ; END END dout_a[194] PIN dout_a[195] @@ -1775,7 +1775,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 9.408 0.024 9.432 ; + RECT 0.000 9.408 0.036 9.432 ; END END dout_a[195] PIN dout_a[196] @@ -1784,7 +1784,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 9.456 0.024 9.480 ; + RECT 0.000 9.456 0.036 9.480 ; END END dout_a[196] PIN dout_a[197] @@ -1793,7 +1793,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 9.504 0.024 9.528 ; + RECT 0.000 9.504 0.036 9.528 ; END END dout_a[197] PIN dout_a[198] @@ -1802,7 +1802,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 9.552 0.024 9.576 ; + RECT 0.000 9.552 0.036 9.576 ; END END dout_a[198] PIN dout_a[199] @@ -1811,7 +1811,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 9.600 0.024 9.624 ; + RECT 0.000 9.600 0.036 9.624 ; END END dout_a[199] PIN dout_a[200] @@ -1820,7 +1820,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 9.648 0.024 9.672 ; + RECT 0.000 9.648 0.036 9.672 ; END END dout_a[200] PIN dout_a[201] @@ -1829,7 +1829,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 9.696 0.024 9.720 ; + RECT 0.000 9.696 0.036 9.720 ; END END dout_a[201] PIN dout_a[202] @@ -1838,7 +1838,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 9.744 0.024 9.768 ; + RECT 0.000 9.744 0.036 9.768 ; END END dout_a[202] PIN dout_a[203] @@ -1847,7 +1847,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 9.792 0.024 9.816 ; + RECT 0.000 9.792 0.036 9.816 ; END END dout_a[203] PIN dout_a[204] @@ -1856,7 +1856,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 9.840 0.024 9.864 ; + RECT 0.000 9.840 0.036 9.864 ; END END dout_a[204] PIN dout_a[205] @@ -1865,7 +1865,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 9.888 0.024 9.912 ; + RECT 0.000 9.888 0.036 9.912 ; END END dout_a[205] PIN dout_a[206] @@ -1874,7 +1874,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 9.936 0.024 9.960 ; + RECT 0.000 9.936 0.036 9.960 ; END END dout_a[206] PIN dout_a[207] @@ -1883,7 +1883,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 9.984 0.024 10.008 ; + RECT 0.000 9.984 0.036 10.008 ; END END dout_a[207] PIN dout_a[208] @@ -1892,7 +1892,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 10.032 0.024 10.056 ; + RECT 0.000 10.032 0.036 10.056 ; END END dout_a[208] PIN dout_a[209] @@ -1901,7 +1901,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 10.080 0.024 10.104 ; + RECT 0.000 10.080 0.036 10.104 ; END END dout_a[209] PIN dout_a[210] @@ -1910,7 +1910,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 10.128 0.024 10.152 ; + RECT 0.000 10.128 0.036 10.152 ; END END dout_a[210] PIN dout_a[211] @@ -1919,7 +1919,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 10.176 0.024 10.200 ; + RECT 0.000 10.176 0.036 10.200 ; END END dout_a[211] PIN dout_a[212] @@ -1928,7 +1928,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 10.224 0.024 10.248 ; + RECT 0.000 10.224 0.036 10.248 ; END END dout_a[212] PIN dout_a[213] @@ -1937,7 +1937,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 10.272 0.024 10.296 ; + RECT 0.000 10.272 0.036 10.296 ; END END dout_a[213] PIN dout_a[214] @@ -1946,7 +1946,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 10.320 0.024 10.344 ; + RECT 0.000 10.320 0.036 10.344 ; END END dout_a[214] PIN dout_a[215] @@ -1955,7 +1955,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 10.368 0.024 10.392 ; + RECT 0.000 10.368 0.036 10.392 ; END END dout_a[215] PIN dout_a[216] @@ -1964,7 +1964,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 10.416 0.024 10.440 ; + RECT 0.000 10.416 0.036 10.440 ; END END dout_a[216] PIN dout_a[217] @@ -1973,7 +1973,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 10.464 0.024 10.488 ; + RECT 0.000 10.464 0.036 10.488 ; END END dout_a[217] PIN dout_a[218] @@ -1982,7 +1982,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 10.512 0.024 10.536 ; + RECT 0.000 10.512 0.036 10.536 ; END END dout_a[218] PIN dout_a[219] @@ -1991,7 +1991,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 10.560 0.024 10.584 ; + RECT 0.000 10.560 0.036 10.584 ; END END dout_a[219] PIN dout_a[220] @@ -2000,7 +2000,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 10.608 0.024 10.632 ; + RECT 0.000 10.608 0.036 10.632 ; END END dout_a[220] PIN dout_a[221] @@ -2009,7 +2009,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 10.656 0.024 10.680 ; + RECT 0.000 10.656 0.036 10.680 ; END END dout_a[221] PIN dout_a[222] @@ -2018,7 +2018,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 10.704 0.024 10.728 ; + RECT 0.000 10.704 0.036 10.728 ; END END dout_a[222] PIN dout_a[223] @@ -2027,7 +2027,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 10.752 0.024 10.776 ; + RECT 0.000 10.752 0.036 10.776 ; END END dout_a[223] PIN dout_a[224] @@ -2036,7 +2036,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 10.800 0.024 10.824 ; + RECT 0.000 10.800 0.036 10.824 ; END END dout_a[224] PIN dout_a[225] @@ -2045,7 +2045,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 10.848 0.024 10.872 ; + RECT 0.000 10.848 0.036 10.872 ; END END dout_a[225] PIN dout_a[226] @@ -2054,7 +2054,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 10.896 0.024 10.920 ; + RECT 0.000 10.896 0.036 10.920 ; END END dout_a[226] PIN dout_a[227] @@ -2063,7 +2063,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 10.944 0.024 10.968 ; + RECT 0.000 10.944 0.036 10.968 ; END END dout_a[227] PIN dout_a[228] @@ -2072,7 +2072,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 10.992 0.024 11.016 ; + RECT 0.000 10.992 0.036 11.016 ; END END dout_a[228] PIN dout_a[229] @@ -2081,7 +2081,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 11.040 0.024 11.064 ; + RECT 0.000 11.040 0.036 11.064 ; END END dout_a[229] PIN dout_a[230] @@ -2090,7 +2090,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 11.088 0.024 11.112 ; + RECT 0.000 11.088 0.036 11.112 ; END END dout_a[230] PIN dout_a[231] @@ -2099,7 +2099,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 11.136 0.024 11.160 ; + RECT 0.000 11.136 0.036 11.160 ; END END dout_a[231] PIN dout_a[232] @@ -2108,7 +2108,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 11.184 0.024 11.208 ; + RECT 0.000 11.184 0.036 11.208 ; END END dout_a[232] PIN dout_a[233] @@ -2117,7 +2117,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 11.232 0.024 11.256 ; + RECT 0.000 11.232 0.036 11.256 ; END END dout_a[233] PIN dout_a[234] @@ -2126,7 +2126,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 11.280 0.024 11.304 ; + RECT 0.000 11.280 0.036 11.304 ; END END dout_a[234] PIN dout_a[235] @@ -2135,7 +2135,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 11.328 0.024 11.352 ; + RECT 0.000 11.328 0.036 11.352 ; END END dout_a[235] PIN dout_a[236] @@ -2144,7 +2144,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 11.376 0.024 11.400 ; + RECT 0.000 11.376 0.036 11.400 ; END END dout_a[236] PIN dout_a[237] @@ -2153,7 +2153,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 11.424 0.024 11.448 ; + RECT 0.000 11.424 0.036 11.448 ; END END dout_a[237] PIN dout_a[238] @@ -2162,7 +2162,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 11.472 0.024 11.496 ; + RECT 0.000 11.472 0.036 11.496 ; END END dout_a[238] PIN dout_a[239] @@ -2171,7 +2171,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 11.520 0.024 11.544 ; + RECT 0.000 11.520 0.036 11.544 ; END END dout_a[239] PIN dout_a[240] @@ -2180,7 +2180,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 11.568 0.024 11.592 ; + RECT 0.000 11.568 0.036 11.592 ; END END dout_a[240] PIN dout_a[241] @@ -2189,7 +2189,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 11.616 0.024 11.640 ; + RECT 0.000 11.616 0.036 11.640 ; END END dout_a[241] PIN dout_a[242] @@ -2198,7 +2198,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 11.664 0.024 11.688 ; + RECT 0.000 11.664 0.036 11.688 ; END END dout_a[242] PIN dout_a[243] @@ -2207,7 +2207,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 11.712 0.024 11.736 ; + RECT 0.000 11.712 0.036 11.736 ; END END dout_a[243] PIN dout_a[244] @@ -2216,7 +2216,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 11.760 0.024 11.784 ; + RECT 0.000 11.760 0.036 11.784 ; END END dout_a[244] PIN dout_a[245] @@ -2225,7 +2225,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 11.808 0.024 11.832 ; + RECT 0.000 11.808 0.036 11.832 ; END END dout_a[245] PIN dout_a[246] @@ -2234,7 +2234,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 11.856 0.024 11.880 ; + RECT 0.000 11.856 0.036 11.880 ; END END dout_a[246] PIN dout_a[247] @@ -2243,7 +2243,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 11.904 0.024 11.928 ; + RECT 0.000 11.904 0.036 11.928 ; END END dout_a[247] PIN dout_a[248] @@ -2252,7 +2252,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 11.952 0.024 11.976 ; + RECT 0.000 11.952 0.036 11.976 ; END END dout_a[248] PIN dout_a[249] @@ -2261,7 +2261,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 12.000 0.024 12.024 ; + RECT 0.000 12.000 0.036 12.024 ; END END dout_a[249] PIN dout_a[250] @@ -2270,7 +2270,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 12.048 0.024 12.072 ; + RECT 0.000 12.048 0.036 12.072 ; END END dout_a[250] PIN dout_a[251] @@ -2279,7 +2279,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 12.096 0.024 12.120 ; + RECT 0.000 12.096 0.036 12.120 ; END END dout_a[251] PIN dout_a[252] @@ -2288,7 +2288,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 12.144 0.024 12.168 ; + RECT 0.000 12.144 0.036 12.168 ; END END dout_a[252] PIN dout_a[253] @@ -2297,7 +2297,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 12.192 0.024 12.216 ; + RECT 0.000 12.192 0.036 12.216 ; END END dout_a[253] PIN dout_a[254] @@ -2306,7 +2306,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 12.240 0.024 12.264 ; + RECT 0.000 12.240 0.036 12.264 ; END END dout_a[254] PIN dout_a[255] @@ -2315,7 +2315,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 12.288 0.024 12.312 ; + RECT 0.000 12.288 0.036 12.312 ; END END dout_a[255] PIN din_a[0] @@ -2324,7 +2324,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 23.616 0.024 23.640 ; + RECT 0.000 23.616 0.036 23.640 ; END END din_a[0] PIN din_a[1] @@ -2333,7 +2333,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 23.664 0.024 23.688 ; + RECT 0.000 23.664 0.036 23.688 ; END END din_a[1] PIN din_a[2] @@ -2342,7 +2342,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 23.712 0.024 23.736 ; + RECT 0.000 23.712 0.036 23.736 ; END END din_a[2] PIN din_a[3] @@ -2351,7 +2351,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 23.760 0.024 23.784 ; + RECT 0.000 23.760 0.036 23.784 ; END END din_a[3] PIN din_a[4] @@ -2360,7 +2360,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 23.808 0.024 23.832 ; + RECT 0.000 23.808 0.036 23.832 ; END END din_a[4] PIN din_a[5] @@ -2369,7 +2369,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 23.856 0.024 23.880 ; + RECT 0.000 23.856 0.036 23.880 ; END END din_a[5] PIN din_a[6] @@ -2378,7 +2378,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 23.904 0.024 23.928 ; + RECT 0.000 23.904 0.036 23.928 ; END END din_a[6] PIN din_a[7] @@ -2387,7 +2387,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 23.952 0.024 23.976 ; + RECT 0.000 23.952 0.036 23.976 ; END END din_a[7] PIN din_a[8] @@ -2396,7 +2396,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 24.000 0.024 24.024 ; + RECT 0.000 24.000 0.036 24.024 ; END END din_a[8] PIN din_a[9] @@ -2405,7 +2405,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 24.048 0.024 24.072 ; + RECT 0.000 24.048 0.036 24.072 ; END END din_a[9] PIN din_a[10] @@ -2414,7 +2414,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 24.096 0.024 24.120 ; + RECT 0.000 24.096 0.036 24.120 ; END END din_a[10] PIN din_a[11] @@ -2423,7 +2423,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 24.144 0.024 24.168 ; + RECT 0.000 24.144 0.036 24.168 ; END END din_a[11] PIN din_a[12] @@ -2432,7 +2432,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 24.192 0.024 24.216 ; + RECT 0.000 24.192 0.036 24.216 ; END END din_a[12] PIN din_a[13] @@ -2441,7 +2441,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 24.240 0.024 24.264 ; + RECT 0.000 24.240 0.036 24.264 ; END END din_a[13] PIN din_a[14] @@ -2450,7 +2450,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 24.288 0.024 24.312 ; + RECT 0.000 24.288 0.036 24.312 ; END END din_a[14] PIN din_a[15] @@ -2459,7 +2459,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 24.336 0.024 24.360 ; + RECT 0.000 24.336 0.036 24.360 ; END END din_a[15] PIN din_a[16] @@ -2468,7 +2468,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 24.384 0.024 24.408 ; + RECT 0.000 24.384 0.036 24.408 ; END END din_a[16] PIN din_a[17] @@ -2477,7 +2477,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 24.432 0.024 24.456 ; + RECT 0.000 24.432 0.036 24.456 ; END END din_a[17] PIN din_a[18] @@ -2486,7 +2486,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 24.480 0.024 24.504 ; + RECT 0.000 24.480 0.036 24.504 ; END END din_a[18] PIN din_a[19] @@ -2495,7 +2495,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 24.528 0.024 24.552 ; + RECT 0.000 24.528 0.036 24.552 ; END END din_a[19] PIN din_a[20] @@ -2504,7 +2504,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 24.576 0.024 24.600 ; + RECT 0.000 24.576 0.036 24.600 ; END END din_a[20] PIN din_a[21] @@ -2513,7 +2513,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 24.624 0.024 24.648 ; + RECT 0.000 24.624 0.036 24.648 ; END END din_a[21] PIN din_a[22] @@ -2522,7 +2522,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 24.672 0.024 24.696 ; + RECT 0.000 24.672 0.036 24.696 ; END END din_a[22] PIN din_a[23] @@ -2531,7 +2531,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 24.720 0.024 24.744 ; + RECT 0.000 24.720 0.036 24.744 ; END END din_a[23] PIN din_a[24] @@ -2540,7 +2540,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 24.768 0.024 24.792 ; + RECT 0.000 24.768 0.036 24.792 ; END END din_a[24] PIN din_a[25] @@ -2549,7 +2549,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 24.816 0.024 24.840 ; + RECT 0.000 24.816 0.036 24.840 ; END END din_a[25] PIN din_a[26] @@ -2558,7 +2558,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 24.864 0.024 24.888 ; + RECT 0.000 24.864 0.036 24.888 ; END END din_a[26] PIN din_a[27] @@ -2567,7 +2567,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 24.912 0.024 24.936 ; + RECT 0.000 24.912 0.036 24.936 ; END END din_a[27] PIN din_a[28] @@ -2576,7 +2576,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 24.960 0.024 24.984 ; + RECT 0.000 24.960 0.036 24.984 ; END END din_a[28] PIN din_a[29] @@ -2585,7 +2585,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 25.008 0.024 25.032 ; + RECT 0.000 25.008 0.036 25.032 ; END END din_a[29] PIN din_a[30] @@ -2594,7 +2594,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 25.056 0.024 25.080 ; + RECT 0.000 25.056 0.036 25.080 ; END END din_a[30] PIN din_a[31] @@ -2603,7 +2603,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 25.104 0.024 25.128 ; + RECT 0.000 25.104 0.036 25.128 ; END END din_a[31] PIN din_a[32] @@ -2612,7 +2612,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 25.152 0.024 25.176 ; + RECT 0.000 25.152 0.036 25.176 ; END END din_a[32] PIN din_a[33] @@ -2621,7 +2621,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 25.200 0.024 25.224 ; + RECT 0.000 25.200 0.036 25.224 ; END END din_a[33] PIN din_a[34] @@ -2630,7 +2630,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 25.248 0.024 25.272 ; + RECT 0.000 25.248 0.036 25.272 ; END END din_a[34] PIN din_a[35] @@ -2639,7 +2639,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 25.296 0.024 25.320 ; + RECT 0.000 25.296 0.036 25.320 ; END END din_a[35] PIN din_a[36] @@ -2648,7 +2648,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 25.344 0.024 25.368 ; + RECT 0.000 25.344 0.036 25.368 ; END END din_a[36] PIN din_a[37] @@ -2657,7 +2657,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 25.392 0.024 25.416 ; + RECT 0.000 25.392 0.036 25.416 ; END END din_a[37] PIN din_a[38] @@ -2666,7 +2666,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 25.440 0.024 25.464 ; + RECT 0.000 25.440 0.036 25.464 ; END END din_a[38] PIN din_a[39] @@ -2675,7 +2675,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 25.488 0.024 25.512 ; + RECT 0.000 25.488 0.036 25.512 ; END END din_a[39] PIN din_a[40] @@ -2684,7 +2684,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 25.536 0.024 25.560 ; + RECT 0.000 25.536 0.036 25.560 ; END END din_a[40] PIN din_a[41] @@ -2693,7 +2693,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 25.584 0.024 25.608 ; + RECT 0.000 25.584 0.036 25.608 ; END END din_a[41] PIN din_a[42] @@ -2702,7 +2702,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 25.632 0.024 25.656 ; + RECT 0.000 25.632 0.036 25.656 ; END END din_a[42] PIN din_a[43] @@ -2711,7 +2711,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 25.680 0.024 25.704 ; + RECT 0.000 25.680 0.036 25.704 ; END END din_a[43] PIN din_a[44] @@ -2720,7 +2720,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 25.728 0.024 25.752 ; + RECT 0.000 25.728 0.036 25.752 ; END END din_a[44] PIN din_a[45] @@ -2729,7 +2729,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 25.776 0.024 25.800 ; + RECT 0.000 25.776 0.036 25.800 ; END END din_a[45] PIN din_a[46] @@ -2738,7 +2738,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 25.824 0.024 25.848 ; + RECT 0.000 25.824 0.036 25.848 ; END END din_a[46] PIN din_a[47] @@ -2747,7 +2747,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 25.872 0.024 25.896 ; + RECT 0.000 25.872 0.036 25.896 ; END END din_a[47] PIN din_a[48] @@ -2756,7 +2756,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 25.920 0.024 25.944 ; + RECT 0.000 25.920 0.036 25.944 ; END END din_a[48] PIN din_a[49] @@ -2765,7 +2765,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 25.968 0.024 25.992 ; + RECT 0.000 25.968 0.036 25.992 ; END END din_a[49] PIN din_a[50] @@ -2774,7 +2774,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 26.016 0.024 26.040 ; + RECT 0.000 26.016 0.036 26.040 ; END END din_a[50] PIN din_a[51] @@ -2783,7 +2783,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 26.064 0.024 26.088 ; + RECT 0.000 26.064 0.036 26.088 ; END END din_a[51] PIN din_a[52] @@ -2792,7 +2792,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 26.112 0.024 26.136 ; + RECT 0.000 26.112 0.036 26.136 ; END END din_a[52] PIN din_a[53] @@ -2801,7 +2801,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 26.160 0.024 26.184 ; + RECT 0.000 26.160 0.036 26.184 ; END END din_a[53] PIN din_a[54] @@ -2810,7 +2810,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 26.208 0.024 26.232 ; + RECT 0.000 26.208 0.036 26.232 ; END END din_a[54] PIN din_a[55] @@ -2819,7 +2819,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 26.256 0.024 26.280 ; + RECT 0.000 26.256 0.036 26.280 ; END END din_a[55] PIN din_a[56] @@ -2828,7 +2828,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 26.304 0.024 26.328 ; + RECT 0.000 26.304 0.036 26.328 ; END END din_a[56] PIN din_a[57] @@ -2837,7 +2837,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 26.352 0.024 26.376 ; + RECT 0.000 26.352 0.036 26.376 ; END END din_a[57] PIN din_a[58] @@ -2846,7 +2846,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 26.400 0.024 26.424 ; + RECT 0.000 26.400 0.036 26.424 ; END END din_a[58] PIN din_a[59] @@ -2855,7 +2855,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 26.448 0.024 26.472 ; + RECT 0.000 26.448 0.036 26.472 ; END END din_a[59] PIN din_a[60] @@ -2864,7 +2864,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 26.496 0.024 26.520 ; + RECT 0.000 26.496 0.036 26.520 ; END END din_a[60] PIN din_a[61] @@ -2873,7 +2873,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 26.544 0.024 26.568 ; + RECT 0.000 26.544 0.036 26.568 ; END END din_a[61] PIN din_a[62] @@ -2882,7 +2882,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 26.592 0.024 26.616 ; + RECT 0.000 26.592 0.036 26.616 ; END END din_a[62] PIN din_a[63] @@ -2891,7 +2891,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 26.640 0.024 26.664 ; + RECT 0.000 26.640 0.036 26.664 ; END END din_a[63] PIN din_a[64] @@ -2900,7 +2900,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 26.688 0.024 26.712 ; + RECT 0.000 26.688 0.036 26.712 ; END END din_a[64] PIN din_a[65] @@ -2909,7 +2909,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 26.736 0.024 26.760 ; + RECT 0.000 26.736 0.036 26.760 ; END END din_a[65] PIN din_a[66] @@ -2918,7 +2918,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 26.784 0.024 26.808 ; + RECT 0.000 26.784 0.036 26.808 ; END END din_a[66] PIN din_a[67] @@ -2927,7 +2927,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 26.832 0.024 26.856 ; + RECT 0.000 26.832 0.036 26.856 ; END END din_a[67] PIN din_a[68] @@ -2936,7 +2936,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 26.880 0.024 26.904 ; + RECT 0.000 26.880 0.036 26.904 ; END END din_a[68] PIN din_a[69] @@ -2945,7 +2945,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 26.928 0.024 26.952 ; + RECT 0.000 26.928 0.036 26.952 ; END END din_a[69] PIN din_a[70] @@ -2954,7 +2954,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 26.976 0.024 27.000 ; + RECT 0.000 26.976 0.036 27.000 ; END END din_a[70] PIN din_a[71] @@ -2963,7 +2963,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 27.024 0.024 27.048 ; + RECT 0.000 27.024 0.036 27.048 ; END END din_a[71] PIN din_a[72] @@ -2972,7 +2972,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 27.072 0.024 27.096 ; + RECT 0.000 27.072 0.036 27.096 ; END END din_a[72] PIN din_a[73] @@ -2981,7 +2981,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 27.120 0.024 27.144 ; + RECT 0.000 27.120 0.036 27.144 ; END END din_a[73] PIN din_a[74] @@ -2990,7 +2990,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 27.168 0.024 27.192 ; + RECT 0.000 27.168 0.036 27.192 ; END END din_a[74] PIN din_a[75] @@ -2999,7 +2999,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 27.216 0.024 27.240 ; + RECT 0.000 27.216 0.036 27.240 ; END END din_a[75] PIN din_a[76] @@ -3008,7 +3008,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 27.264 0.024 27.288 ; + RECT 0.000 27.264 0.036 27.288 ; END END din_a[76] PIN din_a[77] @@ -3017,7 +3017,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 27.312 0.024 27.336 ; + RECT 0.000 27.312 0.036 27.336 ; END END din_a[77] PIN din_a[78] @@ -3026,7 +3026,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 27.360 0.024 27.384 ; + RECT 0.000 27.360 0.036 27.384 ; END END din_a[78] PIN din_a[79] @@ -3035,7 +3035,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 27.408 0.024 27.432 ; + RECT 0.000 27.408 0.036 27.432 ; END END din_a[79] PIN din_a[80] @@ -3044,7 +3044,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 27.456 0.024 27.480 ; + RECT 0.000 27.456 0.036 27.480 ; END END din_a[80] PIN din_a[81] @@ -3053,7 +3053,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 27.504 0.024 27.528 ; + RECT 0.000 27.504 0.036 27.528 ; END END din_a[81] PIN din_a[82] @@ -3062,7 +3062,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 27.552 0.024 27.576 ; + RECT 0.000 27.552 0.036 27.576 ; END END din_a[82] PIN din_a[83] @@ -3071,7 +3071,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 27.600 0.024 27.624 ; + RECT 0.000 27.600 0.036 27.624 ; END END din_a[83] PIN din_a[84] @@ -3080,7 +3080,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 27.648 0.024 27.672 ; + RECT 0.000 27.648 0.036 27.672 ; END END din_a[84] PIN din_a[85] @@ -3089,7 +3089,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 27.696 0.024 27.720 ; + RECT 0.000 27.696 0.036 27.720 ; END END din_a[85] PIN din_a[86] @@ -3098,7 +3098,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 27.744 0.024 27.768 ; + RECT 0.000 27.744 0.036 27.768 ; END END din_a[86] PIN din_a[87] @@ -3107,7 +3107,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 27.792 0.024 27.816 ; + RECT 0.000 27.792 0.036 27.816 ; END END din_a[87] PIN din_a[88] @@ -3116,7 +3116,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 27.840 0.024 27.864 ; + RECT 0.000 27.840 0.036 27.864 ; END END din_a[88] PIN din_a[89] @@ -3125,7 +3125,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 27.888 0.024 27.912 ; + RECT 0.000 27.888 0.036 27.912 ; END END din_a[89] PIN din_a[90] @@ -3134,7 +3134,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 27.936 0.024 27.960 ; + RECT 0.000 27.936 0.036 27.960 ; END END din_a[90] PIN din_a[91] @@ -3143,7 +3143,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 27.984 0.024 28.008 ; + RECT 0.000 27.984 0.036 28.008 ; END END din_a[91] PIN din_a[92] @@ -3152,7 +3152,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 28.032 0.024 28.056 ; + RECT 0.000 28.032 0.036 28.056 ; END END din_a[92] PIN din_a[93] @@ -3161,7 +3161,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 28.080 0.024 28.104 ; + RECT 0.000 28.080 0.036 28.104 ; END END din_a[93] PIN din_a[94] @@ -3170,7 +3170,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 28.128 0.024 28.152 ; + RECT 0.000 28.128 0.036 28.152 ; END END din_a[94] PIN din_a[95] @@ -3179,7 +3179,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 28.176 0.024 28.200 ; + RECT 0.000 28.176 0.036 28.200 ; END END din_a[95] PIN din_a[96] @@ -3188,7 +3188,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 28.224 0.024 28.248 ; + RECT 0.000 28.224 0.036 28.248 ; END END din_a[96] PIN din_a[97] @@ -3197,7 +3197,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 28.272 0.024 28.296 ; + RECT 0.000 28.272 0.036 28.296 ; END END din_a[97] PIN din_a[98] @@ -3206,7 +3206,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 28.320 0.024 28.344 ; + RECT 0.000 28.320 0.036 28.344 ; END END din_a[98] PIN din_a[99] @@ -3215,7 +3215,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 28.368 0.024 28.392 ; + RECT 0.000 28.368 0.036 28.392 ; END END din_a[99] PIN din_a[100] @@ -3224,7 +3224,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 28.416 0.024 28.440 ; + RECT 0.000 28.416 0.036 28.440 ; END END din_a[100] PIN din_a[101] @@ -3233,7 +3233,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 28.464 0.024 28.488 ; + RECT 0.000 28.464 0.036 28.488 ; END END din_a[101] PIN din_a[102] @@ -3242,7 +3242,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 28.512 0.024 28.536 ; + RECT 0.000 28.512 0.036 28.536 ; END END din_a[102] PIN din_a[103] @@ -3251,7 +3251,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 28.560 0.024 28.584 ; + RECT 0.000 28.560 0.036 28.584 ; END END din_a[103] PIN din_a[104] @@ -3260,7 +3260,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 28.608 0.024 28.632 ; + RECT 0.000 28.608 0.036 28.632 ; END END din_a[104] PIN din_a[105] @@ -3269,7 +3269,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 28.656 0.024 28.680 ; + RECT 0.000 28.656 0.036 28.680 ; END END din_a[105] PIN din_a[106] @@ -3278,7 +3278,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 28.704 0.024 28.728 ; + RECT 0.000 28.704 0.036 28.728 ; END END din_a[106] PIN din_a[107] @@ -3287,7 +3287,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 28.752 0.024 28.776 ; + RECT 0.000 28.752 0.036 28.776 ; END END din_a[107] PIN din_a[108] @@ -3296,7 +3296,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 28.800 0.024 28.824 ; + RECT 0.000 28.800 0.036 28.824 ; END END din_a[108] PIN din_a[109] @@ -3305,7 +3305,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 28.848 0.024 28.872 ; + RECT 0.000 28.848 0.036 28.872 ; END END din_a[109] PIN din_a[110] @@ -3314,7 +3314,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 28.896 0.024 28.920 ; + RECT 0.000 28.896 0.036 28.920 ; END END din_a[110] PIN din_a[111] @@ -3323,7 +3323,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 28.944 0.024 28.968 ; + RECT 0.000 28.944 0.036 28.968 ; END END din_a[111] PIN din_a[112] @@ -3332,7 +3332,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 28.992 0.024 29.016 ; + RECT 0.000 28.992 0.036 29.016 ; END END din_a[112] PIN din_a[113] @@ -3341,7 +3341,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 29.040 0.024 29.064 ; + RECT 0.000 29.040 0.036 29.064 ; END END din_a[113] PIN din_a[114] @@ -3350,7 +3350,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 29.088 0.024 29.112 ; + RECT 0.000 29.088 0.036 29.112 ; END END din_a[114] PIN din_a[115] @@ -3359,7 +3359,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 29.136 0.024 29.160 ; + RECT 0.000 29.136 0.036 29.160 ; END END din_a[115] PIN din_a[116] @@ -3368,7 +3368,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 29.184 0.024 29.208 ; + RECT 0.000 29.184 0.036 29.208 ; END END din_a[116] PIN din_a[117] @@ -3377,7 +3377,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 29.232 0.024 29.256 ; + RECT 0.000 29.232 0.036 29.256 ; END END din_a[117] PIN din_a[118] @@ -3386,7 +3386,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 29.280 0.024 29.304 ; + RECT 0.000 29.280 0.036 29.304 ; END END din_a[118] PIN din_a[119] @@ -3395,7 +3395,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 29.328 0.024 29.352 ; + RECT 0.000 29.328 0.036 29.352 ; END END din_a[119] PIN din_a[120] @@ -3404,7 +3404,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 29.376 0.024 29.400 ; + RECT 0.000 29.376 0.036 29.400 ; END END din_a[120] PIN din_a[121] @@ -3413,7 +3413,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 29.424 0.024 29.448 ; + RECT 0.000 29.424 0.036 29.448 ; END END din_a[121] PIN din_a[122] @@ -3422,7 +3422,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 29.472 0.024 29.496 ; + RECT 0.000 29.472 0.036 29.496 ; END END din_a[122] PIN din_a[123] @@ -3431,7 +3431,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 29.520 0.024 29.544 ; + RECT 0.000 29.520 0.036 29.544 ; END END din_a[123] PIN din_a[124] @@ -3440,7 +3440,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 29.568 0.024 29.592 ; + RECT 0.000 29.568 0.036 29.592 ; END END din_a[124] PIN din_a[125] @@ -3449,7 +3449,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 29.616 0.024 29.640 ; + RECT 0.000 29.616 0.036 29.640 ; END END din_a[125] PIN din_a[126] @@ -3458,7 +3458,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 29.664 0.024 29.688 ; + RECT 0.000 29.664 0.036 29.688 ; END END din_a[126] PIN din_a[127] @@ -3467,7 +3467,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 29.712 0.024 29.736 ; + RECT 0.000 29.712 0.036 29.736 ; END END din_a[127] PIN din_a[128] @@ -3476,7 +3476,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 29.760 0.024 29.784 ; + RECT 0.000 29.760 0.036 29.784 ; END END din_a[128] PIN din_a[129] @@ -3485,7 +3485,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 29.808 0.024 29.832 ; + RECT 0.000 29.808 0.036 29.832 ; END END din_a[129] PIN din_a[130] @@ -3494,7 +3494,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 29.856 0.024 29.880 ; + RECT 0.000 29.856 0.036 29.880 ; END END din_a[130] PIN din_a[131] @@ -3503,7 +3503,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 29.904 0.024 29.928 ; + RECT 0.000 29.904 0.036 29.928 ; END END din_a[131] PIN din_a[132] @@ -3512,7 +3512,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 29.952 0.024 29.976 ; + RECT 0.000 29.952 0.036 29.976 ; END END din_a[132] PIN din_a[133] @@ -3521,7 +3521,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 30.000 0.024 30.024 ; + RECT 0.000 30.000 0.036 30.024 ; END END din_a[133] PIN din_a[134] @@ -3530,7 +3530,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 30.048 0.024 30.072 ; + RECT 0.000 30.048 0.036 30.072 ; END END din_a[134] PIN din_a[135] @@ -3539,7 +3539,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 30.096 0.024 30.120 ; + RECT 0.000 30.096 0.036 30.120 ; END END din_a[135] PIN din_a[136] @@ -3548,7 +3548,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 30.144 0.024 30.168 ; + RECT 0.000 30.144 0.036 30.168 ; END END din_a[136] PIN din_a[137] @@ -3557,7 +3557,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 30.192 0.024 30.216 ; + RECT 0.000 30.192 0.036 30.216 ; END END din_a[137] PIN din_a[138] @@ -3566,7 +3566,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 30.240 0.024 30.264 ; + RECT 0.000 30.240 0.036 30.264 ; END END din_a[138] PIN din_a[139] @@ -3575,7 +3575,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 30.288 0.024 30.312 ; + RECT 0.000 30.288 0.036 30.312 ; END END din_a[139] PIN din_a[140] @@ -3584,7 +3584,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 30.336 0.024 30.360 ; + RECT 0.000 30.336 0.036 30.360 ; END END din_a[140] PIN din_a[141] @@ -3593,7 +3593,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 30.384 0.024 30.408 ; + RECT 0.000 30.384 0.036 30.408 ; END END din_a[141] PIN din_a[142] @@ -3602,7 +3602,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 30.432 0.024 30.456 ; + RECT 0.000 30.432 0.036 30.456 ; END END din_a[142] PIN din_a[143] @@ -3611,7 +3611,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 30.480 0.024 30.504 ; + RECT 0.000 30.480 0.036 30.504 ; END END din_a[143] PIN din_a[144] @@ -3620,7 +3620,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 30.528 0.024 30.552 ; + RECT 0.000 30.528 0.036 30.552 ; END END din_a[144] PIN din_a[145] @@ -3629,7 +3629,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 30.576 0.024 30.600 ; + RECT 0.000 30.576 0.036 30.600 ; END END din_a[145] PIN din_a[146] @@ -3638,7 +3638,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 30.624 0.024 30.648 ; + RECT 0.000 30.624 0.036 30.648 ; END END din_a[146] PIN din_a[147] @@ -3647,7 +3647,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 30.672 0.024 30.696 ; + RECT 0.000 30.672 0.036 30.696 ; END END din_a[147] PIN din_a[148] @@ -3656,7 +3656,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 30.720 0.024 30.744 ; + RECT 0.000 30.720 0.036 30.744 ; END END din_a[148] PIN din_a[149] @@ -3665,7 +3665,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 30.768 0.024 30.792 ; + RECT 0.000 30.768 0.036 30.792 ; END END din_a[149] PIN din_a[150] @@ -3674,7 +3674,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 30.816 0.024 30.840 ; + RECT 0.000 30.816 0.036 30.840 ; END END din_a[150] PIN din_a[151] @@ -3683,7 +3683,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 30.864 0.024 30.888 ; + RECT 0.000 30.864 0.036 30.888 ; END END din_a[151] PIN din_a[152] @@ -3692,7 +3692,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 30.912 0.024 30.936 ; + RECT 0.000 30.912 0.036 30.936 ; END END din_a[152] PIN din_a[153] @@ -3701,7 +3701,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 30.960 0.024 30.984 ; + RECT 0.000 30.960 0.036 30.984 ; END END din_a[153] PIN din_a[154] @@ -3710,7 +3710,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 31.008 0.024 31.032 ; + RECT 0.000 31.008 0.036 31.032 ; END END din_a[154] PIN din_a[155] @@ -3719,7 +3719,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 31.056 0.024 31.080 ; + RECT 0.000 31.056 0.036 31.080 ; END END din_a[155] PIN din_a[156] @@ -3728,7 +3728,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 31.104 0.024 31.128 ; + RECT 0.000 31.104 0.036 31.128 ; END END din_a[156] PIN din_a[157] @@ -3737,7 +3737,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 31.152 0.024 31.176 ; + RECT 0.000 31.152 0.036 31.176 ; END END din_a[157] PIN din_a[158] @@ -3746,7 +3746,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 31.200 0.024 31.224 ; + RECT 0.000 31.200 0.036 31.224 ; END END din_a[158] PIN din_a[159] @@ -3755,7 +3755,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 31.248 0.024 31.272 ; + RECT 0.000 31.248 0.036 31.272 ; END END din_a[159] PIN din_a[160] @@ -3764,7 +3764,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 31.296 0.024 31.320 ; + RECT 0.000 31.296 0.036 31.320 ; END END din_a[160] PIN din_a[161] @@ -3773,7 +3773,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 31.344 0.024 31.368 ; + RECT 0.000 31.344 0.036 31.368 ; END END din_a[161] PIN din_a[162] @@ -3782,7 +3782,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 31.392 0.024 31.416 ; + RECT 0.000 31.392 0.036 31.416 ; END END din_a[162] PIN din_a[163] @@ -3791,7 +3791,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 31.440 0.024 31.464 ; + RECT 0.000 31.440 0.036 31.464 ; END END din_a[163] PIN din_a[164] @@ -3800,7 +3800,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 31.488 0.024 31.512 ; + RECT 0.000 31.488 0.036 31.512 ; END END din_a[164] PIN din_a[165] @@ -3809,7 +3809,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 31.536 0.024 31.560 ; + RECT 0.000 31.536 0.036 31.560 ; END END din_a[165] PIN din_a[166] @@ -3818,7 +3818,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 31.584 0.024 31.608 ; + RECT 0.000 31.584 0.036 31.608 ; END END din_a[166] PIN din_a[167] @@ -3827,7 +3827,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 31.632 0.024 31.656 ; + RECT 0.000 31.632 0.036 31.656 ; END END din_a[167] PIN din_a[168] @@ -3836,7 +3836,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 31.680 0.024 31.704 ; + RECT 0.000 31.680 0.036 31.704 ; END END din_a[168] PIN din_a[169] @@ -3845,7 +3845,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 31.728 0.024 31.752 ; + RECT 0.000 31.728 0.036 31.752 ; END END din_a[169] PIN din_a[170] @@ -3854,7 +3854,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 31.776 0.024 31.800 ; + RECT 0.000 31.776 0.036 31.800 ; END END din_a[170] PIN din_a[171] @@ -3863,7 +3863,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 31.824 0.024 31.848 ; + RECT 0.000 31.824 0.036 31.848 ; END END din_a[171] PIN din_a[172] @@ -3872,7 +3872,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 31.872 0.024 31.896 ; + RECT 0.000 31.872 0.036 31.896 ; END END din_a[172] PIN din_a[173] @@ -3881,7 +3881,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 31.920 0.024 31.944 ; + RECT 0.000 31.920 0.036 31.944 ; END END din_a[173] PIN din_a[174] @@ -3890,7 +3890,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 31.968 0.024 31.992 ; + RECT 0.000 31.968 0.036 31.992 ; END END din_a[174] PIN din_a[175] @@ -3899,7 +3899,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 32.016 0.024 32.040 ; + RECT 0.000 32.016 0.036 32.040 ; END END din_a[175] PIN din_a[176] @@ -3908,7 +3908,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 32.064 0.024 32.088 ; + RECT 0.000 32.064 0.036 32.088 ; END END din_a[176] PIN din_a[177] @@ -3917,7 +3917,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 32.112 0.024 32.136 ; + RECT 0.000 32.112 0.036 32.136 ; END END din_a[177] PIN din_a[178] @@ -3926,7 +3926,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 32.160 0.024 32.184 ; + RECT 0.000 32.160 0.036 32.184 ; END END din_a[178] PIN din_a[179] @@ -3935,7 +3935,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 32.208 0.024 32.232 ; + RECT 0.000 32.208 0.036 32.232 ; END END din_a[179] PIN din_a[180] @@ -3944,7 +3944,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 32.256 0.024 32.280 ; + RECT 0.000 32.256 0.036 32.280 ; END END din_a[180] PIN din_a[181] @@ -3953,7 +3953,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 32.304 0.024 32.328 ; + RECT 0.000 32.304 0.036 32.328 ; END END din_a[181] PIN din_a[182] @@ -3962,7 +3962,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 32.352 0.024 32.376 ; + RECT 0.000 32.352 0.036 32.376 ; END END din_a[182] PIN din_a[183] @@ -3971,7 +3971,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 32.400 0.024 32.424 ; + RECT 0.000 32.400 0.036 32.424 ; END END din_a[183] PIN din_a[184] @@ -3980,7 +3980,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 32.448 0.024 32.472 ; + RECT 0.000 32.448 0.036 32.472 ; END END din_a[184] PIN din_a[185] @@ -3989,7 +3989,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 32.496 0.024 32.520 ; + RECT 0.000 32.496 0.036 32.520 ; END END din_a[185] PIN din_a[186] @@ -3998,7 +3998,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 32.544 0.024 32.568 ; + RECT 0.000 32.544 0.036 32.568 ; END END din_a[186] PIN din_a[187] @@ -4007,7 +4007,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 32.592 0.024 32.616 ; + RECT 0.000 32.592 0.036 32.616 ; END END din_a[187] PIN din_a[188] @@ -4016,7 +4016,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 32.640 0.024 32.664 ; + RECT 0.000 32.640 0.036 32.664 ; END END din_a[188] PIN din_a[189] @@ -4025,7 +4025,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 32.688 0.024 32.712 ; + RECT 0.000 32.688 0.036 32.712 ; END END din_a[189] PIN din_a[190] @@ -4034,7 +4034,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 32.736 0.024 32.760 ; + RECT 0.000 32.736 0.036 32.760 ; END END din_a[190] PIN din_a[191] @@ -4043,7 +4043,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 32.784 0.024 32.808 ; + RECT 0.000 32.784 0.036 32.808 ; END END din_a[191] PIN din_a[192] @@ -4052,7 +4052,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 32.832 0.024 32.856 ; + RECT 0.000 32.832 0.036 32.856 ; END END din_a[192] PIN din_a[193] @@ -4061,7 +4061,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 32.880 0.024 32.904 ; + RECT 0.000 32.880 0.036 32.904 ; END END din_a[193] PIN din_a[194] @@ -4070,7 +4070,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 32.928 0.024 32.952 ; + RECT 0.000 32.928 0.036 32.952 ; END END din_a[194] PIN din_a[195] @@ -4079,7 +4079,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 32.976 0.024 33.000 ; + RECT 0.000 32.976 0.036 33.000 ; END END din_a[195] PIN din_a[196] @@ -4088,7 +4088,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 33.024 0.024 33.048 ; + RECT 0.000 33.024 0.036 33.048 ; END END din_a[196] PIN din_a[197] @@ -4097,7 +4097,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 33.072 0.024 33.096 ; + RECT 0.000 33.072 0.036 33.096 ; END END din_a[197] PIN din_a[198] @@ -4106,7 +4106,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 33.120 0.024 33.144 ; + RECT 0.000 33.120 0.036 33.144 ; END END din_a[198] PIN din_a[199] @@ -4115,7 +4115,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 33.168 0.024 33.192 ; + RECT 0.000 33.168 0.036 33.192 ; END END din_a[199] PIN din_a[200] @@ -4124,7 +4124,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 33.216 0.024 33.240 ; + RECT 0.000 33.216 0.036 33.240 ; END END din_a[200] PIN din_a[201] @@ -4133,7 +4133,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 33.264 0.024 33.288 ; + RECT 0.000 33.264 0.036 33.288 ; END END din_a[201] PIN din_a[202] @@ -4142,7 +4142,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 33.312 0.024 33.336 ; + RECT 0.000 33.312 0.036 33.336 ; END END din_a[202] PIN din_a[203] @@ -4151,7 +4151,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 33.360 0.024 33.384 ; + RECT 0.000 33.360 0.036 33.384 ; END END din_a[203] PIN din_a[204] @@ -4160,7 +4160,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 33.408 0.024 33.432 ; + RECT 0.000 33.408 0.036 33.432 ; END END din_a[204] PIN din_a[205] @@ -4169,7 +4169,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 33.456 0.024 33.480 ; + RECT 0.000 33.456 0.036 33.480 ; END END din_a[205] PIN din_a[206] @@ -4178,7 +4178,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 33.504 0.024 33.528 ; + RECT 0.000 33.504 0.036 33.528 ; END END din_a[206] PIN din_a[207] @@ -4187,7 +4187,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 33.552 0.024 33.576 ; + RECT 0.000 33.552 0.036 33.576 ; END END din_a[207] PIN din_a[208] @@ -4196,7 +4196,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 33.600 0.024 33.624 ; + RECT 0.000 33.600 0.036 33.624 ; END END din_a[208] PIN din_a[209] @@ -4205,7 +4205,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 33.648 0.024 33.672 ; + RECT 0.000 33.648 0.036 33.672 ; END END din_a[209] PIN din_a[210] @@ -4214,7 +4214,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 33.696 0.024 33.720 ; + RECT 0.000 33.696 0.036 33.720 ; END END din_a[210] PIN din_a[211] @@ -4223,7 +4223,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 33.744 0.024 33.768 ; + RECT 0.000 33.744 0.036 33.768 ; END END din_a[211] PIN din_a[212] @@ -4232,7 +4232,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 33.792 0.024 33.816 ; + RECT 0.000 33.792 0.036 33.816 ; END END din_a[212] PIN din_a[213] @@ -4241,7 +4241,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 33.840 0.024 33.864 ; + RECT 0.000 33.840 0.036 33.864 ; END END din_a[213] PIN din_a[214] @@ -4250,7 +4250,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 33.888 0.024 33.912 ; + RECT 0.000 33.888 0.036 33.912 ; END END din_a[214] PIN din_a[215] @@ -4259,7 +4259,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 33.936 0.024 33.960 ; + RECT 0.000 33.936 0.036 33.960 ; END END din_a[215] PIN din_a[216] @@ -4268,7 +4268,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 33.984 0.024 34.008 ; + RECT 0.000 33.984 0.036 34.008 ; END END din_a[216] PIN din_a[217] @@ -4277,7 +4277,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 34.032 0.024 34.056 ; + RECT 0.000 34.032 0.036 34.056 ; END END din_a[217] PIN din_a[218] @@ -4286,7 +4286,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 34.080 0.024 34.104 ; + RECT 0.000 34.080 0.036 34.104 ; END END din_a[218] PIN din_a[219] @@ -4295,7 +4295,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 34.128 0.024 34.152 ; + RECT 0.000 34.128 0.036 34.152 ; END END din_a[219] PIN din_a[220] @@ -4304,7 +4304,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 34.176 0.024 34.200 ; + RECT 0.000 34.176 0.036 34.200 ; END END din_a[220] PIN din_a[221] @@ -4313,7 +4313,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 34.224 0.024 34.248 ; + RECT 0.000 34.224 0.036 34.248 ; END END din_a[221] PIN din_a[222] @@ -4322,7 +4322,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 34.272 0.024 34.296 ; + RECT 0.000 34.272 0.036 34.296 ; END END din_a[222] PIN din_a[223] @@ -4331,7 +4331,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 34.320 0.024 34.344 ; + RECT 0.000 34.320 0.036 34.344 ; END END din_a[223] PIN din_a[224] @@ -4340,7 +4340,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 34.368 0.024 34.392 ; + RECT 0.000 34.368 0.036 34.392 ; END END din_a[224] PIN din_a[225] @@ -4349,7 +4349,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 34.416 0.024 34.440 ; + RECT 0.000 34.416 0.036 34.440 ; END END din_a[225] PIN din_a[226] @@ -4358,7 +4358,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 34.464 0.024 34.488 ; + RECT 0.000 34.464 0.036 34.488 ; END END din_a[226] PIN din_a[227] @@ -4367,7 +4367,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 34.512 0.024 34.536 ; + RECT 0.000 34.512 0.036 34.536 ; END END din_a[227] PIN din_a[228] @@ -4376,7 +4376,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 34.560 0.024 34.584 ; + RECT 0.000 34.560 0.036 34.584 ; END END din_a[228] PIN din_a[229] @@ -4385,7 +4385,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 34.608 0.024 34.632 ; + RECT 0.000 34.608 0.036 34.632 ; END END din_a[229] PIN din_a[230] @@ -4394,7 +4394,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 34.656 0.024 34.680 ; + RECT 0.000 34.656 0.036 34.680 ; END END din_a[230] PIN din_a[231] @@ -4403,7 +4403,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 34.704 0.024 34.728 ; + RECT 0.000 34.704 0.036 34.728 ; END END din_a[231] PIN din_a[232] @@ -4412,7 +4412,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 34.752 0.024 34.776 ; + RECT 0.000 34.752 0.036 34.776 ; END END din_a[232] PIN din_a[233] @@ -4421,7 +4421,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 34.800 0.024 34.824 ; + RECT 0.000 34.800 0.036 34.824 ; END END din_a[233] PIN din_a[234] @@ -4430,7 +4430,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 34.848 0.024 34.872 ; + RECT 0.000 34.848 0.036 34.872 ; END END din_a[234] PIN din_a[235] @@ -4439,7 +4439,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 34.896 0.024 34.920 ; + RECT 0.000 34.896 0.036 34.920 ; END END din_a[235] PIN din_a[236] @@ -4448,7 +4448,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 34.944 0.024 34.968 ; + RECT 0.000 34.944 0.036 34.968 ; END END din_a[236] PIN din_a[237] @@ -4457,7 +4457,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 34.992 0.024 35.016 ; + RECT 0.000 34.992 0.036 35.016 ; END END din_a[237] PIN din_a[238] @@ -4466,7 +4466,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 35.040 0.024 35.064 ; + RECT 0.000 35.040 0.036 35.064 ; END END din_a[238] PIN din_a[239] @@ -4475,7 +4475,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 35.088 0.024 35.112 ; + RECT 0.000 35.088 0.036 35.112 ; END END din_a[239] PIN din_a[240] @@ -4484,7 +4484,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 35.136 0.024 35.160 ; + RECT 0.000 35.136 0.036 35.160 ; END END din_a[240] PIN din_a[241] @@ -4493,7 +4493,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 35.184 0.024 35.208 ; + RECT 0.000 35.184 0.036 35.208 ; END END din_a[241] PIN din_a[242] @@ -4502,7 +4502,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 35.232 0.024 35.256 ; + RECT 0.000 35.232 0.036 35.256 ; END END din_a[242] PIN din_a[243] @@ -4511,7 +4511,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 35.280 0.024 35.304 ; + RECT 0.000 35.280 0.036 35.304 ; END END din_a[243] PIN din_a[244] @@ -4520,7 +4520,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 35.328 0.024 35.352 ; + RECT 0.000 35.328 0.036 35.352 ; END END din_a[244] PIN din_a[245] @@ -4529,7 +4529,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 35.376 0.024 35.400 ; + RECT 0.000 35.376 0.036 35.400 ; END END din_a[245] PIN din_a[246] @@ -4538,7 +4538,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 35.424 0.024 35.448 ; + RECT 0.000 35.424 0.036 35.448 ; END END din_a[246] PIN din_a[247] @@ -4547,7 +4547,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 35.472 0.024 35.496 ; + RECT 0.000 35.472 0.036 35.496 ; END END din_a[247] PIN din_a[248] @@ -4556,7 +4556,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 35.520 0.024 35.544 ; + RECT 0.000 35.520 0.036 35.544 ; END END din_a[248] PIN din_a[249] @@ -4565,7 +4565,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 35.568 0.024 35.592 ; + RECT 0.000 35.568 0.036 35.592 ; END END din_a[249] PIN din_a[250] @@ -4574,7 +4574,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 35.616 0.024 35.640 ; + RECT 0.000 35.616 0.036 35.640 ; END END din_a[250] PIN din_a[251] @@ -4583,7 +4583,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 35.664 0.024 35.688 ; + RECT 0.000 35.664 0.036 35.688 ; END END din_a[251] PIN din_a[252] @@ -4592,7 +4592,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 35.712 0.024 35.736 ; + RECT 0.000 35.712 0.036 35.736 ; END END din_a[252] PIN din_a[253] @@ -4601,7 +4601,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 35.760 0.024 35.784 ; + RECT 0.000 35.760 0.036 35.784 ; END END din_a[253] PIN din_a[254] @@ -4610,7 +4610,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 35.808 0.024 35.832 ; + RECT 0.000 35.808 0.036 35.832 ; END END din_a[254] PIN din_a[255] @@ -4619,7 +4619,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 35.856 0.024 35.880 ; + RECT 0.000 35.856 0.036 35.880 ; END END din_a[255] PIN addr_a[0] @@ -4628,7 +4628,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 47.184 0.024 47.208 ; + RECT 0.000 47.184 0.036 47.208 ; END END addr_a[0] PIN addr_a[1] @@ -4637,7 +4637,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 47.232 0.024 47.256 ; + RECT 0.000 47.232 0.036 47.256 ; END END addr_a[1] PIN addr_a[2] @@ -4646,7 +4646,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 47.280 0.024 47.304 ; + RECT 0.000 47.280 0.036 47.304 ; END END addr_a[2] PIN addr_a[3] @@ -4655,7 +4655,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 47.328 0.024 47.352 ; + RECT 0.000 47.328 0.036 47.352 ; END END addr_a[3] PIN addr_a[4] @@ -4664,7 +4664,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 47.376 0.024 47.400 ; + RECT 0.000 47.376 0.036 47.400 ; END END addr_a[4] PIN addr_a[5] @@ -4673,7 +4673,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 47.424 0.024 47.448 ; + RECT 0.000 47.424 0.036 47.448 ; END END addr_a[5] PIN addr_a[6] @@ -4682,7 +4682,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 47.472 0.024 47.496 ; + RECT 0.000 47.472 0.036 47.496 ; END END addr_a[6] PIN addr_a[7] @@ -4691,7 +4691,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 47.520 0.024 47.544 ; + RECT 0.000 47.520 0.036 47.544 ; END END addr_a[7] PIN dout_b[0] @@ -4700,7 +4700,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 58.848 0.024 58.872 ; + RECT 0.000 58.848 0.036 58.872 ; END END dout_b[0] PIN dout_b[1] @@ -4709,7 +4709,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 58.896 0.024 58.920 ; + RECT 0.000 58.896 0.036 58.920 ; END END dout_b[1] PIN dout_b[2] @@ -4718,7 +4718,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 58.944 0.024 58.968 ; + RECT 0.000 58.944 0.036 58.968 ; END END dout_b[2] PIN dout_b[3] @@ -4727,7 +4727,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 58.992 0.024 59.016 ; + RECT 0.000 58.992 0.036 59.016 ; END END dout_b[3] PIN dout_b[4] @@ -4736,7 +4736,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 59.040 0.024 59.064 ; + RECT 0.000 59.040 0.036 59.064 ; END END dout_b[4] PIN dout_b[5] @@ -4745,7 +4745,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 59.088 0.024 59.112 ; + RECT 0.000 59.088 0.036 59.112 ; END END dout_b[5] PIN dout_b[6] @@ -4754,7 +4754,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 59.136 0.024 59.160 ; + RECT 0.000 59.136 0.036 59.160 ; END END dout_b[6] PIN dout_b[7] @@ -4763,7 +4763,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 59.184 0.024 59.208 ; + RECT 0.000 59.184 0.036 59.208 ; END END dout_b[7] PIN dout_b[8] @@ -4772,7 +4772,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 59.232 0.024 59.256 ; + RECT 0.000 59.232 0.036 59.256 ; END END dout_b[8] PIN dout_b[9] @@ -4781,7 +4781,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 59.280 0.024 59.304 ; + RECT 0.000 59.280 0.036 59.304 ; END END dout_b[9] PIN dout_b[10] @@ -4790,7 +4790,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 59.328 0.024 59.352 ; + RECT 0.000 59.328 0.036 59.352 ; END END dout_b[10] PIN dout_b[11] @@ -4799,7 +4799,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 59.376 0.024 59.400 ; + RECT 0.000 59.376 0.036 59.400 ; END END dout_b[11] PIN dout_b[12] @@ -4808,7 +4808,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 59.424 0.024 59.448 ; + RECT 0.000 59.424 0.036 59.448 ; END END dout_b[12] PIN dout_b[13] @@ -4817,7 +4817,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 59.472 0.024 59.496 ; + RECT 0.000 59.472 0.036 59.496 ; END END dout_b[13] PIN dout_b[14] @@ -4826,7 +4826,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 59.520 0.024 59.544 ; + RECT 0.000 59.520 0.036 59.544 ; END END dout_b[14] PIN dout_b[15] @@ -4835,7 +4835,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 59.568 0.024 59.592 ; + RECT 0.000 59.568 0.036 59.592 ; END END dout_b[15] PIN dout_b[16] @@ -4844,7 +4844,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 59.616 0.024 59.640 ; + RECT 0.000 59.616 0.036 59.640 ; END END dout_b[16] PIN dout_b[17] @@ -4853,7 +4853,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 59.664 0.024 59.688 ; + RECT 0.000 59.664 0.036 59.688 ; END END dout_b[17] PIN dout_b[18] @@ -4862,7 +4862,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 59.712 0.024 59.736 ; + RECT 0.000 59.712 0.036 59.736 ; END END dout_b[18] PIN dout_b[19] @@ -4871,7 +4871,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 59.760 0.024 59.784 ; + RECT 0.000 59.760 0.036 59.784 ; END END dout_b[19] PIN dout_b[20] @@ -4880,7 +4880,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 59.808 0.024 59.832 ; + RECT 0.000 59.808 0.036 59.832 ; END END dout_b[20] PIN dout_b[21] @@ -4889,7 +4889,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 59.856 0.024 59.880 ; + RECT 0.000 59.856 0.036 59.880 ; END END dout_b[21] PIN dout_b[22] @@ -4898,7 +4898,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 59.904 0.024 59.928 ; + RECT 0.000 59.904 0.036 59.928 ; END END dout_b[22] PIN dout_b[23] @@ -4907,7 +4907,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 59.952 0.024 59.976 ; + RECT 0.000 59.952 0.036 59.976 ; END END dout_b[23] PIN dout_b[24] @@ -4916,7 +4916,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 60.000 0.024 60.024 ; + RECT 0.000 60.000 0.036 60.024 ; END END dout_b[24] PIN dout_b[25] @@ -4925,7 +4925,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 60.048 0.024 60.072 ; + RECT 0.000 60.048 0.036 60.072 ; END END dout_b[25] PIN dout_b[26] @@ -4934,7 +4934,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 60.096 0.024 60.120 ; + RECT 0.000 60.096 0.036 60.120 ; END END dout_b[26] PIN dout_b[27] @@ -4943,7 +4943,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 60.144 0.024 60.168 ; + RECT 0.000 60.144 0.036 60.168 ; END END dout_b[27] PIN dout_b[28] @@ -4952,7 +4952,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 60.192 0.024 60.216 ; + RECT 0.000 60.192 0.036 60.216 ; END END dout_b[28] PIN dout_b[29] @@ -4961,7 +4961,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 60.240 0.024 60.264 ; + RECT 0.000 60.240 0.036 60.264 ; END END dout_b[29] PIN dout_b[30] @@ -4970,7 +4970,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 60.288 0.024 60.312 ; + RECT 0.000 60.288 0.036 60.312 ; END END dout_b[30] PIN dout_b[31] @@ -4979,7 +4979,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 60.336 0.024 60.360 ; + RECT 0.000 60.336 0.036 60.360 ; END END dout_b[31] PIN dout_b[32] @@ -4988,7 +4988,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 60.384 0.024 60.408 ; + RECT 0.000 60.384 0.036 60.408 ; END END dout_b[32] PIN dout_b[33] @@ -4997,7 +4997,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 60.432 0.024 60.456 ; + RECT 0.000 60.432 0.036 60.456 ; END END dout_b[33] PIN dout_b[34] @@ -5006,7 +5006,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 60.480 0.024 60.504 ; + RECT 0.000 60.480 0.036 60.504 ; END END dout_b[34] PIN dout_b[35] @@ -5015,7 +5015,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 60.528 0.024 60.552 ; + RECT 0.000 60.528 0.036 60.552 ; END END dout_b[35] PIN dout_b[36] @@ -5024,7 +5024,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 60.576 0.024 60.600 ; + RECT 0.000 60.576 0.036 60.600 ; END END dout_b[36] PIN dout_b[37] @@ -5033,7 +5033,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 60.624 0.024 60.648 ; + RECT 0.000 60.624 0.036 60.648 ; END END dout_b[37] PIN dout_b[38] @@ -5042,7 +5042,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 60.672 0.024 60.696 ; + RECT 0.000 60.672 0.036 60.696 ; END END dout_b[38] PIN dout_b[39] @@ -5051,7 +5051,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 60.720 0.024 60.744 ; + RECT 0.000 60.720 0.036 60.744 ; END END dout_b[39] PIN dout_b[40] @@ -5060,7 +5060,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 60.768 0.024 60.792 ; + RECT 0.000 60.768 0.036 60.792 ; END END dout_b[40] PIN dout_b[41] @@ -5069,7 +5069,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 60.816 0.024 60.840 ; + RECT 0.000 60.816 0.036 60.840 ; END END dout_b[41] PIN dout_b[42] @@ -5078,7 +5078,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 60.864 0.024 60.888 ; + RECT 0.000 60.864 0.036 60.888 ; END END dout_b[42] PIN dout_b[43] @@ -5087,7 +5087,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 60.912 0.024 60.936 ; + RECT 0.000 60.912 0.036 60.936 ; END END dout_b[43] PIN dout_b[44] @@ -5096,7 +5096,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 60.960 0.024 60.984 ; + RECT 0.000 60.960 0.036 60.984 ; END END dout_b[44] PIN dout_b[45] @@ -5105,7 +5105,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 61.008 0.024 61.032 ; + RECT 0.000 61.008 0.036 61.032 ; END END dout_b[45] PIN dout_b[46] @@ -5114,7 +5114,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 61.056 0.024 61.080 ; + RECT 0.000 61.056 0.036 61.080 ; END END dout_b[46] PIN dout_b[47] @@ -5123,7 +5123,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 61.104 0.024 61.128 ; + RECT 0.000 61.104 0.036 61.128 ; END END dout_b[47] PIN dout_b[48] @@ -5132,7 +5132,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 61.152 0.024 61.176 ; + RECT 0.000 61.152 0.036 61.176 ; END END dout_b[48] PIN dout_b[49] @@ -5141,7 +5141,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 61.200 0.024 61.224 ; + RECT 0.000 61.200 0.036 61.224 ; END END dout_b[49] PIN dout_b[50] @@ -5150,7 +5150,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 61.248 0.024 61.272 ; + RECT 0.000 61.248 0.036 61.272 ; END END dout_b[50] PIN dout_b[51] @@ -5159,7 +5159,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 61.296 0.024 61.320 ; + RECT 0.000 61.296 0.036 61.320 ; END END dout_b[51] PIN dout_b[52] @@ -5168,7 +5168,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 61.344 0.024 61.368 ; + RECT 0.000 61.344 0.036 61.368 ; END END dout_b[52] PIN dout_b[53] @@ -5177,7 +5177,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 61.392 0.024 61.416 ; + RECT 0.000 61.392 0.036 61.416 ; END END dout_b[53] PIN dout_b[54] @@ -5186,7 +5186,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 61.440 0.024 61.464 ; + RECT 0.000 61.440 0.036 61.464 ; END END dout_b[54] PIN dout_b[55] @@ -5195,7 +5195,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 61.488 0.024 61.512 ; + RECT 0.000 61.488 0.036 61.512 ; END END dout_b[55] PIN dout_b[56] @@ -5204,7 +5204,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 61.536 0.024 61.560 ; + RECT 0.000 61.536 0.036 61.560 ; END END dout_b[56] PIN dout_b[57] @@ -5213,7 +5213,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 61.584 0.024 61.608 ; + RECT 0.000 61.584 0.036 61.608 ; END END dout_b[57] PIN dout_b[58] @@ -5222,7 +5222,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 61.632 0.024 61.656 ; + RECT 0.000 61.632 0.036 61.656 ; END END dout_b[58] PIN dout_b[59] @@ -5231,7 +5231,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 61.680 0.024 61.704 ; + RECT 0.000 61.680 0.036 61.704 ; END END dout_b[59] PIN dout_b[60] @@ -5240,7 +5240,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 61.728 0.024 61.752 ; + RECT 0.000 61.728 0.036 61.752 ; END END dout_b[60] PIN dout_b[61] @@ -5249,7 +5249,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 61.776 0.024 61.800 ; + RECT 0.000 61.776 0.036 61.800 ; END END dout_b[61] PIN dout_b[62] @@ -5258,7 +5258,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 61.824 0.024 61.848 ; + RECT 0.000 61.824 0.036 61.848 ; END END dout_b[62] PIN dout_b[63] @@ -5267,7 +5267,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 61.872 0.024 61.896 ; + RECT 0.000 61.872 0.036 61.896 ; END END dout_b[63] PIN dout_b[64] @@ -5276,7 +5276,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 61.920 0.024 61.944 ; + RECT 0.000 61.920 0.036 61.944 ; END END dout_b[64] PIN dout_b[65] @@ -5285,7 +5285,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 61.968 0.024 61.992 ; + RECT 0.000 61.968 0.036 61.992 ; END END dout_b[65] PIN dout_b[66] @@ -5294,7 +5294,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 62.016 0.024 62.040 ; + RECT 0.000 62.016 0.036 62.040 ; END END dout_b[66] PIN dout_b[67] @@ -5303,7 +5303,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 62.064 0.024 62.088 ; + RECT 0.000 62.064 0.036 62.088 ; END END dout_b[67] PIN dout_b[68] @@ -5312,7 +5312,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 62.112 0.024 62.136 ; + RECT 0.000 62.112 0.036 62.136 ; END END dout_b[68] PIN dout_b[69] @@ -5321,7 +5321,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 62.160 0.024 62.184 ; + RECT 0.000 62.160 0.036 62.184 ; END END dout_b[69] PIN dout_b[70] @@ -5330,7 +5330,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 62.208 0.024 62.232 ; + RECT 0.000 62.208 0.036 62.232 ; END END dout_b[70] PIN dout_b[71] @@ -5339,7 +5339,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 62.256 0.024 62.280 ; + RECT 0.000 62.256 0.036 62.280 ; END END dout_b[71] PIN dout_b[72] @@ -5348,7 +5348,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 62.304 0.024 62.328 ; + RECT 0.000 62.304 0.036 62.328 ; END END dout_b[72] PIN dout_b[73] @@ -5357,7 +5357,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 62.352 0.024 62.376 ; + RECT 0.000 62.352 0.036 62.376 ; END END dout_b[73] PIN dout_b[74] @@ -5366,7 +5366,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 62.400 0.024 62.424 ; + RECT 0.000 62.400 0.036 62.424 ; END END dout_b[74] PIN dout_b[75] @@ -5375,7 +5375,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 62.448 0.024 62.472 ; + RECT 0.000 62.448 0.036 62.472 ; END END dout_b[75] PIN dout_b[76] @@ -5384,7 +5384,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 62.496 0.024 62.520 ; + RECT 0.000 62.496 0.036 62.520 ; END END dout_b[76] PIN dout_b[77] @@ -5393,7 +5393,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 62.544 0.024 62.568 ; + RECT 0.000 62.544 0.036 62.568 ; END END dout_b[77] PIN dout_b[78] @@ -5402,7 +5402,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 62.592 0.024 62.616 ; + RECT 0.000 62.592 0.036 62.616 ; END END dout_b[78] PIN dout_b[79] @@ -5411,7 +5411,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 62.640 0.024 62.664 ; + RECT 0.000 62.640 0.036 62.664 ; END END dout_b[79] PIN dout_b[80] @@ -5420,7 +5420,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 62.688 0.024 62.712 ; + RECT 0.000 62.688 0.036 62.712 ; END END dout_b[80] PIN dout_b[81] @@ -5429,7 +5429,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 62.736 0.024 62.760 ; + RECT 0.000 62.736 0.036 62.760 ; END END dout_b[81] PIN dout_b[82] @@ -5438,7 +5438,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 62.784 0.024 62.808 ; + RECT 0.000 62.784 0.036 62.808 ; END END dout_b[82] PIN dout_b[83] @@ -5447,7 +5447,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 62.832 0.024 62.856 ; + RECT 0.000 62.832 0.036 62.856 ; END END dout_b[83] PIN dout_b[84] @@ -5456,7 +5456,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 62.880 0.024 62.904 ; + RECT 0.000 62.880 0.036 62.904 ; END END dout_b[84] PIN dout_b[85] @@ -5465,7 +5465,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 62.928 0.024 62.952 ; + RECT 0.000 62.928 0.036 62.952 ; END END dout_b[85] PIN dout_b[86] @@ -5474,7 +5474,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 62.976 0.024 63.000 ; + RECT 0.000 62.976 0.036 63.000 ; END END dout_b[86] PIN dout_b[87] @@ -5483,7 +5483,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 63.024 0.024 63.048 ; + RECT 0.000 63.024 0.036 63.048 ; END END dout_b[87] PIN dout_b[88] @@ -5492,7 +5492,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 63.072 0.024 63.096 ; + RECT 0.000 63.072 0.036 63.096 ; END END dout_b[88] PIN dout_b[89] @@ -5501,7 +5501,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 63.120 0.024 63.144 ; + RECT 0.000 63.120 0.036 63.144 ; END END dout_b[89] PIN dout_b[90] @@ -5510,7 +5510,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 63.168 0.024 63.192 ; + RECT 0.000 63.168 0.036 63.192 ; END END dout_b[90] PIN dout_b[91] @@ -5519,7 +5519,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 63.216 0.024 63.240 ; + RECT 0.000 63.216 0.036 63.240 ; END END dout_b[91] PIN dout_b[92] @@ -5528,7 +5528,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 63.264 0.024 63.288 ; + RECT 0.000 63.264 0.036 63.288 ; END END dout_b[92] PIN dout_b[93] @@ -5537,7 +5537,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 63.312 0.024 63.336 ; + RECT 0.000 63.312 0.036 63.336 ; END END dout_b[93] PIN dout_b[94] @@ -5546,7 +5546,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 63.360 0.024 63.384 ; + RECT 0.000 63.360 0.036 63.384 ; END END dout_b[94] PIN dout_b[95] @@ -5555,7 +5555,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 63.408 0.024 63.432 ; + RECT 0.000 63.408 0.036 63.432 ; END END dout_b[95] PIN dout_b[96] @@ -5564,7 +5564,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 63.456 0.024 63.480 ; + RECT 0.000 63.456 0.036 63.480 ; END END dout_b[96] PIN dout_b[97] @@ -5573,7 +5573,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 63.504 0.024 63.528 ; + RECT 0.000 63.504 0.036 63.528 ; END END dout_b[97] PIN dout_b[98] @@ -5582,7 +5582,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 63.552 0.024 63.576 ; + RECT 0.000 63.552 0.036 63.576 ; END END dout_b[98] PIN dout_b[99] @@ -5591,7 +5591,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 63.600 0.024 63.624 ; + RECT 0.000 63.600 0.036 63.624 ; END END dout_b[99] PIN dout_b[100] @@ -5600,7 +5600,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 63.648 0.024 63.672 ; + RECT 0.000 63.648 0.036 63.672 ; END END dout_b[100] PIN dout_b[101] @@ -5609,7 +5609,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 63.696 0.024 63.720 ; + RECT 0.000 63.696 0.036 63.720 ; END END dout_b[101] PIN dout_b[102] @@ -5618,7 +5618,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 63.744 0.024 63.768 ; + RECT 0.000 63.744 0.036 63.768 ; END END dout_b[102] PIN dout_b[103] @@ -5627,7 +5627,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 63.792 0.024 63.816 ; + RECT 0.000 63.792 0.036 63.816 ; END END dout_b[103] PIN dout_b[104] @@ -5636,7 +5636,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 63.840 0.024 63.864 ; + RECT 0.000 63.840 0.036 63.864 ; END END dout_b[104] PIN dout_b[105] @@ -5645,7 +5645,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 63.888 0.024 63.912 ; + RECT 0.000 63.888 0.036 63.912 ; END END dout_b[105] PIN dout_b[106] @@ -5654,7 +5654,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 63.936 0.024 63.960 ; + RECT 0.000 63.936 0.036 63.960 ; END END dout_b[106] PIN dout_b[107] @@ -5663,7 +5663,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 63.984 0.024 64.008 ; + RECT 0.000 63.984 0.036 64.008 ; END END dout_b[107] PIN dout_b[108] @@ -5672,7 +5672,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 64.032 0.024 64.056 ; + RECT 0.000 64.032 0.036 64.056 ; END END dout_b[108] PIN dout_b[109] @@ -5681,7 +5681,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 64.080 0.024 64.104 ; + RECT 0.000 64.080 0.036 64.104 ; END END dout_b[109] PIN dout_b[110] @@ -5690,7 +5690,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 64.128 0.024 64.152 ; + RECT 0.000 64.128 0.036 64.152 ; END END dout_b[110] PIN dout_b[111] @@ -5699,7 +5699,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 64.176 0.024 64.200 ; + RECT 0.000 64.176 0.036 64.200 ; END END dout_b[111] PIN dout_b[112] @@ -5708,7 +5708,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 64.224 0.024 64.248 ; + RECT 0.000 64.224 0.036 64.248 ; END END dout_b[112] PIN dout_b[113] @@ -5717,7 +5717,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 64.272 0.024 64.296 ; + RECT 0.000 64.272 0.036 64.296 ; END END dout_b[113] PIN dout_b[114] @@ -5726,7 +5726,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 64.320 0.024 64.344 ; + RECT 0.000 64.320 0.036 64.344 ; END END dout_b[114] PIN dout_b[115] @@ -5735,7 +5735,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 64.368 0.024 64.392 ; + RECT 0.000 64.368 0.036 64.392 ; END END dout_b[115] PIN dout_b[116] @@ -5744,7 +5744,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 64.416 0.024 64.440 ; + RECT 0.000 64.416 0.036 64.440 ; END END dout_b[116] PIN dout_b[117] @@ -5753,7 +5753,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 64.464 0.024 64.488 ; + RECT 0.000 64.464 0.036 64.488 ; END END dout_b[117] PIN dout_b[118] @@ -5762,7 +5762,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 64.512 0.024 64.536 ; + RECT 0.000 64.512 0.036 64.536 ; END END dout_b[118] PIN dout_b[119] @@ -5771,7 +5771,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 64.560 0.024 64.584 ; + RECT 0.000 64.560 0.036 64.584 ; END END dout_b[119] PIN dout_b[120] @@ -5780,7 +5780,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 64.608 0.024 64.632 ; + RECT 0.000 64.608 0.036 64.632 ; END END dout_b[120] PIN dout_b[121] @@ -5789,7 +5789,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 64.656 0.024 64.680 ; + RECT 0.000 64.656 0.036 64.680 ; END END dout_b[121] PIN dout_b[122] @@ -5798,7 +5798,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 64.704 0.024 64.728 ; + RECT 0.000 64.704 0.036 64.728 ; END END dout_b[122] PIN dout_b[123] @@ -5807,7 +5807,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 64.752 0.024 64.776 ; + RECT 0.000 64.752 0.036 64.776 ; END END dout_b[123] PIN dout_b[124] @@ -5816,7 +5816,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 64.800 0.024 64.824 ; + RECT 0.000 64.800 0.036 64.824 ; END END dout_b[124] PIN dout_b[125] @@ -5825,7 +5825,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 64.848 0.024 64.872 ; + RECT 0.000 64.848 0.036 64.872 ; END END dout_b[125] PIN dout_b[126] @@ -5834,7 +5834,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 64.896 0.024 64.920 ; + RECT 0.000 64.896 0.036 64.920 ; END END dout_b[126] PIN dout_b[127] @@ -5843,7 +5843,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 64.944 0.024 64.968 ; + RECT 0.000 64.944 0.036 64.968 ; END END dout_b[127] PIN dout_b[128] @@ -5852,7 +5852,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 64.992 0.024 65.016 ; + RECT 0.000 64.992 0.036 65.016 ; END END dout_b[128] PIN dout_b[129] @@ -5861,7 +5861,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 65.040 0.024 65.064 ; + RECT 0.000 65.040 0.036 65.064 ; END END dout_b[129] PIN dout_b[130] @@ -5870,7 +5870,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 65.088 0.024 65.112 ; + RECT 0.000 65.088 0.036 65.112 ; END END dout_b[130] PIN dout_b[131] @@ -5879,7 +5879,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 65.136 0.024 65.160 ; + RECT 0.000 65.136 0.036 65.160 ; END END dout_b[131] PIN dout_b[132] @@ -5888,7 +5888,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 65.184 0.024 65.208 ; + RECT 0.000 65.184 0.036 65.208 ; END END dout_b[132] PIN dout_b[133] @@ -5897,7 +5897,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 65.232 0.024 65.256 ; + RECT 0.000 65.232 0.036 65.256 ; END END dout_b[133] PIN dout_b[134] @@ -5906,7 +5906,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 65.280 0.024 65.304 ; + RECT 0.000 65.280 0.036 65.304 ; END END dout_b[134] PIN dout_b[135] @@ -5915,7 +5915,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 65.328 0.024 65.352 ; + RECT 0.000 65.328 0.036 65.352 ; END END dout_b[135] PIN dout_b[136] @@ -5924,7 +5924,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 65.376 0.024 65.400 ; + RECT 0.000 65.376 0.036 65.400 ; END END dout_b[136] PIN dout_b[137] @@ -5933,7 +5933,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 65.424 0.024 65.448 ; + RECT 0.000 65.424 0.036 65.448 ; END END dout_b[137] PIN dout_b[138] @@ -5942,7 +5942,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 65.472 0.024 65.496 ; + RECT 0.000 65.472 0.036 65.496 ; END END dout_b[138] PIN dout_b[139] @@ -5951,7 +5951,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 65.520 0.024 65.544 ; + RECT 0.000 65.520 0.036 65.544 ; END END dout_b[139] PIN dout_b[140] @@ -5960,7 +5960,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 65.568 0.024 65.592 ; + RECT 0.000 65.568 0.036 65.592 ; END END dout_b[140] PIN dout_b[141] @@ -5969,7 +5969,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 65.616 0.024 65.640 ; + RECT 0.000 65.616 0.036 65.640 ; END END dout_b[141] PIN dout_b[142] @@ -5978,7 +5978,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 65.664 0.024 65.688 ; + RECT 0.000 65.664 0.036 65.688 ; END END dout_b[142] PIN dout_b[143] @@ -5987,7 +5987,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 65.712 0.024 65.736 ; + RECT 0.000 65.712 0.036 65.736 ; END END dout_b[143] PIN dout_b[144] @@ -5996,7 +5996,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 65.760 0.024 65.784 ; + RECT 0.000 65.760 0.036 65.784 ; END END dout_b[144] PIN dout_b[145] @@ -6005,7 +6005,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 65.808 0.024 65.832 ; + RECT 0.000 65.808 0.036 65.832 ; END END dout_b[145] PIN dout_b[146] @@ -6014,7 +6014,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 65.856 0.024 65.880 ; + RECT 0.000 65.856 0.036 65.880 ; END END dout_b[146] PIN dout_b[147] @@ -6023,7 +6023,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 65.904 0.024 65.928 ; + RECT 0.000 65.904 0.036 65.928 ; END END dout_b[147] PIN dout_b[148] @@ -6032,7 +6032,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 65.952 0.024 65.976 ; + RECT 0.000 65.952 0.036 65.976 ; END END dout_b[148] PIN dout_b[149] @@ -6041,7 +6041,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 66.000 0.024 66.024 ; + RECT 0.000 66.000 0.036 66.024 ; END END dout_b[149] PIN dout_b[150] @@ -6050,7 +6050,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 66.048 0.024 66.072 ; + RECT 0.000 66.048 0.036 66.072 ; END END dout_b[150] PIN dout_b[151] @@ -6059,7 +6059,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 66.096 0.024 66.120 ; + RECT 0.000 66.096 0.036 66.120 ; END END dout_b[151] PIN dout_b[152] @@ -6068,7 +6068,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 66.144 0.024 66.168 ; + RECT 0.000 66.144 0.036 66.168 ; END END dout_b[152] PIN dout_b[153] @@ -6077,7 +6077,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 66.192 0.024 66.216 ; + RECT 0.000 66.192 0.036 66.216 ; END END dout_b[153] PIN dout_b[154] @@ -6086,7 +6086,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 66.240 0.024 66.264 ; + RECT 0.000 66.240 0.036 66.264 ; END END dout_b[154] PIN dout_b[155] @@ -6095,7 +6095,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 66.288 0.024 66.312 ; + RECT 0.000 66.288 0.036 66.312 ; END END dout_b[155] PIN dout_b[156] @@ -6104,7 +6104,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 66.336 0.024 66.360 ; + RECT 0.000 66.336 0.036 66.360 ; END END dout_b[156] PIN dout_b[157] @@ -6113,7 +6113,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 66.384 0.024 66.408 ; + RECT 0.000 66.384 0.036 66.408 ; END END dout_b[157] PIN dout_b[158] @@ -6122,7 +6122,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 66.432 0.024 66.456 ; + RECT 0.000 66.432 0.036 66.456 ; END END dout_b[158] PIN dout_b[159] @@ -6131,7 +6131,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 66.480 0.024 66.504 ; + RECT 0.000 66.480 0.036 66.504 ; END END dout_b[159] PIN dout_b[160] @@ -6140,7 +6140,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 66.528 0.024 66.552 ; + RECT 0.000 66.528 0.036 66.552 ; END END dout_b[160] PIN dout_b[161] @@ -6149,7 +6149,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 66.576 0.024 66.600 ; + RECT 0.000 66.576 0.036 66.600 ; END END dout_b[161] PIN dout_b[162] @@ -6158,7 +6158,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 66.624 0.024 66.648 ; + RECT 0.000 66.624 0.036 66.648 ; END END dout_b[162] PIN dout_b[163] @@ -6167,7 +6167,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 66.672 0.024 66.696 ; + RECT 0.000 66.672 0.036 66.696 ; END END dout_b[163] PIN dout_b[164] @@ -6176,7 +6176,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 66.720 0.024 66.744 ; + RECT 0.000 66.720 0.036 66.744 ; END END dout_b[164] PIN dout_b[165] @@ -6185,7 +6185,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 66.768 0.024 66.792 ; + RECT 0.000 66.768 0.036 66.792 ; END END dout_b[165] PIN dout_b[166] @@ -6194,7 +6194,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 66.816 0.024 66.840 ; + RECT 0.000 66.816 0.036 66.840 ; END END dout_b[166] PIN dout_b[167] @@ -6203,7 +6203,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 66.864 0.024 66.888 ; + RECT 0.000 66.864 0.036 66.888 ; END END dout_b[167] PIN dout_b[168] @@ -6212,7 +6212,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 66.912 0.024 66.936 ; + RECT 0.000 66.912 0.036 66.936 ; END END dout_b[168] PIN dout_b[169] @@ -6221,7 +6221,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 66.960 0.024 66.984 ; + RECT 0.000 66.960 0.036 66.984 ; END END dout_b[169] PIN dout_b[170] @@ -6230,7 +6230,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 67.008 0.024 67.032 ; + RECT 0.000 67.008 0.036 67.032 ; END END dout_b[170] PIN dout_b[171] @@ -6239,7 +6239,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 67.056 0.024 67.080 ; + RECT 0.000 67.056 0.036 67.080 ; END END dout_b[171] PIN dout_b[172] @@ -6248,7 +6248,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 67.104 0.024 67.128 ; + RECT 0.000 67.104 0.036 67.128 ; END END dout_b[172] PIN dout_b[173] @@ -6257,7 +6257,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 67.152 0.024 67.176 ; + RECT 0.000 67.152 0.036 67.176 ; END END dout_b[173] PIN dout_b[174] @@ -6266,7 +6266,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 67.200 0.024 67.224 ; + RECT 0.000 67.200 0.036 67.224 ; END END dout_b[174] PIN dout_b[175] @@ -6275,7 +6275,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 67.248 0.024 67.272 ; + RECT 0.000 67.248 0.036 67.272 ; END END dout_b[175] PIN dout_b[176] @@ -6284,7 +6284,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 67.296 0.024 67.320 ; + RECT 0.000 67.296 0.036 67.320 ; END END dout_b[176] PIN dout_b[177] @@ -6293,7 +6293,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 67.344 0.024 67.368 ; + RECT 0.000 67.344 0.036 67.368 ; END END dout_b[177] PIN dout_b[178] @@ -6302,7 +6302,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 67.392 0.024 67.416 ; + RECT 0.000 67.392 0.036 67.416 ; END END dout_b[178] PIN dout_b[179] @@ -6311,7 +6311,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 67.440 0.024 67.464 ; + RECT 0.000 67.440 0.036 67.464 ; END END dout_b[179] PIN dout_b[180] @@ -6320,7 +6320,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 67.488 0.024 67.512 ; + RECT 0.000 67.488 0.036 67.512 ; END END dout_b[180] PIN dout_b[181] @@ -6329,7 +6329,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 67.536 0.024 67.560 ; + RECT 0.000 67.536 0.036 67.560 ; END END dout_b[181] PIN dout_b[182] @@ -6338,7 +6338,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 67.584 0.024 67.608 ; + RECT 0.000 67.584 0.036 67.608 ; END END dout_b[182] PIN dout_b[183] @@ -6347,7 +6347,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 67.632 0.024 67.656 ; + RECT 0.000 67.632 0.036 67.656 ; END END dout_b[183] PIN dout_b[184] @@ -6356,7 +6356,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 67.680 0.024 67.704 ; + RECT 0.000 67.680 0.036 67.704 ; END END dout_b[184] PIN dout_b[185] @@ -6365,7 +6365,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 67.728 0.024 67.752 ; + RECT 0.000 67.728 0.036 67.752 ; END END dout_b[185] PIN dout_b[186] @@ -6374,7 +6374,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 67.776 0.024 67.800 ; + RECT 0.000 67.776 0.036 67.800 ; END END dout_b[186] PIN dout_b[187] @@ -6383,7 +6383,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 67.824 0.024 67.848 ; + RECT 0.000 67.824 0.036 67.848 ; END END dout_b[187] PIN dout_b[188] @@ -6392,7 +6392,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 67.872 0.024 67.896 ; + RECT 0.000 67.872 0.036 67.896 ; END END dout_b[188] PIN dout_b[189] @@ -6401,7 +6401,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 67.920 0.024 67.944 ; + RECT 0.000 67.920 0.036 67.944 ; END END dout_b[189] PIN dout_b[190] @@ -6410,7 +6410,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 67.968 0.024 67.992 ; + RECT 0.000 67.968 0.036 67.992 ; END END dout_b[190] PIN dout_b[191] @@ -6419,7 +6419,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 68.016 0.024 68.040 ; + RECT 0.000 68.016 0.036 68.040 ; END END dout_b[191] PIN dout_b[192] @@ -6428,7 +6428,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 68.064 0.024 68.088 ; + RECT 0.000 68.064 0.036 68.088 ; END END dout_b[192] PIN dout_b[193] @@ -6437,7 +6437,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 68.112 0.024 68.136 ; + RECT 0.000 68.112 0.036 68.136 ; END END dout_b[193] PIN dout_b[194] @@ -6446,7 +6446,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 68.160 0.024 68.184 ; + RECT 0.000 68.160 0.036 68.184 ; END END dout_b[194] PIN dout_b[195] @@ -6455,7 +6455,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 68.208 0.024 68.232 ; + RECT 0.000 68.208 0.036 68.232 ; END END dout_b[195] PIN dout_b[196] @@ -6464,7 +6464,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 68.256 0.024 68.280 ; + RECT 0.000 68.256 0.036 68.280 ; END END dout_b[196] PIN dout_b[197] @@ -6473,7 +6473,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 68.304 0.024 68.328 ; + RECT 0.000 68.304 0.036 68.328 ; END END dout_b[197] PIN dout_b[198] @@ -6482,7 +6482,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 68.352 0.024 68.376 ; + RECT 0.000 68.352 0.036 68.376 ; END END dout_b[198] PIN dout_b[199] @@ -6491,7 +6491,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 68.400 0.024 68.424 ; + RECT 0.000 68.400 0.036 68.424 ; END END dout_b[199] PIN dout_b[200] @@ -6500,7 +6500,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 68.448 0.024 68.472 ; + RECT 0.000 68.448 0.036 68.472 ; END END dout_b[200] PIN dout_b[201] @@ -6509,7 +6509,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 68.496 0.024 68.520 ; + RECT 0.000 68.496 0.036 68.520 ; END END dout_b[201] PIN dout_b[202] @@ -6518,7 +6518,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 68.544 0.024 68.568 ; + RECT 0.000 68.544 0.036 68.568 ; END END dout_b[202] PIN dout_b[203] @@ -6527,7 +6527,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 68.592 0.024 68.616 ; + RECT 0.000 68.592 0.036 68.616 ; END END dout_b[203] PIN dout_b[204] @@ -6536,7 +6536,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 68.640 0.024 68.664 ; + RECT 0.000 68.640 0.036 68.664 ; END END dout_b[204] PIN dout_b[205] @@ -6545,7 +6545,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 68.688 0.024 68.712 ; + RECT 0.000 68.688 0.036 68.712 ; END END dout_b[205] PIN dout_b[206] @@ -6554,7 +6554,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 68.736 0.024 68.760 ; + RECT 0.000 68.736 0.036 68.760 ; END END dout_b[206] PIN dout_b[207] @@ -6563,7 +6563,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 68.784 0.024 68.808 ; + RECT 0.000 68.784 0.036 68.808 ; END END dout_b[207] PIN dout_b[208] @@ -6572,7 +6572,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 68.832 0.024 68.856 ; + RECT 0.000 68.832 0.036 68.856 ; END END dout_b[208] PIN dout_b[209] @@ -6581,7 +6581,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 68.880 0.024 68.904 ; + RECT 0.000 68.880 0.036 68.904 ; END END dout_b[209] PIN dout_b[210] @@ -6590,7 +6590,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 68.928 0.024 68.952 ; + RECT 0.000 68.928 0.036 68.952 ; END END dout_b[210] PIN dout_b[211] @@ -6599,7 +6599,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 68.976 0.024 69.000 ; + RECT 0.000 68.976 0.036 69.000 ; END END dout_b[211] PIN dout_b[212] @@ -6608,7 +6608,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 69.024 0.024 69.048 ; + RECT 0.000 69.024 0.036 69.048 ; END END dout_b[212] PIN dout_b[213] @@ -6617,7 +6617,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 69.072 0.024 69.096 ; + RECT 0.000 69.072 0.036 69.096 ; END END dout_b[213] PIN dout_b[214] @@ -6626,7 +6626,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 69.120 0.024 69.144 ; + RECT 0.000 69.120 0.036 69.144 ; END END dout_b[214] PIN dout_b[215] @@ -6635,7 +6635,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 69.168 0.024 69.192 ; + RECT 0.000 69.168 0.036 69.192 ; END END dout_b[215] PIN dout_b[216] @@ -6644,7 +6644,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 69.216 0.024 69.240 ; + RECT 0.000 69.216 0.036 69.240 ; END END dout_b[216] PIN dout_b[217] @@ -6653,7 +6653,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 69.264 0.024 69.288 ; + RECT 0.000 69.264 0.036 69.288 ; END END dout_b[217] PIN dout_b[218] @@ -6662,7 +6662,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 69.312 0.024 69.336 ; + RECT 0.000 69.312 0.036 69.336 ; END END dout_b[218] PIN dout_b[219] @@ -6671,7 +6671,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 69.360 0.024 69.384 ; + RECT 0.000 69.360 0.036 69.384 ; END END dout_b[219] PIN dout_b[220] @@ -6680,7 +6680,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 69.408 0.024 69.432 ; + RECT 0.000 69.408 0.036 69.432 ; END END dout_b[220] PIN dout_b[221] @@ -6689,7 +6689,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 69.456 0.024 69.480 ; + RECT 0.000 69.456 0.036 69.480 ; END END dout_b[221] PIN dout_b[222] @@ -6698,7 +6698,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 69.504 0.024 69.528 ; + RECT 0.000 69.504 0.036 69.528 ; END END dout_b[222] PIN dout_b[223] @@ -6707,7 +6707,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 69.552 0.024 69.576 ; + RECT 0.000 69.552 0.036 69.576 ; END END dout_b[223] PIN dout_b[224] @@ -6716,7 +6716,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 69.600 0.024 69.624 ; + RECT 0.000 69.600 0.036 69.624 ; END END dout_b[224] PIN dout_b[225] @@ -6725,7 +6725,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 69.648 0.024 69.672 ; + RECT 0.000 69.648 0.036 69.672 ; END END dout_b[225] PIN dout_b[226] @@ -6734,7 +6734,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 69.696 0.024 69.720 ; + RECT 0.000 69.696 0.036 69.720 ; END END dout_b[226] PIN dout_b[227] @@ -6743,7 +6743,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 69.744 0.024 69.768 ; + RECT 0.000 69.744 0.036 69.768 ; END END dout_b[227] PIN dout_b[228] @@ -6752,7 +6752,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 69.792 0.024 69.816 ; + RECT 0.000 69.792 0.036 69.816 ; END END dout_b[228] PIN dout_b[229] @@ -6761,7 +6761,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 69.840 0.024 69.864 ; + RECT 0.000 69.840 0.036 69.864 ; END END dout_b[229] PIN dout_b[230] @@ -6770,7 +6770,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 69.888 0.024 69.912 ; + RECT 0.000 69.888 0.036 69.912 ; END END dout_b[230] PIN dout_b[231] @@ -6779,7 +6779,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 69.936 0.024 69.960 ; + RECT 0.000 69.936 0.036 69.960 ; END END dout_b[231] PIN dout_b[232] @@ -6788,7 +6788,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 69.984 0.024 70.008 ; + RECT 0.000 69.984 0.036 70.008 ; END END dout_b[232] PIN dout_b[233] @@ -6797,7 +6797,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 70.032 0.024 70.056 ; + RECT 0.000 70.032 0.036 70.056 ; END END dout_b[233] PIN dout_b[234] @@ -6806,7 +6806,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 70.080 0.024 70.104 ; + RECT 0.000 70.080 0.036 70.104 ; END END dout_b[234] PIN dout_b[235] @@ -6815,7 +6815,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 70.128 0.024 70.152 ; + RECT 0.000 70.128 0.036 70.152 ; END END dout_b[235] PIN dout_b[236] @@ -6824,7 +6824,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 70.176 0.024 70.200 ; + RECT 0.000 70.176 0.036 70.200 ; END END dout_b[236] PIN dout_b[237] @@ -6833,7 +6833,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 70.224 0.024 70.248 ; + RECT 0.000 70.224 0.036 70.248 ; END END dout_b[237] PIN dout_b[238] @@ -6842,7 +6842,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 70.272 0.024 70.296 ; + RECT 0.000 70.272 0.036 70.296 ; END END dout_b[238] PIN dout_b[239] @@ -6851,7 +6851,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 70.320 0.024 70.344 ; + RECT 0.000 70.320 0.036 70.344 ; END END dout_b[239] PIN dout_b[240] @@ -6860,7 +6860,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 70.368 0.024 70.392 ; + RECT 0.000 70.368 0.036 70.392 ; END END dout_b[240] PIN dout_b[241] @@ -6869,7 +6869,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 70.416 0.024 70.440 ; + RECT 0.000 70.416 0.036 70.440 ; END END dout_b[241] PIN dout_b[242] @@ -6878,7 +6878,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 70.464 0.024 70.488 ; + RECT 0.000 70.464 0.036 70.488 ; END END dout_b[242] PIN dout_b[243] @@ -6887,7 +6887,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 70.512 0.024 70.536 ; + RECT 0.000 70.512 0.036 70.536 ; END END dout_b[243] PIN dout_b[244] @@ -6896,7 +6896,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 70.560 0.024 70.584 ; + RECT 0.000 70.560 0.036 70.584 ; END END dout_b[244] PIN dout_b[245] @@ -6905,7 +6905,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 70.608 0.024 70.632 ; + RECT 0.000 70.608 0.036 70.632 ; END END dout_b[245] PIN dout_b[246] @@ -6914,7 +6914,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 70.656 0.024 70.680 ; + RECT 0.000 70.656 0.036 70.680 ; END END dout_b[246] PIN dout_b[247] @@ -6923,7 +6923,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 70.704 0.024 70.728 ; + RECT 0.000 70.704 0.036 70.728 ; END END dout_b[247] PIN dout_b[248] @@ -6932,7 +6932,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 70.752 0.024 70.776 ; + RECT 0.000 70.752 0.036 70.776 ; END END dout_b[248] PIN dout_b[249] @@ -6941,7 +6941,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 70.800 0.024 70.824 ; + RECT 0.000 70.800 0.036 70.824 ; END END dout_b[249] PIN dout_b[250] @@ -6950,7 +6950,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 70.848 0.024 70.872 ; + RECT 0.000 70.848 0.036 70.872 ; END END dout_b[250] PIN dout_b[251] @@ -6959,7 +6959,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 70.896 0.024 70.920 ; + RECT 0.000 70.896 0.036 70.920 ; END END dout_b[251] PIN dout_b[252] @@ -6968,7 +6968,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 70.944 0.024 70.968 ; + RECT 0.000 70.944 0.036 70.968 ; END END dout_b[252] PIN dout_b[253] @@ -6977,7 +6977,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 70.992 0.024 71.016 ; + RECT 0.000 70.992 0.036 71.016 ; END END dout_b[253] PIN dout_b[254] @@ -6986,7 +6986,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 71.040 0.024 71.064 ; + RECT 0.000 71.040 0.036 71.064 ; END END dout_b[254] PIN dout_b[255] @@ -6995,7 +6995,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 71.088 0.024 71.112 ; + RECT 0.000 71.088 0.036 71.112 ; END END dout_b[255] PIN din_b[0] @@ -7004,7 +7004,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 82.416 0.024 82.440 ; + RECT 0.000 82.416 0.036 82.440 ; END END din_b[0] PIN din_b[1] @@ -7013,7 +7013,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 82.464 0.024 82.488 ; + RECT 0.000 82.464 0.036 82.488 ; END END din_b[1] PIN din_b[2] @@ -7022,7 +7022,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 82.512 0.024 82.536 ; + RECT 0.000 82.512 0.036 82.536 ; END END din_b[2] PIN din_b[3] @@ -7031,7 +7031,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 82.560 0.024 82.584 ; + RECT 0.000 82.560 0.036 82.584 ; END END din_b[3] PIN din_b[4] @@ -7040,7 +7040,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 82.608 0.024 82.632 ; + RECT 0.000 82.608 0.036 82.632 ; END END din_b[4] PIN din_b[5] @@ -7049,7 +7049,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 82.656 0.024 82.680 ; + RECT 0.000 82.656 0.036 82.680 ; END END din_b[5] PIN din_b[6] @@ -7058,7 +7058,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 82.704 0.024 82.728 ; + RECT 0.000 82.704 0.036 82.728 ; END END din_b[6] PIN din_b[7] @@ -7067,7 +7067,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 82.752 0.024 82.776 ; + RECT 0.000 82.752 0.036 82.776 ; END END din_b[7] PIN din_b[8] @@ -7076,7 +7076,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 82.800 0.024 82.824 ; + RECT 0.000 82.800 0.036 82.824 ; END END din_b[8] PIN din_b[9] @@ -7085,7 +7085,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 82.848 0.024 82.872 ; + RECT 0.000 82.848 0.036 82.872 ; END END din_b[9] PIN din_b[10] @@ -7094,7 +7094,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 82.896 0.024 82.920 ; + RECT 0.000 82.896 0.036 82.920 ; END END din_b[10] PIN din_b[11] @@ -7103,7 +7103,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 82.944 0.024 82.968 ; + RECT 0.000 82.944 0.036 82.968 ; END END din_b[11] PIN din_b[12] @@ -7112,7 +7112,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 82.992 0.024 83.016 ; + RECT 0.000 82.992 0.036 83.016 ; END END din_b[12] PIN din_b[13] @@ -7121,7 +7121,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 83.040 0.024 83.064 ; + RECT 0.000 83.040 0.036 83.064 ; END END din_b[13] PIN din_b[14] @@ -7130,7 +7130,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 83.088 0.024 83.112 ; + RECT 0.000 83.088 0.036 83.112 ; END END din_b[14] PIN din_b[15] @@ -7139,7 +7139,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 83.136 0.024 83.160 ; + RECT 0.000 83.136 0.036 83.160 ; END END din_b[15] PIN din_b[16] @@ -7148,7 +7148,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 83.184 0.024 83.208 ; + RECT 0.000 83.184 0.036 83.208 ; END END din_b[16] PIN din_b[17] @@ -7157,7 +7157,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 83.232 0.024 83.256 ; + RECT 0.000 83.232 0.036 83.256 ; END END din_b[17] PIN din_b[18] @@ -7166,7 +7166,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 83.280 0.024 83.304 ; + RECT 0.000 83.280 0.036 83.304 ; END END din_b[18] PIN din_b[19] @@ -7175,7 +7175,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 83.328 0.024 83.352 ; + RECT 0.000 83.328 0.036 83.352 ; END END din_b[19] PIN din_b[20] @@ -7184,7 +7184,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 83.376 0.024 83.400 ; + RECT 0.000 83.376 0.036 83.400 ; END END din_b[20] PIN din_b[21] @@ -7193,7 +7193,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 83.424 0.024 83.448 ; + RECT 0.000 83.424 0.036 83.448 ; END END din_b[21] PIN din_b[22] @@ -7202,7 +7202,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 83.472 0.024 83.496 ; + RECT 0.000 83.472 0.036 83.496 ; END END din_b[22] PIN din_b[23] @@ -7211,7 +7211,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 83.520 0.024 83.544 ; + RECT 0.000 83.520 0.036 83.544 ; END END din_b[23] PIN din_b[24] @@ -7220,7 +7220,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 83.568 0.024 83.592 ; + RECT 0.000 83.568 0.036 83.592 ; END END din_b[24] PIN din_b[25] @@ -7229,7 +7229,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 83.616 0.024 83.640 ; + RECT 0.000 83.616 0.036 83.640 ; END END din_b[25] PIN din_b[26] @@ -7238,7 +7238,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 83.664 0.024 83.688 ; + RECT 0.000 83.664 0.036 83.688 ; END END din_b[26] PIN din_b[27] @@ -7247,7 +7247,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 83.712 0.024 83.736 ; + RECT 0.000 83.712 0.036 83.736 ; END END din_b[27] PIN din_b[28] @@ -7256,7 +7256,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 83.760 0.024 83.784 ; + RECT 0.000 83.760 0.036 83.784 ; END END din_b[28] PIN din_b[29] @@ -7265,7 +7265,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 83.808 0.024 83.832 ; + RECT 0.000 83.808 0.036 83.832 ; END END din_b[29] PIN din_b[30] @@ -7274,7 +7274,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 83.856 0.024 83.880 ; + RECT 0.000 83.856 0.036 83.880 ; END END din_b[30] PIN din_b[31] @@ -7283,7 +7283,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 83.904 0.024 83.928 ; + RECT 0.000 83.904 0.036 83.928 ; END END din_b[31] PIN din_b[32] @@ -7292,7 +7292,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 83.952 0.024 83.976 ; + RECT 0.000 83.952 0.036 83.976 ; END END din_b[32] PIN din_b[33] @@ -7301,7 +7301,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 84.000 0.024 84.024 ; + RECT 0.000 84.000 0.036 84.024 ; END END din_b[33] PIN din_b[34] @@ -7310,7 +7310,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 84.048 0.024 84.072 ; + RECT 0.000 84.048 0.036 84.072 ; END END din_b[34] PIN din_b[35] @@ -7319,7 +7319,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 84.096 0.024 84.120 ; + RECT 0.000 84.096 0.036 84.120 ; END END din_b[35] PIN din_b[36] @@ -7328,7 +7328,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 84.144 0.024 84.168 ; + RECT 0.000 84.144 0.036 84.168 ; END END din_b[36] PIN din_b[37] @@ -7337,7 +7337,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 84.192 0.024 84.216 ; + RECT 0.000 84.192 0.036 84.216 ; END END din_b[37] PIN din_b[38] @@ -7346,7 +7346,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 84.240 0.024 84.264 ; + RECT 0.000 84.240 0.036 84.264 ; END END din_b[38] PIN din_b[39] @@ -7355,7 +7355,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 84.288 0.024 84.312 ; + RECT 0.000 84.288 0.036 84.312 ; END END din_b[39] PIN din_b[40] @@ -7364,7 +7364,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 84.336 0.024 84.360 ; + RECT 0.000 84.336 0.036 84.360 ; END END din_b[40] PIN din_b[41] @@ -7373,7 +7373,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 84.384 0.024 84.408 ; + RECT 0.000 84.384 0.036 84.408 ; END END din_b[41] PIN din_b[42] @@ -7382,7 +7382,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 84.432 0.024 84.456 ; + RECT 0.000 84.432 0.036 84.456 ; END END din_b[42] PIN din_b[43] @@ -7391,7 +7391,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 84.480 0.024 84.504 ; + RECT 0.000 84.480 0.036 84.504 ; END END din_b[43] PIN din_b[44] @@ -7400,7 +7400,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 84.528 0.024 84.552 ; + RECT 0.000 84.528 0.036 84.552 ; END END din_b[44] PIN din_b[45] @@ -7409,7 +7409,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 84.576 0.024 84.600 ; + RECT 0.000 84.576 0.036 84.600 ; END END din_b[45] PIN din_b[46] @@ -7418,7 +7418,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 84.624 0.024 84.648 ; + RECT 0.000 84.624 0.036 84.648 ; END END din_b[46] PIN din_b[47] @@ -7427,7 +7427,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 84.672 0.024 84.696 ; + RECT 0.000 84.672 0.036 84.696 ; END END din_b[47] PIN din_b[48] @@ -7436,7 +7436,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 84.720 0.024 84.744 ; + RECT 0.000 84.720 0.036 84.744 ; END END din_b[48] PIN din_b[49] @@ -7445,7 +7445,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 84.768 0.024 84.792 ; + RECT 0.000 84.768 0.036 84.792 ; END END din_b[49] PIN din_b[50] @@ -7454,7 +7454,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 84.816 0.024 84.840 ; + RECT 0.000 84.816 0.036 84.840 ; END END din_b[50] PIN din_b[51] @@ -7463,7 +7463,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 84.864 0.024 84.888 ; + RECT 0.000 84.864 0.036 84.888 ; END END din_b[51] PIN din_b[52] @@ -7472,7 +7472,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 84.912 0.024 84.936 ; + RECT 0.000 84.912 0.036 84.936 ; END END din_b[52] PIN din_b[53] @@ -7481,7 +7481,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 84.960 0.024 84.984 ; + RECT 0.000 84.960 0.036 84.984 ; END END din_b[53] PIN din_b[54] @@ -7490,7 +7490,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 85.008 0.024 85.032 ; + RECT 0.000 85.008 0.036 85.032 ; END END din_b[54] PIN din_b[55] @@ -7499,7 +7499,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 85.056 0.024 85.080 ; + RECT 0.000 85.056 0.036 85.080 ; END END din_b[55] PIN din_b[56] @@ -7508,7 +7508,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 85.104 0.024 85.128 ; + RECT 0.000 85.104 0.036 85.128 ; END END din_b[56] PIN din_b[57] @@ -7517,7 +7517,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 85.152 0.024 85.176 ; + RECT 0.000 85.152 0.036 85.176 ; END END din_b[57] PIN din_b[58] @@ -7526,7 +7526,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 85.200 0.024 85.224 ; + RECT 0.000 85.200 0.036 85.224 ; END END din_b[58] PIN din_b[59] @@ -7535,7 +7535,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 85.248 0.024 85.272 ; + RECT 0.000 85.248 0.036 85.272 ; END END din_b[59] PIN din_b[60] @@ -7544,7 +7544,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 85.296 0.024 85.320 ; + RECT 0.000 85.296 0.036 85.320 ; END END din_b[60] PIN din_b[61] @@ -7553,7 +7553,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 85.344 0.024 85.368 ; + RECT 0.000 85.344 0.036 85.368 ; END END din_b[61] PIN din_b[62] @@ -7562,7 +7562,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 85.392 0.024 85.416 ; + RECT 0.000 85.392 0.036 85.416 ; END END din_b[62] PIN din_b[63] @@ -7571,7 +7571,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 85.440 0.024 85.464 ; + RECT 0.000 85.440 0.036 85.464 ; END END din_b[63] PIN din_b[64] @@ -7580,7 +7580,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 85.488 0.024 85.512 ; + RECT 0.000 85.488 0.036 85.512 ; END END din_b[64] PIN din_b[65] @@ -7589,7 +7589,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 85.536 0.024 85.560 ; + RECT 0.000 85.536 0.036 85.560 ; END END din_b[65] PIN din_b[66] @@ -7598,7 +7598,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 85.584 0.024 85.608 ; + RECT 0.000 85.584 0.036 85.608 ; END END din_b[66] PIN din_b[67] @@ -7607,7 +7607,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 85.632 0.024 85.656 ; + RECT 0.000 85.632 0.036 85.656 ; END END din_b[67] PIN din_b[68] @@ -7616,7 +7616,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 85.680 0.024 85.704 ; + RECT 0.000 85.680 0.036 85.704 ; END END din_b[68] PIN din_b[69] @@ -7625,7 +7625,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 85.728 0.024 85.752 ; + RECT 0.000 85.728 0.036 85.752 ; END END din_b[69] PIN din_b[70] @@ -7634,7 +7634,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 85.776 0.024 85.800 ; + RECT 0.000 85.776 0.036 85.800 ; END END din_b[70] PIN din_b[71] @@ -7643,7 +7643,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 85.824 0.024 85.848 ; + RECT 0.000 85.824 0.036 85.848 ; END END din_b[71] PIN din_b[72] @@ -7652,7 +7652,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 85.872 0.024 85.896 ; + RECT 0.000 85.872 0.036 85.896 ; END END din_b[72] PIN din_b[73] @@ -7661,7 +7661,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 85.920 0.024 85.944 ; + RECT 0.000 85.920 0.036 85.944 ; END END din_b[73] PIN din_b[74] @@ -7670,7 +7670,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 85.968 0.024 85.992 ; + RECT 0.000 85.968 0.036 85.992 ; END END din_b[74] PIN din_b[75] @@ -7679,7 +7679,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 86.016 0.024 86.040 ; + RECT 0.000 86.016 0.036 86.040 ; END END din_b[75] PIN din_b[76] @@ -7688,7 +7688,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 86.064 0.024 86.088 ; + RECT 0.000 86.064 0.036 86.088 ; END END din_b[76] PIN din_b[77] @@ -7697,7 +7697,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 86.112 0.024 86.136 ; + RECT 0.000 86.112 0.036 86.136 ; END END din_b[77] PIN din_b[78] @@ -7706,7 +7706,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 86.160 0.024 86.184 ; + RECT 0.000 86.160 0.036 86.184 ; END END din_b[78] PIN din_b[79] @@ -7715,7 +7715,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 86.208 0.024 86.232 ; + RECT 0.000 86.208 0.036 86.232 ; END END din_b[79] PIN din_b[80] @@ -7724,7 +7724,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 86.256 0.024 86.280 ; + RECT 0.000 86.256 0.036 86.280 ; END END din_b[80] PIN din_b[81] @@ -7733,7 +7733,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 86.304 0.024 86.328 ; + RECT 0.000 86.304 0.036 86.328 ; END END din_b[81] PIN din_b[82] @@ -7742,7 +7742,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 86.352 0.024 86.376 ; + RECT 0.000 86.352 0.036 86.376 ; END END din_b[82] PIN din_b[83] @@ -7751,7 +7751,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 86.400 0.024 86.424 ; + RECT 0.000 86.400 0.036 86.424 ; END END din_b[83] PIN din_b[84] @@ -7760,7 +7760,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 86.448 0.024 86.472 ; + RECT 0.000 86.448 0.036 86.472 ; END END din_b[84] PIN din_b[85] @@ -7769,7 +7769,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 86.496 0.024 86.520 ; + RECT 0.000 86.496 0.036 86.520 ; END END din_b[85] PIN din_b[86] @@ -7778,7 +7778,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 86.544 0.024 86.568 ; + RECT 0.000 86.544 0.036 86.568 ; END END din_b[86] PIN din_b[87] @@ -7787,7 +7787,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 86.592 0.024 86.616 ; + RECT 0.000 86.592 0.036 86.616 ; END END din_b[87] PIN din_b[88] @@ -7796,7 +7796,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 86.640 0.024 86.664 ; + RECT 0.000 86.640 0.036 86.664 ; END END din_b[88] PIN din_b[89] @@ -7805,7 +7805,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 86.688 0.024 86.712 ; + RECT 0.000 86.688 0.036 86.712 ; END END din_b[89] PIN din_b[90] @@ -7814,7 +7814,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 86.736 0.024 86.760 ; + RECT 0.000 86.736 0.036 86.760 ; END END din_b[90] PIN din_b[91] @@ -7823,7 +7823,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 86.784 0.024 86.808 ; + RECT 0.000 86.784 0.036 86.808 ; END END din_b[91] PIN din_b[92] @@ -7832,7 +7832,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 86.832 0.024 86.856 ; + RECT 0.000 86.832 0.036 86.856 ; END END din_b[92] PIN din_b[93] @@ -7841,7 +7841,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 86.880 0.024 86.904 ; + RECT 0.000 86.880 0.036 86.904 ; END END din_b[93] PIN din_b[94] @@ -7850,7 +7850,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 86.928 0.024 86.952 ; + RECT 0.000 86.928 0.036 86.952 ; END END din_b[94] PIN din_b[95] @@ -7859,7 +7859,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 86.976 0.024 87.000 ; + RECT 0.000 86.976 0.036 87.000 ; END END din_b[95] PIN din_b[96] @@ -7868,7 +7868,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 87.024 0.024 87.048 ; + RECT 0.000 87.024 0.036 87.048 ; END END din_b[96] PIN din_b[97] @@ -7877,7 +7877,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 87.072 0.024 87.096 ; + RECT 0.000 87.072 0.036 87.096 ; END END din_b[97] PIN din_b[98] @@ -7886,7 +7886,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 87.120 0.024 87.144 ; + RECT 0.000 87.120 0.036 87.144 ; END END din_b[98] PIN din_b[99] @@ -7895,7 +7895,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 87.168 0.024 87.192 ; + RECT 0.000 87.168 0.036 87.192 ; END END din_b[99] PIN din_b[100] @@ -7904,7 +7904,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 87.216 0.024 87.240 ; + RECT 0.000 87.216 0.036 87.240 ; END END din_b[100] PIN din_b[101] @@ -7913,7 +7913,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 87.264 0.024 87.288 ; + RECT 0.000 87.264 0.036 87.288 ; END END din_b[101] PIN din_b[102] @@ -7922,7 +7922,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 87.312 0.024 87.336 ; + RECT 0.000 87.312 0.036 87.336 ; END END din_b[102] PIN din_b[103] @@ -7931,7 +7931,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 87.360 0.024 87.384 ; + RECT 0.000 87.360 0.036 87.384 ; END END din_b[103] PIN din_b[104] @@ -7940,7 +7940,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 87.408 0.024 87.432 ; + RECT 0.000 87.408 0.036 87.432 ; END END din_b[104] PIN din_b[105] @@ -7949,7 +7949,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 87.456 0.024 87.480 ; + RECT 0.000 87.456 0.036 87.480 ; END END din_b[105] PIN din_b[106] @@ -7958,7 +7958,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 87.504 0.024 87.528 ; + RECT 0.000 87.504 0.036 87.528 ; END END din_b[106] PIN din_b[107] @@ -7967,7 +7967,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 87.552 0.024 87.576 ; + RECT 0.000 87.552 0.036 87.576 ; END END din_b[107] PIN din_b[108] @@ -7976,7 +7976,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 87.600 0.024 87.624 ; + RECT 0.000 87.600 0.036 87.624 ; END END din_b[108] PIN din_b[109] @@ -7985,7 +7985,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 87.648 0.024 87.672 ; + RECT 0.000 87.648 0.036 87.672 ; END END din_b[109] PIN din_b[110] @@ -7994,7 +7994,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 87.696 0.024 87.720 ; + RECT 0.000 87.696 0.036 87.720 ; END END din_b[110] PIN din_b[111] @@ -8003,7 +8003,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 87.744 0.024 87.768 ; + RECT 0.000 87.744 0.036 87.768 ; END END din_b[111] PIN din_b[112] @@ -8012,7 +8012,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 87.792 0.024 87.816 ; + RECT 0.000 87.792 0.036 87.816 ; END END din_b[112] PIN din_b[113] @@ -8021,7 +8021,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 87.840 0.024 87.864 ; + RECT 0.000 87.840 0.036 87.864 ; END END din_b[113] PIN din_b[114] @@ -8030,7 +8030,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 87.888 0.024 87.912 ; + RECT 0.000 87.888 0.036 87.912 ; END END din_b[114] PIN din_b[115] @@ -8039,7 +8039,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 87.936 0.024 87.960 ; + RECT 0.000 87.936 0.036 87.960 ; END END din_b[115] PIN din_b[116] @@ -8048,7 +8048,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 87.984 0.024 88.008 ; + RECT 0.000 87.984 0.036 88.008 ; END END din_b[116] PIN din_b[117] @@ -8057,7 +8057,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 88.032 0.024 88.056 ; + RECT 0.000 88.032 0.036 88.056 ; END END din_b[117] PIN din_b[118] @@ -8066,7 +8066,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 88.080 0.024 88.104 ; + RECT 0.000 88.080 0.036 88.104 ; END END din_b[118] PIN din_b[119] @@ -8075,7 +8075,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 88.128 0.024 88.152 ; + RECT 0.000 88.128 0.036 88.152 ; END END din_b[119] PIN din_b[120] @@ -8084,7 +8084,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 88.176 0.024 88.200 ; + RECT 0.000 88.176 0.036 88.200 ; END END din_b[120] PIN din_b[121] @@ -8093,7 +8093,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 88.224 0.024 88.248 ; + RECT 0.000 88.224 0.036 88.248 ; END END din_b[121] PIN din_b[122] @@ -8102,7 +8102,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 88.272 0.024 88.296 ; + RECT 0.000 88.272 0.036 88.296 ; END END din_b[122] PIN din_b[123] @@ -8111,7 +8111,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 88.320 0.024 88.344 ; + RECT 0.000 88.320 0.036 88.344 ; END END din_b[123] PIN din_b[124] @@ -8120,7 +8120,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 88.368 0.024 88.392 ; + RECT 0.000 88.368 0.036 88.392 ; END END din_b[124] PIN din_b[125] @@ -8129,7 +8129,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 88.416 0.024 88.440 ; + RECT 0.000 88.416 0.036 88.440 ; END END din_b[125] PIN din_b[126] @@ -8138,7 +8138,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 88.464 0.024 88.488 ; + RECT 0.000 88.464 0.036 88.488 ; END END din_b[126] PIN din_b[127] @@ -8147,7 +8147,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 88.512 0.024 88.536 ; + RECT 0.000 88.512 0.036 88.536 ; END END din_b[127] PIN din_b[128] @@ -8156,7 +8156,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 88.560 0.024 88.584 ; + RECT 0.000 88.560 0.036 88.584 ; END END din_b[128] PIN din_b[129] @@ -8165,7 +8165,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 88.608 0.024 88.632 ; + RECT 0.000 88.608 0.036 88.632 ; END END din_b[129] PIN din_b[130] @@ -8174,7 +8174,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 88.656 0.024 88.680 ; + RECT 0.000 88.656 0.036 88.680 ; END END din_b[130] PIN din_b[131] @@ -8183,7 +8183,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 88.704 0.024 88.728 ; + RECT 0.000 88.704 0.036 88.728 ; END END din_b[131] PIN din_b[132] @@ -8192,7 +8192,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 88.752 0.024 88.776 ; + RECT 0.000 88.752 0.036 88.776 ; END END din_b[132] PIN din_b[133] @@ -8201,7 +8201,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 88.800 0.024 88.824 ; + RECT 0.000 88.800 0.036 88.824 ; END END din_b[133] PIN din_b[134] @@ -8210,7 +8210,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 88.848 0.024 88.872 ; + RECT 0.000 88.848 0.036 88.872 ; END END din_b[134] PIN din_b[135] @@ -8219,7 +8219,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 88.896 0.024 88.920 ; + RECT 0.000 88.896 0.036 88.920 ; END END din_b[135] PIN din_b[136] @@ -8228,7 +8228,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 88.944 0.024 88.968 ; + RECT 0.000 88.944 0.036 88.968 ; END END din_b[136] PIN din_b[137] @@ -8237,7 +8237,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 88.992 0.024 89.016 ; + RECT 0.000 88.992 0.036 89.016 ; END END din_b[137] PIN din_b[138] @@ -8246,7 +8246,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 89.040 0.024 89.064 ; + RECT 0.000 89.040 0.036 89.064 ; END END din_b[138] PIN din_b[139] @@ -8255,7 +8255,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 89.088 0.024 89.112 ; + RECT 0.000 89.088 0.036 89.112 ; END END din_b[139] PIN din_b[140] @@ -8264,7 +8264,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 89.136 0.024 89.160 ; + RECT 0.000 89.136 0.036 89.160 ; END END din_b[140] PIN din_b[141] @@ -8273,7 +8273,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 89.184 0.024 89.208 ; + RECT 0.000 89.184 0.036 89.208 ; END END din_b[141] PIN din_b[142] @@ -8282,7 +8282,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 89.232 0.024 89.256 ; + RECT 0.000 89.232 0.036 89.256 ; END END din_b[142] PIN din_b[143] @@ -8291,7 +8291,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 89.280 0.024 89.304 ; + RECT 0.000 89.280 0.036 89.304 ; END END din_b[143] PIN din_b[144] @@ -8300,7 +8300,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 89.328 0.024 89.352 ; + RECT 0.000 89.328 0.036 89.352 ; END END din_b[144] PIN din_b[145] @@ -8309,7 +8309,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 89.376 0.024 89.400 ; + RECT 0.000 89.376 0.036 89.400 ; END END din_b[145] PIN din_b[146] @@ -8318,7 +8318,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 89.424 0.024 89.448 ; + RECT 0.000 89.424 0.036 89.448 ; END END din_b[146] PIN din_b[147] @@ -8327,7 +8327,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 89.472 0.024 89.496 ; + RECT 0.000 89.472 0.036 89.496 ; END END din_b[147] PIN din_b[148] @@ -8336,7 +8336,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 89.520 0.024 89.544 ; + RECT 0.000 89.520 0.036 89.544 ; END END din_b[148] PIN din_b[149] @@ -8345,7 +8345,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 89.568 0.024 89.592 ; + RECT 0.000 89.568 0.036 89.592 ; END END din_b[149] PIN din_b[150] @@ -8354,7 +8354,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 89.616 0.024 89.640 ; + RECT 0.000 89.616 0.036 89.640 ; END END din_b[150] PIN din_b[151] @@ -8363,7 +8363,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 89.664 0.024 89.688 ; + RECT 0.000 89.664 0.036 89.688 ; END END din_b[151] PIN din_b[152] @@ -8372,7 +8372,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 89.712 0.024 89.736 ; + RECT 0.000 89.712 0.036 89.736 ; END END din_b[152] PIN din_b[153] @@ -8381,7 +8381,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 89.760 0.024 89.784 ; + RECT 0.000 89.760 0.036 89.784 ; END END din_b[153] PIN din_b[154] @@ -8390,7 +8390,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 89.808 0.024 89.832 ; + RECT 0.000 89.808 0.036 89.832 ; END END din_b[154] PIN din_b[155] @@ -8399,7 +8399,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 89.856 0.024 89.880 ; + RECT 0.000 89.856 0.036 89.880 ; END END din_b[155] PIN din_b[156] @@ -8408,7 +8408,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 89.904 0.024 89.928 ; + RECT 0.000 89.904 0.036 89.928 ; END END din_b[156] PIN din_b[157] @@ -8417,7 +8417,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 89.952 0.024 89.976 ; + RECT 0.000 89.952 0.036 89.976 ; END END din_b[157] PIN din_b[158] @@ -8426,7 +8426,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 90.000 0.024 90.024 ; + RECT 0.000 90.000 0.036 90.024 ; END END din_b[158] PIN din_b[159] @@ -8435,7 +8435,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 90.048 0.024 90.072 ; + RECT 0.000 90.048 0.036 90.072 ; END END din_b[159] PIN din_b[160] @@ -8444,7 +8444,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 90.096 0.024 90.120 ; + RECT 0.000 90.096 0.036 90.120 ; END END din_b[160] PIN din_b[161] @@ -8453,7 +8453,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 90.144 0.024 90.168 ; + RECT 0.000 90.144 0.036 90.168 ; END END din_b[161] PIN din_b[162] @@ -8462,7 +8462,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 90.192 0.024 90.216 ; + RECT 0.000 90.192 0.036 90.216 ; END END din_b[162] PIN din_b[163] @@ -8471,7 +8471,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 90.240 0.024 90.264 ; + RECT 0.000 90.240 0.036 90.264 ; END END din_b[163] PIN din_b[164] @@ -8480,7 +8480,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 90.288 0.024 90.312 ; + RECT 0.000 90.288 0.036 90.312 ; END END din_b[164] PIN din_b[165] @@ -8489,7 +8489,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 90.336 0.024 90.360 ; + RECT 0.000 90.336 0.036 90.360 ; END END din_b[165] PIN din_b[166] @@ -8498,7 +8498,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 90.384 0.024 90.408 ; + RECT 0.000 90.384 0.036 90.408 ; END END din_b[166] PIN din_b[167] @@ -8507,7 +8507,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 90.432 0.024 90.456 ; + RECT 0.000 90.432 0.036 90.456 ; END END din_b[167] PIN din_b[168] @@ -8516,7 +8516,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 90.480 0.024 90.504 ; + RECT 0.000 90.480 0.036 90.504 ; END END din_b[168] PIN din_b[169] @@ -8525,7 +8525,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 90.528 0.024 90.552 ; + RECT 0.000 90.528 0.036 90.552 ; END END din_b[169] PIN din_b[170] @@ -8534,7 +8534,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 90.576 0.024 90.600 ; + RECT 0.000 90.576 0.036 90.600 ; END END din_b[170] PIN din_b[171] @@ -8543,7 +8543,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 90.624 0.024 90.648 ; + RECT 0.000 90.624 0.036 90.648 ; END END din_b[171] PIN din_b[172] @@ -8552,7 +8552,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 90.672 0.024 90.696 ; + RECT 0.000 90.672 0.036 90.696 ; END END din_b[172] PIN din_b[173] @@ -8561,7 +8561,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 90.720 0.024 90.744 ; + RECT 0.000 90.720 0.036 90.744 ; END END din_b[173] PIN din_b[174] @@ -8570,7 +8570,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 90.768 0.024 90.792 ; + RECT 0.000 90.768 0.036 90.792 ; END END din_b[174] PIN din_b[175] @@ -8579,7 +8579,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 90.816 0.024 90.840 ; + RECT 0.000 90.816 0.036 90.840 ; END END din_b[175] PIN din_b[176] @@ -8588,7 +8588,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 90.864 0.024 90.888 ; + RECT 0.000 90.864 0.036 90.888 ; END END din_b[176] PIN din_b[177] @@ -8597,7 +8597,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 90.912 0.024 90.936 ; + RECT 0.000 90.912 0.036 90.936 ; END END din_b[177] PIN din_b[178] @@ -8606,7 +8606,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 90.960 0.024 90.984 ; + RECT 0.000 90.960 0.036 90.984 ; END END din_b[178] PIN din_b[179] @@ -8615,7 +8615,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 91.008 0.024 91.032 ; + RECT 0.000 91.008 0.036 91.032 ; END END din_b[179] PIN din_b[180] @@ -8624,7 +8624,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 91.056 0.024 91.080 ; + RECT 0.000 91.056 0.036 91.080 ; END END din_b[180] PIN din_b[181] @@ -8633,7 +8633,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 91.104 0.024 91.128 ; + RECT 0.000 91.104 0.036 91.128 ; END END din_b[181] PIN din_b[182] @@ -8642,7 +8642,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 91.152 0.024 91.176 ; + RECT 0.000 91.152 0.036 91.176 ; END END din_b[182] PIN din_b[183] @@ -8651,7 +8651,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 91.200 0.024 91.224 ; + RECT 0.000 91.200 0.036 91.224 ; END END din_b[183] PIN din_b[184] @@ -8660,7 +8660,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 91.248 0.024 91.272 ; + RECT 0.000 91.248 0.036 91.272 ; END END din_b[184] PIN din_b[185] @@ -8669,7 +8669,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 91.296 0.024 91.320 ; + RECT 0.000 91.296 0.036 91.320 ; END END din_b[185] PIN din_b[186] @@ -8678,7 +8678,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 91.344 0.024 91.368 ; + RECT 0.000 91.344 0.036 91.368 ; END END din_b[186] PIN din_b[187] @@ -8687,7 +8687,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 91.392 0.024 91.416 ; + RECT 0.000 91.392 0.036 91.416 ; END END din_b[187] PIN din_b[188] @@ -8696,7 +8696,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 91.440 0.024 91.464 ; + RECT 0.000 91.440 0.036 91.464 ; END END din_b[188] PIN din_b[189] @@ -8705,7 +8705,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 91.488 0.024 91.512 ; + RECT 0.000 91.488 0.036 91.512 ; END END din_b[189] PIN din_b[190] @@ -8714,7 +8714,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 91.536 0.024 91.560 ; + RECT 0.000 91.536 0.036 91.560 ; END END din_b[190] PIN din_b[191] @@ -8723,7 +8723,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 91.584 0.024 91.608 ; + RECT 0.000 91.584 0.036 91.608 ; END END din_b[191] PIN din_b[192] @@ -8732,7 +8732,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 91.632 0.024 91.656 ; + RECT 0.000 91.632 0.036 91.656 ; END END din_b[192] PIN din_b[193] @@ -8741,7 +8741,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 91.680 0.024 91.704 ; + RECT 0.000 91.680 0.036 91.704 ; END END din_b[193] PIN din_b[194] @@ -8750,7 +8750,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 91.728 0.024 91.752 ; + RECT 0.000 91.728 0.036 91.752 ; END END din_b[194] PIN din_b[195] @@ -8759,7 +8759,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 91.776 0.024 91.800 ; + RECT 0.000 91.776 0.036 91.800 ; END END din_b[195] PIN din_b[196] @@ -8768,7 +8768,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 91.824 0.024 91.848 ; + RECT 0.000 91.824 0.036 91.848 ; END END din_b[196] PIN din_b[197] @@ -8777,7 +8777,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 91.872 0.024 91.896 ; + RECT 0.000 91.872 0.036 91.896 ; END END din_b[197] PIN din_b[198] @@ -8786,7 +8786,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 91.920 0.024 91.944 ; + RECT 0.000 91.920 0.036 91.944 ; END END din_b[198] PIN din_b[199] @@ -8795,7 +8795,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 91.968 0.024 91.992 ; + RECT 0.000 91.968 0.036 91.992 ; END END din_b[199] PIN din_b[200] @@ -8804,7 +8804,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 92.016 0.024 92.040 ; + RECT 0.000 92.016 0.036 92.040 ; END END din_b[200] PIN din_b[201] @@ -8813,7 +8813,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 92.064 0.024 92.088 ; + RECT 0.000 92.064 0.036 92.088 ; END END din_b[201] PIN din_b[202] @@ -8822,7 +8822,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 92.112 0.024 92.136 ; + RECT 0.000 92.112 0.036 92.136 ; END END din_b[202] PIN din_b[203] @@ -8831,7 +8831,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 92.160 0.024 92.184 ; + RECT 0.000 92.160 0.036 92.184 ; END END din_b[203] PIN din_b[204] @@ -8840,7 +8840,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 92.208 0.024 92.232 ; + RECT 0.000 92.208 0.036 92.232 ; END END din_b[204] PIN din_b[205] @@ -8849,7 +8849,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 92.256 0.024 92.280 ; + RECT 0.000 92.256 0.036 92.280 ; END END din_b[205] PIN din_b[206] @@ -8858,7 +8858,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 92.304 0.024 92.328 ; + RECT 0.000 92.304 0.036 92.328 ; END END din_b[206] PIN din_b[207] @@ -8867,7 +8867,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 92.352 0.024 92.376 ; + RECT 0.000 92.352 0.036 92.376 ; END END din_b[207] PIN din_b[208] @@ -8876,7 +8876,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 92.400 0.024 92.424 ; + RECT 0.000 92.400 0.036 92.424 ; END END din_b[208] PIN din_b[209] @@ -8885,7 +8885,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 92.448 0.024 92.472 ; + RECT 0.000 92.448 0.036 92.472 ; END END din_b[209] PIN din_b[210] @@ -8894,7 +8894,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 92.496 0.024 92.520 ; + RECT 0.000 92.496 0.036 92.520 ; END END din_b[210] PIN din_b[211] @@ -8903,7 +8903,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 92.544 0.024 92.568 ; + RECT 0.000 92.544 0.036 92.568 ; END END din_b[211] PIN din_b[212] @@ -8912,7 +8912,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 92.592 0.024 92.616 ; + RECT 0.000 92.592 0.036 92.616 ; END END din_b[212] PIN din_b[213] @@ -8921,7 +8921,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 92.640 0.024 92.664 ; + RECT 0.000 92.640 0.036 92.664 ; END END din_b[213] PIN din_b[214] @@ -8930,7 +8930,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 92.688 0.024 92.712 ; + RECT 0.000 92.688 0.036 92.712 ; END END din_b[214] PIN din_b[215] @@ -8939,7 +8939,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 92.736 0.024 92.760 ; + RECT 0.000 92.736 0.036 92.760 ; END END din_b[215] PIN din_b[216] @@ -8948,7 +8948,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 92.784 0.024 92.808 ; + RECT 0.000 92.784 0.036 92.808 ; END END din_b[216] PIN din_b[217] @@ -8957,7 +8957,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 92.832 0.024 92.856 ; + RECT 0.000 92.832 0.036 92.856 ; END END din_b[217] PIN din_b[218] @@ -8966,7 +8966,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 92.880 0.024 92.904 ; + RECT 0.000 92.880 0.036 92.904 ; END END din_b[218] PIN din_b[219] @@ -8975,7 +8975,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 92.928 0.024 92.952 ; + RECT 0.000 92.928 0.036 92.952 ; END END din_b[219] PIN din_b[220] @@ -8984,7 +8984,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 92.976 0.024 93.000 ; + RECT 0.000 92.976 0.036 93.000 ; END END din_b[220] PIN din_b[221] @@ -8993,7 +8993,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 93.024 0.024 93.048 ; + RECT 0.000 93.024 0.036 93.048 ; END END din_b[221] PIN din_b[222] @@ -9002,7 +9002,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 93.072 0.024 93.096 ; + RECT 0.000 93.072 0.036 93.096 ; END END din_b[222] PIN din_b[223] @@ -9011,7 +9011,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 93.120 0.024 93.144 ; + RECT 0.000 93.120 0.036 93.144 ; END END din_b[223] PIN din_b[224] @@ -9020,7 +9020,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 93.168 0.024 93.192 ; + RECT 0.000 93.168 0.036 93.192 ; END END din_b[224] PIN din_b[225] @@ -9029,7 +9029,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 93.216 0.024 93.240 ; + RECT 0.000 93.216 0.036 93.240 ; END END din_b[225] PIN din_b[226] @@ -9038,7 +9038,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 93.264 0.024 93.288 ; + RECT 0.000 93.264 0.036 93.288 ; END END din_b[226] PIN din_b[227] @@ -9047,7 +9047,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 93.312 0.024 93.336 ; + RECT 0.000 93.312 0.036 93.336 ; END END din_b[227] PIN din_b[228] @@ -9056,7 +9056,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 93.360 0.024 93.384 ; + RECT 0.000 93.360 0.036 93.384 ; END END din_b[228] PIN din_b[229] @@ -9065,7 +9065,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 93.408 0.024 93.432 ; + RECT 0.000 93.408 0.036 93.432 ; END END din_b[229] PIN din_b[230] @@ -9074,7 +9074,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 93.456 0.024 93.480 ; + RECT 0.000 93.456 0.036 93.480 ; END END din_b[230] PIN din_b[231] @@ -9083,7 +9083,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 93.504 0.024 93.528 ; + RECT 0.000 93.504 0.036 93.528 ; END END din_b[231] PIN din_b[232] @@ -9092,7 +9092,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 93.552 0.024 93.576 ; + RECT 0.000 93.552 0.036 93.576 ; END END din_b[232] PIN din_b[233] @@ -9101,7 +9101,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 93.600 0.024 93.624 ; + RECT 0.000 93.600 0.036 93.624 ; END END din_b[233] PIN din_b[234] @@ -9110,7 +9110,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 93.648 0.024 93.672 ; + RECT 0.000 93.648 0.036 93.672 ; END END din_b[234] PIN din_b[235] @@ -9119,7 +9119,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 93.696 0.024 93.720 ; + RECT 0.000 93.696 0.036 93.720 ; END END din_b[235] PIN din_b[236] @@ -9128,7 +9128,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 93.744 0.024 93.768 ; + RECT 0.000 93.744 0.036 93.768 ; END END din_b[236] PIN din_b[237] @@ -9137,7 +9137,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 93.792 0.024 93.816 ; + RECT 0.000 93.792 0.036 93.816 ; END END din_b[237] PIN din_b[238] @@ -9146,7 +9146,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 93.840 0.024 93.864 ; + RECT 0.000 93.840 0.036 93.864 ; END END din_b[238] PIN din_b[239] @@ -9155,7 +9155,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 93.888 0.024 93.912 ; + RECT 0.000 93.888 0.036 93.912 ; END END din_b[239] PIN din_b[240] @@ -9164,7 +9164,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 93.936 0.024 93.960 ; + RECT 0.000 93.936 0.036 93.960 ; END END din_b[240] PIN din_b[241] @@ -9173,7 +9173,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 93.984 0.024 94.008 ; + RECT 0.000 93.984 0.036 94.008 ; END END din_b[241] PIN din_b[242] @@ -9182,7 +9182,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 94.032 0.024 94.056 ; + RECT 0.000 94.032 0.036 94.056 ; END END din_b[242] PIN din_b[243] @@ -9191,7 +9191,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 94.080 0.024 94.104 ; + RECT 0.000 94.080 0.036 94.104 ; END END din_b[243] PIN din_b[244] @@ -9200,7 +9200,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 94.128 0.024 94.152 ; + RECT 0.000 94.128 0.036 94.152 ; END END din_b[244] PIN din_b[245] @@ -9209,7 +9209,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 94.176 0.024 94.200 ; + RECT 0.000 94.176 0.036 94.200 ; END END din_b[245] PIN din_b[246] @@ -9218,7 +9218,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 94.224 0.024 94.248 ; + RECT 0.000 94.224 0.036 94.248 ; END END din_b[246] PIN din_b[247] @@ -9227,7 +9227,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 94.272 0.024 94.296 ; + RECT 0.000 94.272 0.036 94.296 ; END END din_b[247] PIN din_b[248] @@ -9236,7 +9236,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 94.320 0.024 94.344 ; + RECT 0.000 94.320 0.036 94.344 ; END END din_b[248] PIN din_b[249] @@ -9245,7 +9245,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 94.368 0.024 94.392 ; + RECT 0.000 94.368 0.036 94.392 ; END END din_b[249] PIN din_b[250] @@ -9254,7 +9254,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 94.416 0.024 94.440 ; + RECT 0.000 94.416 0.036 94.440 ; END END din_b[250] PIN din_b[251] @@ -9263,7 +9263,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 94.464 0.024 94.488 ; + RECT 0.000 94.464 0.036 94.488 ; END END din_b[251] PIN din_b[252] @@ -9272,7 +9272,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 94.512 0.024 94.536 ; + RECT 0.000 94.512 0.036 94.536 ; END END din_b[252] PIN din_b[253] @@ -9281,7 +9281,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 94.560 0.024 94.584 ; + RECT 0.000 94.560 0.036 94.584 ; END END din_b[253] PIN din_b[254] @@ -9290,7 +9290,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 94.608 0.024 94.632 ; + RECT 0.000 94.608 0.036 94.632 ; END END din_b[254] PIN din_b[255] @@ -9299,7 +9299,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 94.656 0.024 94.680 ; + RECT 0.000 94.656 0.036 94.680 ; END END din_b[255] PIN addr_b[0] @@ -9308,7 +9308,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 105.984 0.024 106.008 ; + RECT 0.000 105.984 0.036 106.008 ; END END addr_b[0] PIN addr_b[1] @@ -9317,7 +9317,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 106.032 0.024 106.056 ; + RECT 0.000 106.032 0.036 106.056 ; END END addr_b[1] PIN addr_b[2] @@ -9326,7 +9326,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 106.080 0.024 106.104 ; + RECT 0.000 106.080 0.036 106.104 ; END END addr_b[2] PIN addr_b[3] @@ -9335,7 +9335,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 106.128 0.024 106.152 ; + RECT 0.000 106.128 0.036 106.152 ; END END addr_b[3] PIN addr_b[4] @@ -9344,7 +9344,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 106.176 0.024 106.200 ; + RECT 0.000 106.176 0.036 106.200 ; END END addr_b[4] PIN addr_b[5] @@ -9353,7 +9353,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 106.224 0.024 106.248 ; + RECT 0.000 106.224 0.036 106.248 ; END END addr_b[5] PIN addr_b[6] @@ -9362,7 +9362,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 106.272 0.024 106.296 ; + RECT 0.000 106.272 0.036 106.296 ; END END addr_b[6] PIN addr_b[7] @@ -9371,7 +9371,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 106.320 0.024 106.344 ; + RECT 0.000 106.320 0.036 106.344 ; END END addr_b[7] PIN we_a @@ -9380,7 +9380,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 117.648 0.024 117.672 ; + RECT 0.000 117.648 0.036 117.672 ; END END we_a PIN we_b @@ -9389,7 +9389,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 117.696 0.024 117.720 ; + RECT 0.000 117.696 0.036 117.720 ; END END we_b PIN clk @@ -9398,7 +9398,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 117.744 0.024 117.768 ; + RECT 0.000 117.744 0.036 117.768 ; END END clk PIN VSS @@ -9406,116 +9406,116 @@ MACRO dpsram_256x256 USE GROUND ; PORT LAYER M4 ; - RECT 0.048 0.000 33.202 0.096 ; - RECT 0.048 0.768 33.202 0.864 ; - RECT 0.048 1.536 33.202 1.632 ; - RECT 0.048 2.304 33.202 2.400 ; - RECT 0.048 3.072 33.202 3.168 ; - RECT 0.048 3.840 33.202 3.936 ; - RECT 0.048 4.608 33.202 4.704 ; - RECT 0.048 5.376 33.202 5.472 ; - RECT 0.048 6.144 33.202 6.240 ; - RECT 0.048 6.912 33.202 7.008 ; - RECT 0.048 7.680 33.202 7.776 ; - RECT 0.048 8.448 33.202 8.544 ; - RECT 0.048 9.216 33.202 9.312 ; - RECT 0.048 9.984 33.202 10.080 ; - RECT 0.048 10.752 33.202 10.848 ; - RECT 0.048 11.520 33.202 11.616 ; - RECT 0.048 12.288 33.202 12.384 ; - RECT 0.048 13.056 33.202 13.152 ; - RECT 0.048 13.824 33.202 13.920 ; - RECT 0.048 14.592 33.202 14.688 ; - RECT 0.048 15.360 33.202 15.456 ; - RECT 0.048 16.128 33.202 16.224 ; - RECT 0.048 16.896 33.202 16.992 ; - RECT 0.048 17.664 33.202 17.760 ; - RECT 0.048 18.432 33.202 18.528 ; - RECT 0.048 19.200 33.202 19.296 ; - RECT 0.048 19.968 33.202 20.064 ; - RECT 0.048 20.736 33.202 20.832 ; - RECT 0.048 21.504 33.202 21.600 ; - RECT 0.048 22.272 33.202 22.368 ; - RECT 0.048 23.040 33.202 23.136 ; - RECT 0.048 23.808 33.202 23.904 ; - RECT 0.048 24.576 33.202 24.672 ; - RECT 0.048 25.344 33.202 25.440 ; - RECT 0.048 26.112 33.202 26.208 ; - RECT 0.048 26.880 33.202 26.976 ; - RECT 0.048 27.648 33.202 27.744 ; - RECT 0.048 28.416 33.202 28.512 ; - RECT 0.048 29.184 33.202 29.280 ; - RECT 0.048 29.952 33.202 30.048 ; - RECT 0.048 30.720 33.202 30.816 ; - RECT 0.048 31.488 33.202 31.584 ; - RECT 0.048 32.256 33.202 32.352 ; - RECT 0.048 33.024 33.202 33.120 ; - RECT 0.048 33.792 33.202 33.888 ; - RECT 0.048 34.560 33.202 34.656 ; - RECT 0.048 35.328 33.202 35.424 ; - RECT 0.048 36.096 33.202 36.192 ; - RECT 0.048 36.864 33.202 36.960 ; - RECT 0.048 37.632 33.202 37.728 ; - RECT 0.048 38.400 33.202 38.496 ; - RECT 0.048 39.168 33.202 39.264 ; - RECT 0.048 39.936 33.202 40.032 ; - RECT 0.048 40.704 33.202 40.800 ; - RECT 0.048 41.472 33.202 41.568 ; - RECT 0.048 42.240 33.202 42.336 ; - RECT 0.048 43.008 33.202 43.104 ; - RECT 0.048 43.776 33.202 43.872 ; - RECT 0.048 44.544 33.202 44.640 ; - RECT 0.048 45.312 33.202 45.408 ; - RECT 0.048 46.080 33.202 46.176 ; - RECT 0.048 46.848 33.202 46.944 ; - RECT 0.048 47.616 33.202 47.712 ; - RECT 0.048 48.384 33.202 48.480 ; - RECT 0.048 49.152 33.202 49.248 ; - RECT 0.048 49.920 33.202 50.016 ; - RECT 0.048 50.688 33.202 50.784 ; - RECT 0.048 51.456 33.202 51.552 ; - RECT 0.048 52.224 33.202 52.320 ; - RECT 0.048 52.992 33.202 53.088 ; - RECT 0.048 53.760 33.202 53.856 ; - RECT 0.048 54.528 33.202 54.624 ; - RECT 0.048 55.296 33.202 55.392 ; - RECT 0.048 56.064 33.202 56.160 ; - RECT 0.048 56.832 33.202 56.928 ; - RECT 0.048 57.600 33.202 57.696 ; - RECT 0.048 58.368 33.202 58.464 ; - RECT 0.048 59.136 33.202 59.232 ; - RECT 0.048 59.904 33.202 60.000 ; - RECT 0.048 60.672 33.202 60.768 ; - RECT 0.048 61.440 33.202 61.536 ; - RECT 0.048 62.208 33.202 62.304 ; - RECT 0.048 62.976 33.202 63.072 ; - RECT 0.048 63.744 33.202 63.840 ; - RECT 0.048 64.512 33.202 64.608 ; - RECT 0.048 65.280 33.202 65.376 ; - RECT 0.048 66.048 33.202 66.144 ; - RECT 0.048 66.816 33.202 66.912 ; - RECT 0.048 67.584 33.202 67.680 ; - RECT 0.048 68.352 33.202 68.448 ; - RECT 0.048 69.120 33.202 69.216 ; - RECT 0.048 69.888 33.202 69.984 ; - RECT 0.048 70.656 33.202 70.752 ; - RECT 0.048 71.424 33.202 71.520 ; - RECT 0.048 72.192 33.202 72.288 ; - RECT 0.048 72.960 33.202 73.056 ; - RECT 0.048 73.728 33.202 73.824 ; - RECT 0.048 74.496 33.202 74.592 ; - RECT 0.048 75.264 33.202 75.360 ; - RECT 0.048 76.032 33.202 76.128 ; - RECT 0.048 76.800 33.202 76.896 ; - RECT 0.048 77.568 33.202 77.664 ; - RECT 0.048 78.336 33.202 78.432 ; - RECT 0.048 79.104 33.202 79.200 ; - RECT 0.048 79.872 33.202 79.968 ; - RECT 0.048 80.640 33.202 80.736 ; - RECT 0.048 81.408 33.202 81.504 ; - RECT 0.048 82.176 33.202 82.272 ; - RECT 0.048 82.944 33.202 83.040 ; - RECT 0.048 83.712 33.202 83.808 ; + RECT 0.096 0.000 33.154 0.096 ; + RECT 0.096 0.768 33.154 0.864 ; + RECT 0.096 1.536 33.154 1.632 ; + RECT 0.096 2.304 33.154 2.400 ; + RECT 0.096 3.072 33.154 3.168 ; + RECT 0.096 3.840 33.154 3.936 ; + RECT 0.096 4.608 33.154 4.704 ; + RECT 0.096 5.376 33.154 5.472 ; + RECT 0.096 6.144 33.154 6.240 ; + RECT 0.096 6.912 33.154 7.008 ; + RECT 0.096 7.680 33.154 7.776 ; + RECT 0.096 8.448 33.154 8.544 ; + RECT 0.096 9.216 33.154 9.312 ; + RECT 0.096 9.984 33.154 10.080 ; + RECT 0.096 10.752 33.154 10.848 ; + RECT 0.096 11.520 33.154 11.616 ; + RECT 0.096 12.288 33.154 12.384 ; + RECT 0.096 13.056 33.154 13.152 ; + RECT 0.096 13.824 33.154 13.920 ; + RECT 0.096 14.592 33.154 14.688 ; + RECT 0.096 15.360 33.154 15.456 ; + RECT 0.096 16.128 33.154 16.224 ; + RECT 0.096 16.896 33.154 16.992 ; + RECT 0.096 17.664 33.154 17.760 ; + RECT 0.096 18.432 33.154 18.528 ; + RECT 0.096 19.200 33.154 19.296 ; + RECT 0.096 19.968 33.154 20.064 ; + RECT 0.096 20.736 33.154 20.832 ; + RECT 0.096 21.504 33.154 21.600 ; + RECT 0.096 22.272 33.154 22.368 ; + RECT 0.096 23.040 33.154 23.136 ; + RECT 0.096 23.808 33.154 23.904 ; + RECT 0.096 24.576 33.154 24.672 ; + RECT 0.096 25.344 33.154 25.440 ; + RECT 0.096 26.112 33.154 26.208 ; + RECT 0.096 26.880 33.154 26.976 ; + RECT 0.096 27.648 33.154 27.744 ; + RECT 0.096 28.416 33.154 28.512 ; + RECT 0.096 29.184 33.154 29.280 ; + RECT 0.096 29.952 33.154 30.048 ; + RECT 0.096 30.720 33.154 30.816 ; + RECT 0.096 31.488 33.154 31.584 ; + RECT 0.096 32.256 33.154 32.352 ; + RECT 0.096 33.024 33.154 33.120 ; + RECT 0.096 33.792 33.154 33.888 ; + RECT 0.096 34.560 33.154 34.656 ; + RECT 0.096 35.328 33.154 35.424 ; + RECT 0.096 36.096 33.154 36.192 ; + RECT 0.096 36.864 33.154 36.960 ; + RECT 0.096 37.632 33.154 37.728 ; + RECT 0.096 38.400 33.154 38.496 ; + RECT 0.096 39.168 33.154 39.264 ; + RECT 0.096 39.936 33.154 40.032 ; + RECT 0.096 40.704 33.154 40.800 ; + RECT 0.096 41.472 33.154 41.568 ; + RECT 0.096 42.240 33.154 42.336 ; + RECT 0.096 43.008 33.154 43.104 ; + RECT 0.096 43.776 33.154 43.872 ; + RECT 0.096 44.544 33.154 44.640 ; + RECT 0.096 45.312 33.154 45.408 ; + RECT 0.096 46.080 33.154 46.176 ; + RECT 0.096 46.848 33.154 46.944 ; + RECT 0.096 47.616 33.154 47.712 ; + RECT 0.096 48.384 33.154 48.480 ; + RECT 0.096 49.152 33.154 49.248 ; + RECT 0.096 49.920 33.154 50.016 ; + RECT 0.096 50.688 33.154 50.784 ; + RECT 0.096 51.456 33.154 51.552 ; + RECT 0.096 52.224 33.154 52.320 ; + RECT 0.096 52.992 33.154 53.088 ; + RECT 0.096 53.760 33.154 53.856 ; + RECT 0.096 54.528 33.154 54.624 ; + RECT 0.096 55.296 33.154 55.392 ; + RECT 0.096 56.064 33.154 56.160 ; + RECT 0.096 56.832 33.154 56.928 ; + RECT 0.096 57.600 33.154 57.696 ; + RECT 0.096 58.368 33.154 58.464 ; + RECT 0.096 59.136 33.154 59.232 ; + RECT 0.096 59.904 33.154 60.000 ; + RECT 0.096 60.672 33.154 60.768 ; + RECT 0.096 61.440 33.154 61.536 ; + RECT 0.096 62.208 33.154 62.304 ; + RECT 0.096 62.976 33.154 63.072 ; + RECT 0.096 63.744 33.154 63.840 ; + RECT 0.096 64.512 33.154 64.608 ; + RECT 0.096 65.280 33.154 65.376 ; + RECT 0.096 66.048 33.154 66.144 ; + RECT 0.096 66.816 33.154 66.912 ; + RECT 0.096 67.584 33.154 67.680 ; + RECT 0.096 68.352 33.154 68.448 ; + RECT 0.096 69.120 33.154 69.216 ; + RECT 0.096 69.888 33.154 69.984 ; + RECT 0.096 70.656 33.154 70.752 ; + RECT 0.096 71.424 33.154 71.520 ; + RECT 0.096 72.192 33.154 72.288 ; + RECT 0.096 72.960 33.154 73.056 ; + RECT 0.096 73.728 33.154 73.824 ; + RECT 0.096 74.496 33.154 74.592 ; + RECT 0.096 75.264 33.154 75.360 ; + RECT 0.096 76.032 33.154 76.128 ; + RECT 0.096 76.800 33.154 76.896 ; + RECT 0.096 77.568 33.154 77.664 ; + RECT 0.096 78.336 33.154 78.432 ; + RECT 0.096 79.104 33.154 79.200 ; + RECT 0.096 79.872 33.154 79.968 ; + RECT 0.096 80.640 33.154 80.736 ; + RECT 0.096 81.408 33.154 81.504 ; + RECT 0.096 82.176 33.154 82.272 ; + RECT 0.096 82.944 33.154 83.040 ; + RECT 0.096 83.712 33.154 83.808 ; END END VSS PIN VDD @@ -9523,115 +9523,115 @@ MACRO dpsram_256x256 USE POWER ; PORT LAYER M4 ; - RECT 0.048 0.384 33.202 0.480 ; - RECT 0.048 1.152 33.202 1.248 ; - RECT 0.048 1.920 33.202 2.016 ; - RECT 0.048 2.688 33.202 2.784 ; - RECT 0.048 3.456 33.202 3.552 ; - RECT 0.048 4.224 33.202 4.320 ; - RECT 0.048 4.992 33.202 5.088 ; - RECT 0.048 5.760 33.202 5.856 ; - RECT 0.048 6.528 33.202 6.624 ; - RECT 0.048 7.296 33.202 7.392 ; - RECT 0.048 8.064 33.202 8.160 ; - RECT 0.048 8.832 33.202 8.928 ; - RECT 0.048 9.600 33.202 9.696 ; - RECT 0.048 10.368 33.202 10.464 ; - RECT 0.048 11.136 33.202 11.232 ; - RECT 0.048 11.904 33.202 12.000 ; - RECT 0.048 12.672 33.202 12.768 ; - RECT 0.048 13.440 33.202 13.536 ; - RECT 0.048 14.208 33.202 14.304 ; - RECT 0.048 14.976 33.202 15.072 ; - RECT 0.048 15.744 33.202 15.840 ; - RECT 0.048 16.512 33.202 16.608 ; - RECT 0.048 17.280 33.202 17.376 ; - RECT 0.048 18.048 33.202 18.144 ; - RECT 0.048 18.816 33.202 18.912 ; - RECT 0.048 19.584 33.202 19.680 ; - RECT 0.048 20.352 33.202 20.448 ; - RECT 0.048 21.120 33.202 21.216 ; - RECT 0.048 21.888 33.202 21.984 ; - RECT 0.048 22.656 33.202 22.752 ; - RECT 0.048 23.424 33.202 23.520 ; - RECT 0.048 24.192 33.202 24.288 ; - RECT 0.048 24.960 33.202 25.056 ; - RECT 0.048 25.728 33.202 25.824 ; - RECT 0.048 26.496 33.202 26.592 ; - RECT 0.048 27.264 33.202 27.360 ; - RECT 0.048 28.032 33.202 28.128 ; - RECT 0.048 28.800 33.202 28.896 ; - RECT 0.048 29.568 33.202 29.664 ; - RECT 0.048 30.336 33.202 30.432 ; - RECT 0.048 31.104 33.202 31.200 ; - RECT 0.048 31.872 33.202 31.968 ; - RECT 0.048 32.640 33.202 32.736 ; - RECT 0.048 33.408 33.202 33.504 ; - RECT 0.048 34.176 33.202 34.272 ; - RECT 0.048 34.944 33.202 35.040 ; - RECT 0.048 35.712 33.202 35.808 ; - RECT 0.048 36.480 33.202 36.576 ; - RECT 0.048 37.248 33.202 37.344 ; - RECT 0.048 38.016 33.202 38.112 ; - RECT 0.048 38.784 33.202 38.880 ; - RECT 0.048 39.552 33.202 39.648 ; - RECT 0.048 40.320 33.202 40.416 ; - RECT 0.048 41.088 33.202 41.184 ; - RECT 0.048 41.856 33.202 41.952 ; - RECT 0.048 42.624 33.202 42.720 ; - RECT 0.048 43.392 33.202 43.488 ; - RECT 0.048 44.160 33.202 44.256 ; - RECT 0.048 44.928 33.202 45.024 ; - RECT 0.048 45.696 33.202 45.792 ; - RECT 0.048 46.464 33.202 46.560 ; - RECT 0.048 47.232 33.202 47.328 ; - RECT 0.048 48.000 33.202 48.096 ; - RECT 0.048 48.768 33.202 48.864 ; - RECT 0.048 49.536 33.202 49.632 ; - RECT 0.048 50.304 33.202 50.400 ; - RECT 0.048 51.072 33.202 51.168 ; - RECT 0.048 51.840 33.202 51.936 ; - RECT 0.048 52.608 33.202 52.704 ; - RECT 0.048 53.376 33.202 53.472 ; - RECT 0.048 54.144 33.202 54.240 ; - RECT 0.048 54.912 33.202 55.008 ; - RECT 0.048 55.680 33.202 55.776 ; - RECT 0.048 56.448 33.202 56.544 ; - RECT 0.048 57.216 33.202 57.312 ; - RECT 0.048 57.984 33.202 58.080 ; - RECT 0.048 58.752 33.202 58.848 ; - RECT 0.048 59.520 33.202 59.616 ; - RECT 0.048 60.288 33.202 60.384 ; - RECT 0.048 61.056 33.202 61.152 ; - RECT 0.048 61.824 33.202 61.920 ; - RECT 0.048 62.592 33.202 62.688 ; - RECT 0.048 63.360 33.202 63.456 ; - RECT 0.048 64.128 33.202 64.224 ; - RECT 0.048 64.896 33.202 64.992 ; - RECT 0.048 65.664 33.202 65.760 ; - RECT 0.048 66.432 33.202 66.528 ; - RECT 0.048 67.200 33.202 67.296 ; - RECT 0.048 67.968 33.202 68.064 ; - RECT 0.048 68.736 33.202 68.832 ; - RECT 0.048 69.504 33.202 69.600 ; - RECT 0.048 70.272 33.202 70.368 ; - RECT 0.048 71.040 33.202 71.136 ; - RECT 0.048 71.808 33.202 71.904 ; - RECT 0.048 72.576 33.202 72.672 ; - RECT 0.048 73.344 33.202 73.440 ; - RECT 0.048 74.112 33.202 74.208 ; - RECT 0.048 74.880 33.202 74.976 ; - RECT 0.048 75.648 33.202 75.744 ; - RECT 0.048 76.416 33.202 76.512 ; - RECT 0.048 77.184 33.202 77.280 ; - RECT 0.048 77.952 33.202 78.048 ; - RECT 0.048 78.720 33.202 78.816 ; - RECT 0.048 79.488 33.202 79.584 ; - RECT 0.048 80.256 33.202 80.352 ; - RECT 0.048 81.024 33.202 81.120 ; - RECT 0.048 81.792 33.202 81.888 ; - RECT 0.048 82.560 33.202 82.656 ; - RECT 0.048 83.328 33.202 83.424 ; + RECT 0.096 0.384 33.154 0.480 ; + RECT 0.096 1.152 33.154 1.248 ; + RECT 0.096 1.920 33.154 2.016 ; + RECT 0.096 2.688 33.154 2.784 ; + RECT 0.096 3.456 33.154 3.552 ; + RECT 0.096 4.224 33.154 4.320 ; + RECT 0.096 4.992 33.154 5.088 ; + RECT 0.096 5.760 33.154 5.856 ; + RECT 0.096 6.528 33.154 6.624 ; + RECT 0.096 7.296 33.154 7.392 ; + RECT 0.096 8.064 33.154 8.160 ; + RECT 0.096 8.832 33.154 8.928 ; + RECT 0.096 9.600 33.154 9.696 ; + RECT 0.096 10.368 33.154 10.464 ; + RECT 0.096 11.136 33.154 11.232 ; + RECT 0.096 11.904 33.154 12.000 ; + RECT 0.096 12.672 33.154 12.768 ; + RECT 0.096 13.440 33.154 13.536 ; + RECT 0.096 14.208 33.154 14.304 ; + RECT 0.096 14.976 33.154 15.072 ; + RECT 0.096 15.744 33.154 15.840 ; + RECT 0.096 16.512 33.154 16.608 ; + RECT 0.096 17.280 33.154 17.376 ; + RECT 0.096 18.048 33.154 18.144 ; + RECT 0.096 18.816 33.154 18.912 ; + RECT 0.096 19.584 33.154 19.680 ; + RECT 0.096 20.352 33.154 20.448 ; + RECT 0.096 21.120 33.154 21.216 ; + RECT 0.096 21.888 33.154 21.984 ; + RECT 0.096 22.656 33.154 22.752 ; + RECT 0.096 23.424 33.154 23.520 ; + RECT 0.096 24.192 33.154 24.288 ; + RECT 0.096 24.960 33.154 25.056 ; + RECT 0.096 25.728 33.154 25.824 ; + RECT 0.096 26.496 33.154 26.592 ; + RECT 0.096 27.264 33.154 27.360 ; + RECT 0.096 28.032 33.154 28.128 ; + RECT 0.096 28.800 33.154 28.896 ; + RECT 0.096 29.568 33.154 29.664 ; + RECT 0.096 30.336 33.154 30.432 ; + RECT 0.096 31.104 33.154 31.200 ; + RECT 0.096 31.872 33.154 31.968 ; + RECT 0.096 32.640 33.154 32.736 ; + RECT 0.096 33.408 33.154 33.504 ; + RECT 0.096 34.176 33.154 34.272 ; + RECT 0.096 34.944 33.154 35.040 ; + RECT 0.096 35.712 33.154 35.808 ; + RECT 0.096 36.480 33.154 36.576 ; + RECT 0.096 37.248 33.154 37.344 ; + RECT 0.096 38.016 33.154 38.112 ; + RECT 0.096 38.784 33.154 38.880 ; + RECT 0.096 39.552 33.154 39.648 ; + RECT 0.096 40.320 33.154 40.416 ; + RECT 0.096 41.088 33.154 41.184 ; + RECT 0.096 41.856 33.154 41.952 ; + RECT 0.096 42.624 33.154 42.720 ; + RECT 0.096 43.392 33.154 43.488 ; + RECT 0.096 44.160 33.154 44.256 ; + RECT 0.096 44.928 33.154 45.024 ; + RECT 0.096 45.696 33.154 45.792 ; + RECT 0.096 46.464 33.154 46.560 ; + RECT 0.096 47.232 33.154 47.328 ; + RECT 0.096 48.000 33.154 48.096 ; + RECT 0.096 48.768 33.154 48.864 ; + RECT 0.096 49.536 33.154 49.632 ; + RECT 0.096 50.304 33.154 50.400 ; + RECT 0.096 51.072 33.154 51.168 ; + RECT 0.096 51.840 33.154 51.936 ; + RECT 0.096 52.608 33.154 52.704 ; + RECT 0.096 53.376 33.154 53.472 ; + RECT 0.096 54.144 33.154 54.240 ; + RECT 0.096 54.912 33.154 55.008 ; + RECT 0.096 55.680 33.154 55.776 ; + RECT 0.096 56.448 33.154 56.544 ; + RECT 0.096 57.216 33.154 57.312 ; + RECT 0.096 57.984 33.154 58.080 ; + RECT 0.096 58.752 33.154 58.848 ; + RECT 0.096 59.520 33.154 59.616 ; + RECT 0.096 60.288 33.154 60.384 ; + RECT 0.096 61.056 33.154 61.152 ; + RECT 0.096 61.824 33.154 61.920 ; + RECT 0.096 62.592 33.154 62.688 ; + RECT 0.096 63.360 33.154 63.456 ; + RECT 0.096 64.128 33.154 64.224 ; + RECT 0.096 64.896 33.154 64.992 ; + RECT 0.096 65.664 33.154 65.760 ; + RECT 0.096 66.432 33.154 66.528 ; + RECT 0.096 67.200 33.154 67.296 ; + RECT 0.096 67.968 33.154 68.064 ; + RECT 0.096 68.736 33.154 68.832 ; + RECT 0.096 69.504 33.154 69.600 ; + RECT 0.096 70.272 33.154 70.368 ; + RECT 0.096 71.040 33.154 71.136 ; + RECT 0.096 71.808 33.154 71.904 ; + RECT 0.096 72.576 33.154 72.672 ; + RECT 0.096 73.344 33.154 73.440 ; + RECT 0.096 74.112 33.154 74.208 ; + RECT 0.096 74.880 33.154 74.976 ; + RECT 0.096 75.648 33.154 75.744 ; + RECT 0.096 76.416 33.154 76.512 ; + RECT 0.096 77.184 33.154 77.280 ; + RECT 0.096 77.952 33.154 78.048 ; + RECT 0.096 78.720 33.154 78.816 ; + RECT 0.096 79.488 33.154 79.584 ; + RECT 0.096 80.256 33.154 80.352 ; + RECT 0.096 81.024 33.154 81.120 ; + RECT 0.096 81.792 33.154 81.888 ; + RECT 0.096 82.560 33.154 82.656 ; + RECT 0.096 83.328 33.154 83.424 ; END END VDD OBS @@ -9657,7 +9657,7 @@ module dpsram_256x256 addr_b, din_b, dout_b, - clk, + clk ); parameter DATA_WIDTH = 256; parameter ADDR_WIDTH = 8; @@ -9719,7 +9719,7 @@ module dpsram_256x256 ( input [7:0] addr_b, input [255:0] din_b, output reg [255:0] dout_b, - clk, + clk ); endmodule library(dpsram_256x256) { @@ -9976,7 +9976,7 @@ cell(dpsram_256x256) { } } internal_power(){ - when : "(! (we_in) )"; + when : "(! (we_a) )"; rise_power(dpsram_256x256_energy_template_sigslew) { index_1 ("0.009, 0.227"); values ("0.013, 0.013") @@ -9987,7 +9987,7 @@ cell(dpsram_256x256) { } } internal_power(){ - when : "(we_in)"; + when : "(we_a)"; rise_power(dpsram_256x256_energy_template_sigslew) { index_1 ("0.009, 0.227"); values ("0.013, 0.013") @@ -10193,7 +10193,7 @@ cell(dpsram_256x256) { } } internal_power(){ - when : "(! (we_in) )"; + when : "(! (we_b) )"; rise_power(dpsram_256x256_energy_template_sigslew) { index_1 ("0.009, 0.227"); values ("0.013, 0.013") @@ -10204,7 +10204,7 @@ cell(dpsram_256x256) { } } internal_power(){ - when : "(we_in)"; + when : "(we_b)"; rise_power(dpsram_256x256_energy_template_sigslew) { index_1 ("0.009, 0.227"); values ("0.013, 0.013") diff --git a/test/au/dpsram_256x32.au b/test/au/dpsram_256x32.au index c0051f7..0973672 100644 --- a/test/au/dpsram_256x32.au +++ b/test/au/dpsram_256x32.au @@ -1484,7 +1484,7 @@ module dpsram_256x32 addr_b, din_b, dout_b, - clk, + clk ); parameter DATA_WIDTH = 32; parameter ADDR_WIDTH = 8; @@ -1546,7 +1546,7 @@ module dpsram_256x32 ( input [7:0] addr_b, input [31:0] din_b, output reg [31:0] dout_b, - clk, + clk ); endmodule library(dpsram_256x32) { @@ -1803,7 +1803,7 @@ cell(dpsram_256x32) { } } internal_power(){ - when : "(! (we_in) )"; + when : "(! (we_a) )"; rise_power(dpsram_256x32_energy_template_sigslew) { index_1 ("0.009, 0.227"); values ("0.013, 0.013") @@ -1814,7 +1814,7 @@ cell(dpsram_256x32) { } } internal_power(){ - when : "(we_in)"; + when : "(we_a)"; rise_power(dpsram_256x32_energy_template_sigslew) { index_1 ("0.009, 0.227"); values ("0.013, 0.013") @@ -2020,7 +2020,7 @@ cell(dpsram_256x32) { } } internal_power(){ - when : "(! (we_in) )"; + when : "(! (we_b) )"; rise_power(dpsram_256x32_energy_template_sigslew) { index_1 ("0.009, 0.227"); values ("0.013, 0.013") @@ -2031,7 +2031,7 @@ cell(dpsram_256x32) { } } internal_power(){ - when : "(we_in)"; + when : "(we_b)"; rise_power(dpsram_256x32_energy_template_sigslew) { index_1 ("0.009, 0.227"); values ("0.013, 0.013") diff --git a/test/au/dpsram_256x32_h.au b/test/au/dpsram_256x32_h.au new file mode 100644 index 0000000..c9467e4 --- /dev/null +++ b/test/au/dpsram_256x32_h.au @@ -0,0 +1,2120 @@ +# Generated by FakeRAM 2.0 +VERSION 5.7 ; +BUSBITCHARS "[]" ; +PROPERTYDEFINITIONS + MACRO width INTEGER ; + MACRO depth INTEGER ; + MACRO banks INTEGER ; +END PROPERTYDEFINITIONS +MACRO dpsram_256x32_h + PROPERTY width 32 ; + PROPERTY depth 256 ; + PROPERTY banks 2 ; + FOREIGN dpsram_256x32_h 0 0 ; + SYMMETRY X Y R90 ; + SIZE 8.360 BY 49.000 ; + CLASS BLOCK ; + PIN dout_a[0] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 0.048 0.024 0.072 ; + END + END dout_a[0] + PIN dout_a[1] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 0.336 0.024 0.360 ; + END + END dout_a[1] + PIN dout_a[2] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 0.624 0.024 0.648 ; + END + END dout_a[2] + PIN dout_a[3] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 0.912 0.024 0.936 ; + END + END dout_a[3] + PIN dout_a[4] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 1.200 0.024 1.224 ; + END + END dout_a[4] + PIN dout_a[5] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 1.488 0.024 1.512 ; + END + END dout_a[5] + PIN dout_a[6] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 1.776 0.024 1.800 ; + END + END dout_a[6] + PIN dout_a[7] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 2.064 0.024 2.088 ; + END + END dout_a[7] + PIN dout_a[8] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 2.352 0.024 2.376 ; + END + END dout_a[8] + PIN dout_a[9] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 2.640 0.024 2.664 ; + END + END dout_a[9] + PIN dout_a[10] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 2.928 0.024 2.952 ; + END + END dout_a[10] + PIN dout_a[11] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 3.216 0.024 3.240 ; + END + END dout_a[11] + PIN dout_a[12] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 3.504 0.024 3.528 ; + END + END dout_a[12] + PIN dout_a[13] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 3.792 0.024 3.816 ; + END + END dout_a[13] + PIN dout_a[14] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 4.080 0.024 4.104 ; + END + END dout_a[14] + PIN dout_a[15] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 4.368 0.024 4.392 ; + END + END dout_a[15] + PIN dout_a[16] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 4.656 0.024 4.680 ; + END + END dout_a[16] + PIN dout_a[17] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 4.944 0.024 4.968 ; + END + END dout_a[17] + PIN dout_a[18] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 5.232 0.024 5.256 ; + END + END dout_a[18] + PIN dout_a[19] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 5.520 0.024 5.544 ; + END + END dout_a[19] + PIN dout_a[20] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 5.808 0.024 5.832 ; + END + END dout_a[20] + PIN dout_a[21] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 6.096 0.024 6.120 ; + END + END dout_a[21] + PIN dout_a[22] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 6.384 0.024 6.408 ; + END + END dout_a[22] + PIN dout_a[23] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 6.672 0.024 6.696 ; + END + END dout_a[23] + PIN dout_a[24] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 6.960 0.024 6.984 ; + END + END dout_a[24] + PIN dout_a[25] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 7.248 0.024 7.272 ; + END + END dout_a[25] + PIN dout_a[26] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 7.536 0.024 7.560 ; + END + END dout_a[26] + PIN dout_a[27] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 7.824 0.024 7.848 ; + END + END dout_a[27] + PIN dout_a[28] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 8.112 0.024 8.136 ; + END + END dout_a[28] + PIN dout_a[29] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 8.400 0.024 8.424 ; + END + END dout_a[29] + PIN dout_a[30] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 8.688 0.024 8.712 ; + END + END dout_a[30] + PIN dout_a[31] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 8.976 0.024 9.000 ; + END + END dout_a[31] + PIN din_a[0] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 11.424 0.024 11.448 ; + END + END din_a[0] + PIN din_a[1] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 11.712 0.024 11.736 ; + END + END din_a[1] + PIN din_a[2] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 12.000 0.024 12.024 ; + END + END din_a[2] + PIN din_a[3] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 12.288 0.024 12.312 ; + END + END din_a[3] + PIN din_a[4] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 12.576 0.024 12.600 ; + END + END din_a[4] + PIN din_a[5] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 12.864 0.024 12.888 ; + END + END din_a[5] + PIN din_a[6] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 13.152 0.024 13.176 ; + END + END din_a[6] + PIN din_a[7] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 13.440 0.024 13.464 ; + END + END din_a[7] + PIN din_a[8] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 13.728 0.024 13.752 ; + END + END din_a[8] + PIN din_a[9] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 14.016 0.024 14.040 ; + END + END din_a[9] + PIN din_a[10] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 14.304 0.024 14.328 ; + END + END din_a[10] + PIN din_a[11] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 14.592 0.024 14.616 ; + END + END din_a[11] + PIN din_a[12] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 14.880 0.024 14.904 ; + END + END din_a[12] + PIN din_a[13] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 15.168 0.024 15.192 ; + END + END din_a[13] + PIN din_a[14] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 15.456 0.024 15.480 ; + END + END din_a[14] + PIN din_a[15] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 15.744 0.024 15.768 ; + END + END din_a[15] + PIN din_a[16] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 16.032 0.024 16.056 ; + END + END din_a[16] + PIN din_a[17] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 16.320 0.024 16.344 ; + END + END din_a[17] + PIN din_a[18] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 16.608 0.024 16.632 ; + END + END din_a[18] + PIN din_a[19] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 16.896 0.024 16.920 ; + END + END din_a[19] + PIN din_a[20] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 17.184 0.024 17.208 ; + END + END din_a[20] + PIN din_a[21] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 17.472 0.024 17.496 ; + END + END din_a[21] + PIN din_a[22] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 17.760 0.024 17.784 ; + END + END din_a[22] + PIN din_a[23] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 18.048 0.024 18.072 ; + END + END din_a[23] + PIN din_a[24] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 18.336 0.024 18.360 ; + END + END din_a[24] + PIN din_a[25] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 18.624 0.024 18.648 ; + END + END din_a[25] + PIN din_a[26] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 18.912 0.024 18.936 ; + END + END din_a[26] + PIN din_a[27] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 19.200 0.024 19.224 ; + END + END din_a[27] + PIN din_a[28] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 19.488 0.024 19.512 ; + END + END din_a[28] + PIN din_a[29] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 19.776 0.024 19.800 ; + END + END din_a[29] + PIN din_a[30] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 20.064 0.024 20.088 ; + END + END din_a[30] + PIN din_a[31] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 20.352 0.024 20.376 ; + END + END din_a[31] + PIN addr_a[0] + DIRECTION INPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 22.800 0.024 22.824 ; + END + END addr_a[0] + PIN addr_a[1] + DIRECTION INPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 23.088 0.024 23.112 ; + END + END addr_a[1] + PIN addr_a[2] + DIRECTION INPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 23.376 0.024 23.400 ; + END + END addr_a[2] + PIN addr_a[3] + DIRECTION INPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 23.664 0.024 23.688 ; + END + END addr_a[3] + PIN addr_a[4] + DIRECTION INPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 23.952 0.024 23.976 ; + END + END addr_a[4] + PIN addr_a[5] + DIRECTION INPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 24.240 0.024 24.264 ; + END + END addr_a[5] + PIN addr_a[6] + DIRECTION INPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 24.528 0.024 24.552 ; + END + END addr_a[6] + PIN addr_a[7] + DIRECTION INPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 24.816 0.024 24.840 ; + END + END addr_a[7] + PIN dout_b[0] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 27.264 0.024 27.288 ; + END + END dout_b[0] + PIN dout_b[1] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 27.552 0.024 27.576 ; + END + END dout_b[1] + PIN dout_b[2] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 27.840 0.024 27.864 ; + END + END dout_b[2] + PIN dout_b[3] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 28.128 0.024 28.152 ; + END + END dout_b[3] + PIN dout_b[4] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 28.416 0.024 28.440 ; + END + END dout_b[4] + PIN dout_b[5] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 28.704 0.024 28.728 ; + END + END dout_b[5] + PIN dout_b[6] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 28.992 0.024 29.016 ; + END + END dout_b[6] + PIN dout_b[7] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 29.280 0.024 29.304 ; + END + END dout_b[7] + PIN dout_b[8] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 29.568 0.024 29.592 ; + END + END dout_b[8] + PIN dout_b[9] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 29.856 0.024 29.880 ; + END + END dout_b[9] + PIN dout_b[10] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 30.144 0.024 30.168 ; + END + END dout_b[10] + PIN dout_b[11] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 30.432 0.024 30.456 ; + END + END dout_b[11] + PIN dout_b[12] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 30.720 0.024 30.744 ; + END + END dout_b[12] + PIN dout_b[13] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 31.008 0.024 31.032 ; + END + END dout_b[13] + PIN dout_b[14] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 31.296 0.024 31.320 ; + END + END dout_b[14] + PIN dout_b[15] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 31.584 0.024 31.608 ; + END + END dout_b[15] + PIN dout_b[16] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 31.872 0.024 31.896 ; + END + END dout_b[16] + PIN dout_b[17] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 32.160 0.024 32.184 ; + END + END dout_b[17] + PIN dout_b[18] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 32.448 0.024 32.472 ; + END + END dout_b[18] + PIN dout_b[19] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 32.736 0.024 32.760 ; + END + END dout_b[19] + PIN dout_b[20] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 33.024 0.024 33.048 ; + END + END dout_b[20] + PIN dout_b[21] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 33.312 0.024 33.336 ; + END + END dout_b[21] + PIN dout_b[22] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 33.600 0.024 33.624 ; + END + END dout_b[22] + PIN dout_b[23] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 33.888 0.024 33.912 ; + END + END dout_b[23] + PIN dout_b[24] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 34.176 0.024 34.200 ; + END + END dout_b[24] + PIN dout_b[25] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 34.464 0.024 34.488 ; + END + END dout_b[25] + PIN dout_b[26] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 34.752 0.024 34.776 ; + END + END dout_b[26] + PIN dout_b[27] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 35.040 0.024 35.064 ; + END + END dout_b[27] + PIN dout_b[28] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 35.328 0.024 35.352 ; + END + END dout_b[28] + PIN dout_b[29] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 35.616 0.024 35.640 ; + END + END dout_b[29] + PIN dout_b[30] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 35.904 0.024 35.928 ; + END + END dout_b[30] + PIN dout_b[31] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 36.192 0.024 36.216 ; + END + END dout_b[31] + PIN din_b[0] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 38.640 0.024 38.664 ; + END + END din_b[0] + PIN din_b[1] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 38.928 0.024 38.952 ; + END + END din_b[1] + PIN din_b[2] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 39.216 0.024 39.240 ; + END + END din_b[2] + PIN din_b[3] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 39.504 0.024 39.528 ; + END + END din_b[3] + PIN din_b[4] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 39.792 0.024 39.816 ; + END + END din_b[4] + PIN din_b[5] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 40.080 0.024 40.104 ; + END + END din_b[5] + PIN din_b[6] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 40.368 0.024 40.392 ; + END + END din_b[6] + PIN din_b[7] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 40.656 0.024 40.680 ; + END + END din_b[7] + PIN din_b[8] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 40.944 0.024 40.968 ; + END + END din_b[8] + PIN din_b[9] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 41.232 0.024 41.256 ; + END + END din_b[9] + PIN din_b[10] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 41.520 0.024 41.544 ; + END + END din_b[10] + PIN din_b[11] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 41.808 0.024 41.832 ; + END + END din_b[11] + PIN din_b[12] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 42.096 0.024 42.120 ; + END + END din_b[12] + PIN din_b[13] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 42.384 0.024 42.408 ; + END + END din_b[13] + PIN din_b[14] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 42.672 0.024 42.696 ; + END + END din_b[14] + PIN din_b[15] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 42.960 0.024 42.984 ; + END + END din_b[15] + PIN din_b[16] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 43.248 0.024 43.272 ; + END + END din_b[16] + PIN din_b[17] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 43.536 0.024 43.560 ; + END + END din_b[17] + PIN din_b[18] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 43.824 0.024 43.848 ; + END + END din_b[18] + PIN din_b[19] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 44.112 0.024 44.136 ; + END + END din_b[19] + PIN din_b[20] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 44.400 0.024 44.424 ; + END + END din_b[20] + PIN din_b[21] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 44.688 0.024 44.712 ; + END + END din_b[21] + PIN din_b[22] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 44.976 0.024 45.000 ; + END + END din_b[22] + PIN din_b[23] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 45.264 0.024 45.288 ; + END + END din_b[23] + PIN din_b[24] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 45.552 0.024 45.576 ; + END + END din_b[24] + PIN din_b[25] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 45.840 0.024 45.864 ; + END + END din_b[25] + PIN din_b[26] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 46.128 0.024 46.152 ; + END + END din_b[26] + PIN din_b[27] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 46.416 0.024 46.440 ; + END + END din_b[27] + PIN din_b[28] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 46.704 0.024 46.728 ; + END + END din_b[28] + PIN din_b[29] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 46.992 0.024 47.016 ; + END + END din_b[29] + PIN din_b[30] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 47.280 0.024 47.304 ; + END + END din_b[30] + PIN din_b[31] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 47.568 0.024 47.592 ; + END + END din_b[31] + PIN addr_b[0] + DIRECTION INPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 50.016 0.024 50.040 ; + END + END addr_b[0] + PIN addr_b[1] + DIRECTION INPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 50.304 0.024 50.328 ; + END + END addr_b[1] + PIN addr_b[2] + DIRECTION INPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 50.592 0.024 50.616 ; + END + END addr_b[2] + PIN addr_b[3] + DIRECTION INPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 50.880 0.024 50.904 ; + END + END addr_b[3] + PIN addr_b[4] + DIRECTION INPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 51.168 0.024 51.192 ; + END + END addr_b[4] + PIN addr_b[5] + DIRECTION INPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 51.456 0.024 51.480 ; + END + END addr_b[5] + PIN addr_b[6] + DIRECTION INPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 51.744 0.024 51.768 ; + END + END addr_b[6] + PIN addr_b[7] + DIRECTION INPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 52.032 0.024 52.056 ; + END + END addr_b[7] + PIN we_a + DIRECTION INPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 54.480 0.024 54.504 ; + END + END we_a + PIN we_b + DIRECTION INPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 54.768 0.024 54.792 ; + END + END we_b + PIN clk + DIRECTION INPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 55.056 0.024 55.080 ; + END + END clk + PIN VSS + DIRECTION INOUT ; + USE GROUND ; + PORT + LAYER M4 ; + RECT 0.048 0.000 8.312 0.096 ; + RECT 0.048 0.768 8.312 0.864 ; + RECT 0.048 1.536 8.312 1.632 ; + RECT 0.048 2.304 8.312 2.400 ; + RECT 0.048 3.072 8.312 3.168 ; + RECT 0.048 3.840 8.312 3.936 ; + RECT 0.048 4.608 8.312 4.704 ; + RECT 0.048 5.376 8.312 5.472 ; + RECT 0.048 6.144 8.312 6.240 ; + RECT 0.048 6.912 8.312 7.008 ; + RECT 0.048 7.680 8.312 7.776 ; + RECT 0.048 8.448 8.312 8.544 ; + RECT 0.048 9.216 8.312 9.312 ; + RECT 0.048 9.984 8.312 10.080 ; + RECT 0.048 10.752 8.312 10.848 ; + RECT 0.048 11.520 8.312 11.616 ; + RECT 0.048 12.288 8.312 12.384 ; + RECT 0.048 13.056 8.312 13.152 ; + RECT 0.048 13.824 8.312 13.920 ; + RECT 0.048 14.592 8.312 14.688 ; + RECT 0.048 15.360 8.312 15.456 ; + RECT 0.048 16.128 8.312 16.224 ; + RECT 0.048 16.896 8.312 16.992 ; + RECT 0.048 17.664 8.312 17.760 ; + RECT 0.048 18.432 8.312 18.528 ; + RECT 0.048 19.200 8.312 19.296 ; + RECT 0.048 19.968 8.312 20.064 ; + RECT 0.048 20.736 8.312 20.832 ; + RECT 0.048 21.504 8.312 21.600 ; + RECT 0.048 22.272 8.312 22.368 ; + RECT 0.048 23.040 8.312 23.136 ; + RECT 0.048 23.808 8.312 23.904 ; + RECT 0.048 24.576 8.312 24.672 ; + RECT 0.048 25.344 8.312 25.440 ; + RECT 0.048 26.112 8.312 26.208 ; + RECT 0.048 26.880 8.312 26.976 ; + RECT 0.048 27.648 8.312 27.744 ; + RECT 0.048 28.416 8.312 28.512 ; + RECT 0.048 29.184 8.312 29.280 ; + RECT 0.048 29.952 8.312 30.048 ; + RECT 0.048 30.720 8.312 30.816 ; + RECT 0.048 31.488 8.312 31.584 ; + RECT 0.048 32.256 8.312 32.352 ; + RECT 0.048 33.024 8.312 33.120 ; + RECT 0.048 33.792 8.312 33.888 ; + RECT 0.048 34.560 8.312 34.656 ; + RECT 0.048 35.328 8.312 35.424 ; + RECT 0.048 36.096 8.312 36.192 ; + RECT 0.048 36.864 8.312 36.960 ; + RECT 0.048 37.632 8.312 37.728 ; + RECT 0.048 38.400 8.312 38.496 ; + RECT 0.048 39.168 8.312 39.264 ; + RECT 0.048 39.936 8.312 40.032 ; + RECT 0.048 40.704 8.312 40.800 ; + RECT 0.048 41.472 8.312 41.568 ; + RECT 0.048 42.240 8.312 42.336 ; + RECT 0.048 43.008 8.312 43.104 ; + RECT 0.048 43.776 8.312 43.872 ; + RECT 0.048 44.544 8.312 44.640 ; + RECT 0.048 45.312 8.312 45.408 ; + RECT 0.048 46.080 8.312 46.176 ; + RECT 0.048 46.848 8.312 46.944 ; + RECT 0.048 47.616 8.312 47.712 ; + RECT 0.048 48.384 8.312 48.480 ; + END + END VSS + PIN VDD + DIRECTION INOUT ; + USE POWER ; + PORT + LAYER M4 ; + RECT 0.048 0.384 8.312 0.480 ; + RECT 0.048 1.152 8.312 1.248 ; + RECT 0.048 1.920 8.312 2.016 ; + RECT 0.048 2.688 8.312 2.784 ; + RECT 0.048 3.456 8.312 3.552 ; + RECT 0.048 4.224 8.312 4.320 ; + RECT 0.048 4.992 8.312 5.088 ; + RECT 0.048 5.760 8.312 5.856 ; + RECT 0.048 6.528 8.312 6.624 ; + RECT 0.048 7.296 8.312 7.392 ; + RECT 0.048 8.064 8.312 8.160 ; + RECT 0.048 8.832 8.312 8.928 ; + RECT 0.048 9.600 8.312 9.696 ; + RECT 0.048 10.368 8.312 10.464 ; + RECT 0.048 11.136 8.312 11.232 ; + RECT 0.048 11.904 8.312 12.000 ; + RECT 0.048 12.672 8.312 12.768 ; + RECT 0.048 13.440 8.312 13.536 ; + RECT 0.048 14.208 8.312 14.304 ; + RECT 0.048 14.976 8.312 15.072 ; + RECT 0.048 15.744 8.312 15.840 ; + RECT 0.048 16.512 8.312 16.608 ; + RECT 0.048 17.280 8.312 17.376 ; + RECT 0.048 18.048 8.312 18.144 ; + RECT 0.048 18.816 8.312 18.912 ; + RECT 0.048 19.584 8.312 19.680 ; + RECT 0.048 20.352 8.312 20.448 ; + RECT 0.048 21.120 8.312 21.216 ; + RECT 0.048 21.888 8.312 21.984 ; + RECT 0.048 22.656 8.312 22.752 ; + RECT 0.048 23.424 8.312 23.520 ; + RECT 0.048 24.192 8.312 24.288 ; + RECT 0.048 24.960 8.312 25.056 ; + RECT 0.048 25.728 8.312 25.824 ; + RECT 0.048 26.496 8.312 26.592 ; + RECT 0.048 27.264 8.312 27.360 ; + RECT 0.048 28.032 8.312 28.128 ; + RECT 0.048 28.800 8.312 28.896 ; + RECT 0.048 29.568 8.312 29.664 ; + RECT 0.048 30.336 8.312 30.432 ; + RECT 0.048 31.104 8.312 31.200 ; + RECT 0.048 31.872 8.312 31.968 ; + RECT 0.048 32.640 8.312 32.736 ; + RECT 0.048 33.408 8.312 33.504 ; + RECT 0.048 34.176 8.312 34.272 ; + RECT 0.048 34.944 8.312 35.040 ; + RECT 0.048 35.712 8.312 35.808 ; + RECT 0.048 36.480 8.312 36.576 ; + RECT 0.048 37.248 8.312 37.344 ; + RECT 0.048 38.016 8.312 38.112 ; + RECT 0.048 38.784 8.312 38.880 ; + RECT 0.048 39.552 8.312 39.648 ; + RECT 0.048 40.320 8.312 40.416 ; + RECT 0.048 41.088 8.312 41.184 ; + RECT 0.048 41.856 8.312 41.952 ; + RECT 0.048 42.624 8.312 42.720 ; + RECT 0.048 43.392 8.312 43.488 ; + RECT 0.048 44.160 8.312 44.256 ; + RECT 0.048 44.928 8.312 45.024 ; + RECT 0.048 45.696 8.312 45.792 ; + RECT 0.048 46.464 8.312 46.560 ; + RECT 0.048 47.232 8.312 47.328 ; + RECT 0.048 48.000 8.312 48.096 ; + RECT 0.048 48.768 8.312 48.864 ; + END + END VDD + OBS + LAYER M1 ; + RECT 0 0 8.360 49.000 ; + LAYER M2 ; + RECT 0 0 8.360 49.000 ; + LAYER M3 ; + RECT 0 0 8.360 49.000 ; + LAYER M4 ; + RECT 0 0 8.360 49.000 ; + END +END dpsram_256x32_h + +END LIBRARY +module dpsram_256x32_h +( + we_a, + addr_a, + din_a, + dout_a, + we_b, + addr_b, + din_b, + dout_b, + clk +); + parameter DATA_WIDTH = 32; + parameter ADDR_WIDTH = 8; + + // Port A + input wire we_a, + input wire [ADDR_WIDTH-1:0] addr_a, + input wire [DATA_WIDTH-1:0] din_a, + output reg [DATA_WIDTH-1:0] dout_a, + + // Port B + input wire we_b, + input wire [ADDR_WIDTH-1:0] addr_b, + input wire [DATA_WIDTH-1:0] din_b, + output reg [DATA_WIDTH-1:0] dout_b, + + input wire clk, + + // Memory array: 256 words of 32 bits + reg [DATA_WIDTH-1:0] mem [0:(1 << ADDR_WIDTH)-1]; + + // Registers for synchronous reads + reg [ADDR_WIDTH-1:0] addr_a_reg; + reg [ADDR_WIDTH-1:0] addr_b_reg; + + integer i; + + always @(posedge clk) begin + // ==== Port A write ==== + if (^we_a === 1'bx || ^addr_a === 1'bx) begin + // Unknown write enable or address ? corrupt entire memory + for (i = 0; i < (1 << ADDR_WIDTH); i = i + 1) + mem[i] <= {DATA_WIDTH{1'bx}}; + end else if (we_a) begin + mem[addr_a] <= din_a; + end + // ==== Port B write ==== + if (^we_b === 1'bx || ^addr_b === 1'bx) begin + // Unknown write enable or address ? corrupt entire memory + for (i = 0; i < (1 << ADDR_WIDTH); i = i + 1) + mem[i] <= {DATA_WIDTH{1'bx}}; + end else if (we_b) begin + mem[addr_b] <= din_b; + end + // Synchronous readback + addr_a_reg <= addr_a; + dout_a <= mem[addr_a_reg]; + addr_b_reg <= addr_b; + dout_b <= mem[addr_b_reg]; + end +endmodule +(* blackbox *) +module dpsram_256x32_h ( + input we_a, + input [7:0] addr_a, + input [31:0] din_a, + output reg [31:0] dout_a, + input we_b, + input [7:0] addr_b, + input [31:0] din_b, + output reg [31:0] dout_b, + clk +); +endmodule +library(dpsram_256x32_h) { + technology (cmos); + delay_model : table_lookup; + revision : 1.0; + comment : "SRAM"; + time_unit : "1ns"; + voltage_unit : "1V"; + current_unit : "1uA"; + leakage_power_unit : "1uW"; + nom_process : 1; + nom_temperature : 25.000; + nom_voltage : 0.7; + capacitive_load_unit (1,pf); + + pulling_resistance_unit : "1kohm"; + + operating_conditions(tt_1.0_25.0) { + process : 1; + temperature : 25.000; + voltage : 0.7; + tree_type : balanced_tree; + } + + /* default attributes */ + default_cell_leakage_power : 0; + default_fanout_load : 1; + default_inout_pin_cap : 0.0; + default_input_pin_cap : 0.0; + default_output_pin_cap : 0.0; + default_input_pin_cap : 0.0; + default_max_transition : 0.227; + + default_operating_conditions : tt_1.0_25.0; + default_leakage_power_density : 0.0; + + /* additional header data */ + slew_derate_from_library : 1.000; + slew_lower_threshold_pct_fall : 20.000; + slew_upper_threshold_pct_fall : 80.000; + slew_lower_threshold_pct_rise : 20.000; + slew_upper_threshold_pct_rise : 80.000; + input_threshold_pct_fall : 50.000; + input_threshold_pct_rise : 50.000; + output_threshold_pct_fall : 50.000; + output_threshold_pct_rise : 50.000; + + + lu_table_template(dpsram_256x32_h_mem_out_delay_template) { + variable_1 : input_net_transition; + variable_2 : total_output_net_capacitance; + index_1 ("1000, 1001"); + index_2 ("1000, 1001"); + } + lu_table_template(dpsram_256x32_h_mem_out_slew_template) { + variable_1 : total_output_net_capacitance; + index_1 ("1000, 1001"); + } + lu_table_template(dpsram_256x32_h_constraint_template) { + variable_1 : related_pin_transition; + variable_2 : constrained_pin_transition; + index_1 ("1000, 1001"); + index_2 ("1000, 1001"); + } + power_lut_template(dpsram_256x32_h_energy_template_clkslew) { + variable_1 : input_transition_time; + index_1 ("1000, 1001"); + } + power_lut_template(dpsram_256x32_h_energy_template_sigslew) { + variable_1 : input_transition_time; + index_1 ("1000, 1001"); + } + library_features(report_delay_calculation); + type (dpsram_256x32_h_DATA) { + base_type : array ; + data_type : bit ; + bit_width : 32; + bit_from : 31; + bit_to : 0 ; + downto : true ; + } + type (dpsram_256x32_h_ADDRESS) { + base_type : array ; + data_type : bit ; + bit_width : 8; + bit_from : 7; + bit_to : 0 ; + downto : true ; + } +cell(dpsram_256x32_h) { + area : 402.046; + interface_timing : true; + memory() { + type : ram; + address_width : 8; + word_width : 32; + } + pin(we_a){ + direction : input; + capacitance : 0.005; + timing() { + related_pin : clk; + timing_type : setup_rising ; + rise_constraint(dpsram_256x32_h_constraint_template) { + index_1 ("0.009, 0.227"); + index_2 ("0.009, 0.227"); + values ( \ + "0.050, 0.050", \ + "0.050, 0.050" \ + ) + } + fall_constraint(dpsram_256x32_h_constraint_template) { + index_1 ("0.009, 0.227"); + index_2 ("0.009, 0.227"); + values ( \ + "0.050, 0.050", \ + "0.050, 0.050" \ + ) + } + } + timing() { + related_pin : clk; + timing_type : hold_rising ; + rise_constraint(dpsram_256x32_h_constraint_template) { + index_1 ("0.009, 0.227"); + index_2 ("0.009, 0.227"); + values ( \ + "0.050, 0.050", \ + "0.050, 0.050" \ + ) + } + fall_constraint(dpsram_256x32_h_constraint_template) { + index_1 ("0.009, 0.227"); + index_2 ("0.009, 0.227"); + values ( \ + "0.050, 0.050", \ + "0.050, 0.050" \ + ) + } + } + internal_power(){ + rise_power(dpsram_256x32_h_energy_template_sigslew) { + index_1 ("0.009, 0.227"); + values ("0.013, 0.013") + } + fall_power(dpsram_256x32_h_energy_template_sigslew) { + index_1 ("0.009, 0.227"); + values ("0.013, 0.013") + } + } + } + bus(addr_a) { + bus_type : dpsram_256x32_h_ADDRESS; + direction : input; + capacitance : 0.005; + timing() { + related_pin : clk; + timing_type : setup_rising ; + rise_constraint(dpsram_256x32_h_constraint_template) { + index_1 ("0.009, 0.227"); + index_2 ("0.009, 0.227"); + values ( \ + "0.050, 0.050", \ + "0.050, 0.050" \ + ) + } + fall_constraint(dpsram_256x32_h_constraint_template) { + index_1 ("0.009, 0.227"); + index_2 ("0.009, 0.227"); + values ( \ + "0.050, 0.050", \ + "0.050, 0.050" \ + ) + } + } + timing() { + related_pin : clk; + timing_type : hold_rising ; + rise_constraint(dpsram_256x32_h_constraint_template) { + index_1 ("0.009, 0.227"); + index_2 ("0.009, 0.227"); + values ( \ + "0.050, 0.050", \ + "0.050, 0.050" \ + ) + } + fall_constraint(dpsram_256x32_h_constraint_template) { + index_1 ("0.009, 0.227"); + index_2 ("0.009, 0.227"); + values ( \ + "0.050, 0.050", \ + "0.050, 0.050" \ + ) + } + } + internal_power(){ + rise_power(dpsram_256x32_h_energy_template_sigslew) { + index_1 ("0.009, 0.227"); + values ("0.013, 0.013") + } + fall_power(dpsram_256x32_h_energy_template_sigslew) { + index_1 ("0.009, 0.227"); + values ("0.013, 0.013") + } + } + } + bus(din_a) { + bus_type : dpsram_256x32_h_DATA; + memory_write() { + address : addr_in; + clocked_on : "clk"; + } + direction : input; + capacitance : 0.005; + timing() { + related_pin : clk; + timing_type : setup_rising ; + rise_constraint(dpsram_256x32_h_constraint_template) { + index_1 ("0.009, 0.227"); + index_2 ("0.009, 0.227"); + values ( \ + "0.050, 0.050", \ + "0.050, 0.050" \ + ) + } + fall_constraint(dpsram_256x32_h_constraint_template) { + index_1 ("0.009, 0.227"); + index_2 ("0.009, 0.227"); + values ( \ + "0.050, 0.050", \ + "0.050, 0.050" \ + ) + } + } + timing() { + related_pin : clk; + timing_type : hold_rising ; + rise_constraint(dpsram_256x32_h_constraint_template) { + index_1 ("0.009, 0.227"); + index_2 ("0.009, 0.227"); + values ( \ + "0.050, 0.050", \ + "0.050, 0.050" \ + ) + } + fall_constraint(dpsram_256x32_h_constraint_template) { + index_1 ("0.009, 0.227"); + index_2 ("0.009, 0.227"); + values ( \ + "0.050, 0.050", \ + "0.050, 0.050" \ + ) + } + } + internal_power(){ + when : "(! (we_a) )"; + rise_power(dpsram_256x32_h_energy_template_sigslew) { + index_1 ("0.009, 0.227"); + values ("0.013, 0.013") + } + fall_power(dpsram_256x32_h_energy_template_sigslew) { + index_1 ("0.009, 0.227"); + values ("0.013, 0.013") + } + } + internal_power(){ + when : "(we_a)"; + rise_power(dpsram_256x32_h_energy_template_sigslew) { + index_1 ("0.009, 0.227"); + values ("0.013, 0.013") + } + fall_power(dpsram_256x32_h_energy_template_sigslew) { + index_1 ("0.009, 0.227"); + values ("0.013, 0.013") + } + } + } + bus(dout_a) { + bus_type : dpsram_256x32_h_DATA; + direction : output; + max_capacitance : 0.500; + memory_read() { + address : addr_in; + } + timing() { + related_pin : "clk" ; + timing_type : rising_edge; + timing_sense : non_unate; + cell_rise(dpsram_256x32_h_mem_out_delay_template) { + index_1 ("0.009, 0.227"); + index_2 ("0.005, 0.500"); + values ( \ + "0.218, 0.218", \ + "0.218, 0.218" \ + ) + } + cell_fall(dpsram_256x32_h_mem_out_delay_template) { + index_1 ("0.009, 0.227"); + index_2 ("0.005, 0.500"); + values ( \ + "0.218, 0.218", \ + "0.218, 0.218" \ + ) + } + rise_transition(dpsram_256x32_h_mem_out_slew_template) { + index_1 ("0.005, 0.500"); + values ("0.009, 0.227") + } + fall_transition(dpsram_256x32_h_mem_out_slew_template) { + index_1 ("0.005, 0.500"); + values ("0.009, 0.227") + } + } + } + pin(we_b){ + direction : input; + capacitance : 0.005; + timing() { + related_pin : clk; + timing_type : setup_rising ; + rise_constraint(dpsram_256x32_h_constraint_template) { + index_1 ("0.009, 0.227"); + index_2 ("0.009, 0.227"); + values ( \ + "0.050, 0.050", \ + "0.050, 0.050" \ + ) + } + fall_constraint(dpsram_256x32_h_constraint_template) { + index_1 ("0.009, 0.227"); + index_2 ("0.009, 0.227"); + values ( \ + "0.050, 0.050", \ + "0.050, 0.050" \ + ) + } + } + timing() { + related_pin : clk; + timing_type : hold_rising ; + rise_constraint(dpsram_256x32_h_constraint_template) { + index_1 ("0.009, 0.227"); + index_2 ("0.009, 0.227"); + values ( \ + "0.050, 0.050", \ + "0.050, 0.050" \ + ) + } + fall_constraint(dpsram_256x32_h_constraint_template) { + index_1 ("0.009, 0.227"); + index_2 ("0.009, 0.227"); + values ( \ + "0.050, 0.050", \ + "0.050, 0.050" \ + ) + } + } + internal_power(){ + rise_power(dpsram_256x32_h_energy_template_sigslew) { + index_1 ("0.009, 0.227"); + values ("0.013, 0.013") + } + fall_power(dpsram_256x32_h_energy_template_sigslew) { + index_1 ("0.009, 0.227"); + values ("0.013, 0.013") + } + } + } + bus(addr_b) { + bus_type : dpsram_256x32_h_ADDRESS; + direction : input; + capacitance : 0.005; + timing() { + related_pin : clk; + timing_type : setup_rising ; + rise_constraint(dpsram_256x32_h_constraint_template) { + index_1 ("0.009, 0.227"); + index_2 ("0.009, 0.227"); + values ( \ + "0.050, 0.050", \ + "0.050, 0.050" \ + ) + } + fall_constraint(dpsram_256x32_h_constraint_template) { + index_1 ("0.009, 0.227"); + index_2 ("0.009, 0.227"); + values ( \ + "0.050, 0.050", \ + "0.050, 0.050" \ + ) + } + } + timing() { + related_pin : clk; + timing_type : hold_rising ; + rise_constraint(dpsram_256x32_h_constraint_template) { + index_1 ("0.009, 0.227"); + index_2 ("0.009, 0.227"); + values ( \ + "0.050, 0.050", \ + "0.050, 0.050" \ + ) + } + fall_constraint(dpsram_256x32_h_constraint_template) { + index_1 ("0.009, 0.227"); + index_2 ("0.009, 0.227"); + values ( \ + "0.050, 0.050", \ + "0.050, 0.050" \ + ) + } + } + internal_power(){ + rise_power(dpsram_256x32_h_energy_template_sigslew) { + index_1 ("0.009, 0.227"); + values ("0.013, 0.013") + } + fall_power(dpsram_256x32_h_energy_template_sigslew) { + index_1 ("0.009, 0.227"); + values ("0.013, 0.013") + } + } + } + bus(din_b) { + bus_type : dpsram_256x32_h_DATA; + memory_write() { + address : addr_in; + clocked_on : "clk"; + } + direction : input; + capacitance : 0.005; + timing() { + related_pin : clk; + timing_type : setup_rising ; + rise_constraint(dpsram_256x32_h_constraint_template) { + index_1 ("0.009, 0.227"); + index_2 ("0.009, 0.227"); + values ( \ + "0.050, 0.050", \ + "0.050, 0.050" \ + ) + } + fall_constraint(dpsram_256x32_h_constraint_template) { + index_1 ("0.009, 0.227"); + index_2 ("0.009, 0.227"); + values ( \ + "0.050, 0.050", \ + "0.050, 0.050" \ + ) + } + } + timing() { + related_pin : clk; + timing_type : hold_rising ; + rise_constraint(dpsram_256x32_h_constraint_template) { + index_1 ("0.009, 0.227"); + index_2 ("0.009, 0.227"); + values ( \ + "0.050, 0.050", \ + "0.050, 0.050" \ + ) + } + fall_constraint(dpsram_256x32_h_constraint_template) { + index_1 ("0.009, 0.227"); + index_2 ("0.009, 0.227"); + values ( \ + "0.050, 0.050", \ + "0.050, 0.050" \ + ) + } + } + internal_power(){ + when : "(! (we_b) )"; + rise_power(dpsram_256x32_h_energy_template_sigslew) { + index_1 ("0.009, 0.227"); + values ("0.013, 0.013") + } + fall_power(dpsram_256x32_h_energy_template_sigslew) { + index_1 ("0.009, 0.227"); + values ("0.013, 0.013") + } + } + internal_power(){ + when : "(we_b)"; + rise_power(dpsram_256x32_h_energy_template_sigslew) { + index_1 ("0.009, 0.227"); + values ("0.013, 0.013") + } + fall_power(dpsram_256x32_h_energy_template_sigslew) { + index_1 ("0.009, 0.227"); + values ("0.013, 0.013") + } + } + } + bus(dout_b) { + bus_type : dpsram_256x32_h_DATA; + direction : output; + max_capacitance : 0.500; + memory_read() { + address : addr_in; + } + timing() { + related_pin : "clk" ; + timing_type : rising_edge; + timing_sense : non_unate; + cell_rise(dpsram_256x32_h_mem_out_delay_template) { + index_1 ("0.009, 0.227"); + index_2 ("0.005, 0.500"); + values ( \ + "0.218, 0.218", \ + "0.218, 0.218" \ + ) + } + cell_fall(dpsram_256x32_h_mem_out_delay_template) { + index_1 ("0.009, 0.227"); + index_2 ("0.005, 0.500"); + values ( \ + "0.218, 0.218", \ + "0.218, 0.218" \ + ) + } + rise_transition(dpsram_256x32_h_mem_out_slew_template) { + index_1 ("0.005, 0.500"); + values ("0.009, 0.227") + } + fall_transition(dpsram_256x32_h_mem_out_slew_template) { + index_1 ("0.005, 0.500"); + values ("0.009, 0.227") + } + } + } + pin(clk) { + direction : input; + capacitance : 0.025; + clock : true; + min_period : 0.157 ; + internal_power(){ + rise_power(dpsram_256x32_h_energy_template_clkslew) { + index_1 ("0.009, 0.227"); + values ("1.345, 1.345") + } + fall_power(dpsram_256x32_h_energy_template_clkslew) { + index_1 ("0.009, 0.227"); + values ("1.345, 1.345") + } + } + } + + cell_leakage_power : 128.900; +} + +} diff --git a/test/au/sprf_256x256.au b/test/au/sprf_256x256.au index ec481fa..92aa7d3 100644 --- a/test/au/sprf_256x256.au +++ b/test/au/sprf_256x256.au @@ -4964,7 +4964,7 @@ module sprf_256x256 addr_a, din_a, dout_a, - clk, + clk ); parameter DATA_WIDTH = 256; parameter ADDR_WIDTH = 8; @@ -4995,7 +4995,7 @@ module sprf_256x256 ( input [7:0] addr_a, input [255:0] din_a, output reg [255:0] dout_a, - clk, + clk ); endmodule library(sprf_256x256) { @@ -5243,7 +5243,7 @@ cell(sprf_256x256) { } } internal_power(){ - when : "(! (we_in) )"; + when : "(! (we_a) )"; rise_power(sprf_256x256_energy_template_sigslew) { index_1 ("0.009, 0.227"); values ("0.013, 0.013") @@ -5254,7 +5254,7 @@ cell(sprf_256x256) { } } internal_power(){ - when : "(we_in)"; + when : "(we_a)"; rise_power(sprf_256x256_energy_template_sigslew) { index_1 ("0.009, 0.227"); values ("0.013, 0.013") diff --git a/test/au/sprf_256x32.au b/test/au/sprf_256x32.au index a73d357..f61f073 100644 --- a/test/au/sprf_256x32.au +++ b/test/au/sprf_256x32.au @@ -823,7 +823,7 @@ module sprf_256x32 addr_a, din_a, dout_a, - clk, + clk ); parameter DATA_WIDTH = 32; parameter ADDR_WIDTH = 8; @@ -854,7 +854,7 @@ module sprf_256x32 ( input [7:0] addr_a, input [31:0] din_a, output reg [31:0] dout_a, - clk, + clk ); endmodule library(sprf_256x32) { @@ -1102,7 +1102,7 @@ cell(sprf_256x32) { } } internal_power(){ - when : "(! (we_in) )"; + when : "(! (we_a) )"; rise_power(sprf_256x32_energy_template_sigslew) { index_1 ("0.009, 0.227"); values ("0.013, 0.013") @@ -1113,7 +1113,7 @@ cell(sprf_256x32) { } } internal_power(){ - when : "(we_in)"; + when : "(we_a)"; rise_power(sprf_256x32_energy_template_sigslew) { index_1 ("0.009, 0.227"); values ("0.013, 0.013") diff --git a/test/au/sprf_256x32_h.au b/test/au/sprf_256x32_h.au new file mode 100644 index 0000000..ca5d98e --- /dev/null +++ b/test/au/sprf_256x32_h.au @@ -0,0 +1,1232 @@ +# Generated by FakeRAM 2.0 +VERSION 5.7 ; +BUSBITCHARS "[]" ; +PROPERTYDEFINITIONS + MACRO width INTEGER ; + MACRO depth INTEGER ; + MACRO banks INTEGER ; +END PROPERTYDEFINITIONS +MACRO sprf_256x32_h + PROPERTY width 32 ; + PROPERTY depth 256 ; + PROPERTY banks 2 ; + FOREIGN sprf_256x32_h 0 0 ; + SYMMETRY X Y R90 ; + SIZE 8.360 BY 61.600 ; + CLASS BLOCK ; + PIN dout_a[0] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 0.048 0.024 0.072 ; + END + END dout_a[0] + PIN dout_a[1] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 0.864 0.024 0.888 ; + END + END dout_a[1] + PIN dout_a[2] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 1.680 0.024 1.704 ; + END + END dout_a[2] + PIN dout_a[3] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 2.496 0.024 2.520 ; + END + END dout_a[3] + PIN dout_a[4] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 3.312 0.024 3.336 ; + END + END dout_a[4] + PIN dout_a[5] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 4.128 0.024 4.152 ; + END + END dout_a[5] + PIN dout_a[6] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 4.944 0.024 4.968 ; + END + END dout_a[6] + PIN dout_a[7] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 5.760 0.024 5.784 ; + END + END dout_a[7] + PIN dout_a[8] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 6.576 0.024 6.600 ; + END + END dout_a[8] + PIN dout_a[9] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 7.392 0.024 7.416 ; + END + END dout_a[9] + PIN dout_a[10] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 8.208 0.024 8.232 ; + END + END dout_a[10] + PIN dout_a[11] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 9.024 0.024 9.048 ; + END + END dout_a[11] + PIN dout_a[12] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 9.840 0.024 9.864 ; + END + END dout_a[12] + PIN dout_a[13] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 10.656 0.024 10.680 ; + END + END dout_a[13] + PIN dout_a[14] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 11.472 0.024 11.496 ; + END + END dout_a[14] + PIN dout_a[15] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 12.288 0.024 12.312 ; + END + END dout_a[15] + PIN dout_a[16] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 13.104 0.024 13.128 ; + END + END dout_a[16] + PIN dout_a[17] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 13.920 0.024 13.944 ; + END + END dout_a[17] + PIN dout_a[18] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 14.736 0.024 14.760 ; + END + END dout_a[18] + PIN dout_a[19] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 15.552 0.024 15.576 ; + END + END dout_a[19] + PIN dout_a[20] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 16.368 0.024 16.392 ; + END + END dout_a[20] + PIN dout_a[21] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 17.184 0.024 17.208 ; + END + END dout_a[21] + PIN dout_a[22] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 18.000 0.024 18.024 ; + END + END dout_a[22] + PIN dout_a[23] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 18.816 0.024 18.840 ; + END + END dout_a[23] + PIN dout_a[24] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 19.632 0.024 19.656 ; + END + END dout_a[24] + PIN dout_a[25] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 20.448 0.024 20.472 ; + END + END dout_a[25] + PIN dout_a[26] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 21.264 0.024 21.288 ; + END + END dout_a[26] + PIN dout_a[27] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 22.080 0.024 22.104 ; + END + END dout_a[27] + PIN dout_a[28] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 22.896 0.024 22.920 ; + END + END dout_a[28] + PIN dout_a[29] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 23.712 0.024 23.736 ; + END + END dout_a[29] + PIN dout_a[30] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 24.528 0.024 24.552 ; + END + END dout_a[30] + PIN dout_a[31] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 25.344 0.024 25.368 ; + END + END dout_a[31] + PIN din_a[0] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 26.496 0.024 26.520 ; + END + END din_a[0] + PIN din_a[1] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 27.312 0.024 27.336 ; + END + END din_a[1] + PIN din_a[2] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 28.128 0.024 28.152 ; + END + END din_a[2] + PIN din_a[3] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 28.944 0.024 28.968 ; + END + END din_a[3] + PIN din_a[4] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 29.760 0.024 29.784 ; + END + END din_a[4] + PIN din_a[5] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 30.576 0.024 30.600 ; + END + END din_a[5] + PIN din_a[6] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 31.392 0.024 31.416 ; + END + END din_a[6] + PIN din_a[7] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 32.208 0.024 32.232 ; + END + END din_a[7] + PIN din_a[8] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 33.024 0.024 33.048 ; + END + END din_a[8] + PIN din_a[9] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 33.840 0.024 33.864 ; + END + END din_a[9] + PIN din_a[10] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 34.656 0.024 34.680 ; + END + END din_a[10] + PIN din_a[11] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 35.472 0.024 35.496 ; + END + END din_a[11] + PIN din_a[12] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 36.288 0.024 36.312 ; + END + END din_a[12] + PIN din_a[13] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 37.104 0.024 37.128 ; + END + END din_a[13] + PIN din_a[14] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 37.920 0.024 37.944 ; + END + END din_a[14] + PIN din_a[15] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 38.736 0.024 38.760 ; + END + END din_a[15] + PIN din_a[16] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 39.552 0.024 39.576 ; + END + END din_a[16] + PIN din_a[17] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 40.368 0.024 40.392 ; + END + END din_a[17] + PIN din_a[18] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 41.184 0.024 41.208 ; + END + END din_a[18] + PIN din_a[19] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 42.000 0.024 42.024 ; + END + END din_a[19] + PIN din_a[20] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 42.816 0.024 42.840 ; + END + END din_a[20] + PIN din_a[21] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 43.632 0.024 43.656 ; + END + END din_a[21] + PIN din_a[22] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 44.448 0.024 44.472 ; + END + END din_a[22] + PIN din_a[23] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 45.264 0.024 45.288 ; + END + END din_a[23] + PIN din_a[24] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 46.080 0.024 46.104 ; + END + END din_a[24] + PIN din_a[25] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 46.896 0.024 46.920 ; + END + END din_a[25] + PIN din_a[26] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 47.712 0.024 47.736 ; + END + END din_a[26] + PIN din_a[27] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 48.528 0.024 48.552 ; + END + END din_a[27] + PIN din_a[28] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 49.344 0.024 49.368 ; + END + END din_a[28] + PIN din_a[29] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 50.160 0.024 50.184 ; + END + END din_a[29] + PIN din_a[30] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 50.976 0.024 51.000 ; + END + END din_a[30] + PIN din_a[31] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 51.792 0.024 51.816 ; + END + END din_a[31] + PIN addr_a[0] + DIRECTION INPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 52.944 0.024 52.968 ; + END + END addr_a[0] + PIN addr_a[1] + DIRECTION INPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 53.760 0.024 53.784 ; + END + END addr_a[1] + PIN addr_a[2] + DIRECTION INPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 54.576 0.024 54.600 ; + END + END addr_a[2] + PIN addr_a[3] + DIRECTION INPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 55.392 0.024 55.416 ; + END + END addr_a[3] + PIN addr_a[4] + DIRECTION INPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 56.208 0.024 56.232 ; + END + END addr_a[4] + PIN addr_a[5] + DIRECTION INPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 57.024 0.024 57.048 ; + END + END addr_a[5] + PIN addr_a[6] + DIRECTION INPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 57.840 0.024 57.864 ; + END + END addr_a[6] + PIN addr_a[7] + DIRECTION INPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 58.656 0.024 58.680 ; + END + END addr_a[7] + PIN we_a + DIRECTION INPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 59.808 0.024 59.832 ; + END + END we_a + PIN clk + DIRECTION INPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 60.624 0.024 60.648 ; + END + END clk + PIN VSS + DIRECTION INOUT ; + USE GROUND ; + PORT + LAYER M4 ; + RECT 0.048 0.000 8.312 0.096 ; + RECT 0.048 0.768 8.312 0.864 ; + RECT 0.048 1.536 8.312 1.632 ; + RECT 0.048 2.304 8.312 2.400 ; + RECT 0.048 3.072 8.312 3.168 ; + RECT 0.048 3.840 8.312 3.936 ; + RECT 0.048 4.608 8.312 4.704 ; + RECT 0.048 5.376 8.312 5.472 ; + RECT 0.048 6.144 8.312 6.240 ; + RECT 0.048 6.912 8.312 7.008 ; + RECT 0.048 7.680 8.312 7.776 ; + RECT 0.048 8.448 8.312 8.544 ; + RECT 0.048 9.216 8.312 9.312 ; + RECT 0.048 9.984 8.312 10.080 ; + RECT 0.048 10.752 8.312 10.848 ; + RECT 0.048 11.520 8.312 11.616 ; + RECT 0.048 12.288 8.312 12.384 ; + RECT 0.048 13.056 8.312 13.152 ; + RECT 0.048 13.824 8.312 13.920 ; + RECT 0.048 14.592 8.312 14.688 ; + RECT 0.048 15.360 8.312 15.456 ; + RECT 0.048 16.128 8.312 16.224 ; + RECT 0.048 16.896 8.312 16.992 ; + RECT 0.048 17.664 8.312 17.760 ; + RECT 0.048 18.432 8.312 18.528 ; + RECT 0.048 19.200 8.312 19.296 ; + RECT 0.048 19.968 8.312 20.064 ; + RECT 0.048 20.736 8.312 20.832 ; + RECT 0.048 21.504 8.312 21.600 ; + RECT 0.048 22.272 8.312 22.368 ; + RECT 0.048 23.040 8.312 23.136 ; + RECT 0.048 23.808 8.312 23.904 ; + RECT 0.048 24.576 8.312 24.672 ; + RECT 0.048 25.344 8.312 25.440 ; + RECT 0.048 26.112 8.312 26.208 ; + RECT 0.048 26.880 8.312 26.976 ; + RECT 0.048 27.648 8.312 27.744 ; + RECT 0.048 28.416 8.312 28.512 ; + RECT 0.048 29.184 8.312 29.280 ; + RECT 0.048 29.952 8.312 30.048 ; + RECT 0.048 30.720 8.312 30.816 ; + RECT 0.048 31.488 8.312 31.584 ; + RECT 0.048 32.256 8.312 32.352 ; + RECT 0.048 33.024 8.312 33.120 ; + RECT 0.048 33.792 8.312 33.888 ; + RECT 0.048 34.560 8.312 34.656 ; + RECT 0.048 35.328 8.312 35.424 ; + RECT 0.048 36.096 8.312 36.192 ; + RECT 0.048 36.864 8.312 36.960 ; + RECT 0.048 37.632 8.312 37.728 ; + RECT 0.048 38.400 8.312 38.496 ; + RECT 0.048 39.168 8.312 39.264 ; + RECT 0.048 39.936 8.312 40.032 ; + RECT 0.048 40.704 8.312 40.800 ; + RECT 0.048 41.472 8.312 41.568 ; + RECT 0.048 42.240 8.312 42.336 ; + RECT 0.048 43.008 8.312 43.104 ; + RECT 0.048 43.776 8.312 43.872 ; + RECT 0.048 44.544 8.312 44.640 ; + RECT 0.048 45.312 8.312 45.408 ; + RECT 0.048 46.080 8.312 46.176 ; + RECT 0.048 46.848 8.312 46.944 ; + RECT 0.048 47.616 8.312 47.712 ; + RECT 0.048 48.384 8.312 48.480 ; + RECT 0.048 49.152 8.312 49.248 ; + RECT 0.048 49.920 8.312 50.016 ; + RECT 0.048 50.688 8.312 50.784 ; + RECT 0.048 51.456 8.312 51.552 ; + RECT 0.048 52.224 8.312 52.320 ; + RECT 0.048 52.992 8.312 53.088 ; + RECT 0.048 53.760 8.312 53.856 ; + RECT 0.048 54.528 8.312 54.624 ; + RECT 0.048 55.296 8.312 55.392 ; + RECT 0.048 56.064 8.312 56.160 ; + RECT 0.048 56.832 8.312 56.928 ; + RECT 0.048 57.600 8.312 57.696 ; + RECT 0.048 58.368 8.312 58.464 ; + RECT 0.048 59.136 8.312 59.232 ; + RECT 0.048 59.904 8.312 60.000 ; + RECT 0.048 60.672 8.312 60.768 ; + RECT 0.048 61.440 8.312 61.536 ; + END + END VSS + PIN VDD + DIRECTION INOUT ; + USE POWER ; + PORT + LAYER M4 ; + RECT 0.048 0.384 8.312 0.480 ; + RECT 0.048 1.152 8.312 1.248 ; + RECT 0.048 1.920 8.312 2.016 ; + RECT 0.048 2.688 8.312 2.784 ; + RECT 0.048 3.456 8.312 3.552 ; + RECT 0.048 4.224 8.312 4.320 ; + RECT 0.048 4.992 8.312 5.088 ; + RECT 0.048 5.760 8.312 5.856 ; + RECT 0.048 6.528 8.312 6.624 ; + RECT 0.048 7.296 8.312 7.392 ; + RECT 0.048 8.064 8.312 8.160 ; + RECT 0.048 8.832 8.312 8.928 ; + RECT 0.048 9.600 8.312 9.696 ; + RECT 0.048 10.368 8.312 10.464 ; + RECT 0.048 11.136 8.312 11.232 ; + RECT 0.048 11.904 8.312 12.000 ; + RECT 0.048 12.672 8.312 12.768 ; + RECT 0.048 13.440 8.312 13.536 ; + RECT 0.048 14.208 8.312 14.304 ; + RECT 0.048 14.976 8.312 15.072 ; + RECT 0.048 15.744 8.312 15.840 ; + RECT 0.048 16.512 8.312 16.608 ; + RECT 0.048 17.280 8.312 17.376 ; + RECT 0.048 18.048 8.312 18.144 ; + RECT 0.048 18.816 8.312 18.912 ; + RECT 0.048 19.584 8.312 19.680 ; + RECT 0.048 20.352 8.312 20.448 ; + RECT 0.048 21.120 8.312 21.216 ; + RECT 0.048 21.888 8.312 21.984 ; + RECT 0.048 22.656 8.312 22.752 ; + RECT 0.048 23.424 8.312 23.520 ; + RECT 0.048 24.192 8.312 24.288 ; + RECT 0.048 24.960 8.312 25.056 ; + RECT 0.048 25.728 8.312 25.824 ; + RECT 0.048 26.496 8.312 26.592 ; + RECT 0.048 27.264 8.312 27.360 ; + RECT 0.048 28.032 8.312 28.128 ; + RECT 0.048 28.800 8.312 28.896 ; + RECT 0.048 29.568 8.312 29.664 ; + RECT 0.048 30.336 8.312 30.432 ; + RECT 0.048 31.104 8.312 31.200 ; + RECT 0.048 31.872 8.312 31.968 ; + RECT 0.048 32.640 8.312 32.736 ; + RECT 0.048 33.408 8.312 33.504 ; + RECT 0.048 34.176 8.312 34.272 ; + RECT 0.048 34.944 8.312 35.040 ; + RECT 0.048 35.712 8.312 35.808 ; + RECT 0.048 36.480 8.312 36.576 ; + RECT 0.048 37.248 8.312 37.344 ; + RECT 0.048 38.016 8.312 38.112 ; + RECT 0.048 38.784 8.312 38.880 ; + RECT 0.048 39.552 8.312 39.648 ; + RECT 0.048 40.320 8.312 40.416 ; + RECT 0.048 41.088 8.312 41.184 ; + RECT 0.048 41.856 8.312 41.952 ; + RECT 0.048 42.624 8.312 42.720 ; + RECT 0.048 43.392 8.312 43.488 ; + RECT 0.048 44.160 8.312 44.256 ; + RECT 0.048 44.928 8.312 45.024 ; + RECT 0.048 45.696 8.312 45.792 ; + RECT 0.048 46.464 8.312 46.560 ; + RECT 0.048 47.232 8.312 47.328 ; + RECT 0.048 48.000 8.312 48.096 ; + RECT 0.048 48.768 8.312 48.864 ; + RECT 0.048 49.536 8.312 49.632 ; + RECT 0.048 50.304 8.312 50.400 ; + RECT 0.048 51.072 8.312 51.168 ; + RECT 0.048 51.840 8.312 51.936 ; + RECT 0.048 52.608 8.312 52.704 ; + RECT 0.048 53.376 8.312 53.472 ; + RECT 0.048 54.144 8.312 54.240 ; + RECT 0.048 54.912 8.312 55.008 ; + RECT 0.048 55.680 8.312 55.776 ; + RECT 0.048 56.448 8.312 56.544 ; + RECT 0.048 57.216 8.312 57.312 ; + RECT 0.048 57.984 8.312 58.080 ; + RECT 0.048 58.752 8.312 58.848 ; + RECT 0.048 59.520 8.312 59.616 ; + RECT 0.048 60.288 8.312 60.384 ; + RECT 0.048 61.056 8.312 61.152 ; + END + END VDD + OBS + LAYER M1 ; + RECT 0 0 8.360 61.600 ; + LAYER M2 ; + RECT 0 0 8.360 61.600 ; + LAYER M3 ; + RECT 0 0 8.360 61.600 ; + LAYER M4 ; + RECT 0 0 8.360 61.600 ; + END +END sprf_256x32_h + +END LIBRARY +module sprf_256x32_h +( + we_a, + addr_a, + din_a, + dout_a, + clk +); + parameter DATA_WIDTH = 32; + parameter ADDR_WIDTH = 8; + + // Port A + input wire we_a, + input wire [ADDR_WIDTH-1:0] addr_a, + input wire [DATA_WIDTH-1:0] din_a, + output reg [DATA_WIDTH-1:0] dout_a, + + input wire clk, + + // Memory array: 256 words of 32 bits + reg [DATA_WIDTH-1:0] mem [0:(1 << ADDR_WIDTH)-1]; + + // Synchronous Port A + always @(posedge clk) begin + if (we_a) begin + mem[addr_a] <= din_a; + end + dout_a <= mem[addr_a]; // Read occurs after write (read-after-write OK) + end + +endmodule +(* blackbox *) +module sprf_256x32_h ( + input we_a, + input [7:0] addr_a, + input [31:0] din_a, + output reg [31:0] dout_a, + clk +); +endmodule +library(sprf_256x32_h) { + technology (cmos); + delay_model : table_lookup; + revision : 1.0; + comment : "SRAM"; + time_unit : "1ns"; + voltage_unit : "1V"; + current_unit : "1uA"; + leakage_power_unit : "1uW"; + nom_process : 1; + nom_temperature : 25.000; + nom_voltage : 0.7; + capacitive_load_unit (1,pf); + + pulling_resistance_unit : "1kohm"; + + operating_conditions(tt_1.0_25.0) { + process : 1; + temperature : 25.000; + voltage : 0.7; + tree_type : balanced_tree; + } + + /* default attributes */ + default_cell_leakage_power : 0; + default_fanout_load : 1; + default_inout_pin_cap : 0.0; + default_input_pin_cap : 0.0; + default_output_pin_cap : 0.0; + default_input_pin_cap : 0.0; + default_max_transition : 0.227; + + default_operating_conditions : tt_1.0_25.0; + default_leakage_power_density : 0.0; + + /* additional header data */ + slew_derate_from_library : 1.000; + slew_lower_threshold_pct_fall : 20.000; + slew_upper_threshold_pct_fall : 80.000; + slew_lower_threshold_pct_rise : 20.000; + slew_upper_threshold_pct_rise : 80.000; + input_threshold_pct_fall : 50.000; + input_threshold_pct_rise : 50.000; + output_threshold_pct_fall : 50.000; + output_threshold_pct_rise : 50.000; + + + lu_table_template(sprf_256x32_h_mem_out_delay_template) { + variable_1 : input_net_transition; + variable_2 : total_output_net_capacitance; + index_1 ("1000, 1001"); + index_2 ("1000, 1001"); + } + lu_table_template(sprf_256x32_h_mem_out_slew_template) { + variable_1 : total_output_net_capacitance; + index_1 ("1000, 1001"); + } + lu_table_template(sprf_256x32_h_constraint_template) { + variable_1 : related_pin_transition; + variable_2 : constrained_pin_transition; + index_1 ("1000, 1001"); + index_2 ("1000, 1001"); + } + power_lut_template(sprf_256x32_h_energy_template_clkslew) { + variable_1 : input_transition_time; + index_1 ("1000, 1001"); + } + power_lut_template(sprf_256x32_h_energy_template_sigslew) { + variable_1 : input_transition_time; + index_1 ("1000, 1001"); + } + library_features(report_delay_calculation); + type (sprf_256x32_h_DATA) { + base_type : array ; + data_type : bit ; + bit_width : 32; + bit_from : 31; + bit_to : 0 ; + downto : true ; + } + type (sprf_256x32_h_ADDRESS) { + base_type : array ; + data_type : bit ; + bit_width : 8; + bit_from : 7; + bit_to : 0 ; + downto : true ; + } +cell(sprf_256x32_h) { + area : 509.873; + interface_timing : true; + pin(we_a){ + direction : input; + capacitance : 0.005; + timing() { + related_pin : clk; + timing_type : setup_rising ; + rise_constraint(sprf_256x32_h_constraint_template) { + index_1 ("0.009, 0.227"); + index_2 ("0.009, 0.227"); + values ( \ + "0.050, 0.050", \ + "0.050, 0.050" \ + ) + } + fall_constraint(sprf_256x32_h_constraint_template) { + index_1 ("0.009, 0.227"); + index_2 ("0.009, 0.227"); + values ( \ + "0.050, 0.050", \ + "0.050, 0.050" \ + ) + } + } + timing() { + related_pin : clk; + timing_type : hold_rising ; + rise_constraint(sprf_256x32_h_constraint_template) { + index_1 ("0.009, 0.227"); + index_2 ("0.009, 0.227"); + values ( \ + "0.050, 0.050", \ + "0.050, 0.050" \ + ) + } + fall_constraint(sprf_256x32_h_constraint_template) { + index_1 ("0.009, 0.227"); + index_2 ("0.009, 0.227"); + values ( \ + "0.050, 0.050", \ + "0.050, 0.050" \ + ) + } + } + internal_power(){ + rise_power(sprf_256x32_h_energy_template_sigslew) { + index_1 ("0.009, 0.227"); + values ("0.013, 0.013") + } + fall_power(sprf_256x32_h_energy_template_sigslew) { + index_1 ("0.009, 0.227"); + values ("0.013, 0.013") + } + } + } + bus(addr_a) { + bus_type : sprf_256x32_h_ADDRESS; + direction : input; + capacitance : 0.005; + timing() { + related_pin : clk; + timing_type : setup_rising ; + rise_constraint(sprf_256x32_h_constraint_template) { + index_1 ("0.009, 0.227"); + index_2 ("0.009, 0.227"); + values ( \ + "0.050, 0.050", \ + "0.050, 0.050" \ + ) + } + fall_constraint(sprf_256x32_h_constraint_template) { + index_1 ("0.009, 0.227"); + index_2 ("0.009, 0.227"); + values ( \ + "0.050, 0.050", \ + "0.050, 0.050" \ + ) + } + } + timing() { + related_pin : clk; + timing_type : hold_rising ; + rise_constraint(sprf_256x32_h_constraint_template) { + index_1 ("0.009, 0.227"); + index_2 ("0.009, 0.227"); + values ( \ + "0.050, 0.050", \ + "0.050, 0.050" \ + ) + } + fall_constraint(sprf_256x32_h_constraint_template) { + index_1 ("0.009, 0.227"); + index_2 ("0.009, 0.227"); + values ( \ + "0.050, 0.050", \ + "0.050, 0.050" \ + ) + } + } + internal_power(){ + rise_power(sprf_256x32_h_energy_template_sigslew) { + index_1 ("0.009, 0.227"); + values ("0.013, 0.013") + } + fall_power(sprf_256x32_h_energy_template_sigslew) { + index_1 ("0.009, 0.227"); + values ("0.013, 0.013") + } + } + } + bus(din_a) { + bus_type : sprf_256x32_h_DATA; + direction : input; + capacitance : 0.005; + timing() { + related_pin : clk; + timing_type : setup_rising ; + rise_constraint(sprf_256x32_h_constraint_template) { + index_1 ("0.009, 0.227"); + index_2 ("0.009, 0.227"); + values ( \ + "0.050, 0.050", \ + "0.050, 0.050" \ + ) + } + fall_constraint(sprf_256x32_h_constraint_template) { + index_1 ("0.009, 0.227"); + index_2 ("0.009, 0.227"); + values ( \ + "0.050, 0.050", \ + "0.050, 0.050" \ + ) + } + } + timing() { + related_pin : clk; + timing_type : hold_rising ; + rise_constraint(sprf_256x32_h_constraint_template) { + index_1 ("0.009, 0.227"); + index_2 ("0.009, 0.227"); + values ( \ + "0.050, 0.050", \ + "0.050, 0.050" \ + ) + } + fall_constraint(sprf_256x32_h_constraint_template) { + index_1 ("0.009, 0.227"); + index_2 ("0.009, 0.227"); + values ( \ + "0.050, 0.050", \ + "0.050, 0.050" \ + ) + } + } + internal_power(){ + when : "(! (we_a) )"; + rise_power(sprf_256x32_h_energy_template_sigslew) { + index_1 ("0.009, 0.227"); + values ("0.013, 0.013") + } + fall_power(sprf_256x32_h_energy_template_sigslew) { + index_1 ("0.009, 0.227"); + values ("0.013, 0.013") + } + } + internal_power(){ + when : "(we_a)"; + rise_power(sprf_256x32_h_energy_template_sigslew) { + index_1 ("0.009, 0.227"); + values ("0.013, 0.013") + } + fall_power(sprf_256x32_h_energy_template_sigslew) { + index_1 ("0.009, 0.227"); + values ("0.013, 0.013") + } + } + } + bus(dout_a) { + bus_type : sprf_256x32_h_DATA; + direction : output; + max_capacitance : 0.500; + timing() { + related_pin : "clk" ; + timing_type : rising_edge; + timing_sense : non_unate; + cell_rise(sprf_256x32_h_mem_out_delay_template) { + index_1 ("0.009, 0.227"); + index_2 ("0.005, 0.500"); + values ( \ + "0.218, 0.218", \ + "0.218, 0.218" \ + ) + } + cell_fall(sprf_256x32_h_mem_out_delay_template) { + index_1 ("0.009, 0.227"); + index_2 ("0.005, 0.500"); + values ( \ + "0.218, 0.218", \ + "0.218, 0.218" \ + ) + } + rise_transition(sprf_256x32_h_mem_out_slew_template) { + index_1 ("0.005, 0.500"); + values ("0.009, 0.227") + } + fall_transition(sprf_256x32_h_mem_out_slew_template) { + index_1 ("0.005, 0.500"); + values ("0.009, 0.227") + } + } + } + pin(clk) { + direction : input; + capacitance : 0.025; + clock : true; + min_period : 0.157 ; + internal_power(){ + rise_power(sprf_256x32_h_energy_template_clkslew) { + index_1 ("0.009, 0.227"); + values ("1.345, 1.345") + } + fall_power(sprf_256x32_h_energy_template_clkslew) { + index_1 ("0.009, 0.227"); + values ("1.345, 1.345") + } + } + } + + cell_leakage_power : 128.900; +} + +} diff --git a/test/au/spsram_256x32_h.au b/test/au/spsram_256x32_h.au new file mode 100644 index 0000000..72cfeae --- /dev/null +++ b/test/au/spsram_256x32_h.au @@ -0,0 +1,1303 @@ +# Generated by FakeRAM 2.0 +VERSION 5.7 ; +BUSBITCHARS "[]" ; +PROPERTYDEFINITIONS + MACRO width INTEGER ; + MACRO depth INTEGER ; + MACRO banks INTEGER ; +END PROPERTYDEFINITIONS +MACRO spsram_256x32_h + PROPERTY width 32 ; + PROPERTY depth 256 ; + PROPERTY banks 2 ; + FOREIGN spsram_256x32_h 0 0 ; + SYMMETRY X Y R90 ; + SIZE 8.360 BY 44.800 ; + CLASS BLOCK ; + PIN rd_out[0] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 0.048 0.024 0.072 ; + END + END rd_out[0] + PIN rd_out[1] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 0.624 0.024 0.648 ; + END + END rd_out[1] + PIN rd_out[2] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 1.200 0.024 1.224 ; + END + END rd_out[2] + PIN rd_out[3] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 1.776 0.024 1.800 ; + END + END rd_out[3] + PIN rd_out[4] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 2.352 0.024 2.376 ; + END + END rd_out[4] + PIN rd_out[5] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 2.928 0.024 2.952 ; + END + END rd_out[5] + PIN rd_out[6] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 3.504 0.024 3.528 ; + END + END rd_out[6] + PIN rd_out[7] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 4.080 0.024 4.104 ; + END + END rd_out[7] + PIN rd_out[8] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 4.656 0.024 4.680 ; + END + END rd_out[8] + PIN rd_out[9] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 5.232 0.024 5.256 ; + END + END rd_out[9] + PIN rd_out[10] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 5.808 0.024 5.832 ; + END + END rd_out[10] + PIN rd_out[11] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 6.384 0.024 6.408 ; + END + END rd_out[11] + PIN rd_out[12] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 6.960 0.024 6.984 ; + END + END rd_out[12] + PIN rd_out[13] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 7.536 0.024 7.560 ; + END + END rd_out[13] + PIN rd_out[14] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 8.112 0.024 8.136 ; + END + END rd_out[14] + PIN rd_out[15] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 8.688 0.024 8.712 ; + END + END rd_out[15] + PIN rd_out[16] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 9.264 0.024 9.288 ; + END + END rd_out[16] + PIN rd_out[17] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 9.840 0.024 9.864 ; + END + END rd_out[17] + PIN rd_out[18] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 10.416 0.024 10.440 ; + END + END rd_out[18] + PIN rd_out[19] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 10.992 0.024 11.016 ; + END + END rd_out[19] + PIN rd_out[20] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 11.568 0.024 11.592 ; + END + END rd_out[20] + PIN rd_out[21] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 12.144 0.024 12.168 ; + END + END rd_out[21] + PIN rd_out[22] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 12.720 0.024 12.744 ; + END + END rd_out[22] + PIN rd_out[23] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 13.296 0.024 13.320 ; + END + END rd_out[23] + PIN rd_out[24] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 13.872 0.024 13.896 ; + END + END rd_out[24] + PIN rd_out[25] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 14.448 0.024 14.472 ; + END + END rd_out[25] + PIN rd_out[26] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 15.024 0.024 15.048 ; + END + END rd_out[26] + PIN rd_out[27] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 15.600 0.024 15.624 ; + END + END rd_out[27] + PIN rd_out[28] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 16.176 0.024 16.200 ; + END + END rd_out[28] + PIN rd_out[29] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 16.752 0.024 16.776 ; + END + END rd_out[29] + PIN rd_out[30] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 17.328 0.024 17.352 ; + END + END rd_out[30] + PIN rd_out[31] + DIRECTION OUTPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 17.904 0.024 17.928 ; + END + END rd_out[31] + PIN wd_in[0] + DIRECTION INPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 18.960 0.024 18.984 ; + END + END wd_in[0] + PIN wd_in[1] + DIRECTION INPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 19.536 0.024 19.560 ; + END + END wd_in[1] + PIN wd_in[2] + DIRECTION INPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 20.112 0.024 20.136 ; + END + END wd_in[2] + PIN wd_in[3] + DIRECTION INPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 20.688 0.024 20.712 ; + END + END wd_in[3] + PIN wd_in[4] + DIRECTION INPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 21.264 0.024 21.288 ; + END + END wd_in[4] + PIN wd_in[5] + DIRECTION INPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 21.840 0.024 21.864 ; + END + END wd_in[5] + PIN wd_in[6] + DIRECTION INPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 22.416 0.024 22.440 ; + END + END wd_in[6] + PIN wd_in[7] + DIRECTION INPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 22.992 0.024 23.016 ; + END + END wd_in[7] + PIN wd_in[8] + DIRECTION INPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 23.568 0.024 23.592 ; + END + END wd_in[8] + PIN wd_in[9] + DIRECTION INPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 24.144 0.024 24.168 ; + END + END wd_in[9] + PIN wd_in[10] + DIRECTION INPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 24.720 0.024 24.744 ; + END + END wd_in[10] + PIN wd_in[11] + DIRECTION INPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 25.296 0.024 25.320 ; + END + END wd_in[11] + PIN wd_in[12] + DIRECTION INPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 25.872 0.024 25.896 ; + END + END wd_in[12] + PIN wd_in[13] + DIRECTION INPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 26.448 0.024 26.472 ; + END + END wd_in[13] + PIN wd_in[14] + DIRECTION INPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 27.024 0.024 27.048 ; + END + END wd_in[14] + PIN wd_in[15] + DIRECTION INPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 27.600 0.024 27.624 ; + END + END wd_in[15] + PIN wd_in[16] + DIRECTION INPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 28.176 0.024 28.200 ; + END + END wd_in[16] + PIN wd_in[17] + DIRECTION INPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 28.752 0.024 28.776 ; + END + END wd_in[17] + PIN wd_in[18] + DIRECTION INPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 29.328 0.024 29.352 ; + END + END wd_in[18] + PIN wd_in[19] + DIRECTION INPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 29.904 0.024 29.928 ; + END + END wd_in[19] + PIN wd_in[20] + DIRECTION INPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 30.480 0.024 30.504 ; + END + END wd_in[20] + PIN wd_in[21] + DIRECTION INPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 31.056 0.024 31.080 ; + END + END wd_in[21] + PIN wd_in[22] + DIRECTION INPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 31.632 0.024 31.656 ; + END + END wd_in[22] + PIN wd_in[23] + DIRECTION INPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 32.208 0.024 32.232 ; + END + END wd_in[23] + PIN wd_in[24] + DIRECTION INPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 32.784 0.024 32.808 ; + END + END wd_in[24] + PIN wd_in[25] + DIRECTION INPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 33.360 0.024 33.384 ; + END + END wd_in[25] + PIN wd_in[26] + DIRECTION INPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 33.936 0.024 33.960 ; + END + END wd_in[26] + PIN wd_in[27] + DIRECTION INPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 34.512 0.024 34.536 ; + END + END wd_in[27] + PIN wd_in[28] + DIRECTION INPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 35.088 0.024 35.112 ; + END + END wd_in[28] + PIN wd_in[29] + DIRECTION INPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 35.664 0.024 35.688 ; + END + END wd_in[29] + PIN wd_in[30] + DIRECTION INPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 36.240 0.024 36.264 ; + END + END wd_in[30] + PIN wd_in[31] + DIRECTION INPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 36.816 0.024 36.840 ; + END + END wd_in[31] + PIN addr_in[0] + DIRECTION INPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 37.872 0.024 37.896 ; + END + END addr_in[0] + PIN addr_in[1] + DIRECTION INPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 38.448 0.024 38.472 ; + END + END addr_in[1] + PIN addr_in[2] + DIRECTION INPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 39.024 0.024 39.048 ; + END + END addr_in[2] + PIN addr_in[3] + DIRECTION INPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 39.600 0.024 39.624 ; + END + END addr_in[3] + PIN addr_in[4] + DIRECTION INPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 40.176 0.024 40.200 ; + END + END addr_in[4] + PIN addr_in[5] + DIRECTION INPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 40.752 0.024 40.776 ; + END + END addr_in[5] + PIN addr_in[6] + DIRECTION INPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 41.328 0.024 41.352 ; + END + END addr_in[6] + PIN addr_in[7] + DIRECTION INPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 41.904 0.024 41.928 ; + END + END addr_in[7] + PIN we_in + DIRECTION INPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 42.960 0.024 42.984 ; + END + END we_in + PIN ce_in + DIRECTION INPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 43.536 0.024 43.560 ; + END + END ce_in + PIN clk + DIRECTION INPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; + PORT + LAYER M4 ; + RECT 0.000 44.112 0.024 44.136 ; + END + END clk + PIN VSS + DIRECTION INOUT ; + USE GROUND ; + PORT + LAYER M4 ; + RECT 0.048 0.000 8.312 0.096 ; + RECT 0.048 0.768 8.312 0.864 ; + RECT 0.048 1.536 8.312 1.632 ; + RECT 0.048 2.304 8.312 2.400 ; + RECT 0.048 3.072 8.312 3.168 ; + RECT 0.048 3.840 8.312 3.936 ; + RECT 0.048 4.608 8.312 4.704 ; + RECT 0.048 5.376 8.312 5.472 ; + RECT 0.048 6.144 8.312 6.240 ; + RECT 0.048 6.912 8.312 7.008 ; + RECT 0.048 7.680 8.312 7.776 ; + RECT 0.048 8.448 8.312 8.544 ; + RECT 0.048 9.216 8.312 9.312 ; + RECT 0.048 9.984 8.312 10.080 ; + RECT 0.048 10.752 8.312 10.848 ; + RECT 0.048 11.520 8.312 11.616 ; + RECT 0.048 12.288 8.312 12.384 ; + RECT 0.048 13.056 8.312 13.152 ; + RECT 0.048 13.824 8.312 13.920 ; + RECT 0.048 14.592 8.312 14.688 ; + RECT 0.048 15.360 8.312 15.456 ; + RECT 0.048 16.128 8.312 16.224 ; + RECT 0.048 16.896 8.312 16.992 ; + RECT 0.048 17.664 8.312 17.760 ; + RECT 0.048 18.432 8.312 18.528 ; + RECT 0.048 19.200 8.312 19.296 ; + RECT 0.048 19.968 8.312 20.064 ; + RECT 0.048 20.736 8.312 20.832 ; + RECT 0.048 21.504 8.312 21.600 ; + RECT 0.048 22.272 8.312 22.368 ; + RECT 0.048 23.040 8.312 23.136 ; + RECT 0.048 23.808 8.312 23.904 ; + RECT 0.048 24.576 8.312 24.672 ; + RECT 0.048 25.344 8.312 25.440 ; + RECT 0.048 26.112 8.312 26.208 ; + RECT 0.048 26.880 8.312 26.976 ; + RECT 0.048 27.648 8.312 27.744 ; + RECT 0.048 28.416 8.312 28.512 ; + RECT 0.048 29.184 8.312 29.280 ; + RECT 0.048 29.952 8.312 30.048 ; + RECT 0.048 30.720 8.312 30.816 ; + RECT 0.048 31.488 8.312 31.584 ; + RECT 0.048 32.256 8.312 32.352 ; + RECT 0.048 33.024 8.312 33.120 ; + RECT 0.048 33.792 8.312 33.888 ; + RECT 0.048 34.560 8.312 34.656 ; + RECT 0.048 35.328 8.312 35.424 ; + RECT 0.048 36.096 8.312 36.192 ; + RECT 0.048 36.864 8.312 36.960 ; + RECT 0.048 37.632 8.312 37.728 ; + RECT 0.048 38.400 8.312 38.496 ; + RECT 0.048 39.168 8.312 39.264 ; + RECT 0.048 39.936 8.312 40.032 ; + RECT 0.048 40.704 8.312 40.800 ; + RECT 0.048 41.472 8.312 41.568 ; + RECT 0.048 42.240 8.312 42.336 ; + RECT 0.048 43.008 8.312 43.104 ; + RECT 0.048 43.776 8.312 43.872 ; + RECT 0.048 44.544 8.312 44.640 ; + END + END VSS + PIN VDD + DIRECTION INOUT ; + USE POWER ; + PORT + LAYER M4 ; + RECT 0.048 0.384 8.312 0.480 ; + RECT 0.048 1.152 8.312 1.248 ; + RECT 0.048 1.920 8.312 2.016 ; + RECT 0.048 2.688 8.312 2.784 ; + RECT 0.048 3.456 8.312 3.552 ; + RECT 0.048 4.224 8.312 4.320 ; + RECT 0.048 4.992 8.312 5.088 ; + RECT 0.048 5.760 8.312 5.856 ; + RECT 0.048 6.528 8.312 6.624 ; + RECT 0.048 7.296 8.312 7.392 ; + RECT 0.048 8.064 8.312 8.160 ; + RECT 0.048 8.832 8.312 8.928 ; + RECT 0.048 9.600 8.312 9.696 ; + RECT 0.048 10.368 8.312 10.464 ; + RECT 0.048 11.136 8.312 11.232 ; + RECT 0.048 11.904 8.312 12.000 ; + RECT 0.048 12.672 8.312 12.768 ; + RECT 0.048 13.440 8.312 13.536 ; + RECT 0.048 14.208 8.312 14.304 ; + RECT 0.048 14.976 8.312 15.072 ; + RECT 0.048 15.744 8.312 15.840 ; + RECT 0.048 16.512 8.312 16.608 ; + RECT 0.048 17.280 8.312 17.376 ; + RECT 0.048 18.048 8.312 18.144 ; + RECT 0.048 18.816 8.312 18.912 ; + RECT 0.048 19.584 8.312 19.680 ; + RECT 0.048 20.352 8.312 20.448 ; + RECT 0.048 21.120 8.312 21.216 ; + RECT 0.048 21.888 8.312 21.984 ; + RECT 0.048 22.656 8.312 22.752 ; + RECT 0.048 23.424 8.312 23.520 ; + RECT 0.048 24.192 8.312 24.288 ; + RECT 0.048 24.960 8.312 25.056 ; + RECT 0.048 25.728 8.312 25.824 ; + RECT 0.048 26.496 8.312 26.592 ; + RECT 0.048 27.264 8.312 27.360 ; + RECT 0.048 28.032 8.312 28.128 ; + RECT 0.048 28.800 8.312 28.896 ; + RECT 0.048 29.568 8.312 29.664 ; + RECT 0.048 30.336 8.312 30.432 ; + RECT 0.048 31.104 8.312 31.200 ; + RECT 0.048 31.872 8.312 31.968 ; + RECT 0.048 32.640 8.312 32.736 ; + RECT 0.048 33.408 8.312 33.504 ; + RECT 0.048 34.176 8.312 34.272 ; + RECT 0.048 34.944 8.312 35.040 ; + RECT 0.048 35.712 8.312 35.808 ; + RECT 0.048 36.480 8.312 36.576 ; + RECT 0.048 37.248 8.312 37.344 ; + RECT 0.048 38.016 8.312 38.112 ; + RECT 0.048 38.784 8.312 38.880 ; + RECT 0.048 39.552 8.312 39.648 ; + RECT 0.048 40.320 8.312 40.416 ; + RECT 0.048 41.088 8.312 41.184 ; + RECT 0.048 41.856 8.312 41.952 ; + RECT 0.048 42.624 8.312 42.720 ; + RECT 0.048 43.392 8.312 43.488 ; + RECT 0.048 44.160 8.312 44.256 ; + END + END VDD + OBS + LAYER M1 ; + RECT 0 0 8.360 44.800 ; + LAYER M2 ; + RECT 0 0 8.360 44.800 ; + LAYER M3 ; + RECT 0 0 8.360 44.800 ; + LAYER M4 ; + RECT 0 0 8.360 44.800 ; + END +END spsram_256x32_h + +END LIBRARY +module spsram_256x32_h +( + rd_out, + addr_in, + we_in, + wd_in, + clk, + ce_in +); + parameter BITS = 32; + parameter WORD_DEPTH = 256; + parameter ADDR_WIDTH = 8; + parameter corrupt_mem_on_X_p = 1; + + output reg [BITS-1:0] rd_out; + input [ADDR_WIDTH-1:0] addr_in; + input we_in; + input [BITS-1:0] wd_in; + input clk; + input ce_in; + + reg [BITS-1:0] mem [0:WORD_DEPTH-1]; + + integer j; + + always @(posedge clk) + begin + if (ce_in) + begin + //if ((we_in !== 1'b1 && we_in !== 1'b0) && corrupt_mem_on_X_p) + if (corrupt_mem_on_X_p && + ((^we_in === 1'bx) || (^addr_in === 1'bx)) + ) + begin + // WEN or ADDR is unknown, so corrupt entire array (using unsynthesizeable for loop) + for (j = 0; j < WORD_DEPTH; j = j + 1) + mem[j] <= 'x; + $display("warning: ce_in=1, we_in is %b, addr_in = %x in spsram_256x32_h", we_in, addr_in); + end + else if (we_in) + begin + mem[addr_in] <= (wd_in) | (mem[addr_in]); + end + // read + rd_out <= mem[addr_in]; + end + else + begin + // Make sure read fails if ce_in is low + rd_out <= 'x; + end + end + + // Timing check placeholders (will be replaced during SDF back-annotation) + reg notifier; + specify + // Delay from clk to rd_out + (posedge clk *> rd_out) = (0, 0); + + // Timing checks + $width (posedge clk, 0, 0, notifier); + $width (negedge clk, 0, 0, notifier); + $period (posedge clk, 0, notifier); + $setuphold (posedge clk, we_in, 0, 0, notifier); + $setuphold (posedge clk, ce_in, 0, 0, notifier); + $setuphold (posedge clk, addr_in, 0, 0, notifier); + $setuphold (posedge clk, wd_in, 0, 0, notifier); + endspecify + +endmodule +(* blackbox *) +module spsram_256x32_h ( + output reg [31:0] rd_out, + input [7:0] addr_in, + input we_in, + input [31:0] wd_in, + input clk, + input ce_in +); +endmodule +library(spsram_256x32_h) { + technology (cmos); + delay_model : table_lookup; + revision : 1.0; + comment : "SRAM"; + time_unit : "1ns"; + voltage_unit : "1V"; + current_unit : "1uA"; + leakage_power_unit : "1uW"; + nom_process : 1; + nom_temperature : 25.000; + nom_voltage : 0.7; + capacitive_load_unit (1,pf); + + pulling_resistance_unit : "1kohm"; + + operating_conditions(tt_1.0_25.0) { + process : 1; + temperature : 25.000; + voltage : 0.7; + tree_type : balanced_tree; + } + + /* default attributes */ + default_cell_leakage_power : 0; + default_fanout_load : 1; + default_inout_pin_cap : 0.0; + default_input_pin_cap : 0.0; + default_output_pin_cap : 0.0; + default_input_pin_cap : 0.0; + default_max_transition : 0.227; + + default_operating_conditions : tt_1.0_25.0; + default_leakage_power_density : 0.0; + + /* additional header data */ + slew_derate_from_library : 1.000; + slew_lower_threshold_pct_fall : 20.000; + slew_upper_threshold_pct_fall : 80.000; + slew_lower_threshold_pct_rise : 20.000; + slew_upper_threshold_pct_rise : 80.000; + input_threshold_pct_fall : 50.000; + input_threshold_pct_rise : 50.000; + output_threshold_pct_fall : 50.000; + output_threshold_pct_rise : 50.000; + + + lu_table_template(spsram_256x32_h_mem_out_delay_template) { + variable_1 : input_net_transition; + variable_2 : total_output_net_capacitance; + index_1 ("1000, 1001"); + index_2 ("1000, 1001"); + } + lu_table_template(spsram_256x32_h_mem_out_slew_template) { + variable_1 : total_output_net_capacitance; + index_1 ("1000, 1001"); + } + lu_table_template(spsram_256x32_h_constraint_template) { + variable_1 : related_pin_transition; + variable_2 : constrained_pin_transition; + index_1 ("1000, 1001"); + index_2 ("1000, 1001"); + } + power_lut_template(spsram_256x32_h_energy_template_clkslew) { + variable_1 : input_transition_time; + index_1 ("1000, 1001"); + } + power_lut_template(spsram_256x32_h_energy_template_sigslew) { + variable_1 : input_transition_time; + index_1 ("1000, 1001"); + } + library_features(report_delay_calculation); + type (spsram_256x32_h_DATA) { + base_type : array ; + data_type : bit ; + bit_width : 32; + bit_from : 31; + bit_to : 0 ; + downto : true ; + } + type (spsram_256x32_h_ADDRESS) { + base_type : array ; + data_type : bit ; + bit_width : 8; + bit_from : 7; + bit_to : 0 ; + downto : true ; + } +cell(spsram_256x32_h) { + area : 368.869; + interface_timing : true; + memory() { + type : ram; + address_width : 8; + word_width : 32; + } + pin(clk) { + direction : input; + capacitance : 0.025; + clock : true; + min_period : 0.157 ; + internal_power(){ + rise_power(spsram_256x32_h_energy_template_clkslew) { + index_1 ("0.009, 0.227"); + values ("1.345, 1.345") + } + fall_power(spsram_256x32_h_energy_template_clkslew) { + index_1 ("0.009, 0.227"); + values ("1.345, 1.345") + } + } + } + + bus(rd_out) { + bus_type : spsram_256x32_h_DATA; + direction : output; + max_capacitance : 0.500; + memory_read() { + address : addr_in; + } + timing() { + related_pin : "clk" ; + timing_type : rising_edge; + timing_sense : non_unate; + cell_rise(spsram_256x32_h_mem_out_delay_template) { + index_1 ("0.009, 0.227"); + index_2 ("0.005, 0.500"); + values ( \ + "0.218, 0.218", \ + "0.218, 0.218" \ + ) + } + cell_fall(spsram_256x32_h_mem_out_delay_template) { + index_1 ("0.009, 0.227"); + index_2 ("0.005, 0.500"); + values ( \ + "0.218, 0.218", \ + "0.218, 0.218" \ + ) + } + rise_transition(spsram_256x32_h_mem_out_slew_template) { + index_1 ("0.005, 0.500"); + values ("0.009, 0.227") + } + fall_transition(spsram_256x32_h_mem_out_slew_template) { + index_1 ("0.005, 0.500"); + values ("0.009, 0.227") + } + } + } + pin(we_in){ + direction : input; + capacitance : 0.005; + timing() { + related_pin : clk; + timing_type : setup_rising ; + rise_constraint(spsram_256x32_h_constraint_template) { + index_1 ("0.009, 0.227"); + index_2 ("0.009, 0.227"); + values ( \ + "0.050, 0.050", \ + "0.050, 0.050" \ + ) + } + fall_constraint(spsram_256x32_h_constraint_template) { + index_1 ("0.009, 0.227"); + index_2 ("0.009, 0.227"); + values ( \ + "0.050, 0.050", \ + "0.050, 0.050" \ + ) + } + } + timing() { + related_pin : clk; + timing_type : hold_rising ; + rise_constraint(spsram_256x32_h_constraint_template) { + index_1 ("0.009, 0.227"); + index_2 ("0.009, 0.227"); + values ( \ + "0.050, 0.050", \ + "0.050, 0.050" \ + ) + } + fall_constraint(spsram_256x32_h_constraint_template) { + index_1 ("0.009, 0.227"); + index_2 ("0.009, 0.227"); + values ( \ + "0.050, 0.050", \ + "0.050, 0.050" \ + ) + } + } + internal_power(){ + rise_power(spsram_256x32_h_energy_template_sigslew) { + index_1 ("0.009, 0.227"); + values ("0.013, 0.013") + } + fall_power(spsram_256x32_h_energy_template_sigslew) { + index_1 ("0.009, 0.227"); + values ("0.013, 0.013") + } + } + } + pin(ce_in){ + direction : input; + capacitance : 0.005; + timing() { + related_pin : clk; + timing_type : setup_rising ; + rise_constraint(spsram_256x32_h_constraint_template) { + index_1 ("0.009, 0.227"); + index_2 ("0.009, 0.227"); + values ( \ + "0.050, 0.050", \ + "0.050, 0.050" \ + ) + } + fall_constraint(spsram_256x32_h_constraint_template) { + index_1 ("0.009, 0.227"); + index_2 ("0.009, 0.227"); + values ( \ + "0.050, 0.050", \ + "0.050, 0.050" \ + ) + } + } + timing() { + related_pin : clk; + timing_type : hold_rising ; + rise_constraint(spsram_256x32_h_constraint_template) { + index_1 ("0.009, 0.227"); + index_2 ("0.009, 0.227"); + values ( \ + "0.050, 0.050", \ + "0.050, 0.050" \ + ) + } + fall_constraint(spsram_256x32_h_constraint_template) { + index_1 ("0.009, 0.227"); + index_2 ("0.009, 0.227"); + values ( \ + "0.050, 0.050", \ + "0.050, 0.050" \ + ) + } + } + internal_power(){ + rise_power(spsram_256x32_h_energy_template_sigslew) { + index_1 ("0.009, 0.227"); + values ("0.013, 0.013") + } + fall_power(spsram_256x32_h_energy_template_sigslew) { + index_1 ("0.009, 0.227"); + values ("0.013, 0.013") + } + } + } + bus(addr_in) { + bus_type : spsram_256x32_h_ADDRESS; + direction : input; + capacitance : 0.005; + timing() { + related_pin : clk; + timing_type : setup_rising ; + rise_constraint(spsram_256x32_h_constraint_template) { + index_1 ("0.009, 0.227"); + index_2 ("0.009, 0.227"); + values ( \ + "0.050, 0.050", \ + "0.050, 0.050" \ + ) + } + fall_constraint(spsram_256x32_h_constraint_template) { + index_1 ("0.009, 0.227"); + index_2 ("0.009, 0.227"); + values ( \ + "0.050, 0.050", \ + "0.050, 0.050" \ + ) + } + } + timing() { + related_pin : clk; + timing_type : hold_rising ; + rise_constraint(spsram_256x32_h_constraint_template) { + index_1 ("0.009, 0.227"); + index_2 ("0.009, 0.227"); + values ( \ + "0.050, 0.050", \ + "0.050, 0.050" \ + ) + } + fall_constraint(spsram_256x32_h_constraint_template) { + index_1 ("0.009, 0.227"); + index_2 ("0.009, 0.227"); + values ( \ + "0.050, 0.050", \ + "0.050, 0.050" \ + ) + } + } + internal_power(){ + rise_power(spsram_256x32_h_energy_template_sigslew) { + index_1 ("0.009, 0.227"); + values ("0.013, 0.013") + } + fall_power(spsram_256x32_h_energy_template_sigslew) { + index_1 ("0.009, 0.227"); + values ("0.013, 0.013") + } + } + } + bus(wd_in) { + bus_type : spsram_256x32_h_DATA; + memory_write() { + address : addr_in; + clocked_on : "clk"; + } + direction : input; + capacitance : 0.005; + timing() { + related_pin : clk; + timing_type : setup_rising ; + rise_constraint(spsram_256x32_h_constraint_template) { + index_1 ("0.009, 0.227"); + index_2 ("0.009, 0.227"); + values ( \ + "0.050, 0.050", \ + "0.050, 0.050" \ + ) + } + fall_constraint(spsram_256x32_h_constraint_template) { + index_1 ("0.009, 0.227"); + index_2 ("0.009, 0.227"); + values ( \ + "0.050, 0.050", \ + "0.050, 0.050" \ + ) + } + } + timing() { + related_pin : clk; + timing_type : hold_rising ; + rise_constraint(spsram_256x32_h_constraint_template) { + index_1 ("0.009, 0.227"); + index_2 ("0.009, 0.227"); + values ( \ + "0.050, 0.050", \ + "0.050, 0.050" \ + ) + } + fall_constraint(spsram_256x32_h_constraint_template) { + index_1 ("0.009, 0.227"); + index_2 ("0.009, 0.227"); + values ( \ + "0.050, 0.050", \ + "0.050, 0.050" \ + ) + } + } + internal_power(){ + when : "(! (we_in) )"; + rise_power(spsram_256x32_h_energy_template_sigslew) { + index_1 ("0.009, 0.227"); + values ("0.013, 0.013") + } + fall_power(spsram_256x32_h_energy_template_sigslew) { + index_1 ("0.009, 0.227"); + values ("0.013, 0.013") + } + } + internal_power(){ + when : "(we_in)"; + rise_power(spsram_256x32_h_energy_template_sigslew) { + index_1 ("0.009, 0.227"); + values ("0.013, 0.013") + } + fall_power(spsram_256x32_h_energy_template_sigslew) { + index_1 ("0.009, 0.227"); + values ("0.013, 0.013") + } + } + } + cell_leakage_power : 128.900; +} + +} diff --git a/test/cfg/dprf_example.cfg b/test/cfg/dprf_example.cfg index 098bcc5..f970306 100644 --- a/test/cfg/dprf_example.cfg +++ b/test/cfg/dprf_example.cfg @@ -43,6 +43,8 @@ # List of SRAM configurations (name width depth and banks) "srams": [ {"name": "dprf_256x32", "width": 32, "depth": 256, "banks": 2}, + {"name": "dprf_256x32_h", "width": 32, "depth": 256, "banks": 2, + "additional_height": 5}, {"name": "dprf_256x256", "width": 256, "depth": 256, "banks": 1} ] } diff --git a/test/cfg/dpsram_example.cfg b/test/cfg/dpsram_example.cfg index c83ab2d..2abf52c 100644 --- a/test/cfg/dpsram_example.cfg +++ b/test/cfg/dpsram_example.cfg @@ -43,6 +43,8 @@ # List of SRAM configurations (name width depth and banks) "srams": [ {"name": "dpsram_256x32", "width": 32, "depth": 256, "banks": 2}, + {"name": "dpsram_256x32_h", "width": 32, "depth": 256, "banks": 2, + "additional_height": 7}, {"name": "dpsram_256x256", "width": 256, "depth": 256, "banks": 1} ] } diff --git a/test/cfg/sprf_example.cfg b/test/cfg/sprf_example.cfg index 5f20eff..590b71a 100644 --- a/test/cfg/sprf_example.cfg +++ b/test/cfg/sprf_example.cfg @@ -43,6 +43,8 @@ # List of SRAM configurations (name width depth and banks) "srams": [ {"name": "sprf_256x32", "width": 32, "depth": 256, "banks": 2}, + {"name": "sprf_256x32_h", "width": 32, "depth": 256, "banks": 2, + "additional_height": 20}, {"name": "sprf_256x256", "width": 256, "depth": 256, "banks": 1} ] } diff --git a/test/cfg/spsram_example.cfg b/test/cfg/spsram_example.cfg index 995fbc9..cebf18e 100644 --- a/test/cfg/spsram_example.cfg +++ b/test/cfg/spsram_example.cfg @@ -43,6 +43,8 @@ # List of SRAM configurations (name width depth and banks) "srams": [ {"name": "spsram_256x32", "width": 32, "depth": 256, "banks": 2}, + {"name": "spsram_256x32_h", "width": 32, "depth": 256, "banks": 2, + "additional_height": 3}, {"name": "spsram_256x256", "width": 256, "depth": 256, "banks": 1} ] } diff --git a/test/dprf_flow_test.py b/test/dprf_flow_test.py index f76e54b..f13ed01 100755 --- a/test/dprf_flow_test.py +++ b/test/dprf_flow_test.py @@ -22,6 +22,7 @@ def test_example_input(self): expected_ram_list = [ "dprf_256x256", "dprf_256x32", + "dprf_256x32_h", ] self._execute_run(self._tag, expected_ram_list) diff --git a/test/dpsram_flow_test.py b/test/dpsram_flow_test.py index b557dc1..3364ce5 100755 --- a/test/dpsram_flow_test.py +++ b/test/dpsram_flow_test.py @@ -22,6 +22,7 @@ def test_example_input(self): expected_ram_list = [ "dpsram_256x256", "dpsram_256x32", + "dpsram_256x32_h", ] self._execute_run(self._tag, expected_ram_list) diff --git a/test/factory_base_test.py b/test/factory_base_test.py index 5f262a5..ce3a3b1 100755 --- a/test/factory_base_test.py +++ b/test/factory_base_test.py @@ -6,12 +6,13 @@ sys.path.append(os.path.abspath(os.path.join(os.path.dirname(__file__), "..", "utils"))) from factory_base import FactoryBase +from memory_config import MemoryConfig class DPRAM: """Test class for DPRAM""" - def __init__(self, name, width_in_bits, depth, num_banks, process, timing_data): + def __init__(self, mem_config, process, timing_data): pass def get_type(self): @@ -21,7 +22,7 @@ def get_type(self): class SPRAM: """Test class for SPRAM""" - def __init__(self, name, width_in_bits, depth, num_banks, process, timing_data): + def __init__(self, mem_config, process, timing_data): pass def get_type(self): @@ -41,21 +42,18 @@ def test_basic(self): width = 32 depth = 256 banks = 2 - dpram = FactoryBase.create( - "dpram", width, depth, banks, "RAM", "DP", None, None - ) + mem_config = MemoryConfig("dpram", width, depth, banks, 0) + dpram = FactoryBase.create(mem_config, "RAM", "DP", None, None) self.assertIsNotNone(dpram) self.assertEqual(dpram.get_type(), "DPRAM") - spram = FactoryBase.create( - "spram", width, depth, banks, "RAM", "SP", None, None - ) + mem_config.set_name("spram") + spram = FactoryBase.create(mem_config, "RAM", "SP", None, None) self.assertIsNotNone(spram) self.assertEqual(spram.get_type(), "SPRAM") # SP RF is not registered, so raise exception with self.assertRaises(Exception): - sprf = FactoryBase.create( - "sprf", width, depth, banks, "RF", "SP", None, None - ) + mem_config.set_name("sprf") + sprf = FactoryBase.create(mem_config, "RF", "SP", None, None) if __name__ == "__main__": diff --git a/test/lef_exporter_test.py b/test/lef_exporter_test.py new file mode 100755 index 0000000..9e87818 --- /dev/null +++ b/test/lef_exporter_test.py @@ -0,0 +1,184 @@ +#!/usr/bin/env python3 + +import io +import os +import re +import sys +import unittest + +sys.path.append(os.path.abspath(os.path.join(os.path.dirname(__file__), "..", "utils"))) +from lef_exporter import LefExporter +from class_process import Process +from timing_data import TimingData +from memory_config import MemoryConfig +from memory_factory import MemoryFactory +from test_utils import TestUtils + + +class LefExporterTest(unittest.TestCase): + """Tests specific cases for the LEF exporter""" + + def setUp(self): + """Define a bunch of variables used later in the tests""" + + self._process = Process(TestUtils.get_base_process_data()) + self._timing_data = TimingData() + self._rect_re = re.compile("^\s*RECT\s+(\S+)\s+(\S+)\s+(\S+)\s+(\S+)\s+\;") + self._start_y = 0.48 + self._start_pitch = 0.0 + self._threshold = 0.001 + self._mem_width = 100 + self._mem_height = 200 + self._x_offset = 0.25 + self._y_offset = 10 + self._y_step = 99 + self._supply_pin_width = self._process.get_pin_width_um() * 4 + self._supply_pin_half_width = self._supply_pin_width / 2 + self._supply_pin_pitch = self._process.get_pin_width_um() * 8 + + def _get_rect_list(self, out_strm): + """Extracts and returns the list of rectangles in the output stream""" + + out_strm.seek(0) + rect_list = [] + for line in out_strm: + result = self._rect_re.match(line) + if result: + rect = [ + float(result.group(1)), + float(result.group(2)), + float(result.group(3)), + float(result.group(4)), + ] + rect_list.append(rect) + return rect_list + + def _check_pin(self, rect, exp_width, exp_height, start_x, start_y): + """ + Checks that the signal pin meets width, height and start location + expectations + """ + + pin_width = rect[2] - rect[0] + pin_height = rect[3] - rect[1] + self.assertAlmostEqual(pin_width, exp_width, delta=self._threshold) + self.assertAlmostEqual(pin_height, exp_height, delta=self._threshold) + self.assertAlmostEqual(rect[0], start_x, delta=self._threshold) + self.assertAlmostEqual(rect[1], start_y, delta=self._threshold) + + def _check_pg_pin(self, rect_list, exp_width, exp_height): + """Checks that the pg pins meet width and height expectations""" + + for rect in rect_list: + pin_width = rect[2] - rect[0] + pin_height = rect[3] - rect[1] + self.assertAlmostEqual(pin_width, exp_width, delta=self._threshold) + self.assertAlmostEqual(pin_height, exp_height, delta=self._threshold) + + def test_normal_pin_mode(self): + """ + Tests normal pin mode + + signal pins should be square (pin_width x pin_width as defined in the + process object. + + pg pins should be the width of the memory (minus two x_offsets) x + 8 * pin_widths high + """ + + mem_config = MemoryConfig("test", 32, 256, 1, 0) + mem = MemoryFactory.create( + mem_config, "RAM", "SP", self._process, self._timing_data + ) + exporter = LefExporter(mem) + self.assertEqual(exporter._rect_pin_mode, False) + out_strm = io.StringIO() + + # Test the pin first. Should be pin_width x pin_width + pitch = exporter.add_pin(out_strm, "A", True, self._start_y, self._start_pitch) + self.assertEqual(pitch, self._start_pitch + self._start_y) + rect_list = self._get_rect_list(out_strm) + self.assertEqual(len(rect_list), 1) + exp_width = self._process.get_pin_width_um() + self._check_pin( + rect_list[0], exp_width, exp_width, 0.0, self._start_y - (exp_width / 2.0) + ) + + # Test the pg pin + out_strm.seek(0) + out_strm.truncate(0) + exporter.create_pg_pin( + out_strm, + "VSS", + "GROUND", + self._process.get_metal_layer(), + self._mem_width, + self._mem_height, + self._y_step, + self._x_offset, + self._y_offset, + self._supply_pin_half_width, + self._supply_pin_pitch, + ) + rect_list = self._get_rect_list(out_strm) + self._check_pg_pin( + rect_list, self._mem_width - 2 * self._x_offset, self._supply_pin_width + ) + + def test_rect_pin_mode(self): + """ + Tests rect pin mode + + signal pins should be rectangular and longer in the X direction + (1.5 * pin_width x pin_width as defined in the process object. + + pg pins should be the width of the memory (minus four x_offsets) x + 8 * pin_widths high + """ + + mem_config = MemoryConfig("test", 28, 64, 4, 0) + mem = MemoryFactory.create( + mem_config, "RAM", "SP", self._process, self._timing_data + ) + exporter = LefExporter(mem) + self.assertEqual(exporter._rect_pin_mode, True) + out_strm = io.StringIO() + + # Test the pin first. Should be pin_width * 1.5 x pin_width + pitch = exporter.add_pin(out_strm, "A", True, self._start_y, self._start_pitch) + self.assertEqual(pitch, self._start_pitch + self._start_y) + rect_list = self._get_rect_list(out_strm) + self.assertEqual(len(rect_list), 1) + exp_width = self._process.get_pin_width_um() + self._check_pin( + rect_list[0], + exp_width * 1.5, + exp_width, + 0.0, + self._start_y - (exp_width / 2.0), + ) + + # Test the pg pin + out_strm.seek(0) + out_strm.truncate(0) + exporter.create_pg_pin( + out_strm, + "VSS", + "GROUND", + self._process.get_metal_layer(), + self._mem_width, + self._mem_height, + self._y_step, + self._x_offset, + self._y_offset, + self._supply_pin_half_width, + self._supply_pin_pitch, + ) + rect_list = self._get_rect_list(out_strm) + self._check_pg_pin( + rect_list, self._mem_width - 4 * self._x_offset, self._supply_pin_width + ) + + +if __name__ == "__main__": + unittest.main() diff --git a/test/macro_dim_test.py b/test/macro_dim_test.py index f3c04bb..f988c62 100755 --- a/test/macro_dim_test.py +++ b/test/macro_dim_test.py @@ -35,7 +35,7 @@ def test_macro_dim(self): "banks": num_banks, } (width, height) = self._process.get_macro_dimensions( - sram_data["width"], sram_data["depth"], sram_data["banks"] + sram_data["width"], sram_data["depth"], sram_data["banks"], 0 ) exp_height = base_height / num_banks exp_width = base_width * num_banks @@ -43,6 +43,34 @@ def test_macro_dim(self): self.assertAlmostEqual(height, exp_height, delta=self._delta) self.assertAlmostEqual(width, exp_width, delta=self._delta) + def test_macro_dim_add_height(self): + """ + Tests basic macro dimension calculation based on three bank + configurations + """ + + banks = [1, 2, 4] + base_height = 663.552 + base_width = 5.054 + for num_banks in banks: + sram_data = { + "width": 39, + "depth": 2048, + "banks": num_banks, + "additional_height": 10, + } + (width, height) = self._process.get_macro_dimensions( + sram_data["width"], + sram_data["depth"], + sram_data["banks"], + sram_data["additional_height"], + ) + exp_height = (base_height / num_banks) + sram_data["additional_height"] + exp_width = base_width * num_banks + self.assertFalse(self._process.has_defined_bitcell_size()) + self.assertAlmostEqual(height, exp_height, delta=self._delta) + self.assertAlmostEqual(width, exp_width, delta=self._delta) + def test_macro_dim_invalid_banks(self): """Tests detection that an invalid bank value was given""" @@ -53,7 +81,7 @@ def test_macro_dim_invalid_banks(self): } with self.assertRaises(Exception): (width, height) = self._process.get_macro_dimensions( - sram_data["width"], sram_data["depth"], sram_data["banks"] + sram_data["width"], sram_data["depth"], sram_data["banks"], 0 ) def test_macro_dim_bitcell_override(self): @@ -72,7 +100,7 @@ def test_macro_dim_bitcell_override(self): exp_width = 4723.2 exp_height = 140083.2 (width, height) = process.get_macro_dimensions( - sram_data["width"], sram_data["depth"], sram_data["banks"] + sram_data["width"], sram_data["depth"], sram_data["banks"], 0 ) self.assertTrue(process.has_defined_bitcell_size()) (bitcell_width, bitcell_height) = process.get_bitcell_dimensions() diff --git a/test/memory_config_test.py b/test/memory_config_test.py new file mode 100755 index 0000000..1a22065 --- /dev/null +++ b/test/memory_config_test.py @@ -0,0 +1,71 @@ +#!/usr/bin/env python3 + +#!/usr/bin/env python3 + +import os +import sys +import math +import unittest + +sys.path.append(os.path.abspath(os.path.join(os.path.dirname(__file__), "..", "utils"))) +from memory_config import MemoryConfig + + +class MemoryConfigTest(unittest.TestCase): + """Unit test for MemoryConfig class""" + + def setUp(self): + """Sets up base_data with example config data""" + pass + + def test_basic(self): + """Tests memory config field defaults""" + + name = "xyz" + width = 32 + depth = 128 + num_banks = 1 + additional_height = 10 + mem_config = MemoryConfig(name, width, depth, num_banks, additional_height) + self.assertEqual(mem_config.get_name(), name) + self.assertEqual(mem_config.get_width_in_bits(), width) + self.assertEqual(mem_config.get_depth(), depth) + self.assertEqual(mem_config.get_num_banks(), num_banks) + self.assertEqual(mem_config.get_additional_height(), additional_height) + + def test_from_json(self): + """Tests memoryconfig field from json with additional_height""" + json_data = { + "name": "abc", + "width": 25, + "depth": 99, + "banks": 2, + "additional_height": 33, + } + mem_config = MemoryConfig.from_json(json_data) + self.assertEqual(mem_config.get_name(), json_data["name"]) + self.assertEqual(mem_config.get_width_in_bits(), json_data["width"]) + self.assertEqual(mem_config.get_depth(), json_data["depth"]) + self.assertEqual(mem_config.get_num_banks(), json_data["banks"]) + self.assertEqual( + mem_config.get_additional_height(), json_data["additional_height"] + ) + + def test_from_json_no_height(self): + """Tests memoryconfig field from json without additional_height""" + json_data = { + "name": "abc", + "width": 24, + "depth": 89, + "banks": 4, + } + mem_config = MemoryConfig.from_json(json_data) + self.assertEqual(mem_config.get_name(), json_data["name"]) + self.assertEqual(mem_config.get_width_in_bits(), json_data["width"]) + self.assertEqual(mem_config.get_depth(), json_data["depth"]) + self.assertEqual(mem_config.get_num_banks(), json_data["banks"]) + self.assertEqual(mem_config.get_additional_height(), 0) + + +if __name__ == "__main__": + unittest.main() diff --git a/test/memory_factory_test.py b/test/memory_factory_test.py index 8dfc59c..11f28f1 100755 --- a/test/memory_factory_test.py +++ b/test/memory_factory_test.py @@ -7,6 +7,7 @@ sys.path.append(os.path.abspath(os.path.join(os.path.dirname(__file__), "..", "utils"))) from class_process import Process from memory_factory import MemoryFactory +from memory_config import MemoryConfig from timing_data import TimingData from test_utils import TestUtils @@ -29,11 +30,9 @@ def test_basic(self): for memory_type in ["RAM", "RF"]: for port_config in ["SP", "DP"]: name = (f"{port_config}{memory_type}",) + mem_config = MemoryConfig(name, 32, 256, 1, 0) memory = MemoryFactory.create( - name, - 32, - 256, - 1, + mem_config, memory_type, port_config, self._process, @@ -42,8 +41,9 @@ def test_basic(self): self.assertIsNotNone(memory) self.assertEqual(memory.get_name(), name) with self.assertRaises(Exception): + bogus_config = MemoryConfig("bogus", 32, 256, 1, 0) memory = MemoryFactory.create( - bogus, 32, 256, 1, "unknown", "unknown", self._process, timing_data + bogus_config, "unknown", "unknown", self._process, timing_data ) diff --git a/test/memory_test.py b/test/memory_test.py index 1821c04..bea42cb 100755 --- a/test/memory_test.py +++ b/test/memory_test.py @@ -9,6 +9,7 @@ from class_memory import Memory from class_process import Process from memory_factory import MemoryFactory +from memory_config import MemoryConfig from timing_data import TimingData from test_utils import TestUtils @@ -35,11 +36,9 @@ def test_memory(self): """ timing_data = TimingData() + mem_config = MemoryConfig.from_json(self._sram_data) memory = MemoryFactory.create( - self._sram_data["name"], - self._sram_data["width"], - self._sram_data["depth"], - self._sram_data["banks"], + mem_config, "RAM", "SP", self._process, @@ -49,6 +48,7 @@ def test_memory(self): self.assertEqual(memory.get_width(), self._sram_data["width"]) self.assertEqual(memory.get_depth(), self._sram_data["depth"]) self.assertEqual(memory.get_num_banks(), self._sram_data["banks"]) + self.assertEqual(memory.get_additional_height(), 0) self.assertEqual( memory.get_width_in_bytes(), math.ceil(memory.get_width() / 8.0) ) diff --git a/test/physical_test.py b/test/physical_test.py index 2428098..efec953 100755 --- a/test/physical_test.py +++ b/test/physical_test.py @@ -14,6 +14,7 @@ class PhysicalDataTest(unittest.TestCase): def setUp(self): """Sets up base_data with example config data""" + self._threshold = 0.001 def test_empty_physical(self): """Tests physical field defaults""" @@ -27,7 +28,7 @@ def test_empty_physical(self): self.assertIsNone(physical.get_group_pitch()) def test_set_extents_and_snapping(self): - """Tests physical field defaults""" + """Tests physical field extents and snapping results""" physical = PhysicalData() width = 123.4 @@ -60,6 +61,27 @@ def test_set_extents_and_snapping(self): self.assertEqual(physical.get_height(True), snapped_height) self.assertEqual(physical.get_area(True), snapped_width * snapped_height) + def test_pin_pitches_exact(self): + """Tests get_pin_pitches the height exactly fits the available tracks""" + + num_pins = 521 + min_pin_pitch = 0.046 + y_offset = min_pin_pitch + # number of pins + offset at the top and bottom + height = round(min_pin_pitch * (num_pins + 2), 2) + print(height) + physical = PhysicalData() + + physical.set_extents(height, height) + physical.snap_to_grid(1, 1) + physical.set_pin_pitches("bogus", num_pins, min_pin_pitch, y_offset) + # just enough space, so pin pitch is the minimum pitch and there's no + # group pitch + self.assertAlmostEqual(physical.get_pin_pitch(), min_pin_pitch, delta=self._threshold) + self.assertAlmostEqual(physical.get_group_pitch(), 0, delta=self._threshold) + + + def test_pin_pitches_exception(self): """Tests get_pin_pitches when there's no enough room for the pins""" @@ -67,6 +89,7 @@ def test_pin_pitches_exception(self): min_pin_pitch = 0.048 y_offset = 0.048 height = 21.0 + height_that_fits = height + 5 physical = PhysicalData() # Can't set pin pitches before setting height @@ -76,9 +99,18 @@ def test_pin_pitches_exception(self): # Try again after setting height physical.set_extents(height, height) physical.snap_to_grid(1, 1) + # Not enough height to fit the pins 523 * 0.048 == 25.104 with self.assertRaises(Exception): physical.set_pin_pitches("bogus", num_pins, min_pin_pitch, y_offset) + # update height to something that fits + physical.set_extents(height, height_that_fits) + physical.snap_to_grid(1, 1) + physical.set_pin_pitches("bogus", num_pins, min_pin_pitch, y_offset) + # just enough space, so pin pitch is the minimum pitch + self.assertAlmostEqual(physical.get_pin_pitch(), min_pin_pitch, delta=self._threshold) + self.assertAlmostEqual(physical.get_group_pitch(), 0.24, delta=self._threshold) + if __name__ == "__main__": unittest.main() diff --git a/test/sprf_flow_test.py b/test/sprf_flow_test.py index 3e6357e..4c80cdc 100755 --- a/test/sprf_flow_test.py +++ b/test/sprf_flow_test.py @@ -22,6 +22,7 @@ def test_example_input(self): expected_ram_list = [ "sprf_256x256", "sprf_256x32", + "sprf_256x32_h", ] self._execute_run(self._tag, expected_ram_list) diff --git a/test/spsram_flow_test.py b/test/spsram_flow_test.py index 09f581d..2f13900 100755 --- a/test/spsram_flow_test.py +++ b/test/spsram_flow_test.py @@ -22,6 +22,7 @@ def test_example_input(self): expected_ram_list = [ "spsram_256x256", "spsram_256x32", + "spsram_256x32_h", ] self._execute_run(self._tag, expected_ram_list) diff --git a/test/sv_bbox_test.py b/test/sv_bbox_test.py index 4a52ed9..59386e5 100755 --- a/test/sv_bbox_test.py +++ b/test/sv_bbox_test.py @@ -9,6 +9,7 @@ sys.path.append(os.path.abspath(os.path.join(os.path.dirname(__file__), "..", "utils"))) from single_port_ram_verilog_exporter import SinglePortRAMVerilogExporter from memory_factory import MemoryFactory +from memory_config import MemoryConfig from class_process import Process from timing_data import TimingData from test_utils import TestUtils @@ -47,8 +48,9 @@ def _check_bus_msb(self, mem_name, bus_name, bus_msb_map, exp_msb): def _check_bbox(self, words, depth): name = f"fakeram_16_{depth}" + mem_config = MemoryConfig(name, words, depth, 4, 0) mem = MemoryFactory.create( - name, words, depth, 4, "RAM", "SP", self._process, self._timing_data + mem_config, "RAM", "SP", self._process, self._timing_data ) exporter = SinglePortRAMVerilogExporter(mem) strm = io.StringIO() diff --git a/utils/class_memory.py b/utils/class_memory.py index 09683eb..af7b2fe 100644 --- a/utils/class_memory.py +++ b/utils/class_memory.py @@ -16,7 +16,7 @@ class Memory: - def __init__(self, name, width_in_bits, depth, num_banks, process, timing_data): + def __init__(self, mem_config, process, timing_data): """ Initializer @@ -26,17 +26,18 @@ def __init__(self, name, width_in_bits, depth, num_banks, process, timing_data): """ self.process = process - self.name = name - self.width_in_bits = width_in_bits - self.depth = depth + self.name = mem_config.get_name() + self.width_in_bits = mem_config.get_width_in_bits() + self.depth = mem_config.get_depth() self.addr_width = math.ceil(math.log2(self.depth)) - self.num_banks = num_banks + self.num_banks = mem_config.get_num_banks() self.width_in_bytes = math.ceil(self.width_in_bits / 8.0) self.total_size = self.width_in_bytes * self.depth + self.additional_height = mem_config.get_additional_height() self.timing_data = timing_data self.physical = PhysicalData() (width_um, height_um) = self.process.get_macro_dimensions( - self.width_in_bits, self.depth, self.num_banks + self.width_in_bits, self.depth, self.num_banks, self.additional_height ) self.physical.set_extents(width_um, height_um) self.physical.snap_to_grid( @@ -74,6 +75,15 @@ def get_total_size(self): """Returns the total size in bytes""" return self.total_size + def get_additional_height(self): + """ + Returns the additional height to add in um + + Can be used when the number of pins exceeds the number of available + tracks + """ + return self.additional_height + def get_data_bus_msb(self): """ Returns the data bus MSB, which is one less than the data bus width diff --git a/utils/class_process.py b/utils/class_process.py index 33943d0..e0d94ab 100644 --- a/utils/class_process.py +++ b/utils/class_process.py @@ -88,7 +88,7 @@ def get_bitcell_dimensions(self): bitcell_width = 2 * contacted_poly_pitch_um return (bitcell_width, bitcell_height) - def get_macro_dimensions(self, width_in_bits, depth, num_banks): + def get_macro_dimensions(self, width_in_bits, depth, num_banks, additional_height): """ Returns the computed macro height & width based on the width/depth/banks and process parameters @@ -112,6 +112,8 @@ def get_macro_dimensions(self, width_in_bits, depth, num_banks): total_height = all_bitcell_height * 1.2 total_width = all_bitcell_width * 1.2 + total_height += additional_height + return (total_width, total_height) def get_tech_nm(self): diff --git a/utils/dual_port_ram.py b/utils/dual_port_ram.py index ac2a20a..2082ae5 100755 --- a/utils/dual_port_ram.py +++ b/utils/dual_port_ram.py @@ -21,13 +21,16 @@ class DualPortRAM(RAM): input clk, """ - def __init__( - self, name, width_in_bits, depth, num_banks, process_data, timing_data - ): - """Initializer""" - RAM.__init__( - self, name, width_in_bits, depth, num_banks, process_data, timing_data - ) + def __init__(self, mem_config, process_data, timing_data): + """ + Initializer + + Parameters: + mem_config (MemoryConfig): memory parameter container + process_data (Process): process data container + timing_data (TimingData): timing data container + """ + RAM.__init__(self, mem_config, process_data, timing_data) self.num_rw_ports = 2 def get_num_pins(self): diff --git a/utils/dual_port_regfile.py b/utils/dual_port_regfile.py index 1f27401..46391d3 100755 --- a/utils/dual_port_regfile.py +++ b/utils/dual_port_regfile.py @@ -21,13 +21,16 @@ class DualPortRegFile(RegFile): input clk, """ - def __init__( - self, name, width_in_bits, depth, num_banks, process_data, timing_data - ): - """Initializer""" - RegFile.__init__( - self, name, width_in_bits, depth, num_banks, process_data, timing_data - ) + def __init__(self, mem_config, process_data, timing_data): + """ + Initializer + + Parameters: + mem_config (MemoryConfig): memory parameter container + process_data (Process): process data container + timing_data (TimingData): timing data container + """ + RegFile.__init__(self, mem_config, process_data, timing_data) self.num_rw_ports = 2 def get_num_pins(self): diff --git a/utils/factory_base.py b/utils/factory_base.py index 69b6500..238d3b2 100644 --- a/utils/factory_base.py +++ b/utils/factory_base.py @@ -17,19 +17,16 @@ def register(self, memory_type, port_config, klass): self._registry[self.get_key(memory_type, port_config)] = klass @classmethod - def create( - self, - name, - width_in_bits, - depth, - num_banks, - memory_type, - port_config, - process, - timing_data, - ): + def create(self, mem_config, memory_type, port_config, process, timing_data): """ Creates and returns the requested object based on the factory registry + + Parameters: + mem_config (MemoryConfig): memory parameter container + memory_type (str): type of memory to create (RAM or RF) + port_config (str): port configuration (SP or DP) + process_data (Process): process data container + timing_data (TimingData): timing data container """ key = self.get_key(memory_type, port_config) klass = self._registry.get(key) @@ -37,4 +34,4 @@ def create( raise ValueError( f"No class registered under key: {memory_type} {port_config}" ) - return klass(name, width_in_bits, depth, num_banks, process, timing_data) + return klass(mem_config, process, timing_data) diff --git a/utils/lef_exporter.py b/utils/lef_exporter.py index 15f06b3..8d516b3 100644 --- a/utils/lef_exporter.py +++ b/utils/lef_exporter.py @@ -15,6 +15,16 @@ class LefExporter(Exporter): def __init__(self, memory): """Initializer""" Exporter.__init__(self, memory) + # In rect_pin_mode, we try and avoid EOL spacing issues by: + # 1) making the pins rectangular in the X direction: + # width: min_pin_width * 1.5 + # height: 1.5 * min_pin_width + # 2) reducing the width of the power/ground straps by one x_offset + # on the left side where the pins are + self._rect_pin_mode = ( + memory.get_physical_data().get_pin_pitch() + == memory.get_process_data().get_pin_pitch_um() + ) def export(self, out_fh): """Exports LEF file to output stream""" @@ -91,7 +101,13 @@ def add_pin(self, fid, pin_name, is_input, y, pitch): fid.write(" SHAPE ABUTMENT ;\n") fid.write(" PORT\n") fid.write(" LAYER %s ;\n" % layer) - fid.write(" RECT %.3f %.3f %.3f %.3f ;\n" % (0, y - hpw, pw, y + hpw)) + if self._rect_pin_mode: + # make pins a little longer in the X direction + fid.write( + " RECT %.3f %.3f %.3f %.3f ;\n" % (0, y - hpw, pw + hpw, y + hpw) + ) + else: + fid.write(" RECT %.3f %.3f %.3f %.3f ;\n" % (0, y - hpw, pw, y + hpw)) fid.write(" END\n") fid.write(" END %s\n" % pin_name) @@ -156,13 +172,16 @@ def create_pg_shapes( ): """Creates power/ground shapes""" + # if in rect_pin_mode we start the pin two offsets in to avoid + # spacing issues with the signal pin + mod_x_offset = x_offset * (self._rect_pin_mode + 1) while y_step <= h - y_offset: fid.write( " RECT %.3f %.3f %.3f %.3f ;\n" % ( - x_offset, + mod_x_offset, y_step - supply_pin_half_width, - w - x_offset, + w - mod_x_offset, y_step + supply_pin_half_width, ) ) diff --git a/utils/liberty_exporter.py b/utils/liberty_exporter.py index 2d489b8..98c53bd 100644 --- a/utils/liberty_exporter.py +++ b/utils/liberty_exporter.py @@ -145,22 +145,19 @@ def write_bus_defs(self, out_fh): data_bus_msb = mem.get_data_bus_msb() addr_width = mem.get_addr_width() addr_bus_msb = mem.get_addr_bus_msb() - out_fh.write(" type (%s_DATA) {\n" % name) - out_fh.write(" base_type : array ;\n") - out_fh.write(" data_type : bit ;\n") - out_fh.write(" bit_width : %d;\n" % bits) - out_fh.write(" bit_from : %d;\n" % data_bus_msb) - out_fh.write(" bit_to : 0 ;\n") - out_fh.write(" downto : true ;\n") - out_fh.write(" }\n") - out_fh.write(" type (%s_ADDRESS) {\n" % name) + self.write_bus_def(out_fh, name + "_DATA", bits, data_bus_msb) + self.write_bus_def(out_fh, name + "_ADDRESS", addr_width, addr_bus_msb) + + def write_bus_def(self, out_fh, bus_name, width, msb): + out_fh.write(f" type ({bus_name}) {{\n") out_fh.write(" base_type : array ;\n") out_fh.write(" data_type : bit ;\n") - out_fh.write(" bit_width : %d;\n" % addr_width) - out_fh.write(" bit_from : %d;\n" % addr_bus_msb) + out_fh.write(f" bit_width : {width};\n") + out_fh.write(f" bit_from : {msb};\n") out_fh.write(" bit_to : 0 ;\n") out_fh.write(" downto : true ;\n") out_fh.write(" }\n") + def write_int_power_table( self, out_fh, rise_fall, template_name, slew_indices, dynamic @@ -184,12 +181,12 @@ def write_internal_power( self.write_int_power_table(out_fh, "fall", template_name, slew_indices, dynamic) out_fh.write(" }\n") - def write_clk_pin(self, out_fh): + def write_clk_pin(self, pin_name, out_fh): """Writes the clock pin section""" int_power_template = self.get_memory().get_name() + "_energy_template_clkslew" timing_data = self.get_memory().get_timing_data() - out_fh.write(" pin(clk) {\n") + out_fh.write(f" pin({pin_name}) {{\n") out_fh.write(" direction : input;\n") out_fh.write( " capacitance : %.3f;\n" % (timing_data.min_driver_in_cap * 5) @@ -246,7 +243,8 @@ def write_cell_constraint( out_fh.write(" )\n") out_fh.write(" }\n") - def write_output_bus(self, out_fh, name, pin_name, include_memory_read): + def write_output_bus(self, out_fh, name, pin_name, clk_pin_name, + include_memory_read): """Writes the output bus definition""" delay_template_name = name + "_mem_out_delay_template" @@ -269,7 +267,7 @@ def write_output_bus(self, out_fh, name, pin_name, include_memory_read): out_fh.write(" address : addr_in;\n") out_fh.write(" }\n") out_fh.write(" timing() {\n") - out_fh.write(' related_pin : "clk" ;\n') + out_fh.write(f' related_pin : "{clk_pin_name}" ;\n') out_fh.write(" timing_type : rising_edge;\n") out_fh.write(" timing_sense : non_unate;\n") self.write_cell_delay( @@ -287,7 +285,7 @@ def write_output_bus(self, out_fh, name, pin_name, include_memory_read): out_fh.write(" }\n") out_fh.write(" }\n") - def write_pin(self, out_fh, name, pin_name): + def write_pin(self, out_fh, name, pin_name, clk_pin_name): """Writes the enable pin definition""" template_name = name + "_constraint_template" @@ -300,30 +298,30 @@ def write_pin(self, out_fh, name, pin_name): out_fh.write(" pin(%s){\n" % pin_name) out_fh.write(" direction : input;\n") out_fh.write(" capacitance : %.3f;\n" % (min_driver_in_cap)) - self.write_timing(out_fh, name, slew_indices, tsetup, thold) + self.write_timing(out_fh, name, clk_pin_name, slew_indices, tsetup, thold) self.write_internal_power( out_fh, name + "_energy_template_sigslew", slew_indices, pindynamic ) out_fh.write(" }\n") - def write_timing(self, out_fh, name, slew_indices, tsetup, thold): + def write_timing(self, out_fh, name, clk_pin_name, slew_indices, tsetup, thold): """Writes the pin/bus timing section""" template_name = name + "_constraint_template" out_fh.write(" timing() {\n") - out_fh.write(" related_pin : clk;\n") + out_fh.write(f" related_pin : {clk_pin_name};\n") out_fh.write(" timing_type : setup_rising ;\n") self.write_cell_constraint(out_fh, "rise", template_name, slew_indices, tsetup) self.write_cell_constraint(out_fh, "fall", template_name, slew_indices, tsetup) out_fh.write(" } \n") out_fh.write(" timing() {\n") - out_fh.write(" related_pin : clk;\n") + out_fh.write(f" related_pin : {clk_pin_name};\n") out_fh.write(" timing_type : hold_rising ;\n") self.write_cell_constraint(out_fh, "rise", template_name, slew_indices, thold) self.write_cell_constraint(out_fh, "fall", template_name, slew_indices, thold) out_fh.write(" }\n") - def write_address_bus(self, out_fh, name, bus_name): + def write_address_bus(self, out_fh, name, bus_name, clk_pin_name): """Writes the address bus""" timing_data = self.get_memory().get_timing_data() @@ -336,13 +334,14 @@ def write_address_bus(self, out_fh, name, bus_name): out_fh.write(" bus_type : %s_ADDRESS;\n" % name) out_fh.write(" direction : input;\n") out_fh.write(" capacitance : %.3f;\n" % (min_driver_in_cap)) - self.write_timing(out_fh, name, slew_indices, tsetup, thold) + self.write_timing(out_fh, name, clk_pin_name, slew_indices, tsetup, thold) self.write_internal_power( out_fh, name + "_energy_template_sigslew", slew_indices, pindynamic ) out_fh.write(" }\n") - def write_data_bus(self, out_fh, name, bus_name, include_memory_write): + def write_data_bus(self, out_fh, name, bus_name, clk_pin_name, + we_pin_name, include_memory_write): """Writes the data bus""" timing_data = self.get_memory().get_timing_data() @@ -356,31 +355,34 @@ def write_data_bus(self, out_fh, name, bus_name, include_memory_write): if include_memory_write: out_fh.write(" memory_write() {\n") out_fh.write(" address : addr_in;\n") - out_fh.write(' clocked_on : "clk";\n') + out_fh.write(f' clocked_on : "{clk_pin_name}";\n') out_fh.write(" }\n") out_fh.write(" direction : input;\n") out_fh.write(" capacitance : %.3f;\n" % (min_driver_in_cap)) - self.write_timing(out_fh, name, slew_indices, tsetup, thold) + self.write_timing(out_fh, name, clk_pin_name, slew_indices, tsetup, thold) self.write_internal_power( out_fh, name + "_energy_template_sigslew", slew_indices, pindynamic, - "(! (we_in) )", + f"(! ({we_pin_name}) )", ) self.write_internal_power( out_fh, name + "_energy_template_sigslew", slew_indices, pindynamic, - "(we_in)", + f"({we_pin_name})", ) out_fh.write(" }\n") def write_rw_pin_set(self, out_fh, name, suffix, is_ram): """Writes the rw pin group to the output stream""" - self.write_pin(out_fh, name, f"we_{suffix}") - self.write_address_bus(out_fh, name, f"addr_{suffix}") - self.write_data_bus(out_fh, name, f"din_{suffix}", is_ram) - self.write_output_bus(out_fh, name, f"dout_{suffix}", is_ram) + clk_pin_name = "clk" + self.write_pin(out_fh, name, f"we_{suffix}", clk_pin_name) + self.write_address_bus(out_fh, name, f"addr_{suffix}", clk_pin_name) + self.write_data_bus(out_fh, name, f"din_{suffix}", clk_pin_name, + f"we_{suffix}", is_ram) + self.write_output_bus(out_fh, name, f"dout_{suffix}", clk_pin_name, + is_ram) diff --git a/utils/memory_config.py b/utils/memory_config.py new file mode 100644 index 0000000..843bb85 --- /dev/null +++ b/utils/memory_config.py @@ -0,0 +1,48 @@ +#!/usr/bin/env python3 + + +class MemoryConfig: + """Container for functional memory configuration""" + + def __init__(self, name, width_in_bits, depth, num_banks, additional_height): + """Initializer""" + + self._name = name + self._width_in_bits = width_in_bits + self._depth = depth + self._num_banks = num_banks + self._additional_height = additional_height + + def set_name(self, name): + """Sets the name""" + self._name = name + + def get_name(self): + """Returns the name""" + return self._name + + def get_width_in_bits(self): + """Returns the width_in_bits""" + return self._width_in_bits + + def get_depth(self): + """Returns the depth""" + return self._depth + + def get_num_banks(self): + """Returns the num_banks""" + return self._num_banks + + def get_additional_height(self): + """Returns the additional_height""" + return self._additional_height + + @staticmethod + def from_json(json_data): + return MemoryConfig( + str(json_data["name"]), + int(json_data["width"]), + int(json_data["depth"]), + int(json_data["banks"]), + json_data.get("additional_height", 0), + ) diff --git a/utils/physical_data.py b/utils/physical_data.py index 7ff03d2..889d604 100644 --- a/utils/physical_data.py +++ b/utils/physical_data.py @@ -104,13 +104,15 @@ def set_pin_pitches(self, name, num_pins, min_pin_pitch, y_offset): ## The next few lines of code till "pin_pitch = min.." spreads the pins ## in higher multiples of pin pitch if there are available tracks track_count = 1 - while number_of_spare_tracks > 0: - track_count += 1 - number_of_spare_tracks = number_of_tracks_available - num_pins * track_count - track_count -= 1 + if number_of_spare_tracks > 0: + while number_of_spare_tracks > 0: + track_count += 1 + number_of_spare_tracks = number_of_tracks_available - num_pins * track_count + track_count -= 1 self._pin_pitch = min_pin_pitch * track_count # Divide by the remaining 'spare' tracks into the inter-group spaces # [4 groups -> 3 spaces] extra = math.floor((number_of_tracks_available - num_pins * track_count) / 3) self._group_pitch = extra * min_pin_pitch + diff --git a/utils/ram.py b/utils/ram.py index b6b0782..37dba85 100644 --- a/utils/ram.py +++ b/utils/ram.py @@ -9,13 +9,16 @@ class RAM(Memory): """Base class for RAMs""" - def __init__( - self, name, width_in_bits, depth, num_banks, process_data, timing_data - ): - """Initializer""" - Memory.__init__( - self, name, width_in_bits, depth, num_banks, process_data, timing_data - ) + def __init__(self, mem_config, process_data, timing_data): + """ + Initializer + + Parameters: + mem_config (MemoryConfig): memory parameter container + process_data (Process): process data container + timing_data (TimingData): timing data container + """ + Memory.__init__(self, mem_config, process_data, timing_data) def write_verilog_file(self, out_file_name, is_blackbox=False): """ diff --git a/utils/ram_liberty_exporter.py b/utils/ram_liberty_exporter.py index 098dfa4..37c057e 100644 --- a/utils/ram_liberty_exporter.py +++ b/utils/ram_liberty_exporter.py @@ -23,7 +23,7 @@ def write_cell(self, out_fh): for i in range(0, self._memory.get_num_rw_ports()): suffix = chr(ord("a") + i) self.write_rw_pin_set(out_fh, name, suffix, True) - self.write_clk_pin(out_fh) + self.write_clk_pin("clk", out_fh) def write_memory_section(self, out_fh): """Writes the memory section to the output stream""" diff --git a/utils/ram_verilog_exporter.py b/utils/ram_verilog_exporter.py index 6246204..0a37f47 100644 --- a/utils/ram_verilog_exporter.py +++ b/utils/ram_verilog_exporter.py @@ -19,7 +19,7 @@ def export_module(self, out_fh): for i in range(0, mem.get_num_rw_ports()): suffix = chr(ord("a") + i) self.write_rw_port_decl_set(suffix, out_fh) - out_fh.write(" clk,\n") + out_fh.write(" clk\n") out_fh.write(");\n") out_fh.write(f" parameter DATA_WIDTH = {mem.get_width()};\n") out_fh.write(f" parameter ADDR_WIDTH = {mem.get_addr_width()};\n") diff --git a/utils/reg_file.py b/utils/reg_file.py index d56c7db..e0dcc5b 100644 --- a/utils/reg_file.py +++ b/utils/reg_file.py @@ -8,14 +8,17 @@ class RegFile(Memory): """Base class for Reg files""" - def __init__( - self, name, width_in_bits, depth, num_banks, process_data, timing_data - ): - """Initializer""" - - Memory.__init__( - self, name, width_in_bits, depth, num_banks, process_data, timing_data - ) + def __init__(self, mem_config, process_data, timing_data): + """ + Initializer + + Parameters: + mem_config (MemoryConfig): memory parameter container + process_data (Process): process data container + timing_data (TimingData): timing data container + """ + + Memory.__init__(self, mem_config, process_data, timing_data) def write_verilog_file(self, out_file_name, is_blackbox=False): """ diff --git a/utils/regfile_liberty_exporter.py b/utils/regfile_liberty_exporter.py index 5c25949..2e0b10e 100644 --- a/utils/regfile_liberty_exporter.py +++ b/utils/regfile_liberty_exporter.py @@ -22,4 +22,4 @@ def write_cell(self, out_fh): for i in range(0, self._memory.get_num_rw_ports()): suffix = chr(ord("a") + i) self.write_rw_pin_set(out_fh, name, suffix, False) - self.write_clk_pin(out_fh) + self.write_clk_pin("clk", out_fh) diff --git a/utils/regfile_verilog_exporter.py b/utils/regfile_verilog_exporter.py index 1541bd2..af75c64 100644 --- a/utils/regfile_verilog_exporter.py +++ b/utils/regfile_verilog_exporter.py @@ -19,7 +19,7 @@ def export_module(self, out_fh): for i in range(0, self.get_memory().get_num_rw_ports()): suffix = chr(ord("a") + i) self.write_rw_port_decl_set(suffix, out_fh) - out_fh.write(" clk,\n") + out_fh.write(" clk\n") out_fh.write(");\n") out_fh.write(f" parameter DATA_WIDTH = {mem.get_width()};\n") out_fh.write(f" parameter ADDR_WIDTH = {mem.get_addr_width()};\n") diff --git a/utils/single_port_ram.py b/utils/single_port_ram.py index 7f447aa..ad13586 100755 --- a/utils/single_port_ram.py +++ b/utils/single_port_ram.py @@ -25,13 +25,16 @@ class SinglePortRAM(RAM): input ce_in """ - def __init__( - self, name, width_in_bits, depth, num_banks, process_data, timing_data - ): - """Initializer""" - RAM.__init__( - self, name, width_in_bits, depth, num_banks, process_data, timing_data - ) + def __init__(self, mem_config, process_data, timing_data): + """ + Initializer + + Parameters: + mem_config (MemoryConfig): memory parameter container + process_data (Process): process data container + timing_data (TimingData): timing data container + """ + RAM.__init__(self, mem_config, process_data, timing_data) self.num_rw_ports = 1 def get_num_pins(self): diff --git a/utils/single_port_ram_liberty_exporter.py b/utils/single_port_ram_liberty_exporter.py index c654dc0..e5f08c2 100644 --- a/utils/single_port_ram_liberty_exporter.py +++ b/utils/single_port_ram_liberty_exporter.py @@ -17,11 +17,12 @@ def write_cell(self, out_fh): """Writes the Liberty cell""" name = self._memory.get_name() + clk_pin_name = "clk" timing_data = self._memory.get_timing_data() self.write_memory_section(out_fh) - self.write_clk_pin(out_fh) - self.write_output_bus(out_fh, name, "rd_out", True) - self.write_pin(out_fh, name, "we_in") - self.write_pin(out_fh, name, "ce_in") - self.write_address_bus(out_fh, name, "addr_in") - self.write_data_bus(out_fh, name, "wd_in", True) + self.write_clk_pin(clk_pin_name, out_fh) + self.write_output_bus(out_fh, name, "rd_out", clk_pin_name, True) + self.write_pin(out_fh, name, "we_in", clk_pin_name) + self.write_pin(out_fh, name, "ce_in", clk_pin_name) + self.write_address_bus(out_fh, name, "addr_in", clk_pin_name) + self.write_data_bus(out_fh, name, "wd_in", clk_pin_name, "we_in", True) diff --git a/utils/single_port_regfile.py b/utils/single_port_regfile.py index 60cb80f..1fb9206 100755 --- a/utils/single_port_regfile.py +++ b/utils/single_port_regfile.py @@ -17,13 +17,16 @@ class SinglePortRegFile(RegFile): input clk, """ - def __init__( - self, name, width_in_bits, depth, num_banks, process_data, timing_data - ): - """Initializer""" - RegFile.__init__( - self, name, width_in_bits, depth, num_banks, process_data, timing_data - ) + def __init__(self, mem_config, process_data, timing_data): + """ + Initializer + + Parameters: + mem_config (MemoryConfig): memory parameter container + process_data (Process): process data container + timing_data (TimingData): timing data container + """ + RegFile.__init__(self, mem_config, process_data, timing_data) self.num_rw_ports = 1 def get_num_pins(self): diff --git a/utils/verilog_exporter.py b/utils/verilog_exporter.py index 91e2395..c509282 100644 --- a/utils/verilog_exporter.py +++ b/utils/verilog_exporter.py @@ -83,5 +83,5 @@ def export_blackbox(self, out_fh): for i in range(0, self.get_memory().get_num_rw_ports()): suffix = chr(ord("a") + i) self.export_bb_port_decl_set(suffix, out_fh) - out_fh.write(" clk,\n") + out_fh.write(" clk\n") self.export_bb_footer(out_fh)