diff --git a/Documentation/devicetree/bindings/mfd/syscon.yaml b/Documentation/devicetree/bindings/mfd/syscon.yaml index 7fc84cdeaa1185c..27672adeb1fedb7 100644 --- a/Documentation/devicetree/bindings/mfd/syscon.yaml +++ b/Documentation/devicetree/bindings/mfd/syscon.yaml @@ -84,8 +84,6 @@ select: - mediatek,mt2701-pctl-a-syscfg - mediatek,mt2712-pctl-a-syscfg - mediatek,mt6397-pctl-pmic-syscfg - - mediatek,mt6589-pctl-a-syscfg - - mediatek,mt6589-pctl-b-syscfg - mediatek,mt7988-topmisc - mediatek,mt8135-pctl-a-syscfg - mediatek,mt8135-pctl-b-syscfg @@ -192,8 +190,6 @@ properties: - mediatek,mt2701-pctl-a-syscfg - mediatek,mt2712-pctl-a-syscfg - mediatek,mt6397-pctl-pmic-syscfg - - mediatek,mt6589-pctl-a-syscfg - - mediatek,mt6589-pctl-b-syscfg - mediatek,mt7988-topmisc - mediatek,mt8135-pctl-a-syscfg - mediatek,mt8135-pctl-b-syscfg diff --git a/Documentation/devicetree/bindings/pinctrl/mediatek,mt6589-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt6589-pinctrl.yaml new file mode 100644 index 000000000000000..b33f47577ae21a1 --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/mediatek,mt6589-pinctrl.yaml @@ -0,0 +1,148 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pinctrl/mediatek,mt6589-pinctrl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek MT6589 Pin Controller + +maintainers: + - Akari Tsuyukusa + +description: + The MediaTek pin controller on MT6589 is used to control pin functions, pull + up/down resistance and drive strength options. + +properties: + compatible: + enum: + - mediatek,mt6589-pinctrl + + reg: + minItems: 3 + maxItems: 3 + description: Physical addresses for GPIO base(s) and EINT registers. + + reg-names: + items: + - const: gpio + - const: gpio1 + - const: eint + + gpio-controller: true + + "#gpio-cells": + const: 2 + description: + Number of cells in GPIO specifier. Since the generic GPIO binding is used, + the amount of cells must be specified as 2. See the below mentioned gpio + binding representation for description of particular cells. + + gpio-ranges: + minItems: 1 + maxItems: 5 + description: + GPIO valid number range. + + interrupt-controller: true + + interrupts: + maxItems: 1 + description: + Specifies the summary IRQ. + + "#interrupt-cells": + const: 2 + +required: + - compatible + - reg + - reg-names + - gpio-controller + - "#gpio-cells" + - interrupts + - interrupt-controller + - "#interrupt-cells" + +patternProperties: + '-[0-9]*$': + type: object + additionalProperties: false + + patternProperties: + '-pins*$': + type: object + description: + A pinctrl node should contain at least one subnodes representing the + pinctrl groups available on the machine. Each subnode will list the + pins it needs, and how they should be configured, with regard to muxer + configuration, pullups, drive strength, input enable/disable and input + schmitt. + $ref: /schemas/pinctrl/pincfg-node.yaml + + properties: + pinmux: + description: + Integer array, represents gpio pin number and mux setting. + Supported pin number and mux varies for different SoCs, and are + defined as macros in dt-bindings/pinctrl/-pinfunc.h directly. + + bias-disable: true + + bias-pull-up: true + + bias-pull-down: true + + input-enable: true + + input-disable: true + + output-low: true + + output-high: true + + input-schmitt-enable: true + + input-schmitt-disable: true + + drive-strength: + enum: [2, 4, 8, 10, 12, 14, 16, 20, 24, 28, 32] + + slew-rate: + enum: [0, 1] + + # TODO + mediatek,pull-up-adv: + description: | + Pull up settings for 2 pull resistors, R0 and R1. User can + configure those special pins. Valid arguments are described as + below: + 0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled. + 1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled. + 2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled. + 3: (R1, R0) = (1, 1) which means R1 enabled and R0 enabled. + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [0, 1, 2, 3] + + mediatek,pull-down-adv: + description: | + Pull down settings for 2 pull resistors, R0 and R1. User can + configure those special pins. Valid arguments are described as + below: + 0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled. + 1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled. + 2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled. + 3: (R1, R0) = (1, 1) which means R1 enabled and R0 enabled. + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [0, 1, 2, 3] + + required: + - pinmux + + additionalProperties: false + +additionalProperties: false + +examples: + - | + TODO diff --git a/Documentation/devicetree/bindings/pinctrl/mediatek,mt65xx-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt65xx-pinctrl.yaml index 19270dd0fec1bbf..b9680b896f12f8a 100644 --- a/Documentation/devicetree/bindings/pinctrl/mediatek,mt65xx-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/mediatek,mt65xx-pinctrl.yaml @@ -18,7 +18,6 @@ properties: - mediatek,mt2701-pinctrl - mediatek,mt2712-pinctrl - mediatek,mt6397-pinctrl - - mediatek,mt6589-pinctrl - mediatek,mt7623-pinctrl - mediatek,mt8127-pinctrl - mediatek,mt8135-pinctrl diff --git a/arch/arm/boot/dts/mediatek/mt6589.dtsi b/arch/arm/boot/dts/mediatek/mt6589.dtsi index 1c627bbe78cf797..f476e5ef99eb181 100644 --- a/arch/arm/boot/dts/mediatek/mt6589.dtsi +++ b/arch/arm/boot/dts/mediatek/mt6589.dtsi @@ -143,17 +143,17 @@ #clock-cells = <1>; }; - /* - * EINT registers: 0x1000b000 - * GPIO base: 0x10005000, GPIO1 base 0x1020c000 - */ pio: pinctrl@10005000 { compatible = "mediatek,mt6589-pinctrl"; - reg = <0x1000b000 0x1000>; - mediatek,pctl-regmap = <&syscfg_pctl_a &syscfg_pctl_b>; + reg = <0x10005000 0x1000>, + <0x1020c000 0x1000>, + <0x1000b000 0x1000>; + reg-names = "gpio", "gpio1", "eint"; gpio-controller; #gpio-cells = <2>; + gpio-ranges = <&pio 0 0 232>; interrupt-controller; + interrupt-parent = <&gic>; #interrupt-cells = <2>; interrupts = , , diff --git a/drivers/pinctrl/mediatek/Kconfig b/drivers/pinctrl/mediatek/Kconfig index 8d9f84701793ac0..b2d5637f4d1423b 100644 --- a/drivers/pinctrl/mediatek/Kconfig +++ b/drivers/pinctrl/mediatek/Kconfig @@ -102,7 +102,7 @@ config PINCTRL_MT6589 depends on MACH_MT6589 || COMPILE_TEST depends on OF default MACH_MT6589 - select PINCTRL_MTK + select PINCTRL_MTK_PARIS config PINCTRL_MT7623 bool "MediaTek MT7623 pin control with generic binding" diff --git a/drivers/pinctrl/mediatek/pinctrl-mt2701.c b/drivers/pinctrl/mediatek/pinctrl-mt2701.c index 30bec29de9bdc05..6b1c7122b0fb996 100644 --- a/drivers/pinctrl/mediatek/pinctrl-mt2701.c +++ b/drivers/pinctrl/mediatek/pinctrl-mt2701.c @@ -504,6 +504,8 @@ static const struct mtk_pinctrl_devdata mt2701_pinctrl_data = { .dout_offset = 0x0500, .din_offset = 0x0630, .pinmux_offset = 0x0760, + .type1_start = 280, + .type1_end = 280, .port_shf = 4, .port_mask = 0x1f, .port_align = 4, diff --git a/drivers/pinctrl/mediatek/pinctrl-mt2712.c b/drivers/pinctrl/mediatek/pinctrl-mt2712.c index eb6ecaa726793aa..bb7394ae252b489 100644 --- a/drivers/pinctrl/mediatek/pinctrl-mt2712.c +++ b/drivers/pinctrl/mediatek/pinctrl-mt2712.c @@ -553,6 +553,8 @@ static const struct mtk_pinctrl_devdata mt2712_pinctrl_data = { .dout_offset = 0x0300, .din_offset = 0x0400, .pinmux_offset = 0x0500, + .type1_start = 210, + .type1_end = 210, .port_shf = 4, .port_mask = 0xf, .port_align = 4, diff --git a/drivers/pinctrl/mediatek/pinctrl-mt6397.c b/drivers/pinctrl/mediatek/pinctrl-mt6397.c index af5f48039895e6e..03d0f65d7bcc1fe 100644 --- a/drivers/pinctrl/mediatek/pinctrl-mt6397.c +++ b/drivers/pinctrl/mediatek/pinctrl-mt6397.c @@ -27,6 +27,8 @@ static const struct mtk_pinctrl_devdata mt6397_pinctrl_data = { .dout_offset = (MT6397_PIN_REG_BASE + 0x080), .din_offset = (MT6397_PIN_REG_BASE + 0x0a0), .pinmux_offset = (MT6397_PIN_REG_BASE + 0x0c0), + .type1_start = 41, + .type1_end = 41, .port_shf = 3, .port_mask = 0x3, .port_align = 2, diff --git a/drivers/pinctrl/mediatek/pinctrl-mt6589.c b/drivers/pinctrl/mediatek/pinctrl-mt6589.c index 45d04d4559892dc..0665aac3e73c6fd 100644 --- a/drivers/pinctrl/mediatek/pinctrl-mt6589.c +++ b/drivers/pinctrl/mediatek/pinctrl-mt6589.c @@ -1,39 +1,11 @@ // SPDX-License-Identifier: GPL-2.0-only /* - * Author: akku - * - * Based on pinctrl-mt2701.c - * Copyright (c) 2015 MediaTek Inc. - * Author: Biao Huang + * Copyright (C) Akari Tsuyukusa */ -#include -#include -#include -#include -#include - -#include "pinctrl-mtk-common.h" +#include "pinctrl-paris.h" #include "pinctrl-mtk-mt6589.h" -/* - * E2, E4, E8, E16: Drive - * SR: ??? - * DM: Dummy - * MSB <-> LSB - */ -static const struct mtk_drv_group_desc mt6589_drv_grp[] = { - /* grp 0: SR E8 E4 E2: 2/4/6/8/10/12/14/16mA */ - MTK_DRV_GRP(2, 16, 0, 2, 2), - /* grp 1: SR E8 E4 DM: 4/8/12/16mA */ - MTK_DRV_GRP(4, 16, 1, 2, 4), - /* grp 2: SR E4 E2 DM: 2/4/6/8mA */ - MTK_DRV_GRP(2, 8, 1, 2, 2), - /* grp 3: SR E16 E8 E4 4/8/12/16/20/24/28/32mA */ - MTK_DRV_GRP(4, 32, 0, 2, 4), -}; - - /* GPIO0 */ #define DRV_CON0 0x0500 #define DRV_CON1 0x0510 @@ -53,413 +25,547 @@ static const struct mtk_drv_group_desc mt6589_drv_grp[] = { #define DRV_CON11 0x05b0 #define DRV_CON12 0x05c0 -static const struct mtk_pin_drv_grp mt6589_pin_drv[] = { +#define PIN_FIELD_R0(_bit, _pin) \ + PIN_FIELD_CALC(_pin, _pin, 0, 0x04f0, 0x0, _bit, 1, 32, 1) + +#define PIN_FIELD_DRV(_pin, _offset, _bit, _base) \ + PIN_FIELD_CALC(_pin, _pin, _base, _offset, 0x0, _bit, 4, 32, 1) + +#define PINS_FIELD_DRV(_pin_s, _pin_e, _offset, _bit, _base) \ + PIN_FIELD_CALC(_pin_s, _pin_e, _base, _offset, 0x0, _bit, 4, 32, 1) + +static const struct mtk_pin_field_calc mt6589_pin_mode_range[] = { + PIN_FIELD_CALC(0, 43, 0, 0x0c00, 0x10, 0, 3, 16, 0), + PIN_FIELD_CALC(44, 46, 0, 0x0980, 0x10, 0, 4, 16, 0), + PIN_FIELD_CALC(47, 49, 0, 0x09a0, 0x10, 0, 4, 16, 0), + PIN_FIELD_CALC(50, 231, 0, 0x0ca0, 0x10, 0, 3, 16, 0), +}; + +static const struct mtk_pin_field_calc mt6589_pin_dir_range[] = { + PIN_FIELD_CALC(0, 231, 0, 0x0000, 0x10, 0, 1, 16, 0), +}; + +static const struct mtk_pin_field_calc mt6589_pin_di_range[] = { + PIN_FIELD_CALC(0, 231, 0, 0x0800, 0x10, 0, 1, 16, 0), +}; + +static const struct mtk_pin_field_calc mt6589_pin_do_range[] = { + PIN_FIELD_CALC(0, 231, 0, 0x0a00, 0x10, 0, 1, 16, 0), +}; + +static const struct mtk_pin_field_calc mt6589_pin_sr_range[] = { /* MSDC0_DAT 7 to 4 */ - MTK_PIN_DRV_GRP(0, DRV_CON0, 0, 0), - MTK_PIN_DRV_GRP(1, DRV_CON0, 0, 0), - MTK_PIN_DRV_GRP(2, DRV_CON0, 0, 0), - MTK_PIN_DRV_GRP(3, DRV_CON0, 0, 0), + PINS_FIELD_DRV(0, 3, DRV_CON0, 3, 0), /* MSDC0_RSTB */ - MTK_PIN_DRV_GRP(4, DRV_CON0, 8, 1), + PIN_FIELD_DRV(4, DRV_CON0, 11, 0), /* MSDC0_CMD */ - MTK_PIN_DRV_GRP(5, DRV_CON0, 4, 0), + PIN_FIELD_DRV(5, DRV_CON0, 7, 0), /* MSDC0_CLK */ - MTK_PIN_DRV_GRP(6, DRV_CON12, 12, 0), + PIN_FIELD_DRV(6, DRV_CON12, 15, 0), /* MSDC0_DAT 3 to 0 */ - MTK_PIN_DRV_GRP(7, DRV_CON0, 0, 0), - MTK_PIN_DRV_GRP(8, DRV_CON0, 0, 0), - MTK_PIN_DRV_GRP(9, DRV_CON0, 0, 0), - MTK_PIN_DRV_GRP(10, DRV_CON0, 0, 0), + PINS_FIELD_DRV(7, 10, DRV_CON0, 3, 0), /* NFI */ - MTK_PIN_DRV_GRP(11, DRV_CON0, 12, 1), - MTK_PIN_DRV_GRP(12, DRV_CON0, 12, 1), - MTK_PIN_DRV_GRP(13, DRV_CON0, 12, 1), - MTK_PIN_DRV_GRP(14, DRV_CON0, 12, 1), - MTK_PIN_DRV_GRP(15, DRV_CON0, 12, 1), - MTK_PIN_DRV_GRP(16, DRV_CON0, 12, 1), - MTK_PIN_DRV_GRP(17, DRV_CON0, 12, 1), + PINS_FIELD_DRV(11, 17, DRV_CON0, 15, 0), /* NLD 0 to 15 */ - MTK_PIN_DRV_GRP(18, DRV_CON0, 16, 1), - MTK_PIN_DRV_GRP(19, DRV_CON0, 16, 1), - MTK_PIN_DRV_GRP(20, DRV_CON0, 16, 1), - MTK_PIN_DRV_GRP(21, DRV_CON0, 16, 1), - MTK_PIN_DRV_GRP(22, DRV_CON0, 16, 1), - MTK_PIN_DRV_GRP(23, DRV_CON0, 16, 1), - MTK_PIN_DRV_GRP(24, DRV_CON0, 16, 1), - MTK_PIN_DRV_GRP(25, DRV_CON0, 16, 1), - MTK_PIN_DRV_GRP(26, DRV_CON0, 20, 1), - MTK_PIN_DRV_GRP(27, DRV_CON0, 20, 1), - MTK_PIN_DRV_GRP(28, DRV_CON0, 20, 1), - MTK_PIN_DRV_GRP(29, DRV_CON0, 20, 1), - MTK_PIN_DRV_GRP(30, DRV_CON0, 20, 1), - MTK_PIN_DRV_GRP(31, DRV_CON0, 20, 1), - MTK_PIN_DRV_GRP(32, DRV_CON0, 20, 1), - MTK_PIN_DRV_GRP(33, DRV_CON0, 20, 1), + PINS_FIELD_DRV(18, 25, DRV_CON0, 19, 0), + PINS_FIELD_DRV(26, 33, DRV_CON0, 23, 0), /* EINT 0 to 4 */ - MTK_PIN_DRV_GRP(34, DRV_CON0, 24, 2), - MTK_PIN_DRV_GRP(35, DRV_CON0, 28, 2), - MTK_PIN_DRV_GRP(36, DRV_CON1, 0, 2), - MTK_PIN_DRV_GRP(37, DRV_CON1, 4, 2), - MTK_PIN_DRV_GRP(38, DRV_CON1, 8, 2), + PIN_FIELD_DRV(34, DRV_CON0, 27, 0), + PIN_FIELD_DRV(35, DRV_CON0, 31, 0), + PIN_FIELD_DRV(36, DRV_CON1, 3, 0), + PIN_FIELD_DRV(37, DRV_CON1, 7, 0), + PIN_FIELD_DRV(38, DRV_CON1, 11, 0), /* SPI0 */ - MTK_PIN_DRV_GRP(39, DRV_CON1, 12, 1), - MTK_PIN_DRV_GRP(40, DRV_CON1, 12, 1), - MTK_PIN_DRV_GRP(41, DRV_CON1, 12, 1), - MTK_PIN_DRV_GRP(42, DRV_CON1, 12, 1), - MTK_PIN_DRV_GRP(43, DRV_CON1, 12, 1), + PINS_FIELD_DRV(39, 43, DRV_CON1, 15, 0), /* SIM */ - MTK_PIN_DRV_GRP(44, DRV_CON1, 16, 1), - MTK_PIN_DRV_GRP(45, DRV_CON1, 16, 1), - MTK_PIN_DRV_GRP(46, DRV_CON1, 16, 1), - MTK_PIN_DRV_GRP(47, DRV_CON1, 16, 1), - MTK_PIN_DRV_GRP(48, DRV_CON1, 16, 1), - MTK_PIN_DRV_GRP(49, DRV_CON1, 16, 1), + PINS_FIELD_DRV(44, 49, DRV_CON1, 19, 0), /* ADC */ - MTK_PIN_DRV_GRP(50, DRV_CON1, 20, 1), - MTK_PIN_DRV_GRP(51, DRV_CON1, 20, 1), - MTK_PIN_DRV_GRP(52, DRV_CON1, 20, 1), + PINS_FIELD_DRV(50, 52, DRV_CON1, 23, 0), /* DAC */ - MTK_PIN_DRV_GRP(53, DRV_CON1, 24, 1), - MTK_PIN_DRV_GRP(54, DRV_CON1, 24, 1), - MTK_PIN_DRV_GRP(55, DRV_CON1, 24, 1), + PINS_FIELD_DRV(53, 55, DRV_CON1, 27, 0), /* RTC32K_CK */ /* - MTK_PIN_DRV_GRP(56, , , 1), // no drive? + PIN_FIELD_DRV(56, , , 0), // no drive? */ /* IDDIG */ - MTK_PIN_DRV_GRP(57, DRV_CON1, 28, 2), + PIN_FIELD_DRV(57, DRV_CON1, 31, 0), /* WATCHDOG */ - MTK_PIN_DRV_GRP(58, DRV_CON2, 0, 1), + PIN_FIELD_DRV(58, DRV_CON2, 3, 0), /* SRCLKENA */ - MTK_PIN_DRV_GRP(59, DRV_CON2, 4, 1), + PIN_FIELD_DRV(59, DRV_CON2, 7, 0), /* SRCVOLTEN */ - MTK_PIN_DRV_GRP(60, DRV_CON2, 8, 1), + PIN_FIELD_DRV(60, DRV_CON2, 11, 0), /* JTAG */ - MTK_PIN_DRV_GRP(61, DRV_CON3, 0, 1), - MTK_PIN_DRV_GRP(62, DRV_CON3, 0, 1), - MTK_PIN_DRV_GRP(63, DRV_CON3, 0, 1), - MTK_PIN_DRV_GRP(64, DRV_CON3, 0, 1), - MTK_PIN_DRV_GRP(65, DRV_CON3, 0, 1), - MTK_PIN_DRV_GRP(66, DRV_CON3, 0, 1), + PINS_FIELD_DRV(61, 66, DRV_CON3, 3, 0), /* UR2 */ - MTK_PIN_DRV_GRP(69, DRV_CON3, 4, 1), - MTK_PIN_DRV_GRP(70, DRV_CON3, 8, 1), - MTK_PIN_DRV_GRP(71, DRV_CON3, 12, 1), - MTK_PIN_DRV_GRP(72, DRV_CON3, 16, 1), + PIN_FIELD_DRV(69, DRV_CON3, 7, 0), + PIN_FIELD_DRV(70, DRV_CON3, 11, 0), + PIN_FIELD_DRV(71, DRV_CON3, 15, 0), + PIN_FIELD_DRV(72, DRV_CON3, 19, 0), /* PWM 1 to 4 */ - MTK_PIN_DRV_GRP(73, DRV_CON3, 20, 1), - MTK_PIN_DRV_GRP(74, DRV_CON3, 24, 1), - MTK_PIN_DRV_GRP(75, DRV_CON3, 28, 1), - MTK_PIN_DRV_GRP(76, DRV_CON4, 0, 1), + PIN_FIELD_DRV(73, DRV_CON3, 23, 0), + PIN_FIELD_DRV(74, DRV_CON3, 27, 0), + PIN_FIELD_DRV(75, DRV_CON3, 31, 0), + PIN_FIELD_DRV(76, DRV_CON4, 3, 0), /* UR1 */ - MTK_PIN_DRV_GRP(77, DRV_CON4, 4, 1), - MTK_PIN_DRV_GRP(78, DRV_CON4, 8, 1), - MTK_PIN_DRV_GRP(79, DRV_CON4, 12, 1), - MTK_PIN_DRV_GRP(80, DRV_CON4, 16, 1), + PIN_FIELD_DRV(77, DRV_CON4, 7, 0), + PIN_FIELD_DRV(78, DRV_CON4, 11, 0), + PIN_FIELD_DRV(79, DRV_CON4, 15, 0), + PIN_FIELD_DRV(80, DRV_CON4, 19, 0), /* UR4 */ - MTK_PIN_DRV_GRP(81, DRV_CON4, 20, 1), - MTK_PIN_DRV_GRP(82, DRV_CON4, 24, 1), + PIN_FIELD_DRV(81, DRV_CON4, 23, 0), + PIN_FIELD_DRV(82, DRV_CON4, 27, 0), /* BPI1B */ - MTK_PIN_DRV_GRP(83, DRV_CON5, 12, 1), - MTK_PIN_DRV_GRP(84, DRV_CON5, 12, 1), - MTK_PIN_DRV_GRP(85, DRV_CON5, 12, 1), - MTK_PIN_DRV_GRP(86, DRV_CON5, 12, 1), - MTK_PIN_DRV_GRP(87, DRV_CON5, 12, 1), - MTK_PIN_DRV_GRP(88, DRV_CON5, 12, 1), - MTK_PIN_DRV_GRP(89, DRV_CON5, 12, 1), - MTK_PIN_DRV_GRP(90, DRV_CON5, 12, 1), - MTK_PIN_DRV_GRP(91, DRV_CON5, 12, 1), - MTK_PIN_DRV_GRP(92, DRV_CON5, 12, 1), - MTK_PIN_DRV_GRP(93, DRV_CON5, 12, 1), - MTK_PIN_DRV_GRP(94, DRV_CON5, 12, 1), - MTK_PIN_DRV_GRP(95, DRV_CON5, 12, 1), - MTK_PIN_DRV_GRP(96, DRV_CON5, 12, 1), - MTK_PIN_DRV_GRP(97, DRV_CON5, 12, 1), - MTK_PIN_DRV_GRP(98, DRV_CON5, 12, 1), - MTK_PIN_DRV_GRP(99, DRV_CON5, 12, 1), + PINS_FIELD_DRV(83, 99, DRV_CON5, 15, 0), /* VM 1, 0 */ - MTK_PIN_DRV_GRP(100, DRV_CON5, 12, 1), - MTK_PIN_DRV_GRP(101, DRV_CON5, 12, 1), + PINS_FIELD_DRV(100, 101, DRV_CON5, 15, 0), /* BSI 1 */ - MTK_PIN_DRV_GRP(102, DRV_CON5, 16, 1), - MTK_PIN_DRV_GRP(103, DRV_CON5, 16, 1), - MTK_PIN_DRV_GRP(104, DRV_CON5, 16, 1), + PINS_FIELD_DRV(102, 104, DRV_CON5, 19, 0), /* TXBPI1 */ - MTK_PIN_DRV_GRP(105, DRV_CON5, 20, 1), + PIN_FIELD_DRV(105, DRV_CON5, 23, 0), /* EXT_CLK_EN */ - MTK_PIN_DRV_GRP(106, DRV_CON4, 28, 1), + PIN_FIELD_DRV(106, DRV_CON4, 31, 0), /* SRCLKENA2 */ - MTK_PIN_DRV_GRP(107, DRV_CON5, 0, 1), + PIN_FIELD_DRV(107, DRV_CON5, 3, 0), /* BSI1A */ - MTK_PIN_DRV_GRP(108, DRV_CON5, 4, 1), - MTK_PIN_DRV_GRP(109, DRV_CON5, 4, 1), - MTK_PIN_DRV_GRP(110, DRV_CON5, 4, 1), - MTK_PIN_DRV_GRP(111, DRV_CON5, 4, 1), - MTK_PIN_DRV_GRP(112, DRV_CON5, 4, 1), + PINS_FIELD_DRV(108, 112, DRV_CON5, 7, 0), /* BSI1C */ - MTK_PIN_DRV_GRP(113, DRV_CON5, 8, 1), - MTK_PIN_DRV_GRP(114, DRV_CON5, 8, 1), + PINS_FIELD_DRV(113, 114, DRV_CON5, 11, 0), /* EINT10_AUXIN2, EINT11_AUXIN3, EINT16_AUXIN3 */ - MTK_PIN_DRV_GRP(115, DRV_CON6, 0, 1), - MTK_PIN_DRV_GRP(116, DRV_CON6, 4, 1), - MTK_PIN_DRV_GRP(117, DRV_CON6, 8, 1), + PIN_FIELD_DRV(115, DRV_CON6, 3, 1), + PIN_FIELD_DRV(116, DRV_CON6, 7, 1), + PIN_FIELD_DRV(117, DRV_CON6, 11, 1), /* I2S */ - MTK_PIN_DRV_GRP(120, DRV_CON6, 12, 1), - MTK_PIN_DRV_GRP(121, DRV_CON6, 12, 1), - MTK_PIN_DRV_GRP(122, DRV_CON6, 12, 1), - MTK_PIN_DRV_GRP(123, DRV_CON6, 12, 1), + PINS_FIELD_DRV(120, 123, DRV_CON6, 15, 1), /* EINT 5 to 9 */ - MTK_PIN_DRV_GRP(124, DRV_CON6, 16, 2), - MTK_PIN_DRV_GRP(125, DRV_CON6, 20, 2), - MTK_PIN_DRV_GRP(126, DRV_CON6, 24, 2), - MTK_PIN_DRV_GRP(127, DRV_CON6, 28, 2), - MTK_PIN_DRV_GRP(128, DRV_CON7, 0, 2), + PIN_FIELD_DRV(124, DRV_CON6, 19, 1), + PIN_FIELD_DRV(125, DRV_CON6, 23, 1), + PIN_FIELD_DRV(126, DRV_CON6, 27, 1), + PIN_FIELD_DRV(127, DRV_CON6, 31, 1), + PIN_FIELD_DRV(128, DRV_CON7, 3, 1), /* DISP_PWM */ - MTK_PIN_DRV_GRP(129, DRV_CON7, 28, 1), + PIN_FIELD_DRV(129, DRV_CON7, 31, 1), /* LPTE/MSDC4_DAT0, LRSTB/MSDC4_DAT1 */ - MTK_PIN_DRV_GRP(130, DRV_CON8, 20, 0), - MTK_PIN_DRV_GRP(131, DRV_CON8, 20, 0), + PINS_FIELD_DRV(130, 131, DRV_CON8, 23, 1), /* LPCE1B, LPCE0B */ - MTK_PIN_DRV_GRP(132, DRV_CON8, 28, 1), - MTK_PIN_DRV_GRP(133, DRV_CON9, 0, 1), + PIN_FIELD_DRV(132, DRV_CON8, 31, 1), + PIN_FIELD_DRV(133, DRV_CON9, 3, 1), /* SPI1 / MSDC4 */ - MTK_PIN_DRV_GRP(134, DRV_CON8, 20, 0), - MTK_PIN_DRV_GRP(135, DRV_CON8, 20, 0), - MTK_PIN_DRV_GRP(136, DRV_CON8, 20, 0), - MTK_PIN_DRV_GRP(137, DRV_CON8, 20, 0), + PINS_FIELD_DRV(134, 137, DRV_CON8, 23, 1), /* LCD / MSDC4 */ - MTK_PIN_DRV_GRP(138, DRV_CON8, 20, 0), - MTK_PIN_DRV_GRP(139, DRV_CON8, 0, 0), - MTK_PIN_DRV_GRP(140, DRV_CON8, 20, 0), - MTK_PIN_DRV_GRP(141, DRV_CON7, 16, 0), - MTK_PIN_DRV_GRP(142, DRV_CON7, 20, 1), + PIN_FIELD_DRV(138, DRV_CON8, 23, 1), + PIN_FIELD_DRV(139, DRV_CON8, 3, 1), + PIN_FIELD_DRV(140, DRV_CON8, 23, 1), + PIN_FIELD_DRV(141, DRV_CON7, 19, 1), + PIN_FIELD_DRV(142, DRV_CON7, 23, 1), /* DPI */ - MTK_PIN_DRV_GRP(143, DRV_CON9, 8, 1), - MTK_PIN_DRV_GRP(144, DRV_CON9, 8, 1), - MTK_PIN_DRV_GRP(145, DRV_CON9, 8, 1), - MTK_PIN_DRV_GRP(146, DRV_CON9, 8, 1), - MTK_PIN_DRV_GRP(147, DRV_CON9, 12, 1), - MTK_PIN_DRV_GRP(148, DRV_CON9, 12, 1), - MTK_PIN_DRV_GRP(149, DRV_CON9, 12, 1), - MTK_PIN_DRV_GRP(150, DRV_CON9, 12, 1), - MTK_PIN_DRV_GRP(151, DRV_CON9, 12, 1), - MTK_PIN_DRV_GRP(152, DRV_CON9, 12, 1), - MTK_PIN_DRV_GRP(153, DRV_CON9, 12, 1), - MTK_PIN_DRV_GRP(154, DRV_CON9, 12, 1), - MTK_PIN_DRV_GRP(155, DRV_CON9, 16, 1), - MTK_PIN_DRV_GRP(156, DRV_CON9, 16, 1), - MTK_PIN_DRV_GRP(157, DRV_CON9, 16, 1), - MTK_PIN_DRV_GRP(158, DRV_CON9, 16, 1), - MTK_PIN_DRV_GRP(159, DRV_CON9, 16, 1), - MTK_PIN_DRV_GRP(160, DRV_CON9, 16, 1), - MTK_PIN_DRV_GRP(161, DRV_CON9, 16, 1), - MTK_PIN_DRV_GRP(162, DRV_CON9, 16, 1), - MTK_PIN_DRV_GRP(163, DRV_CON9, 20, 1), - MTK_PIN_DRV_GRP(164, DRV_CON9, 20, 1), - MTK_PIN_DRV_GRP(165, DRV_CON9, 20, 1), - MTK_PIN_DRV_GRP(166, DRV_CON9, 20, 1), - MTK_PIN_DRV_GRP(167, DRV_CON9, 20, 1), - MTK_PIN_DRV_GRP(168, DRV_CON9, 20, 1), - MTK_PIN_DRV_GRP(169, DRV_CON9, 20, 1), - MTK_PIN_DRV_GRP(170, DRV_CON9, 20, 1), + PINS_FIELD_DRV(143, 146, DRV_CON9, 11, 1), + PINS_FIELD_DRV(147, 154, DRV_CON9, 15, 1), + PINS_FIELD_DRV(155, 162, DRV_CON9, 19, 1), + PINS_FIELD_DRV(163, 170, DRV_CON9, 23, 1), /* MSDC1_INSI, MSDC2_INSI */ - MTK_PIN_DRV_GRP(171, DRV_CON9, 24, 1), - MTK_PIN_DRV_GRP(172, DRV_CON10, 0, 1), + PIN_FIELD_DRV(171, DRV_CON9, 27, 1), + PIN_FIELD_DRV(172, DRV_CON10, 3, 0), /* MSDC2 */ - MTK_PIN_DRV_GRP(173, DRV_CON10, 4, 1), - MTK_PIN_DRV_GRP(174, DRV_CON10, 8, 3), - MTK_PIN_DRV_GRP(175, DRV_CON10, 8, 3), - MTK_PIN_DRV_GRP(176, DRV_CON10, 12, 3), - MTK_PIN_DRV_GRP(177, DRV_CON12, 20, 3), - MTK_PIN_DRV_GRP(178, DRV_CON10, 8, 3), - MTK_PIN_DRV_GRP(179, DRV_CON10, 8, 3), + PIN_FIELD_DRV(173, DRV_CON10, 7, 0), + PINS_FIELD_DRV(174, 175, DRV_CON10, 11, 0), + PIN_FIELD_DRV(176, DRV_CON10, 15, 0), + PIN_FIELD_DRV(177, DRV_CON12, 23, 0), + PINS_FIELD_DRV(178, 179, DRV_CON10, 11, 0), /* MSDC1 */ - MTK_PIN_DRV_GRP(180, DRV_CON10, 20, 3), - MTK_PIN_DRV_GRP(181, DRV_CON10, 20, 3), - MTK_PIN_DRV_GRP(182, DRV_CON10, 16, 1), - MTK_PIN_DRV_GRP(183, DRV_CON10, 24, 3), - MTK_PIN_DRV_GRP(184, DRV_CON12, 16, 3), - MTK_PIN_DRV_GRP(185, DRV_CON10, 20, 3), - MTK_PIN_DRV_GRP(186, DRV_CON10, 20, 3), + PINS_FIELD_DRV(180, 181, DRV_CON10, 23, 0), + PIN_FIELD_DRV(182, DRV_CON10, 19, 0), + PIN_FIELD_DRV(183, DRV_CON10, 27, 0), + PIN_FIELD_DRV(184, DRV_CON12, 19, 0), + PINS_FIELD_DRV(185, 186, DRV_CON10, 23, 0), /* CMPCLK, CMMCLK, CMRST, CMPDN, CMFLASH */ - MTK_PIN_DRV_GRP(209, DRV_CON11, 0, 1), - MTK_PIN_DRV_GRP(210, DRV_CON11, 4, 1), - MTK_PIN_DRV_GRP(211, DRV_CON11, 8, 1), - MTK_PIN_DRV_GRP(212, DRV_CON11, 12, 1), - MTK_PIN_DRV_GRP(213, DRV_CON11, 16, 1), + PIN_FIELD_DRV(209, DRV_CON11, 3, 0), + PIN_FIELD_DRV(210, DRV_CON11, 7, 0), + PIN_FIELD_DRV(211, DRV_CON11, 11, 0), + PIN_FIELD_DRV(212, DRV_CON11, 15, 0), + PIN_FIELD_DRV(213, DRV_CON11, 19, 0), /* SRCLKENAI */ - MTK_PIN_DRV_GRP(218, DRV_CON11, 20, 1), + PIN_FIELD_DRV(218, DRV_CON11, 23, 0), /* UR3 */ - MTK_PIN_DRV_GRP(219, DRV_CON11, 24, 1), - MTK_PIN_DRV_GRP(220, DRV_CON11, 28, 1), + PIN_FIELD_DRV(219, DRV_CON11, 27, 0), + PIN_FIELD_DRV(220, DRV_CON11, 31, 0), /* PCM0 */ - MTK_PIN_DRV_GRP(221, DRV_CON12, 0, 2), - MTK_PIN_DRV_GRP(222, DRV_CON12, 0, 2), - MTK_PIN_DRV_GRP(223, DRV_CON12, 0, 2), - MTK_PIN_DRV_GRP(224, DRV_CON12, 0, 2), - MTK_PIN_DRV_GRP(225, DRV_CON12, 0, 2), + PINS_FIELD_DRV(221, 235, DRV_CON12, 3, 0), /* MSDC3 */ - MTK_PIN_DRV_GRP(226, DRV_CON12, 4, 0), - MTK_PIN_DRV_GRP(227, DRV_CON12, 4, 0), - MTK_PIN_DRV_GRP(228, DRV_CON12, 8, 0), - MTK_PIN_DRV_GRP(229, DRV_CON12, 24, 0), - MTK_PIN_DRV_GRP(230, DRV_CON12, 4, 0), - MTK_PIN_DRV_GRP(231, DRV_CON12, 4, 0), + PINS_FIELD_DRV(226, 227, DRV_CON12, 7, 0), + PIN_FIELD_DRV(228, DRV_CON12, 11, 0), + PIN_FIELD_DRV(229, DRV_CON12, 27, 0), + PINS_FIELD_DRV(230, 231, DRV_CON12, 7, 0), }; -#define MT6589_SIM_MODE_PER_REG 3 -#define MT6589_SIM_MODE_BITS 4 +static const struct mtk_pin_field_calc mt6589_pin_smt_range[] = { + PIN_FIELD_CALC(0, 113, 0, 0x0300, 0x10, 0, 1, 16, 0), + PIN_FIELD_CALC(114, 169, 1, 0x0370, 0x10, 2, 1, 16, 0), + PIN_FIELD_CALC(170, 231, 0, 0x03a0, 0x10, 10, 1, 16, 0), +}; -/* based on mtk_pmx_set_mode (pinctrl-mtk-common.c)*/ -static void mt6589_pinmux_set(struct regmap *reg, unsigned int pin, unsigned int mode) -{ - unsigned int pin2, reg_addr, val; - unsigned char bit; - unsigned int mask = (1L << MT6589_SIM_MODE_BITS) - 1; - if (pin < 44 || pin > 49) return; - - pin2 = pin - 44; - if (pin2 <= 2) reg_addr = 0x0980; - else reg_addr = 0x09a0; - - mode &= mask; - bit = pin2 % MT6589_SIM_MODE_PER_REG; - mask <<= (MT6589_SIM_MODE_BITS * bit); - val = (mode << (MT6589_SIM_MODE_BITS * bit)); - regmap_update_bits(reg, reg_addr, mask, val); -} +static const struct mtk_pin_field_calc mt6589_pin_drv_range[] = { + /* MSDC0_DAT 7 to 4 */ + PINS_FIELD_DRV(0, 3, DRV_CON0, 0, 0), -static int mt6589_pull_set(struct regmap *regmap, - const struct mtk_pinctrl_devdata *devdata, - unsigned int pin, bool isup, unsigned int arg) -{ - unsigned int pin2, reg_addr, bit_en, bit_sel; - unsigned int mask, val; - bool enable = (arg != MTK_PUPD_SET_R1R0_00); + /* MSDC0_RSTB */ + PIN_FIELD_DRV(4, DRV_CON0, 8, 0), + + /* MSDC0_CMD */ + PIN_FIELD_DRV(5, DRV_CON0, 4, 0), - if (pin < 44 || pin > 49) - return -EINVAL; + /* MSDC0_CLK */ + PIN_FIELD_DRV(6, DRV_CON12, 12, 0), - pin2 = pin - 44; - if (pin2 <= 2) - reg_addr = 0x0990; - else - reg_addr = 0x09b0; + /* MSDC0_DAT 3 to 0 */ + PINS_FIELD_DRV(7, 10, DRV_CON0, 0, 0), - bit_en = (pin2 % 3) + 4; - bit_sel = (pin2 % 3) + 8; + /* NFI */ + PINS_FIELD_DRV(11, 17, DRV_CON0, 12, 0), - mask = BIT(bit_en) | BIT(bit_sel); - val = (enable ? BIT(bit_en) : 0) | (isup ? BIT(bit_sel) : 0); + /* NLD 0 to 15 */ + PINS_FIELD_DRV(18, 25, DRV_CON0, 16, 0), + PINS_FIELD_DRV(26, 33, DRV_CON0, 20, 0), - regmap_update_bits(regmap, reg_addr, mask, val); + /* EINT 0 to 4 */ + PIN_FIELD_DRV(34, DRV_CON0, 24, 0), + PIN_FIELD_DRV(35, DRV_CON0, 28, 0), + PIN_FIELD_DRV(36, DRV_CON1, 0, 0), + PIN_FIELD_DRV(37, DRV_CON1, 4, 0), + PIN_FIELD_DRV(38, DRV_CON1, 8, 0), - return 0; -} + /* SPI0 */ + PINS_FIELD_DRV(39, 43, DRV_CON1, 12, 0), -/* TODO: MSDC_R0, BIAS */ -static const struct mtk_pinctrl_devdata mt6589_pinctrl_data = { + /* SIM */ + PINS_FIELD_DRV(44, 49, DRV_CON1, 16, 0), + + /* ADC */ + PINS_FIELD_DRV(50, 53, DRV_CON1, 20, 0), + + /* DAC */ + PINS_FIELD_DRV(53, 55, DRV_CON1, 24, 0), + + /* RTC32K_CK */ + /* + PIN_FIELD_DRV(56, , , 0), // no drive? + */ + + /* IDDIG */ + PIN_FIELD_DRV(57, DRV_CON1, 28, 0), + + /* WATCHDOG */ + PIN_FIELD_DRV(58, DRV_CON2, 0, 0), + + /* SRCLKENA */ + PIN_FIELD_DRV(59, DRV_CON2, 4, 0), + + /* SRCVOLTEN */ + PIN_FIELD_DRV(60, DRV_CON2, 8, 0), + + /* JTAG */ + PINS_FIELD_DRV(61, 66, DRV_CON3, 0, 0), + + /* UR2 */ + PIN_FIELD_DRV(69, DRV_CON3, 4, 0), + PIN_FIELD_DRV(70, DRV_CON3, 8, 0), + PIN_FIELD_DRV(71, DRV_CON3, 12, 0), + PIN_FIELD_DRV(72, DRV_CON3, 16, 0), + + /* PWM 1 to 4 */ + PIN_FIELD_DRV(73, DRV_CON3, 20, 0), + PIN_FIELD_DRV(74, DRV_CON3, 24, 0), + PIN_FIELD_DRV(75, DRV_CON3, 28, 0), + PIN_FIELD_DRV(76, DRV_CON4, 0, 0), + + /* UR1 */ + PIN_FIELD_DRV(77, DRV_CON4, 4, 0), + PIN_FIELD_DRV(78, DRV_CON4, 8, 0), + PIN_FIELD_DRV(79, DRV_CON4, 12, 0), + PIN_FIELD_DRV(80, DRV_CON4, 16, 0), + + /* UR4 */ + PIN_FIELD_DRV(81, DRV_CON4, 20, 0), + PIN_FIELD_DRV(82, DRV_CON4, 24, 0), + + /* BPI1B */ + PINS_FIELD_DRV(83, 99, DRV_CON5, 12, 0), + + /* VM 1, 0 */ + PINS_FIELD_DRV(100, 101, DRV_CON5, 12, 0), + + /* BSI 1 */ + PINS_FIELD_DRV(102, 104, DRV_CON5, 16, 0), + + /* TXBPI1 */ + PIN_FIELD_DRV(105, DRV_CON5, 20, 0), + + /* EXT_CLK_EN */ + PIN_FIELD_DRV(106, DRV_CON4, 28, 0), + + /* SRCLKENA2 */ + PIN_FIELD_DRV(107, DRV_CON5, 0, 0), + + /* BSI1A */ + PINS_FIELD_DRV(108, 112, DRV_CON5, 4, 0), + + /* BSI1C */ + PINS_FIELD_DRV(113, 114, DRV_CON5, 8, 0), + + /* EINT10_AUXIN2, EINT11_AUXIN3, EINT16_AUXIN3 */ + PIN_FIELD_DRV(115, DRV_CON6, 0, 1), + PIN_FIELD_DRV(116, DRV_CON6, 4, 1), + PIN_FIELD_DRV(117, DRV_CON6, 8, 1), + + /* I2S */ + PINS_FIELD_DRV(120, 123, DRV_CON6, 12, 1), + + /* EINT 5 to 9 */ + PIN_FIELD_DRV(124, DRV_CON6, 16, 1), + PIN_FIELD_DRV(125, DRV_CON6, 20, 1), + PIN_FIELD_DRV(126, DRV_CON6, 24, 1), + PIN_FIELD_DRV(127, DRV_CON6, 28, 1), + PIN_FIELD_DRV(128, DRV_CON7, 0, 1), + + /* DISP_PWM */ + PIN_FIELD_DRV(129, DRV_CON7, 28, 1), + + /* LPTE/MSDC4_DAT0, LRSTB/MSDC4_DAT1 */ + PINS_FIELD_DRV(130, 131, DRV_CON8, 20, 1), + + /* LPCE1B, LPCE0B */ + PIN_FIELD_DRV(132, DRV_CON8, 28, 1), + PIN_FIELD_DRV(133, DRV_CON9, 0, 1), + + /* SPI1 / MSDC4 */ + PINS_FIELD_DRV(134, 137, DRV_CON8, 20, 1), + + /* LCD / MSDC4 */ + PIN_FIELD_DRV(138, DRV_CON8, 20, 1), + PIN_FIELD_DRV(139, DRV_CON8, 0, 1), + PIN_FIELD_DRV(140, DRV_CON8, 20, 1), + PIN_FIELD_DRV(141, DRV_CON7, 16, 1), + PIN_FIELD_DRV(142, DRV_CON7, 20, 1), + + /* DPI */ + PINS_FIELD_DRV(143, 146, DRV_CON9, 8, 1), + PINS_FIELD_DRV(147, 154, DRV_CON9, 12, 1), + PINS_FIELD_DRV(155, 162, DRV_CON9, 16, 1), + PINS_FIELD_DRV(163, 170, DRV_CON9, 20, 1), + + /* MSDC1_INSI, MSDC2_INSI */ + PIN_FIELD_DRV(171, DRV_CON9, 24, 1), + PIN_FIELD_DRV(172, DRV_CON10, 0, 0), + + /* MSDC2 */ + PIN_FIELD_DRV(173, DRV_CON10, 4, 0), + PINS_FIELD_DRV(174, 175, DRV_CON10, 8, 0), + PIN_FIELD_DRV(176, DRV_CON10, 12, 0), + PIN_FIELD_DRV(177, DRV_CON12, 20, 0), + PINS_FIELD_DRV(178, 179, DRV_CON10, 8, 0), + + /* MSDC1 */ + PINS_FIELD_DRV(180, 181, DRV_CON10, 20, 0), + PIN_FIELD_DRV(182, DRV_CON10, 16, 0), + PIN_FIELD_DRV(183, DRV_CON10, 24, 0), + PIN_FIELD_DRV(184, DRV_CON12, 16, 0), + PINS_FIELD_DRV(185, 186, DRV_CON10, 20, 0), + + /* CMPCLK, CMMCLK, CMRST, CMPDN, CMFLASH */ + PIN_FIELD_DRV(209, DRV_CON11, 0, 0), + PIN_FIELD_DRV(210, DRV_CON11, 4, 0), + PIN_FIELD_DRV(211, DRV_CON11, 8, 0), + PIN_FIELD_DRV(212, DRV_CON11, 12, 0), + PIN_FIELD_DRV(213, DRV_CON11, 16, 0), + + /* SRCLKENAI */ + PIN_FIELD_DRV(218, DRV_CON11, 20, 0), + + /* UR3 */ + PIN_FIELD_DRV(219, DRV_CON11, 24, 0), + PIN_FIELD_DRV(220, DRV_CON11, 28, 0), + + /* PCM0 */ + PINS_FIELD_DRV(221, 225, DRV_CON12, 0, 0), + + /* MSDC3 */ + PINS_FIELD_DRV(226, 227, DRV_CON12, 4, 0), + PIN_FIELD_DRV(228, DRV_CON12, 8, 0), + PIN_FIELD_DRV(229, DRV_CON12, 24, 0), + PINS_FIELD_DRV(230, 231, DRV_CON12, 4, 0), +}; + +/* +static const struct mtk_pin_field_calc mt6589_pin_r0_range[] = { + PIN_FIELD_R0(0, 6), + PIN_FIELD_R0(1, 5), + PIN_FIELD_R0(2, 10), + PIN_FIELD_R0(3, 9), + PIN_FIELD_R0(4, 8), + PIN_FIELD_R0(5, 7), + PIN_FIELD_R0(6, 3), + PIN_FIELD_R0(7, 2), + PIN_FIELD_R0(8, 1), + PIN_FIELD_R0(9, 0), + PIN_FIELD_R0(10, 229), + PIN_FIELD_R0(11, 228), + PIN_FIELD_R0(12, 231), + PIN_FIELD_R0(13, 230), + PIN_FIELD_R0(14, 226), + PIN_FIELD_R0(15, 227), + PIN_FIELD_R0(16, 139), + PIN_FIELD_R0(17, 141), + PIN_FIELD_R0(18, 130), + PIN_FIELD_R0(19, 131), + PIN_FIELD_R0(20, 138), + PIN_FIELD_R0(21, 140), + PIN_FIELD_R0(22, 137), + PIN_FIELD_R0(23, 134), + PIN_FIELD_R0(24, 135), + PIN_FIELD_R0(25, 136), +}; +*/ + +static const struct mtk_pin_field_calc mt6589_pin_ies_range[] = { + PIN_FIELD_CALC(0, 113, 0, 0x0100, 0x10, 0, 1, 16, 0), + PIN_FIELD_CALC(114, 169, 1, 0x0170, 0x10, 2, 1, 16, 0), + PIN_FIELD_CALC(170, 231, 0, 0x01a0, 0x10, 10, 1, 16, 0), +}; + +static const struct mtk_pin_field_calc mt6589_pin_pullen_range[] = { + PIN_FIELD_CALC(0, 113, 0, 0x0200, 0x10, 0, 1, 16, 0), + // FIXME: GPIO_PULLEN2, GPIO44~49 + PIN_FIELD_CALC(114, 169, 1, 0x0270, 0x10, 2, 1, 16, 0), + PIN_FIELD_CALC(170, 231, 0, 0x02a0, 0x10, 10, 1, 16, 0), +}; + +static const struct mtk_pin_field_calc mt6589_pin_pullsel_range[] = { + PIN_FIELD_CALC(0, 113, 0, 0x0400, 0x10, 0, 1, 16, 0), + // FIXME: GPIO_PULLSEL2, GPIO44~49 + PIN_FIELD_CALC(114, 169, 1, 0x0470, 0x10, 2, 1, 16, 0), + PIN_FIELD_CALC(170, 231, 0, 0x04a0, 0x10, 10, 1, 16, 0), +}; + +static const struct mtk_pin_reg_calc mt6589_reg_cals[PINCTRL_PIN_REG_MAX] = { + [PINCTRL_PIN_REG_MODE] = MTK_RANGE(mt6589_pin_mode_range), + [PINCTRL_PIN_REG_DIR] = MTK_RANGE(mt6589_pin_dir_range), + [PINCTRL_PIN_REG_DI] = MTK_RANGE(mt6589_pin_di_range), + [PINCTRL_PIN_REG_DO] = MTK_RANGE(mt6589_pin_do_range), + [PINCTRL_PIN_REG_SR] = MTK_RANGE(mt6589_pin_sr_range), + [PINCTRL_PIN_REG_SMT] = MTK_RANGE(mt6589_pin_smt_range), + [PINCTRL_PIN_REG_DRV] = MTK_RANGE(mt6589_pin_drv_range), +// [PINCTRL_PIN_REG_R0] = MTK_RANGE(mt6589_pin_r0_range), + [PINCTRL_PIN_REG_IES] = MTK_RANGE(mt6589_pin_ies_range), + [PINCTRL_PIN_REG_PULLEN] = MTK_RANGE(mt6589_pin_pullen_range), + [PINCTRL_PIN_REG_PULLSEL] = MTK_RANGE(mt6589_pin_pullsel_range), +}; + +// DINV(no GPIO44~49), BIAS, SIMx_2 + +static const char * const mt6589_pinctrl_register_base_names[] = { + "gpio", "gpio1", +}; + +static const struct mtk_eint_hw mt6589_eint_hw = { + .port_mask = 7, + .ports = 6, + .ap_num = 192, + .db_cnt = 16, + .db_time = debounce_time_mt6795, +}; + +static const struct mtk_pin_soc mt6589_pinctrl_data = { + .reg_cal = mt6589_reg_cals, .pins = mtk_pins_mt6589, .npins = ARRAY_SIZE(mtk_pins_mt6589), - .grp_desc = mt6589_drv_grp, - .n_grp_cls = ARRAY_SIZE(mt6589_drv_grp), - .pin_drv_grp = mt6589_pin_drv, - .n_pin_drv_grps = ARRAY_SIZE(mt6589_pin_drv), - .drv_multibase = true, - .spec_pull_set = mt6589_pull_set, - .dir_offset = 0x0000, - .ies_offset = 0x0100, - .ies_multibase = true, - .pullen_offset = 0x0200, - .pullen_multibase = true, - .smt_offset = 0x0300, - .smt_multibase = true, - .pullsel_offset = 0x0400, - .pullsel_multibase = true, - .dout_offset = 0x0800, - .din_offset = 0x0a00, - .pinmux_offset = 0x0c00, - .spec_pinmux_set = mt6589_pinmux_set, - .type1_start = 114, - .type1_end = 169 + 1, - .port_shf = 4, - .port_mask = 0xf, - .port_align = 4, - .mode_mask = 0xf, - .mode_per_reg = 5, - .mode_shf = 4, - .eint_hw = { - .port_mask = 7, - .ports = 6, - .ap_num = 192, - .db_cnt = 16, - .db_time = debounce_time_mt6795, - }, + .ngrps = ARRAY_SIZE(mtk_pins_mt6589), + .eint_hw = &mt6589_eint_hw, + .gpio_m = 0, + .base_names = mt6589_pinctrl_register_base_names, + .nbase_names = ARRAY_SIZE(mt6589_pinctrl_register_base_names), +// .pull_type = +/* disable? */ +// .bias_disable_set = mtk_pinconf_bias_set_combo, +// .bias_disable_get = mtk_pinconf_bias_get_combo, +// .bias_set = +// .bias_get = +/* maybe */ + .bias_set_combo = mtk_pinconf_bias_set_combo, + .bias_get_combo = mtk_pinconf_bias_get_combo, + .drive_set = mtk_pinconf_drive_set_rev1, + .drive_get = mtk_pinconf_drive_get_rev1, +/* maybe */ + .adv_pull_set = mtk_pinconf_adv_pull_set, + .adv_pull_get = mtk_pinconf_adv_pull_get, +// .adv_drive_set = +// .adv_drive_get = }; -static const struct of_device_id mt6589_pctrl_match[] = { +static const struct of_device_id mt6589_pinctrl_match[] = { { .compatible = "mediatek,mt6589-pinctrl", .data = &mt6589_pinctrl_data }, {}, }; -MODULE_DEVICE_TABLE(of, mt6589_pctrl_match); +MODULE_DEVICE_TABLE(of, mt6589_pinctrl_match); -static struct platform_driver mtk_pinctrl_driver = { - .probe = mtk_pctrl_common_probe, +static struct platform_driver mt6589_pinctrl_driver = { + .probe = mtk_paris_pinctrl_probe, .driver = { .name = "mediatek-mt6589-pinctrl", - .of_match_table = mt6589_pctrl_match, - .pm = pm_sleep_ptr(&mtk_eint_pm_ops), + .of_match_table = mt6589_pinctrl_match, }, }; -static int __init mtk_pinctrl_init(void) +static int __init mt6589_pinctrl_init(void) { - return platform_driver_register(&mtk_pinctrl_driver); + return platform_driver_register(&mt6589_pinctrl_driver); } -arch_initcall(mtk_pinctrl_init); +arch_initcall(mt6589_pinctrl_init); + +MODULE_LICENSE("GPL v2"); +MODULE_DESCRIPTION("MediaTek MT6589 Pinctrl Driver"); diff --git a/drivers/pinctrl/mediatek/pinctrl-mt8127.c b/drivers/pinctrl/mediatek/pinctrl-mt8127.c index 1ec1ddb317c33e2..f5030a9ea40b424 100644 --- a/drivers/pinctrl/mediatek/pinctrl-mt8127.c +++ b/drivers/pinctrl/mediatek/pinctrl-mt8127.c @@ -272,6 +272,8 @@ static const struct mtk_pinctrl_devdata mt8127_pinctrl_data = { .dout_offset = 0x0400, .din_offset = 0x0500, .pinmux_offset = 0x0600, + .type1_start = 143, + .type1_end = 143, .port_shf = 4, .port_mask = 0xf, .port_align = 4, diff --git a/drivers/pinctrl/mediatek/pinctrl-mt8135.c b/drivers/pinctrl/mediatek/pinctrl-mt8135.c index 9c9689be33be25b..77c6ac464e8607e 100644 --- a/drivers/pinctrl/mediatek/pinctrl-mt8135.c +++ b/drivers/pinctrl/mediatek/pinctrl-mt8135.c @@ -292,23 +292,15 @@ static const struct mtk_pinctrl_devdata mt8135_pinctrl_data = { .n_grp_cls = ARRAY_SIZE(mt8135_drv_grp), .pin_drv_grp = mt8135_pin_drv, .n_pin_drv_grps = ARRAY_SIZE(mt8135_pin_drv), - .drv_multibase = true, .spec_pull_set = spec_pull_set, .dir_offset = 0x0000, - .dir_multibase = true, .ies_offset = 0x0100, - .ies_multibase = true, .pullen_offset = 0x0200, - .pullen_multibase = true, .smt_offset = 0x0300, - .smt_multibase = true, .pullsel_offset = 0x0400, - .pullsel_multibase = true, .dout_offset = 0x0800, - .dout_multibase = true, .din_offset = 0x0A00, .pinmux_offset = 0x0C00, - .pinmux_multibase = true, .type1_start = 34, .type1_end = 149, .port_shf = 4, diff --git a/drivers/pinctrl/mediatek/pinctrl-mt8167.c b/drivers/pinctrl/mediatek/pinctrl-mt8167.c index 27dfaabbf41ed66..143c26622272525 100644 --- a/drivers/pinctrl/mediatek/pinctrl-mt8167.c +++ b/drivers/pinctrl/mediatek/pinctrl-mt8167.c @@ -305,6 +305,8 @@ static const struct mtk_pinctrl_devdata mt8167_pinctrl_data = { .dout_offset = 0x0100, .din_offset = 0x0200, .pinmux_offset = 0x0300, + .type1_start = 125, + .type1_end = 125, .port_shf = 4, .port_mask = 0xf, .port_align = 4, diff --git a/drivers/pinctrl/mediatek/pinctrl-mt8173.c b/drivers/pinctrl/mediatek/pinctrl-mt8173.c index cc1ad89635021bb..b214deeafbf1d6d 100644 --- a/drivers/pinctrl/mediatek/pinctrl-mt8173.c +++ b/drivers/pinctrl/mediatek/pinctrl-mt8173.c @@ -313,6 +313,8 @@ static const struct mtk_pinctrl_devdata mt8173_pinctrl_data = { .dout_offset = 0x0400, .din_offset = 0x0500, .pinmux_offset = 0x0600, + .type1_start = 135, + .type1_end = 135, .port_shf = 4, .port_mask = 0xf, .port_align = 4, diff --git a/drivers/pinctrl/mediatek/pinctrl-mt8365.c b/drivers/pinctrl/mediatek/pinctrl-mt8365.c index a58175cd81de17e..c20b9e2e02ddadc 100644 --- a/drivers/pinctrl/mediatek/pinctrl-mt8365.c +++ b/drivers/pinctrl/mediatek/pinctrl-mt8365.c @@ -456,6 +456,8 @@ static const struct mtk_pinctrl_devdata mt8365_pinctrl_data = { .smt_offset = 0x0470, .pullen_offset = 0x0860, .pullsel_offset = 0x0900, + .type1_start = 145, + .type1_end = 145, .port_shf = 4, .port_mask = 0x1f, .port_align = 4, diff --git a/drivers/pinctrl/mediatek/pinctrl-mt8516.c b/drivers/pinctrl/mediatek/pinctrl-mt8516.c index c91e5f001c10908..abda75d4354e282 100644 --- a/drivers/pinctrl/mediatek/pinctrl-mt8516.c +++ b/drivers/pinctrl/mediatek/pinctrl-mt8516.c @@ -305,6 +305,8 @@ static const struct mtk_pinctrl_devdata mt8516_pinctrl_data = { .dout_offset = 0x0100, .din_offset = 0x0200, .pinmux_offset = 0x0300, + .type1_start = 125, + .type1_end = 125, .port_shf = 4, .port_mask = 0xf, .port_align = 4, diff --git a/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c b/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c index 4918d38abfc29de..dbe170ac07d338c 100644 --- a/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c +++ b/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c @@ -43,6 +43,7 @@ static const struct mtk_drive_desc mtk_drive[] = { [DRV_GRP2] = { 2, 8, 2, 1 }, [DRV_GRP3] = { 2, 8, 2, 2 }, [DRV_GRP4] = { 2, 16, 2, 1 }, + [DRV_GRP5] = { 4, 32, 4, 1 }, }; static void mtk_w32(struct mtk_pinctrl *pctl, u8 i, u32 reg, u32 val) diff --git a/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.h b/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.h index 36d2898037dd041..eef342caf56b6ac 100644 --- a/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.h +++ b/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.h @@ -104,6 +104,7 @@ enum { DRV_GRP2, DRV_GRP3, DRV_GRP4, + DRV_GRP5, DRV_GRP_MAX, }; diff --git a/drivers/pinctrl/mediatek/pinctrl-mtk-common.c b/drivers/pinctrl/mediatek/pinctrl-mtk-common.c index f4abb23bd26a594..7c1c54781c7af13 100644 --- a/drivers/pinctrl/mediatek/pinctrl-mtk-common.c +++ b/drivers/pinctrl/mediatek/pinctrl-mtk-common.c @@ -42,15 +42,14 @@ static const char * const mtk_gpio_functions[] = { }; /* - * Some chips (e.g., mt8135) have multiple base addresses for pin configuration. - * When multibase is true and the pin number falls within the specified range - * [type1_start, type1_end), the second base address should be used. + * There are two base address for pull related configuration + * in mt8135, and different GPIO pins use different base address. + * When pin number greater than type1_start and less than type1_end, + * should use the second base address. */ static struct regmap *mtk_get_regmap(struct mtk_pinctrl *pctl, - unsigned long pin, bool multibase) + unsigned long pin) { - if (!multibase) - return pctl->regmap1; if (pin >= pctl->devdata->type1_start && pin < pctl->devdata->type1_end) return pctl->regmap2; return pctl->regmap1; @@ -83,8 +82,7 @@ static int mtk_pmx_gpio_set_direction(struct pinctrl_dev *pctldev, else reg_addr = SET_ADDR(reg_addr, pctl); - regmap_write(mtk_get_regmap(pctl, offset, pctl->devdata->dir_multibase), - reg_addr, bit); + regmap_write(mtk_get_regmap(pctl, offset), reg_addr, bit); return 0; } @@ -102,8 +100,7 @@ static int mtk_gpio_set(struct gpio_chip *chip, unsigned int offset, int value) else reg_addr = CLR_ADDR(reg_addr, pctl); - return regmap_write(mtk_get_regmap(pctl, offset, pctl->devdata->dout_multibase), - reg_addr, bit); + return regmap_write(mtk_get_regmap(pctl, offset), reg_addr, bit); } static int mtk_pconf_set_ies_smt(struct mtk_pinctrl *pctl, unsigned pin, @@ -111,7 +108,6 @@ static int mtk_pconf_set_ies_smt(struct mtk_pinctrl *pctl, unsigned pin, { unsigned int reg_addr, offset; unsigned int bit; - bool multibase; /** * Due to some soc are not support ies/smt config, add this special @@ -127,18 +123,12 @@ static int mtk_pconf_set_ies_smt(struct mtk_pinctrl *pctl, unsigned pin, arg == PIN_CONFIG_INPUT_SCHMITT_ENABLE) return -EINVAL; - if (arg == PIN_CONFIG_INPUT_ENABLE) - multibase = pctl->devdata->ies_multibase; - else - multibase = pctl->devdata->smt_multibase; - /* * Due to some pins are irregular, their input enable and smt * control register are discontinuous, so we need this special handle. */ if (pctl->devdata->spec_ies_smt_set) { - return pctl->devdata->spec_ies_smt_set( - mtk_get_regmap(pctl, pin, multibase), + return pctl->devdata->spec_ies_smt_set(mtk_get_regmap(pctl, pin), pctl->devdata, pin, value, arg); } @@ -154,7 +144,7 @@ static int mtk_pconf_set_ies_smt(struct mtk_pinctrl *pctl, unsigned pin, else reg_addr = CLR_ADDR(mtk_get_port(pctl, pin) + offset, pctl); - regmap_write(mtk_get_regmap(pctl, pin, multibase), reg_addr, bit); + regmap_write(mtk_get_regmap(pctl, pin), reg_addr, bit); return 0; } @@ -239,8 +229,7 @@ static int mtk_pconf_set_driving(struct mtk_pinctrl *pctl, shift = pin_drv->bit + drv_grp->low_bit; mask <<= shift; val <<= shift; - return regmap_update_bits( - mtk_get_regmap(pctl, pin, pctl->devdata->drv_multibase), + return regmap_update_bits(mtk_get_regmap(pctl, pin), pin_drv->offset, mask, val); } @@ -325,9 +314,9 @@ static int mtk_pconf_set_pull_select(struct mtk_pinctrl *pctl, * the parameter should be "MTK_PUPD_SET_R1R0_00". */ r1r0 = enable ? arg : MTK_PUPD_SET_R1R0_00; - ret = pctl->devdata->spec_pull_set( - mtk_get_regmap(pctl, pin, pctl->devdata->pullsel_multibase), - pctl->devdata, pin, isup, r1r0); + ret = pctl->devdata->spec_pull_set(mtk_get_regmap(pctl, pin), + pctl->devdata, pin, isup, + r1r0); if (!ret) return 0; } @@ -345,8 +334,7 @@ static int mtk_pconf_set_pull_select(struct mtk_pinctrl *pctl, pctl->devdata->pullen_offset; reg_pullsel = mtk_get_port(pctl, pin) + pctl->devdata->pullsel_offset; - /* MT8365 do not use multibase. */ - ret = pctl->devdata->mt8365_set_clr_mode(pctl->regmap1, + ret = pctl->devdata->mt8365_set_clr_mode(mtk_get_regmap(pctl, pin), bit, reg_pullen, reg_pullsel, enable, isup); if (ret) @@ -370,10 +358,8 @@ static int mtk_pconf_set_pull_select(struct mtk_pinctrl *pctl, reg_pullsel = CLR_ADDR(mtk_get_port(pctl, pin) + pctl->devdata->pullsel_offset, pctl); - regmap_write(mtk_get_regmap(pctl, pin, pctl->devdata->pullen_multibase), - reg_pullen, bit); - regmap_write(mtk_get_regmap(pctl, pin, pctl->devdata->pullsel_multibase), - reg_pullsel, bit); + regmap_write(mtk_get_regmap(pctl, pin), reg_pullen, bit); + regmap_write(mtk_get_regmap(pctl, pin), reg_pullsel, bit); return 0; } @@ -724,9 +710,8 @@ static int mtk_pmx_set_mode(struct pinctrl_dev *pctldev, struct mtk_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); if (pctl->devdata->spec_pinmux_set) - pctl->devdata->spec_pinmux_set( - mtk_get_regmap(pctl, pin, pctl->devdata->pinmux_multibase), - pin, mode); + pctl->devdata->spec_pinmux_set(mtk_get_regmap(pctl, pin), + pin, mode); reg_addr = ((pin / pctl->devdata->mode_per_reg) << pctl->devdata->port_shf) + pctl->devdata->pinmux_offset; @@ -735,9 +720,8 @@ static int mtk_pmx_set_mode(struct pinctrl_dev *pctldev, bit = pin % pctl->devdata->mode_per_reg; mask <<= (GPIO_MODE_BITS * bit); val = (mode << (GPIO_MODE_BITS * bit)); - return regmap_update_bits( - mtk_get_regmap(pctl, pin, pctl->devdata->pinmux_multibase), - reg_addr, mask, val); + return regmap_update_bits(mtk_get_regmap(pctl, pin), + reg_addr, mask, val); } static const struct mtk_desc_pin * @@ -848,8 +832,7 @@ static int mtk_gpio_get_direction(struct gpio_chip *chip, unsigned offset) if (pctl->devdata->spec_dir_set) pctl->devdata->spec_dir_set(®_addr, offset); - regmap_read(mtk_get_regmap(pctl, offset, pctl->devdata->dir_multibase), - reg_addr, &read_val); + regmap_read(pctl->regmap1, reg_addr, &read_val); if (read_val & bit) return GPIO_LINE_DIRECTION_OUT; @@ -867,8 +850,7 @@ static int mtk_gpio_get(struct gpio_chip *chip, unsigned offset) pctl->devdata->din_offset; bit = BIT(offset & pctl->devdata->mode_mask); - regmap_read(mtk_get_regmap(pctl, offset, pctl->devdata->din_multibase), - reg_addr, &read_val); + regmap_read(pctl->regmap1, reg_addr, &read_val); return !!(read_val & bit); } diff --git a/drivers/pinctrl/mediatek/pinctrl-mtk-common.h b/drivers/pinctrl/mediatek/pinctrl-mtk-common.h index 81793d2973f8664..3b96f3dd338d0e5 100644 --- a/drivers/pinctrl/mediatek/pinctrl-mtk-common.h +++ b/drivers/pinctrl/mediatek/pinctrl-mtk-common.h @@ -276,15 +276,6 @@ struct mtk_pinctrl_devdata { unsigned int mode_mask; unsigned int mode_per_reg; unsigned int mode_shf; - bool dir_multibase; - bool ies_multibase; - bool smt_multibase; - bool pullen_multibase; - bool pullsel_multibase; - bool drv_multibase; - bool dout_multibase; - bool din_multibase; - bool pinmux_multibase; }; struct mtk_pinctrl { diff --git a/drivers/pinctrl/mediatek/pinctrl-mtk-mt6589.h b/drivers/pinctrl/mediatek/pinctrl-mtk-mt6589.h index 116879d078fb022..9199db04118d3d1 100644 --- a/drivers/pinctrl/mediatek/pinctrl-mtk-mt6589.h +++ b/drivers/pinctrl/mediatek/pinctrl-mtk-mt6589.h @@ -1,18 +1,18 @@ // SPDX-License-Identifier: GPL-2.0-only /* - * Author: akku + * Author: Akari Tsuyukusa */ #ifndef __PINCTRL_MTK_MT6589_H #define __PINCTRL_MTK_MT6589_H -#include -#include "pinctrl-mtk-common.h" +#include "pinctrl-paris.h" -static const struct mtk_desc_pin mtk_pins_mt6589[] = { - MTK_PIN(PINCTRL_PIN(0, "GPIO0"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 49), +static const struct mtk_pin_desc mtk_pins_mt6589[] = { + MTK_PIN( + 0, "GPIO0", + MTK_EINT_FUNCTION(0, 49), + DRV_GRP4, MTK_FUNCTION(0, "GPIO0"), MTK_FUNCTION(1, "MSDC0_DAT7"), MTK_FUNCTION(2, "EINT49"), @@ -22,9 +22,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(6, "SPI1_MO"), MTK_FUNCTION(7, "NALE") ), - MTK_PIN(PINCTRL_PIN(1, "GPIO1"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 48), + MTK_PIN( + 1, "GPIO1", + MTK_EINT_FUNCTION(0, 48), + DRV_GRP4, MTK_FUNCTION(0, "GPIO1"), MTK_FUNCTION(1, "MSDC0_DAT6"), MTK_FUNCTION(2, "EINT48"), @@ -34,9 +35,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(6, "SPI1_CSN"), MTK_FUNCTION(7, "NCLE") ), - MTK_PIN(PINCTRL_PIN(2, "GPIO2"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 47), + MTK_PIN( + 2, "GPIO2", + MTK_EINT_FUNCTION(0, 47), + DRV_GRP4, MTK_FUNCTION(0, "GPIO2"), MTK_FUNCTION(1, "MSDC0_DAT5"), MTK_FUNCTION(2, "EINT47"), @@ -46,18 +48,20 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(6, "SPI1_CLK"), MTK_FUNCTION(7, "NLD4") ), - MTK_PIN(PINCTRL_PIN(3, "GPIO3"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 46), + MTK_PIN( + 3, "GPIO3", + MTK_EINT_FUNCTION(0, 46), + DRV_GRP4, MTK_FUNCTION(0, "GPIO3"), MTK_FUNCTION(1, "MSDC0_DAT4"), MTK_FUNCTION(2, "EINT46"), MTK_FUNCTION(6, "LSCE1B_2X"), MTK_FUNCTION(7, "NLD5") ), - MTK_PIN(PINCTRL_PIN(4, "GPIO4"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 50), + MTK_PIN( + 4, "GPIO4", + MTK_EINT_FUNCTION(0, 50), + DRV_GRP1, MTK_FUNCTION(0, "GPIO4"), MTK_FUNCTION(1, "MSDC0_RSTB"), MTK_FUNCTION(2, "EINT50"), @@ -66,70 +70,78 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(6, "SPI1_MI"), MTK_FUNCTION(7, "NLD10") ), - MTK_PIN(PINCTRL_PIN(5, "GPIO5"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 41), + MTK_PIN( + 5, "GPIO5", + MTK_EINT_FUNCTION(0, 41), + DRV_GRP4, MTK_FUNCTION(0, "GPIO5"), MTK_FUNCTION(1, "MSDC0_CMD"), MTK_FUNCTION(2, "EINT41"), MTK_FUNCTION(6, "LRSTB_2X"), MTK_FUNCTION(7, "NRNB") ), - MTK_PIN(PINCTRL_PIN(6, "GPIO6"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 40), + MTK_PIN( + 6, "GPIO6", + MTK_EINT_FUNCTION(0, 40), + DRV_GRP4, MTK_FUNCTION(0, "GPIO6"), MTK_FUNCTION(1, "MSDC0_CLK"), MTK_FUNCTION(2, "EINT40"), MTK_FUNCTION(6, "LPTE"), MTK_FUNCTION(7, "NREB") ), - MTK_PIN(PINCTRL_PIN(7, "GPIO7"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 45), + MTK_PIN( + 7, "GPIO7", + MTK_EINT_FUNCTION(0, 45), + DRV_GRP4, MTK_FUNCTION(0, "GPIO7"), MTK_FUNCTION(1, "MSDC0_DAT3"), MTK_FUNCTION(2, "EINT45"), MTK_FUNCTION(6, "LSCE0B_2X"), MTK_FUNCTION(7, "NLD7") ), - MTK_PIN(PINCTRL_PIN(8, "GPIO8"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 44), + MTK_PIN( + 8, "GPIO8", + MTK_EINT_FUNCTION(0, 44), + DRV_GRP4, MTK_FUNCTION(0, "GPIO8"), MTK_FUNCTION(1, "MSDC0_DAT2"), MTK_FUNCTION(2, "EINT44"), MTK_FUNCTION(6, "LSA0_2X"), MTK_FUNCTION(7, "NLD14") ), - MTK_PIN(PINCTRL_PIN(9, "GPIO9"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 43), + MTK_PIN( + 9, "GPIO9", + MTK_EINT_FUNCTION(0, 43), + DRV_GRP4, MTK_FUNCTION(0, "GPIO9"), MTK_FUNCTION(1, "MSDC0_DAT1"), MTK_FUNCTION(2, "EINT43"), MTK_FUNCTION(6, "LSCK_2X"), MTK_FUNCTION(7, "NLD11") ), - MTK_PIN(PINCTRL_PIN(10, "GPIO10"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 42), + MTK_PIN( + 10, "GPIO10", + MTK_EINT_FUNCTION(0, 42), + DRV_GRP4, MTK_FUNCTION(0, "GPIO10"), MTK_FUNCTION(1, "MSDC0_DAT0"), MTK_FUNCTION(2, "EINT42"), MTK_FUNCTION(6, "LSDA_2X") ), - MTK_PIN(PINCTRL_PIN(11, "GPIO11"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 139), + MTK_PIN( + 11, "GPIO11", + MTK_EINT_FUNCTION(0, 139), + DRV_GRP1, MTK_FUNCTION(0, "GPIO11"), MTK_FUNCTION(1, "NCEB0"), MTK_FUNCTION(2, "EINT139"), MTK_FUNCTION(7, "TESTA_OUT4") ), - MTK_PIN(PINCTRL_PIN(12, "GPIO12"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 140), + MTK_PIN( + 12, "GPIO12", + MTK_EINT_FUNCTION(0, 140), + DRV_GRP1, MTK_FUNCTION(0, "GPIO12"), MTK_FUNCTION(1, "NCEB1"), MTK_FUNCTION(2, "EINT140"), @@ -138,18 +150,20 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(6, "USB_DRVVBUS"), MTK_FUNCTION(7, "TESTA_OUT5") ), - MTK_PIN(PINCTRL_PIN(13, "GPIO13"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 141), + MTK_PIN( + 13, "GPIO13", + MTK_EINT_FUNCTION(0, 141), + DRV_GRP1, MTK_FUNCTION(0, "GPIO13"), MTK_FUNCTION(1, "NRNB"), MTK_FUNCTION(2, "EINT141"), MTK_FUNCTION(6, "MD_ABB_AFUNC_D[0]"), MTK_FUNCTION(7, "TESTA_OUT6") ), - MTK_PIN(PINCTRL_PIN(14, "GPIO14"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 142), + MTK_PIN( + 14, "GPIO14", + MTK_EINT_FUNCTION(0, 142), + DRV_GRP1, MTK_FUNCTION(0, "GPIO14"), MTK_FUNCTION(1, "NCLE"), MTK_FUNCTION(2, "EINT142"), @@ -158,9 +172,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(6, "NALE"), MTK_FUNCTION(7, "TESTA_OUT7") ), - MTK_PIN(PINCTRL_PIN(15, "GPIO15"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 143), + MTK_PIN( + 15, "GPIO15", + MTK_EINT_FUNCTION(0, 143), + DRV_GRP1, MTK_FUNCTION(0, "GPIO15"), MTK_FUNCTION(1, "NALE"), MTK_FUNCTION(2, "EINT143"), @@ -170,9 +185,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(6, "NCLE"), MTK_FUNCTION(7, "TESTA_OUT8") ), - MTK_PIN(PINCTRL_PIN(16, "GPIO16"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 144), + MTK_PIN( + 16, "GPIO16", + MTK_EINT_FUNCTION(0, 144), + DRV_GRP1, MTK_FUNCTION(0, "GPIO16"), MTK_FUNCTION(1, "NREB"), MTK_FUNCTION(2, "EINT144"), @@ -182,9 +198,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(6, "MD_ABB_AFUNC_D[1]"), MTK_FUNCTION(7, "TESTA_OUT9") ), - MTK_PIN(PINCTRL_PIN(17, "GPIO17"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 145), + MTK_PIN( + 17, "GPIO17", + MTK_EINT_FUNCTION(0, 145), + DRV_GRP1, MTK_FUNCTION(0, "GPIO17"), MTK_FUNCTION(1, "NWEB"), MTK_FUNCTION(2, "EINT145"), @@ -194,9 +211,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(6, "MD_ABB_AFUNC_D[2]"), MTK_FUNCTION(7, "TESTA_OUT10") ), - MTK_PIN(PINCTRL_PIN(18, "GPIO18"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 146), + MTK_PIN( + 18, "GPIO18", + MTK_EINT_FUNCTION(0, 146), + DRV_GRP1, MTK_FUNCTION(0, "GPIO18"), MTK_FUNCTION(1, "NLD0"), MTK_FUNCTION(2, "EINT146"), @@ -206,9 +224,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(6, "DAC_CK"), MTK_FUNCTION(7, "TESTA_OUT11") ), - MTK_PIN(PINCTRL_PIN(19, "GPIO19"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 147), + MTK_PIN( + 19, "GPIO19", + MTK_EINT_FUNCTION(0, 147), + DRV_GRP1, MTK_FUNCTION(0, "GPIO19"), MTK_FUNCTION(1, "NLD1"), MTK_FUNCTION(2, "EINT147"), @@ -218,9 +237,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(6, "DAC_WS"), MTK_FUNCTION(7, "TESTA_OUT12") ), - MTK_PIN(PINCTRL_PIN(20, "GPIO20"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 148), + MTK_PIN( + 20, "GPIO20", + MTK_EINT_FUNCTION(0, 148), + DRV_GRP1, MTK_FUNCTION(0, "GPIO20"), MTK_FUNCTION(1, "NLD2"), MTK_FUNCTION(2, "EINT148"), @@ -230,9 +250,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(6, "DAC_DAT_OUT"), MTK_FUNCTION(7, "TESTA_OUT13") ), - MTK_PIN(PINCTRL_PIN(21, "GPIO21"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 149), + MTK_PIN( + 21, "GPIO21", + MTK_EINT_FUNCTION(0, 149), + DRV_GRP1, MTK_FUNCTION(0, "GPIO21"), MTK_FUNCTION(1, "NLD3"), MTK_FUNCTION(2, "EINT149"), @@ -241,9 +262,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(6, "MD_ABB_AFUNC_D[3]"), MTK_FUNCTION(7, "TESTA_OUT14") ), - MTK_PIN(PINCTRL_PIN(22, "GPIO22"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 150), + MTK_PIN( + 22, "GPIO22", + MTK_EINT_FUNCTION(0, 150), + DRV_GRP1, MTK_FUNCTION(0, "GPIO22"), MTK_FUNCTION(1, "NLD4"), MTK_FUNCTION(2, "EINT150"), @@ -253,9 +275,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(6, "MD2_DAI_RX_GPIO"), MTK_FUNCTION(7, "TESTA_OUT15") ), - MTK_PIN(PINCTRL_PIN(23, "GPIO23"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 151), + MTK_PIN( + 23, "GPIO23", + MTK_EINT_FUNCTION(0, 151), + DRV_GRP1, MTK_FUNCTION(0, "GPIO23"), MTK_FUNCTION(1, "NLD5"), MTK_FUNCTION(2, "EINT151"), @@ -264,9 +287,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(6, "MD_ABB_AFUNC_D[4]"), MTK_FUNCTION(7, "TESTA_OUT16") ), - MTK_PIN(PINCTRL_PIN(24, "GPIO24"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 152), + MTK_PIN( + 24, "GPIO24", + MTK_EINT_FUNCTION(0, 152), + DRV_GRP1, MTK_FUNCTION(0, "GPIO24"), MTK_FUNCTION(1, "NLD6"), MTK_FUNCTION(2, "EINT152"), @@ -275,9 +299,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(6, "MD_ABB_AFUNC_D[5]"), MTK_FUNCTION(7, "TESTA_OUT17") ), - MTK_PIN(PINCTRL_PIN(25, "GPIO25"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 153), + MTK_PIN( + 25, "GPIO25", + MTK_EINT_FUNCTION(0, 153), + DRV_GRP1, MTK_FUNCTION(0, "GPIO25"), MTK_FUNCTION(1, "NLD7"), MTK_FUNCTION(2, "EINT153"), @@ -286,9 +311,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(6, "MD_ABB_AFUNC_D[6]"), MTK_FUNCTION(7, "TESTA_OUT18") ), - MTK_PIN(PINCTRL_PIN(26, "GPIO26"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 154), + MTK_PIN( + 26, "GPIO26", + MTK_EINT_FUNCTION(0, 154), + DRV_GRP1, MTK_FUNCTION(0, "GPIO26"), MTK_FUNCTION(1, "NLD8"), MTK_FUNCTION(2, "EINT154"), @@ -297,9 +323,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(6, "MD_ABB_AFUNC_D[7]"), MTK_FUNCTION(7, "TESTA_OUT19") ), - MTK_PIN(PINCTRL_PIN(27, "GPIO27"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 155), + MTK_PIN( + 27, "GPIO27", + MTK_EINT_FUNCTION(0, 155), + DRV_GRP1, MTK_FUNCTION(0, "GPIO27"), MTK_FUNCTION(1, "NLD9"), MTK_FUNCTION(2, "EINT155"), @@ -309,9 +336,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(6, "MD_ABB_AFUNC_D[8]"), MTK_FUNCTION(7, "TESTA_OUT20") ), - MTK_PIN(PINCTRL_PIN(28, "GPIO28"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 156), + MTK_PIN( + 28, "GPIO28", + MTK_EINT_FUNCTION(0, 156), + DRV_GRP1, MTK_FUNCTION(0, "GPIO28"), MTK_FUNCTION(1, "NLD10"), MTK_FUNCTION(2, "EINT156"), @@ -321,9 +349,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(6, "MD_ABB_AFUNC_D[9]"), MTK_FUNCTION(7, "TESTA_OUT21") ), - MTK_PIN(PINCTRL_PIN(29, "GPIO29"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 157), + MTK_PIN( + 29, "GPIO29", + MTK_EINT_FUNCTION(0, 157), + DRV_GRP1, MTK_FUNCTION(0, "GPIO29"), MTK_FUNCTION(1, "NLD11"), MTK_FUNCTION(2, "EINT157"), @@ -333,9 +362,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(6, "MD_ABB_AFUNC_D[10]"), MTK_FUNCTION(7, "TESTA_OUT22") ), - MTK_PIN(PINCTRL_PIN(30, "GPIO30"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 158), + MTK_PIN( + 30, "GPIO30", + MTK_EINT_FUNCTION(0, 158), + DRV_GRP1, MTK_FUNCTION(0, "GPIO30"), MTK_FUNCTION(1, "NLD12"), MTK_FUNCTION(2, "EINT158"), @@ -345,9 +375,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(6, "MD_ABB_AFUNC_D[11]"), MTK_FUNCTION(7, "TESTA_OUT23") ), - MTK_PIN(PINCTRL_PIN(31, "GPIO31"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 159), + MTK_PIN( + 31, "GPIO31", + MTK_EINT_FUNCTION(0, 159), + DRV_GRP1, MTK_FUNCTION(0, "GPIO31"), MTK_FUNCTION(1, "NLD13"), MTK_FUNCTION(2, "EINT159"), @@ -357,9 +388,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(6, "MD_ABB_AFUNC_D[12]"), MTK_FUNCTION(7, "TESTA_OUT24") ), - MTK_PIN(PINCTRL_PIN(32, "GPIO32"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 160), + MTK_PIN( + 32, "GPIO32", + MTK_EINT_FUNCTION(0, 160), + DRV_GRP1, MTK_FUNCTION(0, "GPIO32"), MTK_FUNCTION(1, "NLD14"), MTK_FUNCTION(2, "EINT160"), @@ -369,9 +401,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(6, "MD_ABB_AFUNC_D[13]"), MTK_FUNCTION(7, "TESTA_OUT25") ), - MTK_PIN(PINCTRL_PIN(33, "GPIO33"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 161), + MTK_PIN( + 33, "GPIO33", + MTK_EINT_FUNCTION(0, 161), + DRV_GRP1, MTK_FUNCTION(0, "GPIO33"), MTK_FUNCTION(1, "NLD15"), MTK_FUNCTION(2, "EINT161"), @@ -381,9 +414,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(6, "MD_ABB_AFUNC_D[14]"), MTK_FUNCTION(7, "TESTA_OUT26") ), - MTK_PIN(PINCTRL_PIN(34, "GPIO34"), - NULL, "mt6589", - MTK_EINT_FUNCTION(6, 0), + MTK_PIN( + 34, "GPIO34", + MTK_EINT_FUNCTION(0, 0), + DRV_GRP3, MTK_FUNCTION(0, "GPIO34"), MTK_FUNCTION(1, "EINT0"), MTK_FUNCTION(2, "PWM1"), @@ -392,9 +426,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(6, "MD1_EINT1"), MTK_FUNCTION(7, "USB_SCL") ), - MTK_PIN(PINCTRL_PIN(35, "GPIO35"), - NULL, "mt6589", - MTK_EINT_FUNCTION(1, 1), + MTK_PIN( + 35, "GPIO35", + MTK_EINT_FUNCTION(0, 1), + DRV_GRP3, MTK_FUNCTION(0, "GPIO35"), MTK_FUNCTION(1, "EINT1"), MTK_FUNCTION(2, "PWM2"), @@ -403,9 +438,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(6, "MD1_EINT2"), MTK_FUNCTION(7, "USB_SDA") ), - MTK_PIN(PINCTRL_PIN(36, "GPIO36"), - NULL, "mt6589", - MTK_EINT_FUNCTION(1, 2), + MTK_PIN( + 36, "GPIO36", + MTK_EINT_FUNCTION(0, 2), + DRV_GRP3, MTK_FUNCTION(0, "GPIO36"), MTK_FUNCTION(1, "EINT2"), MTK_FUNCTION(2, "PWM3"), @@ -413,17 +449,19 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(4, "SRCLKENAI2"), MTK_FUNCTION(6, "MD1_EINT3") ), - MTK_PIN(PINCTRL_PIN(37, "GPIO37"), - NULL, "mt6589", - MTK_EINT_FUNCTION(1, 3), + MTK_PIN( + 37, "GPIO37", + MTK_EINT_FUNCTION(0, 3), + DRV_GRP3, MTK_FUNCTION(0, "GPIO37"), MTK_FUNCTION(1, "EINT3"), MTK_FUNCTION(6, "MD1_EINT5"), MTK_FUNCTION(7, "EXT_26M_CK") ), - MTK_PIN(PINCTRL_PIN(38, "GPIO38"), - NULL, "mt6589", - MTK_EINT_FUNCTION(1, 4), + MTK_PIN( + 38, "GPIO38", + MTK_EINT_FUNCTION(0, 4), + DRV_GRP3, MTK_FUNCTION(0, "GPIO38"), MTK_FUNCTION(1, "EINT4"), MTK_FUNCTION(2, "PWM4"), @@ -432,44 +470,50 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(5, "USB_DRVVBUS"), MTK_FUNCTION(6, "MD1_EINT4") ), - MTK_PIN(PINCTRL_PIN(39, "GPIO39"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 29), + MTK_PIN( + 39, "GPIO39", + MTK_EINT_FUNCTION(0, 29), + DRV_GRP1, MTK_FUNCTION(0, "GPIO39"), MTK_FUNCTION(1, "PWRAP_SPIDI"), MTK_FUNCTION(2, "EINT29") ), - MTK_PIN(PINCTRL_PIN(40, "GPIO40"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 28), + MTK_PIN( + 40, "GPIO40", + MTK_EINT_FUNCTION(0, 28), + DRV_GRP1, MTK_FUNCTION(0, "GPIO40"), MTK_FUNCTION(1, "PWRAP_SPIDO"), MTK_FUNCTION(2, "EINT28") ), - MTK_PIN(PINCTRL_PIN(41, "GPIO41"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 27), + MTK_PIN( + 41, "GPIO41", + MTK_EINT_FUNCTION(0, 27), + DRV_GRP1, MTK_FUNCTION(0, "GPIO41"), MTK_FUNCTION(1, "PWRAP_SPICS_B_I"), MTK_FUNCTION(2, "EINT27") ), - MTK_PIN(PINCTRL_PIN(42, "GPIO42"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 26), + MTK_PIN( + 42, "GPIO42", + MTK_EINT_FUNCTION(0, 26), + DRV_GRP1, MTK_FUNCTION(0, "GPIO42"), MTK_FUNCTION(1, "PWRAP_SPICK_I"), MTK_FUNCTION(2, "EINT26") ), - MTK_PIN(PINCTRL_PIN(43, "GPIO43"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 25), + MTK_PIN( + 43, "GPIO43", + MTK_EINT_FUNCTION(0, 25), + DRV_GRP1, MTK_FUNCTION(0, "GPIO43"), MTK_FUNCTION(1, "PWRAP_EVENT_IN"), MTK_FUNCTION(2, "EINT25") ), - MTK_PIN(PINCTRL_PIN(44, "GPIO44"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 30), + MTK_PIN( + 44, "GPIO44", + MTK_EINT_FUNCTION(0, 30), + DRV_GRP1, MTK_FUNCTION(0, "GPIO44"), MTK_FUNCTION(1, "MD1_SIM1_SCLK"), MTK_FUNCTION(2, "EINT30"), @@ -478,9 +522,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(5, "MD2_SIM2_SCLK"), MTK_FUNCTION(6, "MD_ABB_AFUNC_D[15]") ), - MTK_PIN(PINCTRL_PIN(45, "GPIO45"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 31), + MTK_PIN( + 45, "GPIO45", + MTK_EINT_FUNCTION(0, 31), + DRV_GRP1, MTK_FUNCTION(0, "GPIO45"), MTK_FUNCTION(1, "MD1_SIM1_SRST"), MTK_FUNCTION(2, "EINT31"), @@ -489,9 +534,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(5, "MD2_SIM2_SRST"), MTK_FUNCTION(6, "MD_ABB_AFUNC_D[16]") ), - MTK_PIN(PINCTRL_PIN(46, "GPIO46"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 32), + MTK_PIN( + 46, "GPIO46", + MTK_EINT_FUNCTION(0, 32), + DRV_GRP1, MTK_FUNCTION(0, "GPIO46"), MTK_FUNCTION(1, "MD1_SIM1_SDAT"), MTK_FUNCTION(2, "EINT32"), @@ -500,9 +546,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(5, "MD2_SIM2_SDAT"), MTK_FUNCTION(6, "MD_ABB_AFUNC_D[17]") ), - MTK_PIN(PINCTRL_PIN(47, "GPIO47"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 33), + MTK_PIN( + 47, "GPIO47", + MTK_EINT_FUNCTION(0, 33), + DRV_GRP1, MTK_FUNCTION(0, "GPIO47"), MTK_FUNCTION(1, "MD1_SIM2_SCLK"), MTK_FUNCTION(2, "EINT33"), @@ -511,9 +558,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(5, "MD2_SIM1_SCLK"), MTK_FUNCTION(6, "MD_ABB_AFUNC_D[18]") ), - MTK_PIN(PINCTRL_PIN(48, "GPIO48"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 34), + MTK_PIN( + 48, "GPIO48", + MTK_EINT_FUNCTION(0, 34), + DRV_GRP1, MTK_FUNCTION(0, "GPIO48"), MTK_FUNCTION(1, "MD1_SIM2_SRST"), MTK_FUNCTION(2, "EINT34"), @@ -522,9 +570,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(5, "MD2_SIM1_SRST"), MTK_FUNCTION(6, "MD_ABB_AFUNC_D[19]") ), - MTK_PIN(PINCTRL_PIN(49, "GPIO49"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 35), + MTK_PIN( + 49, "GPIO49", + MTK_EINT_FUNCTION(0, 35), + DRV_GRP1, MTK_FUNCTION(0, "GPIO49"), MTK_FUNCTION(1, "MD1_SIM2_SDAT"), MTK_FUNCTION(2, "EINT35"), @@ -533,147 +582,166 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(5, "MD2_SIM1_SDAT"), MTK_FUNCTION(6, "MD_ABB_AFUNC_D[20]") ), - MTK_PIN(PINCTRL_PIN(50, "GPIO50"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 19), + MTK_PIN( + 50, "GPIO50", + MTK_EINT_FUNCTION(0, 19), + DRV_GRP1, MTK_FUNCTION(0, "GPIO50"), MTK_FUNCTION(1, "ADC_CK"), MTK_FUNCTION(2, "EINT19") ), - MTK_PIN(PINCTRL_PIN(51, "GPIO51"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 21), + MTK_PIN( + 51, "GPIO51", + MTK_EINT_FUNCTION(0, 21), + DRV_GRP1, MTK_FUNCTION(0, "GPIO51"), MTK_FUNCTION(1, "ADC_WS"), MTK_FUNCTION(2, "EINT21") ), - MTK_PIN(PINCTRL_PIN(52, "GPIO52"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 20), + MTK_PIN( + 52, "GPIO52", + MTK_EINT_FUNCTION(0, 20), + DRV_GRP1, MTK_FUNCTION(0, "GPIO52"), MTK_FUNCTION(1, "ADC_DAT_IN"), MTK_FUNCTION(2, "EINT20") ), - MTK_PIN(PINCTRL_PIN(53, "GPIO53"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 22), + MTK_PIN( + 53, "GPIO53", + MTK_EINT_FUNCTION(0, 22), + DRV_GRP1, MTK_FUNCTION(0, "GPIO53"), MTK_FUNCTION(1, "DAC_CK"), MTK_FUNCTION(2, "EINT22") ), - MTK_PIN(PINCTRL_PIN(54, "GPIO54"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 24), + MTK_PIN( + 54, "GPIO54", + MTK_EINT_FUNCTION(0, 24), + DRV_GRP1, MTK_FUNCTION(0, "GPIO54"), MTK_FUNCTION(1, "DAC_WS"), MTK_FUNCTION(2, "EINT24") ), - MTK_PIN(PINCTRL_PIN(55, "GPIO55"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 23), + MTK_PIN( + 55, "GPIO55", + MTK_EINT_FUNCTION(0, 23), + DRV_GRP1, MTK_FUNCTION(0, "GPIO55"), MTK_FUNCTION(1, "DAC_DAT_OUT"), MTK_FUNCTION(2, "EINT23") ), - MTK_PIN(PINCTRL_PIN(56, "GPIO56"), - NULL, "mt6589", + MTK_PIN( + 56, "GPIO56", MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), + DRV_FIXED, /* maybe */ MTK_FUNCTION(0, "GPIO56"), MTK_FUNCTION(1, "RTC32K_CK") ), - MTK_PIN(PINCTRL_PIN(57, "GPIO57"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 34), + MTK_PIN( + 57, "GPIO57", + MTK_EINT_FUNCTION(0, 34), + DRV_GRP3, MTK_FUNCTION(0, "GPIO57"), MTK_FUNCTION(1, "IDDIG"), MTK_FUNCTION(2, "EINT34") ), - MTK_PIN(PINCTRL_PIN(58, "GPIO58"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 36), + MTK_PIN( + 58, "GPIO58", + MTK_EINT_FUNCTION(0, 36), + DRV_GRP1, MTK_FUNCTION(0, "GPIO58"), MTK_FUNCTION(1, "WATCHDOG"), MTK_FUNCTION(2, "EINT36") ), - MTK_PIN(PINCTRL_PIN(59, "GPIO59"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 38), + MTK_PIN( + 59, "GPIO59", + MTK_EINT_FUNCTION(0, 38), + DRV_GRP1, MTK_FUNCTION(0, "GPIO59"), MTK_FUNCTION(1, "SRCLKENA"), MTK_FUNCTION(2, "EINT38") ), - MTK_PIN(PINCTRL_PIN(60, "GPIO60"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 37), + MTK_PIN( + 60, "GPIO60", + MTK_EINT_FUNCTION(0, 37), + DRV_GRP1, MTK_FUNCTION(0, "GPIO60"), MTK_FUNCTION(1, "SRCVOLTEN"), MTK_FUNCTION(2, "EINT37") ), - MTK_PIN(PINCTRL_PIN(61, "GPIO61"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 188), + MTK_PIN( + 61, "GPIO61", + MTK_EINT_FUNCTION(0, 188), + DRV_GRP1, MTK_FUNCTION(0, "GPIO61"), MTK_FUNCTION(1, "JTCK"), MTK_FUNCTION(2, "EINT188"), MTK_FUNCTION(3, "DSP1_ICK"), MTK_FUNCTION(7, "MD2_TCK_PAD") ), - MTK_PIN(PINCTRL_PIN(62, "GPIO62"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 190), + MTK_PIN( + 62, "GPIO62", + MTK_EINT_FUNCTION(0, 190), + DRV_GRP1, MTK_FUNCTION(0, "GPIO62"), MTK_FUNCTION(1, "JTDO"), MTK_FUNCTION(2, "EINT190"), MTK_FUNCTION(3, "DSP2_IMS"), MTK_FUNCTION(7, "MD2_TDO_PAD") ), - MTK_PIN(PINCTRL_PIN(63, "GPIO63"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 0), + MTK_PIN( + 63, "GPIO63", + MTK_EINT_FUNCTION(0, 0), + DRV_GRP1, MTK_FUNCTION(0, "GPIO63"), MTK_FUNCTION(1, "JTRST_B"), MTK_FUNCTION(2, "EINT0"), MTK_FUNCTION(3, "DSP2_ICK"), MTK_FUNCTION(7, "MD2_NTRST_PAD") ), - MTK_PIN(PINCTRL_PIN(64, "GPIO64"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 189), + MTK_PIN( + 64, "GPIO64", + MTK_EINT_FUNCTION(0, 189), + DRV_GRP1, MTK_FUNCTION(0, "GPIO64"), MTK_FUNCTION(1, "JTDI"), MTK_FUNCTION(2, "EINT189"), MTK_FUNCTION(3, "DSP1_IMS"), MTK_FUNCTION(7, "MD2_TDI_PAD") ), - MTK_PIN(PINCTRL_PIN(65, "GPIO65"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 187), + MTK_PIN( + 65, "GPIO65", + MTK_EINT_FUNCTION(0, 187), + DRV_GRP1, MTK_FUNCTION(0, "GPIO65"), MTK_FUNCTION(1, "JRTCK"), MTK_FUNCTION(2, "EINT187"), MTK_FUNCTION(3, "DSP1_ID"), MTK_FUNCTION(7, "MD2_RTCK_PAD") ), - MTK_PIN(PINCTRL_PIN(66, "GPIO66"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 191), + MTK_PIN( + 66, "GPIO66", + MTK_EINT_FUNCTION(0, 191), + DRV_GRP1, MTK_FUNCTION(0, "GPIO66"), MTK_FUNCTION(1, "JTMS"), MTK_FUNCTION(2, "EINT191"), MTK_FUNCTION(3, "DSP2_ID"), MTK_FUNCTION(7, "MD2_TMS_PAD") ), - MTK_PIN(PINCTRL_PIN(67, "GPIO67"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 97), + MTK_PIN( + 67, "GPIO67", + MTK_EINT_FUNCTION(0, 97), + DRV_FIXED, MTK_FUNCTION(0, "GPIO67"), MTK_FUNCTION(1, "SDA3"), MTK_FUNCTION(2, "EINT97"), MTK_FUNCTION(7, "A_FUNC_DIN[13]") ), - MTK_PIN(PINCTRL_PIN(68, "GPIO68"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 96), + MTK_PIN( + 68, "GPIO68", + MTK_EINT_FUNCTION(0, 96), + DRV_FIXED, MTK_FUNCTION(0, "GPIO68"), MTK_FUNCTION(1, "SCL3"), MTK_FUNCTION(2, "EINT96"), @@ -681,9 +749,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(4, "PWM6"), MTK_FUNCTION(7, "A_FUNC_DIN[14]") ), - MTK_PIN(PINCTRL_PIN(69, "GPIO69"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 83), + MTK_PIN( + 69, "GPIO69", + MTK_EINT_FUNCTION(0, 83), + DRV_GRP1, MTK_FUNCTION(0, "GPIO69"), MTK_FUNCTION(1, "URXD2"), MTK_FUNCTION(2, "EINT83"), @@ -693,9 +762,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(6, "UTXD2"), MTK_FUNCTION(7, "MD1_EINT4") ), - MTK_PIN(PINCTRL_PIN(70, "GPIO70"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 82), + MTK_PIN( + 70, "GPIO70", + MTK_EINT_FUNCTION(0, 82), + DRV_GRP1, MTK_FUNCTION(0, "GPIO70"), MTK_FUNCTION(1, "UTXD2"), MTK_FUNCTION(2, "EINT82"), @@ -705,9 +775,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(6, "URXD2"), MTK_FUNCTION(7, "MD1_EINT3") ), - MTK_PIN(PINCTRL_PIN(71, "GPIO71"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 84), + MTK_PIN( + 71, "GPIO71", + MTK_EINT_FUNCTION(0, 84), + DRV_GRP1, MTK_FUNCTION(0, "GPIO71"), MTK_FUNCTION(1, "UCTS2"), MTK_FUNCTION(2, "EINT84"), @@ -717,9 +788,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(6, "URTS2"), MTK_FUNCTION(7, "MD2_EINT1") ), - MTK_PIN(PINCTRL_PIN(72, "GPIO72"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 85), + MTK_PIN( + 72, "GPIO72", + MTK_EINT_FUNCTION(0, 85), + DRV_GRP1, MTK_FUNCTION(0, "GPIO72"), MTK_FUNCTION(1, "URTS2"), MTK_FUNCTION(2, "EINT85"), @@ -729,9 +801,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(6, "UCTS2"), MTK_FUNCTION(7, "MD2_EINT2") ), - MTK_PIN(PINCTRL_PIN(73, "GPIO73"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 73), + MTK_PIN( + 73, "GPIO73", + MTK_EINT_FUNCTION(0, 73), + DRV_GRP1, MTK_FUNCTION(0, "GPIO73"), MTK_FUNCTION(1, "PWM1"), MTK_FUNCTION(2, "EINT73"), @@ -741,9 +814,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(6, "DISP_PWM"), MTK_FUNCTION(7, "MD2_TCK_PAD") ), - MTK_PIN(PINCTRL_PIN(74, "GPIO74"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 74), + MTK_PIN( + 74, "GPIO74", + MTK_EINT_FUNCTION(0, 74), + DRV_GRP1, MTK_FUNCTION(0, "GPIO74"), MTK_FUNCTION(1, "PWM2"), MTK_FUNCTION(2, "EINT74"), @@ -753,9 +827,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(6, "DISP_PWM"), MTK_FUNCTION(7, "MD2_RTCK_PAD") ), - MTK_PIN(PINCTRL_PIN(75, "GPIO75"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 75), + MTK_PIN( + 75, "GPIO75", + MTK_EINT_FUNCTION(0, 75), + DRV_GRP1, MTK_FUNCTION(0, "GPIO75"), MTK_FUNCTION(1, "PWM3"), MTK_FUNCTION(2, "EINT75"), @@ -765,9 +840,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(6, "DISP_PWM"), MTK_FUNCTION(7, "MD2_NTRST_PAD") ), - MTK_PIN(PINCTRL_PIN(76, "GPIO76"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 76), + MTK_PIN( + 76, "GPIO76", + MTK_EINT_FUNCTION(0, 76), + DRV_GRP1, MTK_FUNCTION(0, "GPIO76"), MTK_FUNCTION(1, "PWM4"), MTK_FUNCTION(2, "EINT76"), @@ -776,9 +852,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(6, "DISP_PWM"), MTK_FUNCTION(7, "MD2_TMS_PAD") ), - MTK_PIN(PINCTRL_PIN(77, "GPIO77"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 79), + MTK_PIN( + 77, "GPIO77", + MTK_EINT_FUNCTION(0, 79), + DRV_GRP1, MTK_FUNCTION(0, "GPIO77"), MTK_FUNCTION(1, "URXD1"), MTK_FUNCTION(2, "EINT79"), @@ -788,9 +865,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(6, "UTXD1"), MTK_FUNCTION(7, "MD2_TDO_PAD") ), - MTK_PIN(PINCTRL_PIN(78, "GPIO78"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 78), + MTK_PIN( + 78, "GPIO78", + MTK_EINT_FUNCTION(0, 78), + DRV_GRP1, MTK_FUNCTION(0, "GPIO78"), MTK_FUNCTION(1, "UTXD1"), MTK_FUNCTION(2, "EINT78"), @@ -800,9 +878,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(6, "URXD1"), MTK_FUNCTION(7, "MD2_TDI_PAD") ), - MTK_PIN(PINCTRL_PIN(79, "GPIO79"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 80), + MTK_PIN( + 79, "GPIO79", + MTK_EINT_FUNCTION(0, 80), + DRV_GRP1, MTK_FUNCTION(0, "GPIO79"), MTK_FUNCTION(1, "UCTS1"), MTK_FUNCTION(2, "EINT80"), @@ -812,9 +891,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(6, "URTS1"), MTK_FUNCTION(7, "MD1_EINT1") ), - MTK_PIN(PINCTRL_PIN(80, "GPIO80"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 81), + MTK_PIN( + 80, "GPIO80", + MTK_EINT_FUNCTION(0, 81), + DRV_GRP1, MTK_FUNCTION(0, "GPIO80"), MTK_FUNCTION(1, "URTS1"), MTK_FUNCTION(2, "EINT81"), @@ -824,9 +904,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(6, "UCTS1"), MTK_FUNCTION(7, "MD1_EINT2") ), - MTK_PIN(PINCTRL_PIN(81, "GPIO81"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 89), + MTK_PIN( + 81, "GPIO81", + MTK_EINT_FUNCTION(0, 89), + DRV_GRP1, MTK_FUNCTION(0, "GPIO81"), MTK_FUNCTION(1, "URXD4"), MTK_FUNCTION(2, "EINT89"), @@ -836,9 +917,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(6, "UTXD4"), MTK_FUNCTION(7, "MD2_EINT5") ), - MTK_PIN(PINCTRL_PIN(82, "GPIO82"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 88), + MTK_PIN( + 82, "GPIO82", + MTK_EINT_FUNCTION(0, 88), + DRV_GRP1, MTK_FUNCTION(0, "GPIO82"), MTK_FUNCTION(1, "UTXD4"), MTK_FUNCTION(2, "EINT88"), @@ -848,9 +930,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(6, "URXD4"), MTK_FUNCTION(7, "MD1_EINT5") ), - MTK_PIN(PINCTRL_PIN(83, "GPIO83"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 1), + MTK_PIN( + 83, "GPIO83", + MTK_EINT_FUNCTION(0, 1), + DRV_GRP1, MTK_FUNCTION(0, "GPIO83"), MTK_FUNCTION(1, "DUAL_BPI1_BUS0"), MTK_FUNCTION(2, "EINT1"), @@ -858,9 +941,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(5, "USB_TEST_IO[0]"), MTK_FUNCTION(7, "A_FUNC_DIN[31]") ), - MTK_PIN(PINCTRL_PIN(84, "GPIO84"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 2), + MTK_PIN( + 84, "GPIO84", + MTK_EINT_FUNCTION(0, 2), + DRV_GRP1, MTK_FUNCTION(0, "GPIO84"), MTK_FUNCTION(1, "DUAL_BPI1_BUS1"), MTK_FUNCTION(2, "EINT2"), @@ -868,9 +952,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(5, "USB_TEST_IO[1]"), MTK_FUNCTION(7, "A_FUNC_DIN[30]") ), - MTK_PIN(PINCTRL_PIN(85, "GPIO85"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 3), + MTK_PIN( + 85, "GPIO85", + MTK_EINT_FUNCTION(0, 3), + DRV_GRP1, MTK_FUNCTION(0, "GPIO85"), MTK_FUNCTION(1, "DUAL_BPI1_BUS2"), MTK_FUNCTION(2, "EINT3"), @@ -878,9 +963,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(5, "USB_TEST_IO[2]"), MTK_FUNCTION(7, "A_FUNC_DIN[29]") ), - MTK_PIN(PINCTRL_PIN(86, "GPIO86"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 4), + MTK_PIN( + 86, "GPIO86", + MTK_EINT_FUNCTION(0, 4), + DRV_GRP1, MTK_FUNCTION(0, "GPIO86"), MTK_FUNCTION(1, "DUAL_BPI1_BUS3"), MTK_FUNCTION(2, "EINT4"), @@ -888,9 +974,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(5, "USB_TEST_IO[3]"), MTK_FUNCTION(7, "A_FUNC_DIN[28]") ), - MTK_PIN(PINCTRL_PIN(87, "GPIO87"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 5), + MTK_PIN( + 87, "GPIO87", + MTK_EINT_FUNCTION(0, 5), + DRV_GRP1, MTK_FUNCTION(0, "GPIO87"), MTK_FUNCTION(1, "DUAL_BPI1_BUS4"), MTK_FUNCTION(2, "EINT5"), @@ -898,9 +985,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(5, "USB_TEST_IO[4]"), MTK_FUNCTION(7, "A_FUNC_DIN[27]") ), - MTK_PIN(PINCTRL_PIN(88, "GPIO88"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 6), + MTK_PIN( + 88, "GPIO88", + MTK_EINT_FUNCTION(0, 6), + DRV_GRP1, MTK_FUNCTION(0, "GPIO88"), MTK_FUNCTION(1, "DUAL_BPI1_BUS5"), MTK_FUNCTION(2, "EINT6"), @@ -908,9 +996,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(5, "USB_TEST_IO[5]"), MTK_FUNCTION(7, "A_FUNC_DIN[26]") ), - MTK_PIN(PINCTRL_PIN(89, "GPIO89"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 7), + MTK_PIN( + 89, "GPIO89", + MTK_EINT_FUNCTION(0, 7), + DRV_GRP1, MTK_FUNCTION(0, "GPIO89"), MTK_FUNCTION(1, "DUAL_BPI1_BUS6"), MTK_FUNCTION(2, "EINT7"), @@ -918,9 +1007,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(5, "USB_TEST_IO[6]"), MTK_FUNCTION(7, "A_FUNC_DIN[25]") ), - MTK_PIN(PINCTRL_PIN(90, "GPIO90"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 8), + MTK_PIN( + 90, "GPIO90", + MTK_EINT_FUNCTION(0, 8), + DRV_GRP1, MTK_FUNCTION(0, "GPIO90"), MTK_FUNCTION(1, "DUAL_BPI1_BUS7"), MTK_FUNCTION(2, "EINT8"), @@ -930,9 +1020,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(6, "USB_DRVVBUS"), MTK_FUNCTION(7, "A_FUNC_DIN[24]") ), - MTK_PIN(PINCTRL_PIN(91, "GPIO91"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 9), + MTK_PIN( + 91, "GPIO91", + MTK_EINT_FUNCTION(0, 9), + DRV_GRP1, MTK_FUNCTION(0, "GPIO91"), MTK_FUNCTION(1, "DUAL_BPI1_BUS8"), MTK_FUNCTION(2, "EINT9"), @@ -940,9 +1031,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(5, "USB_TEST_IO[8]"), MTK_FUNCTION(7, "A_FUNC_DIN[23]") ), - MTK_PIN(PINCTRL_PIN(92, "GPIO92"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 10), + MTK_PIN( + 92, "GPIO92", + MTK_EINT_FUNCTION(0, 10), + DRV_GRP1, MTK_FUNCTION(0, "GPIO92"), MTK_FUNCTION(1, "DUAL_BPI1_BUS9"), MTK_FUNCTION(2, "EINT10"), @@ -950,54 +1042,60 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(5, "USB_TEST_IO[9]"), MTK_FUNCTION(7, "A_FUNC_DIN[22]") ), - MTK_PIN(PINCTRL_PIN(93, "GPIO93"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 11), + MTK_PIN( + 93, "GPIO93", + MTK_EINT_FUNCTION(0, 11), + DRV_GRP1, MTK_FUNCTION(0, "GPIO93"), MTK_FUNCTION(1, "DUAL_BPI1_BUS10"), MTK_FUNCTION(2, "EINT11"), MTK_FUNCTION(5, "USB_TEST_IO[10]"), MTK_FUNCTION(7, "A_FUNC_DIN[21]") ), - MTK_PIN(PINCTRL_PIN(94, "GPIO94"), - NULL, "mt6589", + MTK_PIN( + 94, "GPIO94", MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), + DRV_GRP1, MTK_FUNCTION(0, "GPIO94"), MTK_FUNCTION(1, "DUAL_BPI1_BUS11"), MTK_FUNCTION(3, "BPI2_BUS11"), MTK_FUNCTION(5, "USB_TEST_IO[11]"), MTK_FUNCTION(7, "A_FUNC_DOUT[7]") ), - MTK_PIN(PINCTRL_PIN(95, "GPIO95"), - NULL, "mt6589", + MTK_PIN( + 95, "GPIO95", MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), + DRV_GRP1, MTK_FUNCTION(0, "GPIO95"), MTK_FUNCTION(1, "DUAL_BPI1_BUS12"), MTK_FUNCTION(3, "BPI2_BUS12"), MTK_FUNCTION(5, "USB_TEST_IO[12]"), MTK_FUNCTION(7, "A_FUNC_DOUT[6]") ), - MTK_PIN(PINCTRL_PIN(96, "GPIO96"), - NULL, "mt6589", + MTK_PIN( + 96, "GPIO96", MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), + DRV_GRP1, MTK_FUNCTION(0, "GPIO96"), MTK_FUNCTION(1, "DUAL_BPI1_BUS13"), MTK_FUNCTION(3, "BPI2_BUS13"), MTK_FUNCTION(5, "USB_TEST_IO[13]"), MTK_FUNCTION(7, "A_FUNC_DOUT[5]") ), - MTK_PIN(PINCTRL_PIN(97, "GPIO97"), - NULL, "mt6589", + MTK_PIN( + 97, "GPIO97", MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), + DRV_GRP1, MTK_FUNCTION(0, "GPIO97"), MTK_FUNCTION(1, "DUAL_BPI1_BUS14"), MTK_FUNCTION(3, "BPI2_BUS16"), MTK_FUNCTION(5, "USB_TEST_IO[14]"), MTK_FUNCTION(7, "A_FUNC_DOUT[4]") ), - MTK_PIN(PINCTRL_PIN(98, "GPIO98"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 16), + MTK_PIN( + 98, "GPIO98", + MTK_EINT_FUNCTION(0, 16), + DRV_GRP1, MTK_FUNCTION(0, "GPIO98"), MTK_FUNCTION(1, "DUAL_BPI1_BUS17"), MTK_FUNCTION(2, "EINT16"), @@ -1005,9 +1103,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(5, "USB_TEST_IO[15]"), MTK_FUNCTION(7, "A_FUNC_DOUT[3]") ), - MTK_PIN(PINCTRL_PIN(99, "GPIO99"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 17), + MTK_PIN( + 99, "GPIO99", + MTK_EINT_FUNCTION(0, 17), + DRV_GRP1, MTK_FUNCTION(0, "GPIO99"), MTK_FUNCTION(1, "DUAL_BPI1_BUS15"), MTK_FUNCTION(2, "EINT17"), @@ -1015,74 +1114,83 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(5, "USB_TEST_IO[16]"), MTK_FUNCTION(7, "A_FUNC_DOUT[2]") ), - MTK_PIN(PINCTRL_PIN(100, "GPIO100"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 19), + MTK_PIN( + 100, "GPIO100", + MTK_EINT_FUNCTION(0, 19), + DRV_GRP1, MTK_FUNCTION(0, "GPIO100"), MTK_FUNCTION(1, "VM1"), MTK_FUNCTION(2, "EINT19"), MTK_FUNCTION(5, "USB_TEST_IO[17]"), MTK_FUNCTION(7, "A_FUNC_DOUT[0]") ), - MTK_PIN(PINCTRL_PIN(101, "GPIO101"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 18), + MTK_PIN( + 101, "GPIO101", + MTK_EINT_FUNCTION(0, 18), + DRV_GRP1, MTK_FUNCTION(0, "GPIO101"), MTK_FUNCTION(1, "VM0"), MTK_FUNCTION(2, "EINT18"), MTK_FUNCTION(5, "USB_TEST_IO[18]"), MTK_FUNCTION(7, "A_FUNC_DOUT[1]") ), - MTK_PIN(PINCTRL_PIN(102, "GPIO102"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 26), + MTK_PIN( + 102, "GPIO102", + MTK_EINT_FUNCTION(0, 26), + DRV_GRP1, MTK_FUNCTION(0, "GPIO102"), MTK_FUNCTION(1, "BSI1B_CS0"), MTK_FUNCTION(2, "EINT26"), MTK_FUNCTION(5, "USB_TEST_IO[19]"), MTK_FUNCTION(6, "MD_ABB_AFUNC_D[21]") ), - MTK_PIN(PINCTRL_PIN(103, "GPIO103"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 27), + MTK_PIN( + 103, "GPIO103", + MTK_EINT_FUNCTION(0, 27), + DRV_GRP1, MTK_FUNCTION(0, "GPIO103"), MTK_FUNCTION(1, "BSI1B_DATA0"), MTK_FUNCTION(2, "EINT27"), MTK_FUNCTION(5, "USB_TEST_IO[20]"), MTK_FUNCTION(6, "MD_ABB_AFUNC_D[22]") ), - MTK_PIN(PINCTRL_PIN(104, "GPIO104"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 25), + MTK_PIN( + 104, "GPIO104", + MTK_EINT_FUNCTION(0, 25), + DRV_GRP1, MTK_FUNCTION(0, "GPIO104"), MTK_FUNCTION(1, "BSI1B_CLK"), MTK_FUNCTION(2, "EINT25"), MTK_FUNCTION(5, "USB_TEST_IO[21]"), MTK_FUNCTION(6, "MD_ABB_AFUNC_D[23]") ), - MTK_PIN(PINCTRL_PIN(105, "GPIO105"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 30), + MTK_PIN( + 105, "GPIO105", + MTK_EINT_FUNCTION(0, 30), + DRV_GRP1, MTK_FUNCTION(0, "GPIO105"), MTK_FUNCTION(1, "TXBPI1"), MTK_FUNCTION(2, "EINT30") ), - MTK_PIN(PINCTRL_PIN(106, "GPIO106"), - NULL, "mt6589", + MTK_PIN( + 106, "GPIO106", MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), + DRV_GRP1, MTK_FUNCTION(0, "GPIO106"), MTK_FUNCTION(1, "EXT_CLK_EN") ), - MTK_PIN(PINCTRL_PIN(107, "GPIO107"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 39), + MTK_PIN( + 107, "GPIO107", + MTK_EINT_FUNCTION(0, 39), + DRV_GRP1, MTK_FUNCTION(0, "GPIO107"), MTK_FUNCTION(1, "SRCLKENA2"), MTK_FUNCTION(2, "EINT39") ), - MTK_PIN(PINCTRL_PIN(108, "GPIO108"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 21), + MTK_PIN( + 108, "GPIO108", + MTK_EINT_FUNCTION(0, 21), + DRV_GRP1, MTK_FUNCTION(0, "GPIO108"), MTK_FUNCTION(1, "BSI1A_CS0"), MTK_FUNCTION(2, "EINT21"), @@ -1090,18 +1198,20 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(5, "USB_TEST_IO[22]"), MTK_FUNCTION(6, "MD_ABB_AFUNC_D[24]") ), - MTK_PIN(PINCTRL_PIN(109, "GPIO109"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 24), + MTK_PIN( + 109, "GPIO109", + MTK_EINT_FUNCTION(0, 24), + DRV_GRP1, MTK_FUNCTION(0, "GPIO109"), MTK_FUNCTION(1, "BSI1A_DATA2"), MTK_FUNCTION(2, "EINT24"), MTK_FUNCTION(5, "USB_TEST_IO[23]"), MTK_FUNCTION(6, "MD_ABB_AFUNC_D[25]") ), - MTK_PIN(PINCTRL_PIN(110, "GPIO110"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 23), + MTK_PIN( + 110, "GPIO110", + MTK_EINT_FUNCTION(0, 23), + DRV_GRP1, MTK_FUNCTION(0, "GPIO110"), MTK_FUNCTION(1, "BSI1A_DATA1"), MTK_FUNCTION(2, "EINT23"), @@ -1109,9 +1219,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(5, "USB_TEST_IO[24]"), MTK_FUNCTION(6, "MD_ABB_AFUNC_D[26]") ), - MTK_PIN(PINCTRL_PIN(111, "GPIO111"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 22), + MTK_PIN( + 111, "GPIO111", + MTK_EINT_FUNCTION(0, 22), + DRV_GRP1, MTK_FUNCTION(0, "GPIO111"), MTK_FUNCTION(1, "BSI1A_DATA0"), MTK_FUNCTION(2, "EINT22"), @@ -1119,9 +1230,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(5, "USB_TEST_IO[25]"), MTK_FUNCTION(6, "MD_ABB_AFUNC_D[27]") ), - MTK_PIN(PINCTRL_PIN(112, "GPIO112"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 20), + MTK_PIN( + 112, "GPIO112", + MTK_EINT_FUNCTION(0, 20), + DRV_GRP1, MTK_FUNCTION(0, "GPIO112"), MTK_FUNCTION(1, "BSI1A_CLK"), MTK_FUNCTION(2, "EINT20"), @@ -1129,9 +1241,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(5, "USB_TEST_IO[26]"), MTK_FUNCTION(6, "MD_ABB_AFUNC_D[28]") ), - MTK_PIN(PINCTRL_PIN(113, "GPIO113"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 29), + MTK_PIN( + 113, "GPIO113", + MTK_EINT_FUNCTION(0, 29), + DRV_GRP1, MTK_FUNCTION(0, "GPIO113"), MTK_FUNCTION(1, "BSI1C_DATA"), MTK_FUNCTION(2, "EINT29"), @@ -1141,39 +1254,44 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(6, "MD_ABB_AFUNC_D[29]"), MTK_FUNCTION(7, "USB_DRVVBUS") ), - MTK_PIN(PINCTRL_PIN(114, "GPIO114"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 28), + MTK_PIN( + 114, "GPIO114", + MTK_EINT_FUNCTION(0, 28), + DRV_GRP1, MTK_FUNCTION(0, "GPIO114"), MTK_FUNCTION(1, "BSI1C_CLK"), MTK_FUNCTION(2, "EINT28"), MTK_FUNCTION(5, "USB_TEST_IO[28]"), MTK_FUNCTION(6, "MD_ABB_AFUNC_D[30]") ), - MTK_PIN(PINCTRL_PIN(115, "GPIO115"), - NULL, "mt6589", - MTK_EINT_FUNCTION(1, 10), + MTK_PIN( + 115, "GPIO115", + MTK_EINT_FUNCTION(0, 10), + DRV_GRP1, MTK_FUNCTION(0, "GPIO115"), MTK_FUNCTION(1, "EINT10"), MTK_FUNCTION(6, "MD_ABB_AFUNC_D[31]") ), - MTK_PIN(PINCTRL_PIN(116, "GPIO116"), - NULL, "mt6589", - MTK_EINT_FUNCTION(1, 11), + MTK_PIN( + 116, "GPIO116", + MTK_EINT_FUNCTION(0, 11), + DRV_GRP1, MTK_FUNCTION(0, "GPIO116"), MTK_FUNCTION(1, "EINT11"), MTK_FUNCTION(6, "MD_ABB_AFUNC_D[32]") ), - MTK_PIN(PINCTRL_PIN(117, "GPIO117"), - NULL, "mt6589", - MTK_EINT_FUNCTION(1, 16), + MTK_PIN( + 117, "GPIO117", + MTK_EINT_FUNCTION(0, 16), + DRV_GRP1, MTK_FUNCTION(0, "GPIO117"), MTK_FUNCTION(1, "EINT16"), MTK_FUNCTION(6, "MD_ABB_AFUNC_D[33]") ), - MTK_PIN(PINCTRL_PIN(118, "GPIO118"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 91), + MTK_PIN( + 118, "GPIO118", + MTK_EINT_FUNCTION(0, 91), + DRV_FIXED, MTK_FUNCTION(0, "GPIO118"), MTK_FUNCTION(1, "SDA0"), MTK_FUNCTION(2, "EINT91"), @@ -1181,9 +1299,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(4, "PWM1"), MTK_FUNCTION(7, "A_FUNC_DIN[19]") ), - MTK_PIN(PINCTRL_PIN(119, "GPIO119"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 90), + MTK_PIN( + 119, "GPIO119", + MTK_EINT_FUNCTION(0, 90), + DRV_FIXED, MTK_FUNCTION(0, "GPIO119"), MTK_FUNCTION(1, "SCL0"), MTK_FUNCTION(2, "EINT90"), @@ -1191,9 +1310,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(4, "DISP_PWM"), MTK_FUNCTION(7, "A_FUNC_DIN[20]") ), - MTK_PIN(PINCTRL_PIN(120, "GPIO120"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 10), + MTK_PIN( + 120, "GPIO120", + MTK_EINT_FUNCTION(0, 10), + DRV_GRP1, MTK_FUNCTION(0, "GPIO120"), MTK_FUNCTION(1, "I2SIN_CK"), MTK_FUNCTION(2, "EINT10"), @@ -1202,9 +1322,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(5, "DSP1_ICK"), MTK_FUNCTION(6, "MD_ABB_AFUNC_D[34]") ), - MTK_PIN(PINCTRL_PIN(121, "GPIO121"), - NULL, "mt6589", + MTK_PIN( + 121, "GPIO121", MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), + DRV_GRP1, MTK_FUNCTION(0, "GPIO121"), MTK_FUNCTION(1, "I2SIN_WS"), MTK_FUNCTION(3, "DAC_WS"), @@ -1212,9 +1333,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(5, "DSP1_ID"), MTK_FUNCTION(6, "MD_ABB_AFUNC_D[35]") ), - MTK_PIN(PINCTRL_PIN(122, "GPIO122"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 11), + MTK_PIN( + 122, "GPIO122", + MTK_EINT_FUNCTION(0, 11), + DRV_GRP1, MTK_FUNCTION(0, "GPIO122"), MTK_FUNCTION(1, "I2SIN_DAT"), MTK_FUNCTION(2, "EINT11"), @@ -1222,9 +1344,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(5, "DSP1_IMS"), MTK_FUNCTION(6, "MD_ABB_AFUNC_D[36]") ), - MTK_PIN(PINCTRL_PIN(123, "GPIO123"), - NULL, "mt6589", + MTK_PIN( + 123, "GPIO123", MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), + DRV_GRP1, MTK_FUNCTION(0, "GPIO123"), MTK_FUNCTION(1, "I2SOUT_DAT"), MTK_FUNCTION(3, "DAC_DAT_OUT"), @@ -1232,9 +1355,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(5, "MD2_EINT5"), MTK_FUNCTION(6, "MD_ABB_AFUNC_D[37]") ), - MTK_PIN(PINCTRL_PIN(124, "GPIO124"), - NULL, "mt6589", - MTK_EINT_FUNCTION(1, 5), + MTK_PIN( + 124, "GPIO124", + MTK_EINT_FUNCTION(0, 5), + DRV_GRP3, MTK_FUNCTION(0, "GPIO124"), MTK_FUNCTION(1, "EINT5"), MTK_FUNCTION(2, "PWM5"), @@ -1243,9 +1367,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(5, "MD2_EINT1"), MTK_FUNCTION(6, "MD_ABB_AFUNC_D[38]") ), - MTK_PIN(PINCTRL_PIN(125, "GPIO125"), - NULL, "mt6589", - MTK_EINT_FUNCTION(1, 6), + MTK_PIN( + 125, "GPIO125", + MTK_EINT_FUNCTION(0, 6), + DRV_GRP3, MTK_FUNCTION(0, "GPIO125"), MTK_FUNCTION(1, "EINT6"), MTK_FUNCTION(2, "PWM6"), @@ -1254,9 +1379,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(5, "MD2_EINT2"), MTK_FUNCTION(6, "MD_ABB_AFUNC_D[39]") ), - MTK_PIN(PINCTRL_PIN(126, "GPIO126"), - NULL, "mt6589", - MTK_EINT_FUNCTION(1, 7), + MTK_PIN( + 126, "GPIO126", + MTK_EINT_FUNCTION(0, 7), + DRV_GRP3, MTK_FUNCTION(0, "GPIO126"), MTK_FUNCTION(1, "EINT7"), MTK_FUNCTION(2, "PWM7"), @@ -1265,9 +1391,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(5, "MD2_EINT3"), MTK_FUNCTION(6, "MD_ABB_AFUNC_D[40]") ), - MTK_PIN(PINCTRL_PIN(127, "GPIO127"), - NULL, "mt6589", - MTK_EINT_FUNCTION(1, 8), + MTK_PIN( + 127, "GPIO127", + MTK_EINT_FUNCTION(0, 8), + DRV_GRP3, MTK_FUNCTION(0, "GPIO127"), MTK_FUNCTION(1, "EINT8"), MTK_FUNCTION(2, "DISP_PWM"), @@ -1276,9 +1403,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(6, "MD_ABB_AFUNC_D[41]"), MTK_FUNCTION(7, "EXT_FRAME_SYNC") ), - MTK_PIN(PINCTRL_PIN(128, "GPIO128"), - NULL, "mt6589", - MTK_EINT_FUNCTION(1, 9), + MTK_PIN( + 128, "GPIO128", + MTK_EINT_FUNCTION(0, 9), + DRV_GRP3, MTK_FUNCTION(0, "GPIO128"), MTK_FUNCTION(1, "EINT9"), MTK_FUNCTION(3, "MD1_GPS_SYNC"), @@ -1286,9 +1414,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(5, "USB_DRVVBUS"), MTK_FUNCTION(6, "MD_ABB_AFUNC_D[42]") ), - MTK_PIN(PINCTRL_PIN(129, "GPIO129"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 77), + MTK_PIN( + 129, "GPIO129", + MTK_EINT_FUNCTION(0, 77), + DRV_GRP1, MTK_FUNCTION(0, "GPIO129"), MTK_FUNCTION(1, "DISP_PWM"), MTK_FUNCTION(2, "EINT77"), @@ -1298,9 +1427,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(6, "MD_ABB_AFUNC_D[43]"), MTK_FUNCTION(7, "PWM3") ), - MTK_PIN(PINCTRL_PIN(130, "GPIO130"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 133), + MTK_PIN( + 130, "GPIO130", + MTK_EINT_FUNCTION(0, 133), + DRV_GRP4, MTK_FUNCTION(0, "GPIO130"), MTK_FUNCTION(1, "MSDC4_DAT0"), MTK_FUNCTION(2, "EINT133"), @@ -1309,18 +1439,20 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(6, "MD_ABB_AFUNC_D[46]"), MTK_FUNCTION(7, "LPTE") ), - MTK_PIN(PINCTRL_PIN(131, "GPIO131"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 134), + MTK_PIN( + 131, "GPIO131", + MTK_EINT_FUNCTION(0, 134), + DRV_GRP4, MTK_FUNCTION(0, "GPIO131"), MTK_FUNCTION(1, "MSDC4_DAT1"), MTK_FUNCTION(2, "EINT134"), MTK_FUNCTION(6, "MD_ABB_AFUNC_D[47]"), MTK_FUNCTION(7, "LRSTB_1X") ), - MTK_PIN(PINCTRL_PIN(132, "GPIO132"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 127), + MTK_PIN( + 132, "GPIO132", + MTK_EINT_FUNCTION(0, 127), + DRV_GRP1, MTK_FUNCTION(0, "GPIO132"), MTK_FUNCTION(1, "LPCE1B"), MTK_FUNCTION(2, "EINT127"), @@ -1328,9 +1460,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(5, "PWM2"), MTK_FUNCTION(6, "MD_ABB_AFUNC_D[44]") ), - MTK_PIN(PINCTRL_PIN(133, "GPIO133"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 126), + MTK_PIN( + 133, "GPIO133", + MTK_EINT_FUNCTION(0, 126), + DRV_GRP1, MTK_FUNCTION(0, "GPIO133"), MTK_FUNCTION(1, "LPCE0B"), MTK_FUNCTION(2, "EINT126"), @@ -1338,9 +1471,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(5, "PWM1"), MTK_FUNCTION(6, "MD_ABB_AFUNC_D[45]") ), - MTK_PIN(PINCTRL_PIN(134, "GPIO134"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 136), + MTK_PIN( + 134, "GPIO134", + MTK_EINT_FUNCTION(0, 136), + DRV_GRP4, MTK_FUNCTION(0, "GPIO134"), MTK_FUNCTION(1, "MSDC4_DAT5"), MTK_FUNCTION(2, "EINT136"), @@ -1350,9 +1484,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(6, "MD_ABB_AFUNC_D[48]"), MTK_FUNCTION(7, "SPI1_CSN") ), - MTK_PIN(PINCTRL_PIN(135, "GPIO135"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 137), + MTK_PIN( + 135, "GPIO135", + MTK_EINT_FUNCTION(0, 137), + DRV_GRP4, MTK_FUNCTION(0, "GPIO135"), MTK_FUNCTION(1, "MSDC4_DAT6"), MTK_FUNCTION(2, "EINT137"), @@ -1362,9 +1497,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(6, "MD_ABB_AFUNC_D[49]"), MTK_FUNCTION(7, "SPI1_MO") ), - MTK_PIN(PINCTRL_PIN(136, "GPIO136"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 138), + MTK_PIN( + 136, "GPIO136", + MTK_EINT_FUNCTION(0, 138), + DRV_GRP4, MTK_FUNCTION(0, "GPIO136"), MTK_FUNCTION(1, "MSDC4_DAT7"), MTK_FUNCTION(2, "EINT138"), @@ -1373,9 +1509,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(6, "MD_ABB_AFUNC_D[50]"), MTK_FUNCTION(7, "SPI1_MI") ), - MTK_PIN(PINCTRL_PIN(137, "GPIO137"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 135), + MTK_PIN( + 137, "GPIO137", + MTK_EINT_FUNCTION(0, 135), + DRV_GRP4, MTK_FUNCTION(0, "GPIO137"), MTK_FUNCTION(1, "MSDC4_DAT4"), MTK_FUNCTION(2, "EINT135"), @@ -1385,9 +1522,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(6, "MD_ABB_AFUNC_D[51]"), MTK_FUNCTION(7, "SPI1_CLK") ), - MTK_PIN(PINCTRL_PIN(138, "GPIO138"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 131), + MTK_PIN( + 138, "GPIO138", + MTK_EINT_FUNCTION(0, 131), + DRV_GRP4, MTK_FUNCTION(0, "GPIO138"), MTK_FUNCTION(1, "MSDC4_DAT2"), MTK_FUNCTION(2, "EINT131"), @@ -1397,9 +1535,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(6, "PCM1_WS"), MTK_FUNCTION(7, "LSCE0B_1X") ), - MTK_PIN(PINCTRL_PIN(139, "GPIO139"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 129), + MTK_PIN( + 139, "GPIO139", + MTK_EINT_FUNCTION(0, 129), + DRV_GRP4, MTK_FUNCTION(0, "GPIO139"), MTK_FUNCTION(1, "MSDC4_CLK"), MTK_FUNCTION(2, "EINT129"), @@ -1409,9 +1548,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(6, "PCM1_DI"), MTK_FUNCTION(7, "LSCK_1X") ), - MTK_PIN(PINCTRL_PIN(140, "GPIO140"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 132), + MTK_PIN( + 140, "GPIO140", + MTK_EINT_FUNCTION(0, 132), + DRV_GRP4, MTK_FUNCTION(0, "GPIO140"), MTK_FUNCTION(1, "MSDC4_DAT3"), MTK_FUNCTION(2, "EINT132"), @@ -1421,9 +1561,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(6, "PCM1_DO"), MTK_FUNCTION(7, "LSCE1B_1X") ), - MTK_PIN(PINCTRL_PIN(141, "GPIO141"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 128), + MTK_PIN( + 141, "GPIO141", + MTK_EINT_FUNCTION(0, 128), + DRV_GRP4, MTK_FUNCTION(0, "GPIO141"), MTK_FUNCTION(1, "MSDC4_CMD"), MTK_FUNCTION(2, "EINT128"), @@ -1433,9 +1574,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(6, "MD2_GPS_SYNC"), MTK_FUNCTION(7, "LSDA_1X") ), - MTK_PIN(PINCTRL_PIN(142, "GPIO142"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 130), + MTK_PIN( + 142, "GPIO142", + MTK_EINT_FUNCTION(0, 130), + DRV_GRP1, MTK_FUNCTION(0, "GPIO142"), MTK_FUNCTION(1, "MSDC4_RSTB"), MTK_FUNCTION(2, "EINT130"), @@ -1445,9 +1587,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(6, "PCM1_CK"), MTK_FUNCTION(7, "LSA0_1X") ), - MTK_PIN(PINCTRL_PIN(143, "GPIO143"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 98), + MTK_PIN( + 143, "GPIO143", + MTK_EINT_FUNCTION(0, 98), + DRV_GRP1, MTK_FUNCTION(0, "GPIO143"), MTK_FUNCTION(1, "DPI0_VSYNC"), MTK_FUNCTION(2, "EINT98"), @@ -1457,9 +1600,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(6, "MD_ABB_AFUNC_D[52]"), MTK_FUNCTION(7, "TESTB_OUT8") ), - MTK_PIN(PINCTRL_PIN(144, "GPIO144"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 99), + MTK_PIN( + 144, "GPIO144", + MTK_EINT_FUNCTION(0, 99), + DRV_GRP1, MTK_FUNCTION(0, "GPIO144"), MTK_FUNCTION(1, "DPI0_HSYNC"), MTK_FUNCTION(2, "EINT99"), @@ -1469,9 +1613,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(6, "IRDA_RXD"), MTK_FUNCTION(7, "TESTB_OUT9") ), - MTK_PIN(PINCTRL_PIN(145, "GPIO145"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 100), + MTK_PIN( + 145, "GPIO145", + MTK_EINT_FUNCTION(0, 100), + DRV_GRP1, MTK_FUNCTION(0, "GPIO145"), MTK_FUNCTION(1, "DPI0_DE"), MTK_FUNCTION(2, "EINT100"), @@ -1481,9 +1626,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(6, "IRDA_TXD"), MTK_FUNCTION(7, "TESTB_OUT10") ), - MTK_PIN(PINCTRL_PIN(146, "GPIO146"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 101), + MTK_PIN( + 146, "GPIO146", + MTK_EINT_FUNCTION(0, 101), + DRV_GRP1, MTK_FUNCTION(0, "GPIO146"), MTK_FUNCTION(1, "DPI0_CK"), MTK_FUNCTION(2, "EINT101"), @@ -1492,9 +1638,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(6, "IRDA_PDN"), MTK_FUNCTION(7, "TESTB_OUT11") ), - MTK_PIN(PINCTRL_PIN(147, "GPIO147"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 102), + MTK_PIN( + 147, "GPIO147", + MTK_EINT_FUNCTION(0, 102), + DRV_GRP1, MTK_FUNCTION(0, "GPIO147"), MTK_FUNCTION(1, "DPI0_B0"), MTK_FUNCTION(2, "EINT102"), @@ -1503,9 +1650,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(6, "MD_ABB_AFUNC_D[57]"), MTK_FUNCTION(7, "TESTB_OUT12") ), - MTK_PIN(PINCTRL_PIN(148, "GPIO148"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 103), + MTK_PIN( + 148, "GPIO148", + MTK_EINT_FUNCTION(0, 103), + DRV_GRP1, MTK_FUNCTION(0, "GPIO148"), MTK_FUNCTION(1, "DPI0_B1"), MTK_FUNCTION(2, "EINT103"), @@ -1515,9 +1663,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(6, "MD_ABB_AFUNC_D[58]"), MTK_FUNCTION(7, "TESTB_OUT13") ), - MTK_PIN(PINCTRL_PIN(149, "GPIO149"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 104), + MTK_PIN( + 149, "GPIO149", + MTK_EINT_FUNCTION(0, 104), + DRV_GRP1, MTK_FUNCTION(0, "GPIO149"), MTK_FUNCTION(1, "DPI0_B2"), MTK_FUNCTION(2, "EINT104"), @@ -1527,9 +1676,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(6, "MD_ABB_AFUNC_D[59]"), MTK_FUNCTION(7, "TESTB_OUT14") ), - MTK_PIN(PINCTRL_PIN(150, "GPIO150"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 105), + MTK_PIN( + 150, "GPIO150", + MTK_EINT_FUNCTION(0, 105), + DRV_GRP1, MTK_FUNCTION(0, "GPIO150"), MTK_FUNCTION(1, "DPI0_B3"), MTK_FUNCTION(2, "EINT105"), @@ -1539,9 +1689,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(6, "MD_ABB_AFUNC_D[60]"), MTK_FUNCTION(7, "TESTB_OUT15") ), - MTK_PIN(PINCTRL_PIN(151, "GPIO151"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 106), + MTK_PIN( + 151, "GPIO151", + MTK_EINT_FUNCTION(0, 106), + DRV_GRP1, MTK_FUNCTION(0, "GPIO151"), MTK_FUNCTION(1, "DPI0_B4"), MTK_FUNCTION(2, "EINT106"), @@ -1551,9 +1702,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(6, "MD_ABB_AFUNC_D[61]"), MTK_FUNCTION(7, "TESTB_OUT16") ), - MTK_PIN(PINCTRL_PIN(152, "GPIO152"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 107), + MTK_PIN( + 152, "GPIO152", + MTK_EINT_FUNCTION(0, 107), + DRV_GRP1, MTK_FUNCTION(0, "GPIO152"), MTK_FUNCTION(1, "DPI0_B5"), MTK_FUNCTION(2, "EINT107"), @@ -1563,9 +1715,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(6, "MD_ABB_AFUNC_D[62]"), MTK_FUNCTION(7, "TESTB_OUT17") ), - MTK_PIN(PINCTRL_PIN(153, "GPIO153"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 108), + MTK_PIN( + 153, "GPIO153", + MTK_EINT_FUNCTION(0, 108), + DRV_GRP1, MTK_FUNCTION(0, "GPIO153"), MTK_FUNCTION(1, "DPI0_B6"), MTK_FUNCTION(2, "EINT108"), @@ -1575,9 +1728,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(6, "MD_ABB_AFUNC_D[63]"), MTK_FUNCTION(7, "TESTB_OUT18") ), - MTK_PIN(PINCTRL_PIN(154, "GPIO154"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 109), + MTK_PIN( + 154, "GPIO154", + MTK_EINT_FUNCTION(0, 109), + DRV_GRP1, MTK_FUNCTION(0, "GPIO154"), MTK_FUNCTION(1, "DPI0_B7"), MTK_FUNCTION(2, "EINT109"), @@ -1587,9 +1741,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(6, "MD1_PLL_A_FUNC_DOUT[0]"), MTK_FUNCTION(7, "TESTB_OUT19") ), - MTK_PIN(PINCTRL_PIN(155, "GPIO155"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 110), + MTK_PIN( + 155, "GPIO155", + MTK_EINT_FUNCTION(0, 110), + DRV_GRP1, MTK_FUNCTION(0, "GPIO155"), MTK_FUNCTION(1, "DPI0_G0"), MTK_FUNCTION(2, "EINT110"), @@ -1597,9 +1752,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(6, "MD1_PLL_A_FUNC_DOUT[1]"), MTK_FUNCTION(7, "TESTB_OUT20") ), - MTK_PIN(PINCTRL_PIN(156, "GPIO156"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 111), + MTK_PIN( + 156, "GPIO156", + MTK_EINT_FUNCTION(0, 111), + DRV_GRP1, MTK_FUNCTION(0, "GPIO156"), MTK_FUNCTION(1, "DPI0_G1"), MTK_FUNCTION(2, "EINT111"), @@ -1607,9 +1763,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(6, "MD_ABB_AFUNC_D[56]"), MTK_FUNCTION(7, "TESTB_OUT21") ), - MTK_PIN(PINCTRL_PIN(157, "GPIO157"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 112), + MTK_PIN( + 157, "GPIO157", + MTK_EINT_FUNCTION(0, 112), + DRV_GRP1, MTK_FUNCTION(0, "GPIO157"), MTK_FUNCTION(1, "DPI0_G2"), MTK_FUNCTION(2, "EINT112"), @@ -1617,9 +1774,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(6, "MD1_PLL_A_FUNC_DOUT[2]"), MTK_FUNCTION(7, "TESTB_OUT22") ), - MTK_PIN(PINCTRL_PIN(158, "GPIO158"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 113), + MTK_PIN( + 158, "GPIO158", + MTK_EINT_FUNCTION(0, 113), + DRV_GRP1, MTK_FUNCTION(0, "GPIO158"), MTK_FUNCTION(1, "DPI0_G3"), MTK_FUNCTION(2, "EINT113"), @@ -1627,9 +1785,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(6, "MD1_PLL_A_FUNC_DOUT[3]"), MTK_FUNCTION(7, "TESTB_OUT23") ), - MTK_PIN(PINCTRL_PIN(159, "GPIO159"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 114), + MTK_PIN( + 159, "GPIO159", + MTK_EINT_FUNCTION(0, 114), + DRV_GRP1, MTK_FUNCTION(0, "GPIO159"), MTK_FUNCTION(1, "DPI0_G4"), MTK_FUNCTION(2, "EINT114"), @@ -1639,9 +1798,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(6, "MD_ABB_AFUNC_D[53]"), MTK_FUNCTION(7, "TESTB_OUT24") ), - MTK_PIN(PINCTRL_PIN(160, "GPIO160"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 115), + MTK_PIN( + 160, "GPIO160", + MTK_EINT_FUNCTION(0, 115), + DRV_GRP1, MTK_FUNCTION(0, "GPIO160"), MTK_FUNCTION(1, "DPI0_G5"), MTK_FUNCTION(2, "EINT115"), @@ -1651,9 +1811,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(6, "MD_ABB_AFUNC_D[54]"), MTK_FUNCTION(7, "TESTB_OUT25") ), - MTK_PIN(PINCTRL_PIN(161, "GPIO161"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 116), + MTK_PIN( + 161, "GPIO161", + MTK_EINT_FUNCTION(0, 116), + DRV_GRP1, MTK_FUNCTION(0, "GPIO161"), MTK_FUNCTION(1, "DPI0_G6"), MTK_FUNCTION(2, "EINT116"), @@ -1663,9 +1824,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(6, "MD1_PLL_A_FUNC_DOUT[4]"), MTK_FUNCTION(7, "TESTB_OUT26") ), - MTK_PIN(PINCTRL_PIN(162, "GPIO162"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 117), + MTK_PIN( + 162, "GPIO162", + MTK_EINT_FUNCTION(0, 117), + DRV_GRP1, MTK_FUNCTION(0, "GPIO162"), MTK_FUNCTION(1, "DPI0_G7"), MTK_FUNCTION(2, "EINT117"), @@ -1675,9 +1837,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(6, "MD1_PLL_A_FUNC_DOUT[5]"), MTK_FUNCTION(7, "TESTB_OUT27") ), - MTK_PIN(PINCTRL_PIN(163, "GPIO163"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 118), + MTK_PIN( + 163, "GPIO163", + MTK_EINT_FUNCTION(0, 118), + DRV_GRP1, MTK_FUNCTION(0, "GPIO163"), MTK_FUNCTION(1, "DPI0_R0"), MTK_FUNCTION(2, "EINT118"), @@ -1687,9 +1850,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(6, "MD1_PLL_A_FUNC_DOUT[6]"), MTK_FUNCTION(7, "TESTB_OUT28") ), - MTK_PIN(PINCTRL_PIN(164, "GPIO164"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 119), + MTK_PIN( + 164, "GPIO164", + MTK_EINT_FUNCTION(0, 119), + DRV_GRP1, MTK_FUNCTION(0, "GPIO164"), MTK_FUNCTION(1, "DPI0_R1"), MTK_FUNCTION(2, "EINT119"), @@ -1699,9 +1863,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(6, "MD1_PLL_A_FUNC_DOUT[7]"), MTK_FUNCTION(7, "TESTB_OUT29") ), - MTK_PIN(PINCTRL_PIN(165, "GPIO165"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 120), + MTK_PIN( + 165, "GPIO165", + MTK_EINT_FUNCTION(0, 120), + DRV_GRP1, MTK_FUNCTION(0, "GPIO165"), MTK_FUNCTION(1, "DPI0_R2"), MTK_FUNCTION(2, "EINT120"), @@ -1710,9 +1875,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(5, "MD2_TMS_PAD"), MTK_FUNCTION(7, "TESTB_OUT30") ), - MTK_PIN(PINCTRL_PIN(166, "GPIO166"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 121), + MTK_PIN( + 166, "GPIO166", + MTK_EINT_FUNCTION(0, 121), + DRV_GRP1, MTK_FUNCTION(0, "GPIO166"), MTK_FUNCTION(1, "DPI0_R3"), MTK_FUNCTION(2, "EINT121"), @@ -1722,9 +1888,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(6, "MD_ABB_AFUNC_D[55]"), MTK_FUNCTION(7, "TESTB_OUT31") ), - MTK_PIN(PINCTRL_PIN(167, "GPIO167"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 122), + MTK_PIN( + 167, "GPIO167", + MTK_EINT_FUNCTION(0, 122), + DRV_GRP1, MTK_FUNCTION(0, "GPIO167"), MTK_FUNCTION(1, "DPI0_R4"), MTK_FUNCTION(2, "EINT122"), @@ -1732,9 +1899,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(4, "CM2DAT_2X[8]"), MTK_FUNCTION(7, "TESTA_OUT0") ), - MTK_PIN(PINCTRL_PIN(168, "GPIO168"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 123), + MTK_PIN( + 168, "GPIO168", + MTK_EINT_FUNCTION(0, 123), + DRV_GRP1, MTK_FUNCTION(0, "GPIO168"), MTK_FUNCTION(1, "DPI0_R5"), MTK_FUNCTION(2, "EINT123"), @@ -1744,9 +1912,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(6, "MD2_DAI_RX_GPIO"), MTK_FUNCTION(7, "TESTA_OUT1") ), - MTK_PIN(PINCTRL_PIN(169, "GPIO169"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 124), + MTK_PIN( + 169, "GPIO169", + MTK_EINT_FUNCTION(0, 124), + DRV_GRP1, MTK_FUNCTION(0, "GPIO169"), MTK_FUNCTION(1, "DPI0_R6"), MTK_FUNCTION(2, "EINT124"), @@ -1754,9 +1923,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(4, "CM2VSYNC_2X"), MTK_FUNCTION(7, "TESTA_OUT2") ), - MTK_PIN(PINCTRL_PIN(170, "GPIO170"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 125), + MTK_PIN( + 170, "GPIO170", + MTK_EINT_FUNCTION(0, 125), + DRV_GRP1, MTK_FUNCTION(0, "GPIO170"), MTK_FUNCTION(1, "DPI0_R7"), MTK_FUNCTION(2, "EINT125"), @@ -1764,9 +1934,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(4, "CM2HSYNC_2X"), MTK_FUNCTION(7, "TESTA_OUT3") ), - MTK_PIN(PINCTRL_PIN(171, "GPIO171"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 57), + MTK_PIN( + 171, "GPIO171", + MTK_EINT_FUNCTION(0, 57), + DRV_GRP1, MTK_FUNCTION(0, "GPIO171"), MTK_FUNCTION(1, "MSDC1_INSI"), MTK_FUNCTION(2, "EINT57"), @@ -1776,18 +1947,20 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(6, "MD2_PLL_A_FUNC_DOUT[0]"), MTK_FUNCTION(7, "TESTB_OUT6") ), - MTK_PIN(PINCTRL_PIN(172, "GPIO172"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 65), + MTK_PIN( + 172, "GPIO172", + MTK_EINT_FUNCTION(0, 65), + DRV_GRP1, MTK_FUNCTION(0, "GPIO172"), MTK_FUNCTION(1, "MSDC2_INSI"), MTK_FUNCTION(2, "EINT65"), MTK_FUNCTION(3, "BPI2_BUS6"), MTK_FUNCTION(7, "A_FUNC_DIN[6]") ), - MTK_PIN(PINCTRL_PIN(173, "GPIO173"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 66), + MTK_PIN( + 173, "GPIO173", + MTK_EINT_FUNCTION(0, 66), + DRV_GRP1, MTK_FUNCTION(0, "GPIO173"), MTK_FUNCTION(1, "MSDC2_SDWPI"), MTK_FUNCTION(2, "EINT66"), @@ -1796,9 +1969,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(5, "DUAL_BPI1_BUS15"), MTK_FUNCTION(7, "A_FUNC_DIN[5]") ), - MTK_PIN(PINCTRL_PIN(174, "GPIO174"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 63), + MTK_PIN( + 174, "GPIO174", + MTK_EINT_FUNCTION(0, 63), + DRV_GRP5, MTK_FUNCTION(0, "GPIO174"), MTK_FUNCTION(1, "MSDC2_DAT2"), MTK_FUNCTION(2, "EINT63"), @@ -1806,9 +1980,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(4, "DSP2_IMS"), MTK_FUNCTION(7, "A_FUNC_DIN[8]") ), - MTK_PIN(PINCTRL_PIN(175, "GPIO175"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 64), + MTK_PIN( + 175, "GPIO175", + MTK_EINT_FUNCTION(0, 64), + DRV_GRP5, MTK_FUNCTION(0, "GPIO175"), MTK_FUNCTION(1, "MSDC2_DAT3"), MTK_FUNCTION(2, "EINT64"), @@ -1816,9 +1991,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(4, "DSP2_ID"), MTK_FUNCTION(7, "A_FUNC_DIN[7]") ), - MTK_PIN(PINCTRL_PIN(176, "GPIO176"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 60), + MTK_PIN( + 176, "GPIO176", + MTK_EINT_FUNCTION(0, 60), + DRV_GRP5, MTK_FUNCTION(0, "GPIO176"), MTK_FUNCTION(1, "MSDC2_CMD"), MTK_FUNCTION(2, "EINT60"), @@ -1827,9 +2003,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(5, "PCM1_WS"), MTK_FUNCTION(7, "A_FUNC_DIN[11]") ), - MTK_PIN(PINCTRL_PIN(177, "GPIO177"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 59), + MTK_PIN( + 177, "GPIO177", + MTK_EINT_FUNCTION(0, 59), + DRV_GRP5, MTK_FUNCTION(0, "GPIO177"), MTK_FUNCTION(1, "MSDC2_CLK"), MTK_FUNCTION(2, "EINT59"), @@ -1838,9 +2015,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(5, "PCM1_CK"), MTK_FUNCTION(7, "A_FUNC_DIN[12]") ), - MTK_PIN(PINCTRL_PIN(178, "GPIO178"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 62), + MTK_PIN( + 178, "GPIO178", + MTK_EINT_FUNCTION(0, 62), + DRV_GRP5, MTK_FUNCTION(0, "GPIO178"), MTK_FUNCTION(1, "MSDC2_DAT1"), MTK_FUNCTION(2, "EINT62"), @@ -1849,9 +2027,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(5, "PCM1_DO"), MTK_FUNCTION(7, "A_FUNC_DIN[9]") ), - MTK_PIN(PINCTRL_PIN(179, "GPIO179"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 61), + MTK_PIN( + 179, "GPIO179", + MTK_EINT_FUNCTION(0, 61), + DRV_GRP5, MTK_FUNCTION(0, "GPIO179"), MTK_FUNCTION(1, "MSDC2_DAT0"), MTK_FUNCTION(2, "EINT61"), @@ -1860,9 +2039,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(5, "PCM1_DI"), MTK_FUNCTION(7, "A_FUNC_DIN[10]") ), - MTK_PIN(PINCTRL_PIN(180, "GPIO180"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 53), + MTK_PIN( + 180, "GPIO180", + MTK_EINT_FUNCTION(0, 53), + DRV_GRP5, MTK_FUNCTION(0, "GPIO180"), MTK_FUNCTION(1, "MSDC1_DAT0"), MTK_FUNCTION(2, "EINT53"), @@ -1872,9 +2052,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(6, "MD2_PLL_A_FUNC_DOUT[1]"), MTK_FUNCTION(7, "TESTB_OUT2") ), - MTK_PIN(PINCTRL_PIN(181, "GPIO181"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 54), + MTK_PIN( + 181, "GPIO181", + MTK_EINT_FUNCTION(0, 54), + DRV_GRP5, MTK_FUNCTION(0, "GPIO181"), MTK_FUNCTION(1, "MSDC1_DAT1"), MTK_FUNCTION(2, "EINT54"), @@ -1884,9 +2065,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(6, "MD2_PLL_A_FUNC_DOUT[2]"), MTK_FUNCTION(7, "TESTB_OUT3") ), - MTK_PIN(PINCTRL_PIN(182, "GPIO182"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 58), + MTK_PIN( + 182, "GPIO182", + MTK_EINT_FUNCTION(0, 58), + DRV_GRP1, MTK_FUNCTION(0, "GPIO182"), MTK_FUNCTION(1, "MSDC1_SDWPI"), MTK_FUNCTION(2, "EINT58"), @@ -1896,9 +2078,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(6, "MD2_PLL_A_FUNC_DOUT[3]"), MTK_FUNCTION(7, "TESTB_OUT7") ), - MTK_PIN(PINCTRL_PIN(183, "GPIO183"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 52), + MTK_PIN( + 183, "GPIO183", + MTK_EINT_FUNCTION(0, 52), + DRV_GRP5, MTK_FUNCTION(0, "GPIO183"), MTK_FUNCTION(1, "MSDC1_CMD"), MTK_FUNCTION(2, "EINT52"), @@ -1908,9 +2091,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(6, "MD2_PLL_A_FUNC_DOUT[4]"), MTK_FUNCTION(7, "TESTB_OUT1") ), - MTK_PIN(PINCTRL_PIN(184, "GPIO184"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 51), + MTK_PIN( + 184, "GPIO184", + MTK_EINT_FUNCTION(0, 51), + DRV_GRP5, MTK_FUNCTION(0, "GPIO184"), MTK_FUNCTION(1, "MSDC1_CLK"), MTK_FUNCTION(2, "EINT51"), @@ -1919,9 +2103,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(6, "MD2_PLL_A_FUNC_DOUT[5]"), MTK_FUNCTION(7, "TESTB_OUT0") ), - MTK_PIN(PINCTRL_PIN(185, "GPIO185"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 55), + MTK_PIN( + 185, "GPIO185", + MTK_EINT_FUNCTION(0, 55), + DRV_GRP5, MTK_FUNCTION(0, "GPIO185"), MTK_FUNCTION(1, "MSDC1_DAT2"), MTK_FUNCTION(2, "EINT55"), @@ -1931,9 +2116,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(6, "MD2_PLL_A_FUNC_DOUT[6]"), MTK_FUNCTION(7, "TESTB_OUT4") ), - MTK_PIN(PINCTRL_PIN(186, "GPIO186"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 56), + MTK_PIN( + 186, "GPIO186", + MTK_EINT_FUNCTION(0, 56), + DRV_GRP5, MTK_FUNCTION(0, "GPIO186"), MTK_FUNCTION(1, "MSDC1_DAT3"), MTK_FUNCTION(2, "EINT56"), @@ -1943,157 +2129,180 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(6, "MD2_PLL_A_FUNC_DOUT[7]"), MTK_FUNCTION(7, "TESTB_OUT5") ), - MTK_PIN(PINCTRL_PIN(187, "GPIO187"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 36), + MTK_PIN( + 187, "GPIO187", + MTK_EINT_FUNCTION(0, 36), + DRV_FIXED, MTK_FUNCTION(0, "GPIO187"), MTK_FUNCTION(2, "EINT36") ), - MTK_PIN(PINCTRL_PIN(188, "GPIO188"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 35), + MTK_PIN( + 188, "GPIO188", + MTK_EINT_FUNCTION(0, 35), + DRV_FIXED, MTK_FUNCTION(0, "GPIO188"), MTK_FUNCTION(2, "EINT35") ), - MTK_PIN(PINCTRL_PIN(189, "GPIO189"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 169), + MTK_PIN( + 189, "GPIO189", + MTK_EINT_FUNCTION(0, 169), + DRV_FIXED, MTK_FUNCTION(0, "GPIO189"), MTK_FUNCTION(2, "EINT169") ), - MTK_PIN(PINCTRL_PIN(190, "GPIO190"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 168), + MTK_PIN( + 190, "GPIO190", + MTK_EINT_FUNCTION(0, 168), + DRV_FIXED, MTK_FUNCTION(0, "GPIO190"), MTK_FUNCTION(2, "EINT168") ), - MTK_PIN(PINCTRL_PIN(191, "GPIO191"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 163), + MTK_PIN( + 191, "GPIO191", + MTK_EINT_FUNCTION(0, 163), + DRV_FIXED, MTK_FUNCTION(0, "GPIO191"), MTK_FUNCTION(2, "EINT163") ), - MTK_PIN(PINCTRL_PIN(192, "GPIO192"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 162), + MTK_PIN( + 192, "GPIO192", + MTK_EINT_FUNCTION(0, 162), + DRV_FIXED, MTK_FUNCTION(0, "GPIO192"), MTK_FUNCTION(2, "EINT162") ), - MTK_PIN(PINCTRL_PIN(193, "GPIO193"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 167), + MTK_PIN( + 193, "GPIO193", + MTK_EINT_FUNCTION(0, 167), + DRV_FIXED, MTK_FUNCTION(0, "GPIO193"), MTK_FUNCTION(2, "EINT167") ), - MTK_PIN(PINCTRL_PIN(194, "GPIO194"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 166), + MTK_PIN( + 194, "GPIO194", + MTK_EINT_FUNCTION(0, 166), + DRV_FIXED, MTK_FUNCTION(0, "GPIO194"), MTK_FUNCTION(2, "EINT166") ), - MTK_PIN(PINCTRL_PIN(195, "GPIO195"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 165), + MTK_PIN( + 195, "GPIO195", + MTK_EINT_FUNCTION(0, 165), + DRV_FIXED, MTK_FUNCTION(0, "GPIO195"), MTK_FUNCTION(2, "EINT165") ), - MTK_PIN(PINCTRL_PIN(196, "GPIO196"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 164), + MTK_PIN( + 196, "GPIO196", + MTK_EINT_FUNCTION(0, 164), + DRV_FIXED, MTK_FUNCTION(0, "GPIO196"), MTK_FUNCTION(2, "EINT164") ), - MTK_PIN(PINCTRL_PIN(197, "GPIO197"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 175), + MTK_PIN( + 197, "GPIO197", + MTK_EINT_FUNCTION(0, 175), + DRV_FIXED, MTK_FUNCTION(0, "GPIO197"), MTK_FUNCTION(1, "CMDAT6"), MTK_FUNCTION(2, "EINT175") ), - MTK_PIN(PINCTRL_PIN(198, "GPIO198"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 174), + MTK_PIN( + 198, "GPIO198", + MTK_EINT_FUNCTION(0, 174), + DRV_FIXED, MTK_FUNCTION(0, "GPIO198"), MTK_FUNCTION(1, "CMDAT7"), MTK_FUNCTION(2, "EINT174") ), - MTK_PIN(PINCTRL_PIN(199, "GPIO199"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 171), + MTK_PIN( + 199, "GPIO199", + MTK_EINT_FUNCTION(0, 171), + DRV_FIXED, MTK_FUNCTION(0, "GPIO199"), MTK_FUNCTION(1, "CMDAT8"), MTK_FUNCTION(2, "EINT171") ), - MTK_PIN(PINCTRL_PIN(200, "GPIO200"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 170), + MTK_PIN( + 200, "GPIO200", + MTK_EINT_FUNCTION(0, 170), + DRV_FIXED, MTK_FUNCTION(0, "GPIO200"), MTK_FUNCTION(1, "CMDAT9"), MTK_FUNCTION(2, "EINT170") ), - MTK_PIN(PINCTRL_PIN(201, "GPIO201"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 173), + MTK_PIN( + 201, "GPIO201", + MTK_EINT_FUNCTION(0, 173), + DRV_FIXED, MTK_FUNCTION(0, "GPIO201"), MTK_FUNCTION(1, "CMHSYNC"), MTK_FUNCTION(2, "EINT173") ), - MTK_PIN(PINCTRL_PIN(202, "GPIO202"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 172), + MTK_PIN( + 202, "GPIO202", + MTK_EINT_FUNCTION(0, 172), + DRV_FIXED, MTK_FUNCTION(0, "GPIO202"), MTK_FUNCTION(1, "CMVSYNC"), MTK_FUNCTION(2, "EINT172") ), - MTK_PIN(PINCTRL_PIN(203, "GPIO203"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 181), + MTK_PIN( + 203, "GPIO203", + MTK_EINT_FUNCTION(0, 181), + DRV_FIXED, MTK_FUNCTION(0, "GPIO203"), MTK_FUNCTION(1, "CMDAT2"), MTK_FUNCTION(2, "EINT181"), MTK_FUNCTION(3, "CMCSD2") ), - MTK_PIN(PINCTRL_PIN(204, "GPIO204"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 180), + MTK_PIN( + 204, "GPIO204", + MTK_EINT_FUNCTION(0, 180), + DRV_FIXED, MTK_FUNCTION(0, "GPIO204"), MTK_FUNCTION(1, "CMDAT3"), MTK_FUNCTION(2, "EINT180"), MTK_FUNCTION(3, "CMCSD3") ), - MTK_PIN(PINCTRL_PIN(205, "GPIO205"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 177), + MTK_PIN( + 205, "GPIO205", + MTK_EINT_FUNCTION(0, 177), + DRV_FIXED, MTK_FUNCTION(0, "GPIO205"), MTK_FUNCTION(1, "CMDAT4"), MTK_FUNCTION(2, "EINT177") ), - MTK_PIN(PINCTRL_PIN(206, "GPIO206"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 176), + MTK_PIN( + 206, "GPIO206", + MTK_EINT_FUNCTION(0, 176), + DRV_FIXED, MTK_FUNCTION(0, "GPIO206"), MTK_FUNCTION(1, "CMDAT5"), MTK_FUNCTION(2, "EINT176") ), - MTK_PIN(PINCTRL_PIN(207, "GPIO207"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 179), + MTK_PIN( + 207, "GPIO207", + MTK_EINT_FUNCTION(0, 179), + DRV_FIXED, MTK_FUNCTION(0, "GPIO207"), MTK_FUNCTION(1, "CMDAT0"), MTK_FUNCTION(2, "EINT179"), MTK_FUNCTION(3, "CMCSD0") ), - MTK_PIN(PINCTRL_PIN(208, "GPIO208"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 178), + MTK_PIN( + 208, "GPIO208", + MTK_EINT_FUNCTION(0, 178), + DRV_FIXED, MTK_FUNCTION(0, "GPIO208"), MTK_FUNCTION(1, "CMDAT1"), MTK_FUNCTION(2, "EINT178"), MTK_FUNCTION(3, "CMCSD1") ), - MTK_PIN(PINCTRL_PIN(209, "GPIO209"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 182), + MTK_PIN( + 209, "GPIO209", + MTK_EINT_FUNCTION(0, 182), + DRV_GRP1, MTK_FUNCTION(0, "GPIO209"), MTK_FUNCTION(1, "CMPCLK"), MTK_FUNCTION(2, "EINT182"), @@ -2102,45 +2311,50 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(5, "TS_AUXADC_SEL[3]"), MTK_FUNCTION(7, "TESTA_OUT27") ), - MTK_PIN(PINCTRL_PIN(210, "GPIO210"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 183), + MTK_PIN( + 210, "GPIO210", + MTK_EINT_FUNCTION(0, 183), + DRV_GRP1, MTK_FUNCTION(0, "GPIO210"), MTK_FUNCTION(1, "CMMCLK"), MTK_FUNCTION(2, "EINT183"), MTK_FUNCTION(5, "TS_AUXADC_SEL[2]"), MTK_FUNCTION(7, "TESTA_OUT28") ), - MTK_PIN(PINCTRL_PIN(211, "GPIO211"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 185), + MTK_PIN( + 211, "GPIO211", + MTK_EINT_FUNCTION(0, 185), + DRV_GRP1, MTK_FUNCTION(0, "GPIO211"), MTK_FUNCTION(1, "CMRST"), MTK_FUNCTION(2, "EINT185"), MTK_FUNCTION(5, "TS_AUXADC_SEL[1]"), MTK_FUNCTION(7, "TESTA_OUT30") ), - MTK_PIN(PINCTRL_PIN(212, "GPIO212"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 184), + MTK_PIN( + 212, "GPIO212", + MTK_EINT_FUNCTION(0, 184), + DRV_GRP1, MTK_FUNCTION(0, "GPIO212"), MTK_FUNCTION(1, "CMPDN"), MTK_FUNCTION(2, "EINT184"), MTK_FUNCTION(5, "TS_AUXADC_SEL[0]"), MTK_FUNCTION(7, "TESTA_OUT29") ), - MTK_PIN(PINCTRL_PIN(213, "GPIO213"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 186), + MTK_PIN( + 213, "GPIO213", + MTK_EINT_FUNCTION(0, 186), + DRV_GRP1, MTK_FUNCTION(0, "GPIO213"), MTK_FUNCTION(1, "CMFLASH"), MTK_FUNCTION(2, "EINT186"), MTK_FUNCTION(3, "CM2MCLK_3X"), MTK_FUNCTION(7, "TESTA_OUT31") ), - MTK_PIN(PINCTRL_PIN(214, "GPIO214"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 93), + MTK_PIN( + 214, "GPIO214", + MTK_EINT_FUNCTION(0, 93), + DRV_FIXED, MTK_FUNCTION(0, "GPIO214"), MTK_FUNCTION(1, "SDA1"), MTK_FUNCTION(2, "EINT93"), @@ -2149,9 +2363,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(5, "TS_AUX_SCLK_PWDB"), MTK_FUNCTION(7, "A_FUNC_DIN[17]") ), - MTK_PIN(PINCTRL_PIN(215, "GPIO215"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 92), + MTK_PIN( + 215, "GPIO215", + MTK_EINT_FUNCTION(0, 92), + DRV_FIXED, MTK_FUNCTION(0, "GPIO215"), MTK_FUNCTION(1, "SCL1"), MTK_FUNCTION(2, "EINT92"), @@ -2160,9 +2375,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(5, "TS_AUX_DIN"), MTK_FUNCTION(7, "A_FUNC_DIN[18]") ), - MTK_PIN(PINCTRL_PIN(216, "GPIO216"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 95), + MTK_PIN( + 216, "GPIO216", + MTK_EINT_FUNCTION(0, 95), + DRV_FIXED, MTK_FUNCTION(0, "GPIO216"), MTK_FUNCTION(1, "SDA2"), MTK_FUNCTION(2, "EINT95"), @@ -2171,9 +2387,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(5, "TS_AUX_PWDB"), MTK_FUNCTION(7, "A_FUNC_DIN[15]") ), - MTK_PIN(PINCTRL_PIN(217, "GPIO217"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 94), + MTK_PIN( + 217, "GPIO217", + MTK_EINT_FUNCTION(0, 94), + DRV_FIXED, MTK_FUNCTION(0, "GPIO217"), MTK_FUNCTION(1, "SCL2"), MTK_FUNCTION(2, "EINT94"), @@ -2182,15 +2399,17 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(5, "TS_AUXADC_TEST_CK"), MTK_FUNCTION(7, "A_FUNC_DIN[16]") ), - MTK_PIN(PINCTRL_PIN(218, "GPIO218"), - NULL, "mt6589", + MTK_PIN( + 218, "GPIO218", MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), + DRV_GRP1, MTK_FUNCTION(0, "GPIO218"), MTK_FUNCTION(1, "SRCLKENAI") ), - MTK_PIN(PINCTRL_PIN(219, "GPIO219"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 87), + MTK_PIN( + 219, "GPIO219", + MTK_EINT_FUNCTION(0, 87), + DRV_GRP1, MTK_FUNCTION(0, "GPIO219"), MTK_FUNCTION(1, "URXD3"), MTK_FUNCTION(2, "EINT87"), @@ -2200,9 +2419,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(6, "PWM4"), MTK_FUNCTION(7, "MD2_EINT4") ), - MTK_PIN(PINCTRL_PIN(220, "GPIO220"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 86), + MTK_PIN( + 220, "GPIO220", + MTK_EINT_FUNCTION(0, 86), + DRV_GRP1, MTK_FUNCTION(0, "GPIO220"), MTK_FUNCTION(1, "UTXD3"), MTK_FUNCTION(2, "EINT86"), @@ -2212,9 +2432,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(6, "PWM3"), MTK_FUNCTION(7, "MD2_EINT3") ), - MTK_PIN(PINCTRL_PIN(221, "GPIO221"), - NULL, "mt6589", + MTK_PIN( + 221, "GPIO221", MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), + DRV_GRP3, MTK_FUNCTION(0, "GPIO221"), MTK_FUNCTION(1, "MRG_I2S_PCM_CLK"), MTK_FUNCTION(3, "I2SIN_CK"), @@ -2223,9 +2444,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(6, "IMG_TEST_CK"), MTK_FUNCTION(7, "USB_SCL") ), - MTK_PIN(PINCTRL_PIN(222, "GPIO222"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 16), + MTK_PIN( + 222, "GPIO222", + MTK_EINT_FUNCTION(0, 16), + DRV_GRP3, MTK_FUNCTION(0, "GPIO222"), MTK_FUNCTION(1, "MRG_I2S_PCM_SYNC"), MTK_FUNCTION(2, "EINT16"), @@ -2233,9 +2455,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(4, "PCM0_WS"), MTK_FUNCTION(6, "DISP_TEST_CK") ), - MTK_PIN(PINCTRL_PIN(223, "GPIO223"), - NULL, "mt6589", + MTK_PIN( + 223, "GPIO223", MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), + DRV_GRP3, MTK_FUNCTION(0, "GPIO223"), MTK_FUNCTION(1, "MRG_I2S_PCM_RX"), MTK_FUNCTION(3, "I2SIN_DAT"), @@ -2244,9 +2467,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(6, "MFG_TEST_CK"), MTK_FUNCTION(7, "USB_SDA") ), - MTK_PIN(PINCTRL_PIN(224, "GPIO224"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 17), + MTK_PIN( + 224, "GPIO224", + MTK_EINT_FUNCTION(0, 17), + DRV_GRP3, MTK_FUNCTION(0, "GPIO224"), MTK_FUNCTION(1, "MRG_I2S_PCM_TX"), MTK_FUNCTION(2, "EINT17"), @@ -2254,9 +2478,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(4, "PCM0_DO"), MTK_FUNCTION(6, "VDEC_TEST_CK") ), - MTK_PIN(PINCTRL_PIN(225, "GPIO225"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 18), + MTK_PIN( + 225, "GPIO225", + MTK_EINT_FUNCTION(0, 18), + DRV_GRP3, MTK_FUNCTION(0, "GPIO225"), MTK_FUNCTION(1, "MD1_DAI_RX_GPIO"), MTK_FUNCTION(2, "EINT18"), @@ -2265,9 +2490,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(5, "DSP2_IMS"), MTK_FUNCTION(6, "VENC_TEST_CK") ), - MTK_PIN(PINCTRL_PIN(226, "GPIO226"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 71), + MTK_PIN( + 226, "GPIO226", + MTK_EINT_FUNCTION(0, 71), + DRV_GRP4, MTK_FUNCTION(0, "GPIO226"), MTK_FUNCTION(1, "MSDC3_DAT2"), MTK_FUNCTION(2, "EINT71"), @@ -2276,9 +2502,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(5, "CLKM4"), MTK_FUNCTION(7, "A_FUNC_DIN[0]") ), - MTK_PIN(PINCTRL_PIN(227, "GPIO227"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 72), + MTK_PIN( + 227, "GPIO227", + MTK_EINT_FUNCTION(0, 72), + DRV_GRP4, MTK_FUNCTION(0, "GPIO227"), MTK_FUNCTION(1, "MSDC3_DAT3"), MTK_FUNCTION(2, "EINT72"), @@ -2287,9 +2514,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(5, "CLKM5"), MTK_FUNCTION(7, "A_FUNC_CK") ), - MTK_PIN(PINCTRL_PIN(228, "GPIO228"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 68), + MTK_PIN( + 228, "GPIO228", + MTK_EINT_FUNCTION(0, 68), + DRV_GRP4, MTK_FUNCTION(0, "GPIO228"), MTK_FUNCTION(1, "MSDC3_CMD"), MTK_FUNCTION(2, "EINT68"), @@ -2298,9 +2526,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(5, "CLKM1"), MTK_FUNCTION(7, "A_FUNC_DIN[3]") ), - MTK_PIN(PINCTRL_PIN(229, "GPIO229"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 67), + MTK_PIN( + 229, "GPIO229", + MTK_EINT_FUNCTION(0, 67), + DRV_GRP4, MTK_FUNCTION(0, "GPIO229"), MTK_FUNCTION(1, "MSDC3_CLK"), MTK_FUNCTION(2, "EINT67"), @@ -2309,9 +2538,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(5, "CLKM0"), MTK_FUNCTION(7, "A_FUNC_DIN[4]") ), - MTK_PIN(PINCTRL_PIN(230, "GPIO230"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 70), + MTK_PIN( + 230, "GPIO230", + MTK_EINT_FUNCTION(0, 70), + DRV_GRP4, MTK_FUNCTION(0, "GPIO230"), MTK_FUNCTION(1, "MSDC3_DAT1"), MTK_FUNCTION(2, "EINT70"), @@ -2320,9 +2550,10 @@ static const struct mtk_desc_pin mtk_pins_mt6589[] = { MTK_FUNCTION(5, "CLKM3"), MTK_FUNCTION(7, "A_FUNC_DIN[1]") ), - MTK_PIN(PINCTRL_PIN(231, "GPIO231"), - NULL, "mt6589", - MTK_EINT_FUNCTION(2, 69), + MTK_PIN( + 231, "GPIO231", + MTK_EINT_FUNCTION(0, 69), + DRV_GRP4, MTK_FUNCTION(0, "GPIO231"), MTK_FUNCTION(1, "MSDC3_DAT0"), MTK_FUNCTION(2, "EINT69"), diff --git a/include/dt-bindings/clock/mt6589-clk.h b/include/dt-bindings/clock/mt6589-clk.h index 67e6b75118522c4..d91957c20006a8e 100644 --- a/include/dt-bindings/clock/mt6589-clk.h +++ b/include/dt-bindings/clock/mt6589-clk.h @@ -19,212 +19,212 @@ /* TOPCKGEN */ -#define CLK_TOP_CLK_NULL 1 +#define CLK_TOP_CLK_NULL 0 -#define CLK_TOP_CLKPH_MCK 11 -#define CLK_TOP_CPUM_TCK_IN 12 +#define CLK_TOP_CLKPH_MCK 1 +#define CLK_TOP_CPUM_TCK_IN 2 -#define CLK_TOP_SYSPLL 21 -#define CLK_TOP_MAINPLL_D3 22 -#define CLK_TOP_MAINPLL_D5 23 -#define CLK_TOP_MAINPLL_D7 24 +#define CLK_TOP_SYSPLL 3 +#define CLK_TOP_MAINPLL_D3 4 +#define CLK_TOP_MAINPLL_D5 5 +#define CLK_TOP_MAINPLL_D7 6 /* GPU: 403MHz */ -#define CLK_TOP_SYSPLL_D2 31 -#define CLK_TOP_SYSPLL_D2P5 32 +#define CLK_TOP_SYSPLL_D2 7 +#define CLK_TOP_SYSPLL_D2P5 8 /* MAINPLL / 3 / 2 = GPU: 268MHz */ -#define CLK_TOP_SYSPLL_D3 33 -#define CLK_TOP_SYSPLL_D3P5 34 +#define CLK_TOP_SYSPLL_D3 9 +#define CLK_TOP_SYSPLL_D3P5 10 /* MAINPLL / 2 / 4 */ -#define CLK_TOP_SYSPLL_D4 35 -#define CLK_TOP_SYSPLL_D5 36 +#define CLK_TOP_SYSPLL_D4 11 +#define CLK_TOP_SYSPLL_D5 12 /* MAINPLL /2 / 6 */ -#define CLK_TOP_SYSPLL_D6 37 -#define CLK_TOP_SYSPLL_D8 38 -#define CLK_TOP_SYSPLL_D10 39 -#define CLK_TOP_SYSPLL_D12 40 -#define CLK_TOP_SYSPLL_D16 41 -#define CLK_TOP_SYSPLL_D24 42 +#define CLK_TOP_SYSPLL_D6 13 +#define CLK_TOP_SYSPLL_D8 14 +#define CLK_TOP_SYSPLL_D10 15 +#define CLK_TOP_SYSPLL_D12 16 +#define CLK_TOP_SYSPLL_D16 17 +#define CLK_TOP_SYSPLL_D24 18 /* may be univpll1 parent */ -#define CLK_TOP_UNIVPLL_D2 51 +#define CLK_TOP_UNIVPLL_D2 19 /* must be univpll2 parent */ -#define CLK_TOP_UNIVPLL_D3 52 +#define CLK_TOP_UNIVPLL_D3 20 /* UNIVPLL / 5 */ -#define CLK_TOP_UNIVPLL_D5 53 -#define CLK_TOP_UNIVPLL_D7 54 -#define CLK_TOP_UNIVPLL_D10 55 -#define CLK_TOP_UNIVPLL_D26 56 +#define CLK_TOP_UNIVPLL_D5 21 +#define CLK_TOP_UNIVPLL_D7 22 +#define CLK_TOP_UNIVPLL_D10 23 +#define CLK_TOP_UNIVPLL_D26 24 /* GPU: 312MHz */ -#define CLK_TOP_UNIVPLL1_D2 61 +#define CLK_TOP_UNIVPLL1_D2 25 /* GPU: 156MHz */ -#define CLK_TOP_UNIVPLL1_D4 62 -#define CLK_TOP_UNIVPLL1_D6 63 -#define CLK_TOP_UNIVPLL1_D8 64 -#define CLK_TOP_UNIVPLL1_D10 65 +#define CLK_TOP_UNIVPLL1_D4 26 +#define CLK_TOP_UNIVPLL1_D6 27 +#define CLK_TOP_UNIVPLL1_D8 28 +#define CLK_TOP_UNIVPLL1_D10 29 /* UNIVPLL / 3 / 2 */ -#define CLK_TOP_UNIVPLL2_D2 71 +#define CLK_TOP_UNIVPLL2_D2 30 /* unknown */ -#define CLK_TOP_UNIVPLL2_D4 72 -#define CLK_TOP_UNIVPLL2_D6 73 -#define CLK_TOP_UNIVPLL2_D8 74 +#define CLK_TOP_UNIVPLL2_D4 31 +#define CLK_TOP_UNIVPLL2_D6 32 +#define CLK_TOP_UNIVPLL2_D8 33 -#define CLK_TOP_MMPLL_D2 81 +#define CLK_TOP_MMPLL_D2 34 /* GPU: 476MHz */ -#define CLK_TOP_MMPLL_D3 82 +#define CLK_TOP_MMPLL_D3 35 /* GPU: 357MHz */ -#define CLK_TOP_MMPLL_D4 83 +#define CLK_TOP_MMPLL_D4 36 /* GPU: 286MHz */ -#define CLK_TOP_MMPLL_D5 84 +#define CLK_TOP_MMPLL_D5 37 /* GPU: 238MHz */ -#define CLK_TOP_MMPLL_D6 85 -#define CLK_TOP_MMPLL_D7 86 +#define CLK_TOP_MMPLL_D6 38 +#define CLK_TOP_MMPLL_D7 39 -#define CLK_TOP_LVDSPLL 91 -#define CLK_TOP_LVDSPLL_D2 92 -#define CLK_TOP_LVDSPLL_D4 93 -#define CLK_TOP_LVDSPLL_D8 94 +#define CLK_TOP_LVDSPLL 40 +#define CLK_TOP_LVDSPLL_D2 41 +#define CLK_TOP_LVDSPLL_D4 42 +#define CLK_TOP_LVDSPLL_D8 43 -#define CLK_TOP_LVDSTX_CLKDIG_CT 101 +#define CLK_TOP_LVDSTX_CLKDIG_CT 44 -#define CLK_TOP_TVHDMI_H 111 +#define CLK_TOP_TVHDMI_H 45 -#define CLK_TOP_HDMITX_CLKDIG_D2 121 -#define CLK_TOP_HDMITX_CLKDIG_D3 122 +#define CLK_TOP_HDMITX_CLKDIG_D2 46 +#define CLK_TOP_HDMITX_CLKDIG_D3 47 -#define CLK_TOP_TVHDMI_D2 131 -#define CLK_TOP_TVHDMI_D4 132 +#define CLK_TOP_TVHDMI_D2 48 +#define CLK_TOP_TVHDMI_D4 49 -#define CLK_TOP_MEMPLL_MCK_D4 141 +#define CLK_TOP_MEMPLL_MCK_D4 50 -#define CLK_TOP_APLL 151 -#define CLK_TOP_APLL_D4 152 -#define CLK_TOP_APLL_D8 153 -#define CLK_TOP_APLL_D16 154 -#define CLK_TOP_APLL_D24 155 +#define CLK_TOP_APLL 51 +#define CLK_TOP_APLL_D4 52 +#define CLK_TOP_APLL_D8 53 +#define CLK_TOP_APLL_D16 54 +#define CLK_TOP_APLL_D24 55 -#define CLK_TOP_VPLL_DPIX 161 +#define CLK_TOP_VPLL_DPIX 56 -#define CLK_TOP_AD_ISP_208M_CK 171 +#define CLK_TOP_AD_ISP_208M_CK 57 -#define CLK_TOP_AD_MSDC_H208M_CK 181 +#define CLK_TOP_AD_MSDC_H208M_CK 58 /* MUXs */ /* CLK_CFG_0 */ -#define CLK_TOP_MUX_AXI 201 -#define CLK_TOP_MUX_SMI 202 -#define CLK_TOP_MUX_MFG 203 -#define CLK_TOP_MUX_IRDA 204 +#define CLK_TOP_MUX_AXI 59 +#define CLK_TOP_MUX_SMI 60 +#define CLK_TOP_MUX_MFG 61 +#define CLK_TOP_MUX_IRDA 62 /* CLK_CFG_1 */ -#define CLK_TOP_MUX_CAM 205 -#define CLK_TOP_MUX_AUDINTBUS 206 -#define CLK_TOP_MUX_JPG 207 -#define CLK_TOP_MUX_DISP 208 +#define CLK_TOP_MUX_CAM 63 +#define CLK_TOP_MUX_AUDINTBUS 64 +#define CLK_TOP_MUX_JPG 65 +#define CLK_TOP_MUX_DISP 66 /* CLK_CFG_2 */ -#define CLK_TOP_MUX_MSDC1 209 -#define CLK_TOP_MUX_MSDC2 210 -#define CLK_TOP_MUX_MSDC3 211 -#define CLK_TOP_MUX_MSDC4 212 +#define CLK_TOP_MUX_MSDC1 67 +#define CLK_TOP_MUX_MSDC2 68 +#define CLK_TOP_MUX_MSDC3 69 +#define CLK_TOP_MUX_MSDC4 70 /* CLK_CFG_3 */ -#define CLK_TOP_MUX_USB20 213 +#define CLK_TOP_MUX_USB20 71 // 214 // 215 // 216 /* CLK_CFG_4 */ -#define CLK_TOP_MUX_HYD 217 -#define CLK_TOP_MUX_VENC 218 -#define CLK_TOP_MUX_SPI 219 -#define CLK_TOP_MUX_UART 220 +#define CLK_TOP_MUX_HYD 72 +#define CLK_TOP_MUX_VENC 73 +#define CLK_TOP_MUX_SPI 74 +#define CLK_TOP_MUX_UART 75 /* CLK_CFG_6 */ -#define CLK_TOP_MUX_MEM 221 -#define CLK_TOP_MUX_CAMTG 222 -#define CLK_TOP_MUX_FD 223 -#define CLK_TOP_MUX_AUDIO 224 +#define CLK_TOP_MUX_MEM 76 +#define CLK_TOP_MUX_CAMTG 77 +#define CLK_TOP_MUX_FD 78 +#define CLK_TOP_MUX_AUDIO 79 /* CLK_CFG_7 */ -#define CLK_TOP_MUX_FIX 225 -#define CLK_TOP_MUX_VDEC 226 -#define CLK_TOP_MUX_DPILVDS 227 +#define CLK_TOP_MUX_FIX 80 +#define CLK_TOP_MUX_VDEC 81 +#define CLK_TOP_MUX_DPILVDS 82 /* CLK_CFG_8 */ -#define CLK_TOP_MUX_PMICSPI 228 -#define CLK_TOP_MUX_MSDC0 229 -#define CLK_TOP_MUX_SMI_MFG_AS 230 +#define CLK_TOP_MUX_PMICSPI 83 +#define CLK_TOP_MUX_MSDC0 84 +#define CLK_TOP_MUX_SMI_MFG_AS 85 -#define CLK_TOPCK_PMICSPI 301 +#define CLK_TOPCK_PMICSPI 86 /* INFRACFG */ -#define CLK_INFRA_MUX1 1 - -#define CLK_INFRA_DBGCLK 64 -#define CLK_INFRA_SMI 65 -#define CLK_INFRA_SPI0 66 -#define CLK_INFRA_AUDIO 69 -#define CLK_INFRA_DEVAPC 70 -#define CLK_INFRA_MFGAXI 71 -#define CLK_INFRA_M4U 72 -#define CLK_INFRA_MD1MCUAXI 73 -#define CLK_INFRA_MD1HWMIXAXI 74 -#define CLK_INFRA_MD1AHB 75 -#define CLK_INFRA_MD2MCUAXI 76 -#define CLK_INFRA_MD2HWMIXAXI 77 -#define CLK_INFRA_MD2AHB 78 -#define CLK_INFRA_CPUM 79 -#define CLK_INFRA_KP 80 -#define CLK_INFRA_CCIF0 84 -#define CLK_INFRA_CCIF1 85 -#define CLK_INFRA_PMICSPI 86 -#define CLK_INFRA_PMICWRAP 87 +#define CLK_INFRA_MUX1 0 + +#define CLK_INFRA_DBGCLK 1 +#define CLK_INFRA_SMI 2 +#define CLK_INFRA_SPI0 3 +#define CLK_INFRA_AUDIO 4 +#define CLK_INFRA_DEVAPC 5 +#define CLK_INFRA_MFGAXI 6 +#define CLK_INFRA_M4U 7 +#define CLK_INFRA_MD1MCUAXI 8 +#define CLK_INFRA_MD1HWMIXAXI 9 +#define CLK_INFRA_MD1AHB 10 +#define CLK_INFRA_MD2MCUAXI 11 +#define CLK_INFRA_MD2HWMIXAXI 12 +#define CLK_INFRA_MD2AHB 13 +#define CLK_INFRA_CPUM 14 +#define CLK_INFRA_KP 15 +#define CLK_INFRA_CCIF0 16 +#define CLK_INFRA_CCIF1 17 +#define CLK_INFRA_PMICSPI 18 +#define CLK_INFRA_PMICWRAP 19 /* PERICFG */ -#define CLK_PERI0_NFI 0 -#define CLK_PERI0_THERM 1 -#define CLK_PERI0_PWM1 2 -#define CLK_PERI0_PWM2 3 -#define CLK_PERI0_PWM3 4 -#define CLK_PERI0_PWM4 5 -#define CLK_PERI0_PWM5 6 -#define CLK_PERI0_PWM6 7 -#define CLK_PERI0_PWM7 8 -#define CLK_PERI0_PWM 9 -#define CLK_PERI0_USB0 10 -#define CLK_PERI0_USB1 11 -#define CLK_PERI0_APDMA 12 -#define CLK_PERI0_MSDC0 13 -#define CLK_PERI0_MSDC1 14 -#define CLK_PERI0_MSDC2 15 -#define CLK_PERI0_MSDC3 16 -#define CLK_PERI0_MSDC4 17 -#define CLK_PERI0_APHIF 18 -#define CLK_PERI0_MDHIF 19 -#define CLK_PERI0_NLI 20 -#define CLK_PERI0_IRDA 21 -#define CLK_PERI0_UART0 22 -#define CLK_PERI0_UART1 23 -#define CLK_PERI0_UART2 24 -#define CLK_PERI0_UART3 25 -#define CLK_PERI0_I2C0 26 -#define CLK_PERI0_I2C1 27 -#define CLK_PERI0_I2C2 28 -#define CLK_PERI0_I2C3 29 -#define CLK_PERI0_I2C4 30 -#define CLK_PERI0_I2C5 31 - -#define CLK_PERI1_I2C6 32 -#define CLK_PERI1_PWRAP 33 +#define CLK_PERI0_NFI 0 +#define CLK_PERI0_THERM 1 +#define CLK_PERI0_PWM1 2 +#define CLK_PERI0_PWM2 3 +#define CLK_PERI0_PWM3 4 +#define CLK_PERI0_PWM4 5 +#define CLK_PERI0_PWM5 6 +#define CLK_PERI0_PWM6 7 +#define CLK_PERI0_PWM7 8 +#define CLK_PERI0_PWM 9 +#define CLK_PERI0_USB0 10 +#define CLK_PERI0_USB1 11 +#define CLK_PERI0_APDMA 12 +#define CLK_PERI0_MSDC0 13 +#define CLK_PERI0_MSDC1 14 +#define CLK_PERI0_MSDC2 15 +#define CLK_PERI0_MSDC3 16 +#define CLK_PERI0_MSDC4 17 +#define CLK_PERI0_APHIF 18 +#define CLK_PERI0_MDHIF 19 +#define CLK_PERI0_NLI 20 +#define CLK_PERI0_IRDA 21 +#define CLK_PERI0_UART0 22 +#define CLK_PERI0_UART1 23 +#define CLK_PERI0_UART2 24 +#define CLK_PERI0_UART3 25 +#define CLK_PERI0_I2C0 26 +#define CLK_PERI0_I2C1 27 +#define CLK_PERI0_I2C2 28 +#define CLK_PERI0_I2C3 29 +#define CLK_PERI0_I2C4 30 +#define CLK_PERI0_I2C5 31 + +#define CLK_PERI1_I2C6 32 +#define CLK_PERI1_PWRAP 33 #define CLK_PERI1_AUXADC 34 -#define CLK_PERI1_SPI1 35 -#define CLK_PERI1_FHCTL 36 +#define CLK_PERI1_SPI1 35 +#define CLK_PERI1_FHCTL 36 #define CLK_PERI_MUX_UART0 37 #define CLK_PERI_MUX_UART1 38 @@ -233,76 +233,76 @@ /* DISP */ -#define CLK_DISP0_LARB2_SMI 128 -#define CLK_DISP0_ROT_ENGINE 129 -#define CLK_DISP0_ROT_SMI 130 -#define CLK_DISP0_SCL 131 -#define CLK_DISP0_OVL_ENGINE 132 -#define CLK_DISP0_OVL_SMI 133 -#define CLK_DISP0_COLOR 134 -#define CLK_DISP0_2DSHP 135 -#define CLK_DISP0_BLS 136 -#define CLK_DISP0_WDMA0_ENGINE 137 -#define CLK_DISP0_WDMA0_SMI 138 -#define CLK_DISP0_WDMA1_ENGINE 139 -#define CLK_DISP0_WDMA1_SMI 140 -#define CLK_DISP0_RDMA0_ENGINE 141 -#define CLK_DISP0_RDMA0_SMI 142 -#define CLK_DISP0_RDMA0_OUTPUT 143 -#define CLK_DISP0_RDMA1_ENGINE 144 -#define CLK_DISP0_RDMA1_SMI 145 -#define CLK_DISP0_RDMA1_OUTPUT 146 -#define CLK_DISP0_GAMMA_ENGINE 147 -#define CLK_DISP0_GAMMA_PIXEL 148 -#define CLK_DISP0_CMDQ_ENGINE 149 -#define CLK_DISP0_CMDQ_SMI 150 -#define CLK_DISP0_G2D_ENGINE 151 -#define CLK_DISP0_G2D_SMI 152 - -#define CLK_DISP1_DBI_ENGINE 160 -#define CLK_DISP1_DBI_SMI 161 -#define CLK_DISP1_DBI_OUTPUT 162 -#define CLK_DISP1_DSI_ENGINE 163 -#define CLK_DISP1_DSI_DIGITAL 164 -#define CLK_DISP1_DSI_DIGITAL_LANE 165 -#define CLK_DISP1_DPI0 166 -#define CLK_DISP1_DPI1 167 -#define CLK_DISP1_LCD 168 -#define CLK_DISP1_SLCD 169 +#define CLK_DISP0_LARB2_SMI 0 +#define CLK_DISP0_ROT_ENGINE 1 +#define CLK_DISP0_ROT_SMI 2 +#define CLK_DISP0_SCL 3 +#define CLK_DISP0_OVL_ENGINE 4 +#define CLK_DISP0_OVL_SMI 5 +#define CLK_DISP0_COLOR 6 +#define CLK_DISP0_2DSHP 7 +#define CLK_DISP0_BLS 8 +#define CLK_DISP0_WDMA0_ENGINE 9 +#define CLK_DISP0_WDMA0_SMI 10 +#define CLK_DISP0_WDMA1_ENGINE 11 +#define CLK_DISP0_WDMA1_SMI 12 +#define CLK_DISP0_RDMA0_ENGINE 13 +#define CLK_DISP0_RDMA0_SMI 14 +#define CLK_DISP0_RDMA0_OUTPUT 15 +#define CLK_DISP0_RDMA1_ENGINE 16 +#define CLK_DISP0_RDMA1_SMI 17 +#define CLK_DISP0_RDMA1_OUTPUT 18 +#define CLK_DISP0_GAMMA_ENGINE 19 +#define CLK_DISP0_GAMMA_PIXEL 20 +#define CLK_DISP0_CMDQ_ENGINE 21 +#define CLK_DISP0_CMDQ_SMI 22 +#define CLK_DISP0_G2D_ENGINE 23 +#define CLK_DISP0_G2D_SMI 24 + +#define CLK_DISP1_DBI_ENGINE 25 +#define CLK_DISP1_DBI_SMI 26 +#define CLK_DISP1_DBI_OUTPUT 27 +#define CLK_DISP1_DSI_ENGINE 28 +#define CLK_DISP1_DSI_DIGITAL 29 +#define CLK_DISP1_DSI_DIGITAL_LANE 30 +#define CLK_DISP1_DPI0 31 +#define CLK_DISP1_DPI1 32 +#define CLK_DISP1_LCD 33 +#define CLK_DISP1_SLCD 34 /* IMG */ -#define CLK_IMAGE_LARB3_SMI 192 -#define CLK_IMAGE_LARB4_SMI 194 -#define CLK_IMAGE_COMMN_SMI 196 -#define CLK_IMAGE_CAM_SMI 197 -#define CLK_IMAGE_CAM_CAM 198 -#define CLK_IMAGE_SEN_TG 199 -#define CLK_IMAGE_SEN_CAM 200 -#define CLK_IMAGE_JPGD_SMI 201 -#define CLK_IMAGE_JPGD_JPG 202 -#define CLK_IMAGE_JPGE_SMI 203 -#define CLK_IMAGE_JPGE_JPG 204 -#define CLK_IMAGE_FPC 205 +#define CLK_IMAGE_LARB3_SMI 0 +#define CLK_IMAGE_LARB4_SMI 1 +#define CLK_IMAGE_COMMN_SMI 2 +#define CLK_IMAGE_CAM_SMI 3 +#define CLK_IMAGE_CAM_CAM 4 +#define CLK_IMAGE_SEN_TG 5 +#define CLK_IMAGE_SEN_CAM 6 +#define CLK_IMAGE_JPGD_SMI 7 +#define CLK_IMAGE_JPGD_JPG 8 +#define CLK_IMAGE_JPGE_SMI 9 +#define CLK_IMAGE_JPGE_JPG 10 +#define CLK_IMAGE_FPC 11 /* MFG */ -#define CLK_MFG_AXI 224 -#define CLK_MFG_MEM 225 -#define CLK_MFG_G3D 226 -#define CLK_MFG_HYD 227 +#define CLK_MFG_AXI 0 +#define CLK_MFG_MEM 1 +#define CLK_MFG_G3D 2 +#define CLK_MFG_HYD 3 /* AUD */ -#define CLK_AUDIO_AFE 258 -#define CLK_AUDIO_I2S 262 +#define CLK_AUDIO_AFE 0 +#define CLK_AUDIO_I2S 1 /* VDEC */ -#define CLK_VDEC0_VDE 288 +#define CLK_VDEC0_VDE 0 -#define CLK_VDEC1_SMI 320 +#define CLK_VDEC1_SMI 1 /* VENC */ -#define CLK_VENC_VEN 352 +#define CLK_VENC_VEN 0