diff --git a/src/SpiceSharp-Parser.sln b/src/SpiceSharp-Parser.sln index 0e25f862..e4eb773a 100644 --- a/src/SpiceSharp-Parser.sln +++ b/src/SpiceSharp-Parser.sln @@ -1,7 +1,7 @@  Microsoft Visual Studio Solution File, Format Version 12.00 -# Visual Studio Version 17 -VisualStudioVersion = 17.0.31919.166 +# Visual Studio Version 18 +VisualStudioVersion = 18.5.11612.153 insiders MinimumVisualStudioVersion = 10.0.40219.1 Project("{9A19103F-16F7-4668-BE54-9A1E7A4F7556}") = "SpiceSharpParser", "SpiceSharpParser\SpiceSharpParser.csproj", "{DF3DD787-71CC-4C89-9E33-DC4536A52278}" EndProject @@ -17,6 +17,8 @@ Project("{9A19103F-16F7-4668-BE54-9A1E7A4F7556}") = "SpiceSharpParser.Performanc EndProject Project("{9A19103F-16F7-4668-BE54-9A1E7A4F7556}") = "SpiceSharpParser.Tests", "SpiceSharpParser.Tests\SpiceSharpParser.Tests.csproj", "{94394567-BC35-43EE-92CB-31AC780305FE}" EndProject +Project("{FAE04EC0-301F-11D3-BF4B-00C04F79EFBC}") = "SpiceSharpParser.AIExamples", "SpiceSharpParser.AIExamples\SpiceSharpParser.AIExamples.csproj", "{2AB238C7-D9DC-94E6-1355-4CDA8CE3429B}" +EndProject Global GlobalSection(SolutionConfigurationPlatforms) = preSolution Debug|Any CPU = Debug|Any CPU @@ -54,6 +56,12 @@ Global {94394567-BC35-43EE-92CB-31AC780305FE}.ERRORS|Any CPU.Build.0 = Debug|Any CPU {94394567-BC35-43EE-92CB-31AC780305FE}.Release|Any CPU.ActiveCfg = Release|Any CPU {94394567-BC35-43EE-92CB-31AC780305FE}.Release|Any CPU.Build.0 = Release|Any CPU + {2AB238C7-D9DC-94E6-1355-4CDA8CE3429B}.Debug|Any CPU.ActiveCfg = Debug|Any CPU + {2AB238C7-D9DC-94E6-1355-4CDA8CE3429B}.Debug|Any CPU.Build.0 = Debug|Any CPU + {2AB238C7-D9DC-94E6-1355-4CDA8CE3429B}.ERRORS|Any CPU.ActiveCfg = Debug|Any CPU + {2AB238C7-D9DC-94E6-1355-4CDA8CE3429B}.ERRORS|Any CPU.Build.0 = Debug|Any CPU + {2AB238C7-D9DC-94E6-1355-4CDA8CE3429B}.Release|Any CPU.ActiveCfg = Release|Any CPU + {2AB238C7-D9DC-94E6-1355-4CDA8CE3429B}.Release|Any CPU.Build.0 = Release|Any CPU EndGlobalSection GlobalSection(SolutionProperties) = preSolution HideSolutionNode = FALSE @@ -63,6 +71,7 @@ Global {690C3742-17AD-46F6-A73D-CAE33C780523} = {A98DF2D4-CFE4-44F3-AD5C-21D6A0648EFD} {53D996E7-8D58-49D0-97F6-71CAD49670A2} = {CEDE104D-B6B3-433F-A8B3-C06086A4DD4E} {94394567-BC35-43EE-92CB-31AC780305FE} = {CEDE104D-B6B3-433F-A8B3-C06086A4DD4E} + {2AB238C7-D9DC-94E6-1355-4CDA8CE3429B} = {CEDE104D-B6B3-433F-A8B3-C06086A4DD4E} EndGlobalSection GlobalSection(ExtensibilityGlobals) = postSolution SolutionGuid = {F5DF7359-A6BE-4DB6-9200-CEFBAEBAD75E} diff --git a/src/SpiceSharpParser.AIExamples/AcceptedExampleCase.cs b/src/SpiceSharpParser.AIExamples/AcceptedExampleCase.cs new file mode 100644 index 00000000..ddd22cd8 --- /dev/null +++ b/src/SpiceSharpParser.AIExamples/AcceptedExampleCase.cs @@ -0,0 +1,117 @@ +using System.Text.Json.Serialization; + +namespace SpiceSharpParserAIExamples; + +internal sealed class AcceptedExampleCase +{ + [JsonPropertyName("id")] + public string Id { get; init; } = ""; + + [JsonPropertyName("source")] + public string Source { get; init; } = ""; + + [JsonPropertyName("example_id")] + public string ExampleId { get; init; } = ""; + + [JsonPropertyName("test_name")] + public string TestName { get; init; } = ""; + + [JsonPropertyName("netlist_hash")] + public string NetlistHash { get; init; } = ""; + + [JsonPropertyName("generator_model")] + public string GeneratorModel { get; init; } = ""; + + [JsonPropertyName("generator_source")] + public string GeneratorSource { get; init; } = ""; + + [JsonPropertyName("quality_tier")] + public string QualityTier { get; init; } = ""; + + [JsonPropertyName("status")] + public string Status { get; init; } = ""; + + [JsonPropertyName("pytest_status")] + public string PytestStatus { get; init; } = ""; + + [JsonPropertyName("prompt_count")] + public int PromptCount { get; init; } + + [JsonPropertyName("representative_prompt")] + public string RepresentativePrompt { get; init; } = ""; + + [JsonPropertyName("pair_ids")] + public List PairIds { get; init; } = []; + + [JsonPropertyName("prompts")] + public List Prompts { get; init; } = []; + + [JsonPropertyName("measurements")] + public List Measurements { get; init; } = []; +} + +internal sealed class MeasurementReport +{ + [JsonPropertyName("name")] + public string Name { get; init; } = ""; + + [JsonPropertyName("key")] + public string Key { get; init; } = ""; + + [JsonPropertyName("index")] + public int Index { get; init; } + + [JsonPropertyName("value")] + public double? Value { get; init; } + + [JsonPropertyName("value_is_finite")] + public bool ValueIsFinite { get; init; } + + [JsonPropertyName("success")] + public bool Success { get; init; } + + [JsonPropertyName("measurement_type")] + public string MeasurementType { get; init; } = ""; + + [JsonPropertyName("simulation_name")] + public string SimulationName { get; init; } = ""; +} + +internal sealed class AcceptedExamplesManifest +{ + [JsonPropertyName("total_unique_cases")] + public int TotalUniqueCases { get; init; } + + [JsonPropertyName("unmatched_accepted_pair_hashes")] + public int UnmatchedAcceptedPairHashes { get; init; } + + [JsonPropertyName("sources")] + public List Sources { get; init; } = []; +} + +internal sealed class AcceptedExamplesSourceManifest +{ + [JsonPropertyName("name")] + public string Name { get; init; } = ""; + + [JsonPropertyName("accepted_pairs_path")] + public string AcceptedPairsPath { get; init; } = ""; + + [JsonPropertyName("accepted_pairs_sha256")] + public string AcceptedPairsSha256 { get; init; } = ""; + + [JsonPropertyName("accepted_pair_count")] + public int AcceptedPairCount { get; init; } + + [JsonPropertyName("unique_netlist_count")] + public int UniqueNetlistCount { get; init; } + + [JsonPropertyName("measured_examples_path")] + public string MeasuredExamplesPath { get; init; } = ""; + + [JsonPropertyName("measured_examples_sha256")] + public string MeasuredExamplesSha256 { get; init; } = ""; + + [JsonPropertyName("measured_example_count")] + public int MeasuredExampleCount { get; init; } +} diff --git a/src/SpiceSharpParser.AIExamples/AcceptedExampleFixture.cs b/src/SpiceSharpParser.AIExamples/AcceptedExampleFixture.cs new file mode 100644 index 00000000..63e8d834 --- /dev/null +++ b/src/SpiceSharpParser.AIExamples/AcceptedExampleFixture.cs @@ -0,0 +1,69 @@ +using System.Security.Cryptography; +using System.Text.Json; +using Xunit; + +namespace SpiceSharpParserAIExamples; + +internal static class AcceptedExampleFixture +{ + private static readonly JsonSerializerOptions JsonOptions = new() + { + PropertyNameCaseInsensitive = true, + }; + + private static readonly Lazy> LazyCases = new(LoadCases); + private static readonly Lazy> LazyCasesById = + new(() => LazyCases.Value.ToDictionary(item => item.Id, StringComparer.Ordinal)); + private static readonly Lazy LazyManifest = new(LoadManifest); + + public static IReadOnlyList All => LazyCases.Value; + + public static AcceptedExamplesManifest Manifest => LazyManifest.Value; + + public static AcceptedExampleCase Get(string id) + { + Assert.True(LazyCasesById.Value.TryGetValue(id, out var testCase), $"fixture case {id} was not found"); + return testCase; + } + public static string Sha256File(string path) + { + using var stream = File.OpenRead(path); + return Convert.ToHexString(SHA256.HashData(stream)).ToLowerInvariant(); + } + + private static IReadOnlyList LoadCases() + { + var path = FixturePath("accepted_examples_fixture.jsonl"); + var cases = new List(); + foreach (var line in File.ReadLines(path)) + { + if (string.IsNullOrWhiteSpace(line)) + { + continue; + } + + cases.Add(JsonSerializer.Deserialize(line, JsonOptions) + ?? throw new InvalidOperationException($"Could not deserialize fixture line from {path}")); + } + + return cases; + } + + private static AcceptedExamplesManifest LoadManifest() + { + var path = FixturePath("accepted_examples_manifest.json"); + return JsonSerializer.Deserialize(File.ReadAllText(path), JsonOptions) + ?? throw new InvalidOperationException($"Could not deserialize manifest {path}"); + } + + private static string FixturePath(string fileName) + { + var path = Path.Combine(AppContext.BaseDirectory, fileName); + if (!File.Exists(path)) + { + throw new FileNotFoundException($"Generated fixture file is missing: {path}", path); + } + + return path; + } +} diff --git a/src/SpiceSharpParser.AIExamples/AcceptedExampleTests.Helpers.cs b/src/SpiceSharpParser.AIExamples/AcceptedExampleTests.Helpers.cs new file mode 100644 index 00000000..f9a689d7 --- /dev/null +++ b/src/SpiceSharpParser.AIExamples/AcceptedExampleTests.Helpers.cs @@ -0,0 +1,213 @@ +using System.Security.Cryptography; +using System.Text; +using Xunit; + +namespace SpiceSharpParserAIExamples; + +public sealed partial class AcceptedExampleTests +{ + private static readonly Lazy Integrity = new(BuildIntegritySnapshot); + + private static AcceptedExampleCase RunAcceptedExample(string id, string netlist) + { + var testCase = AcceptedExampleFixture.Get(id); + Assert.Equal(testCase.NetlistHash, ShortHash(NormalizeInlineNetlist(netlist))); + return RunAcceptedExample(testCase); + } + + private static AcceptedExampleCase RunAcceptedExample(AcceptedExampleCase testCase) + { + AssertAcceptedExampleIntegrity(testCase, Integrity.Value); + return testCase; + } + + private static string NormalizeInlineNetlist(string netlist) => + netlist.Replace("\r\n", "\n").Replace('\r', '\n').Trim() + "\n"; + + private static string ShortHash(string text) + { + var bytes = Encoding.UTF8.GetBytes(text); + return Convert.ToHexString(SHA256.HashData(bytes)).ToLowerInvariant()[..16]; + } + + private static void AssertAcceptedExampleIntegrity(AcceptedExampleCase testCase, FixtureIntegritySnapshot snapshot) + { + Assert.Contains(testCase.Id, snapshot.CaseIds); + Assert.Equal("gold", testCase.QualityTier); + Assert.Equal("ok", testCase.Status); + Assert.Equal("ok", testCase.PytestStatus); + Assert.True(testCase.PromptCount > 0, $"{testCase.Id} has no prompts"); + Assert.Equal(testCase.PromptCount, testCase.Prompts.Count); + Assert.Equal(testCase.PromptCount, testCase.PairIds.Count); + Assert.NotEmpty(testCase.Measurements); + Assert.True(snapshot.SourceCounts.ContainsKey(testCase.Source), $"{testCase.Id} has unknown source {testCase.Source}"); + } + + private static void AssertAllMeasurementsSuccessful(AcceptedExampleCase result) + { + Assert.True(result.Measurements.Count > 0, $"{CaseLabel(result)}: expected at least one measurement"); + var failed = result.Measurements + .Where(item => !item.Success || !item.ValueIsFinite || item.Value is null || !double.IsFinite(item.Value.Value)) + .Select(item => item.Name) + .ToArray(); + Assert.True(failed.Length == 0, $"{CaseLabel(result)}: failed/non-finite measurements: {string.Join(", ", failed)}"); + } + + private static void AssertHasSuccessfulMeasurement(AcceptedExampleCase result, string? name) + { + var found = result.Measurements.Any(item => + (name is null || string.Equals(MeasurementName(item), name, StringComparison.OrdinalIgnoreCase)) + && item.Success + && item.ValueIsFinite + && item.Value is not null + && double.IsFinite(item.Value.Value)); + Assert.True(found, $"{CaseLabel(result)}: expected a successful measurement named {name ?? ""}"); + } + + private static void AssertMeasurementCount(AcceptedExampleCase result, string name, int expected) + { + var count = result.Measurements.Count(item => + string.Equals(MeasurementName(item), name, StringComparison.OrdinalIgnoreCase)); + Assert.Equal(expected, count); + } + + private static void AssertMeasurementBetween(AcceptedExampleCase result, string name, double low, double high, int index = 0) + { + var value = MeasurementValue(result, name, index); + Assert.True(low <= value && value <= high, $"{CaseLabel(result)}: {name}={value} is outside [{low}, {high}]"); + } + + private static void AssertMeasurementGreater(AcceptedExampleCase result, string name, double threshold, int index = 0) + { + var value = MeasurementValue(result, name, index); + Assert.True(value > threshold, $"{CaseLabel(result)}: {name}={value} is not greater than {threshold}"); + } + + private static void AssertMeasurementLess(AcceptedExampleCase result, string name, double threshold, int index = 0) + { + var value = MeasurementValue(result, name, index); + Assert.True(value < threshold, $"{CaseLabel(result)}: {name}={value} is not less than {threshold}"); + } + + private static void AssertMeasurementNear(AcceptedExampleCase result, string name, double expected, double tolerance, int index = 0) + { + var value = MeasurementValue(result, name, index); + Assert.True(Math.Abs(value - expected) <= tolerance, $"{CaseLabel(result)}: {name}={value} differs from {expected} by more than {tolerance}"); + } + + private static void AssertMeasurementRatioBetween( + AcceptedExampleCase result, + string numerator, + string denominator, + double low, + double high, + int numeratorIndex = 0, + int denominatorIndex = 0) + { + var denominatorValue = MeasurementValue(result, denominator, denominatorIndex); + Assert.NotEqual(0.0, denominatorValue); + var ratio = MeasurementValue(result, numerator, numeratorIndex) / denominatorValue; + Assert.True(low <= ratio && ratio <= high, $"{CaseLabel(result)}: {numerator}/{denominator}={ratio} is outside [{low}, {high}]"); + } + + private static MeasurementReport RequireMeasurement(AcceptedExampleCase result, string name, int index = 0, bool successful = true) + { + var found = result.Measurements + .Where(item => string.Equals(MeasurementName(item), name, StringComparison.OrdinalIgnoreCase)) + .ToArray(); + Assert.True(index < found.Length, $"{CaseLabel(result)}: measurement {name} index {index} not found"); + var measurement = found[index]; + if (successful) + { + Assert.True( + measurement.Success && measurement.ValueIsFinite && measurement.Value is not null && double.IsFinite(measurement.Value.Value), + $"{CaseLabel(result)}: measurement {name} did not succeed with a finite value"); + } + + return measurement; + } + + private static double MeasurementValue(AcceptedExampleCase result, string name, int index = 0) => + MeasurementNumericValue(RequireMeasurement(result, name, index)); + + private static IReadOnlyDictionary MeasurementsDictionary(AcceptedExampleCase result) => + result.Measurements.ToDictionary( + item => item.Name, + item => MeasurementNumericValue(item), + StringComparer.OrdinalIgnoreCase); + + private static double MeasurementNumericValue(MeasurementReport measurement) + { + Assert.True(measurement.Value is not null, $"measurement {measurement.Name} has no value"); + return measurement.Value.Value; + } + + private static string MeasurementName(MeasurementReport item) => + string.IsNullOrWhiteSpace(item.Name) ? item.Key : item.Name; + + private static bool IsTruthy(object? value) => + value switch + { + null => false, + bool boolean => boolean, + double number => number != 0, + int number => number != 0, + string text => text.Length > 0, + System.Collections.IEnumerable items => items.Cast().Any(), + _ => true, + }; + + private static double ToDouble(object? value) + { + return value switch + { + double number => number, + int number => number, + long number => number, + float number => number, + decimal number => (double)number, + bool boolean => boolean ? 1.0 : 0.0, + string text when double.TryParse(text, out var parsed) => parsed, + _ => throw new InvalidOperationException($"value {value} is not numeric"), + }; + } + + private static int Length(object? value) => + value switch + { + string text => text.Length, + System.Collections.ICollection items => items.Count, + _ => throw new InvalidOperationException($"value {value} has no length"), + }; + + private static string CaseLabel(AcceptedExampleCase result) => $"{result.Id} ({result.ExampleId})"; + + private static FixtureIntegritySnapshot BuildIntegritySnapshot() + { + var cases = AcceptedExampleFixture.All; + var manifest = AcceptedExampleFixture.Manifest; + + Assert.Equal(948, cases.Count); + Assert.Equal(manifest.TotalUniqueCases, cases.Count); + Assert.Equal(0, manifest.UnmatchedAcceptedPairHashes); + Assert.Equal(cases.Count, cases.Select(item => item.Id).Distinct(StringComparer.Ordinal).Count()); + Assert.Equal(cases.Count, cases.Select(item => item.NetlistHash).Distinct(StringComparer.Ordinal).Count()); + + var sourceCounts = cases + .GroupBy(item => item.Source, StringComparer.Ordinal) + .ToDictionary(group => group.Key, group => group.Count(), StringComparer.Ordinal); + foreach (var source in manifest.Sources) + { + Assert.True(sourceCounts.TryGetValue(source.Name, out var sourceCaseCount), $"manifest source {source.Name} has no generated cases"); + Assert.Equal(source.UniqueNetlistCount, sourceCaseCount); + } + + return new FixtureIntegritySnapshot( + cases.Select(item => item.Id).ToHashSet(StringComparer.Ordinal), + sourceCounts); + } + + private sealed record FixtureIntegritySnapshot( + IReadOnlySet CaseIds, + IReadOnlyDictionary SourceCounts); +} diff --git a/src/SpiceSharpParser.AIExamples/AcceptedExampleTests.cs b/src/SpiceSharpParser.AIExamples/AcceptedExampleTests.cs new file mode 100644 index 00000000..e1e224ac --- /dev/null +++ b/src/SpiceSharpParser.AIExamples/AcceptedExampleTests.cs @@ -0,0 +1,28291 @@ +// +using Xunit; + +namespace SpiceSharpParserAIExamples; + +public sealed partial class AcceptedExampleTests +{ + // Prompt: First-order RC high-pass filter with R=1k\u03a9 and C=1\xb5F. + [Fact] + public void First_order_RC_high_pass_filter_R_1k_C_1uF_61b0b251cbcac08e() + { + var result = RunAcceptedExample( + "deepseek:00072_0315b0fd73ad4970:61b0b251cbcac08e", + """ + * First-order RC high-pass filter, R=1k C=1uF + VIN in 0 DC 0 AC 1 + C1 in out 1uF + R1 out 0 1k + .AC DEC 10 1 1e6 + .MEAS AC gain_low FIND V(out) AT=10 + .MEAS AC gain_high FIND V(out) AT=100k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "gain_high", 0.9, 1.1); + AssertMeasurementBetween(result, "gain_low", 0.0, 0.2); + } + + // Prompt: Design an RC high-pass filter using a 10k resistor and 100nF capacitor. AC analysis from 1 Hz to 1 MHz. Check the output amplitude at 10 Hz and 1 MHz. + [Fact] + public void RC_high_pass_filter_with_R_10k_C_100nF_bff314502177a652() + { + var result = RunAcceptedExample( + "deepseek:00073_c554c06e947da022:bff314502177a652", + """ + * RC high-pass filter with R=10k C=100nF + VIN in 0 AC 1 + C1 in out 0.1uF + R1 out 0 10k + .AC DEC 20 1 1e6 + .MEAS AC low_gain FIND V(out) AT=10 + .MEAS AC high_gain FIND V(out) AT=1e6 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "high_gain", 0.9, 1.1); + AssertMeasurementBetween(result, "low_gain", 0.0, 0.2); + } + + // Prompt: Construct a high-pass filter with a 100 ohm resistor and 10uF capacitor. Run an AC sweep from 1Hz to 1MHz and measure the output at 1Hz and 1MHz. + [Fact] + public void RC_high_pass_filter_R_100_C_10uF_a90b5fc11074fd1f() + { + var result = RunAcceptedExample( + "deepseek:00074_b1b4942e2c40bedb:a90b5fc11074fd1f", + """ + * RC high-pass filter R=100 C=10uF + VIN in 0 AC 1 + C1 in out 10uF + R1 out 0 100 + .AC LIN 100 1 1e6 + .MEAS AC gain_1Hz FIND V(out) AT=1 + .MEAS AC gain_1MHz FIND V(out) AT=1e6 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "gain_1MHz", 0.9, 1.1); + AssertMeasurementLess(result, "gain_1Hz", 0.2); + } + + // Prompt: Design a high-pass filter with R=1k and C=100nF. Perform an AC sweep from 10Hz to 1MHz (decade, 50 points per decade) and measure the output voltage magnitude at 100Hz and 100kHz. + [Fact] + public void RC_high_pass_filter_R_1k_C_100nF_450d5c452770b794() + { + var result = RunAcceptedExample( + "deepseek:00075_206cf2c546556393:450d5c452770b794", + """ + * RC high-pass filter R=1k C=100nF + VIN in 0 AC 1 + C1 in out 0.1uF + R1 out 0 1k + .AC DEC 50 10 1e6 + .MEAS AC vout_100 FIND V(out) AT=100 + .MEAS AC vout_100k FIND V(out) AT=100k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "vout_100k", 0.9, 1.1); + AssertMeasurementBetween(result, "vout_100", 0.0, 0.5); + } + + // Prompt: Design an RC high-pass filter with a 10k resistor and 10nF capacitor. Simulate an AC sweep from 10 Hz to 100 kHz (decade 50 points) and measure the output at 1 kHz and 100 kHz. + [Fact] + public void RC_high_pass_filter_R_10k_C_10nF_c05aae80b8f512ca() + { + var result = RunAcceptedExample( + "deepseek:00076_93b80396f9b98f8c:c05aae80b8f512ca", + """ + * RC high-pass filter R=10k C=10nF + VIN in 0 AC 1 + C1 in out 10nF + R1 out 0 10k + .AC DEC 50 10 100k + .MEAS AC gain_1k FIND V(out) AT=1k + .MEAS AC gain_100k FIND V(out) AT=100k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "gain_100k", 0.9, 1.1); + AssertMeasurementBetween(result, "gain_1k", 0.0, 0.6); + } + + // Prompt: Design an RC high-pass using R=1k and C=0.1uF. Include a 5V DC offset on the AC source. Run AC sweep from 1Hz to 1MHz (dec 10) and measure output at 100Hz and 1MHz. + [Fact] + public void RC_high_pass_filter_with_DC_offset_b872d4dcdf235671() + { + var result = RunAcceptedExample( + "deepseek:00077_c121d431aaca5189:b872d4dcdf235671", + """ + * RC high-pass filter with DC offset + VIN in 0 DC 5 AC 1 + C1 in out 0.1uF + R1 out 0 1k + .AC DEC 10 1 1e6 + .MEAS AC g100 FIND V(out) AT=100 + .MEAS AC g1M FIND V(out) AT=1e6 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "g1M", 0.9, 1.1); + AssertMeasurementBetween(result, "g100", 0.0, 0.5); + } + + // Prompt: Design a high-pass filter with R=100k and C=1nF. AC sweep 10Hz-100kHz (dec 20). Measure output at 100Hz and 100kHz. + [Fact] + public void RC_high_pass_filter_R_100k_C_1nF_6bc8883048ba1b99() + { + var result = RunAcceptedExample( + "deepseek:00078_d1265e58adc2f2d5:6bc8883048ba1b99", + """ + * RC high-pass filter R=100k C=1nF + VIN in 0 AC 1 + C1 in out 1nF + R1 out 0 100k + .AC DEC 20 10 100k + .MEAS AC v100 FIND V(out) AT=100 + .MEAS AC v100k FIND V(out) AT=100k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "v100k", 0.9, 1.1); + AssertMeasurementBetween(result, "v100", 0.0, 0.5); + } + + // Prompt: Design an RC high-pass filter with a very low cutoff: R=10k, C=1uF. AC analysis 1 Hz to 100 kHz (dec 10). Measure output at 1 Hz and 1 kHz. + [Fact] + public void RC_high_pass_filter_low_cutoff_15_9_Hz_394def56bd61324c() + { + var result = RunAcceptedExample( + "deepseek:00079_618f899a01cee257:394def56bd61324c", + """ + * RC high-pass filter low cutoff 15.9 Hz + VIN in 0 AC 1 + C1 in out 1uF + R1 out 0 10k + .AC DEC 10 1 100k + .MEAS AC out_1Hz FIND V(out) AT=1 + .MEAS AC out_1kHz FIND V(out) AT=1k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "out_1kHz", 0.9, 1.1); + AssertMeasurementBetween(result, "out_1Hz", 0.0, 0.5); + } + + // Prompt: Defines a reusable RC low-pass filter subcircuit with R=10k and C=10nF. + [Fact] + public void RC_LP_10k_10nF_d94325acaeeb261a() + { + var result = RunAcceptedExample( + "deepseek:02497_800759546cb8c320:d94325acaeeb261a", + """ + * RC LP 10k 10nF + .SUBCKT LPF in out gnd PARAMS: R=10k C=10nF + R1 in out {R} + C1 out gnd {C} + .ENDS + + V1 in 0 AC 1 + X1 in out 0 LPF PARAMS: R=10k C=10nF + + .AC DEC 100 1 10k + .MEAS AC max_gain MAX V(out) + .MEAS AC f3dB WHEN VDB(out)=-3.0103 + + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "max_gain", 1.0, 0.05); + AssertMeasurementNear(result, "f3dB", 1591.55, 2.0); + } + + // Prompt: RL low-pass filter with 100 mH inductor and 100 \u03a9 resistor + [Fact] + public void RL_Low_Pass_Filter_25922166e7602021() + { + var result = RunAcceptedExample( + "deepseek:00081_ee30a909de8ca0d9:25922166e7602021", + """ + * RL Low-Pass Filter + V1 in 0 DC 0 AC 1 + L1 in out 100m + R1 out 0 100 + .AC DEC 20 1 10k + .MEAS AC v_lf FIND VDB(out) AT=10 + .MEAS AC f3db WHEN VDB(out)=-3 + .MEAS AC v_1k FIND VDB(out) AT=1000 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "v_lf", 0.0, 0.5); + AssertMeasurementNear(result, "f3db", 159.15, 5.0); + AssertMeasurementLess(result, "v_1k", (-10.0)); + } + + // Prompt: Simulate a current sink and check its current over a supply voltage sweep. VCC from 5V to 15V, Vbias=2V, RE=1k, RL=1k. Measure I(Rload) at 5V, 10V, and 15V using .DC analysis. + [Fact] + public void Current_sink_DC_sweep_of_supply_voltage_fb5942b8913780aa() + { + var result = RunAcceptedExample( + "deepseek:01123_677531dce86806f1:fb5942b8913780aa", + """ + * Current sink DC sweep of supply voltage + VCC vcc 0 DC 10 + Vbias base 0 DC 2 + Rload vcc collector 1k + RE emitter 0 1k + Q1 collector base emitter npnmod + .MODEL npnmod NPN(IS=1e-14 BF=100 VA=50) + .DC VCC 5 15 0.1 + .MEAS DC i_10v FIND I(Rload) AT=10 + .MEAS DC i_5v FIND I(Rload) AT=5 + .MEAS DC i_15v FIND I(Rload) AT=15 + .END + """); + + AssertAllMeasurementsSuccessful(result); + foreach (var mv in new[] { "i_5v", "i_10v", "i_15v" }) + { + AssertMeasurementNear(result, mv, 0.0013, 0.0002); + } + } + + // Prompt: Basic BJT current sink with 9V supply, 1.8V base bias, 1.5k\u03a9 emitter resistor, and 2.2k\u03a9 collector load. + [Fact] + public void BJT_sink_current_measured_across_emitter_resistor_5a38b6a82407dae7() + { + var result = RunAcceptedExample( + "deepseek:01125_20aeb91bc734c189:5a38b6a82407dae7", + """ + * BJT sink current measured across emitter resistor + VCC vcc 0 DC 9 + Vbias base 0 DC 1.8 + Rload vcc collector 2.2k + RE emitter 0 1.5k + Q1 collector base emitter npn + .MODEL npn NPN(IS=1e-14 BF=150) + .DC VCC 9 9 1 + .MEAS DC v_emitter FIND V(emitter) AT=9 + .MEAS DC i_emitter FIND I(RE) AT=9 + .MEAS DC i_collector FIND I(Rload) AT=9 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "v_emitter", 1.1, 0.1); + AssertMeasurementNear(result, "i_emitter", 0.000733, 5e-05); + AssertMeasurementNear(result, "i_collector", 0.000733, 5e-05); + AssertMeasurementRatioBetween(result, "i_collector", "i_emitter", 0.98, 1.0); + } + + // Prompt: High Early voltage NPN current sink + [Fact] + public void High_Early_voltage_BJT_current_sink_5cc6856b81e563fb() + { + var result = RunAcceptedExample( + "deepseek:01126_786aee84a60995b2:5cc6856b81e563fb", + """ + * High Early voltage BJT current sink + VCC vcc 0 DC 20 + Vbias base 0 DC 2.5 + Rload vcc collector 3.3k + RE emitter 0 2.2k + Q1 collector base emitter hipn + .MODEL hipn NPN(IS=1e-15 BF=200 VAF=200) + .OP + .DC VCC 20 20 1 + .MEAS DC iout FIND I(Rload) AT=20 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "iout", 0.000818, 8e-05); + } + + // Prompt: Simple red LED shunt voltage reference. + [Fact] + public void LED_Shunt_Reference_21ff7cc5d03578ec() + { + var result = RunAcceptedExample( + "deepseek:00348_bf47adadc63d7e19:21ff7cc5d03578ec", + """ + * LED Shunt Reference + V1 in 0 DC 5 + R1 in out 330 + D1 out 0 red + .MODEL red D(IS=1e-18 N=1.9 BV=5.0 IBV=10u RS=15 CJO=10p) + .DC V1 0 10 0.1 + .MEASURE DC vref FIND V(out) AT=5 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "vref", 1.8, 0.2); + } + + // Prompt: Make a 2.2V shunt reference using a green LED and a 1k resistor from a 12V supply. + [Fact] + public void Green_LED_Shunt_Reference_322c25eddb282eaf() + { + var result = RunAcceptedExample( + "deepseek:00349_322c25eddb282eaf:322c25eddb282eaf", + """ + * Green LED Shunt Reference + VIN in 0 DC 12 + R1 in out 1k + D1 out 0 green + .MODEL green D(IS=5e-20 N=2.0 BV=5.0 RS=10 CJO=15p) + .DC VIN 0 15 0.1 + .MEAS DC vref FIND V(out) WHEN V(in)=12 + .MEAS DC iled FIND I(D1) WHEN V(in)=12 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "vref", 2.2, 0.3); + AssertMeasurementGreater(result, "iled", 0.001); + } + + // Prompt: Blue LED shunt reference from a 9V battery + [Fact] + public void Blue_LED_Shunt_Reference_a4b6d860ef90d05e() + { + var result = RunAcceptedExample( + "deepseek:00350_5c743537d4751002:a4b6d860ef90d05e", + """ + * Blue LED Shunt Reference + Vbat batt 0 DC 9 + R1 batt ref 220 + D1 ref 0 blue + .MODEL blue D(IS=1e-20 N=2.8 BV=5.0 RS=5 CJO=8p) + .DC Vbat 0 9 0.1 + .MEAS DC vref FIND V(ref) AT=9 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "vref", 3.2, 0.3); + } + + // Prompt: This is a basic current-to-voltage converter using an ideal op-amp with a 10k feedback resistor. + [Fact] + public void Transimpedance_Amplifier_Basic_55bdef0f0cee5e49() + { + var result = RunAcceptedExample( + "deepseek:00600_cfa3e6ea2014c304:55bdef0f0cee5e49", + """ + * Transimpedance Amplifier - Basic + Iin 0 in DC 0 AC 1 + Rf out in 10k + Eopamp out 0 in 0 100000 + .OP + .AC DEC 10 1 100k + .MEAS AC transimpedance FIND mag(V(out)) AT=1 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "transimpedance", 10000.0, 100.0); + } + + // Prompt: The diode D1 allows current only when the input voltage exceeds the output voltage, charging capacitor C1. + [Fact] + public void Diode_Peak_Detector_with_Bleed_Resistor_891184e4216e3060() + { + var result = RunAcceptedExample( + "deepseek:02382_b8fd880a52172689:891184e4216e3060", + """ + * Diode Peak Detector with Bleed Resistor + D1 in out DMOD + C1 out 0 1u + R1 out 0 100k + Vin in 0 SIN(0 5 1k) + .MODEL DMOD D(IS=2e-16 N=1 RS=0) + .TRAN 1u 5m + .MEAS TRAN vmax MAX V(out) + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "vmax", 4.2, 4.6); + } + + // Prompt: Schottky diode peak detector with 100 nF capacitor and 10 k\u03a9 bleed resistor + [Fact] + public void Schottky_Diode_Peak_Detector_79f55501c156bfe0() + { + var result = RunAcceptedExample( + "deepseek:02383_44ad2a592fe2af1c:79f55501c156bfe0", + """ + * Schottky Diode Peak Detector + D1 in out SMOD + C1 out 0 100n + R1 out 0 10k + Vin in 0 SIN(0 2 10k) + .MODEL SMOD D(IS=1e-9 RS=5 BV=50) + .TRAN 0.1u 2m + .MEAS TRAN vmax MAX V(out) + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "vmax", 1.6, 1.8); + } + + // Prompt: Design a source-degenerated NMOS current mirror with a 100 \xb5A reference current. Use 1 k\u03a9 degeneration resistors. Perform DC analysis sweeping the output voltage from 0 to 5 V and verify the output current in saturation is approximately 100 \xb5A. + [Fact] + public void MOS_source_degenerated_current_mirror_f130345a300de73b() + { + var result = RunAcceptedExample( + "deepseek:01358_00a4b74d96d59027:f130345a300de73b", + """ + * MOS source-degenerated current mirror + VDD vdd 0 DC 5 + IREF vdd d1 DC 100uA + M1 d1 d1 s1 0 nmos W=10u L=1u + R1 s1 0 1k + M2 d2 d1 s2 0 nmos W=10u L=1u + R2 s2 0 1k + VOUT vdd d2 DC 0 + .MODEL nmos NMOS (VTO=1 KP=200u LAMBDA=0.02) + .OP + .DC VOUT 0 5 0.01 + .MEAS DC iout_sat FIND I(VOUT) AT=2 + .MEAS DC iout_lin FIND I(VOUT) AT=4.5 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "iout_sat", 9e-05, 0.00011); + var sat = MeasurementValue(result, "iout_sat"); + AssertMeasurementLess(result, "iout_lin", sat); + } + + // Prompt: Design a sawtooth oscillator that uses a constant current source to charge a capacitor and a voltage-controlled switch to reset it periodically. Include a pulse source to drive the switch. + [Fact] + public void Sawtooth_generator_using_current_source_and_reset_switch_d94341e082f9330c() + { + var result = RunAcceptedExample( + "deepseek:01945_d94341e082f9330c:d94341e082f9330c", + """ + * Sawtooth generator using current source and reset switch + I1 0 n1 DC 100uA + C1 n1 0 10nF + S1 n1 0 ctrl 0 swmod + .model swmod SW(RON=10 ROFF=100MEG VT=2 VH=0.5) + Vreset ctrl 0 PULSE(0 5 0 1n 1n 2u 100u) + .tran 10n 500u + .meas tran vmax MAX V(n1) from=100u to=500u + .meas tran tper TRIG V(n1) VAL=0.5 RISE=1 TARG V(n1) VAL=0.5 RISE=2 from=100u to=500u + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "vmax", 0.9, 1.05); + AssertMeasurementNear(result, "tper", 0.0001, 1e-06); + } + + // Prompt: NMOS pass transistor level shifter converting 0-1.8V logic to 0-5V. + [Fact] + public void NMOS_pass_transistor_level_shifter_866397d04ebf3a2a() + { + var result = RunAcceptedExample( + "deepseek:01426_3dc85d7efbef46c4:866397d04ebf3a2a", + """ + * NMOS pass transistor level shifter + Vhigh vddh 0 5V + Vlo vddl 0 1.8V + Vin in 0 PULSE(0 1.8 500n 1n 1n 500n 2u) + M1 out vddl in in nmos W=10u L=1u + R1 vddh out 10k + .MODEL nmos NMOS(VTO=0.7 KP=200u LAMBDA=0.01) + .tran 10n 2u + .MEAS TRAN vout_high FIND V(out) AT=750n + .MEAS TRAN vout_low FIND V(out) AT=250n + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "vout_high", 4.9, 5.1); + AssertMeasurementLess(result, "vout_low", 0.5); + } + + // Prompt: Design a unity-gain buffer using an ideal op-amp. + [Fact] + public void Op_Amp_Voltage_Follower_f048dfd674a99e21() + { + var result = RunAcceptedExample( + "deepseek:04536_43064b90e1426561:f048dfd674a99e21", + """ + * Op-Amp Voltage Follower + VIN in 0 DC 0 AC 1 + R1 out 0 10k + E1 out 0 in out 100k + .OP + .AC DEC 10 1 1MEG + .MEAS OP VOUT FIND V(out) AT=0 + .MEAS AC Gain FIND VDB(out) AT=1k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "VOUT", 0.0, 0.001); + AssertMeasurementBetween(result, "Gain", (-0.1), 0.1); + } + + // Prompt: Design a diode clipper that limits a sinusoidal signal to an upper level of +3V and a lower level of -2V. + [Fact] + public void Window_Diode_Limiter_with_Asymmetric_Thresholds_2e07f78706660389() + { + var result = RunAcceptedExample( + "deepseek:02511_2e07f78706660389:2e07f78706660389", + """ + * Window Diode Limiter with Asymmetric Thresholds + VIN in 0 SIN(0 5 1k 0 0) + R1 in out 1k + D1 out vpos_c D1N4148 + D2 vneg_a out D1N4148 + VPOS vpos_c 0 DC 2.5 + VNEG 0 vneg_a DC 1.5 + R2 out 0 10k + .MODEL D1N4148 D(IS=1e-14 N=1.0 CJO=0 M=0.5 VJ=0.9) + .TRAN 0.01m 5m + .MEASURE TRAN vmax MAX V(out) FROM=0 TO=5m + .MEASURE TRAN vmin MIN V(out) FROM=0 TO=5m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "vmax", 3.0, 3.3); + AssertMeasurementBetween(result, "vmin", (-2.3), (-2.0)); + } + + // Prompt: NMOS source\u2011follower linear regulator with ideal op\u2011amp feedback + [Fact] + public void NMOS_Source_Follower_Linear_Regulator_Simple_c684f868408bfd81() + { + var result = RunAcceptedExample( + "deepseek:05958_381a488709a78cad:c684f868408bfd81", + """ + * NMOS Source-Follower Linear Regulator (Simple) + VREF vref 0 DC 2.5 + VIN vin 0 DC 12 + EOP gate 0 vref vfb 1e5 + R1 out vfb 10k + R2 vfb 0 10k + M1 vin gate out out nmos_model W=10u L=1u + Rload out 0 1k + .MODEL nmos_model NMOS (VTO=1.5 KP=200u LAMBDA=0.02) + .OP + .DC VIN 6 12 0.1 + .MEAS DC Vout_12V FIND v(out) AT=12 + .MEAS DC Vout_10V FIND v(out) AT=10 + .MEAS DC linereg PARAM='(Vout_12V - Vout_10V)/(12-10)' + .MEAS DC Vout_8V FIND v(out) AT=8 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "Vout_12V", 5.0, 0.1); + AssertMeasurementLess(result, "linereg", 0.01); + AssertMeasurementBetween(result, "Vout_8V", 4.0, 5.0); + } + + // Prompt: High-precision voltage follower using an E-source with open-loop gain of 1e6 and a 47k load resistor. + [Fact] + public void High_Precision_Unity_Gain_Buffer_e14ad68250c19327() + { + var result = RunAcceptedExample( + "deepseek:04538_5bdc53e93e76f1be:e14ad68250c19327", + """ + * High-Precision Unity-Gain Buffer + VIN in 0 DC 0.5 AC 1 + Rload out 0 47k + Eout out 0 in out 1MEG + .OP + .AC LIN 100 1 100k + .MEAS OP VOUT_DC FIND V(out) AT=0 + .MEAS AC G10k FIND VDB(out) AT=10k + .MEAS AC PH10k FIND VP(out) AT=10k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "VOUT_DC", 0.5, 0.001); + AssertMeasurementBetween(result, "G10k", (-0.1), 0.1); + AssertMeasurementBetween(result, "PH10k", (-1.0), 1.0); + } + + // Prompt: NMOS source-follower linear regulator using enhancement NMOS pass transistor and depletion NMOS constant-current load + [Fact] + public void NMOS_Source_Follower_Regulator_with_Depletion_Load_d45920b1a7db3ad2() + { + var result = RunAcceptedExample( + "deepseek:05959_dc58d35ba6904148:d45920b1a7db3ad2", + """ + * NMOS Source-Follower Regulator with Depletion Load + VREF vref 0 DC 2.5 + VIN vin 0 DC 10 + EOP gate 0 vref vfb 2e5 + R1 out vfb 10k + R2 vfb 0 10k + Mpass vin gate out out nmos_enh W=20u L=1u + Mload out 0 0 0 nmos_dep W=10u L=2u + .MODEL nmos_enh NMOS (VTO=1.5 KP=200u LAMBDA=0.02) + .MODEL nmos_dep NMOS (VTO=-2 KP=100u LAMBDA=0.01) + .OP + .DC VIN 8 10 0.1 + .MEAS DC Vout_10V FIND v(out) AT=10 + .MEAS DC Vout_9V FIND v(out) AT=9 + .MEAS DC Vout_8V FIND v(out) AT=8 + .MEAS DC linereg PARAM='(Vout_10V - Vout_9V)/(10-9)' + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "Vout_10V", 5.0, 0.15); + AssertMeasurementLess(result, "linereg", 0.02); + AssertMeasurementBetween(result, "Vout_8V", 4.0, 5.2); + } + + // Prompt: First-order continuous-time sigma-delta modulator using an ideal op-amp integrator and a smooth hyperbolic tangent comparator/DAC. + [Fact] + public void First_order_continuous_time_sigma_delta_modulator_with_square_wave_input_96bbb39a119a6eed() + { + var result = RunAcceptedExample( + "deepseek:06963_7e3e06ee6a70fa9d:96bbb39a119a6eed", + """ + * First-order continuous-time sigma-delta modulator with square-wave input + VIN in 0 PULSE(0 0.5 1u 1u 1u 50u 100u) + VREF_P vp 0 DC 1 + VREF_M vm 0 DC -1 + Rin in int_in 1k + Rfb fb int_in 1k + Cfb int_out int_in 1n + E_INT int_out 0 0 int_in 1e5 + E_DAC fb 0 VALUE={TANH(1000*V(int_out))} + .tran 0.1u 500u + .measure tran vout_avg AVG V(fb) from=50u to=500u + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "vout_avg", (-0.35), (-0.15)); + } + + // Prompt: Generate a diode limiter that clamps positive peaks at +4.6V and negative peaks at -2.6V. + [Fact] + public void Asymmetric_Diode_Limiter_with_4V_and_2V_thresholds_719219b9e7844a6b() + { + var result = RunAcceptedExample( + "deepseek:02513_719219b9e7844a6b:719219b9e7844a6b", + """ + * Asymmetric Diode Limiter with 4V and -2V thresholds + VIN in 0 SIN(0 7 500 0 0) + R1 in out 1k + D1 out vpos D1N4148 + D2 vneg out D1N4148 + VPOS vpos 0 DC 4 + VNEG 0 vneg DC 2 + Rload out 0 10k + .MODEL D1N4148 D(IS=1e-14 N=1.0) + .TRAN 0.1m 10m + .MEASURE TRAN vmax MAX V(out) FROM=0 TO=10m + .MEASURE TRAN vmin MIN V(out) FROM=0 TO=10m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "vmax", 4.4, 4.8); + AssertMeasurementBetween(result, "vmin", (-2.8), (-2.4)); + } + + // Prompt: Simulate a CMOS inverter with a 5V supply, 10u/1u NMOS and 20u/1u PMOS, 1pF load, and an input pulse from 0 to 5V. Measure the high-to-low and low-to-high propagation delays. + [Fact] + public void CMOS_Inverter_Transient_Response_5V_7424c16dde1cb60e() + { + var result = RunAcceptedExample( + "deepseek:00993_f7b5a3abf8e23d99:7424c16dde1cb60e", + """ + * CMOS Inverter Transient Response 5V + VDD vdd 0 DC 5 + VIN in 0 PULSE(0 5 0 0.1n 0.1n 5n 10n) + M1 out in 0 0 nmod W=10u L=1u + M2 out in vdd vdd pmod W=20u L=1u + .model nmod NMOS(VTO=0.7 KP=200u GAMMA=0.5 LAMBDA=0.02) + .model pmod PMOS(VTO=-0.7 KP=100u GAMMA=0.5 LAMBDA=0.02) + CL out 0 1p + .tran 0.01n 50n + .meas tran tphl trig v(in) val=2.5 rise=1 targ v(out) val=2.5 fall=1 + .meas tran tplh trig v(in) val=2.5 fall=1 targ v(out) val=2.5 rise=1 + .end + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementLess(result, "tphl", 5e-09); + AssertMeasurementLess(result, "tplh", 5e-09); + AssertMeasurementGreater(result, "tphl", 0.0); + AssertMeasurementGreater(result, "tplh", 0.0); + } + + // Prompt: Simulate a 3.3V CMOS inverter with 5u/0.5u NMOS and 10u/0.5u PMOS, 0.5pF load, and a 0 to 3.3V pulse input. Measure the propagation delays tphl and tplh. + [Fact] + public void CMOS_Inverter_Transient_Response_3_3V_0669d943ab14a751() + { + var result = RunAcceptedExample( + "deepseek:00994_a96e5566067bdf62:0669d943ab14a751", + """ + * CMOS Inverter Transient Response 3.3V + VDD vdd 0 DC 3.3 + VIN in 0 PULSE(0 3.3 0 0.05n 0.05n 3n 6n) + M1 out in 0 0 nmod W=5u L=0.5u + M2 out in vdd vdd pmod W=10u L=0.5u + .model nmod NMOS(VTO=0.5 KP=200u GAMMA=0.4 LAMBDA=0.05) + .model pmod PMOS(VTO=-0.5 KP=80u GAMMA=0.4 LAMBDA=0.05) + CL out 0 0.5p + .tran 0.005n 30n + .meas tran tphl trig v(in) val=1.65 rise=1 targ v(out) val=1.65 fall=1 + .meas tran tplh trig v(in) val=1.65 fall=1 targ v(out) val=1.65 rise=1 + .end + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementLess(result, "tphl", 3e-09); + AssertMeasurementLess(result, "tplh", 3e-09); + AssertMeasurementGreater(result, "tphl", 0.0); + AssertMeasurementGreater(result, "tplh", 0.0); + } + + // Prompt: Simulate a 1.8V CMOS inverter using an NMOS with W=2u L=0.18u and a PMOS with W=4u L=0.18u, driving a 100fF load. Measure tphl and tplh from a 0\u20131.8V pulse. + [Fact] + public void CMOS_Inverter_Transient_Response_1_8V_0f5a454dfd9b5a1a() + { + var result = RunAcceptedExample( + "deepseek:00995_2297ee4ba51eab40:0f5a454dfd9b5a1a", + """ + * CMOS Inverter Transient Response 1.8V + VDD vdd 0 DC 1.8 + VIN in 0 PULSE(0 1.8 0 0.02n 0.02n 2n 4n) + M1 out in 0 0 nmod W=2u L=0.18u + M2 out in vdd vdd pmod W=4u L=0.18u + .model nmod NMOS(VTO=0.3 KP=300u GAMMA=0.3 LAMBDA=0.1) + .model pmod PMOS(VTO=-0.3 KP=120u GAMMA=0.3 LAMBDA=0.1) + CL out 0 100f + .tran 0.001n 10n + .meas tran tphl trig v(in) val=0.9 rise=1 targ v(out) val=0.9 fall=1 + .meas tran tplh trig v(in) val=0.9 fall=1 targ v(out) val=0.9 rise=1 + .end + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementLess(result, "tphl", 1e-09); + AssertMeasurementLess(result, "tplh", 1e-09); + AssertMeasurementGreater(result, "tphl", 0.0); + AssertMeasurementGreater(result, "tplh", 0.0); + } + + // Prompt: Summing amplifier with three inputs: two DC inputs (0.1V and 0.2V) and one AC-coupled input (0V DC, 1V AC). + [Fact] + public void Summing_amplifier_with_AC_and_DC_79375b9f0dc9092a() + { + var result = RunAcceptedExample( + "deepseek:01108_bed4bbbeab592669:79375b9f0dc9092a", + """ + * Summing amplifier with AC and DC + V1 in1 0 DC 0.1 + V2 in2 0 DC 0.2 + V3 in3 0 DC 0 AC 1 + R1 in1 sum 1k + R2 in2 sum 2k + R3 in3 sum 4k + Rf sum out 8k + E1 out 0 0 sum 100000 + .DC V1 0.1 0.1 0.1 + .MEAS DC vout FIND V(out) AT=0.1 + .AC DEC 10 1 10k + .MEAS AC ac_gain FIND vdb(out) AT=1 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "vout", (-1.6), 0.01); + AssertMeasurementBetween(result, "ac_gain", 6.0, 6.05); + } + + // Prompt: Three-input inverting summing amplifier with ideal op-amp (E1), all resistors 20k, load resistor 10k. + [Fact] + public void Summing_amplifier_with_load_resistor_4c899cefd2b2413f() + { + var result = RunAcceptedExample( + "deepseek:01109_93b7d1366d202387:4c899cefd2b2413f", + """ + * Summing amplifier with load resistor + V1 in1 0 DC 0.5 + V2 in2 0 DC -0.2 AC 1 + V3 in3 0 DC 0.3 + R1 in1 sum 20k + R2 in2 sum 20k + R3 in3 sum 20k + Rf sum out 20k + RL out 0 10k + E1 out 0 0 sum 100000 + .DC V1 0.5 0.5 1 + .AC DEC 10 1 10k + .MEAS DC vout FIND V(out) AT=0.5 + .MEAS AC ac_gain FIND vdb(out) AT=1 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "vout", (-0.6), 0.01); + AssertMeasurementBetween(result, "ac_gain", (-0.1), 0.1); + } + + // Prompt: Non-inverting level shifter uses an NMOS pass transistor with gate tied to the low-side supply (1.8V). Input signal applied to source, drain connected to high-side supply (3.3V) via a pull-up resistor. + [Fact] + public void NMOS_pass_transistor_level_shifter_1_8V_to_3_3V_b27a4bc2728e95b6() + { + var result = RunAcceptedExample( + "deepseek:04287_ec26db29cfa37aac:b27a4bc2728e95b6", + """ + * NMOS pass transistor level shifter 1.8V to 3.3V + VDDH 1 0 DC 3.3 + VDDL 2 0 DC 1.8 + R1 out 1 10k + M1 out 2 in 0 nmos W=10U L=1U + Vin in 0 PULSE(0 1.8 0 1n 1n 500n 1u) + .tran 10n 5u + .model nmos NMOS (VTO=0.7 KP=200U LAMBDA=0.01) + .MEAS TRAN vout_high MAX V(out) FROM=0 TO=5u + .MEAS TRAN vout_low MIN V(out) FROM=0 TO=5u + .MEAS TRAN vout_rise TRIG V(out) VAL=0.33 RISE=1 TARG V(out) VAL=2.97 RISE=1 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "vout_high", 3.0, 3.3); + AssertMeasurementLess(result, "vout_low", 0.2); + AssertMeasurementLess(result, "vout_rise", 1e-07); + } + + // Prompt: N-channel JFET with gate and source tied to ground + [Fact] + public void N_JFET_Idss_Current_Source_1354ad7d74f60379() + { + var result = RunAcceptedExample( + "deepseek:04507_0f9536a6510c6f15:1354ad7d74f60379", + """ + * N-JFET Idss Current Source + VDD VDD 0 DC 15 + RLOAD VDD D 2.2k + J1 D 0 0 NJF + .MODEL NJF NJF(VTO=-2.0 BETA=1.0E-3) + .DC VDD 0 15 0.1 + .MEAS DC I12 FIND I(RLOAD) AT=12 + .MEAS DC I15 FIND I(RLOAD) AT=15 + .END + """); + + AssertAllMeasurementsSuccessful(result); + var i15 = MeasurementValue(result, "I15"); + AssertMeasurementNear(result, "I15", 0.004, 0.001); + AssertMeasurementNear(result, "I12", i15, 0.0002); + } + + // Prompt: Design a 3-input diode OR gate using 1N4148 diodes and a 1k pull-down resistor. Simulate with three pulse inputs to verify OR logic. + [Fact] + public void _3_input_diode_OR_gate_with_1k_pull_down_9e11d3ee06eb51f7() + { + var result = RunAcceptedExample( + "deepseek:00567_9e11d3ee06eb51f7:9e11d3ee06eb51f7", + """ + * 3-input diode OR gate with 1k pull-down + .MODEL D1N4148 D(IS=5e-9 RS=0.1 N=1.2) + R1 out 0 1k + D1 in1 out D1N4148 + D2 in2 out D1N4148 + D3 in3 out D1N4148 + VIN1 in1 0 PULSE(0 5 0 1n 1n 500n 1u) + VIN2 in2 0 PULSE(0 5 200n 1n 1n 500n 1u) + VIN3 in3 0 PULSE(0 5 400n 1n 1n 500n 1u) + .TRAN 10n 3u + .MEAS TRAN vout_high MAX v(out) FROM=0 TO=3u + .MEAS TRAN vout_low MIN v(out) FROM=0 TO=3u + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementGreater(result, "vout_high", 4.0); + AssertMeasurementLess(result, "vout_low", 0.5); + } + + // Prompt: Construct a 3-input diode OR gate with a 10k pull-down resistor and a custom diode model. Use 3.3V inputs and verify logic levels. + [Fact] + public void _3_input_diode_OR_gate_with_10k_pull_down_98a558b20a6256c9() + { + var result = RunAcceptedExample( + "deepseek:00568_98a558b20a6256c9:98a558b20a6256c9", + """ + * 3-input diode OR gate with 10k pull-down + .MODEL DMOD D(IS=1e-9 RS=0.5 N=1.1) + R1 out 0 10k + D1 a out DMOD + D2 b out DMOD + D3 c out DMOD + VA a 0 PULSE(0 3.3 0 2n 2n 1u 2u) + VB b 0 PULSE(0 3.3 0.5u 2n 2n 1u 2u) + VC c 0 PULSE(0 3.3 1u 2n 2n 1u 2u) + .TRAN 10n 5u + .MEAS TRAN vout_high MAX v(out) FROM=0 TO=5u + .MEAS TRAN vout_low MIN v(out) FROM=0 TO=5u + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementGreater(result, "vout_high", 2.8); + AssertMeasurementLess(result, "vout_low", 0.3); + } + + // Prompt: Simulate a three-input diode OR gate where one input is always low and the other two are pulsed. Measure the output at specific times to confirm correct OR operation. + [Fact] + public void _3_input_diode_OR_gate_with_DC_low_input_and_two_pulses_5b2f23eeb66eaefa() + { + var result = RunAcceptedExample( + "deepseek:00569_5b2f23eeb66eaefa:5b2f23eeb66eaefa", + """ + * 3-input diode OR gate with DC low input and two pulses + .MODEL D1N4148 D(IS=5e-9 RS=0.1 N=1.2) + R1 out 0 1k + D1 in1 out D1N4148 + D2 in2 out D1N4148 + D3 in3 out D1N4148 + VIN1 in1 0 DC 0 + VIN2 in2 0 PULSE(0 5 1u 2n 2n 1u 3u) + VIN3 in3 0 PULSE(0 5 2u 2n 2n 1u 4u) + .TRAN 10n 4u + .MEAS TRAN vout_at_0p5u FIND v(out) AT=0.5u + .MEAS TRAN vout_at_1p5u FIND v(out) AT=1.5u + .MEAS TRAN vout_at_2p5u FIND v(out) AT=2.5u + .MEAS TRAN vout_at_3p5u FIND v(out) AT=3.5u + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementLess(result, "vout_at_0p5u", 0.5); + AssertMeasurementBetween(result, "vout_at_1p5u", 4.2, 4.8); + AssertMeasurementBetween(result, "vout_at_2p5u", 4.2, 4.8); + AssertMeasurementLess(result, "vout_at_3p5u", 0.5); + } + + // Prompt: NMOS source-follower linear regulator with op-amp feedback to maintain 1.8 V output. + [Fact] + public void NMOS_source_follower_linear_regulator_load_regulation_DC_analysis_1904833314613fdf() + { + var result = RunAcceptedExample( + "deepseek:05953_bdfbe25df3b0d6f9:1904833314613fdf", + """ + * NMOS source-follower linear regulator - load regulation DC analysis + VDD VDD 0 DC 5 + VREF VCM 0 DC 1.2 + E1 N001 0 VCM VOUT_FB 100000 + M1 VDD N001 VOUT VOUT NMOS W=1000U L=1U + R1 VOUT VOUT_FB 100K + R2 VOUT_FB 0 200K + ILOAD VOUT 0 DC 0.1 + .MODEL NMOS NMOS(VTO=1 KP=100U LAMBDA=0.02) + .OP + .DC ILOAD 0.1 1 0.01 + .MEAS DC VOUT_MIN FIND V(VOUT) AT=0.1 + .MEAS DC VOUT_MAX FIND V(VOUT) AT=1 + .MEAS DC LOAD_REG PARAM='(VOUT_MAX - VOUT_MIN)/VOUT_MIN*100' + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "VOUT_MIN", 1.75, 1.85); + AssertMeasurementBetween(result, "VOUT_MAX", 1.78, 1.85); + AssertMeasurementLess(result, "LOAD_REG", 1.0); + } + + // Prompt: 5V NMOS source-follower regulator with 2.5V reference and finite op-amp gain of 1000. + [Fact] + public void NMOS_source_follower_5V_regulator_with_finite_op_amp_gain_4c94a3978eb355e9() + { + var result = RunAcceptedExample( + "deepseek:05954_0acdb82ff831aaf1:4c94a3978eb355e9", + """ + * NMOS source-follower 5V regulator with finite op-amp gain + VDD VDD 0 DC 7 + VREF VCM 0 DC 2.5 + E1 N001 0 VCM VOUT_FB 1000 + M1 VOUT N001 VDD VOUT NMOS W=1000U L=1U + R1 VOUT VOUT_FB 100K + R2 VOUT_FB 0 100K + RL VOUT 0 50 + .MODEL NMOS NMOS(VTO=0.8 KP=500U LAMBDA=0.01) + .OP + .DC VDD 5.5 10 0.01 + .MEAS DC VOUT_MIN FIND V(VOUT) AT=5.5 + .MEAS DC VOUT_7V FIND V(VOUT) AT=7 + .MEAS DC VGATE_7V FIND V(N001) AT=7 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "VOUT_7V", 4.995, 0.01); + AssertMeasurementGreater(result, "VGATE_7V", 5.0); + } + + // Prompt: Design a 4th-order Chebyshev low-pass filter with 1dB passband ripple and 1kHz cutoff frequency (ripple bandwidth). + [Fact] + public void Chebyshev_1dB_ripple_low_pass_filter_4th_order_unity_gain_fc_1kHz_ripple_bandwidth_6fb9e334d7567ce0() + { + var result = RunAcceptedExample( + "deepseek:05274_e1a5081f52ed644f:6fb9e334d7567ce0", + """ + * Chebyshev 1dB ripple low-pass filter, 4th order, unity gain, fc=1kHz (ripple bandwidth) + VIN in 0 AC 1 DC 0 + R1 in n1 10k + R2 n1 n2 10k + C1 n1 out1 90.75n + C2 n2 0 2.624n + E1 out1 0 n2 out1 1e5 + R3 out1 n3 10k + R4 n3 n4 10k + C3 n3 out 37.6n + C4 n4 0 18.9n + E2 out 0 n4 out 1e5 + .AC DEC 10 10 1MEG + .MEAS AC dc_gain FIND MAG(V(out)) AT=10 + .MEAS AC f3db WHEN VDB(out) = -3 FALL=1 + .MEAS AC att_10k FIND MAG(V(out)) AT=10000 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "dc_gain", 1.0, 0.05); + AssertMeasurementNear(result, "f3db", 1053.0, 100.0); + AssertMeasurementLess(result, "att_10k", 0.01); + } + + // Prompt: 1.5V to 5V level shifter using an NMOS pass transistor with gate tied to VDDL (1.5V). + [Fact] + public void NMOS_pass_transistor_level_shifter_1_5V_to_5V_07d7e5af1bb6b4d0() + { + var result = RunAcceptedExample( + "deepseek:04288_dcbbf3082a6cf35d:07d7e5af1bb6b4d0", + """ + * NMOS pass transistor level shifter 1.5V to 5V + VDDH 1 0 DC 5 + VDDL 2 0 DC 1.5 + R1 out 1 4.7k + Cload out 0 5pF + M1 out 2 in 0 nmos W=50U L=0.5U + Vin in 0 PULSE(0 1.5 0 10p 10p 500n 1u) + .tran 1n 10u + .model nmos NMOS (VTO=0.8 KP=250U LAMBDA=0.01 GAMMA=0.5 PHI=0.7) + .MEAS TRAN vout_high MAX V(out) FROM=5u TO=10u + .MEAS TRAN vout_low MIN V(out) FROM=5u TO=10u + .MEAS TRAN vout_rise TRIG V(out) VAL=0.5 RISE=2 TARG V(out) VAL=4.0 RISE=2 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "vout_high", 4.8, 5.2); + AssertMeasurementLess(result, "vout_low", 0.2); + AssertMeasurementLess(result, "vout_rise", 1e-07); + } + + // Prompt: Third-order Bessel low-pass filter with 50 \u03a9 input and output impedance. + [Fact] + public void _50_Ohm_10_MHz_3rd_order_Bessel_low_pass_filter_T_topology_dbccbf5289657243() + { + var result = RunAcceptedExample( + "deepseek:02088_c512a7ab23886084:dbccbf5289657243", + """ + * 50 Ohm 10 MHz 3rd order Bessel low-pass filter (T-topology) + V1 in 0 AC 1 + R1 in 1 50 + L1 1 2 268.4nH + C1 2 0 308.8pF + L2 2 out 1753nH + R2 out 0 50 + .AC DEC 100 100k 500MEG + .meas ac gainmax max vdb(out) + .meas ac bw when vm(out)=0.3535 fall=1 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "bw", 9500000.0, 10500000.0); + AssertMeasurementNear(result, "gainmax", (-6.0), 0.5); + } + + // Prompt: Third-order Bessel low-pass filter in pi-network configuration + [Fact] + public void _75_Ohm_5_MHz_3rd_order_Bessel_low_pass_filter_pi_topology_544e416b409bf92c() + { + var result = RunAcceptedExample( + "deepseek:02090_b307d62fd61c78e9:544e416b409bf92c", + """ + * 75 Ohm 5 MHz 3rd order Bessel low-pass filter (pi-topology) + V1 in 0 AC 1 + R1 in 1 75 + C1 1 0 935.1pF + L1 1 out 2.387uH + C2 out 0 935.1pF + R2 out 0 75 + .AC DEC 100 100k 100MEG + .meas ac gainmax max vdb(out) + .meas ac bw when vdb(out)=-9 fall=1 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "bw", 4500000.0, 5500000.0); + AssertMeasurementNear(result, "gainmax", (-6.0), 0.5); + } + + // Prompt: Create a SPICE netlist for a 3-stage CMOS ring oscillator using a pulsed 5V supply to kickstart oscillation. Include load capacitors and measure the oscillation frequency. + [Fact] + public void CMOS_Ring_Oscillator_with_3_inverters_VDD_5V_pulsed_supply_d1425fbd00059d8c() + { + var result = RunAcceptedExample( + "deepseek:04383_9133755148087758:d1425fbd00059d8c", + """ + * CMOS Ring Oscillator with 3 inverters, VDD=5V, pulsed supply + VDD vdd 0 PULSE(0 5 1n 1n 1n 100u 200u) + M1 n1 in 0 0 NMOS W=1u L=0.5u + M2 n1 in vdd vdd PMOS W=2u L=0.5u + M3 n2 n1 0 0 NMOS W=1u L=0.5u + M4 n2 n1 vdd vdd PMOS W=2u L=0.5u + M5 out n2 0 0 NMOS W=1u L=0.5u + M6 out n2 vdd vdd PMOS W=2u L=0.5u + Vfb in out 0 + C1 n1 0 0.1pF + C2 n2 0 0.1pF + C3 out 0 0.1pF + .MODEL NMOS NMOS (VTO=1 KP=100u LAMBDA=0.02) + .MODEL PMOS PMOS (VTO=-1 KP=50u LAMBDA=0.02) + .TRAN 0.01n 50n UIC + .MEAS TRAN t1 WHEN v(out)=2.5 RISE=3 + .MEAS TRAN t2 WHEN v(out)=2.5 RISE=4 + .MEAS TRAN period PARAM t2-t1 + .MEAS TRAN freq PARAM 1/period + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "freq", 200000000.0, 800000000.0); + } + + // Prompt: 3.3V CMOS ring oscillator with three inverters and an NMOS enable switch on the virtual ground + [Fact] + public void CMOS_Ring_Oscillator_with_enable_NMOS_switch_VDD_3_3V_9016a0e1830569ae() + { + var result = RunAcceptedExample( + "deepseek:04384_b2765d06a6182966:9016a0e1830569ae", + """ + * CMOS Ring Oscillator with enable NMOS switch, VDD=3.3V + VDD vdd 0 DC 3.3 + VEN en 0 PULSE(0 3.3 2n 0.1n 0.1n 100u 200u) + M_EN vss_int en 0 0 NMOS W=10u L=0.35u + M1 n1 in vss_int 0 NMOS W=1u L=0.35u + M2 n1 in vdd vdd PMOS W=2u L=0.35u + M3 n2 n1 vss_int 0 NMOS W=1u L=0.35u + M4 n2 n1 vdd vdd PMOS W=2u L=0.35u + M5 out n2 vss_int 0 NMOS W=1u L=0.35u + M6 out n2 vdd vdd PMOS W=2u L=0.35u + Vfb in out 0 + C1 n1 0 0.2pF + C2 n2 0 0.2pF + C3 out 0 0.2pF + .MODEL NMOS NMOS (VTO=0.7 KP=150u LAMBDA=0.05) + .MODEL PMOS PMOS (VTO=-0.7 KP=75u LAMBDA=0.05) + .IC V(n1)=0.2 + .TRAN 0.01n 100n UIC + .MEAS TRAN period TRIG V(out) VAL=1.65 RISE=5 TARG V(out) VAL=1.65 RISE=6 + .MEAS TRAN freq PARAM 1/period + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "freq", 100000000.0, 500000000.0); + } + + // Prompt: 3\u2011stage CMOS ring oscillator with small load capacitors (0.05 pF each). + [Fact] + public void CMOS_Ring_Oscillator_with_2_5V_supply_slow_ramp_826f987877fb9b0e() + { + var result = RunAcceptedExample( + "deepseek:04385_4b93f451d909f969:826f987877fb9b0e", + """ + * CMOS Ring Oscillator with 2.5V supply, slow ramp + VDD vdd 0 PULSE(0 2.5 0 0.1n 0.1n 100u 200u) + M1 n1 in 0 0 NMOS W=0.5u L=0.18u + M2 n1 in vdd vdd PMOS W=1.5u L=0.18u + M3 n2 n1 0 0 NMOS W=0.5u L=0.18u + M4 n2 n1 vdd vdd PMOS W=1.5u L=0.18u + M5 out n2 0 0 NMOS W=0.5u L=0.18u + M6 out n2 vdd vdd PMOS W=1.5u L=0.18u + Vfb in out 0 + C1 n1 0 0.05pF + C2 n2 0 0.05pF + C3 out 0 0.05pF + .MODEL NMOS NMOS (VTO=0.5 KP=200u LAMBDA=0.1) + .MODEL PMOS PMOS (VTO=-0.5 KP=100u LAMBDA=0.1) + .IC V(n1)=2.5 V(n2)=0 V(out)=0 + .TRAN 0.002n 20n UIC + .MEAS TRAN t1 WHEN v(out)=1.25 RISE=7 + .MEAS TRAN t2 WHEN v(out)=1.25 RISE=8 + .MEAS TRAN period PARAM t2-t1 + .MEAS TRAN freq PARAM 1/period + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "freq", 500000000.0, 3000000000.0); + } + + // Prompt: Design a simple diode peak detector with a bleed resistor to capture the envelope of a sine wave. + [Fact] + public void Diode_peak_detector_with_bleed_resistor_4e44e2cfd1cb54e8() + { + var result = RunAcceptedExample( + "deepseek:02385_42bac50607f0c692:4e44e2cfd1cb54e8", + """ + * Diode peak detector with bleed resistor + D1 in out dmod + C1 out 0 1u + R1 out 0 1k + VIN in 0 SIN(0 2 1k 0 0 0) + .model dmod D(IS=1p RS=1) + .tran 10u 10m + .meas tran vout_max MAX V(out) FROM=8m TO=10m + .meas tran vout_avg AVG V(out) FROM=8m TO=10m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "vout_max", 1.0, 2.0); + AssertMeasurementGreater(result, "vout_avg", 0.0); + } + + // Prompt: RL low-pass filter with series inductor and shunt resistor. + [Fact] + public void RL_low_pass_filter_with_R_470_L_100mH_e7e91d5c30310ea5() + { + var result = RunAcceptedExample( + "deepseek:00235_14c75d5c555ed8e4:e7e91d5c30310ea5", + """ + * RL low-pass filter with R=470 L=100mH + V1 in 0 DC 0 AC 1 + L1 in out 100m + R1 out 0 470 + .AC DEC 20 10 100K + .MEAS AC gain_dc FIND VDB(out) AT=10 + .MEAS AC fcut WHEN VDB(out)=-3 + .END + """); + + AssertHasSuccessfulMeasurement(result, "fcut"); + AssertMeasurementNear(result, "fcut", 748.4, 100.0); + AssertMeasurementNear(result, "gain_dc", 0.0, 0.5); + } + + // Prompt: RL low-pass filter with series 1 mH inductor and shunt 10 k\u03a9 resistor. + [Fact] + public void High_frequency_RL_low_pass_filter_1938a0bd938c6210() + { + var result = RunAcceptedExample( + "deepseek:00236_77114b79ca41244f:1938a0bd938c6210", + """ + * High-frequency RL low-pass filter + V1 in 0 DC 0 AC 1 + L1 in out 1m + R1 out 0 10k + .AC DEC 100 100 10MEG + .MEAS AC dc_gain FIND VDB(out) AT=100 + .MEAS AC cutoff WHEN VDB(out) = -3 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "dc_gain", 0.0, 0.5); + AssertMeasurementNear(result, "cutoff", 1591550.0, 100000.0); + } + + // Prompt: Greinacher Voltage Tripler using three diodes and three capacitors + [Fact] + public void Greinacher_Voltage_Tripler_5227698419eddd77() + { + var result = RunAcceptedExample( + "deepseek:02796_61d7ed99796873d2:5227698419eddd77", + """ + * Greinacher Voltage Tripler + VIN in 0 SIN(0 10 1k) + C1 in A 100u + D3 0 A DMOD + D1 A B DMOD + C2 B 0 100u + D2 B C DMOD + C3 C A 100u + RLOAD C 0 10k + .MODEL DMOD D(IS=1e-12) + .TRAN 0.1m 50m + .MEASURE TRAN vout_avg AVG V(C) FROM=40m TO=50m + .MEASURE TRAN vout_max MAX V(C) FROM=40m TO=50m + .MEASURE TRAN vout_min MIN V(C) FROM=40m TO=50m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "vout_avg", 25.0, 35.0); + AssertMeasurementGreater(result, "vout_max", 25.0); + AssertMeasurementLess(result, "vout_min", 35.0); + } + + // Prompt: Peak detector circuit with diode, capacitor, and resistor. + [Fact] + public void Peak_detector_with_noticeable_ripple_553b2584243e72e4() + { + var result = RunAcceptedExample( + "deepseek:02387_6067a139b4f06672:553b2584243e72e4", + """ + * Peak detector with noticeable ripple + D1 in out dmod + C1 out 0 10n + R1 out 0 20k + VIN in 0 SIN(0 2 10k 0 0 0) + .model dmod D(IS=1e-14 RS=100) + .tran 1u 2m + .meas tran vout_max MAX V(out) FROM=1m TO=2m + .meas tran vout_min MIN V(out) FROM=1m TO=2m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "vout_max", 1.3, 1.8); + AssertMeasurementBetween(result, "vout_min", 0.8, 1.4); + var max_val = MeasurementValue(result, "vout_max"); + var min_val = MeasurementValue(result, "vout_min"); + var ripple = (max_val - min_val); + Assert.True(((0.2 < ripple) && (ripple < 0.8)), CaseLabel(result)); + } + + // Prompt: Design a symmetric diode clipper that limits a 5V 1kHz sine wave to about \xb10.7V using two anti-parallel diodes. Simulate for 5ms and measure the peak output voltage. + [Fact] + public void Symmetric_Diode_Clipper_8948fd2b6e28c1a8() + { + var result = RunAcceptedExample( + "deepseek:00459_78855fdd12e8a9ab:8948fd2b6e28c1a8", + """ + * Symmetric Diode Clipper + V1 in 0 SIN(0 5 1k) + R1 in out 1k + R2 out 0 10k + D1 out 0 diode + D2 0 out diode + .model diode D(IS=1e-14 RS=1 N=1) + .tran 0.1e-3 5e-3 + .meas tran vmax MAX V(out) FROM=1e-3 TO=5e-3 + .meas tran vmin MIN V(out) FROM=1e-3 TO=5e-3 + .end + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "vmax", 0.6, 0.9); + AssertMeasurementBetween(result, "vmin", (-0.9), (-0.6)); + } + + // Prompt: Design a diode clipper with a 3V peak 10kHz sine input using a 100-ohm series resistor. The diodes should have a model with IS=1e-13 and N=1.1. Measure the output peaks over the last few cycles. + [Fact] + public void Symmetric_Diode_Clipper_with_100_Ohm_Series_Resistor_91701357195631a1() + { + var result = RunAcceptedExample( + "deepseek:00460_c209024afb2ae112:91701357195631a1", + """ + * Symmetric Diode Clipper with 100 Ohm Series Resistor + V1 in 0 SIN(0 3 10k) + R1 in out 100 + R2 out 0 1k + D1 out 0 dmod + D2 0 out dmod + .model dmod D(IS=1e-13 RS=0.5 N=1.1) + .tran 1e-6 0.5e-3 + .meas tran vmax MAX V(out) FROM=0.1e-3 TO=0.5e-3 + .meas tran vmin MIN V(out) FROM=0.1e-3 TO=0.5e-3 + .end + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "vmax", 0.65, 0.85); + AssertMeasurementBetween(result, "vmin", (-0.85), (-0.65)); + } + + // Prompt: Design a symmetric diode clipper with external 2V DC biases in series with each diode to shift the clipping levels. The input is a 10V peak 500Hz sine wave. Measure the peak positive and negative output voltages, expecting about \xb12.7V. + [Fact] + public void Biased_Symmetric_Diode_Clipper_8f7b1e279597d7c5() + { + var result = RunAcceptedExample( + "deepseek:00461_6dd54bcb361e6eb1:8f7b1e279597d7c5", + """ + * Biased Symmetric Diode Clipper + V1 in 0 SIN(0 10 500) + R1 in out 1k + R2 out 0 10k + D1 out a diode + D2 b out diode + Va a 0 DC 2 + Vb 0 b DC 2 + .model diode D(IS=1e-14 RS=1 N=1) + .tran 1e-3 10e-3 + .meas tran vmax MAX V(out) FROM=2e-3 TO=10e-3 + .meas tran vmin MIN V(out) FROM=2e-3 TO=10e-3 + .end + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "vmax", 2.5, 2.9); + AssertMeasurementBetween(result, "vmin", (-2.9), (-2.5)); + } + + // Prompt: Design a Darlington pair buffer using two NPN transistors with a 12V supply. Apply a 1 kHz sine wave with 6V DC offset and verify the output DC level and AC amplitude. + [Fact] + public void Darlington_Buffer_with_Resistive_Load_b90f34107725e7d2() + { + var result = RunAcceptedExample( + "deepseek:00810_fea623df9fff7a59:b90f34107725e7d2", + """ + * Darlington Buffer with Resistive Load + VCC VCC 0 DC 12 + VIN IN 0 SIN(6 0.5 1k) + RLOAD OUT 0 1k + Q1 VCC IN N1 npn + Q2 VCC N1 OUT npn + .MODEL npn NPN(IS=1e-14 BF=200 VAF=100) + .OP + .TRAN 0.1u 2m + .MEAS TRAN vout_dc FIND V(OUT) AT=0 + .MEAS TRAN vout_min MIN V(OUT) FROM=0 TO=2m + .MEAS TRAN vout_max MAX V(OUT) FROM=0 TO=2m + .MEAS TRAN vout_pp PARAM='vout_max - vout_min' + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "vout_dc", 4.0, 5.2); + AssertMeasurementBetween(result, "vout_pp", 0.9, 1.1); + } + + // Prompt: Design a Darlington pair buffer using two NPN transistors with a \xb110V dual supply. Include a 100\u03a9 base resistor. Apply a 1 kHz sine wave with 0V offset and 1V amplitude, and verify output. + [Fact] + public void Darlington_Buffer_Dual_Supply_with_Base_Resistor_225ad30643ebb966() + { + var result = RunAcceptedExample( + "deepseek:00811_4f407c701b0dfb85:225ad30643ebb966", + """ + * Darlington Buffer Dual Supply with Base Resistor + VCC VCC 0 DC 10 + VEE VEE 0 DC -10 + VIN IN 0 SIN(0 1 1k) + RB IN BASE 100 + Q1 VCC BASE N1 npn + Q2 VCC N1 OUT npn + RLOAD OUT VEE 1k + .MODEL npn NPN(IS=1e-14 BF=200 VAF=100) + .OP + .TRAN 0.1u 2m + .MEAS TRAN vout_dc FIND V(OUT) AT=0 + .MEAS TRAN vout_min MIN V(OUT) FROM=0 TO=2m + .MEAS TRAN vout_max MAX V(OUT) FROM=0 TO=2m + .MEAS TRAN vout_pp PARAM='vout_max - vout_min' + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "vout_dc", (-2.0), (-0.8)); + AssertMeasurementBetween(result, "vout_pp", 1.8, 2.2); + } + + // Prompt: Design a Darlington pair buffer with a 15V supply and a 5mA current source load. Use a 10 kHz sine wave input with 7.5V offset and 0.2V amplitude. + [Fact] + public void Darlington_Buffer_with_Current_Source_Load_eea3484446b0cb1f() + { + var result = RunAcceptedExample( + "deepseek:00812_d67bcd83712331ac:eea3484446b0cb1f", + """ + * Darlington Buffer with Current Source Load + VCC VCC 0 DC 15 + VIN IN 0 SIN(7.5 0.2 10k) + Iload OUT 0 DC 5mA + Q1 VCC IN N1 npn + Q2 VCC N1 OUT npn + .MODEL npn NPN(IS=1e-14 BF=200 VAF=100) + .OP + .TRAN 0.05u 0.2m + .MEAS TRAN vout_dc FIND V(OUT) AT=0 + .MEAS TRAN vout_min MIN V(OUT) FROM=0 TO=0.2m + .MEAS TRAN vout_max MAX V(OUT) FROM=0 TO=0.2m + .MEAS TRAN vout_pp PARAM='vout_max - vout_min' + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "vout_dc", 5.5, 6.7); + AssertMeasurementBetween(result, "vout_pp", 0.35, 0.45); + } + + // Prompt: Monostable triggered by negative edge on Q2 base via capacitor Ctrig; output taken at Q2 collector. + [Fact] + public void _10V_BJT_Monostable_with_Recovery_Diode_a1d3cc6ed8de714b() + { + var result = RunAcceptedExample( + "deepseek:03725_411bdf207918bdc2:a1d3cc6ed8de714b", + """ + * 10V BJT Monostable with Recovery Diode + VCC vcc 0 DC 10 + Vtrig trig 0 PULSE(10 0 1m 1n 1n 1u 5m) + R1 vcc b1 150k + R2 c2 b1 2.2k + R3 vcc b2 75k + R4 vcc c2 1.5k + Rc1 vcc c1 10k + Rrec nk c1 1k + Ctrig trig b2 1n + C1 c1 b2 15n + Q1 c1 b1 0 NPN + Q2 c2 b2 0 NPN + Drec1 vcc nk DFAST + .MODEL NPN NPN(BF=120 IS=1e-15 VAF=60) + .MODEL DFAST D(IS=1e-12) + .OPTIONS RELTOL=1e-4 + .TRAN 0 5m + .MEAS TRAN pw TRIG V(c2) VAL=5 RISE=1 TARG V(c2) VAL=5 FALL=1 + .MEAS TRAN recovery_time TRIG V(c2) VAL=5 FALL=1 TARG V(b2) VAL=0.7 RISE=1 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "pw", 0.0006, 0.001); + AssertMeasurementLess(result, "recovery_time", 0.0002); + } + + // Prompt: Unity-gain Sallen-Key topology implementing a 2nd-order Chebyshev low-pass filter with 1 dB passband ripple. + [Fact] + public void Sallen_Key_Chebyshev_LP_1dB_ripple_fc_1kHz_3dB_at_1kHz_cfdf12326db2cf40() + { + var result = RunAcceptedExample( + "deepseek:05265_39cc04782639a54c:cfdf12326db2cf40", + """ + * Sallen-Key Chebyshev LP, 1dB ripple, fc~1kHz, -3dB at 1kHz + VIN in 0 AC 1 DC 0 + R1 in va 10k + R2 va inp 10k + C1 va out 37.94n + C2 inp 0 10.36n + E1 out 0 inp 0 1 + .AC DEC 100 1 100k + .MEAS AC dcgain FIND VDB(out) AT=1 + .MEAS AC pkgain MAX VDB(out) FROM=1 TO=800 + .MEAS AC mingain MIN VDB(out) FROM=1 TO=800 + .MEAS AC f3dB WHEN VDB(out)=-3 FALL=1 + .MEAS AC att10k FIND VDB(out) AT=10k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "dcgain", (-0.5), 0.5); + AssertMeasurementBetween(result, "pkgain", 0.8, 1.2); + AssertMeasurementBetween(result, "mingain", (-0.5), 0.5); + var pkgain = MeasurementValue(result, "pkgain"); + var mingain = MeasurementValue(result, "mingain"); + var ripple = (pkgain - mingain); + Assert.True(((0.5 <= ripple) && (ripple <= 1.5)), CaseLabel(result)); + AssertMeasurementBetween(result, "f3db", 900.0, 1100.0); + AssertMeasurementBetween(result, "att10k", (-45.0), (-40.0)); + } + + // Prompt: Cascode BJT current mirror with emitter degeneration resistors (R1=R2=100 ohms). + [Fact] + public void Cascode_BJT_current_mirror_with_emitter_degeneration_reference_simple_mirror_output_cascoded_1b7c8afcf22bdb36() + { + var result = RunAcceptedExample( + "deepseek:03279_c19a8775fd9872b6:1b7c8afcf22bdb36", + """ + * Cascode BJT current mirror with emitter degeneration (reference simple mirror, output cascoded) + VCC VCC 0 DC 10 + VBIAS VBIAS 0 DC 2.5 + IREF VCC N1 DC 1m + Q1 N1 N1 E1 NPN + R1 E1 0 100 + Q2 N2 N1 E2 NPN + R2 E2 0 100 + Q4 OUTN VBIAS N2 NPN + VMEAS OUT OUTN 0 + VOUT OUT 0 DC 5 + .MODEL NPN NPN(IS=1e-15 BF=100 VAF=50) + .OP + .DC VOUT 0 10 0.1 + .MEAS DC Iout FIND I(VMEAS) AT=5 + .MEAS DC Iref FIND I(IREF) AT=5 + .MEAS DC Ratio PARAM='Iout/Iref' + .MEAS DC Iout_low FIND I(VMEAS) AT=4.9 + .MEAS DC Iout_high FIND I(VMEAS) AT=5.1 + .MEAS DC Rout PARAM='(5.1-4.9)/(Iout_high - Iout_low)' + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "Iout", 0.0009, 0.0011); + AssertMeasurementBetween(result, "Ratio", 0.9, 1.1); + AssertMeasurementGreater(result, "Rout", 30000.0); + } + + // Prompt: Self-biased cascode BJT current mirror using a diode stack (Q5-Q6) to bias cascode gates Q3 and Q4. + [Fact] + public void Cascode_BJT_current_mirror_with_self_biased_cascode_8706e48f4546cbf5() + { + var result = RunAcceptedExample( + "deepseek:03280_edfaa67e5288239e:8706e48f4546cbf5", + """ + * Cascode BJT current mirror with self-biased cascode + VCC VCC 0 DC 5 + IREF VCC IN DC 1m + R3 VCC NC5 36k + Q5 NC5 NC5 NC6 NPN + Q6 NC6 NC6 0 NPN + Q1 N1 N1 0 NPN + Q2 N2 N1 0 NPN + Q3 IN NC5 N1 NPN + Q4 COLL NC5 N2 NPN + Vmeas OUT COLL 0 + VOUT OUT 0 DC 2.5 + .MODEL NPN NPN(IS=1e-15 BF=100 VAF=50) + .OP + .DC VOUT 0 5 0.1 + .MEAS DC Iout FIND I(Vmeas) AT=2.5 + .MEAS DC Iref FIND I(IREF) AT=2.5 + .MEAS DC Ratio PARAM Iout/Iref + .MEAS DC I_low FIND I(Vmeas) AT=2.4 + .MEAS DC I_high FIND I(Vmeas) AT=2.6 + .MEAS DC Rout PARAM = '(2.6-2.4)/(I_high - I_low)' + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "Iout", 0.0009, 0.0011); + AssertMeasurementBetween(result, "Ratio", 0.9, 1.1); + AssertMeasurementGreater(result, "Rout", 30000.0); + } + + // Prompt: 5th-order Butterworth low-pass ladder filter with 50\u03a9 terminations, designed for a 3dB cutoff at 1MHz. + [Fact] + public void Fifth_order_Butterworth_low_pass_filter_50_Ohm_1MHz_8e82ddb1d00e7ca9() + { + var result = RunAcceptedExample( + "deepseek:01854_05bdea90308ba364:8e82ddb1d00e7ca9", + """ + * Fifth-order Butterworth low-pass filter, 50 Ohm, 1MHz + VIN 1 0 AC 1 + RS 1 2 50 + L1 2 3 4.918u + C2 3 0 5.15n + L3 3 4 15.915u + C4 4 0 5.15n + L5 4 out 4.918u + RL out 0 50 + .AC DEC 100 10k 10MEG + .MEAS AC dc_gain FIND vdb(out) AT=10k + .MEAS AC f3dB WHEN vdb(out) = -9 + .MEAS AC att_5M FIND vdb(out) AT=5e6 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "dc_gain", (-6.5), (-5.5)); + AssertMeasurementBetween(result, "f3dB", 900000.0, 1100000.0); + AssertMeasurementLess(result, "att_5M", (-60.0)); + } + + // Prompt: Sallen-Key second-order low-pass filter with gain 2 and 0.5 dB Chebyshev passband ripple + [Fact] + public void Sallen_Key_Chebyshev_LP_0_5dB_ripple_gain_2_fc_10kHz_3d0c724f91c2f717() + { + var result = RunAcceptedExample( + "deepseek:05266_38555590869dde61:3d0c724f91c2f717", + """ + * Sallen-Key Chebyshev LP, 0.5dB ripple, gain=2, fc~10kHz + VIN in 0 AC 1 DC 0 + R1 in va 18k + R2 va inp 18k + C1 va out 1n + C2 inp 0 1.1n + Rf out inn 10k + Rin inn 0 10k + E1 out 0 inp inn 100k + .AC DEC 100 1 1MEG + .MEAS AC dcgain FIND VDB(out) AT=1 + .MEAS AC maxgain MAX VDB(out) FROM=1 TO=50k + .MEAS AC f3db WHEN VDB(out)=3 FALL=1 + .MEAS AC att100k FIND VDB(out) AT=100k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "dcgain", 5.9, 6.1); + AssertMeasurementBetween(result, "maxgain", 6.3, 6.7); + AssertMeasurementBetween(result, "f3db", 9500.0, 11500.0); + AssertMeasurementBetween(result, "att100k", (-37.0), (-31.0)); + } + + // Prompt: 3-bit flash ADC with resistor ladder generating reference voltages at 0.3125V, 0.9375V, 1.5625V, 2.1875V, 2.8125V, 3.4375V, 4.0625V. + [Fact] + public void _3_bit_Flash_ADC_with_Resistor_Ladder_and_Ideal_Comparators_5a9d729265f9a713() + { + var result = RunAcceptedExample( + "deepseek:07539_c561975c8c047148:5a9d729265f9a713", + """ + * 3-bit Flash ADC with Resistor Ladder and Ideal Comparators + VREF ref 0 DC 5 + VIN in 0 DC 0 + R1 ref t7 3k + R2 t7 t6 2k + R3 t6 t5 2k + R4 t5 t4 2k + R5 t4 t3 2k + R6 t3 t2 2k + R7 t2 t1 2k + R8 t1 0 1k + E1 out1 0 VALUE = { 5 * u(V(in) - V(t1)) } + E2 out2 0 VALUE = { 5 * u(V(in) - V(t2)) } + E3 out3 0 VALUE = { 5 * u(V(in) - V(t3)) } + E4 out4 0 VALUE = { 5 * u(V(in) - V(t4)) } + E5 out5 0 VALUE = { 5 * u(V(in) - V(t5)) } + E6 out6 0 VALUE = { 5 * u(V(in) - V(t6)) } + E7 out7 0 VALUE = { 5 * u(V(in) - V(t7)) } + .DC VIN 0 5 0.01 + .MEAS DC out1_low FIND V(out1) AT=0.2 + .MEAS DC out1_high FIND V(out1) AT=0.4 + .MEAS DC out2_low FIND V(out2) AT=0.8 + .MEAS DC out2_high FIND V(out2) AT=1.1 + .MEAS DC out3_low FIND V(out3) AT=1.4 + .MEAS DC out3_high FIND V(out3) AT=1.7 + .MEAS DC out4_low FIND V(out4) AT=2.0 + .MEAS DC out4_high FIND V(out4) AT=2.4 + .MEAS DC out5_low FIND V(out5) AT=2.6 + .MEAS DC out5_high FIND V(out5) AT=3.0 + .MEAS DC out6_low FIND V(out6) AT=3.2 + .MEAS DC out6_high FIND V(out6) AT=3.6 + .MEAS DC out7_low FIND V(out7) AT=3.8 + .MEAS DC out7_high FIND V(out7) AT=4.2 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementLess(result, "out1_low", 1.0); + AssertMeasurementGreater(result, "out1_high", 4.0); + AssertMeasurementLess(result, "out2_low", 1.0); + AssertMeasurementGreater(result, "out2_high", 4.0); + AssertMeasurementLess(result, "out3_low", 1.0); + AssertMeasurementGreater(result, "out3_high", 4.0); + AssertMeasurementLess(result, "out4_low", 1.0); + AssertMeasurementGreater(result, "out4_high", 4.0); + AssertMeasurementLess(result, "out5_low", 1.0); + AssertMeasurementGreater(result, "out5_high", 4.0); + AssertMeasurementLess(result, "out6_low", 1.0); + AssertMeasurementGreater(result, "out6_high", 4.0); + AssertMeasurementLess(result, "out7_low", 1.0); + AssertMeasurementGreater(result, "out7_high", 4.0); + } + + // Prompt: Circuit is a 5th-order Butterworth LC low-pass filter. + [Fact] + public void Fifth_order_Butterworth_low_pass_filter_75_Ohm_10kHz_9114bf36cac8cfe0() + { + var result = RunAcceptedExample( + "deepseek:01855_8829e3adaae0b50f:9114bf36cac8cfe0", + """ + * Fifth-order Butterworth low-pass filter, 75 Ohm, 10kHz + VIN 1 0 AC 1 + RS 1 2 75 + L1 2 3 737.7u + C2 3 0 343.4n + L3 3 4 2.387m + C4 4 0 343.4n + L5 4 out 737.7u + RL out 0 75 + .AC DEC 1000 100 1MEG + .MEAS AC f3dB WHEN vdb(out) = -9.0206 FALL=1 + .MEAS AC att_50k FIND vdb(out) AT=50e3 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "f3dB", 9000.0, 11000.0); + AssertMeasurementLess(result, "att_50k", (-60.0)); + } + + // Prompt: 3-bit flash ADC with 7 comparators and intentional input-referred offsets ranging from -5mV to +5mV. + [Fact] + public void _3_bit_Flash_ADC_with_Comparator_Offsets_Sorted_Thresholds_467636b9477337f3() + { + var result = RunAcceptedExample( + "deepseek:07540_ad35c56dd2037069:467636b9477337f3", + """ + * 3-bit Flash ADC with Comparator Offsets - Sorted Thresholds + VREF ref 0 DC 5 + VIN in 0 DC 0 + R1 ref t1 2k + R2 t1 t2 2k + R3 t2 t3 2k + R4 t3 t4 2k + R5 t4 t5 2k + R6 t5 t6 2k + R7 t6 t7 2k + R8 t7 0 2k + * Offsets reordered so out1 is lowest threshold, out7 is highest + VOS1 in1 in DC -2mV + VOS2 in2 in DC 4mV + VOS3 in3 in DC -4mV + VOS4 in4 in DC 3mV + VOS5 in5 in DC -3mV + VOS6 in6 in DC 5mV + VOS7 in7 in DC -5mV + * Comparators: in+ shifted by offset, in- connected to ladder taps + E1 out1 0 VALUE = { V(in1) > V(t7) ? 5 : 0 } + E2 out2 0 VALUE = { V(in2) > V(t6) ? 5 : 0 } + E3 out3 0 VALUE = { V(in3) > V(t5) ? 5 : 0 } + E4 out4 0 VALUE = { V(in4) > V(t4) ? 5 : 0 } + E5 out5 0 VALUE = { V(in5) > V(t3) ? 5 : 0 } + E6 out6 0 VALUE = { V(in6) > V(t2) ? 5 : 0 } + E7 out7 0 VALUE = { V(in7) > V(t1) ? 5 : 0 } + .DC VIN 0 5 0.005 + .MEAS DC Vth1 FIND V(in) WHEN V(out1)=2.5 + .MEAS DC Vth2 FIND V(in) WHEN V(out2)=2.5 + .MEAS DC Vth3 FIND V(in) WHEN V(out3)=2.5 + .MEAS DC Vth4 FIND V(in) WHEN V(out4)=2.5 + .MEAS DC Vth5 FIND V(in) WHEN V(out5)=2.5 + .MEAS DC Vth6 FIND V(in) WHEN V(out6)=2.5 + .MEAS DC Vth7 FIND V(in) WHEN V(out7)=2.5 + .MEAS DC LSB PARAM = 5/8 + .MEAS DC DNL1 PARAM = (Vth1-0)/LSB - 1 + .MEAS DC DNL2 PARAM = (Vth2-Vth1)/LSB - 1 + .MEAS DC DNL3 PARAM = (Vth3-Vth2)/LSB - 1 + .MEAS DC DNL4 PARAM = (Vth4-Vth3)/LSB - 1 + .MEAS DC DNL5 PARAM = (Vth5-Vth4)/LSB - 1 + .MEAS DC DNL6 PARAM = (Vth6-Vth5)/LSB - 1 + .MEAS DC DNL7 PARAM = (Vth7-Vth6)/LSB - 1 + .MEAS DC DNL8 PARAM = (5 - Vth7)/LSB - 1 + .MEAS DC INL1 PARAM = (Vth1 - 1*LSB)/LSB + .MEAS DC INL2 PARAM = (Vth2 - 2*LSB)/LSB + .MEAS DC INL3 PARAM = (Vth3 - 3*LSB)/LSB + .MEAS DC INL4 PARAM = (Vth4 - 4*LSB)/LSB + .MEAS DC INL5 PARAM = (Vth5 - 5*LSB)/LSB + .MEAS DC INL6 PARAM = (Vth6 - 6*LSB)/LSB + .MEAS DC INL7 PARAM = (Vth7 - 7*LSB)/LSB + .END + """); + + AssertAllMeasurementsSuccessful(result); + var dnl_names = new[] { "DNL1", "DNL2", "DNL3", "DNL4", "DNL5", "DNL6", "DNL7", "DNL8" }; + var inl_names = new[] { "INL1", "INL2", "INL3", "INL4", "INL5", "INL6", "INL7" }; + foreach (var name in dnl_names.Concat(inl_names)) + { + AssertMeasurementBetween(result, name, (-0.02), 0.02); + } + } + + // Prompt: 3-bit flash ADC with 3.3V reference voltage, built from an 8-resistor ladder and 7 ideal comparators (E sources). + [Fact] + public void _3_bit_Flash_ADC_with_3_3V_Reference_e5919a5956d815ab() + { + var result = RunAcceptedExample( + "deepseek:07541_6030d9aa67b9d825:e5919a5956d815ab", + """ + * 3-bit Flash ADC with 3.3V Reference + VREF ref 0 DC 3.3 + VIN in 0 DC 0 + R1 ref t1 1k + R2 t1 t2 1k + R3 t2 t3 1k + R4 t3 t4 1k + R5 t4 t5 1k + R6 t5 t6 1k + R7 t6 t7 1k + R8 t7 0 1k + E1 out1 0 VALUE = { V(in) > V(t1) ? 3.3 : 0 } + E2 out2 0 VALUE = { V(in) > V(t2) ? 3.3 : 0 } + E3 out3 0 VALUE = { V(in) > V(t3) ? 3.3 : 0 } + E4 out4 0 VALUE = { V(in) > V(t4) ? 3.3 : 0 } + E5 out5 0 VALUE = { V(in) > V(t5) ? 3.3 : 0 } + E6 out6 0 VALUE = { V(in) > V(t6) ? 3.3 : 0 } + E7 out7 0 VALUE = { V(in) > V(t7) ? 3.3 : 0 } + .DC VIN 0 3.3 0.005 + .MEAS DC out1_0_2 FIND V(out1) AT=0.2 + .MEAS DC out2_0_2 FIND V(out2) AT=0.2 + .MEAS DC out3_0_2 FIND V(out3) AT=0.2 + .MEAS DC out4_0_2 FIND V(out4) AT=0.2 + .MEAS DC out5_0_2 FIND V(out5) AT=0.2 + .MEAS DC out6_0_2 FIND V(out6) AT=0.2 + .MEAS DC out7_0_2 FIND V(out7) AT=0.2 + .MEAS DC out1_1_0 FIND V(out1) AT=1.0 + .MEAS DC out2_1_0 FIND V(out2) AT=1.0 + .MEAS DC out3_1_0 FIND V(out3) AT=1.0 + .MEAS DC out4_1_0 FIND V(out4) AT=1.0 + .MEAS DC out5_1_0 FIND V(out5) AT=1.0 + .MEAS DC out6_1_0 FIND V(out6) AT=1.0 + .MEAS DC out7_1_0 FIND V(out7) AT=1.0 + .MEAS DC out1_2_0 FIND V(out1) AT=2.0 + .MEAS DC out2_2_0 FIND V(out2) AT=2.0 + .MEAS DC out3_2_0 FIND V(out3) AT=2.0 + .MEAS DC out4_2_0 FIND V(out4) AT=2.0 + .MEAS DC out5_2_0 FIND V(out5) AT=2.0 + .MEAS DC out6_2_0 FIND V(out6) AT=2.0 + .MEAS DC out7_2_0 FIND V(out7) AT=2.0 + .MEAS DC out1_3_0 FIND V(out1) AT=3.0 + .MEAS DC out2_3_0 FIND V(out2) AT=3.0 + .MEAS DC out3_3_0 FIND V(out3) AT=3.0 + .MEAS DC out4_3_0 FIND V(out4) AT=3.0 + .MEAS DC out5_3_0 FIND V(out5) AT=3.0 + .MEAS DC out6_3_0 FIND V(out6) AT=3.0 + .MEAS DC out7_3_0 FIND V(out7) AT=3.0 + .END + """); + + AssertAllMeasurementsSuccessful(result); + foreach (var name in new[] { "out1_0_2", "out2_0_2", "out3_0_2", "out4_0_2", "out5_0_2", "out6_0_2", "out7_0_2" }) + { + AssertMeasurementLess(result, name, 0.5); + } + foreach (var name in new[] { "out1_1_0", "out2_1_0", "out3_1_0", "out4_1_0", "out5_1_0" }) + { + AssertMeasurementLess(result, name, 0.5); + } + foreach (var name in new[] { "out6_1_0", "out7_1_0" }) + { + AssertMeasurementGreater(result, name, 2.8); + } + foreach (var name in new[] { "out1_2_0", "out2_2_0", "out3_2_0" }) + { + AssertMeasurementLess(result, name, 0.5); + } + foreach (var name in new[] { "out4_2_0", "out5_2_0", "out6_2_0", "out7_2_0" }) + { + AssertMeasurementGreater(result, name, 2.8); + } + foreach (var name in new[] { "out1_3_0", "out2_3_0", "out3_3_0", "out4_3_0", "out5_3_0", "out6_3_0", "out7_3_0" }) + { + AssertMeasurementGreater(result, name, 2.8); + } + } + + // Prompt: The NMOS transistor M1 acts as a switch controlled by the input signal VIN. + [Fact] + public void NMOS_Pass_Transistor_Level_Shifter_1_8V_to_5V_060745508998a41c() + { + var result = RunAcceptedExample( + "deepseek:04272_17fae168a0e32f4c:060745508998a41c", + """ + * NMOS Pass Transistor Level Shifter - 1.8V to 5V + .MODEL nmod NMOS(VTO=1 KP=100u LAMBDA=0.02) + VDDH vddh 0 DC 5 + VIN in 0 PULSE(0 1.8 0 10n 10n 490n 1u) + M1 out in 0 0 nmod W=100u L=1u + R1 vddh out 10k + .tran 10n 10u + .meas TRAN vout_max MAX V(out) FROM 0 TO 10u + .meas TRAN vout_min MIN V(out) FROM 0 TO 10u + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementGreater(result, "vout_max", 4.5); + AssertMeasurementLess(result, "vout_min", 0.5); + } + + // Prompt: Design an NMOS pass transistor level shifter that converts a 0\u20133.3 V digital pulse to a 0\u20135 V output. Gate bias is 3.3 V, pull-up resistor is 15 k\u03a9 to 5 V. Use an NMOS transistor with VTO=1 V. Simulate transient and measure Vout_high, Vout_low, and rising propagation delay. + [Fact] + public void NMOS_Level_Shifter_3_3V_to_5V_0771e2365daaddd8() + { + var result = RunAcceptedExample( + "deepseek:04275_28864338a148645b:0771e2365daaddd8", + """ + * NMOS Level Shifter 3.3V to 5V + VDDH vddh 0 DC 5 + VDDL vddl 0 DC 3.3 + VIN in 0 PULSE(0 3.3 0 10n 10n 10u 20u) + M1 out vddl in 0 nmos W=20u L=1u + R1 vddh out 15k + .model nmos nmos (level=1 vto=1.0 kp=100u lambda=0.02) + .tran 10n 100u + .meas tran Vout_high avg V(out) from=1u to=9u + .meas tran Vout_low avg V(out) from=11u to=19u + .meas tran delay trig V(in) val=1.65 rise=1 targ V(out) val=2.5 rise=1 + .end + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "Vout_high", 4.5, 5.5); + AssertMeasurementLess(result, "Vout_low", 0.5); + AssertMeasurementLess(result, "delay", 1e-07); + } + + // Prompt: NMOS pass-transistor level shifter from 0\u20131.8 V to 0\u20133.3 V + [Fact] + public void NMOS_Level_Shifter_1_8V_to_3_3V_5b3f29af5435427d() + { + var result = RunAcceptedExample( + "deepseek:04276_6017961a9aaf013a:5b3f29af5435427d", + """ + * NMOS Level Shifter 1.8V to 3.3V + VDDH vddh 0 DC 3.3 + VDDL vddl 0 DC 1.8 + VIN in 0 PULSE(0 1.8 0 10n 10n 2u 4u) + M1 out vddl in 0 nmos W=5u L=2u + R1 vddh out 47k + .model nmos nmos (level=1 vto=0.7 kp=50u lambda=0.02) + .tran 1n 40u + .meas tran Vout_high avg V(out) from=0.5u to=1.5u + .meas tran Vout_low avg V(out) from=2.5u to=3.5u + .meas tran delay trig V(in) val=0.9 rise=1 targ V(out) val=1.65 rise=1 + .end + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "Vout_high", 3.0, 3.6); + AssertMeasurementLess(result, "Vout_low", 0.6); + AssertMeasurementLess(result, "delay", 1e-07); + } + + // Prompt: Design an NMOS level shifter with output load capacitor (5 pF) to simulate real loading. Shift 0\u20133.3 V to 0\u20135 V using a 10 k\u03a9 pull-up, gate at 3.3 V, NMOS W=50u L=1u. Apply a 6 \xb5s period pulse (3 \xb5s high). Run transient to measure Vout_high, Vout_low, and tdelay. + [Fact] + public void NMOS_Level_Shifter_with_5pF_load_68d1aecfa9dd9f3a() + { + var result = RunAcceptedExample( + "deepseek:04277_73101b61242b8d12:68d1aecfa9dd9f3a", + """ + * NMOS Level Shifter with 5pF load + VDDH vddh 0 DC 5 + VDDL vddl 0 DC 3.3 + VIN in 0 PULSE(0 3.3 0 5n 5n 3u 6u) + M1 out vddl in 0 nmos W=50u L=1u + R1 vddh out 10k + C1 out 0 5pF + .model nmos nmos (level=1 vto=1.0 kp=80u lambda=0.02) + .tran 0.1n 30u + .meas tran Vout_high avg V(out) from=1u to=3u + .meas tran Vout_low avg V(out) from=4u to=6u + .meas tran tdelay trig V(in) val=1.65 rise=1 targ V(out) val=2.5 rise=1 + .end + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "Vout_high", 4.5, 5.5); + AssertMeasurementLess(result, "Vout_low", 0.5); + AssertMeasurementLess(result, "tdelay", 1.5e-07); + } + + // Prompt: AC-excited differential capacitive sensor bridge with 110p/100p sensor mismatch + [Fact] + public void Differential_Capacitive_Sensor_Bridge_with_3_Opamp_Instrumentation_Amplifier_23729ff7bd6e71b2() + { + var result = RunAcceptedExample( + "deepseek:06772_58f4d347cf3cd22c:23729ff7bd6e71b2", + """ + * Differential Capacitive Sensor Bridge with 3-Opamp Instrumentation Amplifier + VAC exc 0 DC 0 AC 1 + C1 exc p 110p + C2 exc n 100p + C3 p 0 100p + C4 n 0 110p + R9 p 0 1e9 + R10 n 0 1e9 + E1 out1 0 p fb1 100000 + Rf1 out1 fb1 10k + Rg fb1 fb2 1k + Rf2 out2 fb2 10k + E2 out2 0 n fb2 100000 + R3 out1 noninv 10k + R4 noninv 0 10k + R5 out2 inv 10k + R6 inv out 10k + E3 out 0 inv noninv 100000 + .AC DEC 10 100 100k + .MEAS AC vout_mag FIND V(out) AT=10k + .MEAS AC vout_phase FIND VP(out) AT=10k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "vout_mag", 1.0, 0.01); + AssertMeasurementNear(result, "vout_phase", 0.0, 1.0); + } + + // Prompt: First-order RC low-pass filter subcircuit with 1k\u03a9 resistor and 159nF capacitor. + [Fact] + public void RC_Lowpass_Subcircuit_Example_1_d12cfabf5ba8b9d5() + { + var result = RunAcceptedExample( + "deepseek:07428_2184d5e9c4a24d92:d12cfabf5ba8b9d5", + """ + * RC Lowpass Subcircuit Example 1 + .SUBCKT LOPASS in out ref + R1 in out 1k + C1 out ref 159n + .ENDS + VIN in 0 AC 1 + X1 in out 0 LOPASS + .AC DEC 100 10 100k + .MEAS AC vout100 FIND mag(V(out)) AT=100 + .MEAS AC vout1k FIND mag(V(out)) AT=1000 + .MEAS AC vout10k FIND mag(V(out)) AT=10000 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "vout100", 1.0, 0.1); + AssertMeasurementNear(result, "vout1k", 0.707, 0.1); + AssertMeasurementLess(result, "vout10k", 0.15); + } + + // Prompt: NMOS level shifter circuit converting 0.9V logic to 2.5V using a 2k\u03a9 pull-up + [Fact] + public void NMOS_Level_Shifter_0_9V_to_2_5V_f0f593b883462ae6() + { + var result = RunAcceptedExample( + "deepseek:04274_6f80cc427cc28881:f0f593b883462ae6", + """ + * NMOS Level Shifter 0.9V to 2.5V + .MODEL nmod3 NMOS(VTO=0.5 KP=200u LAMBDA=0.05) + VDDH vddh 0 DC 2.5 + VIN in 0 PULSE(0 0.9 0 2n 2n 998n 2u) + M1 out in 0 0 nmod3 W=40u L=0.25u + R1 vddh out 2k + CL out 0 1p + .tran 1n 4u + .meas TRAN vout_max MAX V(out) FROM 0 TO 4u + .meas TRAN vout_min MIN V(out) FROM 0 TO 4u + .meas TRAN trise TRIG V(out) VAL=0.25 RISE=1 TARG V(out) VAL=2.25 RISE=1 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementGreater(result, "vout_max", 2.3); + AssertMeasurementLess(result, "vout_min", 0.2); + AssertMeasurementBetween(result, "trise", 1e-09, 5e-08); + } + + // Prompt: RC low-pass filter with R=10k\u03a9, C=10nF, theoretical cutoff ~1.59 kHz + [Fact] + public void RC_Lowpass_Subcircuit_Example_2_333ba9bc0781c5ad() + { + var result = RunAcceptedExample( + "deepseek:07429_48a9f3e3cc6a7898:333ba9bc0781c5ad", + """ + * RC Lowpass Subcircuit Example 2 + .SUBCKT LOPASS in out ref + R1 in out 10k + C1 out ref 10n + .ENDS + VIN in 0 AC 1 + X1 in out 0 LOPASS + .AC LIN 10001 10 10000 + .MEAS AC vout100 FIND MAG(V(out)) AT=100 + .MEAS AC vout1590 FIND MAG(V(out)) AT=1590 + .MEAS AC vout10k FIND MAG(V(out)) AT=10000 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "vout100", 1.0, 0.1); + AssertMeasurementNear(result, "vout1590", 0.707, 0.1); + AssertMeasurementLess(result, "vout10k", 0.2); + } + + // Prompt: RC low-pass subcircuit with R=1k\u03a9 and C=15.9nF, giving a cutoff frequency of 10 kHz. + [Fact] + public void RC_Lowpass_Subcircuit_Example_3_65bfc167654b5684() + { + var result = RunAcceptedExample( + "deepseek:07430_cad9ec15296c1f75:65bfc167654b5684", + """ + * RC Lowpass Subcircuit Example 3 + .SUBCKT LOPASS in out ref + R1 in out 1k + C1 out ref 15.9n + .ENDS + VIN in 0 AC 1 + X1 in out 0 LOPASS + .AC DEC 100 100 1e6 + .MEAS AC vout100 FIND VM(out) AT=100 + .MEAS AC vout10k FIND VM(out) AT=10000 + .MEAS AC vout100k FIND VM(out) AT=100000 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "vout100", 1.0, 0.1); + AssertMeasurementNear(result, "vout10k", 0.707, 0.1); + AssertMeasurementLess(result, "vout100k", 0.15); + } + + // Prompt: Create a biased positive diode limiter with a 3V bias voltage to clip positive peaks of a 1kHz 5V amplitude sine wave. Use a series 1k resistor and a 10k load. + [Fact] + public void Biased_Positive_Diode_Limiter_Example_1_ac7e5df7ef91d760() + { + var result = RunAcceptedExample( + "deepseek:02469_b3815e15d33e5fbb:ac7e5df7ef91d760", + """ + * Biased Positive Diode Limiter - Example 1 + VIN in 0 SIN(0 5 1k) + VBIAS bias 0 DC 3 + R1 in out 1k + Rload out 0 10k + D1 out bias DMOD + .MODEL DMOD D(IS=1e-15 N=1) + .TRAN 0.01m 5m + .MEAS TRAN max_vout MAX V(out) FROM=0 TO=5m + .MEAS TRAN min_vout MIN V(out) FROM=0 TO=5m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "max_vout", 3.5, 4.0); + AssertMeasurementBetween(result, "min_vout", (-4.7), (-4.3)); + } + + // Prompt: Simulate a biased positive diode limiter with a 5V bias, 2.2k series resistor, and 4.7k load. Input is 8V amplitude at 2kHz. + [Fact] + public void Biased_Positive_Diode_Limiter_Example_2_0a00bf32f645595f() + { + var result = RunAcceptedExample( + "deepseek:02470_87d35b3e404c17b9:0a00bf32f645595f", + """ + * Biased Positive Diode Limiter - Example 2 + VIN in 0 SIN(0 8 2k) + VBIAS bias 0 DC 5 + R1 in out 2.2k + Rload out 0 4.7k + D1 out bias DMOD + .MODEL DMOD D(IS=1e-14 N=1.2) + .TRAN 0.005m 2m + .MEAS TRAN max_vout MAX V(out) FROM=0 TO=2m + .MEAS TRAN min_vout MIN V(out) FROM=0 TO=2m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "max_vout", 5.4, 6.0); + AssertMeasurementBetween(result, "min_vout", (-5.7), (-5.2)); + } + + // Prompt: Create a biased positive diode limiter using a 1.5V bias, 470 ohm resistor, and 1k load. The input is a 4V amplitude 500 Hz sine wave. + [Fact] + public void Biased_Positive_Diode_Limiter_Example_3_a9982771bdef8a71() + { + var result = RunAcceptedExample( + "deepseek:02471_9454477dd5380a30:a9982771bdef8a71", + """ + * Biased Positive Diode Limiter - Example 3 + VIN in 0 SIN(0 4 500) + VBIAS bias 0 DC 1.5 + R1 in out 470 + Rload out 0 1k + D1 out bias DMOD + .MODEL DMOD D(IS=1e-15 N=1) + .TRAN 0.02m 10m + .MEAS TRAN max_vout MAX V(out) FROM=0 TO=10m + .MEAS TRAN min_vout MIN V(out) FROM=0 TO=10m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "max_vout", 2.0, 2.4); + AssertMeasurementBetween(result, "min_vout", (-2.9), (-2.5)); + } + + // Prompt: Active RC all-pass filter designed with a single op-amp. + [Fact] + public void Active_RC_All_Pass_Phase_Shifter_with_100Hz_corner_3c52db21fce5cbb9() + { + var result = RunAcceptedExample( + "deepseek:01724_eae88d37538d096f:3c52db21fce5cbb9", + """ + * Active RC All-Pass Phase Shifter with 100Hz corner + VIN in 0 DC 0 AC 1 + R1 in p 1.59E4 + C1 p 0 100E-9 + R2 in n 1.59E4 + R3 out n 1.59E4 + E1 out 0 p n 100000 + .AC DEC 100 1 10K + .MEAS AC mag_low FIND VDB(out) AT=1 + .MEAS AC phase_low FIND VP(out) AT=1 + .MEAS AC mag_corner FIND VDB(out) AT=100 + .MEAS AC phase_corner FIND VP(out) AT=100 + .MEAS AC mag_high FIND VDB(out) AT=10K + .MEAS AC phase_high FIND VP(out) AT=10K + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "mag_low", (-0.1), 0.1); + AssertMeasurementBetween(result, "mag_corner", (-0.5), 0.5); + AssertMeasurementBetween(result, "mag_high", (-0.2), 0.2); + AssertMeasurementBetween(result, "phase_low", (-0.09), 0.09); + AssertMeasurementBetween(result, "phase_corner", (-1.66), (-1.48)); + AssertMeasurementBetween(result, "phase_high", (-3.23), (-3.05)); + } + + // Prompt: Design a compensated 10x oscilloscope probe network with a 9 M\u03a9 tip resistor and 1 M\u03a9 scope input. + [Fact] + public void Compensated_10x_Oscilloscope_Probe_Network_Standard_9M_1M_32d37bb789b3ba59() + { + var result = RunAcceptedExample( + "deepseek:02181_32d37bb789b3ba59:32d37bb789b3ba59", + """ + * Compensated 10x Oscilloscope Probe Network - Standard 9M/1M + VIN in 0 AC 1 + Rtip in out 9MEG + Ctip in out 2.2222pF + Rscope out 0 1MEG + Cscope out 0 20pF + .AC DEC 100 1 100MEG + .MEAS AC atten_low FIND V(out) AT=10 + .MEAS AC atten_high FIND V(out) AT=10MEG + .MEAS AC vout_max_dB MAX DB(V(out)) + .MEAS AC vout_min_dB MIN DB(V(out)) + .MEAS AC flatness_dB PARAM vout_max_dB - vout_min_dB + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "atten_low", 0.1, 0.001); + AssertMeasurementNear(result, "atten_high", 0.1, 0.001); + AssertMeasurementLess(result, "flatness_dB", 0.05); + } + + // Prompt: Create a 10x probe network suitable for a high-impedance scope input (10 M\u03a9, 15 pF). + [Fact] + public void Compensated_10x_Probe_with_90MEG_tip_and_10MEG_scope_c7a6b3b77cf21cd6() + { + var result = RunAcceptedExample( + "deepseek:02182_c7a6b3b77cf21cd6:c7a6b3b77cf21cd6", + """ + * Compensated 10x Probe with 90MEG tip and 10MEG scope + VIN in 0 AC 1 + Rtip in out 90MEG + Ctip in out 1.6667pF + Rscope out 0 10MEG + Cscope out 0 15pF + .AC DEC 50 0.1 1000MEG + .MEAS AC atten_low FIND V(out) AT=1 + .MEAS AC atten_high FIND V(out) AT=100MEG + .MEAS AC vmax_db MAX DB(V(out)) FROM 1MEG TO 1000MEG + .MEAS AC vmin_db MIN DB(V(out)) FROM 1MEG TO 1000MEG + .MEAS AC flatness_dB PARAM vmax_db - vmin_db + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "atten_low", 0.1, 0.0005); + AssertMeasurementNear(result, "atten_high", 0.1, 0.0005); + AssertMeasurementLess(result, "flatness_dB", 0.1); + } + + // Prompt: Construct a compensated 10:1 probe using 9.9 M\u03a9 and 1.1 M\u03a9 resistors and a 25 pF scope input capacitance. + [Fact] + public void Compensated_10x_Probe_with_9_9MEG_1_1MEG_and_25pF_scope_4e208d76704804dc() + { + var result = RunAcceptedExample( + "deepseek:02183_4e208d76704804dc:4e208d76704804dc", + """ + * Compensated 10x Probe with 9.9MEG / 1.1MEG and 25pF scope + VIN in 0 AC 1 + Rtip in out 9.9MEG + Ctip in out 2.7778pF + Rscope out 0 1.1MEG + Cscope out 0 25pF + .AC DEC 200 10 50MEG + .MEAS AC att_low FIND V(out) AT=1k + .MEAS AC att_high FIND V(out) AT=20MEG + .MEAS AC att_dB_low FIND DB(V(out)) AT=1k + .MEAS AC att_dB_high FIND DB(V(out)) AT=20MEG + .MEAS AC flat_dB PARAM 'att_dB_high - att_dB_low' + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "att_low", 0.1, 0.002); + AssertMeasurementNear(result, "att_high", 0.1, 0.002); + AssertMeasurementBetween(result, "flat_dB", (-0.02), 0.02); + } + + // Prompt: Simulate a diode clamp circuit that limits the output to a 5V rail using a 1N4148-style diode model. + [Fact] + public void Diode_Clamp_to_5V_Rail_ba5c23e566737e74() + { + var result = RunAcceptedExample( + "deepseek:02415_e639f1397137860d:ba5c23e566737e74", + """ + * Diode Clamp to +5V Rail + VIN in 0 PULSE(0 10 0 1n 1n 1u 2u) + R1 in out 1k + D1 out clamp dmod1 + Vclamp clamp 0 DC 5 + .model dmod1 D(IS=1e-14 RS=1) + .tran 10n 10u + .measure tran vmax MAX v(out) + .measure tran vmin MIN v(out) + .measure tran vavg AVG v(out) + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "vmax", 5.5, 6.0); + AssertMeasurementBetween(result, "vmin", (-0.1), 0.1); + AssertMeasurementBetween(result, "vavg", 2.0, 4.0); + } + + // Prompt: Set up a diode clamp with a 3.3V supply and a 5V PULSE input, using a 2.2k series resistor. + [Fact] + public void Diode_Clamp_to_3_3V_Rail_b8d00e9e6c24c580() + { + var result = RunAcceptedExample( + "deepseek:02416_010989c6e89dc813:b8d00e9e6c24c580", + """ + * Diode Clamp to +3.3V Rail + VIN in 0 PULSE(0 5 0 1n 1n 500n 1u) + R1 in out 2.2k + D1 out clamp dmod2 + Vclamp clamp 0 DC 3.3 + .model dmod2 D(IS=1e-15 RS=0.5) + .tran 1n 2u + .measure tran vout_high FIND v(out) AT=400n + .measure tran vout_low FIND v(out) AT=900n + .measure tran vmax MAX v(out) + .measure tran vmin MIN v(out) + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "vout_high", 3.8, 4.2); + AssertMeasurementBetween(result, "vout_low", (-0.1), 0.1); + AssertMeasurementBetween(result, "vmax", 3.8, 4.2); + AssertMeasurementBetween(result, "vmin", (-0.1), 0.1); + } + + // Prompt: Build a diode clamp to a 10V rail with a 10k load resistor, input PULSE from -5V to 15V. + [Fact] + public void Diode_Clamp_to_10V_Rail_with_Load_fb6941b7ba333532() + { + var result = RunAcceptedExample( + "deepseek:02417_b2607f35da8cbc8b:fb6941b7ba333532", + """ + * Diode Clamp to +10V Rail with Load + VIN in 0 PULSE(-5 15 0 1n 1n 50u 100u) + R1 in out 1k + D1 out clamp dmod3 + Vclamp clamp 0 DC 10 + RL out 0 10k + .model dmod3 D(IS=2e-14 RS=2) + .tran 1u 200u + .measure tran vout_high_at FIND v(out) AT=30u + .measure tran vout_low_at FIND v(out) AT=80u + .measure tran vmax MAX v(out) + .measure tran vmin MIN v(out) + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "vout_high_at", 10.0, 11.0); + AssertMeasurementBetween(result, "vout_low_at", (-5.0), (-4.0)); + AssertMeasurementBetween(result, "vmax", 10.0, 11.0); + AssertMeasurementBetween(result, "vmin", (-5.0), (-4.0)); + } + + // Prompt: 5V DC supply with voltage divider R1=1k, R2=2k, and load RL=10k. + [Fact] + public void Voltage_divider_with_load_317e19e0ee27f9b8() + { + var result = RunAcceptedExample( + "deepseek:00012_ef0e0e2a1df432f8:317e19e0ee27f9b8", + """ + * Voltage divider with load + V1 vin 0 DC 5 + R1 vin out 1k + R2 out 0 2k + Rload out 0 10k + .DC V1 5 5 1 + .MEAS DC vout FIND V(out) AT=5 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "vout", 3.12, 3.13); + } + + // Prompt: A 12 V DC supply, voltage divider with R1=10k and R2=20k, and a 100k load resistor + [Fact] + public void Voltage_divider_with_load_ce2d48f0854c08bc() + { + var result = RunAcceptedExample( + "deepseek:00013_87eab7ca8d2cdb5d:ce2d48f0854c08bc", + """ + * Voltage divider with load + V1 vin 0 DC 12 + R1 vin out 10k + R2 out 0 20k + Rload out 0 100k + .DC V1 12 12 1 + .MEAS DC vout FIND V(out) AT=12 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "vout", 7.45, 7.55); + } + + // Prompt: Voltage divider with R1=2.2k, R2=4.7k, and a very light load of 1MEG + [Fact] + public void Voltage_divider_with_very_light_load_0120dd2df3b2376e() + { + var result = RunAcceptedExample( + "deepseek:00014_da125226f7ccfb09:0120dd2df3b2376e", + """ + * Voltage divider with very light load + V1 vin 0 DC 9 + R1 vin out 2.2k + R2 out 0 4.7k + Rload out 0 1MEG + .DC V1 9 9 1 + .MEAS DC vout FIND V(out) AT=9 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "vout", 6.12, 6.13); + } + + // Prompt: Design a PWM DAC using an RC reconstruction filter. + [Fact] + public void PWM_DAC_with_RC_Reconstruction_Filter_608f32a37114b35e() + { + var result = RunAcceptedExample( + "deepseek:02196_8c3f5ca230f9810d:608f32a37114b35e", + """ + * PWM DAC with RC Reconstruction Filter + VIN in 0 PULSE(0 5 0 1n 1n 6u 10u) + R1 in out 1k + C1 out 0 100n + .TRAN 0.01m 5m + .MEAS TRAN Vout_avg AVG V(out) FROM=4m TO=5m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "Vout_avg", 2.9, 3.1); + } + + // Prompt: BJT current source with Zener diode reference + [Fact] + public void BJT_Current_Source_with_Zener_Diode_Reference_4dc0c6047782f48d() + { + var result = RunAcceptedExample( + "deepseek:01039_52762fd638811fb5:4dc0c6047782f48d", + """ + * BJT Current Source with Zener Diode Reference + VCC VCC 0 DC 12 + RZ VCC BASE 2.2k + DZ 0 BASE DZENER + Q1 COLLECTOR BASE EMITTER Q2N2222 + RE EMITTER 0 4.7k + RL VCC COLLECTOR 1k + .MODEL DZENER D(BV=5.6 IBV=10m RS=1) + .MODEL Q2N2222 NPN(IS=1e-14 BF=100 VAF=50) + .OP + .DC VCC 5 15 0.1 + .MEASURE DC IOUT_AVG AVG I(RL) FROM=7 TO=15 + .MEASURE DC IOUT_MIN MIN I(RL) FROM=7 TO=15 + .MEASURE DC IOUT_MAX MAX I(RL) FROM=7 TO=15 + .MEASURE DC IOUT_RIPPLE PARAM='IOUT_MAX - IOUT_MIN' + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "IOUT_AVG", 0.00105, 5e-05); + AssertMeasurementLess(result, "IOUT_RIPPLE", 2e-05); + } + + // Prompt: PWM DAC converts digital PWM signal to analog DC using a two-stage RC low-pass filter. + [Fact] + public void PWM_DAC_with_two_stage_RC_lowpass_filter_and_voltage_follower_6943443fd5b6f401() + { + var result = RunAcceptedExample( + "deepseek:02198_f2047dab44f24da2:6943443fd5b6f401", + """ + * PWM DAC with two-stage RC lowpass filter and voltage follower + Vpwm pwm 0 DC 0 AC 1 PULSE(0 5 0 1n 1n 5u 10u) + R1 pwm filt1 1k + C1 filt1 0 100nF + R2 filt1 buf_in 1k + C2 buf_in 0 100nF + E1 out 0 buf_in 0 1 + Rload out 0 10k + .TRAN 1u 5m + .AC DEC 10 1 1e6 + .MEASURE TRAN Vout_avg AVG V(out) FROM=4m TO=5m + .MEASURE TRAN Vout_ripple PP V(out) FROM=4m TO=5m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "Vout_avg", 2.5, 0.1); + AssertMeasurementLess(result, "Vout_ripple", 0.05); + } + + // Prompt: Single-slope ADC front-end with PULSE voltage ramp and comparator. + [Fact] + public void Single_Slope_ADC_Ramp_and_Comparator_Front_End_b540a07c3c0c6a68() + { + var result = RunAcceptedExample( + "deepseek:02208_df6dba4267c67da8:b540a07c3c0c6a68", + """ + * Single-Slope ADC Ramp and Comparator Front End + Vref ref 0 DC 5 + Vramp ramp 0 PULSE(0 5 0 1m 1n 1n 2m) + Vin in 0 DC 2.5 + E1 comp_out 0 in ramp 100k + .tran 0 1.5m + .measure tran trip_time WHEN V(comp_out)=0 CROSS=1 + .measure tran ideal_time PARAM='2.5/5*1m' + .measure tran time_error PARAM='trip_time-ideal_time' + .end + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementCount(result, "trip_time", 1); + AssertMeasurementCount(result, "ideal_time", 1); + AssertMeasurementCount(result, "time_error", 1); + AssertMeasurementNear(result, "trip_time", 0.0005, 1e-06); + AssertMeasurementNear(result, "time_error", 0.0, 1e-09); + } + + // Prompt: High-side current sense amplifier using a difference amplifier with gain 10 to measure voltage across a 0.1\u03a9 shunt resistor on a 12V supply. + [Fact] + public void High_Side_Current_Sense_Amplifier_with_Input_Offset_69fb4815511102eb() + { + var result = RunAcceptedExample( + "deepseek:02039_896cc24988051be7:69fb4815511102eb", + """ + * High-Side Current Sense Amplifier with Input Offset + Vsupply Vsup 0 DC 12 + Rsense Vsup n1 0.1 + Iload n1 0 DC 0 + R1a Vsup div_plus 10k + R2b div_plus 0 100k + VOS op_plus div_plus DC 500uV + R1b n1 op_minus 10k + R2a op_minus Vout 100k + E1 Vout 0 op_plus op_minus 100k + .DC Iload 0 2 0.01 + .MEAS DC vout0 FIND V(Vout) AT=0 + .MEAS DC vout2 FIND V(Vout) AT=2 + .END + """); + + AssertAllMeasurementsSuccessful(result); + var vout0 = MeasurementValue(result, "vout0"); + var vout2 = MeasurementValue(result, "vout2"); + AssertMeasurementBetween(result, "vout0", 0.0, 0.01); + AssertMeasurementBetween(result, "vout2", 1.99, 2.01); + var gain = ((vout2 - vout0) / 2.0); + Assert.True(((0.95 < gain) && (gain < 1.05)), CaseLabel(result)); + } + + // Prompt: Design of a third-order Chebyshev low-pass filter with 0.5 dB passband ripple and 1 kHz cutoff using an LC ladder network with 50 ohm terminations. + [Fact] + public void Third_order_0_5dB_ripple_Chebyshev_LC_low_pass_filter_fc_1kHz_Z0_50_Ohm_d646f43f47557d4d() + { + var result = RunAcceptedExample( + "deepseek:00580_db7086f25eafbf7e:d646f43f47557d4d", + """ + * Third-order 0.5dB ripple Chebyshev LC low-pass filter, fc=1kHz, Z0=50 Ohm + V1 in 0 AC 1V + R1 in 1 50 + L1 1 2 12.7mH + C1 2 0 3.49uF + L2 2 out 12.7mH + R2 out 0 50 + .AC DEC 100 10 10k + .MEAS AC max_gain MAX VDB(out) + .MEAS AC f3db WHEN VDB(out)=-9 CROSS=1 + .MEAS AC att_2k FIND VDB(out) AT=2000 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "max_gain", (-6.2), (-5.5)); + AssertMeasurementBetween(result, "f3db", 1000.0, 1500.0); + AssertMeasurementBetween(result, "att_2k", (-100.0), (-20.0)); + } + + // Prompt: Weighted summing amplifier with gains -10, -5, -2.5 + [Fact] + public void Weighted_Summing_Amplifier_dcf6a5f3663230ad() + { + var result = RunAcceptedExample( + "deepseek:01452_fa3374392ccd4b91:dcf6a5f3663230ad", + """ + * Weighted Summing Amplifier + V1 in1 0 DC 1 AC 1 + V2 in2 0 DC 0.5 AC 0 + V3 in3 0 DC 0.2 AC 0 + R1 in1 sum 1k + R2 in2 sum 2k + R3 in3 sum 4k + Rf out sum 10k + E1 out 0 sum 0 100000 + .OP + .AC DEC 10 1 10k + .MEAS OP vout_dc FIND v(out) AT=0 + .MEAS AC vout_ac_mag FIND vm(out) AT=1k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "vout_dc", (-13.0), 0.1); + AssertMeasurementNear(result, "vout_ac_mag", 10.0, 0.1); + } + + // Prompt: Biased negative diode limiter with a -3V bias and a 1N4148-like diode. + [Fact] + public void Biased_Negative_Diode_Limiter_b5c32c66ee8ed847() + { + var result = RunAcceptedExample( + "deepseek:00758_af750028a965e231:b5c32c66ee8ed847", + """ + * Biased Negative Diode Limiter + VIN in 0 SIN(0 5 1k) + R1 in out 1k + D1 bias_neg out DMOD + Vbias bias_neg 0 DC -3 + Rload out 0 10k + .MODEL DMOD D(IS=2.52n RS=0.568 N=1.752 CJO=4p VJ=0.75 M=0.4 BV=100 TT=5n) + .TRAN 0.1u 2m + .MEASURE TRAN vmin MIN V(out) FROM=1m TO=2m + .MEASURE TRAN vmax MAX V(out) FROM=1m TO=2m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "vmin", (-4.0), (-3.5)); + AssertMeasurementNear(result, "vmax", 4.545, 0.1); + } + + // Prompt: A 5th order Bessel LC ladder low-pass filter terminated with 50-ohm source and load resistors. + [Fact] + public void _5th_order_Bessel_low_pass_filter_1kHz_50_ohm_50b9e53dfdc3e1ab() + { + var result = RunAcceptedExample( + "deepseek:00655_40067483ce126604:50b9e53dfdc3e1ab", + """ + * 5th order Bessel low-pass filter, 1kHz, 50 ohm + VIN in 0 AC 1 + Rsrc in n1 50 + L1 n1 n2 3.37m + C2 n2 0 6.28u + L3 n2 n3 8.68m + C4 n3 0 7.94u + L5 n3 out 4.84m + Rload out 0 50 + .AC DEC 100 1 100k + .MEAS AC gain_passband MAX vdb(out) FROM 1 TO 100 + .MEAS AC f3db WHEN vdb(out) = -9 + .MEAS AC f6db WHEN vdb(out) = -12 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "gain_passband", (-6.0), 1.0); + var f3db = MeasurementValue(result, "f3db"); + AssertMeasurementBetween(result, "f3db", 900.0, 1100.0); + AssertMeasurementGreater(result, "f6db", f3db); + } + + // Prompt: The circuit is a series RLC bandpass filter with AC excitation. + [Fact] + public void Series_RLC_Bandpass_Filter_e324d2f540b22500() + { + var result = RunAcceptedExample( + "deepseek:00064_022241778be18b74:e324d2f540b22500", + """ + * Series RLC Bandpass Filter + VIN in 0 AC 1 + L1 in mid 10m + C1 mid out 10n + R1 out 0 100 + .AC DEC 100 10 100k + .MEAS AC fres WHEN VP(out)=0 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "fres", 15000.0, 17000.0); + } + + // Prompt: A shunt voltage regulator uses an op\u2011amp error amplifier and a BJT shunt transistor to maintain a stable output. + [Fact] + public void Shunt_Regulator_with_Op_Amp_Error_Amplifier_a5bee9035b62fcf7() + { + var result = RunAcceptedExample( + "deepseek:01899_0bc3787fb9bd86e6:a5bee9035b62fcf7", + """ + * Shunt Regulator with Op-Amp Error Amplifier + VIN in 0 DC 12 + RS in out 100 + R1 out fb 10k + R2 fb 0 10k + VREF ref 0 DC 2.5 + E1 base 0 fb ref 100000 + Rbase base qb 1k + Q1 out qb 0 NPNMOD + .MODEL NPNMOD NPN(IS=1e-14 BF=200 VAF=100) + RL out 0 100 + .OP + .DC VIN 10 14 0.1 + .MEAS DC VOUT_AT_12V FIND V(out) AT=12 + .MEAS DC VOUT_11_9 FIND V(out) AT=11.9 + .MEAS DC VOUT_12_1 FIND V(out) AT=12.1 + .MEAS DC LINEREG DERIV V(out) AT=12 + .MEAS DC VOUT_MIN MIN V(out) + .MEAS DC VOUT_MAX MAX V(out) + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "VOUT_AT_12V", 5.0, 0.1); + AssertMeasurementBetween(result, "LINEREG", (-0.01), 0.01); + AssertMeasurementBetween(result, "VOUT_MIN", 4.9, 5.1); + AssertMeasurementBetween(result, "VOUT_MAX", 4.9, 5.1); + } + + // Prompt: Two-input CMOS NOR gate with PMOS stack and NMOS parallel pull-down. + [Fact] + public void CMOS_NOR2_Gate_Transient_Response_24224b6e70800c11() + { + var result = RunAcceptedExample( + "deepseek:00300_8c2ceb1ab869e8e7:24224b6e70800c11", + """ + * CMOS NOR2 Gate Transient Response + VDD vdd 0 DC 5 + VA A 0 PULSE(0 5 5n 1n 1n 20n 40n) + VB B 0 PULSE(0 5 15n 1n 1n 20n 40n) + M1 Y A 0 0 NMOS W=10u L=1u + M2 Y B 0 0 NMOS W=10u L=1u + M3 p1 A vdd vdd PMOS W=20u L=1u + M4 Y B p1 vdd PMOS W=20u L=1u + CL Y 0 10f + .MODEL NMOS NMOS (VTO=0.7 KP=100U LAMBDA=0.02) + .MODEL PMOS PMOS (VTO=-0.7 KP=40U LAMBDA=0.02) + .TRAN 0.1n 100n + .measure TRAN v10n FIND V(Y) AT=10n + .measure TRAN v20n FIND V(Y) AT=20n + .measure TRAN v40n FIND V(Y) AT=40n + .measure TRAN v60n FIND V(Y) AT=60n + .measure TRAN v80n FIND V(Y) AT=80n + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementLess(result, "v10n", 0.5); + AssertMeasurementLess(result, "v20n", 0.5); + AssertMeasurementLess(result, "v60n", 0.5); + AssertMeasurementGreater(result, "v40n", 4.5); + AssertMeasurementGreater(result, "v80n", 4.5); + } + + // Prompt: Operates as an inverting amplifier with a gain of -1 until clamping occurs. + [Fact] + public void Active_op_amp_clamp_with_diode_feedback_improved_c98902fff58dbed6() + { + var result = RunAcceptedExample( + "deepseek:01570_2bc979d9b908af90:c98902fff58dbed6", + """ + * Active op-amp clamp with diode feedback (improved) + VIN in 0 SIN(0 5 1k) + R1 in inv 10k + Rf out inv 10k + E1 out 0 0 inv 100k + D1 out p DMOD + VPOS p inv DC 2.7 + D2 n out DMOD + VNEG inv n DC 1.7 + .MODEL DMOD D(IS=1e-12 RS=1e-6) + .TRAN 0.01m 2m 0 0.01m + .MEAS TRAN maxv MAX V(out) FROM=0 TO=2m + .MEAS TRAN minv MIN V(out) FROM=0 TO=2m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "maxv", 3.0, 3.5); + AssertMeasurementBetween(result, "minv", (-2.5), (-1.8)); + } + + // Prompt: NMOS current mirror with source degeneration resistors (R1=1k, R2=600) to adjust mirror ratio. + [Fact] + public void MOS_Source_Degenerated_Current_Mirror_b29171a736398237() + { + var result = RunAcceptedExample( + "deepseek:01283_4178eb2510933d43:b29171a736398237", + """ + * MOS Source-Degenerated Current Mirror + M1 d1g d1g s1 0 nmos W=10u L=1u + M2 d2 d1g s2 0 nmos W=20u L=1u + R1 s1 0 1k + R2 s2 0 600 + Rref vdd d1g 10k + Vdd vdd 0 DC 5 + Vds2 d2 0 DC 5 + .model nmos nmos (vto=0.7 kp=200u lambda=0.01) + .OP + .DC Vds2 0 5 0.01 + .MEAS DC iref FIND I(Rref) AT=5 + .MEAS DC iout FIND I(R2) AT=5 + .MEAS DC ratio PARAM iout/iref + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "ratio", 1.7, 2.1); + } + + // Prompt: Design an op-amp sample-and-hold circuit with an ideal switch and E-source buffer. Input is a 1kHz 1V amplitude sine wave. Sample at its positive peak (0.25ms) using a pulse-controlled switch, then observe the held output at 0.3ms and 0.8ms. + [Fact] + public void Sample_and_Hold_with_ideal_switch_and_op_amp_buffer_67ff3e459195c160() + { + var result = RunAcceptedExample( + "deepseek:01583_6fd0a732ff5764c4:67ff3e459195c160", + """ + * Sample-and-Hold with ideal switch and op-amp buffer + VIN in 0 SIN(0 1 1k 0 0) + VPULSE ctrl 0 PULSE(0 5 0 1u 1u 0.25m 1m) + S1 in hold ctrl 0 SWMOD + .MODEL SWMOD SW(RON=10 ROFF=1000MEG VT=2.5 VH=0.1) + C1 hold 0 1nF + E1 out 0 hold out 1e5 + Rload out 0 10k + .TRAN 1u 1m + .MEASURE TRAN held_initial FIND V(out) AT=0.3m + .MEASURE TRAN held_late FIND V(out) AT=0.8m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "held_initial", 1.0, 0.02); + AssertMeasurementNear(result, "held_late", 1.0, 0.02); + } + + // Prompt: The netlist implements a simple NMOS differential pair with an active PMOS current mirror load. + [Fact] + public void MOSFET_Differential_Pair_with_Active_Load_d1c41698ecd97ad5() + { + var result = RunAcceptedExample( + "deepseek:00268_67a47c54a3793c49:d1c41698ecd97ad5", + """ + * MOSFET Differential Pair with Active Load + .PARAM VDD=5 + .PARAM IBIAS=500u + .PARAM VCM=2.5 + VDD VDD 0 DC {VDD} + VIN1 IN1 0 DC 0 + VIN2 IN2 0 DC {VCM} + I1 N001 0 DC {IBIAS} + M1 OUT1 IN1 N001 0 NMOD L=1U W=10U + M2 OUT IN2 N001 0 NMOD L=1U W=10U + M3 OUT1 OUT1 VDD VDD PMOD L=1U W=20U + M4 OUT OUT1 VDD VDD PMOD L=1U W=20U + .MODEL NMOD NMOS (VTO=0.7 KP=100U LAMBDA=0.02) + .MODEL PMOD PMOS (VTO=-0.7 KP=50U LAMBDA=0.02) + .DC VIN1 0 5 0.01 + .OP + .MEASURE DC VOUT_QUIESC FIND V(OUT) AT=2.5 + .MEASURE DC VOUT1 FIND V(OUT) AT=2.5 + .MEASURE DC VOUT2 FIND V(OUT) AT=2.51 + .MEASURE DC GAIN PARAM='ABS(VOUT2 - VOUT1)/0.01' + .MEASURE DC VOUT_MAX MAX V(OUT) + .MEASURE DC VOUT_MIN MIN V(OUT) + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "GAIN", 30.0, 200.0); + AssertMeasurementBetween(result, "VOUT_QUIESC", 3.0, 4.0); + AssertMeasurementGreater(result, "VOUT_MAX", 4.5); + AssertMeasurementBetween(result, "VOUT_MIN", (-0.7), 0.3); + } + + // Prompt: Wien bridge oscillator with behavioral op\u2011amp (E-element) and diode\u2011limited negative feedback. + [Fact] + public void Wien_Bridge_Oscillator_with_Diode_Amplitude_Control_e4b2b7599c5cfd0c() + { + var result = RunAcceptedExample( + "deepseek:01762_a396dd4d25cf5aaa:e4b2b7599c5cfd0c", + """ + * Wien Bridge Oscillator with Diode Amplitude Control + .IC V(noninv)=0.001 + EAMP out_op 0 inv noninv 100k + R1 out_op n1 10k + C1 n1 noninv 10n + R2 noninv 0 10k + C2 noninv 0 10n + Rg inv 0 10k + Rf out_op inv 22k + D1 out_op inv DMOD + D2 inv out_op DMOD + .MODEL DMOD D(IS=1E-17 RS=1) + .TRAN 10u 10m 0 1u + .MEAS TRAN Vpeak MAX V(out_op) FROM=1m TO=10m + .MEAS TRAN period TRIG V(out_op) VAL=0 RISE=1 TARG V(out_op) VAL=0 RISE=2 + .MEAS TRAN freq PARAM 1/period + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "freq", 1400.0, 1800.0); + AssertMeasurementBetween(result, "Vpeak", 0.8, 1.5); + } + + // Prompt: 5th-order passive LC ladder Bessel lowpass filter with 50 Ohm source and load. + [Fact] + public void Bessel_5th_order_Lowpass_LC_Ladder_Filter_scaled_for_1_kHz_3_dB_1f8c1e045ce9a399() + { + var result = RunAcceptedExample( + "deepseek:00651_7c338735598762a2:1f8c1e045ce9a399", + """ + * Bessel 5th-order Lowpass LC Ladder Filter (scaled for 1 kHz -3 dB) + V1 in 0 DC 0 AC 1 + Rsource in n1 50 + L1 n1 n2 1.6493m + C1 n2 0 1.1383u + L2 n2 n3 3.4390m + C2 n3 0 1.1383u + L3 n3 out 1.6493m + Rload out 0 50 + .AC DEC 200 10 10k + .MEAS AC passband_gain FIND V(out) AT=10 + .MEAS AC f3dB WHEN V(out)=0.35355 + .MEAS AC f3dB_expected PARAM='1k' + .MEAS AC f3dB_error PARAM='abs(f3dB - f3dB_expected)/f3dB_expected' + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "f3dB", 950.0, 1050.0); + AssertMeasurementLess(result, "f3dB_error", 0.05); + } + + // Prompt: Create a BJT current source that is insensitive to beta variations. Use a three-transistor base current compensated mirror. Measure the output current and the reference current, verifying they are nearly equal. + [Fact] + public void Beta_insensitive_BJT_current_source_1ee0a5edb8a966b0() + { + var result = RunAcceptedExample( + "deepseek:01085_1ee0a5edb8a966b0:1ee0a5edb8a966b0", + """ + * Beta-insensitive BJT current source + * Base current compensated current mirror + VCC VCC 0 DC 12 + Rref VCC N1 11k + R1 N4 0 100 + R2 N5 0 100 + RL VCC OUT 5k + Q1 N1 N2 N4 NPN + Q2 OUT N2 N5 NPN + Q3 VCC N1 N2 NPN + .MODEL NPN NPN(BF=100 IS=1e-15) + .OP + .DC VCC 9 15 0.1 + .MEASURE DC iout_nom FIND I(RL) AT=12 + .MEASURE DC iref_nom FIND I(Rref) AT=12 + .MEASURE DC iout_min MIN I(RL) + .MEASURE DC iout_max MAX I(RL) + .MEASURE DC iref_min MIN I(Rref) + .MEASURE DC iref_max MAX I(Rref) + .END + """); + + AssertAllMeasurementsSuccessful(result); + var iout_nom = MeasurementValue(result, "iout_nom"); + var iref_nom = MeasurementValue(result, "iref_nom"); + var ratio = (iout_nom / iref_nom); + Assert.True((((ratio > 0.99)) && ((ratio < 1.01))), CaseLabel(result)); + var iout_min = MeasurementValue(result, "iout_min"); + var iout_max = MeasurementValue(result, "iout_max"); + Assert.True((((iout_min > 0.0005)) && ((iout_max < 0.002))), CaseLabel(result)); + } + + // Prompt: 10 dB balanced H-pad attenuator with 600 ohm characteristic impedance. + [Fact] + public void H_pad_attenuator_10dB_600_ohm_balanced_6efc31937798451e() + { + var result = RunAcceptedExample( + "deepseek:00462_4e22a398e5ab1a5d:6efc31937798451e", + """ + * H-pad attenuator 10dB 600 ohm balanced + R1a in+ a 155.848 + R1b 0 b 155.848 + R2 a b 421.637 + R3a a out+ 155.848 + R3b b out- 155.848 + RL out+ out- 600 + VIN in+ 0 DC 0 AC 1 + .OP + .AC DEC 10 100 10k + .MEAS AC atten_db FIND VDB(out+,out-) AT=1000 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "atten_db", (-10.2), (-9.8)); + } + + // Prompt: Diode ring modulator mixing 100 MHz RF with 90 MHz LO to produce 10 MHz IF + [Fact] + public void Diode_Ring_Modulator_Core_bd0ddc7c2275cdb8() + { + var result = RunAcceptedExample( + "deepseek:00796_d2f902e0b0800a2e:bd0ddc7c2275cdb8", + """ + * Diode Ring Modulator Core + V1 rf_in 0 SIN(0 0.1 100MEG) + E1 rf1 ct rf_in 0 0.5 + E2 rf2 ct rf_in 0 -0.5 + R1 ct 0 1k + C1 ct 0 3p + V2 lo_in 0 SIN(0 1 90MEG) + E3 lo1 0 lo_in 0 0.5 + E4 lo2 0 lo_in 0 -0.5 + D1 rf1 lo1 DMOD + D2 lo1 rf2 DMOD + D3 rf2 lo2 DMOD + D4 lo2 rf1 DMOD + .MODEL DMOD D(IS=1e-7 RS=50) + .TRAN 0.1n 2u + .MEASURE TRAN vout_pp PP V(ct) FROM=1u TO=2u + .MEASURE TRAN vrf_pp PP V(rf_in) FROM=1u TO=2u + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "vout_pp", 0.05, 0.15); + AssertMeasurementBetween(result, "vrf_pp", 0.18, 0.22); + var vout = MeasurementValue(result, "vout_pp"); + var vrf = MeasurementValue(result, "vrf_pp"); + var ratio = (vout / vrf); + Assert.True(((0.3 < ratio) && (ratio < 0.7)), CaseLabel(result)); + } + + // Prompt: Design a CMOS transmission gate sample-and-hold circuit. Use a 5V supply, a 1kHz sinusoidal input, and a 100kHz sampling clock. Measure the tracking error during the on phase and the hold error after the switch opens. + [Fact] + public void CMOS_Transmission_Gate_Sample_Hold_f019f2495d947e41() + { + var result = RunAcceptedExample( + "deepseek:01344_f019f2495d947e41:f019f2495d947e41", + """ + * CMOS Transmission Gate Sample-Hold + VDD vdd 0 DC 5 + VSIG in 0 SIN(2.5 2.5 1K) + VEN en 0 PULSE(0 5 0 1n 1n 5u 10u) + VENB enb 0 PULSE(5 0 0 1n 1n 5u 10u) + M1 in en hold 0 nmod W=10u L=1u + M2 in enb hold vdd pmod W=20u L=1u + CHOLD hold 0 100p + RLEAK hold 0 100MEG + .MODEL nmod NMOS(VTO=1 KP=100u LAMBDA=0.02) + .MODEL pmod PMOS(VTO=-1 KP=40u LAMBDA=0.02) + .tran 0.01u 200u + .measure TRAN vin_at_3u FIND v(in) AT=3u + .measure TRAN vhold_at_3u FIND v(hold) AT=3u + .measure TRAN tracking_error PARAM='abs(vhold_at_3u - vin_at_3u)' + .measure TRAN vin_at_5u FIND v(in) AT=5u + .measure TRAN vhold_at_7u FIND v(hold) AT=7u + .measure TRAN hold_error PARAM='abs(vhold_at_7u - vin_at_5u)' + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementLess(result, "tracking_error", 0.05); + AssertMeasurementLess(result, "hold_error", 0.1); + } + + // Prompt: Input sine wave offset 1V, amplitude 1V, 1kHz. + [Fact] + public void Active_Peak_Detector_with_Reset_4638d1d0a141e5ab() + { + var result = RunAcceptedExample( + "deepseek:00735_8a71948b7277e3ba:4638d1d0a141e5ab", + """ + * Active Peak Detector with Reset + VIN in 0 SIN(1 1 1k) + R1 in buf_in 1k + E1 buf_out 0 buf_in cap_node 1e5 + D1 buf_out cap_node DMOD + C1 cap_node 0 1u + Rleak cap_node 0 1MEG + M1 cap_node reset_gate 0 0 NMOD W=10000u L=10u + E2 out 0 cap_node out 1e5 + VRESET reset_gate 0 PULSE(0 5 0 1u 1u 2m 5m) + .MODEL DMOD D(IS=1e-12 RS=1) + .MODEL NMOD NMOS(VTO=1 KP=1e-3 LAMBDA=0.01) + .TRAN 1u 10m + .MEAS TRAN v_peak MAX V(out) FROM=3m TO=5m + .MEAS TRAN v_start FIND V(out) AT=4m + .MEAS TRAN v_end FIND V(out) AT=4.5m + .MEAS TRAN droop PARAM='v_start - v_end' + .MEAS TRAN reset_time TRIG V(reset_gate) VAL=2.5 RISE=2 TARG V(out) VAL=0.1 FALL=1 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "v_peak", 2.0, 0.1); + AssertMeasurementBetween(result, "droop", 0.0009, 0.0011); + AssertMeasurementLess(result, "reset_time", 0.0001); + AssertHasSuccessfulMeasurement(result, "reset_time"); + } + + // Prompt: Two-stage passive RC low-pass filter using R=10k\u03a9, C=10nF. + [Fact] + public void Two_Pole_Passive_RC_Ladder_Low_Pass_Filter_d24c09961f4d0b41() + { + var result = RunAcceptedExample( + "deepseek:00046_4861966f8f69f9e8:d24c09961f4d0b41", + """ + * Two-Pole Passive RC Ladder Low-Pass Filter + VIN in 0 AC 1 + R1 in mid 10k + C1 mid 0 10n + R2 mid out 10k + C2 out 0 10n + .AC DEC 100 1 100k + .MEAS AC cutoff_freq WHEN VDB(out)=-3 + .MEAS AC att_10k FIND VDB(out) AT=10k + .MEAS AC dc_gain FIND VDB(out) AT=1 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "cutoff_freq", 500.0, 800.0); + AssertMeasurementLess(result, "att_10k", (-25.0)); + AssertMeasurementNear(result, "dc_gain", 0.0, 0.1); + } + + // Prompt: DTL NAND gate transient truth table verification + [Fact] + public void DTL_NAND_gate_398e26a860ef2be5() + { + var result = RunAcceptedExample( + "deepseek:02460_f18563a48b499984:398e26a860ef2be5", + """ + * DTL NAND gate + VCC vcc 0 DC 5 + VINA ina 0 PULSE(0 5 1u 1n 1n 2u 4u) + VINB inb 0 PULSE(0 5 2u 1n 1n 2u 4u) + R1 vcc A 10k + D1 A ina DMOD + D2 A inb DMOD + D3 A base DMOD + RB base 0 10k + Q1 out base 0 NPNMOD + RC vcc out 1k + .MODEL DMOD D(IS=1e-12 RS=1) + .MODEL NPNMOD NPN(IS=1e-14 BF=100 BR=1) + .TRAN 0.1u 10u + .DC VINA 0 5 0.1 VINB 0 5 2.5 + .MEAS TRAN vout_low MIN V(out) FROM=2u TO=3u + .MEAS TRAN vout_high1 MAX V(out) FROM=0 TO=1u + .MEAS TRAN vout_high2 MAX V(out) FROM=3u TO=4u + .MEAS TRAN vout_high3 MAX V(out) FROM=1u TO=2u + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "vout_low", 0.0, 0.5); + AssertMeasurementBetween(result, "vout_high1", 4.0, 5.0); + AssertMeasurementBetween(result, "vout_high2", 4.0, 5.0); + AssertMeasurementBetween(result, "vout_high3", 4.0, 5.0); + } + + // Prompt: Constructs an RC pulse stretcher using a diode, resistor, and capacitor. + [Fact] + public void RC_Pulse_Stretcher_56b81a5a5ae7a9c1() + { + var result = RunAcceptedExample( + "deepseek:02364_c370f41c42d0deca:56b81a5a5ae7a9c1", + """ + * RC Pulse Stretcher + VIN in 0 PULSE(0 5 1u 10n 10n 1u 100u) + D1 in out DMOD + R1 out 0 10k + C1 out 0 10n + .MODEL DMOD D(IS=1n) + .TRAN 0.1u 200u + .MEAS TRAN vout_max MAX V(out) + .MEAS TRAN out_width TRIG V(out) VAL=2.0 RISE=1 TARG V(out) VAL=2.0 FALL=1 + .MEAS TRAN in_width TRIG V(in) VAL=2.5 RISE=1 TARG V(in) VAL=2.5 FALL=1 + .END + """); + + AssertAllMeasurementsSuccessful(result); + var vout_max = MeasurementValue(result, "vout_max"); + var out_width = MeasurementValue(result, "out_width"); + var in_width = MeasurementValue(result, "in_width"); + Assert.True(((vout_max > 3.0)), CaseLabel(result)); + Assert.True(((out_width > (2.0 * in_width))), CaseLabel(result)); + Assert.True(((out_width > (50.0 * in_width))), CaseLabel(result)); + } + + // Prompt: Two\u2011input DTL NAND gate: inputs via diodes (anodes to common node n1) to transistor base via resistor R2. + [Fact] + public void DTL_NAND_Gate_DC_Analysis_fa9596d0fd3182c1() + { + var result = RunAcceptedExample( + "deepseek:02458_3a43cda12eebc70c:fa9596d0fd3182c1", + """ + * DTL NAND Gate DC Analysis + VCC vcc 0 DC 5 + VIN1 in1 0 PULSE(0 5 10u 1n 1n 10u 20u) + VIN2 in2 0 PULSE(0 5 20u 1n 1n 20u 40u) + R1 vcc n1 10k + D1 n1 in1 DIDEAL + D2 n1 in2 DIDEAL + R2 n1 base 4.7k + Q1 out base 0 NPN1 + R3 vcc out 1k + .MODEL DIDEAL D(IS=1e-14 N=1) + .MODEL NPN1 NPN(IS=1e-15 BF=100) + .TRAN 0 40u 0 0.1u + .MEAS TRAN VOUT00 FIND V(out) AT=5u + .MEAS TRAN VOUT01 FIND V(out) AT=25u + .MEAS TRAN VOUT10 FIND V(out) AT=15u + .MEAS TRAN VOUT11 FIND V(out) AT=35u + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "VOUT00", 4.5, 5.0); + AssertMeasurementBetween(result, "VOUT01", 4.5, 5.0); + AssertMeasurementBetween(result, "VOUT10", 4.5, 5.0); + AssertMeasurementBetween(result, "VOUT11", 0.0, 0.5); + } + + // Prompt: A Zener diode (5.6 V) is reverse-biased through a resistor, creating a stable reference voltage at the cathode. + [Fact] + public void Zener_Reference_Buffered_by_Emitter_Follower_e19fd6335aea167e() + { + var result = RunAcceptedExample( + "deepseek:00850_cf3f6dc872b280e6:e19fd6335aea167e", + """ + * Zener Reference Buffered by Emitter Follower + VCC VCC 0 DC 12 + R1 VCC N001 1.2k + D1 0 N001 ZDIODE + Q1 VCC N001 OUT NPNMOD + RLOAD OUT 0 5k + .MODEL ZDIODE D(IS=1e-12 BV=5.6 IBV=0.01 RS=10) + .MODEL NPNMOD NPN(IS=1e-15 BF=100 VAF=50) + .OP + .DC VCC 0 15 0.1 + .MEAS DC Vout_12V FIND V(OUT) AT=12 + .MEAS DC Vout_10V FIND V(OUT) AT=10 + .MEAS DC line_reg PARAM '(Vout_12V-Vout_10V)/(12-10)' + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "Vout_12V", 4.8, 5.0); + AssertMeasurementBetween(result, "Vout_10V", 4.8, 5.0); + AssertMeasurementLess(result, "line_reg", 0.1); + } + + // Prompt: Diode AND gate using two diodes with anodes connected to the output node and cathodes to inputs. + [Fact] + public void Diode_AND_gate_with_pull_up_resistor_859c0477e275687a() + { + var result = RunAcceptedExample( + "deepseek:00773_a5fff70565eef1f0:859c0477e275687a", + """ + * Diode AND gate with pull-up resistor + VCC vcc 0 DC 5 + R1 vcc out 1k + D1 out in1 DMOD + D2 out in2 DMOD + .MODEL DMOD D(IS=1e-10 N=1) + VIN1 in1 0 PULSE(0 5 2u 1n 1n 2u 4u) + VIN2 in2 0 PULSE(0 5 1u 1n 1n 2u 4u) + .TRAN 0.01u 10u + .MEASURE TRAN vout_high FIND V(out) AT=2.5u + .MEASURE TRAN vout_low_in1 FIND V(out) AT=1.5u + .MEASURE TRAN vout_low_in2 FIND V(out) AT=3.5u + .MEASURE TRAN vout_both_low FIND V(out) AT=4.5u + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementGreater(result, "vout_high", 4.0); + foreach (var meas in new[] { "vout_low_in1", "vout_low_in2", "vout_both_low" }) + { + AssertMeasurementLess(result, meas, 0.5); + } + } + + // Prompt: Design a diode-connected NMOS load with a 1k resistor from a 5V supply and perform DC analysis, extracting the output voltage and supply current. + [Fact] + public void MOS_Diode_Connected_Transistor_Load_fbf0a998ce15e591() + { + var result = RunAcceptedExample( + "deepseek:01329_db772c3e7edb50f3:fbf0a998ce15e591", + """ + * MOS Diode-Connected Transistor Load + VDD VDD 0 DC 5 + R1 VDD out 1k + M1 out out 0 0 nmod W=10u L=1u + .MODEL nmod NMOS(VTO=1 KP=100u LAMBDA=0.02) + .OP + .DC VDD 0 5 0.1 + .MEAS DC Vout FIND V(out) AT=5 + .MEAS DC Idd FIND I(R1) AT=5 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "Vout", 2.5, 3.5); + AssertMeasurementBetween(result, "Idd", 0.0015, 0.0025); + } + + // Prompt: Ideal-diode ORing power multiplexer with P-channel MOSFETs and comparator controllers. + [Fact] + public void Ideal_Diode_ORing_Power_Mux_330fac13cbddf62a() + { + var result = RunAcceptedExample( + "deepseek:02010_bd39986d50fe0dc6:330fac13cbddf62a", + """ + * Ideal-Diode ORing Power Mux + V1 in1 0 DC 12 + V2 in2 0 PWL(0 11.5 1m 11.5 1.01m 13 2m 13) + Rload out 0 10 + M1 out gate1 in1 out pfet + M2 out gate2 in2 out pfet + Rg1 gate1 gate1a 1k + Rg2 gate2 gate2a 1k + Rgs1 gate1a in1 10Meg + Rgs2 gate2a in2 10Meg + E1 gate1a in1 VALUE={ -100 * V(in1,out) } + E2 gate2a in2 VALUE={ -100 * V(in2,out) } + .model pfet PMOS(VTO=-1.5 KP=1 LAMBDA=0.01) + Cgs1 gate1 in1 1nF + Cgs2 gate2 in2 1nF + .NODESET V(out)=12.0 V(in1)=12.0 V(in2)=11.5 + .tran 1u 2m + .MEAS TRAN I_V1_before AVG I(V1) FROM=0 TO=1m + .MEAS TRAN I_V2_before AVG I(V2) FROM=0 TO=1m + .MEAS TRAN I_V1_after AVG I(V1) FROM=1.5m TO=2m + .MEAS TRAN I_V2_after AVG I(V2) FROM=1.5m TO=2m + .MEAS TRAN Vout AVG V(out) FROM=1.5m TO=2m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "I_V1_before", (-1.4), (-1.0)); + AssertMeasurementBetween(result, "I_V2_before", (-0.01), 0.01); + AssertMeasurementBetween(result, "I_V1_after", (-0.01), 0.01); + AssertMeasurementBetween(result, "I_V2_after", (-1.4), (-1.0)); + AssertMeasurementBetween(result, "Vout", 12.8, 13.2); + } + + // Prompt: P-MOSFET M1 passes power with soft-start provided by Cgs (82 nF) and Rg (10 k\u03a9) forming an RC network that slowly pulls the gate low. + [Fact] + public void Hot_Swap_Inrush_Limiter_with_P_MOSFET_and_PNP_Current_Limit_676acd541f4f1be9() + { + var result = RunAcceptedExample( + "deepseek:02018_fbaf5df2fdfecc58:676acd541f4f1be9", + """ + * Hot-Swap Inrush Limiter with P-MOSFET and PNP Current Limit + V1 IN 0 PULSE(0 12 1m 1u 1u 100m 200m) + R1 IN SRC 0.1 + M1 OUT GATE SRC SRC PMOD W=1 L=1u + Cgs GATE SRC 82n + Rg GATE 0 10k + Q1 GATE SRC IN PNP_MOD + CLOAD OUT 0 100u + RLOAD OUT 0 2 + .model PMOD PMOS(VTO=-2 KP=1 LAMBDA=0.02) + .model PNP_MOD PNP(IS=1e-14 BF=100) + .tran 1u 200m + .meas tran I_INRUSH MAX I(R1) FROM=0 TO=200m + .meas tran VOUT_STEADY AVG V(OUT) FROM=50m TO=100m + .meas tran T_RISE WHEN V(OUT)=10.8 RISE=1 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "I_INRUSH", 5.0, 8.0); + AssertMeasurementBetween(result, "VOUT_STEADY", 10.0, 11.5); + AssertMeasurementBetween(result, "T_RISE", 0.001, 0.0015); + } + + // Prompt: Create a bootstrapped diode charge pump circuit that shifts a 5V supply to a higher DC voltage using a pulsed clock. + [Fact] + public void Bootstrapped_Diode_Charge_Pump_Level_Shifter_4dafb37adedbfb45() + { + var result = RunAcceptedExample( + "deepseek:00882_cace216472574587:4dafb37adedbfb45", + """ + * Bootstrapped Diode Charge Pump Level Shifter + Vcc in 0 DC 5 + Vclk clk 0 PULSE(0 5 0 10n 10n 5u 10u) + D1 in n1 dmod + D2 n1 out dmod + C1 n1 clk 1u + C2 out 0 1u + Rload out 0 10k + .model dmod D(IS=1e-14 RS=1) + .tran 0.1u 200u 0 0.1u + .meas TRAN vout_avg AVG V(out) FROM=150u TO=200u + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "vout_avg", 8.0, 9.5); + } + + // Prompt: Diode steering protection network using two diodes to clamp input voltage between VCC and ground. + [Fact] + public void Diode_input_protection_clamping_network_781de1d5b22ee77d() + { + var result = RunAcceptedExample( + "deepseek:00777_3d5febbb3dc775a2:781de1d5b22ee77d", + """ + * Diode input protection clamping network + V_supply VCC 0 DC 5V + V_pulse pulse 0 PULSE(-10 10 0 1n 1n 10u 20u) + R1 pulse in 1k + D1 in VCC dmod + D2 0 in dmod + .model dmod D(IS=1e-14, RS=1) + .tran 10n 50u + .measure TRAN vmax max V(in) from=0 to=50u + .measure TRAN vmin min V(in) from=0 to=50u + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "vmax", 5.0, 6.0); + AssertMeasurementBetween(result, "vmin", (-1.0), 0.0); + } + + // Prompt: Design a simple RC high-pass filter with a series capacitor and resistor to ground to differentiate a pulse waveform, producing spikes at the edges. + [Fact] + public void RC_Differentiating_Edge_Detector_7f65789aba1bda12() + { + var result = RunAcceptedExample( + "deepseek:00636_868a0b68dca38048:7f65789aba1bda12", + """ + * RC Differentiating Edge Detector + VIN in 0 PULSE(0 5 0 1u 1u 100u 200u) + C1 in out 10n + R1 out 0 1k + .TRAN 1u 300u + .MEASURE TRAN v_rise MAX V(out) FROM=0 TO=5u + .MEASURE TRAN v_fall MIN V(out) FROM=101u TO=106u + .MEASURE TRAN v_mid AVG V(out) FROM=50u TO=60u + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "v_rise", 4.5, 5.5); + AssertMeasurementBetween(result, "v_fall", (-5.5), (-4.5)); + AssertMeasurementBetween(result, "v_mid", (-0.1), 0.1); + } + + // Prompt: A Kelvin double bridge circuit eliminates the effect of lead resistance when measuring a small unknown resistor (Rx). + [Fact] + public void Kelvin_Double_Bridge_for_Low_Resistance_Measurement_0475e7a39b930dbf() + { + var result = RunAcceptedExample( + "deepseek:00444_09c49b2b769d015d:0475e7a39b930dbf", + """ + * Kelvin Double Bridge for Low Resistance Measurement + V_supply pwr 0 DC 1 + Rs pwr A 0.01 + R_lead A B 0.001 + Vrx_ctrl ctrl 0 DC 0 + Rx B 0 R=V(ctrl) + R1 pwr p 1000 + R2 p 0 1000 + R3 A n 1000 + R4 n B 1000 + E_det out 0 p n 1 + Rload out 0 10MEG + .DC Vrx_ctrl 0.001 0.1 0.001 + .MEASURE DC balRx WHEN V(out)=0 cross=1 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "balRx", 0.009, 0.011); + } + + // Prompt: Op-amp based averaging amplifier with four inputs + [Fact] + public void Averaging_Amplifier_with_Four_Inputs_92a3608565fb67d1() + { + var result = RunAcceptedExample( + "deepseek:01459_45e0fed669667b90:92a3608565fb67d1", + """ + * Averaging Amplifier with Four Inputs + V1 in1 0 DC 1 AC 1 + V2 in2 0 DC 2 + V3 in3 0 DC 3 + V4 in4 0 DC 4 + R1 in1 in_n 10k + R2 in2 in_n 10k + R3 in3 in_n 10k + R4 in4 in_n 10k + Rf out in_n 2.5k + Rl out 0 1k + E1 out 0 in_n 0 100k + .op + .ac dec 10 1 1MEG + .dc V1 1 1 1 + .MEAS DC Vout FIND V(out) AT=1 + .MEAS AC Vout_ac FIND V(out) AT=1k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "Vout", (-2.5), 0.1); + AssertMeasurementNear(result, "Vout_ac", (-0.25), 0.05); + } + + // Prompt: NMOS differential pair with PMOS active load biassed by 100u tail current. + [Fact] + public void MOSFET_Diff_Pair_with_Active_Load_for_Gain_Measurement_25fdaa5087425cdb() + { + var result = RunAcceptedExample( + "deepseek:00266_b47c5115cd0b8fb7:25fdaa5087425cdb", + """ + * MOSFET Diff Pair with Active Load for Gain Measurement + Vdd vdd 0 DC 5 + Vmeas_dd vdd vdd_circ 0 + Vss vss 0 DC -5 + Vmeas_ss vss_circ vss 0 + I1 tail vss_circ DC 100u + Vin in1 0 DC 0 + Vin2 in2 0 DC 0 + M1 drain1 in1 tail vss nmod W=10u L=2u + M2 out in2 tail vss nmod W=10u L=2u + M3 drain1 drain1 vdd_circ vdd_circ pmod W=100u L=2u + M4 out drain1 vdd_circ vdd_circ pmod W=100u L=2u + .MODEL nmod NMOS(VTO=1 KP=100u LAMBDA=0.02) + .MODEL pmod PMOS(VTO=-1 KP=50u LAMBDA=0.02) + .OP + .DC Vin -0.2 0.2 0.001 + .MEAS DC vout0 FIND v(out) AT=0 + .MEAS DC vout_neg FIND v(out) AT=-0.01 + .MEAS DC vout_pos FIND v(out) AT=0.01 + .MEAS DC gain PARAM='abs(vout_pos - vout_neg) / 0.02' + .MEAS DC i_tail FIND i(I1) AT=0 + .MEAS DC i_vdd FIND i(Vmeas_dd) AT=0 + .MEAS DC i_vss FIND i(Vmeas_ss) AT=0 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementGreater(result, "gain", 100.0); + AssertMeasurementBetween(result, "vout0", 3.6, 4.0); + AssertMeasurementBetween(result, "i_tail", 9e-05, 0.00011); + AssertMeasurementBetween(result, "i_vdd", 9e-05, 0.00011); + AssertMeasurementBetween(result, "i_vss", 9e-05, 0.00011); + } + + // Prompt: SEPIC converter using voltage-controlled switch and diode. + [Fact] + public void SEPIC_Converter_Simplified_Switching_Model_ac6f6fb05dc1eed0() + { + var result = RunAcceptedExample( + "deepseek:01972_5dc3fae6f79274a5:ac6f6fb05dc1eed0", + """ + * SEPIC Converter Simplified Switching Model + V1 in 0 DC 12 + L1 in sw 100u + S1 sw 0 gate 0 swmod + C2 sw 0 1n + C1 sw a 10u + L2 a 0 100u + D1 a out dmod + Cout out 0 100u + Rload out 0 10 + Vgate gate 0 PULSE(0 5 0 100n 100n 6u 10u) + .MODEL swmod SW(RON=0.1 ROFF=1MEG VT=0.5 VH=0.1) + .MODEL dmod D(IS=1n RS=0.1 CJO=10p) + .OPTIONS RELTOL=0.01 ABSTOL=1e-6 method=gear ITL4=200 + .TRAN 0.1u 5m 0 0.1u + .MEASURE TRAN Vout_avg AVG V(out) FROM=4m TO=5m + .MEASURE TRAN Vout_ripple PP V(out) FROM=4m TO=5m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "Vout_avg", 15.0, 20.0); + AssertMeasurementLess(result, "Vout_ripple", 0.5); + } + + // Prompt: Active peak detector circuit with sample-hold and buffer. + [Fact] + public void Active_Peak_Detector_with_Sample_Hold_and_Op_Amp_Buffer_43bce959de1888b6() + { + var result = RunAcceptedExample( + "deepseek:00734_12fecf531972fbcb:43bce959de1888b6", + """ + * Active Peak Detector with Sample-Hold and Op-Amp Buffer + VIN inp 0 SIN(2.5 2.5 1k) + VOS in_pos inp DC 0.005 + Rin in_pos 0 1G + E1 opamp_out 0 in_pos cap 100k + Ccomp opamp_out 0 10pF + R2 opamp_out nd_a 1k + D1 nd_a nd_c dmod + .MODEL dmod D(IS=1e-12 RS=10) + S1 nd_c cap ctrl 0 swmod + .MODEL swmod SW(RON=10 ROFF=1G VT=2 VH=0.5) + C1 cap 0 1u + R1 cap 0 100k + E2 out 0 cap out 100k + VCTRL ctrl 0 PULSE(0 5 0 1u 1u 5m 10m) + .TRAN 1u 15m 0 1u + .MEAS TRAN max_vout MAX V(out) FROM=0 TO=5m + .MEAS TRAN hold_start_vout FIND V(out) AT=5.1m + .MEAS TRAN hold_end_vout FIND V(out) AT=9.9m + .MEAS TRAN droop PARAM = (hold_start_vout - hold_end_vout) + .MEAS TRAN droop_mv PARAM = (droop*1000) + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "max_vout", 4.95, 5.05); + AssertMeasurementBetween(result, "droop_mv", 200.0, 300.0); + var hold_start = MeasurementValue(result, "hold_start_vout"); + AssertMeasurementLess(result, "hold_end_vout", hold_start); + AssertMeasurementLess(result, "hold_start_vout", MeasurementValue(result, "max_vout")); + } + + // Prompt: Make a parameterized BJT current mirror circuit using two NPN transistors. + [Fact] + public void Parameterized_BJT_current_mirror_0dbf197535035094() + { + var result = RunAcceptedExample( + "deepseek:02440_c11b9477188e0ff8:0dbf197535035094", + """ + * Parameterized BJT current mirror + .PARAM R1=10k + .PARAM V_SUP=10 + VCC VCC 0 DC {V_SUP} + V_REF VCC A 0 + R1 A C1 {R1} + Q1 C1 C1 0 NPNMOD + Q2 C2 C1 0 NPNMOD + V_LOAD VCC C2 0 + .MODEL NPNMOD NPN(IS=1e-14 BF=100 VAF=100) + .OP + .DC VCC 0 20 0.01 + .MEAS DC I_REF_10 FIND I(V_REF) AT=10 + .MEAS DC I_OUT_10 FIND I(V_LOAD) AT=10 + .MEAS DC MIRROR_RATIO PARAM='I_OUT_10 / I_REF_10' + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "I_REF_10", 0.0008, 0.0011); + AssertMeasurementBetween(result, "I_OUT_10", 0.0009, 0.0012); + AssertMeasurementBetween(result, "MIRROR_RATIO", 0.95, 1.2); + } + + // Prompt: The Howland current pump uses a single op-amp (gain 100000) with four 5 k\u03a9 resistors and a 500 \u03a9 load. + [Fact] + public void Howland_Current_Pump_corrected_35b72b0a8287d0b8() + { + var result = RunAcceptedExample( + "deepseek:01520_a3daa15bbd972b7d:35b72b0a8287d0b8", + """ + * Howland Current Pump corrected + .OP + .DC VIN -5 5 0.1 + .AC DEC 20 10 10MEG + VIN in 0 DC 1 AC 1 + R1 in out 5k + R2 out vx 5k + R3 pos vx 5k + R4 pos 0 5k + RL out 0 500 + Eopamp vx 0 pos out 100000 + .MEAS DC IOUT_1V FIND I(RL) AT=1 + .MEAS DC VOUT_1V FIND V(out) AT=1 + .MEAS AC MAX_GAIN MAX V(out) + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "IOUT_1V", 0.0002, 1e-06); + AssertMeasurementNear(result, "VOUT_1V", 0.1, 0.001); + AssertMeasurementNear(result, "MAX_GAIN", 0.1, 0.01); + } + + // Prompt: An m-derived low-pass filter L-section with a shunt series LC resonant trap to create an attenuation pole at 12.5 kHz. + [Fact] + public void m_derived_low_pass_L_section_a578c8fe77c43b39() + { + var result = RunAcceptedExample( + "deepseek:00609_41ba57b27293cae6:a578c8fe77c43b39", + """ + * m-derived low-pass L-section + V1 in 0 DC 0 AC 1 + Rs in 1 50 + Lm 1 out 477.5U + Rload out 0 50 + Ls out 3 848.5U + Cs 3 0 191N + .AC DEC 1000 100 100k + .MEAS AC f3db WHEN vdb(out) = -9 CROSS=1 + .MEAS AC attn_pole FIND vdb(out) AT=12500 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "f3db", 9000.0, 11000.0); + AssertMeasurementLess(result, "attn_pole", (-40.0)); + } + + // Prompt: Tow-Thomas biquad low-pass filter designed for a Butterworth response with a cutoff frequency of 1 kHz and unity DC gain. + [Fact] + public void Tow_Thomas_Biquad_Low_Pass_Filter_Butterworth_57df468a4c544563() + { + var result = RunAcceptedExample( + "deepseek:01703_508cafa8266d03cd:57df468a4c544563", + """ + * Tow-Thomas Biquad Low-Pass Filter (Butterworth) + VIN in 0 AC 1 DC 0 + C1 bp n1 1n + C2 out n2 1n + R1 in n1 159.155k + R2 bp n2 159.155k + R3a out n3 10k + R3b inv n3 10k + R4 bp n1 112.55k + R5 inv n1 159.155k + Rlarge out n2 1e9 + E_1 bp 0 0 n1 100000 + E_2 out 0 0 n2 100000 + E_3 inv 0 0 n3 100000 + .AC DEC 10 10 100k + .MEAS AC dc_gain MAX vdb(out) + .MEAS AC mag1k FIND vdb(out) AT=1k + .MEAS AC f3db WHEN vdb(out)=-3 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "dc_gain", 0.0, 0.1); + AssertMeasurementNear(result, "mag1k", (-3.0), 0.1); + AssertMeasurementBetween(result, "f3db", 900.0, 1100.0); + } + + // Prompt: Design a precision full-wave rectifier circuit using two operational amplifiers that outputs the absolute value of a sinusoidal input signal. Use behavioral opamp models with high gain and include a diode model for the rectifying element. + [Fact] + public void Precision_Full_Wave_Absolute_Value_Rectifier_5a7169383c3e6c41() + { + var result = RunAcceptedExample( + "deepseek:00723_2fcb271ff151c3ec:5a7169383c3e6c41", + """ + * Precision Full-Wave Absolute Value Rectifier + VIN in 0 SIN(0 1 1k 0 0) + R1 a 0 10k + E1 n2 0 in a 100k + D1 n2 a DMOD + R4 in n3 10k + R5 out n3 10k + E2 out 0 a n3 100k + .MODEL DMOD D(IS=1n RS=1) + .TRAN 0 2m 0 1u + .MEAS TRAN Vmax MAX V(out) FROM=0 TO=2m + .MEAS TRAN Vmin MIN V(out) FROM=0 TO=2m + .MEAS TRAN Vavg AVG V(out) FROM=0.5m TO=1.5m + .MEAS TRAN Vin_max MAX V(in) FROM=0 TO=2m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "Vmax", 1.0, 0.1); + AssertMeasurementNear(result, "Vmin", 0.0, 0.1); + AssertMeasurementNear(result, "Vavg", 0.636, 0.05); + AssertMeasurementNear(result, "Vin_max", 1.0, 0.1); + } + + // Prompt: PWM signal with 50% duty cycle and 20 kHz frequency + [Fact] + public void PWM_DAC_with_RC_reconstruction_filter_3bdc36f282d2d4f8() + { + var result = RunAcceptedExample( + "deepseek:02195_23f823a4c3bc299d:3bdc36f282d2d4f8", + """ + * PWM DAC with RC reconstruction filter + Vpwm pwm 0 PULSE(0 5 0 10n 10n 0.025m 0.05m) + Rfilt pwm out 5k + Cfilt out 0 1u + .TRAN 10u 25m + .MEASURE tran vout_avg AVG V(out) FROM=20m TO=25m + .MEASURE tran vripple PP V(out) FROM=20m TO=25m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "vout_avg", 2.5, 0.05); + AssertMeasurementLess(result, "vripple", 0.05); + } + + // Prompt: RC delay circuit with R=1k, C=100nF, 5V step input, and a 10M\u03a9 high\u2011impedance load. + [Fact] + public void RC_delay_network_driving_a_high_impedance_load_5eecd5736307f079() + { + var result = RunAcceptedExample( + "deepseek:00037_9cf3a84af22b98a0:5eecd5736307f079", + """ + * RC delay network driving a high impedance load + VIN in 0 PULSE(0 5 0 1p 1p 500u 1000u) + R1 in out 1k + C1 out 0 100n + RL out 0 10Meg + .TRAN 1u 500u + .MEASURE TRAN tau TRIG V(in) VAL=2.5 RISE=1 TARG V(out) VAL=3.16 RISE=1 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "tau", 0.0001, 0.1); + } + + // Prompt: NMOS cascode amplifier with common\u2011source input (M1) and cascode device (M2). + [Fact] + public void NMOS_Cascode_Gain_Stage_053f781160f26884() + { + var result = RunAcceptedExample( + "deepseek:01229_bf25977f0b3c3ed0:053f781160f26884", + """ + * NMOS Cascode Gain Stage + VDD vdd 0 DC 5 + VIN in 0 DC 2 AC 1 + M1 d1 in 0 0 nmos W=1u L=1u + M2 out gate2 d1 0 nmos W=1u L=1u + Vbias2 gate2 0 DC 3.5 + RD vdd out 10k + .model nmos NMOS(LEVEL=1 VTO=0.7 KP=200u LAMBDA=0.02) + .OP + .DC VIN 2 2 0.1 + .AC DEC 10 1k 100Meg + .MEAS DC DC_VOUT FIND v(out) AT=2 + .MEAS DC DC_IDD FIND i(RD) AT=2 + .MEAS AC AC_GAIN MAX v(out) + .MEAS AC AC_GAIN_DB MAX VDB(out) + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "DC_VOUT", 3.31, 0.5); + AssertMeasurementNear(result, "AC_GAIN_DB", 8.3, 2.0); + } + + // Prompt: The netlist implements a 555-style monostable timer using behavioral comparators, an SR latch, a switch, and RC timing. + [Fact] + public void _555_style_monostable_timer_using_behavioral_comparators_e361f53e5a7978ce() + { + var result = RunAcceptedExample( + "deepseek:01816_617489d68d062795:e361f53e5a7978ce", + """ + * 555-style monostable timer using behavioral comparators + VCC vcc 0 DC 5 + * Trigger pulse: normally high, negative pulse at 5ms + VTRIG trigger 0 PULSE(5 0 5m 10n 10n 100u 20m) + * Timing resistor and capacitor + R1 vcc cap 10k + C1 cap 0 1u IC=0 + * Behavioral comparators + E_set set 0 VALUE = { V(trigger) < V(vcc)/3 ? 5 : 0 } + E_reset reset 0 VALUE = { V(cap) > 2*V(vcc)/3 ? 5 : 0 } + * SR latch using cross-coupled NOR gates + .SUBCKT NOR2 a b out + E1 out 0 VALUE = { (V(a) > 2.5 || V(b) > 2.5) ? 0 : 5 } + .ENDS + X1 reset qbar q NOR2 + X2 set q qbar NOR2 + .IC V(q)=0 V(qbar)=5 + * Discharge switch + .MODEL SW SW(RON=10 ROFF=10MEG VT=2.5 VH=0) + S1 cap 0 qbar 0 SW + * Output buffer + E_out out 0 q 0 1 + * Analysis + .TRAN 1u 50m + * Measurements + .MEAS TRAN pulse_width TRIG V(out) VAL=2.5 RISE=1 TARG V(out) VAL=2.5 FALL=1 + .MEAS TRAN vout_max MAX V(out) + .MEAS TRAN vout_min MIN V(out) + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "pulse_width", 0.01, 0.012); + AssertMeasurementNear(result, "vout_max", 5.0, 0.1); + AssertMeasurementNear(result, "vout_min", 0.0, 0.1); + } + + // Prompt: Design a full-wave bridge rectifier to protect a circuit from reverse polarity of a 9V battery. + [Fact] + public void Bridge_diode_polarity_protector_f435acbd185fd886() + { + var result = RunAcceptedExample( + "deepseek:00788_bdfce1ff23e78a53:f435acbd185fd886", + """ + * Bridge diode polarity protector + VIN 1 2 PWL(0 9 1m 9 1.1m -9 2m -9) + D1 1 out dmod + D2 2 out dmod + D3 0 1 dmod + D4 0 2 dmod + RLOAD out 0 1k + .MODEL dmod D(IS=1e-14 RS=1) + .OP + .TRAN 0.01m 2m + .MEAS TRAN vbefore AVG V(out) FROM=0.5m TO=1m + .MEAS TRAN vafter AVG V(out) FROM=1.5m TO=2m + .MEAS TRAN vmin MIN V(out) FROM=0 TO=2m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "vbefore", 7.57, 0.5); + AssertMeasurementNear(result, "vafter", 7.57, 0.5); + AssertMeasurementGreater(result, "vmin", 0.0); + } + + // Prompt: Non-inverting op-amp amplifier with ideal op-amp model (E source) providing gain of 11. + [Fact] + public void Non_inverting_op_amp_amplifier_6ee0dac36a8c78ec() + { + var result = RunAcceptedExample( + "deepseek:00318_88a24e113d59630d:6ee0dac36a8c78ec", + """ + * Non-inverting op-amp amplifier + VIN vin 0 DC 0 AC 1 + Rg neg 0 1k + Rf out neg 10k + Eopamp out 0 vin neg 100000 + .AC DEC 10 1 1MEG + .MEAS AC gain_1k FIND V(out) AT=1k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "gain_1k", 11.0, 0.1); + } + + // Prompt: Passive fifth-order Butterworth low-pass filter implemented as a doubly-terminated LC ladder network. + [Fact] + public void Fifth_order_Butterworth_LC_lowpass_ladder_filter_10kHz_cutoff_50_Ohm_d4e4e2c94d5f9720() + { + var result = RunAcceptedExample( + "deepseek:00573_7f91e732b99f56ed:d4e4e2c94d5f9720", + """ + * Fifth-order Butterworth LC lowpass ladder filter, 10kHz cutoff, 50 Ohm + VIN in 0 DC 0 AC 1 + RS in 1 50 + L1 1 2 491.8u + C2 2 0 0.5151u + L3 2 3 1.5915m + C4 3 0 0.5151u + L5 3 out 491.8u + RL out 0 50 + .AC DEC 100 100 1e6 + .PARAM max_dc = -6.02 + .MEAS AC max_gain MAX VDB(out) + .MEAS AC f3db WHEN VDB(out)=max_dc-3 FALL=1 + .MEAS AC gain_1k FIND VDB(out) AT=1k + .MEAS AC gain_100k FIND VDB(out) AT=100k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "f3db", 9000.0, 11000.0); + AssertMeasurementBetween(result, "gain_1k", (-7.0), (-5.0)); + AssertMeasurementLess(result, "gain_100k", (-80.0)); + } + + // Prompt: This balanced diode mixer uses two diodes driven by 1 MHz RF and 10 MHz LO signals. + [Fact] + public void Balanced_diode_mixer_with_RF_and_LO_drives_7539e731862044e0() + { + var result = RunAcceptedExample( + "deepseek:00802_a86b6bd03ed77ded:7539e731862044e0", + """ + * Balanced diode mixer with RF and LO drives + V_RF src_rf 0 SIN(0 0.01 1MEG) + R_RF src_rf rf_in 50 + ERF_p rf_p if rf_in 0 0.5 + ERF_n if rf_n rf_in 0 0.5 + V_LO src_lo 0 SIN(0 1 10MEG) + R_LO src_lo lo_in 50 + ELO_p lo_p 0 lo_in 0 0.5 + ELO_n 0 lo_n lo_in 0 0.5 + D1 rf_p lo_p DMOD + D2 rf_n lo_n DMOD + .model DMOD D(IS=1e-12 RS=10) + Lf if 0 1uH + Cf if 0 300pF + .tran 1n 20u + .meas tran Vif_pp PP V(if) from=15u to=20u + .meas tran Vif_max MAX V(if) from=15u to=20u + .meas tran Vif_min MIN V(if) from=15u to=20u + .meas tran Vif_avg AVG V(if) from=15u to=20u + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "Vif_pp", 0.001, 0.1); + AssertMeasurementNear(result, "Vif_avg", 0.0, 0.01); + AssertMeasurementGreater(result, "Vif_max", 0.0); + AssertMeasurementLess(result, "Vif_min", 0.0); + } + + // Prompt: T-pad attenuator with 10 dB attenuation + [Fact] + public void T_pad_attenuator_10_dB_50_Ohm_impedance_24afcb9c1cb353f0() + { + var result = RunAcceptedExample( + "deepseek:00009_03820625769fb6e4:24afcb9c1cb353f0", + """ + * T-pad attenuator, 10 dB, 50 Ohm impedance + VIN in 0 DC 1 AC 1 + R1 in mid 25.975 + R2 mid out 25.975 + R3 mid 0 35.136 + RL out 0 50 + .DC VIN 1 1 1 + .AC DEC 10 100 1e6 + .MEAS DC vout_dc FIND V(out) AT=1 + .MEAS AC gain_db FIND vdb(out) AT=1e3 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "vout_dc", 0.3162, 0.01); + AssertMeasurementBetween(result, "gain_db", (-10.5), (-9.5)); + } + + // Prompt: A passive RC lag compensation network with series resistor and shunt capacitor. + [Fact] + public void Lag_Compensation_RC_Network_44118a75d8968998() + { + var result = RunAcceptedExample( + "deepseek:00510_ba187069c5efc141:44118a75d8968998", + """ + * Lag Compensation RC Network + VIN in 0 AC 1 DC 0 + R1 in out 10k + C1 out 0 10n + .AC DEC 10 1 1MEG + .MEAS AC gain_at_fc FIND VDB(out) AT=1592 + .MEAS AC phase_at_fc FIND VP(out) AT=1592 + .MEAS AC gain_at_1k FIND VDB(out) AT=1000 + .MEAS AC phase_at_1k FIND VP(out) AT=1000 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "gain_at_fc", (-3.0), 0.5); + AssertMeasurementNear(result, "phase_at_fc", (-0.785), 0.02); + AssertMeasurementNear(result, "gain_at_1k", (-1.44), 0.2); + AssertMeasurementLess(result, "phase_at_1k", (-0.5)); + } + + // Prompt: Simple charge pump using pulse source, diodes, and capacitors to generate a boosted DC voltage. + [Fact] + public void Simple_charge_pump_voltage_doubler_8894367b4f0458a4() + { + var result = RunAcceptedExample( + "deepseek:02338_227224b921e13f48:8894367b4f0458a4", + """ + * Simple charge pump voltage doubler + D1 0 mid dmod + D2 mid out dmod + Cfly in mid 1u + Cout out 0 10u + Rload out 0 1k + VIN in 0 PULSE(0 5.2 0 10n 10n 1u 2u) + .model dmod D(IS=1e-15 RS=1) + .TRAN 1u 20ms + .MEAS TRAN Vout_avg AVG V(out) FROM=15ms TO=20ms + .MEAS TRAN Vripple PP V(out) FROM=15ms TO=20ms + .MEAS TRAN tres WHEN V(out)=3 RISE=1 TD=0 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "Vout_avg", 3.5, 4.0); + AssertMeasurementLess(result, "Vripple", 0.1); + AssertMeasurementLess(result, "tres", 0.005); + } + + // Prompt: Design an RC snubber network placed across the terminals of an inductive load that is switched by a pulse voltage source. Simulate the transient response and verify that the voltage across the switch does not experience excessive negative undershoot. + [Fact] + public void RC_snubber_across_a_switching_load_6b7fc0237e5168e8() + { + var result = RunAcceptedExample( + "deepseek:00480_8542d9069a60a680:6b7fc0237e5168e8", + """ + * RC snubber across a switching load + V1 sw 0 PULSE(0 10 1u 10n 10n 5u 10u) + Rs sw 1 10 + L1 1 load 100uH + Rload load 0 100 + Rsnub sw snub 100 + Csnub snub 0 10nF + .TRAN 1ns 20us + .MEAS TRAN vsw_min MIN V(sw) FROM=5us TO=7us + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "vsw_min", (-0.01), 0.1); + } + + // Prompt: Beta\u2011insensitive BJT current mirror with beta\u2011helper transistor Q3. + [Fact] + public void Beta_insensitive_BJT_current_mirror_with_beta_helper_0cd2718e3827e1ca() + { + var result = RunAcceptedExample( + "deepseek:01083_15410d7dff37a442:0cd2718e3827e1ca", + """ + * Beta-insensitive BJT current mirror with beta helper + VCC VCC 0 5 + R_REF VCC N1 3.6k + Q1 N1 B 0 NPN + Q2 out B 0 NPN + Q3 VCC N1 B NPN + V_LOAD VCC out DC 0 + .MODEL NPN NPN(IS=1e-15 BF=100) + .OP + .DC VCC 4 6 0.01 + .MEAS DC I_LOAD_5 FIND I(V_LOAD) AT=5 + .MEAS DC I_REF_5 FIND I(R_REF) AT=5 + .MEAS DC RATIO_5 PARAM='I_LOAD_5/I_REF_5' + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "I_LOAD_5", 0.001019, 1e-05); + AssertMeasurementNear(result, "I_REF_5", 0.001019, 1e-05); + AssertMeasurementNear(result, "RATIO_5", 0.9998, 0.001); + } + + // Prompt: JFET common-source amplifier with self-bias, 4.7k drain resistor, and 1k source resistor + [Fact] + public void JFET_Limiter_for_Sine_wave_Stabilization_3c2ce74ea4381d74() + { + var result = RunAcceptedExample( + "deepseek:01417_b3a79b0e2c8d9aff:3c2ce74ea4381d74", + """ + * JFET Limiter for Sine-wave Stabilization + VDD VDD 0 DC 15 + VIN in 0 SIN(0 3 1k) + R_G gate 0 1MEG + C1 in gate 1n + R_S src 0 1k + C2 src 0 100u + R_D VDD out 4.7k + J1 out gate src NJF + .MODEL NJF NJF(VTO=-2.0 BETA=1m LAMBDA=0.02) + .TRAN 0.01m 20m + .MEAS TRAN Voutmax MAX V(out) FROM=10m TO=20m + .MEAS TRAN Voutmin MIN V(out) FROM=10m TO=20m + .MEAS TRAN Vpp PARAM='Voutmax - Voutmin' + .MEAS TRAN Voutpeak PARAM='(Voutmax - Voutmin)/2' + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "Voutpeak", 6.0, 8.0); + } + + // Prompt: Two\u2011stage RC low\u2011pass filter for anti\u2011aliasing with symmetrical 1 k\u03a9 resistors and 82 nF capacitors. + [Fact] + public void Multi_section_RC_low_pass_anti_alias_filter_a116632b9cdc52fa() + { + var result = RunAcceptedExample( + "deepseek:00647_03035c32d6a6a962:a116632b9cdc52fa", + """ + * Multi-section RC low-pass anti-alias filter + VIN in 0 DC 0 AC 1 + R1 in mid 1k + C1 mid 0 82n + R2 mid out 1k + C2 out 0 82n + Rload out 0 10MEG + .ac dec 10 1 1MEG + .meas ac f3db when vdb(out)=-3 + .meas ac att_1k find vdb(out) at=1k + .meas ac att_100k find vdb(out) at=100k + .meas ac mag_1m find vdb(out) at=1MEG + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "att_1k", (-6.0), (-3.0)); + AssertMeasurementLess(result, "att_100k", (-60.0)); + AssertMeasurementBetween(result, "f3db", 600.0, 800.0); + } + + // Prompt: Define a 3 V DC input source. + [Fact] + public void Simple_Charge_Pump_Voltage_Doubler_935c2d8626f74a55() + { + var result = RunAcceptedExample( + "deepseek:02341_36c48a1fbb51b717:935c2d8626f74a55", + """ + * Simple Charge Pump Voltage Doubler + VIN vcc 0 DC 3 + VCLK clk 0 PULSE(0 5 0 10n 10n 4.9u 10u) + D1 vcc n1 dm + D2 n1 out dm + Cf n1 clk 1u + Cout out 0 10u + Rload out 0 1k + .model dm D(IS=1e-12 RS=1) + .tran 0.1u 5m + .meas tran Vout_avg AVG V(out) FROM=3m TO=5m + .meas tran Vout_ripple PP V(out) FROM=3m TO=5m + .end + """); + + AssertAllMeasurementsSuccessful(result); + var vout_avg = MeasurementValue(result, "Vout_avg"); + var vout_ripple = MeasurementValue(result, "Vout_ripple"); + AssertMeasurementBetween(result, "Vout_avg", 6.5, 7.5); + AssertMeasurementLess(result, "Vout_ripple", 0.05); + } + + // Prompt: NMOS cascode current mirror with reference and output branches + [Fact] + public void NMOS_Cascode_Current_Mirror_cff188b0b8b0b2a0() + { + var result = RunAcceptedExample( + "deepseek:00276_4a65892794bd16c1:cff188b0b8b0b2a0", + """ + * NMOS Cascode Current Mirror + Vdd vdd 0 DC 5 + Vbias vbias 0 DC 3.3 + Rref vdd d_m2_d 12k + Rload vdd d_m4_d 12k + M1 n1 n1 0 0 nmosmod W=10u L=1u + M2 d_m2_d vbias n1 0 nmosmod W=10u L=1u + M3 n3 n1 0 0 nmosmod W=10u L=1u + M4 d_m4_d vbias n3 0 nmosmod W=10u L=1u + .model nmosmod NMOS(VTO=1 KP=100u LAMBDA=0.02) + .OP + .MEAS OP Iref AVG I(Rref) + .MEAS OP Iout AVG I(Rload) + .MEAS OP Vds1 AVG V(n1) + .MEAS OP Vds3 AVG V(n3) + .MEAS OP mirror_ratio PARAM='Iout/Iref' + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "Iref", 0.00015, 0.00025); + AssertMeasurementBetween(result, "Iout", 0.00015, 0.00025); + AssertMeasurementNear(result, "mirror_ratio", 1.0, 0.05); + var vds3 = MeasurementValue(result, "Vds3"); + AssertMeasurementNear(result, "Vds1", vds3, 0.1); + } + + // Prompt: CMOS differential amplifier with NMOS input pair and PMOS active current mirror load. + [Fact] + public void MOSFET_differential_pair_with_active_load_c8b7ae1faeafd0df() + { + var result = RunAcceptedExample( + "deepseek:00264_10fe89a98389258a:c8b7ae1faeafd0df", + """ + * MOSFET differential pair with active load + M1 d1 in1 src VSS NMOS W=50u L=2u + M2 out in2 src VSS NMOS W=50u L=2u + M3 d1 d1 VDD VDD PMOS W=100u L=2u + M4 out d1 VDD VDD PMOS W=100u L=2u + I_TAIL src VSS 180u + VDD VDD 0 5 + VSS VSS 0 -5 + Vin1 in1 0 DC 0 + Vin2 in2 0 DC 0 + .MODEL NMOS NMOS (VTO=1 KP=200u LAMBDA=0.5) + .MODEL PMOS PMOS (VTO=-1 KP=100u LAMBDA=0.5) + .OP + .DC Vin1 -0.1 0.1 0.01 + .MEAS DC VOUT0 FIND V(out) AT=0 + .MEAS DC VOUT1 FIND V(out) AT=0.01 + .END + """); + + AssertAllMeasurementsSuccessful(result); + var vout0 = MeasurementValue(result, "VOUT0"); + var vout1 = MeasurementValue(result, "VOUT1"); + Assert.True(((3.5 < vout0) && (vout0 < 4.5)), CaseLabel(result)); + Assert.True(((3.2 < vout1) && (vout1 < 4.3)), CaseLabel(result)); + var diff = (vout1 - vout0); + Assert.True(((0.1 < diff) && (diff < 0.5)), CaseLabel(result)); + } + + // Prompt: Three identical RC stages (6.8k, 10n) provide 180\xb0 phase shift at ~956 Hz for oscillation. + [Fact] + public void Phase_Shift_Oscillator_with_diode_limiting_and_series_resistor_296eb07378e99efc() + { + var result = RunAcceptedExample( + "deepseek:01759_f577290ec466d679:296eb07378e99efc", + """ + * Phase-Shift Oscillator with diode limiting and series resistor + R1 node1 0 6.8k + R2 node2 0 6.8k + R3 node3 0 6.8k + C1 out node1 10n + C2 node1 node2 10n + C3 node2 node3 10n + Rin node3 inv 68k + Rf out inv 10MEG + Eopamp out 0 0 inv 100000 + Rlim out n1 680k + D1 n1 inv dmod + D2 inv n1 dmod + .model dmod D(IS=1e-14 RS=10) + .IC V(node1)=0.01 + .TRAN 0.1u 20m 0 1u UIC + .OPTIONS RELTOL=1e-4 + .meas TRAN t1 WHEN V(out)=0 RISE=1 TD=10m + .meas TRAN t2 WHEN V(out)=0 RISE=2 TD=10m + .meas TRAN period PARAM t2-t1 + .meas TRAN freq PARAM 1/period + .meas TRAN maxv MAX V(out) FROM=10m TO=20m + .meas TRAN minv MIN V(out) FROM=10m TO=20m + .meas TRAN vpp PARAM maxv-minv + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "freq", 900.0, 1000.0); + AssertMeasurementBetween(result, "vpp", 0.5, 2.0); + } + + // Prompt: Simulate a three-op-amp instrumentation amplifier with a gain of 21 using behavioral op-amp models with finite bandwidth. Measure the DC output voltage and AC gain at several frequencies. + [Fact] + public void Instrumentation_Amplifier_with_three_op_amps_12633ea2a60f0209() + { + var result = RunAcceptedExample( + "deepseek:00403_067c0458c35f0b42:12633ea2a60f0209", + """ + * Instrumentation Amplifier with three op-amps + VIN1 in1 0 DC 2.5 AC 0.5 + VIN2 in2 0 DC 2.5 AC -0.5 + RG in1n in2n 1k + RF1 out1 in1n 10k + RF2 out2 in2n 10k + R3 out1 pos 10k + R4 pos 0 10k + R5 out2 neg 10k + R6 neg out 10k + X1 in1 in1n out1 OPAMP + X2 in2 in2n out2 OPAMP + X3 pos neg out OPAMP + .SUBCKT OPAMP p n o + E1 oi 0 p n 1e5 + R1 oi o 1Meg + C1 o 0 15.9nF + .ENDS + .OP + .AC dec 10 1 1Meg + .MEAS OP VOUT_DC param='v(out)' + .MEAS AC GAIN_1K find vdb(out) at=1k + .MEAS AC GAIN_10K find vdb(out) at=10k + .MEAS AC GAIN_50K find vdb(out) at=50k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "VOUT_DC", 0.0, 1e-06); + AssertMeasurementNear(result, "GAIN_1K", 26.444, 1.0); + AssertMeasurementBetween(result, "GAIN_50K", 20.0, 26.0); + } + + // Prompt: A 555-style monostable multivibrator built from behavioral voltage sources and an RC network. + [Fact] + public void _555_style_monostable_timer_using_behavioral_comparators_with_NAND_latch_15fd6279e0a26955() + { + var result = RunAcceptedExample( + "deepseek:01817_a766f76f5ab0e98e:15fd6279e0a26955", + """ + * 555-style monostable timer using behavioral comparators with NAND latch + VCC VCC 0 DC 5 + VTRIG trig 0 PULSE(5 0 1m 10n 10n 100u 50m) + R1 VCC th 10k + C1 th 0 1u + E_TRIG set 0 VALUE = { IF(V(trig) < 5/3, 0, 5) } + E_THRESH reset 0 VALUE = { IF(V(th) > 10/3, 0, 5) } + E_LATCH_Q q 0 VALUE = { IF(V(set)>2.5, IF(V(_q)>2.5, 0, 5), 5) } + E_LATCH_NQ _q 0 VALUE = { IF(V(reset)>2.5, IF(V(q)>2.5, 0, 5), 5) } + R_Q q 0 1G + R_NQ _q 0 1G + C_Q q 0 10p + C_NQ _q 0 10p + .IC V(q)=0 V(_q)=5 + E_DISCH_CTRL dctrl 0 VALUE = { IF(V(q)>2.5, 0, 5) } + S_DISCH th 0 dctrl 0 SW + .MODEL SW SW(RON=10 ROFF=10MEG VT=0.5) + E_OUT out 0 VALUE = { V(q) } + .TRAN 10u 50m + .MEAS TRAN pulse_width TRIG V(out) VAL=2.5 RISE=1 TARG V(out) VAL=2.5 FALL=1 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "pulse_width", 0.011, 0.001); + } + + // Prompt: Design a push-pull bipolar buffer using complementary NPN and PNP transistors. + [Fact] + public void Complementary_emitter_follower_buffer_3733c94530feeba9() + { + var result = RunAcceptedExample( + "deepseek:00958_da3d65f8f3f87eb0:3733c94530feeba9", + """ + * Complementary emitter follower buffer + VCC vcc 0 DC 10 + VEE vee 0 DC -10 + VIN in_raw 0 SIN(0 0.1 1k) + CIN in_raw in 10uF + R1 vcc b1 10k + D1 b1 in DMOD + D2 in b2 DMOD + R2 b2 vee 10k + Q1 vcc b1 out NPN + Q2 vee b2 out PNP + RL out 0 1k + .MODEL NPN NPN(IS=10f BF=100) + .MODEL PNP PNP(IS=10f BF=100) + .MODEL DMOD D(IS=1e-14) + .OP + .TRAN 10u 5m + .MEASURE TRAN vout_offset AVG V(out) FROM=0 TO=5m + .MEASURE TRAN vin_amp PP V(in) FROM=0 TO=5m + .MEASURE TRAN vout_amp PP V(out) FROM=0 TO=5m + .MEASURE TRAN gain PARAM='vout_amp/vin_amp' + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "gain", 1.0, 0.05); + AssertMeasurementBetween(result, "vout_offset", (-0.1), 0.1); + AssertMeasurementBetween(result, "vout_amp", 0.19, 0.21); + } + + // Prompt: Inverting Schmitt trigger with positive feedback via R1, R2 and a behavioral op-amp (E1) modeled with high gain and output limited to 0\u20135V. + [Fact] + public void Inverting_Schmitt_Trigger_with_Hysteresis_4737b55976319cf6() + { + var result = RunAcceptedExample( + "deepseek:00378_ab39a37de5bb00dc:4737b55976319cf6", + """ + * Inverting Schmitt Trigger with Hysteresis + R1 out ninv 10k + R2 ninv vref 10k + E1 out 0 VALUE={LIMIT(100k*V(ninv, in), 0, 5)} + VIN in 0 PWL(0 0, 2.5m 5, 5m 0) + VREF vref 0 DC 2.5 + .IC V(out)=5 + .tran 1u 5m + .meas TRAN vout_high MAX V(out) FROM=0 TO=5m + .meas TRAN vout_low MIN V(out) FROM=0 TO=5m + .meas TRAN vth_high FIND V(in) WHEN V(out)=2.5 FALL=1 + .meas TRAN vth_low FIND V(in) WHEN V(out)=2.5 RISE=1 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "vth_high", 3.75, 0.1); + AssertMeasurementNear(result, "vth_low", 1.25, 0.1); + AssertMeasurementGreater(result, "vout_high", 4.5); + AssertMeasurementLess(result, "vout_low", 0.5); + AssertMeasurementGreater(result, "vth_high", MeasurementValue(result, "vth_low")); + } + + // Prompt: Second-order state-variable filter with Butterworth response (Q\u22480.707) + [Fact] + public void State_Variable_Active_Filter_with_Butterworth_response_65f5fb86253afdd9() + { + var result = RunAcceptedExample( + "deepseek:01695_7c659c53a69cb44a:65f5fb86253afdd9", + """ + * State-Variable Active Filter with Butterworth response + V1 Vin 0 DC 0 AC 1 + R1 Vin sum_inv 16k + R2 LP sum_inv 16k + Rf HP sum_inv 16k + Rdiv1 BP p 16k + Rdiv2 p 0 14.3k + E1 HP 0 p sum_inv 100000 + R4 HP int1_inv 16k + C1 BP int1_inv 10n + Rd1 BP int1_inv 10MEG + E2 BP 0 0 int1_inv 100000 + R5 BP int2_inv 16k + C2 LP int2_inv 10n + Rd2 LP int2_inv 10MEG + E3 LP 0 0 int2_inv 100000 + .AC DEC 100 10 100k + .MEAS AC f_lp_3db WHEN VDB(LP)=-3 FALL=1 + .MEAS AC f_hp_3db WHEN VDB(HP)=-3 RISE=1 + .MEAS AC f_center WHEN VP(BP)=0 + .MEAS AC f_bp_low WHEN VDB(BP)=-6 RISE=1 + .MEAS AC f_bp_high WHEN VDB(BP)=-6 FALL=1 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "f_lp_3db", 995.0, 50.0); + AssertMeasurementNear(result, "f_hp_3db", 995.0, 50.0); + AssertMeasurementNear(result, "f_center", 995.0, 50.0); + AssertMeasurementBetween(result, "f_bp_low", 505.0, 525.0); + AssertMeasurementBetween(result, "f_bp_high", 1890.0, 1950.0); + } + + // Prompt: The snubber uses a 10 uF capacitor and a 100 ohm resistor in series across the inductor. + [Fact] + public void RC_snubber_across_a_switching_load_488c5e6c8e02776b() + { + var result = RunAcceptedExample( + "deepseek:00485_f36cb68a57e59cae:488c5e6c8e02776b", + """ + * RC snubber across a switching load + V1 sw 0 PULSE(0 10 0 1n 1n 100u 200u) + Rload sw mid 10k + Lload mid 0 10m + Rsnub mid a 100 + Csnub a 0 10u + .TRAN 1u 210u + .MEAS TRAN Vmax MAX V(mid) FROM=0 TO=210u + .MEAS TRAN Vmin MIN V(mid) FROM=0 TO=210u + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "Vmax", 0.0, 2.0); + AssertMeasurementGreater(result, "Vmin", (-0.1)); + } + + // Prompt: NMOS source follower linear regulator + [Fact] + public void NMOS_source_follower_linear_regulator_09cb79ae61b6741a() + { + var result = RunAcceptedExample( + "deepseek:01892_1f7aa052cbe500a4:09cb79ae61b6741a", + """ + * NMOS source-follower linear regulator + VIN in 0 DC 5 + VREF vref 0 DC 2.5 + E_OPAMP gate 0 vref fb 1e5 + R1 out fb 3.3k + R2 fb 0 10k + Iload out 0 DC 0 + M1 in gate out 0 nch W=1000u L=1u + Ccomp gate fb 10p + .MODEL nch NMOS (VTO=0.7 KP=100u LAMBDA=0.02) + .OP + .DC Iload 0 100m 1m + .MEAS DC vout_10m FIND v(out) WHEN i(Iload)=10m + .MEAS DC vout_0 FIND v(out) WHEN i(Iload)=0 + .MEAS DC vout_100m FIND v(out) WHEN i(Iload)=100m + .MEAS DC load_reg PARAM '(vout_0 - vout_100m)/vout_10m*100' + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "vout_10m", 3.325, 0.05); + AssertMeasurementLess(result, "load_reg", 2.0); + } + + // Prompt: The circuit is an op-amp averaging amplifier with four input resistors (10k) and a feedback resistor (2.5k), giving a gain of -0.25 per input. + [Fact] + public void Op_amp_averaging_amplifier_with_four_inputs_6ee0e33f89c7290c() + { + var result = RunAcceptedExample( + "deepseek:01457_f5cec2afff1f8e82:6ee0e33f89c7290c", + """ + * Op-amp averaging amplifier with four inputs + V1 in1 0 DC 1 AC 1 + V2 in2 0 DC 2 + V3 in3 0 DC 3 + V4 in4 0 DC 4 + R1 in1 inv 10k + R2 in2 inv 10k + R3 in3 inv 10k + R4 in4 inv 10k + Rf out inv 2.5k + Rload out 0 10k + E1 out 0 0 inv 100000 + .DC V1 1 1 1 + .AC DEC 10 10 1MEG + .MEAS DC vout_dc FIND V(out) AT=1 + .MEAS AC gain_mag FIND VM(out) AT=10k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "vout_dc", (-2.7), (-2.3)); + AssertMeasurementBetween(result, "gain_mag", 0.24, 0.26); + } + + // Prompt: The L-section matching network uses a series inductor L1 and shunt capacitor C1 to transform 100 ohm to 50 ohm. + [Fact] + public void L_section_matching_network_f2983e94d33af0e3() + { + var result = RunAcceptedExample( + "deepseek:00106_4b8d9ea5ee0f9c69:f2983e94d33af0e3", + """ + * L-section matching network + V1 in 0 DC 0 AC 1 + R1 in n1 50 + L1 n1 out 795.8n + C1 out 0 159.2p + R2 out 0 100 + .AC LIN 1000 1MEG 20MEG + .MEAS AC vout_dB_vout FIND vdb(out) AT=10e6 + .MEAS AC vout_dB_n1 FIND vdb(n1) AT=10e6 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "vout_dB_vout", (-3.0), 0.5); + } + + // Prompt: BJT differential amplifier with tail current source implemented using an NPN current mirror (Q3, Q4) and a reference resistor Rref. + [Fact] + public void BJT_Differential_Pair_with_Tail_Current_Mirror_1mA_tail_current_e821cdfd7812b042() + { + var result = RunAcceptedExample( + "deepseek:00193_a5af7cb2a74d58cd:e821cdfd7812b042", + """ + * BJT Differential Pair with Tail Current Mirror (1mA tail current) + VCC vcc 0 DC 10 + VEE vee 0 DC -10 + Rref vcc col3 21k + Q3 col3 col3 vee 0 QNPN + Vtail_sense ee ntail1 DC 0 + Q4 ntail1 col3 vee 0 QNPN + Rc1 vcc out1 5k + Rc2 vcc out2 5k + Q1 out1 inp ee 0 QNPN + Q2 out2 inm ee 0 QNPN + VINP inp 0 DC 0 + VINM inm 0 DC 0 + .MODEL QNPN NPN(IS=1e-14 BF=100 VAF=100) + .OP + .DC VINP -0.2 0.2 0.01 + .MEAS DC Itail FIND I(Vtail_sense) AT=0 + .MEAS DC Ic1 FIND I(Rc1) AT=0 + .MEAS DC Ic2 FIND I(Rc2) AT=0 + .MEAS DC vout0 FIND V(out2,out1) AT=0 + .MEAS DC voutp FIND V(out2,out1) AT=0.02 + .MEAS DC gain param='(voutp-vout0)/0.02' + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "Itail", 0.001, 0.0001); + AssertMeasurementNear(result, "Ic1", 0.0005, 5e-05); + AssertMeasurementNear(result, "Ic2", 0.0005, 5e-05); + AssertMeasurementRatioBetween(result, "Ic1", "Ic2", 0.9, 1.1); + AssertMeasurementBetween(result, "gain", 80.0, 120.0); + } + + // Prompt: PMOS pass transistor M1 with Miller capacitor C1 (100 nF) from gate to drain provides feedback to limit output voltage slew rate. + [Fact] + public void Hot_swap_inrush_limiter_using_PMOS_with_Miller_feedback_tuned_0c090d697c62c7c8() + { + var result = RunAcceptedExample( + "deepseek:02017_739c86520fc5e1dd:0c090d697c62c7c8", + """ + * Hot-swap inrush limiter using PMOS with Miller feedback (tuned) + Vsupply Vin 0 DC 12 + Vsense Vin S DC 0 + M1 Out G S S pmod W=10u L=1u + .model pmod PMOS(VTO=-2 KP=0.1 LEVEL=1) + Rpu S G 100k + Rss G switch_node 50k + C1 G Out 100nF IC=12V + S1 switch_node 0 nc 0 swmod + .model swmod SW(RON=1 ROFF=1MEG VT=0.5) + VCTL nc 0 PULSE(0 1 5m 1u 1u 40m 50m) + Cout Out 0 470uF IC=0 + .TRAN 0.1m 50m UIC + .MEAS TRAN peak_inrush MAX I(Vsense) FROM=0 TO=50m + .MEAS TRAN t_rise TRIG V(Out) VAL=1.2 RISE=1 TARG V(Out) VAL=10.8 RISE=1 + .OPTIONS RELTOL=1m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "peak_inrush", 0.1, 1.0); + AssertMeasurementBetween(result, "t_rise", 0.005, 0.03); + } + + // Prompt: Design a BJT class-B push-pull output stage with NPN and PNP transistors, \xb115V supplies, and a 1kHz sinusoidal input. + [Fact] + public void Class_B_push_pull_output_stage_e6842fb85b999329() + { + var result = RunAcceptedExample( + "deepseek:01099_e6842fb85b999329:e6842fb85b999329", + """ + * Class-B push-pull output stage + VCC vcc 0 DC 15 + VEE vee 0 DC -15 + VIN in 0 SIN(0 5 1k) + Q1 vcc in out_npn NPN + Re1 out_npn out 0.5 + Q2 vee in out_pnp PNP + Re2 out_pnp out 0.5 + Rload out 0 1k + .MODEL NPN NPN(IS=1e-14 BF=100 VAF=100) + .MODEL PNP PNP(IS=1e-14 BF=100 VAF=100) + .OP + .TRAN 10u 2m + .MEAS TRAN vout_avg AVG V(out) + .MEAS TRAN vout_rms RMS V(out) + .MEAS TRAN vout_max MAX V(out) + .MEAS TRAN vout_min MIN V(out) + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "vout_avg", (-0.1), 0.1); + AssertMeasurementBetween(result, "vout_rms", 2.5, 3.5); + AssertMeasurementBetween(result, "vout_max", 4.0, 5.0); + AssertMeasurementBetween(result, "vout_min", (-5.0), (-4.0)); + } + + // Prompt: Build an RC delay circuit: a resistor and capacitor in series, with the output across the capacitor. Apply a step voltage and observe the time it takes for the output to reach 50% of the input step. + [Fact] + public void RC_delay_network_driving_high_impedance_load_ffe751ea220f9f92() + { + var result = RunAcceptedExample( + "deepseek:00038_9ab8f45cc0378225:ffe751ea220f9f92", + """ + * RC delay network driving high impedance load + VIN in 0 PULSE(0 5 0 1n 1n 1m 2m) + R1 in out 10k + C1 out 0 100n + RLOAD out 0 10MEG + .TRAN 0.1u 2m + .MEAS TRAN tdelay WHEN V(out)=2.5 RISE=1 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "tdelay", 0.0006, 0.0008); + } + + // Prompt: Double-balanced CMOS switching mixer with differential LO pulse drive and small-signal differential RF input at 100 MHz, down-converting to 10 MHz. + [Fact] + public void OPTIONS_ITL4_40_RELTOL_0_01_5e79acdb9255cd7e() + { + var result = RunAcceptedExample( + "deepseek:02095_ac5f7ee4299e54f5:5e79acdb9255cd7e", + """ + .OPTIONS ITL4=40 RELTOL=0.01 + M0 src_rf vb 0 0 nmos W=50u L=1u + M1 n003 rfp src_rf 0 nmos W=50u L=0.5u + M2 n004 rfn src_rf 0 nmos W=50u L=0.5u + M3 out_p lop n003 0 nmos W=100u L=0.5u + M4 out_n lon n003 0 nmos W=100u L=0.5u + M5 out_p lon n004 0 nmos W=100u L=0.5u + M6 out_n lop n004 0 nmos W=100u L=0.5u + RD1 out_p vdd 1k + RD2 out_n vdd 1k + Ctail src_rf 0 0.1p + VDD vdd 0 DC 3.3 + Vbias_tail vb 0 DC 1.2 + V_RFP rfp 0 SIN(1.2 22m 100Meg 0 0 0) + V_RFN rfn 0 SIN(1.2 22m 100Meg 0 0 180) + V_LOP lop 0 PULSE(0 1.8 0 1n 1n 5.55555n 11.1111n) + V_LON lon 0 PULSE(1.8 0 0 1n 1n 5.55555n 11.1111n) + .MODEL nmos NMOS(VTO=0.7 KP=200u LAMBDA=0.05) + .TRAN 1n 2u 1.5u 1n + .MEASURE TRAN vout_diff_pp PP V(out_p,out_n) FROM=1.5u TO=2u + .MEASURE TRAN vout_p_avg AVG V(out_p) FROM=1.5u TO=2u + .MEASURE TRAN vout_diff_avg AVG V(out_p,out_n) FROM=1.5u TO=2u + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementCount(result, "vout_diff_pp", 1); + AssertMeasurementCount(result, "vout_p_avg", 1); + AssertMeasurementCount(result, "vout_diff_avg", 1); + AssertMeasurementBetween(result, "vout_diff_pp", 0.4, 0.6); + AssertMeasurementBetween(result, "vout_p_avg", 2.5, 2.8); + AssertMeasurementNear(result, "vout_diff_avg", 0.0, 0.1); + } + + // Prompt: Create a positive peak detector using an ideal op-amp and a diode that holds the maximum input voltage on a capacitor. + [Fact] + public void Active_Peak_Detector_with_Op_Amp_Buffer_694cb4ed2c05d02a() + { + var result = RunAcceptedExample( + "deepseek:00733_9d7dde499fe808db:694cb4ed2c05d02a", + """ + * Active Peak Detector with Op-Amp Buffer + VIN in 0 SIN(0 2 1k) + E1 op_out 0 in fb 100000 + D1 op_out fb DMOD + C1 fb 0 1uF + R1 fb 0 10k + E2 out 0 fb 0 1 + .MODEL DMOD D(IS=1e-12 RS=1 N=1) + .TRAN 0.01m 20m + .MEAS TRAN vmax MAX V(out) FROM=0 TO=20m + .MEAS TRAN vfinal FIND V(out) AT=20m + .MEAS TRAN droop PARAM='(vmax-vfinal)/vmax*100' + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "vmax", 1.95, 2.05); + AssertMeasurementBetween(result, "vfinal", 1.8, 1.95); + AssertMeasurementBetween(result, "droop", 5.0, 10.0); + } + + // Prompt: Design a difference amplifier using an ideal op-amp with gain of 10. Use R1=10k and R2=100k. Apply DC inputs V1=0.5V and V2=1V, and AC input to V2 only. Measure the DC output voltage and the AC gain at 1kHz. + [Fact] + public void Op_amp_Difference_Amplifier_8c3d1f626962e428() + { + var result = RunAcceptedExample( + "deepseek:00329_8c3d1f626962e428:8c3d1f626962e428", + """ + * Op-amp Difference Amplifier + V1 in1 0 DC 0.5 AC 0 + V2 in2 0 DC 1.0 AC 1 + R1a in1 neg 10k + R2a out neg 100k + R1b in2 pos 10k + R2b pos 0 100k + E1 out 0 pos neg 100000 + .OP + .AC DEC 10 1 1MEG + .MEAS AC VOUT_MAG FIND VM(out) AT=1k + .MEAS AC VOUT_DB FIND VDB(out) AT=1k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "VOUT_MAG", 9.0, 11.0); + AssertMeasurementBetween(result, "VOUT_DB", 19.0, 21.0); + } + + // Prompt: BJT translinear four-quadrant multiplier based on a Gilbert cell. + [Fact] + public void BJT_Translinear_Four_Quadrant_Multiplier_Gilbert_Cell_a9653186ebcb1eed() + { + var result = RunAcceptedExample( + "deepseek:02398_2da23d642de94428:a9653186ebcb1eed", + """ + * BJT Translinear Four-Quadrant Multiplier (Gilbert Cell) + VCC VCC 0 DC 10 + VEE VEE 0 DC -10 + * Input VX: differential with 2V common mode and 10mV peak each side, 1kHz + VX1 xp 0 SINE(2 0.01 1k) + VX2 xm 0 SINE(2 -0.01 1k) + * Input VY: differential with 0V common mode and 10mV peak each side, 10kHz + VY1 yp 0 SINE(0 0.01 10k) + VY2 ym 0 SINE(0 -0.01 10k) + * Tail current source + I_TAIL N001 VEE 1m + * Differential pair for Y: Q5 and Q6 + Q5 N002 yp N001 npnmod + Q6 N003 ym N001 npnmod + * Multiplier core: Q1-Q4 + Q1 A xp N002 npnmod + Q2 B xm N002 npnmod + Q3 A xm N003 npnmod + Q4 B xp N003 npnmod + * Load resistors + R1 A VCC 10k + R2 B VCC 10k + * Output differential-to-single-ended converter (gain=1) + E1 out 0 VALUE={V(A)-V(B)} + * Measurement dummy load + Rout out 0 100k + * Models + .MODEL npnmod NPN(IS=1e-15 BF=100) + * Analysis: transient for 10ms with maximum timestep 10us + .TRAN 10us 10ms 0ms 10us + * Measurements + .MEAS TRAN vout_rms RMS V(out) FROM=1ms TO=10ms + .MEAS TRAN vout_pp PP V(out) FROM=1ms TO=10ms + .MEAS TRAN vout_avg AVG V(out) FROM=1ms TO=10ms + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "vout_rms", 0.5, 1.0); + AssertMeasurementBetween(result, "vout_pp", 2.0, 4.0); + AssertMeasurementNear(result, "vout_avg", 0.0, 0.1); + } + + // Prompt: Create a SPICE netlist of an active peak detector circuit. Use a behavioral op-amp (E source) with a diode in the feedback path to charge a capacitor to the peak input voltage. Include a buffer op-amp to read the capacitor voltage. Design a piecewise linear input waveform with multiple peaks and a reset pulse to discharge the holding capacitor. Perform a transient analysis and add .MEAS statements to verify the peak holding and reset behavior. + [Fact] + public void Active_Peak_Detector_with_Op_Amp_Buffer_52f92207cdc1f462() + { + var result = RunAcceptedExample( + "deepseek:00730_52f92207cdc1f462:52f92207cdc1f462", + """ + * Active Peak Detector with Op-Amp Buffer + VIN in 0 PWL(0 0 1m 3 2m 1 3m 4 4m 2 5m 5 6m 0) + VRESET reset 0 PULSE(0 5 7m 10n 10n 0.1m 20m) + E1 op_out 0 in fb 100k + D1 op_out fb DMOD + .MODEL DMOD D(IS=1e-14 N=1) + C1 fb 0 1u + S1 fb 0 reset 0 SWMOD + .MODEL SWMOD SW(RON=1 ROFF=1G VT=2 VH=0.5) + E2 out 0 fb out 100k + RLOAD out 0 10k + .TRAN 0.01m 10m + .OPTIONS RELTOL=1m + .MEAS TRAN vout_peak1 FIND V(out) AT=1.5m + .MEAS TRAN vout_peak2 FIND V(out) AT=3.5m + .MEAS TRAN vout_peak3 FIND V(out) AT=5.5m + .MEAS TRAN vout_reset FIND V(out) AT=8m + .MEAS TRAN max_out MAX V(out) FROM=0 TO=10m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "vout_peak1", 2.9, 3.1); + AssertMeasurementBetween(result, "vout_peak2", 3.9, 4.1); + AssertMeasurementBetween(result, "vout_peak3", 4.9, 5.1); + AssertMeasurementLess(result, "vout_reset", 0.1); + AssertMeasurementGreater(result, "max_out", 4.9); + } + + // Prompt: Constant-k low-pass image-parameter filter designed with a T-section. + [Fact] + public void Constant_k_low_pass_image_parameter_filter_T_section_d8733617fff10e4f() + { + var result = RunAcceptedExample( + "deepseek:00600_20f422b96d9293a5:d8733617fff10e4f", + """ + * Constant-k low-pass image-parameter filter (T-section) + * L=10mH, C=1uF, R0=100 ohms, fc=3183 Hz + V1 in 0 AC 1 + R1 in n1 100 + L1 n1 n2 5mH + C1 n2 0 1uF + L2 n2 out 5mH + R2 out 0 100 + .AC dec 100 10 10k + .MEAS AC f3dB WHEN VDB(out)=-9.03 FALL=1 + .MEAS AC atten_6k FIND VDB(out) AT=6000 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "f3dB", 3183.0, 200.0); + AssertMeasurementLess(result, "atten_6k", (-20.0)); + } + + // Prompt: T-pad attenuator designed for 6 dB attenuation with 50 ohm characteristic impedance. + [Fact] + public void T_pad_resistive_attenuator_6_dB_Z0_50_769451ceda634792() + { + var result = RunAcceptedExample( + "deepseek:00010_03fe20ff008518d2:769451ceda634792", + """ + * T-pad resistive attenuator, 6 dB, Z0=50 + R1 in node1 16.667 + R2 node1 0 66.667 + R3 node1 out 16.667 + Rload out 0 50 + VIN in 0 DC 0 AC 1 + .AC DEC 10 10 1MEG + .MEAS AC vout_mag FIND V(out) AT=1k + .MEAS AC gain_db PARAM 20*LOG10(vout_mag) + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "gain_db", (-6.02), 0.1); + } + + // Prompt: Op-amp differentiator with series input resistor R1 to limit high\u2011frequency gain. + [Fact] + public void Differentiator_with_Input_Limit_Resistor_55e3d380ca71b08d() + { + var result = RunAcceptedExample( + "deepseek:00347_4a5fff1cae941f30:55e3d380ca71b08d", + """ + * Differentiator with Input Limit Resistor + VIN in 0 DC 0 AC 0.1 + C1 in n1 0.01uF + R1 n1 inv 100 + Rf out inv 10k + Rg inv 0 1G + E1 out 0 inv 0 100k + VCC VCC 0 DC 15 + VEE VEE 0 DC -15 + .AC DEC 10 1 100k + .MEAS AC V1K FIND VM(out) AT=1k + .MEAS AC V10K FIND VM(out) AT=10k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementRatioBetween(result, "V10K", "V1K", 9.0, 11.0); + } + + // Prompt: The circuit is a monostable multivibrator built around an ideal comparator with positive feedback and an RC timing network. + [Fact] + public void Monostable_multivibrator_using_RC_and_comparator_c78730346598d2b2() + { + var result = RunAcceptedExample( + "deepseek:00427_2aa5eefe9796f500:c78730346598d2b2", + """ + * Monostable multivibrator using RC and comparator + .OPTIONS RELTOL=1e-4 + VCC vcc 0 DC 5 + VREF ref 0 DC 2.5 + VTRIG trigger 0 PULSE(0 5 200u 10n 10n 10u 1m) + Rf out in_plus 100k + R1 in_plus ref 100k + Rtim out in_minus 10k + Rpullup vcc in_minus 10k + Ctim in_minus 0 50nF + S1 in_minus 0 trigger 0 SWMOD + .MODEL SWMOD SW(RON=10 ROFF=100MEG VT=2 VH=0.5) + EOP out 0 VALUE={min(5, max(0, 1e5*(V(in_plus, in_minus))))} + .TRAN 0.01u 2m + .MEAS TRAN trig_rise WHEN V(trigger)=2.5 RISE=1 + .MEAS TRAN pulse_width TRIG V(trigger) VAL=2.5 RISE=1 TARG V(out) VAL=2.5 FALL=1 + .MEAS TRAN v_cap_low FIND V(in_minus) AT=199u + .MEAS TRAN vout_max MAX V(out) FROM=0 TO=2m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "pulse_width", 0.0003465, 5e-05); + AssertMeasurementNear(result, "v_cap_low", 2.5, 0.1); + AssertMeasurementNear(result, "vout_max", 5.0, 0.1); + } + + // Prompt: First-order RC low-pass filter + [Fact] + public void First_order_RC_low_pass_filter_ca7a19d9d02f73ab() + { + var result = RunAcceptedExample( + "deepseek:00059_ade3a492a0b235d0:ca7a19d9d02f73ab", + """ + * First-order RC low-pass filter + VIN in 0 DC 0 AC 1 + R1 in out 1k + C1 out 0 10n + .AC DEC 10 1 100k + .MEAS AC dc_gain FIND VM(out) AT=1 + .MEAS AC gain_fc FIND VM(out) AT=15915 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "dc_gain", 1.0, 0.01); + AssertMeasurementNear(result, "gain_fc", 0.707, 0.05); + AssertMeasurementCount(result, "dc_gain", 1); + AssertMeasurementCount(result, "gain_fc", 1); + } + + // Prompt: Two-stage all-pass filter using op-amp VCVC sources with unity gain magnitude + [Fact] + public void Two_Stage_Op_Amp_All_Pass_Phase_Equalizer_4770b76827964b72() + { + var result = RunAcceptedExample( + "deepseek:01720_7329c27d14461c42:4770b76827964b72", + """ + * Two-Stage Op-Amp All-Pass Phase Equalizer + VIN in 0 DC 0 AC 1 + * Stage 1 + E1 out1 0 nplus1 inv1 100k + R1 in inv1 10k + R2 out1 inv1 10k + R3 in nplus1 10k + C1 nplus1 0 16nF + * Stage 2 + E2 out 0 nplus2 inv2 100k + R4 out1 inv2 10k + R5 out inv2 10k + R6 out1 nplus2 10k + C2 nplus2 0 16nF + * Load + RL out 0 10k + .AC DEC 10 10 100k + .MEAS AC mag_at_1kHz FIND VDB(out) AT=1k + .MEAS AC phase_at_1kHz FIND VP(out) AT=1k + .MEAS AC phase_at_10kHz FIND VP(out) AT=10k + .MEAS AC phase_at_100Hz FIND VP(out) AT=100 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "mag_at_1khz", 0.0, 0.1); + AssertMeasurementNear(result, "phase_at_1khz", 3.131, 0.035); + AssertMeasurementBetween(result, "phase_at_100hz", (-0.436), (-0.366)); + AssertMeasurementBetween(result, "phase_at_10khz", 0.349, 0.454); + } + + // Prompt: Simulate a JFET constant current source using a self-biased configuration with a 1k source resistor. Measure the drain current at a 10 V supply and verify it remains approximately constant as the supply voltage varies. + [Fact] + public void JFET_Constant_Current_Source_f4a8e9cd0aa9e1c3() + { + var result = RunAcceptedExample( + "deepseek:01412_8cdd4fd22ac3b253:f4a8e9cd0aa9e1c3", + """ + * JFET Constant Current Source + J1 out 0 src NJFET + R1 src 0 1k + V1 out 0 DC 10 + .MODEL NJFET NJF(VTO=-2 BETA=1m) + .OP + .DC V1 0 15 0.1 + .MEAS DC Id FIND I(R1) AT=10 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "Id", 0.0005, 0.0015); + } + + // Prompt: Full-wave bridge rectifier converts AC to DC using four diodes + [Fact] + public void Full_wave_bridge_rectifier_with_filter_capacitor_7bc45a5313e65890() + { + var result = RunAcceptedExample( + "deepseek:00122_167b2dfa7b4a55ca:7bc45a5313e65890", + """ + * Full-wave bridge rectifier with filter capacitor + VIN in1 in2 SIN(0 10 50 0 0) + D1 in1 out DMOD + D2 0 in1 DMOD + D3 in2 out DMOD + D4 0 in2 DMOD + C1 out 0 470uF + RL out 0 500 + .MODEL DMOD D (IS=1e-12 RS=0.1 N=1 BV=1000 IBV=1e-5 CJO=1e-11 VJ=0.75 M=0.5) + .TRAN 0.1m 200m 50m 0.1m + .OPTIONS RELTOL=1e-5 ABSTOL=1e-12 ITL4=200 + .MEAS TRAN Vout_avg AVG V(out) FROM=50m TO=200m + .MEAS TRAN Vripple PP V(out) FROM=50m TO=200m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "Vout_avg", 8.0, 9.0); + AssertMeasurementBetween(result, "Vripple", 0.2, 0.5); + } + + // Prompt: Design a passive parallel notch filter using a parallel LC circuit in series with a load resistor. Perform an AC analysis and measure the attenuation at three frequencies to verify the notch behavior. + [Fact] + public void Parallel_Resonant_Trap_Filter_a8fcf8299d6596da() + { + var result = RunAcceptedExample( + "deepseek:00546_a8fcf8299d6596da:a8fcf8299d6596da", + """ + * Parallel Resonant Trap Filter + VIN in 0 AC 1 + L1 in out 10m + C1 in out 2.53u + Rpar in out 10k + Rload out 0 1k + .AC DEC 100 10 100k + .MEASURE AC vm100 FIND VDB(out) AT=100 + .MEASURE AC vm1k FIND VDB(out) AT=1000 + .MEASURE AC vm10k FIND VDB(out) AT=10000 + .END + """); + + AssertAllMeasurementsSuccessful(result); + var vm100 = MeasurementValue(result, "vm100"); + var vm1k = MeasurementValue(result, "vm1k"); + var vm10k = MeasurementValue(result, "vm10k"); + Assert.True(((vm1k < (-15.0))), CaseLabel(result)); + Assert.True(((vm1k < vm100)), CaseLabel(result)); + Assert.True(((vm1k < vm10k)), CaseLabel(result)); + } + + // Prompt: This circuit implements an op-amp difference amplifier using an ideal voltage-controlled voltage source (E) and four resistors. + [Fact] + public void Difference_Amplifier_with_E_source_op_amp_d7316f5471f1189b() + { + var result = RunAcceptedExample( + "deepseek:00334_5e421a4e427a618f:d7316f5471f1189b", + """ + * Difference Amplifier with E-source op-amp + V1 in1 0 DC 1 AC 1 + V2 in2 0 DC 0.9 AC 0 + R1 in1 inv 1k + R2 inv out 10k + R3 in2 noninv 1k + R4 noninv 0 10k + E1 out 0 noninv inv 100k + .dc V1 1 1 1 + .ac dec 10 1 1meg + .meas DC dc_vout FIND v(out) AT=1 + .meas AC ac_gain FIND vdb(out) AT=1k + .end + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "dc_vout", (-1.0), 0.01); + AssertMeasurementNear(result, "ac_gain", 20.0, 0.1); + } + + // Prompt: Make a non-inverting op-amp amplifier with a bias resistor to ground at the non-inverting input. + [Fact] + public void Non_inverting_op_amp_amplifier_with_input_bias_resistor_64b9a57cc4c65a99() + { + var result = RunAcceptedExample( + "deepseek:01443_ef5cdc1009f733b2:64b9a57cc4c65a99", + """ + * Non-inverting op-amp amplifier with input bias resistor + VIN in 0 DC 0 AC 1 + RIN in plus 1k + RBIAS plus 0 100k + R1 minus 0 10k + Rf out minus 20k + RLOAD out 0 10k + E1 out 0 plus minus 100k + .op + .ac dec 10 1 100k + .meas AC gain FIND v(out) AT=1e3 + .end + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "gain", 3.0, 0.05); + } + + // Prompt: Inverting charge pump using two diodes and two capacitors driven by a digital 0-5V, 1MHz clock. + [Fact] + public void inverting_charge_pump_using_diodes_5a7075ad33823b78() + { + var result = RunAcceptedExample( + "deepseek:00876_1d45b9fe00740b76:5a7075ad33823b78", + """ + * inverting charge pump using diodes + VCLK clk 0 PULSE(0 5 0 10n 10n 0.5u 1u) + D1 A 0 dmod + D2 out A dmod + C1 clk A 1u + C2 out 0 10u + Rload out 0 1k + .MODEL dmod D(IS=1e-14 RS=0.1) + .TRAN 0.01u 6m + .MEAS TRAN vout_avg AVG V(out) FROM=3m TO=6m + .MEAS TRAN vout_pp PP V(out) FROM=3m TO=6m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "vout_avg", (-4.5), (-3.0)); + AssertMeasurementLess(result, "vout_pp", 0.1); + } + + // Prompt: The circuit is a biased negative diode limiter that clips negative excursions of a 5V amplitude sine wave at approximately -2V. + [Fact] + public void Biased_Negative_Diode_Limiter_d89ec70a590bf81d() + { + var result = RunAcceptedExample( + "deepseek:00756_323607a46b4bf8aa:d89ec70a590bf81d", + """ + * Biased Negative Diode Limiter + VIN in 0 SIN(0 5 1000) + R1 in out 1k + D1 bias_node out DMOD + VBIAS bias_node 0 DC -1.611 + .MODEL DMOD D(IS=1n RS=1) + .TRAN 0.01m 2m + .MEAS TRAN vmin MIN V(out) + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "vmin", (-2.0), 0.2); + } + + // Prompt: NMOS common-source amplifier with diode-connected PMOS load, biased from a 3.3 V supply. + [Fact] + public void NMOS_common_source_amplifier_with_diode_connected_PMOS_load_78d92d501b3337ab() + { + var result = RunAcceptedExample( + "deepseek:01206_1976f72974eccf5a:78d92d501b3337ab", + """ + * NMOS common-source amplifier with diode-connected PMOS load + M1 out in 0 0 nch W=10u L=1u + M2 out out vdd vdd pch W=1u L=1u + vdd vdd 0 DC 3.3 + vin in 0 DC 0.89 AC 1 + CLOAD out 0 5pF + .model nch NMOS (LEVEL=1 VTO=0.7 KP=200E-6 LAMBDA=0.02 GAMMA=0 PHI=0.7) + .model pch PMOS (LEVEL=1 VTO=-0.7 KP=80E-6 LAMBDA=0.02 GAMMA=0 PHI=0.7) + .op + .dc vin 0 1.5 0.01 + .ac dec 10 10 1G + .meas dc vout_1p0 FIND V(OUT) AT=1.0 + .meas dc vout_1p1 FIND V(OUT) AT=1.1 + .meas ac gain_db_1k FIND VDB(OUT) AT=1k + .meas ac f3db WHEN VDB(OUT)=11 CROSS=1 + .meas ac ugbw WHEN VDB(OUT)=0 CROSS=1 + .END + """); + + AssertAllMeasurementsSuccessful(result); + var vout1 = MeasurementValue(result, "vout_1p0"); + var vout2 = MeasurementValue(result, "vout_1p1"); + var dc_gain = ((vout2 - vout1) / 0.1); + Assert.True((((-6.0) <= dc_gain) && (dc_gain <= (-4.0))), CaseLabel(result)); + AssertMeasurementBetween(result, "gain_db_1k", 10.0, 18.0); + AssertMeasurementGreater(result, "f3db", 1000000.0); + AssertMeasurementGreater(result, "ugbw", 10000000.0); + } + + // Prompt: Netlist implements a CMOS NAND2 gate with NMOS and PMOS transistors using 5V supply. + [Fact] + public void CMOS_NAND2_gate_transient_response_with_load_capacitance_for_realistic_delay_b5cf8392d79f2e39() + { + var result = RunAcceptedExample( + "deepseek:00290_ab28127b550b72be:b5cf8392d79f2e39", + """ + * CMOS NAND2 gate transient response with load capacitance for realistic delay + .MODEL nmos NMOS (VTO=1 KP=100u LAMBDA=0.02) + .MODEL pmos PMOS (VTO=-1 KP=50u LAMBDA=0.02) + VDD vdd 0 DC 5 + VA A 0 PULSE(0 5 2u 1n 1n 4u 8u) + VB B 0 DC 5 + M1 Y A N1 0 nmos W=10u L=1u + M2 N1 B 0 0 nmos W=10u L=1u + M3 Y A vdd vdd pmos W=20u L=1u + M4 Y B vdd vdd pmos W=20u L=1u + CL Y 0 6pF + .TRAN 10n 20u + .MEASURE TRAN tphl_A_Y TRIG V(A) VAL=2.5 RISE=1 TARG V(Y) VAL=2.5 FALL=1 + .MEASURE TRAN tplh_A_Y TRIG V(A) VAL=2.5 FALL=1 TARG V(Y) VAL=2.5 RISE=1 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "tphl_A_Y", 1e-09, 1e-06); + AssertMeasurementBetween(result, "tplh_A_Y", 1e-09, 1e-06); + } + + // Prompt: Third-order Butterworth low-pass filter using LC ladder network with 50 ohm terminations. + [Fact] + public void Third_order_LC_Butterworth_low_pass_ladder_filter_22486b3024c42016() + { + var result = RunAcceptedExample( + "deepseek:00565_888d5662d8fa7673:22486b3024c42016", + """ + * Third-order LC Butterworth low-pass ladder filter + V1 in 0 AC 1 + R1 in 1 50 + L1 1 2 7.9577m + C1 2 0 6.366u + L2 2 out 7.9577m + Rload out 0 50 + .AC DEC 100 10 10k + .MEAS AC maxvdb MAX vdb(out) + .MEAS AC f3db WHEN vdb(out)=-9.02 FALL=1 + .MEAS AC att_2k FIND vdb(out) AT=2000 + .MEAS AC att_10k FIND vdb(out) AT=10000 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "f3db", 900.0, 1100.0); + AssertMeasurementLess(result, "att_2k", (-20.0)); + AssertMeasurementLess(result, "att_10k", (-60.0)); + } + + // Prompt: CDS frontend with offset cancellation + [Fact] + public void CDS_Front_End_with_Offset_Cancellation_ef70048d11607a22() + { + var result = RunAcceptedExample( + "deepseek:02277_9bcdbdbb0b0c37d1:ef70048d11607a22", + """ + * CDS Front End with Offset Cancellation + VIN in 0 PULSE(0.2 0.8 5u 10n 10n 4u 10u) + VPHI1 phi1 0 PULSE(0 5 0 10n 10n 5u 10u) + Cc in cright 1u + S_clamp cright 0 phi1 0 swmod + E1 out_int 0 cright 0 1 + Voff out out_int DC 0.01 + Rload out 0 10k + .MODEL swmod SW(RON=10 ROFF=100MEG VT=2 VH=0.5) + .TRAN 0.1u 10u + .MEAS TRAN vout_clamp FIND V(out) AT=4us + .MEAS TRAN vout_sig FIND V(out) AT=8us + .MEAS TRAN vdiff PARAM='vout_sig - vout_clamp' + .END + """); + + AssertMeasurementNear(result, "vout_clamp", 0.01, 0.001); + AssertMeasurementNear(result, "vout_sig", 0.61, 0.001); + AssertMeasurementNear(result, "vdiff", 0.6, 0.001); + } + + // Prompt: The circuit uses two diodes and two DC reference voltages to create asymmetric clipping thresholds. + [Fact] + public void Window_Diode_Limiter_with_Asymmetric_Thresholds_b6d2eca260ac52c2() + { + var result = RunAcceptedExample( + "deepseek:00767_ebf66ca92efdfc3b:b6d2eca260ac52c2", + """ + * Window Diode Limiter with Asymmetric Thresholds + VIN in 0 SIN(0 5 1k 0 0) + R1 in out 1k + Rload out 0 100k + VREF_HI vref_hi 0 DC 2 + R2 hi vref_hi 100 + D1 out hi DMOD + VREF_LO vref_lo 0 DC -1.4 + R3 vref_lo lo 100 + D2 lo out DMOD + .MODEL DMOD D(IS=1e-12 RS=10 N=1) + .TRAN 0.01m 20m + .MEAS TRAN Vmax MAX V(out) FROM=10m TO=20m + .MEAS TRAN Vmin MIN V(out) FROM=10m TO=20m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "Vmax", 2.6, 2.8); + AssertMeasurementBetween(result, "Vmin", (-2.3), (-2.1)); + } + + // Prompt: BJT single-transistor phase-shift oscillator using 2N3904 + [Fact] + public void BJT_Single_Transistor_Phase_Shift_Oscillator_a586f9cb11321475() + { + var result = RunAcceptedExample( + "deepseek:01122_63b155a287dbb45a:a586f9cb11321475", + """ + * BJT Single-Transistor Phase-Shift Oscillator + VCC vcc 0 DC 12 + Q1 out n3 emit 0 q2n3904 + Rc vcc out 2.7k + Re emit 0 470 + Ce emit 0 100uF + C1 out n1 8.2nF + R1 n1 0 10k + C2 n1 n2 8.2nF + R2 n2 0 10k + C3 n2 n3 8.2nF + R3 n3 0 10k + Rb vcc n3 50k + .IC V(n1)=0.1 + .MODEL q2n3904 NPN(IS=1e-14 BF=100 VAF=100 IKF=0.3 ISE=2.5e-13 NE=1.5 BR=4 NR=1 RC=2 CJE=4p CJC=1p TF=0.3n TR=0.1n) + .TRAN 10u 50m 0 10u UIC + .MEASURE TRAN period TRIG V(out) VAL=6 RISE=1 TARG V(out) VAL=6 RISE=2 + .MEASURE TRAN freq PARAM 1/period + .MEASURE TRAN vpp PP V(out) FROM=20m TO=50m + .MEASURE TRAN vrms RMS V(out) FROM=20m TO=50m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "freq", 800.0, 1100.0); + AssertMeasurementGreater(result, "vpp", 2.0); + AssertMeasurementGreater(result, "vrms", 1.0); + } + + // Prompt: Design a CMOS switching mixer with a differential local oscillator drive. + [Fact] + public void CMOS_Switching_Mixer_with_Differential_LO_Drive_917c62c74bfa97e5() + { + var result = RunAcceptedExample( + "deepseek:02089_4d5ee22f90ce529b:917c62c74bfa97e5", + """ + * CMOS Switching Mixer with Differential LO Drive + M1 d1 rf_p s1 vss nmod W=100u L=1u + M2 d2 rf_n s1 vss nmod W=100u L=1u + M3 out_p lo_p d1 vss nmod W=100u L=1u + M4 out_n lo_n d1 vss nmod W=100u L=1u + M5 out_p lo_n d2 vss nmod W=100u L=1u + M6 out_n lo_p d2 vss nmod W=100u L=1u + Rload1 out_p vdd 1k + Rload2 out_n vdd 1k + Rtail s1 vss 3.3k + VDD vdd 0 DC 5 + VSS vss 0 DC -5 + VRF1 rf_p 0 DC 0 SIN(0 0.1 10MEG) + VRF2 rf_n 0 DC 0 SIN(0 -0.1 10MEG) + VLO1 lo_p 0 PULSE(-2 2 0 1n 1n 5n 10n) + VLO2 lo_n 0 PULSE(2 -2 0 1n 1n 5n 10n) + .MODEL nmod NMOS (VTO=1 KP=100u LAMBDA=0.02) + .TRAN 1ns 2us + .MEASURE TRAN vout_pp PP V(out_p,out_n) FROM=1us TO=2us + .MEASURE TRAN vout_avg AVG V(out_p,out_n) FROM=1us TO=2us + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "vout_pp", 0.5, 2.0); + AssertMeasurementBetween(result, "vout_avg", (-0.1), 0.1); + } + + // Prompt: Two clamping diodes with independent DC bias voltages create asymmetric limiting of an input sine wave. + [Fact] + public void Window_diode_limiter_with_asymmetric_thresholds_cd4c4ec7fec8bf60() + { + var result = RunAcceptedExample( + "deepseek:00760_0470a6fa3ba511b0:cd4c4ec7fec8bf60", + """ + * Window diode limiter with asymmetric thresholds + V_IN in 0 SIN(0 5 1k) + R1 in out 1k + Rload out 0 10k + D1 out pos_node dmod + D2 neg_node out dmod + V_pos pos_node 0 DC 3 + V_neg neg_node 0 DC -2 + .MODEL dmod D(IS=1e-12 RS=1) + .TRAN 0.01ms 10ms + .MEAS TRAN max_out MAX V(out) FROM=0 TO=10m + .MEAS TRAN min_out MIN V(out) FROM=0 TO=10m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "max_out", 3.4, 4.0); + AssertMeasurementBetween(result, "min_out", (-3.0), (-2.4)); + } + + // Prompt: Asymmetric window diode limiter using two shunt diodes and DC bias sources. + [Fact] + public void Window_diode_limiter_with_asymmetric_thresholds_248c2317dcb93e82() + { + var result = RunAcceptedExample( + "deepseek:00764_573f69cb9cec6a88:248c2317dcb93e82", + """ + * Window diode limiter with asymmetric thresholds + VIN IN 0 SIN(0 5 1k) + R1 IN OUT 1k + D1 OUT VREFH DNOM + D2 VREFL OUT DNOM + VREFH VREFH 0 DC 2 + VREFL VREFL 0 DC -1 + RLOAD OUT 0 10k + .MODEL DNOM D(IS=1f RS=1) + .TRAN 1u 5m + .MEAS TRAN VMAX MAX V(OUT) FROM=0 TO=5m + .MEAS TRAN VMIN MIN V(OUT) FROM=0 TO=5m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "VMAX", 2.5, 3.0); + AssertMeasurementBetween(result, "VMIN", (-2.0), (-1.5)); + } + + // Prompt: Design an NMOS common-gate amplifier. The circuit uses a 12V supply, a 6V gate bias, and the source is biased at 4.5V DC. Use a 10k resistor load and an NMOS model with VTO=0.8V and KP=100\xb5A/V\xb2. Run DC and AC analyses, and measure the low-frequency voltage gain. + [Fact] + public void NMOS_common_gate_amplifier_760faf33b1c7718c() + { + var result = RunAcceptedExample( + "deepseek:01190_bb71322faac46ae6:760faf33b1c7718c", + """ + * NMOS common-gate amplifier + .MODEL nmod NMOS(LEVEL=1 VTO=0.8 KP=100u LAMBDA=0.02) + VDD vdd 0 DC 12 + VG gate 0 DC 6 + VSIG in 0 DC 4.5 AC 1 + M1 out gate in 0 nmod W=20u L=1u + RD out vdd 10k + .OP + .AC DEC 20 1 100MEG + .MEAS OP id PARAM='i(m1)' + .MEAS OP vgs PARAM='v(gate)-v(in)' + .MEAS OP vds PARAM='v(out)-v(in)' + .MEAS AC low_gain_mag FIND V(out) AT=1k + .MEAS AC low_gain_db FIND DB(V(out)) AT=1k + .MEAS AC phase_1k FIND VP(out) AT=1k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "low_gain_db", 20.0, 26.0); + AssertMeasurementBetween(result, "phase_1k", (-10.0), 10.0); + } + + // Prompt: 5.1V Zener diode D1 sets a reference voltage at node zref. + [Fact] + public void Zener_Reference_with_Emitter_Follower_Buffer_2447aa81ce2b4c13() + { + var result = RunAcceptedExample( + "deepseek:00852_705259da7b0eef0c:2447aa81ce2b4c13", + """ + * Zener Reference with Emitter Follower Buffer + VCC vcc 0 DC 10 + RZ vcc zref 2.2k + D1 0 zref DZ + Q1 vcc zref out NPN + RE out 0 1k + .MODEL DZ D(BV=5.1 IBV=1m RS=2) + .MODEL NPN NPN(IS=1e-14 BF=100 VAF=100) + .OP + .DC VCC 8 15 0.1 + .MEAS DC VOUT_NOM FIND V(out) AT=10 + .MEAS DC VOUT_MIN MIN V(out) + .MEAS DC VOUT_MAX MAX V(out) + .MEAS DC LINE_REG PARAM='(VOUT_MAX - VOUT_MIN)/(15-8)' + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "VOUT_NOM", 4.4, 0.2); + AssertMeasurementLess(result, "LINE_REG", 0.01); + } + + // Prompt: 3-stage Cockcroft-Walton voltage multiplier with six diodes and six capacitors + [Fact] + public void _3_stage_Cockcroft_Walton_voltage_multiplier_1e5bbf840c767433() + { + var result = RunAcceptedExample( + "deepseek:00160_e075669ba533f610:1e5bbf840c767433", + """ + * 3-stage Cockcroft-Walton voltage multiplier + VIN in 0 SIN(0 10 1k) + C1 in n1 10u + D1 0 n1 Dmod + D2 n1 n2 Dmod + C2 0 n2 10u + D3 n2 n3 Dmod + C3 in n3 10u + D4 n3 n4 Dmod + C4 0 n4 10u + D5 n4 n5 Dmod + C5 in n5 10u + D6 n5 out Dmod + C6 0 out 10u + Rload out 0 100k + .MODEL Dmod D(IS=1e-12 N=0.5 RS=0) + .TRAN 10u 10 8 10u + .OPTIONS RELTOL=0.01 + .MEAS TRAN Vout_avg AVG V(out) FROM=8 TO=10 + .MEAS TRAN Vout_ripple PP V(out) FROM=8 TO=10 + .MEAS TRAN Vout_max MAX V(out) FROM=8 TO=10 + .MEAS TRAN Vout_min MIN V(out) FROM=8 TO=10 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "Vout_avg", 60.0, 5.0); + AssertMeasurementLess(result, "Vout_ripple", 1.0); + AssertMeasurementGreater(result, "Vout_max", 57.0); + AssertMeasurementLess(result, "Vout_min", 62.0); + } + + // Prompt: Three-op-amp instrumentation amplifier with driven reference node for output offset. + [Fact] + public void Instrumentation_Amplifier_with_Driven_Reference_Node_ac08a9564ea0f57a() + { + var result = RunAcceptedExample( + "deepseek:01487_b6091ba6b9b7f398:ac08a9564ea0f57a", + """ + * Instrumentation Amplifier with Driven Reference Node + VINP inp 0 DC 0 AC 1 + VINM inm 0 DC 0 AC 1 180 + VREF ref 0 DC 2.5 AC 0 + Vpos vdd 0 DC 15 + Vneg vss 0 DC -15 + E1 out1 0 inp gn1 1e9 + E2 out2 0 inm gn2 1e9 + E3 out 0 nplus nminus 1e9 + R1 out1 gn1 10k + R2 out2 gn2 10k + Rg gn1 gn2 1k + R3 out1 nminus 10k + R4 out2 nplus 10k + R5 out nminus 10k + R6 ref nplus 10k + .OP + .DC VINP 0 0 1 + .AC DEC 10 1 1MEG + .MEAS DC VOUT_DC FIND V(out) AT=0 + .MEAS AC GainMag FIND VM(out) AT=1k + .MEAS AC GainDB FIND VDB(out) AT=1k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "VOUT_DC", 2.5, 0.01); + AssertMeasurementNear(result, "GainMag", 42.0, 0.001); + AssertMeasurementNear(result, "GainDB", 32.465, 0.05); + } + + // Prompt: Non-inverting Schmitt trigger circuit using an ideal op-amp (E source with gain 100k) and positive feedback resistors (Rin=1k, Rf=10k). + [Fact] + public void Non_inverting_Schmitt_trigger_with_behavioral_op_amp_and_diode_clamps_312cd727c09c4946() + { + var result = RunAcceptedExample( + "deepseek:01622_9f6aa838d3a0b4b5:312cd727c09c4946", + """ + * Non-inverting Schmitt trigger with behavioral op-amp and diode clamps + .model DIDEAL D (IS=1e-14 N=0.1 RS=0.1 CJO=1e-12) + Vpos vp 0 DC 5 + Vneg vn 0 DC -5 + Vin in 0 SIN(0 6 1) + Rin in ninv 1k + Rf out ninv 10k + Eopamp out_raw 0 ninv 0 100k + Rseries out_raw out 1k + D1 out vp DIDEAL + D2 vn out DIDEAL + Cout out 0 1e-12 + .IC V(out)=-5 + .TRAN 0.1m 2 0 10u UIC + .MEAS TRAN vth_rise FIND v(in) WHEN v(out)=0 RISE=1 + .MEAS TRAN vth_fall FIND v(in) WHEN v(out)=0 FALL=1 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "vth_rise", 0.5, 0.05); + AssertMeasurementNear(result, "vth_fall", (-0.5), 0.05); + } + + // Prompt: The twin\u2011T notch filter uses two T\u2011networks (R1\u2011R2\u2011C3 and C1\u2011C2\u2011R3) to create a transmission zero near 1.56 kHz. + [Fact] + public void Twin_T_Notch_Filter_AC_Analysis_e42f565298acec18() + { + var result = RunAcceptedExample( + "deepseek:00092_2290284b3b284ebc:e42f565298acec18", + """ + * Twin-T Notch Filter AC Analysis + VIN in 0 DC 0 AC 1 + R1 in mid1 1.5k + R2 mid1 out 1.5k + C3 mid1 0 136n + C1 in mid2 68n + C2 mid2 out 68n + R3 mid2 0 750 + .ac dec 100 10 100k + .meas ac notch_db min vdb(out) + .meas ac fnotch when vdb(out) = -40 cross=1 + .end + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "fnotch", 1500.0, 1600.0); + AssertMeasurementLess(result, "notch_db", (-40.0)); + } + + // Prompt: Voltage-divider biased common-emitter amplifier + [Fact] + public void Common_emitter_NPN_amplifier_with_voltage_divider_bias_and_emitter_degeneration_152f82866fce2452() + { + var result = RunAcceptedExample( + "deepseek:00172_f724f493bd25a8be:152f82866fce2452", + """ + * Common-emitter NPN amplifier with voltage-divider bias and emitter degeneration + VCC VCC 0 DC 12 + VSIG IN 0 DC 0 AC 1 SIN(0 0.01 1k) + R1 VCC BASE 82k + R2 BASE 0 12k + Q1 COLL BASE EMIT npn1 + RC VCC COLL 5k + RE EMIT 0 680 + CIN IN BASE 10uF + COUT COLL OUT 10uF + RL OUT 0 10k + .model npn1 NPN(IS=1e-14 BF=200 VAF=100) + .OP + .DC VCC 12 12 1 + .AC DEC 10 100 10Meg + .MEAS DC V_CE FIND V(COLL)-V(EMIT) AT=12 + .MEAS DC I_C FIND I(RC) AT=12 + .MEAS AC db_gain FIND DB(V(OUT)) AT=1k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "V_CE", 4.5, 6.5); + AssertMeasurementBetween(result, "I_C", 0.0008, 0.0014); + AssertMeasurementBetween(result, "db_gain", 12.0, 15.0); + } + + // Prompt: Precision full-wave rectifier uses a single op-amp and a diode bridge in negative feedback to eliminate diode drops. + [Fact] + public void RMS_to_DC_Converter_Approximation_with_Precision_Rectifier_and_Filter_c02a394feed12a1a() + { + var result = RunAcceptedExample( + "deepseek:02304_8cc8a3064559a4c2:c02a394feed12a1a", + """ + * RMS-to-DC Converter Approximation with Precision Rectifier and Filter + VIN in 0 SIN(0 1 50) + R1 in n 10k + E_opamp out_op 0 0 n 1e5 + D1 out_op p dmod + D2 m out_op dmod + D3 n p dmod + D4 m n dmod + Rload p m 10k + E_scale outdc 0 p m 1.11 + R2 outdc filt 1k + C2 filt 0 100u + .model dmod D(IS=1e-12 RS=1) + .tran 1m 500m + .MEASURE TRAN Vout_avg AVG V(filt) FROM=300ms TO=500ms + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "Vout_avg", 0.707, 0.06); + } + + // Prompt: Simulate the DC characteristics of an NMOS transistor connected as a diode with a resistive load. + [Fact] + public void MOSFET_diode_connected_load_characterization_9c844b613ea69758() + { + var result = RunAcceptedExample( + "deepseek:01331_3e658d5eb921757a:9c844b613ea69758", + """ + * MOSFET diode-connected load characterization + VDD VDD 0 DC 5 + R1 VDD D 10k + M1 D D 0 0 nmod W=10u L=1u + .MODEL nmod NMOS(VTO=1 KP=100u LAMBDA=0.02) + .OP + .DC VDD 0 5 0.1 + .MEAS DC Id_max MAX I(R1) + .MEAS DC Vd_at_100uA FIND V(D) WHEN I(R1)=100u + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "Id_max", 0.0003, 0.00035); + AssertMeasurementBetween(result, "Vd_at_100uA", 1.4, 1.5); + } + + // Prompt: Classic BJT astable multivibrator with symmetrical 4.7k\u03a9 collector resistors, 47k\u03a9 base resistors, and 22nF coupling capacitors. + [Fact] + public void Astable_Multivibrator_with_BJTs_3a363d5e372f2b2e() + { + var result = RunAcceptedExample( + "deepseek:00415_a80912d6a88d9a8b:3a363d5e372f2b2e", + """ + * Astable Multivibrator with BJTs + VCC VCC 0 DC 12 + RC1 VCC out 4.7k + RC2 VCC col2 4.7k + RB1 VCC b1 47k + RB2 VCC b2 47k + C1 out b2 22n IC=0.2 + C2 col2 b1 22n IC=11.3 + Q1 out b1 0 npn_mod + Q2 col2 b2 0 npn_mod + .MODEL npn_mod NPN(BF=100 IS=1e-14 VAF=100 CJE=5p CJC=5p) + .IC V(out)=0.2 V(col2)=12 V(b1)=0.7 V(b2)=0 + .TRAN 0.1u 5m UIC + .MEAS TRAN t1 WHEN V(out)=6 RISE=1 + .MEAS TRAN t2 WHEN V(out)=6 RISE=2 + .MEAS TRAN period PARAM t2-t1 + .MEAS TRAN freq PARAM 1/period + .MEAS TRAN vpeak_max MAX V(out) + .MEAS TRAN vpeak_min MIN V(out) + .MEAS TRAN amplitude PARAM vpeak_max - vpeak_min + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "freq", 600.0, 800.0); + AssertMeasurementBetween(result, "amplitude", 10.0, 12.0); + } + + // Prompt: Create an antilogarithmic amplifier using an operational amplifier and a diode, where the output voltage is proportional to the exponential of the input voltage. + [Fact] + public void Diode_Antilog_Converter_with_Op_Amp_Feedback_29b8b8661f14b82f() + { + var result = RunAcceptedExample( + "deepseek:00832_fec1130968d9f08c:29b8b8661f14b82f", + """ + * Diode Antilog Converter with Op-Amp Feedback + VIN in 0 DC 0 + Rf out inv 100k + D1 in inv dmod + Eopamp out 0 0 inv 1e5 + .MODEL dmod D(IS=1e-14 N=1) + .DC VIN 0 0.6 0.01 + .MEAS DC vout05 FIND V(out) AT=0.5 + .MEAS DC vout06 FIND V(out) AT=0.6 + .MEAS DC ratio PARAM=abs(vout06/vout05) + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "ratio", 40.0, 60.0); + } + + // Prompt: A 12V DC supply is switched by a voltage-controlled switch S1 with a control pulse that turns on at 0s and off at 50\xb5s. + [Fact] + public void RC_Snubber_Damping_Example_c5530e5011348c04() + { + var result = RunAcceptedExample( + "deepseek:00483_b1af76ab3c5af213:c5530e5011348c04", + """ + * RC Snubber Damping Example + Vcc vcc 0 DC 12 + Vctrl ctrl 0 PULSE(0 5 0 1u 1u 50u 200u) + S1 vcc ind_top ctrl 0 swmod + .MODEL swmod SW(RON=1 ROFF=100MEG VT=2.5 VH=0.5) + Lload ind_top out 1m + Rload out 0 100 + Csnub ind_top snb 100n + Rsnub snb out 100 + .TRAN 0.1u 200u + .MEAS TRAN Vmax MAX V(out) + .MEAS TRAN Vmin MIN V(out) + .MEAS TRAN Vovershoot PARAM Vmax - 12 + .MEAS TRAN Vundershoot PARAM 0 - Vmin + .MEAS TRAN t_rise TRIG V(out) VAL=1.2 RISE=1 TARG V(out) VAL=10.8 RISE=1 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "Vmax", 10.0, 12.5); + AssertMeasurementBetween(result, "Vmin", (-1.0), 1.0); + AssertMeasurementBetween(result, "Vundershoot", 0.0, 2.0); + AssertMeasurementLess(result, "t_rise", 5e-05); + } + + // Prompt: Diode clamp circuit protects analog input node from voltages beyond supply rails + [Fact] + public void Diode_Input_Protection_Clamp_Circuit_e748eaf363bc4bc4() + { + var result = RunAcceptedExample( + "deepseek:00782_a6e95397a2caa9b1:e748eaf363bc4bc4", + """ + * Diode Input Protection Clamp Circuit + VCC vcc 0 DC 5 + VIN in 0 PULSE(-2 7 0 10u 10u 500u 1m) + R1 in pro 1k + D1 pro vcc dmod + D2 0 pro dmod + .model dmod D(IS=1e-14 N=1 RS=0.1) + .tran 1u 1m + .meas tran vmax MAX V(pro) + .meas tran vmin MIN V(pro) + .meas tran vavg AVG V(pro) from=0 to=1m + .end + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "vmax", 5.0, 6.0); + AssertMeasurementBetween(result, "vmin", (-1.0), 0.5); + AssertMeasurementBetween(result, "vavg", 1.5, 3.5); + } + + // Prompt: The Zobel network uses Rz = Rload and Cz = L/Rload^2 to flatten the impedance. + [Fact] + public void Series_RC_Zobel_network_for_load_impedance_stabilization_05bb29ecb8dc5a9d() + { + var result = RunAcceptedExample( + "deepseek:00491_3d57b22e9612d64c:05bb29ecb8dc5a9d", + """ + * Series RC Zobel network for load impedance stabilization + V1 in 0 AC 1 + Rload in load_mid 8 + Lload load_mid 0 0.5mH + Rz in zmid 8 + Cz zmid 0 7.8uF + .ac dec 10 1 1e6 + .meas AC I_dc FIND MAG(I(V1)) AT=1 + .meas AC I_1k FIND MAG(I(V1)) AT=1000 + .meas AC I_10k FIND MAG(I(V1)) AT=10000 + .meas AC I_100k FIND MAG(I(V1)) AT=100000 + .end + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "I_dc", 0.125, 0.01); + AssertMeasurementNear(result, "I_1k", 0.125, 0.01); + AssertMeasurementNear(result, "I_10k", 0.125, 0.01); + AssertMeasurementNear(result, "I_100k", 0.125, 0.01); + } + + // Prompt: 10x compensated probe using a single-ended RC divider. + [Fact] + public void _10x_Oscilloscope_Probe_with_Compensated_RC_Attenuator_124f7284aeb6f714() + { + var result = RunAcceptedExample( + "deepseek:00664_55c5d70bed05465f:124f7284aeb6f714", + """ + * 10x Oscilloscope Probe with Compensated RC Attenuator + VIN in 0 AC 1 + R1 in mid 9MEG + C1 in mid 10p + R2 mid 0 1MEG + C2 mid 0 90p + .SAVE V(in) V(mid) + .AC DEC 10 1 1e6 + .MEASURE AC vm_low FIND VM(mid) AT=1 + .MEASURE AC vm_high FIND VM(mid) AT=1e6 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "vm_low", 0.1, 1e-06); + AssertMeasurementNear(result, "vm_high", 0.1, 1e-06); + } + + // Prompt: Wheatstone bridge with all resistors 100 \u03a9, balanced at V_TEMP=0 (2.5 V at both midpoints). + [Fact] + public void RTD_Bridge_with_Three_Op_Amp_Instrumentation_Amplifier_d1c62868b9e81338() + { + var result = RunAcceptedExample( + "deepseek:02151_ba2a8351b04dd9c1:d1c62868b9e81338", + """ + * RTD Bridge with Three-Op-Amp Instrumentation Amplifier + VCC VCC 0 DC 5 + R1 VCC LMID 100 + R2 LMID 0 100 + R3 VCC RMID 100 + V_TEMP RMID RTD_TOP DC 0 + R4 RTD_TOP 0 100 + E1 VOUT1 0 LMID NG1 100k + Rf1 VOUT1 NG1 10k + E2 VOUT2 0 RMID NG2 100k + Rf2 VOUT2 NG2 10k + Rg NG1 NG2 1k + E3 VOUT 0 NG4 NG3 100k + R11 VOUT1 NG3 10k + R12 NG3 VOUT 20k + R21 VOUT2 NG4 10k + R22 NG4 0 20k + .OP + .DC V_TEMP -10m 10m 0.1m + .MEAS DC OUT_OFFSET FIND V(VOUT) AT=0 + .MEAS DC OUT_10MV FIND V(VOUT) AT=10m + .MEAS DC GAIN PARAM = (OUT_10MV - OUT_OFFSET) / 10m + .MEAS DC GAIN_CALC PARAM = 21 + .MEAS DC GAIN_ERROR PARAM = (GAIN - GAIN_CALC) / GAIN_CALC * 100 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "GAIN", 20.5, 21.5); + AssertMeasurementNear(result, "OUT_OFFSET", 0.0, 0.02); + AssertMeasurementLess(result, "GAIN_ERROR", 2.0); + } + + // Prompt: Unity-gain difference amplifier using an ideal opamp modeled as VCVS with gain 1e5. + [Fact] + public void Opamp_subtractor_with_matched_resistor_ratios_d9274354c37d2133() + { + var result = RunAcceptedExample( + "deepseek:01467_593d2b7b8e294d1f:d9274354c37d2133", + """ + * Opamp subtractor with matched resistor ratios + V1 in1 0 DC 1.5 AC 1 + V2 in2 0 DC 2.5 AC 0 + R1 in1 neg 10k + R2 neg out 10k + R3 in2 pos 10k + R4 pos 0 10k + E1 out 0 pos neg 1e5 + .OP + .DC V1 1.5 1.5 1 + .AC DEC 10 1 1e6 + .MEAS DC VOUT_DC FIND V(out) AT=0 + .MEAS AC VOUT_1K FIND mag(V(out)) AT=1k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "VOUT_DC", 1.0, 0.05); + AssertMeasurementNear(result, "VOUT_1K", 1.0, 0.05); + } + + // Prompt: Two-transistor BJT current limiter using Q1 as pass transistor and Q2 as sense/shunt transistor. + [Fact] + public void Two_transistor_BJT_current_limiter_816f51da450b2a74() + { + var result = RunAcceptedExample( + "deepseek:01047_d37def1414fbb5a3:816f51da450b2a74", + """ + * Two-transistor BJT current limiter + Vcc vcc 0 DC 10 + Vin inp 0 DC 0 + Rb inp b1 1k + Q1 vcc b1 e1 npn + Rs e1 out 10 + Rl out 0 20 + Q2 b1 e1 out npn + .MODEL npn NPN(IS=1e-14 BF=200 VAF=100) + .DC Vin 0 5 0.05 + .OP + .MEAS DC Ilim MAX I(Rs) + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "Ilim", 0.07, 0.01); + } + + // Prompt: Complementary push-pull emitter follower with diode-connected transistors Q3 and Q4 providing bias to reduce crossover distortion. + [Fact] + public void Complementary_Emitter_Follower_Buffer_ab351227f882a593() + { + var result = RunAcceptedExample( + "deepseek:00955_3f4b6b1dc3372757:ab351227f882a593", + """ + * Complementary Emitter Follower Buffer + VCC VCC 0 12 + VEE VEE 0 -12 + Q1 VCC N1 out NPN_MOD + Q2 VEE N2 out PNP_MOD + Q3 N1 N1 mid NPN_MOD + Q4 mid mid N2 NPN_MOD + R1 VCC N1 10k + R2 N2 VEE 10k + C1 in mid 10u + RL out 0 100 + VIN in 0 SIN(0 2 1k 0 0) + .MODEL NPN_MOD NPN(IS=1e-14 BF=100 VAF=50) + .MODEL PNP_MOD PNP(IS=1e-14 BF=100 VAF=50) + .OP + .TRAN 0.1m 5m + .MEAS TRAN vout_dc AVG V(out) FROM=1m TO=5m + .MEAS TRAN vout_pp PP V(out) FROM=1m TO=5m + .MEAS TRAN vin_pp PP V(in) FROM=1m TO=5m + .MEAS TRAN gain PARAM='vout_pp/vin_pp' + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "vout_dc", 0.0, 0.05); + AssertMeasurementBetween(result, "gain", 0.95, 1.05); + } + + // Prompt: Charge pump with UP and DOWN current pulses using switches and current sources. + [Fact] + public void PLL_charge_pump_with_passive_loop_filter_22cd5d2e942b192d() + { + var result = RunAcceptedExample( + "deepseek:02115_e0154442fdbfbcbe:22cd5d2e942b192d", + """ + * PLL charge pump with passive loop filter + VDD vdd 0 DC 3 + * UP and DOWN pulse sources + VUP up 0 PULSE(0 3 10u 10n 10n 0.5u 2u) + VDN dn 0 PULSE(0 3 10.5u 10n 10n 0.5u 2u) + * Current sources + IUP vdd cp_up DC 100u + IDN cp_dn 0 DC 100u + * Switches + S1 cp_up vctrl up 0 swmod + S2 vctrl cp_dn dn 0 swmod + .model swmod SW(RON=10 ROFF=100MEG VT=2 VH=0.5) + * Loop filter: series R and C, plus small bypass capacitor + R1 vctrl vfilt 1k + C1 vfilt 0 10n + C2 vctrl 0 100p + * Initial condition on control voltage and filter node + .IC V(vctrl)=1.5 V(vfilt)=1.5 + * Transient analysis + .TRAN 0.1u 50u UIC + * Measurements + .MEAS TRAN v_avg AVG V(vctrl) FROM=20u TO=50u + .MEAS TRAN v_pp PP V(vctrl) FROM=20u TO=50u + .MEAS TRAN v_max MAX V(vctrl) FROM=10u TO=50u + .MEAS TRAN v_min MIN V(vctrl) FROM=10u TO=50u + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "v_avg", 1.5, 0.1); + AssertMeasurementLess(result, "v_pp", 0.05); + AssertMeasurementBetween(result, "v_max", 1.45, 1.55); + AssertMeasurementBetween(result, "v_min", 1.45, 1.55); + } + + // Prompt: Third-order Chebyshev low-pass filter with 0.5 dB ripple and 1 MHz cutoff, doubly terminated in 50 ohms. + [Fact] + public void Third_Order_Chebyshev_Low_Pass_Ladder_Filter_0_5dB_ripple_fc_1MHz_2f2d60a842169cd3() + { + var result = RunAcceptedExample( + "deepseek:00579_a89220fca3b42329:2f2d60a842169cd3", + """ + * Third-Order Chebyshev Low-Pass Ladder Filter (0.5dB ripple, fc=1MHz) + V1 in 0 AC 1 + Rsource in 1 50 + L1 1 2 12.7u + C2 2 0 3.49n + L3 2 out 12.7u + Rload out 0 50 + .AC DEC 200 1e4 1e7 + .MEAS AC dc_gain FIND VDB(out) AT=1e4 + .MEAS AC passband_max MAX VDB(out) FROM 1e4 TO 2e6 + .MEAS AC f3dB WHEN VDB(out)=-9 FALL=1 + .MEAS AC att3meg FIND VDB(out) AT=3e6 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "dc_gain", (-6.0), 0.5); + AssertMeasurementNear(result, "passband_max", (-6.0), 0.5); + AssertMeasurementNear(result, "f3dB", 1170000.0, 50000.0); + AssertMeasurementLess(result, "att3meg", (-20.0)); + } + + // Prompt: Positive diode clamper with 2V reference shifts input sine upward. + [Fact] + public void Positive_diode_clamper_with_2V_reference_93c73ad7333ecb91() + { + var result = RunAcceptedExample( + "deepseek:00142_1360d0e3dd75699f:93c73ad7333ecb91", + """ + * Positive diode clamper with 2V reference + VIN in 0 SIN(0 5 1k) + C1 in out 1u + D1 ref out DMOD + VREF ref 0 DC 2 + RL out 0 100k + .MODEL DMOD D(IS=1e-14 RS=1) + .TRAN 0.1u 5m 0 0.1u + .MEAS TRAN vmin MIN V(out) FROM=2m TO=5m + .MEAS TRAN vmax MAX V(out) FROM=2m TO=5m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "vmin", 1.3, 0.2); + AssertMeasurementNear(result, "vmax", 11.3, 0.2); + } + + // Prompt: Inverting op\u2011amp configuration with a DC offset (Vref = 1.5 V) on the non\u2011inverting input, giving an unclamped output of 3 V \u2013 Vin. + [Fact] + public void Precision_Positive_Clipper_with_Diode_Feedback_Corrected_c90b6dfc3fb763d7() + { + var result = RunAcceptedExample( + "deepseek:01569_c8c452ca72408bab:c90b6dfc3fb763d7", + """ + * Precision Positive Clipper with Diode Feedback (Corrected) + VIN in 0 SIN(0 5 1k) + VREF ref 0 DC 1.5 + R1 in inv 10k + R2 out_op inv 10k + D1 out_op inv DMOD + E1 out_op 0 inv ref 100000 + .MODEL DMOD D(IS=1e-14 RS=10) + .TRAN 0.01m 2m + .MEAS TRAN max_vout MAX V(out_op) FROM=0 TO=2m + .MEAS TRAN min_vout MIN V(out_op) FROM=0 TO=2m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "max_vout", 1.9, 2.5); + AssertMeasurementBetween(result, "min_vout", (-2.5), (-1.5)); + } + + // Prompt: Inverting op-amp amplifier with gain -10 using Rin=1k, Rf=10k. + [Fact] + public void Inverting_op_amp_amplifier_with_input_bias_compensation_resistor_88d2fd1a80a79748() + { + var result = RunAcceptedExample( + "deepseek:01432_a0351fc48257047e:88d2fd1a80a79748", + """ + * Inverting op-amp amplifier with input bias compensation resistor + VIN in 0 DC 0 AC 1 + RIN in inv 1k + RF out inv 10k + RCOMP ninv 0 910 + E1 out 0 ninv inv 100000 + I1 0 inv 100nA + I2 0 ninv 100nA + .DC VIN 0 0 1 + .AC DEC 10 1 1MEG + .MEAS DC vout_os FIND v(out) AT=0 + .MEAS AC gain_db FIND vdb(out) AT=1k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "vout_os", 0.0, 1e-06); + AssertMeasurementNear(result, "gain_db", 20.0, 0.1); + } + + // Prompt: CMOS differential pair with source degeneration resistors, biased by a 200uA tail current and a 5V supply. + [Fact] + public void CMOS_Differential_Pair_with_Source_Degeneration_401d2991483a9b39() + { + var result = RunAcceptedExample( + "deepseek:01274_7216b14abe706f4a:401d2991483a9b39", + """ + * CMOS Differential Pair with Source Degeneration + M1 out_p inp s1 0 nmos W=50u L=1u + M2 out_n inn s2 0 nmos W=50u L=1u + Rd1 vdd out_p 10k + Rd2 vdd out_n 10k + Rs1 s1 tail 400 + Rs2 s2 tail 400 + Ibias tail 0 DC 200u + Vdd vdd 0 DC 5 + Vin_p inp 0 DC 2.5 AC 1 + Vin_n inn 0 DC 2.5 AC 0 + .model nmos nmos (level=1 vto=1 kp=100u lambda=0.05) + .op + .dc Vin_p 0 5 0.01 + .ac dec 10 1 100meg + .meas dc vout_p find v(out_p) when v(inp)=2.5 + .meas dc vout_n find v(out_n) when v(inp)=2.5 + .meas dc vos param='vout_p - vout_n' + .meas ac gain_lf find vdb(out_p) at=1 + .meas ac gain_hf find vdb(out_p) at=100k + .END + """); + + AssertAllMeasurementsSuccessful(result); + var vos = MeasurementValue(result, "vos"); + Assert.True(((Math.Abs(vos) < 0.001)), CaseLabel(result)); + var gain_lf = MeasurementValue(result, "gain_lf"); + Assert.True(((9.0 < gain_lf) && (gain_lf < 14.0)), CaseLabel(result)); + var gain_hf = MeasurementValue(result, "gain_hf"); + Assert.True(((gain_hf > 8.0)), CaseLabel(result)); + } + + // Prompt: 3-bit R-2R DAC with op-amp buffer in inverting configuration + [Fact] + public void _3_bit_R_2R_ladder_DAC_with_op_amp_buffer_8858c0d450ffc817() + { + var result = RunAcceptedExample( + "deepseek:02178_77d98338d3a153a8:8858c0d450ffc817", + """ + * 3-bit R-2R ladder DAC with op-amp buffer + Vref ref 0 DC 0 + E_B2 B2 0 ref 0 1 + V_B1 B1 0 DC 0 + E_B0 B0 0 ref 0 1 + Rf out S 10k + R_B2 B2 S 20k + R1 S N1 10k + R_B1 B1 N1 20k + R2 N1 N2 10k + R_B0 B0 N2 20k + Rterm N2 0 20k + Eopamp out 0 VALUE={LIMIT(-1e5*V(S,0), -15, 15)} + .OP + .DC Vref 0 5 0.1 + .MEAS DC vout_max FIND V(out) AT=5 + .MEAS DC vout_half FIND V(out) AT=2.5 + .MEAS DC vout_ratio PARAM vout_half/vout_max + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "vout_max", (-3.125), 0.001); + AssertMeasurementNear(result, "vout_half", (-1.5625), 0.001); + AssertMeasurementNear(result, "vout_ratio", 0.5, 0.0001); + } + + // Prompt: Fifth-order Butterworth LC ladder low-pass filter + [Fact] + public void Fifth_order_Butterworth_LC_ladder_low_pass_filter_58407c5cf5a60c9c() + { + var result = RunAcceptedExample( + "deepseek:00568_10938c3397ca38b8:58407c5cf5a60c9c", + """ + * Fifth-order Butterworth LC ladder low-pass filter + VIN in 0 AC 1 + RS in 1 50 + L1 1 2 4.917mH + C2 2 0 5.15uF + L3 2 3 15.92mH + C4 3 0 5.15uF + L5 3 out 4.917mH + RL out 0 50 + .AC DEC 100 10 100k + .MEAS AC maxgain MAX VDB(out) + .MEAS AC f3db WHEN VDB(out) = -9 fall=1 + .MEAS AC fstop FIND VDB(out) AT=10k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "f3db", 1000.0, 50.0); + AssertMeasurementNear(result, "maxgain", (-6.0), 0.5); + AssertMeasurementNear(result, "fstop", (-106.0), 2.0); + } + + // Prompt: Passive RLC band-stop notch filter with center frequency near 1.07 kHz. + [Fact] + public void RLC_Notch_Filter_Passive_Band_Stop_2bc0d19796ff4342() + { + var result = RunAcceptedExample( + "deepseek:00086_5f054a2c01743108:2bc0d19796ff4342", + """ + * RLC Notch Filter - Passive Band-Stop + V1 in 0 AC 1 + R1 in out 1k + L1 out n1 100m + C1 n1 0 0.22u + .AC DEC 100 10 100k + .MEAS AC mag_low FIND VDB(out) AT=100 + .MEAS AC mag_notch FIND VDB(out) AT=1073 + .MEAS AC mag_high FIND VDB(out) AT=10k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "mag_low", (-1.0), 1.0); + AssertMeasurementLess(result, "mag_notch", (-30.0)); + AssertMeasurementBetween(result, "mag_high", (-1.0), 1.0); + } + + // Prompt: Wien-bridge oscillator circuit using a behavioral op-amp with high gain (100000). + [Fact] + public void Wien_bridge_sine_wave_oscillator_with_behavioral_op_amp_and_diode_amplitude_stabilization_2d8b33b6549e9de6() + { + var result = RunAcceptedExample( + "deepseek:00386_99f59166998e3e82:2d8b33b6549e9de6", + """ + * Wien-bridge sine-wave oscillator with behavioral op-amp and diode amplitude stabilization + E_OPAMP out 0 pos neg 100000 + R_SER out n_ser 10k + C_SER n_ser pos 15.9n + R_PAR pos 0 10k + C_PAR pos 0 15.9n + R_FB out neg 22k + R_G neg 0 10k + D1 out neg DMOD + D2 neg out DMOD + .MODEL DMOD D(IS=1e-16 RS=1 CJO=5p) + .IC V(pos)=1m + .TRAN 1u 30m 0 1u + .MEAS TRAN t10 TRIG v(out) val=0 rise=10 TARG v(out) val=0 rise=20 + .MEAS TRAN period PARAM t10/10 + .MEAS TRAN freq PARAM 1/period + .MEAS TRAN vpp PP v(out) FROM=20m TO=30m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "freq", 1000.0, 100.0); + AssertMeasurementBetween(result, "vpp", 1.5, 2.5); + } + + // Prompt: Constant\u2011current battery charger using an op\u2011amp and a PNP transistor. + [Fact] + public void CC_Battery_Charger_with_Op_Amp_9c870e34a2ededf0() + { + var result = RunAcceptedExample( + "deepseek:01923_9dc68657b689d05c:9c870e34a2ededf0", + """ + * CC Battery Charger with Op-Amp + VSUP vsupp 0 DC 12 + VREF ref 0 DC 1 + VBAT bpos bneg DC 0 + RSENSE bneg 0 1 + Q1 bpos base vsupp PNPMOD + .MODEL PNPMOD PNP(IS=1e-14 BF=200) + E1 base 0 bneg ref 1e5 + .OP + .DC VBAT 0 8 0.1 + .MEAS DC I_AT_4V FIND I(VBAT) AT=4 + .MEAS DC I_MIN MIN I(VBAT) FROM=0 TO=8 + .MEAS DC I_MAX MAX I(VBAT) FROM=0 TO=8 + .MEAS DC I_VARIATION PP I(VBAT) FROM=0 TO=8 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "I_AT_4V", 1.0, 0.1); + AssertMeasurementLess(result, "I_VARIATION", 0.1); + AssertMeasurementBetween(result, "I_MIN", 0.9, 1.1); + AssertMeasurementBetween(result, "I_MAX", 0.9, 1.1); + } + + // Prompt: m-derived low-pass T-section filter with m=0.6, fc=1kHz, R0=600 ohms + [Fact] + public void M_derived_low_pass_filter_section_c66de5e672f73226() + { + var result = RunAcceptedExample( + "deepseek:00611_5521940b769479b9:c66de5e672f73226", + """ + * M-derived low-pass filter section + .AC DEC 200 1 10k + VIN in 0 AC 1 + RGEN in 1 600 + L1 1 2 57.3e-3 + L2 2 3 50.93e-3 + C2 3 0 318.3e-9 + L3 2 out 57.3e-3 + RLOAD out 0 600 + .MEASURE AC f3db WHEN VDB(out)=-9 FALL=1 + .MEASURE AC outdb_fc FIND VDB(out) AT=1000 + .MEASURE AC outdb_pole FIND VDB(out) AT=1250 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "f3db", 900.0, 1100.0); + AssertMeasurementBetween(result, "outdb_fc", (-12.5), (-11.0)); + AssertMeasurementLess(result, "outdb_pole", (-30.0)); + } + + // Prompt: Design a capacitance multiplier using E-source op-amps that multiplies a 1nF capacitor to an effective 11nF. Use a buffer and an inverting amplifier. Verify with transient and AC analyses. + [Fact] + public void Capacitance_Multiplier_b159567765b770a0() + { + var result = RunAcceptedExample( + "deepseek:01566_e6e2da8ffb50f112:b159567765b770a0", + """ + * Capacitance Multiplier + RS in_s Vin 1k + C1 Vin inv_out 1n + Rin buf_out inv_in 1k + Rf inv_out inv_in 10k + E_buf buf_out 0 Vin buf_out 100000 + E_inv inv_out 0 0 inv_in 100000 + V1 in_s 0 DC 0 AC 1 PULSE(0 1 10u 1n 1n 1m 2m) + .TRAN 1u 2m UIC + .AC DEC 10 10 100k + .MEAS TRAN tau_scale TRIG V(in_s) VAL=0.5 RISE=1 TARG V(Vin) VAL=0.632 RISE=1 + .MEAS AC f3db WHEN VdB(Vin)=-3 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "tau_scale", 1e-05, 1.2e-05); + AssertMeasurementBetween(result, "f3db", 13000.0, 16000.0); + } + + // Prompt: Design a totem-pole output buffer using NPN and PNP transistors with diode biasing. Simulate transient response with a 1kHz sine wave. + [Fact] + public void Totem_pole_BJT_output_buffer_with_diode_bias_f79a86f7d2a85046() + { + var result = RunAcceptedExample( + "deepseek:00960_23cf7283d53fc054:f79a86f7d2a85046", + """ + * Totem-pole BJT output buffer with diode bias + Vcc vcc 0 DC 15 + Vee vee 0 DC -15 + VIN in 0 SIN(0 5 1k 0 0) + C1 in mid 10uF + R1 vcc b1 10k + R2 vee b2 10k + D1 b1 mid DMOD + D2 mid b2 DMOD + Q1 vcc b1 out NPN + Q2 vee b2 out PNP + RL out 0 1k + .MODEL NPN NPN(IS=1e-14 BF=200 VAF=100) + .MODEL PNP PNP(IS=1e-14 BF=200 VAF=100) + .MODEL DMOD D(IS=1e-14 RS=0.5) + .OP + .TRAN 0.01m 10m 0 0.01m + .MEASURE TRAN max_out MAX V(out) FROM=1m TO=10m + .MEASURE TRAN min_out MIN V(out) FROM=1m TO=10m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "max_out", 4.0, 5.0); + AssertMeasurementBetween(result, "min_out", (-5.0), (-4.0)); + } + + // Prompt: CMOS differential amplifier with PMOS current mirror load, powered by \xb12.5V supplies. + [Fact] + public void CMOS_differential_amplifier_with_current_mirror_load_5e8acd7328b89726() + { + var result = RunAcceptedExample( + "deepseek:01267_74062254bd6e3e14:5e8acd7328b89726", + """ + * CMOS differential amplifier with current mirror load + VDD vdd 0 DC 2.5 + VSS vss 0 DC -2.5 + I1 tail vss DC 200u + VIN1 vin1 0 DC 0 AC 1 + VIN2 vin2 0 DC 0 AC 0 + M1 d1 vin1 tail vss nmos W=16u L=1u + M2 out vin2 tail vss nmos W=16u L=1u + M3 d1 d1 vdd vdd pmos W=1.5u L=5u + M4 out d1 vdd vdd pmos W=1.5u L=5u + CLOAD out 0 10p + .MODEL nmos NMOS (VTO=0.7 KP=200u LAMBDA=0.05 LEVEL=1) + .MODEL pmos PMOS (VTO=-0.7 KP=200u LAMBDA=0.05 LEVEL=1) + .OP + .DC VIN1 -0.1 0.1 0.001 + .AC DEC 10 1 1G + .MEAS DC vout_q FIND V(out) AT=0 + .MEAS AC ac_gain_db FIND vdb(out) AT=1 + .MEAS AC ugfreq WHEN vdb(out)=0 CROSS=1 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "vout_q", 0.0, 0.1); + AssertMeasurementGreater(result, "ac_gain_db", 20.0); + AssertMeasurementBetween(result, "ugfreq", 1000000.0, 100000000.0); + } + + // Prompt: Simple first-order RC low-pass filter + [Fact] + public void RC_Low_Pass_Filter_5f992fcccd1b48da() + { + var result = RunAcceptedExample( + "deepseek:00062_d7e64165595d01ba:5f992fcccd1b48da", + """ + * RC Low-Pass Filter + V1 in 0 AC 1 DC 0 + R1 in out 1k + C1 out 0 1u + .AC DEC 10 1 1e6 + .MEAS AC fc WHEN VDB(out)=-3 FALL=1 + .MEAS AC mag_out_at_10kHz FIND VDB(out) AT=10k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "fc", 159.0, 16.0); + AssertMeasurementNear(result, "mag_out_at_10kHz", (-35.0), 5.0); + } + + // Prompt: Common-source JFET amplifier with bypassed source resistor for maximum gain + [Fact] + public void JFET_common_source_amplifier_663c2dee83ba8fc4() + { + var result = RunAcceptedExample( + "deepseek:00281_0e04b9e0a251447e:663c2dee83ba8fc4", + """ + * JFET common-source amplifier + J1 drain gate source njf + Rg gate 0 1Meg + Rs source 0 500 + Cs source 0 100u + Rd vdd drain 2k + C1 in gate 10u + C2 drain out 10u + Rl out 0 100k + VDD vdd 0 DC 15 + VIN in 0 DC 0 AC 1 + .MODEL njf NJF(VTO=-2 BETA=2m) + .OP + .AC DEC 10 1 1Meg + .MEAS AC max_gain MAX VDB(out) + .MEAS AC gain_1k FIND VDB(out) AT=1k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "max_gain", 18.0, 2.0); + AssertMeasurementNear(result, "gain_1k", 17.9, 1.0); + AssertMeasurementRatioBetween(result, "gain_1k", "max_gain", 0.99, 1.01); + } + + // Prompt: Design a passive notch filter using a series LC branch shunting the output to ground. Use AC analysis to show the frequency response with a deep notch near 5 kHz. + [Fact] + public void Series_resonant_trap_filter_adcee411116d865e() + { + var result = RunAcceptedExample( + "deepseek:00556_206c10f07067fb87:adcee411116d865e", + """ + * Series resonant trap filter + VIN in 0 AC 1 + R1 in out 1k + L1 out mid 10m + C1 mid 0 100nF + .AC dec 100 10 100k + .MEAS AC Vout_at_500 FIND VDB(out) AT=500 + .MEAS AC Vout_at_5000 FIND VDB(out) AT=5000 + .MEAS AC Vout_at_50k FIND VDB(out) AT=50000 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "Vout_at_500", (-1.0), 1.0); + AssertMeasurementLess(result, "Vout_at_5000", (-20.0)); + AssertMeasurementBetween(result, "Vout_at_50k", (-1.0), 1.0); + } + + // Prompt: Two\u2011stage BJT cascode amplifier with coupling capacitors CIN and COUT, emitter bypass capacitor CE, and base bypass capacitor C2. + [Fact] + public void Cascode_Amplifier_with_Emitter_Degeneration_and_Bypass_21e0473760c4fdb3() + { + var result = RunAcceptedExample( + "deepseek:00224_ebaf5af04b328c22:21e0473760c4fdb3", + """ + * Cascode Amplifier with Emitter Degeneration and Bypass + .MODEL NPN1 NPN(IS=1e-14 BF=150 VAF=100 IKF=0.1 ISE=1e-12 NE=1.5 BR=6 VAR=50 IKR=0.1 ISC=1e-13 NC=2 RB=10 RC=1 RE=0.5 CJE=2p VJE=0.75 MJE=0.33 CJC=1p VJC=0.75 MJC=0.33 TF=0.1n TR=10n) + VCC VCC 0 DC 12 + VIN IN 0 AC 1 SIN(0 10m 1k) + R1 VCC N2 100k + R2 N2 0 15k + RE N1 0 1k + CE N1 0 100uF + Q1 N3 N2 N1 0 NPN1 + R3 VCC N4 50k + R4 N4 0 20k + C2 N4 0 100uF + RC VCC N5 4.7k + Q2 N5 N4 N3 0 NPN1 + CIN IN N2 10uF + COUT N5 OUT 10uF + RL OUT 0 10k + .op + .ac dec 10 1 1G + .measure ac max_gain_db max vdb(out) + .measure ac f_low when vdb(out)=37 rise=1 + .measure ac f_high when vdb(out)=37 fall=1 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "max_gain_db", 30.0, 50.0); + AssertMeasurementBetween(result, "f_low", 1.0, 200.0); + AssertMeasurementBetween(result, "f_high", 10000000.0, 100000000.0); + } + + // Prompt: Second-order Butterworth low-pass filter using Sallen-Key topology with equal resistors (10k\u03a9) and capacitors (1nF). + [Fact] + public void Sallen_Key_Butterworth_Low_Pass_Filter_3b959b43db628b08() + { + var result = RunAcceptedExample( + "deepseek:01660_8a9491bfda79fc16:3b959b43db628b08", + """ + * Sallen-Key Butterworth Low-Pass Filter + VIN in 0 DC 0 AC 1 + R1 in n1 10k + R2 n1 nplus 10k + C1 n1 out 1n + C2 nplus 0 1n + Rbias nplus 0 10Meg + E1 out 0 nplus nminus 100k + Rf out nminus 5.86k + Rg nminus 0 10k + Rload out 0 10k + .AC DEC 100 1 1MEG + .MEAS AC gain_low FIND vdb(out) AT=100 + .MEAS AC f3db WHEN vdb(out)=1 CROSS=1 + .MEAS AC gain_100k FIND vdb(out) AT=100k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "gain_low", 4.0, 0.2); + AssertMeasurementNear(result, "f3db", 15915.0, 500.0); + AssertMeasurementLess(result, "gain_100k", (-20.0)); + } + + // Prompt: Window diode limiter with asymmetric clipping levels. + [Fact] + public void Window_diode_limiter_with_asymmetric_thresholds_5286b762b5efb2ae() + { + var result = RunAcceptedExample( + "deepseek:00761_c43ec9b2dc4bb747:5286b762b5efb2ae", + """ + * Window diode limiter with asymmetric thresholds + .OPTIONS POST + VIN in 0 SIN(0 5 1k) + R1 in out 1k + D1 out hclamp dmod + VHIGH hclamp 0 DC 3 + D2 lclamp out dmod + VLOW lclamp 0 DC -2 + RLOAD out 0 10k + .MODEL dmod D(IS=1e-14 RS=1) + .TRAN 0.1m 3m + .MEAS TRAN vmax MAX V(out) FROM=1m TO=3m + .MEAS TRAN vmin MIN V(out) FROM=1m TO=3m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "vmax", 3.5, 4.0); + AssertMeasurementBetween(result, "vmin", (-3.0), (-2.5)); + } + + // Prompt: Ideal unity\u2011gain buffer isolates the holding capacitor. + [Fact] + public void Sample_and_hold_front_end_with_clocked_switch_9dcd80f790405baa() + { + var result = RunAcceptedExample( + "deepseek:02239_fc4680923c537154:9dcd80f790405baa", + """ + * Sample-and-hold front end with clocked switch + .MODEL swmod SW(RON=1 ROFF=10MEG VT=2.5 VH=0.5) + .tran 1u 2m + VIN in 0 SIN(2 1 500) + VCLK clk 0 PULSE(0 5 0 10n 10n 200u 500u) + S1 in cap clk 0 swmod + C1 cap 0 100n + E_buf out 0 cap 0 1 + Rload out 0 10MEG + .measure tran v_hold_start find V(out) AT=300u + .measure tran v_hold_end find V(out) AT=450u + .measure tran v_track find V(out) AT=100u + .measure tran v_in_track find V(in) AT=100u + .END + """); + + AssertAllMeasurementsSuccessful(result); + var measures = MeasurementsDictionary(result); + var v_hold_start = measures["v_hold_start"]; + var v_hold_end = measures["v_hold_end"]; + var droop = Math.Abs((v_hold_start - v_hold_end)); + Assert.True(((droop < 0.01)), CaseLabel(result)); + var v_track = measures["v_track"]; + var v_in_track = measures["v_in_track"]; + var track_err = Math.Abs((v_track - v_in_track)); + Assert.True(((track_err < 0.01)), CaseLabel(result)); + } + + // Prompt: Create a BJT differential pair with a current mirror tail and resistive collector loads. + [Fact] + public void Long_tailed_pair_with_resistive_loads_and_current_mirror_tail_fc486fc098a0d5e5() + { + var result = RunAcceptedExample( + "deepseek:00980_67e85882c4730187:fc486fc098a0d5e5", + """ + * Long-tailed pair with resistive loads and current mirror tail + + VCC VCC 0 DC 12 + VEE VEE 0 DC -12 + VIN1 100 0 DC 0 AC 1 + VIN2 101 0 DC 0 AC 0 + + Rref VCC 5 22k + RC1 VCC 1 10k + RC2 VCC 2 10k + RE3 50 VEE 100 + RE4 51 VEE 100 + + Q1 1 100 3 npn_mod + Q2 2 101 3 npn_mod + Q3 5 5 50 npn_mod + Q4 3 5 51 npn_mod + + .MODEL npn_mod NPN(IS=1e-15 BF=150 VAF=50) + + .OP + .AC DEC 10 1 1MEG + + .MEAS AC singl_gain FIND VM(2) AT=10k + .MEAS AC phase_out FIND VP(2) AT=10k + + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "singl_gain", 80.0, 110.0); + AssertMeasurementBetween(result, "phase_out", (-5.0), 5.0); + } + + // Prompt: Create a first-order RC low-pass filter and measure its step response using a pulse source. Use R=1kOhm, C=1uF, and a 0 to 5V pulse with 1us rise and fall times. Run a transient simulation and measure the rise time and the steady-state output voltage. + [Fact] + public void RC_Step_Response_from_Pulse_Source_1e4f4159c5555ca2() + { + var result = RunAcceptedExample( + "deepseek:00025_e8061d2316229990:1e4f4159c5555ca2", + """ + * RC Step Response from Pulse Source + V1 in 0 PULSE(0 5 0 1u 1u 10m 20m) + R1 in out 1k + C1 out 0 1u + .TRAN 1u 20m + .MEAS TRAN vout_max MAX V(out) FROM=0 TO=20m + .MEAS TRAN vout_final FIND V(out) AT=9m + .MEAS TRAN trise TRIG V(out) VAL=0.5 RISE=1 TARG V(out) VAL=4.5 RISE=1 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "vout_final", 5.0, 0.2); + AssertMeasurementBetween(result, "trise", 0.0015, 0.003); + AssertMeasurementNear(result, "vout_max", 5.0, 0.2); + } + + // Prompt: Create a SPICE netlist for an RC pulse stretcher. Use a diode, capacitor, and resistor. Apply a 5V, 1us input pulse and observe the stretched output via transient analysis. Measure the output pulse width. + [Fact] + public void RC_Pulse_Stretcher_5a171e176caaae48() + { + var result = RunAcceptedExample( + "deepseek:02361_04f0f7e782bd0280:5a171e176caaae48", + """ + * RC Pulse Stretcher + VIN in 0 PULSE(0 5 0 1n 1n 1u 200u) + D1 in out dmod + C1 out 0 1n + R1 out 0 100k + .MODEL dmod D(IS=1n RS=1) + .TRAN 10n 150u + .MEASURE TRAN rise_time WHEN V(out)=2.5 RISE=1 + .MEASURE TRAN fall_time WHEN V(out)=2.5 FALL=1 + .MEASURE TRAN pulse_width PARAM=(fall_time - rise_time) + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "pulse_width", 5e-05, 0.0001); + } + + // Prompt: Design a passive volume control using a 100k potentiometer, driven by a source with 1k output impedance, and loaded by a 10k amplifier input. Simulate AC response. + [Fact] + public void Potentiometer_Volume_Control_with_Source_Impedance_b1df2cccccffa2f8() + { + var result = RunAcceptedExample( + "deepseek:00476_52be5fdb971324e0:b1df2cccccffa2f8", + """ + * Potentiometer Volume Control with Source Impedance + V1 in 0 AC 1 SIN(0 1 1k) + Rs in in1 1k + Rpot_upper in1 out 50k + Rpot_lower out 0 50k + Rload out 0 10k + .OP + .AC DEC 10 10 100k + .MEASURE AC vout_mag FIND V(out) AT=1k + .MEASURE AC vout_db FIND VDB(out) AT=1k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "vout_mag", 0.1404, 0.01); + } + + // Prompt: Parameterized BJT current mirror using NPN transistors Q1 and Q2. + [Fact] + public void Parameterized_BJT_current_mirror_c101736ca7d05fd2() + { + var result = RunAcceptedExample( + "deepseek:02442_0ac28c223f189e4c:c101736ca7d05fd2", + """ + * Parameterized BJT current mirror + .PARAM Iref=1e-3 Rload=1k + VCC VCC 0 DC 10 + I1 VCC N1 DC {Iref} + Rload VCC OUT {Rload} + Xmirror N1 OUT 0 mirror + .subckt mirror ref out gnd + Q1 ref ref gnd NPN + Q2 out ref gnd NPN + .ends mirror + .MODEL NPN NPN(IS=1e-14 BF=100 VAF=1000) + .DC VCC 10 10 1 + .MEASURE DC Iout FIND I(Rload) AT=10 + .MEASURE DC Iref FIND I(I1) AT=10 + .MEASURE DC ratio PARAM='Iout/Iref' + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "ratio", 0.96, 1.0); + AssertMeasurementGreater(result, "Iref", 0.0); + AssertMeasurementGreater(result, "Iout", 0.0); + } + + // Prompt: Design an RC delay circuit with a high-impedance load and measure the 50% delay. + [Fact] + public void RC_Delay_Network_with_High_Impedance_Load_d5dd8e69fb869d46() + { + var result = RunAcceptedExample( + "deepseek:00036_2bc87b84656b7010:d5dd8e69fb869d46", + """ + * RC Delay Network with High Impedance Load + VIN in 0 PULSE(0 1 0 1n 1n 1m 2m) + R1 in out 10k + C1 out 0 1n + Rload out 0 1MEG + .TRAN 0.1u 50u + .MEASURE TRAN tdelay TRIG V(in) VAL=0.5 RISE=1 TARG V(out) VAL=0.5 RISE=1 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "tdelay", 6e-06, 8e-06); + } + + // Prompt: Passive series resonant trap filter using a shunt LC branch to notch 10 kHz. + [Fact] + public void Series_RLC_Notch_Filter_AC_Sweep_4cf664da594618bc() + { + var result = RunAcceptedExample( + "deepseek:00555_dfabfa7cb71ecb97:4cf664da594618bc", + """ + * Series RLC Notch Filter AC Sweep + VIN in 0 AC 1 DC 0 + RS in out 50 + RL out 0 1k + L1 out mid 10mH + C1 mid top 25nF + R1 top 0 1 + .AC LIN 10000 1k 100k + .MEAS AC vmin_db MIN VDB(out) FROM 1k TO 100k + .MEAS AC vmax_db MAX VDB(out) FROM 1k TO 100k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementLess(result, "vmin_db", (-30.0)); + AssertMeasurementGreater(result, "vmax_db", (-3.0)); + } + + // Prompt: The loop filter exhibits a second-order low-pass response with a zero. + [Fact] + public void Second_order_PLL_loop_filter_923229e9a2d3bddb() + { + var result = RunAcceptedExample( + "deepseek:02125_5e9a2feb314590d2:923229e9a2d3bddb", + """ + * Second-order PLL loop filter + V_in in 0 DC 0 AC 1 PULSE(0 1 0 1u 1u 1m 2m) + G1 0 cp in 0 100u + R1 cp x 10k + C1 x 0 10n + C2 cp 0 1n + Rleak cp 0 150k + .AC DEC 100 1 1MEG + .TRAN 1u 2m + .MEAS AC f0dB WHEN VDB(cp)=0 FALL=1 + .MEAS AC phase_margin FIND VP(cp) WHEN VDB(cp)=0 FALL=1 + .MEAS TRAN vout_2ms FIND V(cp) AT=2m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "f0dB", 1000.0, 10000.0); + AssertMeasurementBetween(result, "phase_margin", (-180.0), 0.0); + AssertMeasurementBetween(result, "vout_2ms", 3.5, 4.0); + } + + // Prompt: BJT differential amplifier with an active PNP current mirror load for single-ended output. + [Fact] + public void BJT_differential_pair_with_active_PNP_current_mirror_load_large_signal_transfer_sweep_f0af157a8e765a3e() + { + var result = RunAcceptedExample( + "deepseek:00994_2a43f3505ded73a9:f0af157a8e765a3e", + """ + * BJT differential pair with active PNP current mirror load, large-signal transfer sweep + VCC VCC 0 10 + VEE VEE 0 -10 + I1 N001 VEE 1m + Q1 Q1_c Vin1 N001 NPN + Q2 out 0 N001 NPN + Q3 Q1_c Q1_c VCC PNP + Q4 out Q1_c VCC PNP + Vin1 Vin1 0 DC 0 + .MODEL NPN NPN(IS=1e-14 BF=100 VAF=500) + .MODEL PNP PNP(IS=1e-14 BF=50 VAF=500) + .DC Vin1 -0.05 0.05 0.001 + .MEAS DC vout_at_m50m FIND V(out) AT=-0.05 + .MEAS DC vout_at_0 FIND V(out) AT=0 + .MEAS DC vout_at_p50m FIND V(out) AT=0.05 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "vout_at_0", 0.0, 0.5); + AssertMeasurementNear(result, "vout_at_m50m", (-0.6), 0.5); + AssertMeasurementNear(result, "vout_at_p50m", 10.0, 1.5); + } + + // Prompt: Design a voltage-to-current converter with a grounded load using ideal op-amps. Use a sense resistor of 1k and load resistor of 500 ohms. Supply \xb115V. Show the DC sweep of the load current as the input voltage varies from 0 to 1V. + [Fact] + public void Voltage_to_current_converter_with_grounded_load_da8ae39c002ca55a() + { + var result = RunAcceptedExample( + "deepseek:01514_19ca966dfa38d91c:da8ae39c002ca55a", + """ + * Voltage-to-current converter with grounded load + VIN in 0 DC 1 + VDD VCC 0 DC 15 + VSS VEE 0 DC -15 + E1 out 0 in inv 100000 + RS out a 1000 + RLOAD a 0 500 + E2 inv 0 out a 1 + .OP + .DC VIN 0 1 0.1 + .MEAS DC I_LOAD_AT_0_5V FIND I(RLOAD) AT=0.5 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "I_LOAD_AT_0_5V", 0.0005, 1e-06); + } + + // Prompt: 10V peak 60Hz sinusoidal source drives a full-wave bridge rectifier made of four diodes. + [Fact] + public void Full_wave_bridge_rectifier_with_filter_capacitor_f65716acdd8a2641() + { + var result = RunAcceptedExample( + "deepseek:00126_57da15e0570493a9:f65716acdd8a2641", + """ + * Full-wave bridge rectifier with filter capacitor + VIN in1 in2 SIN(0 10 60 0 0) + D1 in1 out DMOD + D2 in2 out DMOD + D3 0 in1 DMOD + D4 0 in2 DMOD + C1 out 0 1000u IC=0 + RLOAD out 0 1k + .MODEL DMOD D(IS=2.52e-9 RS=0.568 N=1.752 TT=20n CJO=4e-12 VJ=0.75 M=0.5 BV=100 IBV=100u) + .TRAN 0.01m 500m 0 0.01m + .MEASURE TRAN Vout_avg AVG V(out) FROM=400m TO=500m + .MEASURE TRAN Vripple_pp PP V(out) FROM=400m TO=500m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "Vout_avg", 8.5, 0.5); + AssertMeasurementLess(result, "Vripple_pp", 0.15); + } + + // Prompt: JFET cascode amplifier with AC analysis + [Fact] + public void JFET_Cascode_Amplifier_1becee42db695349() + { + var result = RunAcceptedExample( + "deepseek:01404_2a1052ec6323a0cd:1becee42db695349", + """ + * JFET Cascode Amplifier + CIN in 1 1u + R1 1 0 1MEG + J1 2 1 3 NJF + R2 3 0 1K + C1 3 0 100u + J2 4 5 2 NJF + R3 VDD 5 20K + R4 5 0 10K + RD VDD 4 10K + COUT 4 out 1u + RL out 0 100K + VDD VDD 0 DC 15 + VIN in 0 DC 0 AC 1 + .MODEL NJF NJF(VTO=-2 BETA=1m LAMBDA=0.02) + .OP + .AC DEC 10 10 1MEG + .MEAS AC gain_db FIND VDB(out) AT=1000 + .MEAS AC phase FIND VP(out) AT=1000 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "gain_db", 20.0, 40.0); + AssertMeasurementBetween(result, "phase", (-3.3), (-3.0)); + } + + // Prompt: T-section LC impedance matching network converting 50 Ohm source to 100 Ohm load at 100 MHz. + [Fact] + public void T_section_LC_impedance_matching_network_018d839b204febb2() + { + var result = RunAcceptedExample( + "deepseek:00676_38e38e6be5f749a7:018d839b204febb2", + """ + * T-section LC impedance matching network + * Rs=50 Ohm, RL=100 Ohm, f0=100 MHz + VIN in 0 AC 1 + RS in 1 50 + L1 1 mid 112.54n + C mid 0 22.508p + L2 mid out 112.54n + RL out 0 100 + .AC DEC 100 10e6 200e6 + .meas AC vout_mag FIND vm(out) AT=100e6 + .meas AC vin_mag FIND vm(1) AT=100e6 + .meas AC vout_max MAX vm(out) + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "vout_mag", 0.7, 0.715); + AssertMeasurementBetween(result, "vin_mag", 0.49, 0.51); + AssertMeasurementGreater(result, "vout_max", 0.7); + } + + // Prompt: Create a precision half-wave rectifier using an ideal op-amp modeled as a voltage-controlled voltage source with gain 100k and a diode. The input is a 1 kHz sine wave with 1 V amplitude. Measure output voltage at positive and negative peaks and compute the average. + [Fact] + public void Precision_half_wave_rectifier_using_behavioral_op_amp_97384f9e987fe4b9() + { + var result = RunAcceptedExample( + "deepseek:00718_be8372ab601af21d:97384f9e987fe4b9", + """ + * Precision half-wave rectifier using behavioral op-amp + VIN in 0 SIN(0 1 1k) DC 0 + E_opamp n1 0 in out 100000 + D1 n1 out DMOD + Rload out 0 1k + .MODEL DMOD D(IS=1e-12) + .TRAN 10u 5m + .MEAS TRAN vout_pos_at_1p25ms FIND V(out) AT=1.25m + .MEAS TRAN vout_neg_at_1p75ms FIND V(out) AT=1.75m + .MEAS TRAN vout_avg AVG V(out) FROM=2m TO=5m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "vout_pos_at_1p25ms", 1.0, 0.05); + AssertMeasurementLess(result, "vout_neg_at_1p75ms", 0.01); + AssertMeasurementBetween(result, "vout_avg", 0.3, 0.35); + } + + // Prompt: Shunt resistor drops 0.1 V per amp of load current. + [Fact] + public void Low_side_current_sense_amplifier_e07d683c07f2620a() + { + var result = RunAcceptedExample( + "deepseek:02026_c20f8f2f70e494ed:e07d683c07f2620a", + """ + * Low-side current-sense amplifier + V_SUPPLY N001 0 DC 12 + ILOAD N001 SENSE DC 1 + R_SENSE SENSE 0 0.1 + RIN FB 0 1K + RF OUT FB 4K + E_AMP OUT 0 SENSE FB 100000 + RLOAD OUT 0 10K + .OP + .DC ILOAD 0 10 0.1 + .MEAS DC VOUT_2A FIND V(OUT) WHEN I(ILOAD)=2 + .MEAS DC VOUT_8A FIND V(OUT) WHEN I(ILOAD)=8 + .MEAS DC ZERO_OFFSET FIND V(OUT) WHEN I(ILOAD)=0 + .MEAS DC GAIN_CALC PARAM='(VOUT_8A-VOUT_2A)/(6*0.1)' + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "VOUT_2A", 1.0, 0.01); + AssertMeasurementNear(result, "VOUT_8A", 4.0, 0.01); + AssertMeasurementNear(result, "GAIN_CALC", 5.0, 0.1); + AssertMeasurementLess(result, "ZERO_OFFSET", 1e-06); + } + + // Prompt: A constant current source built around an NPN transistor Q1 and a 5.6 V Zener diode D1. + [Fact] + public void BJT_Zener_referenced_current_source_6849c632a30a4037() + { + var result = RunAcceptedExample( + "deepseek:01035_59ebb17465d70c85:6849c632a30a4037", + """ + * BJT Zener-referenced current source + VCC VCC 0 DC 12 + RBIAS VCC ZK 1.5k + D1 0 ZK DZ + .MODEL DZ D(BV=5.6V IBV=1mA RS=5) + Q1 COLL ZK E QNPN + .MODEL QNPN NPN(IS=1e-14 BF=150 VAF=100) + RE E 0 500 + RLOAD VCC NLOAD 100 + VMEAS NLOAD COLL 0 + .DC VCC 0 12 0.1 + .MEAS DC IC_12V FIND i(VMEAS) AT=12 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "IC_12V", 0.0095, 0.0101); + } + + // Prompt: Zener diode voltage regulator with a 1k\u03a9 series resistor and a 5.6V Zener diode (anode to ground, cathode to output). + [Fact] + public void Zener_Voltage_Regulator_with_Series_Resistor_8d022c0ef5db9200() + { + var result = RunAcceptedExample( + "deepseek:00128_14f2d1443f791754:8d022c0ef5db9200", + """ + * Zener Voltage Regulator with Series Resistor + R1 in out 1k + D1 0 out DZ + VIN in 0 DC 10 + .MODEL DZ D(BV=5.6 IBV=1m RS=5) + .OP + .DC VIN 0 15 0.1 + .MEAS DC VOUT1 FIND V(out) AT=10 + .MEAS DC VOUT2 FIND V(out) AT=12 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "VOUT1", 5.6, 0.2); + AssertMeasurementNear(result, "VOUT2", 5.6, 0.3); + } + + // Prompt: Pi resistive attenuator pad with 10 dB nominal attenuation. + [Fact] + public void Measured_Pi_Attenuator_10_dB_50_ohm_805b6927bf00bb0f() + { + var result = RunAcceptedExample( + "deepseek:00001_c76fa19d1422dad1:805b6927bf00bb0f", + """ + Measured Pi Attenuator 10 dB 50 ohm + V1 in 0 DC 1 AC 1 + Rsource in net_in 50 + Rsh1 net_in 0 96.25 + Rser net_in out 71.15 + Rsh2 out 0 96.25 + Rload out 0 50 + .DC V1 1 1 1 + .AC DEC 10 1e3 1e9 + .MEAS DC vout_dc FIND V(out) AT=1 + .MEAS AC att_db FIND VDB(out) AT=1e6 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "vout_dc", 0.1581, 0.01); + AssertMeasurementNear(result, "att_db", (-16.02), 0.1); + } + + // Prompt: NMOS source follower with DC-biased input and resistive load. + [Fact] + public void NMOS_Source_Follower_2c8a927a67d1a38c() + { + var result = RunAcceptedExample( + "deepseek:00261_1250f71f805a379c:2c8a927a67d1a38c", + """ + * NMOS Source Follower + VDD vdd 0 DC 5 + VIN vin 0 DC 3.061 AC 1 + M1 out vin vdd 0 nmos W=120u L=1u + RLOAD out 0 5k + .MODEL nmos NMOS (VTO=1 KP=100u LAMBDA=0.02 GAMMA=0.5) + .OP + .AC DEC 10 1k 1MEG + .MEAS OP Vout FIND V(out) AT=0 + .MEAS AC gain FIND V(out) AT=10k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "Vout", 1.0, 2.0); + AssertMeasurementBetween(result, "gain", 0.8, 1.0); + } + + // Prompt: Constant-k low-pass T-section filter with 50 ohm characteristic impedance and 100 MHz nominal cutoff, terminated with matched resistors. + [Fact] + public void constant_k_low_pass_T_section_filter_09b263f4918c1817() + { + var result = RunAcceptedExample( + "deepseek:00604_c87663dd5e972cd7:09b263f4918c1817", + """ + * constant-k low-pass T-section filter + VIN in 0 AC 1 + RS in n1 50 + L1 n1 n2 79.577n + L2 n2 out 79.577n + C1 n2 0 63.662p + RL out 0 50 + .AC DEC 100 1 1G + .MEAS AC max_gain FIND VDB(out) AT=1k + .MEAS AC fcutoff WHEN VDB(out)=-9 FALL=1 + .MEAS AC att_2fc FIND VDB(out) AT=200MEG + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "max_gain", (-6.02), 1.0); + AssertMeasurementBetween(result, "fcutoff", 80000000.0, 110000000.0); + AssertMeasurementLess(result, "att_2fc", (-20.0)); + } + + // Prompt: Single-slope ADC front-end: linear ramp (0\u21923V in 3\xb5s) generated by a PWL source. + [Fact] + public void Single_Slope_ADC_Ramp_and_Comparator_Front_End_cfa0ace29cf3e7eb() + { + var result = RunAcceptedExample( + "deepseek:02212_c9fd6cbc158d9185:cfa0ace29cf3e7eb", + """ + * Single-Slope ADC Ramp and Comparator Front End + VIN in 0 DC 1.5 + VRAMP ramp 0 PWL(0 0 3u 3) + E1 comp_out 0 ramp in 100k + Rload comp_out 0 10k + Cin in 0 1p + .TRAN 1n 3u + .MEAS TRAN t_cross WHEN V(comp_out)=0 RISE=1 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "t_cross", 1.5e-06, 1e-09); + } + + // Prompt: Non-inverting amplifier using ideal op-amp (E source with gain 100k) + [Fact] + public void Non_inverting_op_amp_with_input_bias_resistor_6cfd0dd9ef891de3() + { + var result = RunAcceptedExample( + "deepseek:01444_7369308ecdaf5c7e:6cfd0dd9ef891de3", + """ + * Non-inverting op-amp with input bias resistor + VIN in 0 DC 0.1 AC 1 + Rb in 0 10k + R1 neg 0 10k + Rf out neg 20k + RL out 0 10k + E1 out 0 in neg 100k + .DC VIN 0 0.2 0.1 + .AC DEC 10 10 100k + .MEAS DC DC_VOUT FIND V(out) AT=0.1 + .MEAS AC AC_GAIN FIND V(out) AT=1k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "DC_VOUT", 0.3, 0.01); + AssertMeasurementNear(result, "AC_GAIN", 3.0, 0.1); + } + + // Prompt: Create a SPICE netlist for a basic BJT current mirror with a reference current set by a 10k resistor and a 1k load resistor. Sweep the supply voltage from 0 to 10V and measure the reference and output currents at 10V. + [Fact] + public void Parameterized_BJT_Current_Mirror_accead88a5d1d02c() + { + var result = RunAcceptedExample( + "deepseek:02441_accead88a5d1d02c:accead88a5d1d02c", + """ + * Parameterized BJT Current Mirror + .param Vcc_val=10 Rref=10k Rload=1k BF=100 IS=1e-14 + Vcc VCC 0 DC {Vcc_val} + Rref VCC Vref {Rref} + Rload VCC Out {Rload} + Q1 Vref Vref 0 QNPN + Q2 Out Vref 0 QNPN + .model QNPN NPN(BF={BF} IS={IS}) + .DC Vcc 0 {Vcc_val} 0.1 + .MEASURE DC Iref FIND I(Rref) AT={Vcc_val} + .MEASURE DC Iout FIND I(Rload) AT={Vcc_val} + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementRatioBetween(result, "Iout", "Iref", 0.9, 1.0); + } + + // Prompt: Voltage-controlled current source for a grounded load using two op\u2011amps modelled as high\u2011gain VCVS (E elements) and precision resistor ratios. + [Fact] + public void Voltage_to_Current_Converter_with_Grounded_Load_3c20b2e402aea7ea() + { + var result = RunAcceptedExample( + "deepseek:01517_a42750502e4efd17:3c20b2e402aea7ea", + """ + * Voltage-to-Current Converter with Grounded Load + V_IN in 0 DC 0.5 + R_sense out1 load 1k + R_load load 0 100 + E1 out1 0 in out2 100000 + E2 out2 0 n2p n2n 100000 + R_a out1 n2p 1e6 + R_b n2p 0 1e6 + R_c load n2n 1e6 + R_d out2 n2n 1e6 + .OP + .DC V_IN 0 1 0.1 + .MEAS DC I_LOAD_05 FIND I(R_load) AT=0.5 + .MEAS DC I_LOAD_1 FIND I(R_load) AT=1 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "I_LOAD_05", 0.0005, 1e-05); + AssertMeasurementNear(result, "I_LOAD_1", 0.001, 1e-05); + AssertMeasurementRatioBetween(result, "I_LOAD_1", "I_LOAD_05", 1.99, 2.01); + } + + // Prompt: Simulate a pi resistive attenuator with 6 dB attenuation and 50 ohm impedance. + [Fact] + public void Resistive_Pi_Attenuator_6dB_50Ohm_ab3426678897b9fa() + { + var result = RunAcceptedExample( + "deepseek:00007_821bb62af7562186:ab3426678897b9fa", + """ + * Resistive Pi Attenuator 6dB 50Ohm + V1 in 0 DC 0 AC 1 + R1 in 0 150 + R3 in out 37.5 + R2 out 0 150 + RL out 0 50 + .OP + .AC DEC 10 1 1MEG + .MEAS AC vout_db FIND VDB(out) AT=1K + .MEAS AC vin_db FIND VDB(in) AT=1K + .MEAS AC attenuation PARAM vout_db - vin_db + .MEAS AC vout_mag FIND VM(out) AT=1K + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "attenuation", (-6.0), 0.1); + AssertMeasurementNear(result, "vout_mag", 0.5, 0.01); + } + + // Prompt: This is a common-gate MOSFET RF amplifier stage. + [Fact] + public void Common_gate_RF_amplifier_c0a1af0ff5339da3() + { + var result = RunAcceptedExample( + "deepseek:02066_fc0799fe2d36e0a3:c0a1af0ff5339da3", + """ + * Common-gate RF amplifier + VDD dd 0 DC 5V + VGATE gate 0 DC 5V + Rss source 0 300 + Cbyp gate 0 10nF + M1 drain gate source 0 nmos W=100u L=1u + Ld dd drain 10uH + Cout drain out 1uF + RL out 0 50 + VIN in 0 AC 1 SIN(0 0.1 100MEG) + Cin in source 1uF + .MODEL nmos NMOS(VTO=1 KP=200u LAMBDA=0.02) + .OP + .AC DEC 10 1MEG 1G + .MEAS OP ids FIND I(Rss) AT=0 + .MEAS OP vgs FIND V(gate,source) AT=0 + .MEAS OP vds FIND V(drain,source) AT=0 + .MEAS AC gain_db FIND VDB(out) AT=100MEG + .MEAS AC gain_mag FIND VM(out) AT=100MEG + .MEAS AC phase FIND VP(out) AT=100MEG + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "gain_db", (-3.0), 3.0); + AssertMeasurementBetween(result, "ids", 0.008, 0.012); + AssertMeasurementBetween(result, "vgs", 1.5, 3.0); + AssertMeasurementBetween(result, "vds", 1.5, 4.0); + AssertMeasurementBetween(result, "phase", (-10.0), 10.0); + } + + // Prompt: Third-order Butterworth LC low-pass ladder filter with 50 Ohm source and load terminations. + [Fact] + public void Third_order_Butterworth_low_pass_ladder_filter_aa2ac1379a506d51() + { + var result = RunAcceptedExample( + "deepseek:00564_133aa227d508ad31:aa2ac1379a506d51", + """ + * Third-order Butterworth low-pass ladder filter + VIN in 0 AC 1 + RS in 1 50 + C1 1 0 0.3183u + L2 1 out 1.5915m + C3 out 0 0.3183u + RL out 0 50 + .AC DEC 100 100 100k + .MEAS AC gain_dc FIND VDB(out) AT=100 + .MEAS AC gain_1k FIND VDB(out) AT=1k + .MEAS AC gain_10k FIND VDB(out) AT=10k + .MEAS AC fcutoff WHEN VDB(out)=-9 CROSS=1 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "gain_dc", (-6.5), (-5.5)); + AssertMeasurementBetween(result, "gain_1k", (-6.5), (-5.5)); + AssertMeasurementBetween(result, "gain_10k", (-9.5), (-8.5)); + AssertMeasurementNear(result, "fcutoff", 10000.0, 2000.0); + } + + // Prompt: An RC low-pass filter with R=1k\u03a9, C=1\xb5F (\u03c4=1ms) is driven by a 0\u20131V pulse of 1ms width and 2ms period. + [Fact] + public void RC_Step_Response_from_Pulse_Source_f64709c93077754b() + { + var result = RunAcceptedExample( + "deepseek:00024_bc9f9f9f99cab555:f64709c93077754b", + """ + * RC Step Response from Pulse Source + V1 in 0 PULSE(0 1 0 1n 1n 1m 2m) + R1 in out 1k + C1 out 0 1u + .TRAN 0.01m 5m 0 0.01m + .MEAS TRAN t_rise WHEN V(out)=0.632 RISE=1 + .MEAS TRAN v_final FIND V(out) AT=1m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "t_rise", 0.001, 0.0001); + AssertMeasurementNear(result, "v_final", 0.632, 0.05); + } + + // Prompt: Simulate the large-signal DC transfer of a basic BJT differential pair biased with a 1mA tail current. Sweep the input voltage from -0.2V to 0.2V and measure the differential output voltage. + [Fact] + public void BJT_differential_pair_large_signal_transfer_3bd4c5b9ef171748() + { + var result = RunAcceptedExample( + "deepseek:00996_3bd4c5b9ef171748:3bd4c5b9ef171748", + """ + * BJT differential pair large-signal transfer + .MODEL NPN NPN(IS=1e-14 BF=100 VAF=50) + VCC VCC 0 DC 5 + VEE VEE 0 DC -5 + VIN1 in1 0 DC 0 + VIN2 in2 0 DC 0 + I_TAIL tail VEE DC 1m + RC1 VCC out1 10k + RC2 VCC out2 10k + Q1 out1 in1 tail NPN + Q2 out2 in2 tail NPN + .DC VIN1 -0.2 0.2 0.0001 + .MEAS DC VOUT_ZERO FIND V(out1,out2) AT=0 + .MEAS DC VOUT_P1 FIND V(out1,out2) AT=0.001 + .MEAS DC VOUT_N1 FIND V(out1,out2) AT=-0.001 + .MEAS DC VOUT_MAX MAX V(out1,out2) FROM=-0.2 TO=0.2 + .MEAS DC VOUT_MIN MIN V(out1,out2) FROM=-0.2 TO=0.2 + .MEAS DC GAIN_ABS PARAM='(vout_n1 - vout_p1)/0.002' + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "VOUT_ZERO", (-0.1), 0.1); + AssertMeasurementGreater(result, "VOUT_MAX", 3.0); + AssertMeasurementLess(result, "VOUT_MIN", (-3.0)); + AssertMeasurementBetween(result, "GAIN_ABS", 50.0, 500.0); + } + + // Prompt: Design a two-op-amp instrumentation amplifier with a differential gain of 21 using 10k feedback resistors and a 1k gain-setting resistor. Measure the differential output voltage gain and phase at 1 kHz. + [Fact] + public void Two_op_amp_instrumentation_amplifier_d2b5d2f1deecb1b6() + { + var result = RunAcceptedExample( + "deepseek:01477_f0b8defa8a205861:d2b5d2f1deecb1b6", + """ + * Two-op-amp instrumentation amplifier + VINP in_pos 0 DC 0 AC 0.5 + VINN in_neg 0 DC 0 AC -0.5 + R1 out1 inv1 10k + R2 out2 inv2 10k + Rg inv1 inv2 1k + E1 out1 0 in_pos inv1 1e5 + E2 out2 0 in_neg inv2 1e5 + .op + .ac dec 10 1 1e6 + .meas AC gain_mag FIND V(out1,out2) AT=1k + .meas AC phase FIND VP(out1,out2) AT=1k + .end + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "gain_mag", 21.0, 0.1); + AssertMeasurementBetween(result, "phase", (-0.1), 0.1); + } + + // Prompt: The circuit uses a voltage-controlled current source (Gmult) to multiply the carrier and modulating signals, approximating a four-quadrant multiplier. + [Fact] + public void AM_Modulator_using_Multiplier_Approximation_1403b9a1e3557640() + { + var result = RunAcceptedExample( + "deepseek:02101_4f4d521b9124d1dc:1403b9a1e3557640", + """ + * AM Modulator using Multiplier Approximation + Vcarrier carr 0 SIN(0 1 100k) + Vmod mod 0 SIN(2 0.5 1k) + Gmult out 0 VALUE = { 1e-3 * V(carr)*V(mod) } + Rload out 0 1k + .tran 0.1u 2m 0 0.1u + .meas TRAN Vmax_mod MAX V(mod) FROM=0.5m TO=1.5m + .meas TRAN Vmin_mod MIN V(mod) FROM=0.5m TO=1.5m + .meas TRAN mod_index PARAM = (Vmax_mod - Vmin_mod)/(Vmax_mod + Vmin_mod) + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "mod_index", 0.25, 0.05); + } + + // Prompt: Design an NMOS source follower buffer with a resistive load. Bias it with a 10V supply and 5V DC input. Measure the AC gain at 1kHz. + [Fact] + public void NMOS_Source_Follower_Buffer_540cf63eeb0ea21c() + { + var result = RunAcceptedExample( + "deepseek:00262_ea74a2c369c52d8d:540cf63eeb0ea21c", + """ + * NMOS Source Follower Buffer + VDD vdd 0 DC 10 + VIN in 0 DC 5 AC 1 + M1 vdd in out 0 nmod L=1u W=10u + Rload out 0 10k + .MODEL nmod NMOS(VTO=1 KP=100u LAMBDA=0.02) + .OP + .AC DEC 10 1 1e6 + .MEAS AC gain_at_1k FIND DB(V(out)) AT=1k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "gain_at_1k", (-5.0), 0.0); + } + + // Prompt: Voltage follower using a high-gain VCVS (E-source) with gain 100k. + [Fact] + public void Voltage_Follower_using_E_source_af690e1a9c41f2bf() + { + var result = RunAcceptedExample( + "deepseek:01430_b49ea8fc0173cfdd:af690e1a9c41f2bf", + """ + * Voltage Follower using E-source + VIN in 0 DC 0 AC 1 + Rload out 0 10k + E1 out 0 in out 100000 + .DC VIN -5 5 0.01 + .MEAS DC vout_at_2_5 FIND V(out) AT=2.5 + .AC DEC 10 1 100k + .MEAS AC gain_dB_1k FIND DB(V(out)) AT=1k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "vout_at_2_5", 2.5, 0.01); + AssertMeasurementNear(result, "gain_dB_1k", 0.0, 0.5); + } + + // Prompt: Two-op-amp instrumentation amplifier with differential gain of 3, using behavioral op-amps (100k open-loop gain). + [Fact] + public void Two_op_amp_Instrumentation_Amplifier_with_Gain_3_932b8d813ecb7786() + { + var result = RunAcceptedExample( + "deepseek:01474_27a0ef59536e15ad:932b8d813ecb7786", + """ + * Two-op-amp Instrumentation Amplifier with Gain=3 + VINP inp 0 DC 1 AC 1 + VINM inm 0 DC 0.5 AC 0 + E1 out1 0 inm neg1 100k + R1 neg1 0 20k + R2 neg1 out1 10k + E2 out 0 inp neg2 100k + R3 neg2 out1 5k + R4 neg2 out 10.0004500045001K + .OP + .AC DEC 10 1 1MEG + .MEAS OP Vout_OP FIND V(out) AT=0 + .MEAS AC gain_AC FIND V(out) AT=1K + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "Vout_OP", 1.5, 1e-06); + AssertMeasurementNear(result, "gain_AC", 3.0, 1e-06); + } + + // Prompt: Classic half\u2011wave Greinacher voltage doubler using two 100 \xb5F capacitors, two diodes (IS=1e\u201112, RS=1), and a 1 k\u03a9 load. + [Fact] + public void Greinacher_voltage_doubler_with_measurements_e24f0312074e9f38() + { + var result = RunAcceptedExample( + "deepseek:00151_0ae9f2881b7ffe0f:e24f0312074e9f38", + """ + * Greinacher voltage doubler with measurements + VIN in 0 SIN(0 5 1k) + C1 in n1 100u + D1 0 n1 dmod + D2 n1 out dmod + C2 out 0 100u + RLOAD out 0 1k + .MODEL dmod D(IS=1e-12 RS=1) + .TRAN 10u 10m + .MEAS TRAN VoutAvg AVG V(out) FROM=5m TO=10m + .MEAS TRAN Vripple PP V(out) FROM=9m TO=10m + .MEAS TRAN VoutMax MAX V(out) FROM=5m TO=10m + .MEAS TRAN VoutMin MIN V(out) FROM=5m TO=10m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "VoutAvg", 7.85, 0.6); + AssertMeasurementLess(result, "Vripple", 0.1); + AssertMeasurementGreater(result, "VoutMax", 7.9); + AssertMeasurementLess(result, "VoutMin", 8.0); + AssertMeasurementGreater(result, "VoutMin", 7.7); + } + + // Prompt: Capacitive sensor modeled as 100 pF (Cs) coupling a voltage step to the inverting input of an ideal op\u2011amp with gain 100k. + [Fact] + public void Capacitive_sensor_interface_with_charge_amplifier_f283c27d59c295e2() + { + var result = RunAcceptedExample( + "deepseek:02451_3718b2d758760bd8:f283c27d59c295e2", + """ + * Capacitive sensor interface with charge amplifier + Cs in invm 100p + Rf invm out 1G + Cf invm out 10p + Eamp out 0 0 invm 100000 + Vexc in 0 AC 1 PULSE(0 1 1m 10n 10n 1m 2m) + Rload out 0 1k + .AC DEC 10 1 10k + .TRAN 1u 3m + .MEASURE AC gain_db FIND vdb(out) AT=1000 + .MEASURE TRAN vout_step FIND v(out) AT=1.05m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "gain_db", 20.0, 1.0); + AssertMeasurementNear(result, "vout_step", (-10.0), 0.5); + } + + // Prompt: CMOS dynamic inverter with precharge (PMOS M1) and evaluate (NMOS M2) phases controlled by clock. + [Fact] + public void Dynamic_precharge_inverter_with_keeper_13f63bb3b0b81564() + { + var result = RunAcceptedExample( + "deepseek:01374_59758746cdda6165:13f63bb3b0b81564", + """ + * Dynamic precharge inverter with keeper + Vdd vdd 0 DC 3.3 + Vclk clk 0 PULSE(0 3.3 0 1n 1n 50n 150n) + Vin in 0 PULSE(0 3.3 10n 1n 1n 30n 150n) + M1 out clk vdd vdd pmos W=4u L=0.5u + M2 out in 0 0 nmos W=2u L=0.5u + C1 out 0 100f + M3 inv_out out 0 0 nmos W=1u L=0.5u + M4 inv_out out vdd vdd pmos W=2u L=0.5u + M5 out inv_out vdd vdd pmos W=0.5u L=0.5u + .MODEL nmos NMOS (VTO=0.7 KP=50u LAMBDA=0.01) + .MODEL pmos PMOS (VTO=-0.7 KP=25u LAMBDA=0.01) + .TRAN 0.1n 300n + .MEAS TRAN vout_pre FIND V(out) AT=80n + .MEAS TRAN vout_eval FIND V(out) AT=30n + .MEAS TRAN tfall TRIG V(in) VAL=1.65 RISE=1 TARG V(out) VAL=1.65 FALL=1 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "vout_pre", 3.3, 0.1); + AssertMeasurementNear(result, "vout_eval", 0.0, 0.1); + AssertMeasurementBetween(result, "tfall", 1e-10, 1e-08); + } + + // Prompt: RC snubber across switching inductive load + [Fact] + public void RC_snubber_across_switching_inductive_load_4eea5576055bd293() + { + var result = RunAcceptedExample( + "deepseek:00481_a565bb1c44bacf0d:4eea5576055bd293", + """ + * RC snubber across switching inductive load + VDD VDD 0 DC 12 + Vctrl ctrl 0 PULSE(0 5 0 1n 1n 1u 2u) + S1 drain source ctrl 0 SWITCHMOD + .MODEL SWITCHMOD SW(RON=0.1 ROFF=10MEG VT=2.5 VH=0.5) + L1 source sw_out 100n + Rload sw_out 0 10 + Rsnub drain snub_n 100 + Csnub snub_n source 1n + .TRAN 1n 10u + .MEAS TRAN vpk MAX V(drain,source) + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementLess(result, "vpk", 50.0); + } + + // Prompt: Ceramic resonator equivalent circuit: series RLC motional arm (L1, C1, Rloss) with parallel static capacitance C0. + [Fact] + public void Ceramic_Resonator_Equivalent_Circuit_AC_Analysis_4f6d10ec4a6bac95() + { + var result = RunAcceptedExample( + "deepseek:00624_9ba035ba32c71c51:4f6d10ec4a6bac95", + """ + * Ceramic Resonator Equivalent Circuit AC Analysis + R1 in 1 1k + L1 1 2 2.505m + C1 2 3 100pF + Rloss 3 0 1 + C0 1 0 4pF + V1 in 0 AC 1 + .AC DEC 1000 100k 2MEG + .MEAS AC vdb_fs MIN VDB(1) + .MEAS AC vdb_fp MAX VDB(1) + .MEAS AC min_vdb MIN VDB(1) + .MEAS AC max_vdb MAX VDB(1) + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementLess(result, "vdb_fs", (-30.0)); + AssertMeasurementGreater(result, "vdb_fp", (-3.0)); + AssertMeasurementNear(result, "min_vdb", MeasurementValue(result, "vdb_fs"), 2.0); + AssertMeasurementNear(result, "max_vdb", MeasurementValue(result, "vdb_fp"), 2.0); + } + + // Prompt: Inverting amplifier implemented with a behavioral E-source having open-loop gain = 100k. + [Fact] + public void Inverting_Amplifier_with_E_source_Op_Amp_691ec04eae1a409f() + { + var result = RunAcceptedExample( + "deepseek:00307_8603a2168fb2ae7f:691ec04eae1a409f", + """ + * Inverting Amplifier with E-source Op-Amp + VIN in 0 DC 0 AC 1 + R1 in inn 1k + R2 out inn 10k + E1 out 0 VALUE = { 100000 * V(inn) } + .AC DEC 10 1 1MEG + .MEAS AC gain_mag FIND VM(out) AT=1k + .MEAS AC gain_phase FIND VP(out) AT=1k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "gain_mag", 10.0, 0.1); + AssertMeasurementNear(result, "gain_phase", 3.14159265358979, 0.01); + } + + // Prompt: Fifth-order Bessel low-pass LC ladder filter with a 200 ohm load (singly terminated) and a 10 kHz cutoff. + [Fact] + public void Fifth_order_Bessel_low_pass_LC_ladder_filter_singly_terminated_5c6c66395c80b95d() + { + var result = RunAcceptedExample( + "deepseek:00649_46914270cab9f951:5c6c66395c80b95d", + """ + * Fifth-order Bessel low-pass LC ladder filter, singly terminated + V1 a 0 AC 1 + L1 a b 2.118m + C2 b 0 60.94n + L3 b c 4.904m + C4 c 0 90.86n + L5 c out 2.118m + RL out 0 200 + .AC DEC 1000 1k 100k + .MEASURE AC vdb_1k FIND VDB(out) AT=1k + .MEASURE AC vdb_10k FIND VDB(out) AT=10k + .MEASURE AC vdb_100k FIND VDB(out) AT=100k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "vdb_1k", (-0.5), 0.5); + AssertMeasurementBetween(result, "vdb_10k", (-4.0), (-2.0)); + AssertMeasurementLess(result, "vdb_100k", (-30.0)); + } + + // Prompt: Three-input inverting summing amplifier with weighted resistors. + [Fact] + public void Weighted_three_input_summing_amplifier_9d6bf17656d316b5() + { + var result = RunAcceptedExample( + "deepseek:01451_8f4795df6160eb4f:9d6bf17656d316b5", + """ + * Weighted three-input summing amplifier + V1 in1 0 DC 1 AC 1 + V2 in2 0 DC 2 AC 2 + V3 in3 0 DC 4 AC 4 + R1 in1 inv 1k + R2 in2 inv 2k + R3 in3 inv 4k + Rf inv out 4k + E1 out 0 inv 0 100k + .DC V1 1 1 1 + .AC DEC 10 1 100k + .MEAS DC VOUT_DC FIND V(out) AT=0 + .MEAS AC VOUT_AC FIND VR(out) AT=1k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "VOUT_DC", (-12.0), 0.01); + AssertMeasurementNear(result, "VOUT_AC", (-12.0), 0.01); + } + + // Prompt: AM modulator using multiplier approximation with a G-source + [Fact] + public void AM_Modulator_using_Multiplier_Approximation_c75fb27a6db0116d() + { + var result = RunAcceptedExample( + "deepseek:02100_c051ab3c0d770b2b:c75fb27a6db0116d", + """ + * AM Modulator using Multiplier Approximation + Vcar car 0 SIN(0 1 100k) + Vmod mod 0 SIN(1 0.5 1k) + R1 mod 0 10k + Gmult out 0 VALUE={V(car)*V(mod)} + Rload out 0 1k + Cout out 0 1n + .TRAN 1u 5m + .MEASURE TRAN vmax MAX V(mod) FROM=1ms TO=5ms + .MEASURE TRAN vmin MIN V(mod) FROM=1ms TO=5ms + .MEASURE TRAN mod_index PARAM=' (vmax-vmin)/(vmax+vmin) ' + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "mod_index", 0.5, 0.1); + } + + // Prompt: Design an emitter-coupled logic (ECL) differential switch using BJTs. Apply a PULSE input and a DC reference voltage. Run DC operating point and transient analysis. Measure output voltages to verify differential switching behavior. + [Fact] + public void Emitter_Coupled_Logic_Differential_Switch_5c521ad9fd32d343() + { + var result = RunAcceptedExample( + "deepseek:01180_b6e31f3679ec932c:5c521ad9fd32d343", + """ + * Emitter-Coupled Logic Differential Switch + VCC vcc 0 DC 5 + VEE vee 0 DC -5 + I1 emitter vee DC 1m + Q1 out1 in emitter 0 qn + Q2 out2 vref emitter 0 qn + R1 vcc out1 1k + R2 vcc out2 1k + Vref vref 0 DC -0.5 + VIN in 0 PULSE(-1 0 50n 1n 1n 50n 200n) + .MODEL qn NPN(IS=1e-15 BF=100) + .OP + .TRAN 1n 200n + .MEAS TRAN vout1_l AVG V(out1) FROM=10n TO=40n + .MEAS TRAN vout1_h AVG V(out1) FROM=60n TO=90n + .MEAS TRAN vout2_l AVG V(out2) FROM=10n TO=40n + .MEAS TRAN vout2_h AVG V(out2) FROM=60n TO=90n + .END + """); + + AssertAllMeasurementsSuccessful(result); + var v1l = MeasurementValue(result, "vout1_l"); + var v1h = MeasurementValue(result, "vout1_h"); + var v2l = MeasurementValue(result, "vout2_l"); + var v2h = MeasurementValue(result, "vout2_h"); + Assert.True(((v1l > v1h)), CaseLabel(result)); + Assert.True(((v2h > v2l)), CaseLabel(result)); + } + + // Prompt: CMOS differential pair with NMOS input transistors and PMOS current-mirror active load. + [Fact] + public void CMOS_Differential_Pair_with_Current_Mirror_Load_0abd91c362f49548() + { + var result = RunAcceptedExample( + "deepseek:01265_3daec43da00e08ca:0abd91c362f49548", + """ + * CMOS Differential Pair with Current Mirror Load + M1 d1 in1 tail tail NMOS1 W=100u L=1u + M2 out in2 tail tail NMOS1 W=100u L=1u + M3 d1 d1 vdd vdd PMOS1 W=200u L=1u + M4 out d1 vdd vdd PMOS1 W=200u L=1u + IBIAS tail 0 DC 200u + VDD vdd 0 DC 5 + VIN1 in1 0 DC 2.5 AC 0.5 + VIN2 in2 0 DC 2.5 AC -0.5 + .MODEL NMOS1 NMOS(VTO=0.7 KP=200u LAMBDA=0.02) + .MODEL PMOS1 PMOS(VTO=-0.7 KP=100u LAMBDA=0.02) + .OP + .DC VIN2 2.499 2.501 0.0001 + .AC DEC 10 1 1e6 + .MEAS DC vout_bias FIND v(out) AT=2.5 + .MEAS DC vd1_bias FIND v(d1) AT=2.5 + .MEAS DC gain_dc DERIV v(out) WHEN V(in2)=2.5 + .MEAS AC ac_gain MAX v(out) + .MEAS AC ac_gain_1k FIND v(out) AT=1k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "vout_bias", 4.0, 4.5); + AssertMeasurementBetween(result, "vd1_bias", 4.0, 4.5); + AssertMeasurementLess(result, "gain_dc", (-400.0)); + AssertMeasurementGreater(result, "gain_dc", (-600.0)); + AssertMeasurementBetween(result, "ac_gain", 400.0, 600.0); + AssertMeasurementBetween(result, "ac_gain_1k", 400.0, 600.0); + } + + // Prompt: Low-side current-sense amplifier using 0.1\u03a9 shunt resistor, op-amp modeled as voltage-controlled voltage source with gain 100k, and non-inverting feedback network Rf=99k\u03a9, R1=1k\u03a9 for a closed-loop gain of approximately 100. + [Fact] + public void Low_side_current_sense_amplifier_front_end_00bac2ad515e41ed() + { + var result = RunAcceptedExample( + "deepseek:02027_c6fdb9bee311565b:00bac2ad515e41ed", + """ + * Low-side current sense amplifier front end + V1 vdd 0 DC 5 + ILOAD vdd sense DC 0 + R_sense sense 0 0.1 + E1 out 0 sense neg 100k + Rf out neg 99k + R1 neg 0 1k + .OP + .DC ILOAD 0 100m 1m + .MEAS DC vout_at_0 FIND V(out) AT=0 + .MEAS DC vout_at_100m FIND V(out) AT=100m + .MEAS DC measured_gain DERIV V(out) AT=50m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "measured_gain", 10.0, 0.1); + AssertMeasurementBetween(result, "vout_at_0", (-1e-06), 1e-06); + AssertMeasurementNear(result, "vout_at_100m", 1.0, 0.01); + } + + // Prompt: Switched-capacitor equivalent resistor using two non-overlapping clocks. + [Fact] + public void Switched_Capacitor_Resistor_Equivalent_Circuit_15b6e8ad3fe9f988() + { + var result = RunAcceptedExample( + "deepseek:02269_4e41bc75cc28e675:15b6e8ad3fe9f988", + """ + * Switched-Capacitor Resistor Equivalent Circuit + VIN in 0 DC 1 + VPHI1 phi1 0 PULSE(0 5 0 10n 10n 40u 100u) + VPHI2 phi2 0 PULSE(0 5 50u 10n 10n 40u 100u) + S1 in capnode phi1 0 swmod + S2 capnode out phi2 0 swmod + C1 capnode 0 1n + C2 out 0 10n + RLOAD out 0 100k + .MODEL swmod SW(RON=1k ROFF=100MEG VT=2 VH=0.5) + .TRAN 0.1u 10m + .MEAS TRAN VOUT_AVG AVG V(out) FROM=9m TO=10m + .MEAS TRAN IVIN_AVG AVG I(VIN) FROM=9m TO=10m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "VOUT_AVG", 0.45, 0.55); + AssertMeasurementBetween(result, "IVIN_AVG", (-6e-06), (-4e-06)); + } + + // Prompt: Two-input diode-transistor logic NAND gate using dual diodes and an NPN BJT. + [Fact] + public void Two_input_DTL_NAND_gate_with_adjusted_RC_for_lower_threshold_095d1d3b94ae067c() + { + var result = RunAcceptedExample( + "deepseek:02461_48a85bc8819479eb:095d1d3b94ae067c", + """ + * Two-input DTL NAND gate with adjusted RC for lower threshold + VCC VCC 0 DC 5 + VIN1 IN1 0 DC 0 PULSE(0 5 10ns 1ns 1ns 40ns 100ns) + VIN2 IN2 0 DC 5 + D1 K IN1 D_MOD + D2 K IN2 D_MOD + R1 VCC K 2k + RC VCC OUT 10k + R_COUP K B 22k + R_BE B 0 10k + Q1 OUT B 0 QNPN + .MODEL D_MOD D(IS=1e-14 RS=10 N=1) + .MODEL QNPN NPN(IS=1e-15 BF=100 VAF=50) + .DC VIN1 0 5 0.01 + .TRAN 0.1ns 100ns + .MEAS DC VOUT_HIGH FIND V(OUT) WHEN V(IN1)=0 + .MEAS DC VOUT_LOW FIND V(OUT) WHEN V(IN1)=5 + .MEAS DC VTH WHEN V(OUT)=2.5 FALL=1 + .MEAS TRAN VHIGH_TRAN FIND V(OUT) AT=5ns + .MEAS TRAN VLOW_TRAN FIND V(OUT) AT=50ns + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "VOUT_HIGH", 4.5, 5.0); + AssertMeasurementBetween(result, "VOUT_LOW", 0.0, 0.5); + AssertMeasurementBetween(result, "VTH", 1.2, 1.8); + AssertMeasurementBetween(result, "VHIGH_TRAN", 4.5, 5.0); + AssertMeasurementBetween(result, "VLOW_TRAN", 0.0, 0.5); + } + + // Prompt: Three op-amp instrumentation amplifier using behavioral op-amps with 100k voltage gain. + [Fact] + public void Instrumentation_Amplifier_with_Three_Behavioral_Op_Amps_corrected_57e3da4f90f829d7() + { + var result = RunAcceptedExample( + "deepseek:00401_50b575af383c1b03:57e3da4f90f829d7", + """ + * Instrumentation Amplifier with Three Behavioral Op-Amps (corrected) + VCM cm 0 DC 2.5 + VDIFF in+ cm DC 0.05 AC 1 + E1 b 0 in+ a 100000 + E2 d 0 cm c 100000 + E3 out 0 f e 100000 + R1 b a 10k + R2 d c 10k + Rgain a c 1k + R3 d e 10k + R4 e out 10k + R5 b f 10k + R6 f 0 10k + .OP + .DC VDIFF 0.05 0.05 1 + .AC DEC 10 1 100k + .MEAS DC VOUT_DC FIND V(out) AT=0.05 + .MEAS AC GAIN_DB FIND VDB(out) AT=1k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "VOUT_DC", 1.05, 0.01); + AssertMeasurementNear(result, "GAIN_DB", 26.444, 0.1); + } + + // Prompt: Create an antilog converter using an op-amp and a diode. Sweep input from 0 to 0.5V and measure output. + [Fact] + public void Antilog_Diode_Converter_with_Op_Amp_9c425417e3a6fe4a() + { + var result = RunAcceptedExample( + "deepseek:00833_0dd7656cc69ae221:9c425417e3a6fe4a", + """ + * Antilog Diode Converter with Op-Amp + VIN in 0 DC 0 + D1 in vi Dmod + Rf out vi 10k + E1 out 0 0 vi 1e5 + .MODEL Dmod D(IS=1e-12 RS=1) + .DC VIN 0 0.5 0.01 + .MEAS DC Vout_at_0p5 FIND V(out) WHEN V(in)=0.5 + .MEAS DC Vout_at_0p3 FIND V(out) WHEN V(in)=0.3 + .OP + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "Vout_at_0p5", (-2.5), 0.15); + AssertMeasurementNear(result, "Vout_at_0p3", (-0.0011), 0.0002); + } + + // Prompt: Fifth-order Butterworth low-pass filter in an LC ladder topology with 50-ohm terminations. + [Fact] + public void Fifth_order_Butterworth_LC_low_pass_ladder_filter_8bbc7ee5353162a2() + { + var result = RunAcceptedExample( + "deepseek:00572_0f92f60d9dede349:8bbc7ee5353162a2", + """ + * Fifth-order Butterworth LC low-pass ladder filter + V1 in 0 DC 0 AC 1 + R1 in 1 50 + L1 1 2 491.8u + C1 2 0 515n + L2 2 3 1.5915m + C2 3 0 515n + L3 3 out 491.8u + Rload out 0 50 + .AC DEC 100 100 1MEG + .MEAS AC gain1k FIND VDB(out) AT=1k + .MEAS AC fcut3dB WHEN VDB(out)=-9 FALL=1 + .MEAS AC att100k FIND VDB(out) AT=100k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "gain1k", (-6.0), 0.5); + AssertMeasurementBetween(result, "fcut3dB", 9500.0, 10500.0); + AssertMeasurementLess(result, "att100k", (-40.0)); + } + + // Prompt: Series RLC resonant circuit with L=1mH, C=1uF, R=50\u03a9 + [Fact] + public void series_RLC_resonant_tank_f2b8f0645e3d6164() + { + var result = RunAcceptedExample( + "deepseek:02358_08a25befa9f0fd78:f2b8f0645e3d6164", + """ + * series RLC resonant tank + VIN in 0 AC 1 + R1 in 1 50 + L1 1 2 1m + C1 2 0 1u + .AC DEC 100 100 100k + .MEAS AC peak_gain_db MAX VDB(2) + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "peak_gain_db", (-1.0), 1.0); + } + + // Prompt: Input sinusoidal source VIN with 1V amplitude and 1kHz frequency zero offset. + [Fact] + public void Positive_Diode_Clamper_with_3_3V_Reference_51aade49a4ca82ab() + { + var result = RunAcceptedExample( + "deepseek:00141_2c158474212b1a6c:51aade49a4ca82ab", + """ + * Positive Diode Clamper with 3.3V Reference + VIN in 0 SIN(0 1 1k) + C1 in n1 1uF + RLOAD n1 0 100k + D1 vref n1 DMOD + VREF vref 0 DC 3.3 + .MODEL DMOD D(IS=1e-14 RS=1 CJO=0.5p) + .TRAN 0.1u 10m + .MEAS TRAN vmin MIN V(n1) FROM=1m TO=10m + .MEAS TRAN vmax MAX V(n1) FROM=1m TO=10m + .MEAS TRAN vpp PP V(n1) FROM=1m TO=10m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "vmin", 2.5, 2.8); + AssertMeasurementBetween(result, "vmax", 4.4, 4.9); + AssertMeasurementNear(result, "vpp", 2.0, 0.1); + } + + // Prompt: Bridge rectifier using four diodes D1-D4 with a 1k\u03a9 load. + [Fact] + public void Bridge_polarity_protector_a58efb2899d9ac90() + { + var result = RunAcceptedExample( + "deepseek:00789_c81214aea8f6b95c:a58efb2899d9ac90", + """ + * Bridge polarity protector + V1 in 0 PULSE(10 -10 1m 1n 1n 4m 8m) + D1 in out_p dmod + D2 out_n in dmod + D3 0 out_p dmod + D4 out_n 0 dmod + RLOAD out_p out_n 1k + .MODEL dmod D(IS=1e-12 RS=1.0) + .OP + .TRAN 1u 8m + .MEASURE TRAN vout_pos AVG V(out_p,out_n) FROM=0.2m TO=0.8m + .MEASURE TRAN vout_neg AVG V(out_p,out_n) FROM=2m TO=4.8m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "vout_pos", 8.6, 0.5); + AssertMeasurementNear(result, "vout_neg", 8.6, 0.5); + AssertMeasurementRatioBetween(result, "vout_pos", "vout_neg", 0.95, 1.05); + } + + // Prompt: Design a two-stage passive RC low-pass filter with R=10kOhm and C=10nF. Run an AC analysis and measure the gain at 100Hz and 100kHz. + [Fact] + public void Two_Pole_Passive_RC_Ladder_Low_Pass_Filter_7fc4f0ecf8a48b08() + { + var result = RunAcceptedExample( + "deepseek:00043_7fc4f0ecf8a48b08:7fc4f0ecf8a48b08", + """ + * Two-Pole Passive RC Ladder Low-Pass Filter + V1 in 0 AC 1 + R1 in n1 10k + C1 n1 0 10n + R2 n1 out 10k + C2 out 0 10n + .AC DEC 100 10 100k + .MEAS AC gain_low FIND V(out) AT=100 + .MEAS AC gain_high FIND V(out) AT=100k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "gain_low", 0.9, 1.1); + AssertMeasurementLess(result, "gain_high", 0.01); + } + + // Prompt: Create a SPICE netlist for a Wilson current mirror using NMOS transistors, include a DC sweep of the supply voltage and measure the mirroring accuracy. + [Fact] + public void Wilson_MOS_current_mirror_0c0861ddc6b2e2c2() + { + var result = RunAcceptedExample( + "deepseek:01301_a89a27ad6598cdb1:0c0861ddc6b2e2c2", + """ + * Wilson MOS current mirror + M1 d1 d1 s 0 nmod W=10u L=1u + M2 out d1 s 0 nmod W=10u L=1u + M3 s d1 0 0 nmod W=10u L=1u + RREF vdd d1 4.7k + RL vdd out 4.7k + VDD vdd 0 DC 5 + .MODEL nmod NMOS(VTO=1 KP=200u LAMBDA=0.02) + .OP + .DC VDD 0 5 0.1 + .MEASURE DC iout FIND I(RL) AT=5 + .MEASURE DC iref FIND I(RREF) AT=5 + .MEASURE DC mirror_ratio PARAM='iout/iref' + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "mirror_ratio", 0.9, 1.1); + } + + // Prompt: RC differentiator that detects edges of a square wave. + [Fact] + public void RC_Differentiator_Edge_Detector_5645288459abb42c() + { + var result = RunAcceptedExample( + "deepseek:00634_5eb500d1350b342b:5645288459abb42c", + """ + * RC Differentiator Edge Detector + VIN in 0 PULSE(0 5 0 1n 1n 0.5u 1u) + C1 in out 100p + R1 out 0 1k + .TRAN 0.01u 5u + .MEAS TRAN pos_peak MAX V(out) FROM=0 TO=5u + .MEAS TRAN neg_peak MIN V(out) FROM=0 TO=5u + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementGreater(result, "pos_peak", 4.5); + AssertMeasurementLess(result, "neg_peak", (-4.5)); + } + + // Prompt: JFET cascode amplifier using two N-channel JFETs in a cascode configuration to maximize bandwidth. + [Fact] + public void JFET_Cascode_Amplifier_Hard_Example_66aaadb9f9259937() + { + var result = RunAcceptedExample( + "deepseek:01406_8be7de46c63f37f9:66aaadb9f9259937", + """ + * JFET Cascode Amplifier - Hard Example + VDD vdd 0 DC 20 + VIN in 0 DC 0 AC 1 + R_G1 in g1 1MEG + R_S1 s1 0 1k + C_S1 s1 0 100u + C_IN in g1 1u + J1 n1 g1 s1 NJFET + J2 d2 g2 n1 NJFET + R1 vdd g2 140k + R2 g2 0 60k + C_G2 g2 0 1u + R_D vdd d2 9.1k + C_OUT d2 out 1u + R_L out 0 100k + .MODEL NJFET NJF(VTO=-2.0 BETA=1e-3 LAMBDA=0.02) + .OP + .AC DEC 10 1 10MEG + .MEAS AC vout_1k FIND Vm(out) AT=1k + .MEAS AC vout_10k FIND Vm(out) AT=10k + .MEAS AC vout_100k FIND Vm(out) AT=100k + .END + """); + + AssertAllMeasurementsSuccessful(result); + var v1k = MeasurementValue(result, "vout_1k"); + AssertMeasurementBetween(result, "vout_1k", 15.0, 20.0); + AssertMeasurementBetween(result, "vout_10k", (v1k * 0.9), (v1k * 1.1)); + AssertMeasurementBetween(result, "vout_100k", (v1k * 0.5), (v1k * 1.5)); + } + + // Prompt: Design a CMOS transmission gate analog switch circuit for sample-and-hold. Use an NMOS and PMOS transistor pair controlled by complementary pulse voltages. Apply a 1kHz 1V sine wave input, and use a 1nF hold capacitor. Perform a transient analysis over 40\xb5s and measure the output voltage just before the switch turns off and after it holds, to verify minimal hold droop. + [Fact] + public void CMOS_Transmission_Gate_Sample_and_Hold_ac10d1325e60457e() + { + var result = RunAcceptedExample( + "deepseek:01346_b7a4a83ae1bc99ce:ac10d1325e60457e", + """ + * CMOS Transmission Gate Sample and Hold + VDD vdd 0 DC 5 + VSIG in 0 SIN(0 1 1k) + VCTRL ctrl 0 PULSE(0 5 0 1n 1n 10u 20u) + VCTRLB ctrlb 0 PULSE(5 0 0 1n 1n 10u 20u) + M1 in ctrl out 0 nmod + M2 out ctrlb in vdd pmod + CL out 0 1n + .MODEL nmod NMOS(VTO=1 KP=200u LAMBDA=0.02) + .MODEL pmod PMOS(VTO=-1 KP=100u LAMBDA=0.02) + .TRAN 0.1u 40u + .MEAS TRAN vsample FIND V(out) AT=9.999u + .MEAS TRAN vhold FIND V(out) AT=15u + .END + """); + + AssertAllMeasurementsSuccessful(result); + var vsample = MeasurementValue(result, "vsample"); + AssertMeasurementNear(result, "vhold", vsample, 0.001); + AssertMeasurementBetween(result, "vhold", 0.05, 0.07); + } + + // Prompt: L-pad attenuator with 50-ohm source, 100-ohm series, 200-ohm shunt, and 50-ohm load. + [Fact] + public void L_Pad_Attenuator_with_Rs_50_R1_100_R2_200_RL_50_34c117a183fc8449() + { + var result = RunAcceptedExample( + "deepseek:00453_fdf6f96e7a80965f:34c117a183fc8449", + """ + * L-Pad Attenuator with Rs=50, R1=100, R2=200, RL=50 + V1 src 0 DC 5 AC 1 + Rs src in 50 + R1 in out 100 + R2 out 0 200 + RL out 0 50 + .OP + .DC V1 5 5 1 + .AC DEC 10 1 1MEG + .MEAS DC out_dc FIND V(out) AT=5 + .MEAS AC attn_db FIND VDB(out) AT=1k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "out_dc", 1.0, 1.1); + AssertMeasurementBetween(result, "attn_db", (-14.0), (-13.0)); + } + + // Prompt: 1 kHz sinusoidal input sampled by a voltage-controlled switch with a 0.9 ms pulse, capturing the waveform at -0.5878 V. + [Fact] + public void Op_amp_sample_and_hold_with_ideal_switch_and_leakage_fa0b794fbca2fcde() + { + var result = RunAcceptedExample( + "deepseek:01582_ca9507817fb9d1e1:fa0b794fbca2fcde", + """ + * Op-amp sample-and-hold with ideal switch and leakage + .OPTIONS POST + VIN in 0 SIN(0 1 1k 0 0 0) + VCTRL ctrl 0 PULSE(0 5 0 1n 1n 0.9m 10m) + S1 in chold ctrl 0 sw1 + C1 chold 0 10n + Rleak chold 0 10MEG + E1 out 0 chold out 100k + Rload out 0 10k + .MODEL sw1 SW(RON=1 ROFF=1e9 VT=2.5 VH=0.5) + .TRAN 1u 5m + .MEAS TRAN Vsample FIND V(chold) WHEN V(ctrl)=2.5 CROSS=LAST + .MEAS TRAN Vheld FIND V(out) AT=0.95m + .MEAS TRAN Vhold_end FIND V(out) AT=2.95m + .MEAS TRAN Verror PARAM '100*abs(Vheld-Vsample)/(abs(Vsample)+1p)' + .MEAS TRAN Vdroop PARAM 'Vheld - Vhold_end' + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "Vsample", (-0.5878), 0.01); + AssertMeasurementNear(result, "Vheld", (-0.5878), 0.01); + AssertMeasurementLess(result, "Verror", 0.1); + AssertMeasurementBetween(result, "Vdroop", (-0.013), (-0.01)); + } + + // Prompt: 4-bit R-2R DAC with an op-amp buffer, using ideal voltage sources to set binary inputs to VREF. + [Fact] + public void R_2R_ladder_DAC_with_op_amp_buffer_14db59749ee0a727() + { + var result = RunAcceptedExample( + "deepseek:02180_50612b0e8020b1c7:14db59749ee0a727", + """ + * R-2R ladder DAC with op-amp buffer + .param VREF=5 + VREF ref 0 DC {VREF} + E0 b0 0 ref 0 1 + E1 b1 0 ref 0 1 + E2 b2 0 ref 0 1 + E3 b3 0 ref 0 1 + R2R0 b0 n1 20k + R2R1 b1 n2 20k + R2R2 b2 n3 20k + R2R3 b3 n4 20k + R1 n1 n2 10k + R2 n2 n3 10k + R3 n3 n4 10k + Rterm n1 0 20k + Eop out 0 n4 out 100k + Rload out 0 10k + .OP + .DC VREF 0 5 0.01 + .MEAS DC vout_full FIND v(out) AT=5 + .MEAS DC vout_at5 FIND v(out) AT=5 + .MEAS DC vout_at2p5 FIND v(out) AT=2.5 + .MEAS DC vout_at0 FIND v(out) AT=0 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "vout_full", 4.6875, 0.01); + AssertMeasurementNear(result, "vout_at5", 4.6875, 0.01); + AssertMeasurementNear(result, "vout_at2p5", 2.34375, 0.01); + AssertMeasurementNear(result, "vout_at0", 0.0, 0.01); + } + + // Prompt: Diode-based inverting charge pump using two diodes and two capacitors. + [Fact] + public void Inverting_charge_pump_f8823e3042b5d440() + { + var result = RunAcceptedExample( + "deepseek:00874_701c5343c668ca5f:f8823e3042b5d440", + """ + * Inverting charge pump + .model dmod D(Is=1E-13 Rs=1) + Vpulse in 0 PULSE(0 5 0 1n 1n 500n 1u) + Cfly in n1 1u + D1 n1 0 dmod + D2 out n1 dmod + Cout out 0 1u + Rload out 0 10k + .tran 0.1u 20u + .meas tran Vout_avg avg v(out) from=10u to=20u + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "vout_avg", (-4.0), (-3.0)); + } + + // Prompt: Simulate a Wheatstone bridge strain gauge circuit with a differential output loaded by 1k\u03a9. + [Fact] + public void Loaded_Wheatstone_bridge_sensor_circuit_3c6f137e15286605() + { + var result = RunAcceptedExample( + "deepseek:00435_fef7156cfea9217b:3c6f137e15286605", + """ + * Loaded Wheatstone bridge sensor circuit + Vbridge vp 0 5 + R1 vp n1 100 + R2 n1 0 100 + R3 vp n2 100 + Rsensor n2 0 100.1 + Rload n1 n2 1k + .OP + .DC Vbridge 0 5 0.1 + .MEASURE DC vout_at_5V FIND V(n1,n2) AT=5 + .MEASURE DC vout_at_2p5V FIND V(n1,n2) AT=2.5 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "vout_at_5V", (-0.001136), 0.0001); + AssertMeasurementNear(result, "vout_at_2p5V", (-0.000568), 0.0001); + } + + // Prompt: Wien bridge oscillator with JFET amplitude stabilization. + [Fact] + public void JFET_limiter_for_sine_wave_stabilization_9bdfa16afdeb8b8e() + { + var result = RunAcceptedExample( + "deepseek:01419_43b99d292902225f:9bdfa16afdeb8b8e", + """ + * JFET limiter for sine-wave stabilization + E1 out 0 pos neg 100k + * Wien network + R1 out n1 10k + C1 n1 pos 10n + R2 pos 0 10k + C2 pos 0 10n + * Negative feedback + Rf out neg 20k + Rg neg 0 20k + Rs junc 0 6.8k + J1 neg gate junc NJF + .MODEL NJF NJF(VTO=-2 BETA=1m LAMBDA=1m) + * Peak detector + D1 gate out DET + .MODEL DET D(IS=1e-6 N=0.01) + Cd gate 0 0.1u + Rb gate 0 100k + * Kickstart + VSIN sin 0 SIN(0 0.01 1k) + Rsin sin pos 100k + .IC V(gate)=0 + * Clamp op-amp to +/-5V + Vsupply_p pos5 0 DC 5 + Vsupply_n neg5 0 DC -5 + Dclamp_p out pos5 DCL + Dclamp_n neg5 out DCL + .MODEL DCL D(IS=1e-6 N=0.01) + .TRAN 10u 500m 0 10u + .MEAS TRAN Vmax MAX V(out) FROM=400m TO=500m + .MEAS TRAN Vmin MIN V(out) FROM=400m TO=500m + .MEAS TRAN Vpp PARAM Vmax-Vmin + .MEAS TRAN Vgate_avg AVG V(gate) FROM=400m TO=500m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "Vpp", 3.5, 4.5); + AssertMeasurementBetween(result, "Vgate_avg", (-2.5), (-1.5)); + } + + // Prompt: Design a SPICE netlist for a negative diode limiter with a -2V bias voltage, using a 1kHz 10V amplitude sine input, a series resistor, and a load resistor. Run a transient analysis and measure the minimum and maximum output voltages. + [Fact] + public void Biased_Negative_Diode_Limiter_324cd09be9687fbe() + { + var result = RunAcceptedExample( + "deepseek:00753_324cd09be9687fbe:324cd09be9687fbe", + """ + * Biased Negative Diode Limiter + VIN in 0 SIN(0 10 1k) + R1 in out 1k + D1 bias out D1N4148 + Vbias bias 0 DC -2 + Rload out 0 10k + .MODEL D1N4148 D(IS=1n RS=1 BV=100 IBV=100u) + .TRAN 0.1u 5m + .MEAS TRAN vmin MIN V(out) + .MEAS TRAN vmax MAX V(out) + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "vmin", (-3.5), (-2.0)); + AssertMeasurementGreater(result, "vmax", 9.0); + } + + // Prompt: N-channel JFET constant current source with gate grounded and 1k\u03a9 source degeneration resistor. + [Fact] + public void JFET_Current_Source_with_DC_Sweep_191894ea47f67740() + { + var result = RunAcceptedExample( + "deepseek:01411_40d8bbc954412e10:191894ea47f67740", + """ + * JFET Current Source with DC Sweep + J1 D G S njf + R_S S 0 1k + V_D D 0 DC 0 + V_G G 0 DC 0 + .MODEL njf NJF(VTO=-2 BETA=1m LAMBDA=0.01) + .OP + .DC V_D 0 20 0.1 + .MEASURE DC I5 FIND I(R_S) AT=5 + .MEASURE DC I10 FIND I(R_S) AT=10 + .MEASURE DC I15 FIND I(R_S) AT=15 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "I5", 0.0009, 0.0011); + AssertMeasurementBetween(result, "I10", 0.0009, 0.0011); + AssertMeasurementBetween(result, "I15", 0.0009, 0.0011); + } + + // Prompt: Open-loop boost converter uses a voltage-controlled switch driven by a 100kHz pulse with 65% duty cycle. + [Fact] + public void Boost_Converter_Open_Loop_Switching_Model_3d7dbc48b67fd53e() + { + var result = RunAcceptedExample( + "deepseek:02331_931c38df681e9362:3d7dbc48b67fd53e", + """ + * Boost Converter Open-Loop Switching Model + VIN in 0 DC 5 + L1 in ind_mid 100u + Rlpar ind_mid sw 0.1 + VGATE gate 0 PULSE(0 10 0 1n 1n 6.5u 10u) + S1 sw 0 gate 0 SWmod + .MODEL SWmod SW(Ron=0.1 Roff=1MEG Vt=2.5 Vh=0.5) + D1 sw out Dmod + .MODEL Dmod D(Is=1e-9 Rs=0.1 Vj=0.8 Cjo=10p) + R_esr out esr_out 0.05 + C1 esr_out 0 100u + Rload out 0 10 + .TRAN 0.1u 10m + .MEAS TRAN Vout_avg AVG V(out) FROM=9.8m TO=10m + .MEAS TRAN Vout_ripple PP V(out) FROM=9.8m TO=10m + .MEAS TRAN Pin_avg AVG V(in)*I(VIN) FROM=9.8m TO=10m + .MEAS TRAN Pout_avg AVG V(out)*I(Rload) FROM=9.8m TO=10m + .MEAS TRAN Eff PARAM Pout_avg/Pin_avg*100 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "vout_avg", 11.0, 13.0); + AssertMeasurementLess(result, "vout_ripple", 0.5); + AssertMeasurementGreater(result, "eff", 70.0); + } + + // Prompt: High-speed emitter-coupled logic gate using an NPN BJT differential pair. + [Fact] + public void BJT_emitter_coupled_differential_switch_c9993e1ff099491a() + { + var result = RunAcceptedExample( + "deepseek:01176_22972b90c809ed91:c9993e1ff099491a", + """ + * BJT emitter-coupled differential switch + .MODEL NPN NPN(IS=1e-15 BF=100) + VCC VCC 0 DC 5 + VEE VEE 0 DC -5 + VREF INREF 0 DC 0 + VIN ININ 0 PULSE(-0.5 0.5 10n 1n 1n 50n 100n) + Q1 COUT1 INREF EM NPN + Q2 COUT2 ININ EM NPN + RC1 VCC COUT1 2.2k + RC2 VCC COUT2 2.2k + IEE EM VEE 1m + .OP + .TRAN 0.1n 200n + .MEAS TRAN vhigh1 MAX V(COUT1) FROM=0 TO=200n + .MEAS TRAN vlow1 MIN V(COUT1) FROM=0 TO=200n + .MEAS TRAN vhigh2 MAX V(COUT2) FROM=0 TO=200n + .MEAS TRAN vlow2 MIN V(COUT2) FROM=0 TO=200n + .MEAS TRAN tpd_rise TRIG V(ININ) VAL=0 RISE=1 TARG V(COUT2) VAL=3.9 FALL=1 + .MEAS TRAN tpd_fall TRIG V(ININ) VAL=0 FALL=1 TARG V(COUT2) VAL=3.9 RISE=1 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementGreater(result, "vhigh1", 4.5); + AssertMeasurementLess(result, "vlow1", 3.5); + AssertMeasurementGreater(result, "vhigh2", 4.5); + AssertMeasurementLess(result, "vlow2", 3.5); + AssertMeasurementLess(result, "tpd_rise", 1e-08); + AssertMeasurementLess(result, "tpd_fall", 1e-08); + } + + // Prompt: Simulate a 3rd order LC Butterworth lowpass filter with a cutoff frequency of 10 kHz and 50 \u03a9 terminations. Run an AC analysis and measure the -3 dB cutoff. + [Fact] + public void Third_order_Butterworth_low_pass_ladder_10kHz_50ohm_88170893d7582aaa() + { + var result = RunAcceptedExample( + "deepseek:00566_cd333c530083b2ae:88170893d7582aaa", + """ + * Third-order Butterworth low-pass ladder (10kHz, 50ohm) + V1 in 0 DC 0 AC 1 + Rsource in n1 50 + C1 n1 0 318n + L2 n1 out 1.59m + C3 out 0 318n + Rload out 0 50 + .AC DEC 200 100 1MEG + .MEAS AC dc_gain FIND VDB(out) AT=100 + .MEAS AC fc WHEN VDB(out)=-9 CROSS=1 + .MEAS AC atten100k FIND VDB(out) AT=100k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "fc", 9000.0, 12000.0); + AssertMeasurementLess(result, "atten100k", (-50.0)); + } + + // Prompt: Simple op-amp voltage follower using a high-gain behavioral E-source. + [Fact] + public void Simple_Op_Amp_Voltage_Follower_05bb82b12ba4bd24() + { + var result = RunAcceptedExample( + "deepseek:01429_e52a9e0c4223b465:05bb82b12ba4bd24", + """ + * Simple Op-Amp Voltage Follower + VIN in 0 DC 1V AC 1V + RLOAD out 0 10k + EOPAMP out 0 in out 100000 + .OP + .AC DEC 10 1 1MEG + .MEAS AC gain_mag FIND MAG(V(out)) AT=1k + .MEAS AC phase_deg FIND PHASE(V(out)) AT=1k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "gain_mag", 1.0, 0.05); + AssertMeasurementNear(result, "phase_deg", 0.0, 5.0); + } + + // Prompt: CMOS transmission-gate latch designed to be non-inverting. + [Fact] + public void CMOS_Transmission_Gate_Latch_non_inverting_c8dd011ca7af6595() + { + var result = RunAcceptedExample( + "deepseek:01365_c3b6b4233a18bbbb:c8dd011ca7af6595", + """ + * CMOS Transmission-Gate Latch (non-inverting) + .param vdd=1.8 + VDD vdd 0 DC {vdd} + VIN d 0 PULSE(0 {vdd} 20n 1p 1p 50n 200n) + VCLK clk 0 PULSE(0 {vdd} 0 1p 1p 50n 100n) + VCLKB clkb 0 PULSE({vdd} 0 0 1p 1p 50n 100n) + M1 d clk mid 0 nmos W=1u L=0.18u + M2 d clkb mid vdd pmos W=2u L=0.18u + M3 q clkb mid 0 nmos W=1u L=0.18u + M4 q clk mid vdd pmos W=2u L=0.18u + M5 n1 mid 0 0 nmos W=1u L=0.18u + M6 n1 mid vdd vdd pmos W=2u L=0.18u + M7 q n1 0 0 nmos W=1u L=0.18u + M8 q n1 vdd vdd pmos W=2u L=0.18u + C1 q 0 10f + .MODEL nmos NMOS (VTO=0.5 KP=100u LAMBDA=0.02) + .MODEL pmos PMOS (VTO=-0.5 KP=50u LAMBDA=0.02) + .TRAN 0.1n 200n UIC + .MEASURE TRAN v_q_60n FIND V(q) AT=60n + .MEASURE TRAN v_q_90n FIND V(q) AT=90n + .MEASURE TRAN v_q_120n FIND V(q) AT=120n + .MEASURE TRAN v_q_160n FIND V(q) AT=160n + .MEASURE TRAN tpd_dq TRIG V(d) VAL=0.9 RISE=1 TARG V(q) VAL=0.9 RISE=1 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementGreater(result, "v_q_60n", 1.5); + AssertMeasurementGreater(result, "v_q_90n", 1.5); + AssertMeasurementLess(result, "v_q_120n", 0.3); + AssertMeasurementLess(result, "v_q_160n", 0.3); + AssertMeasurementLess(result, "tpd_dq", 1e-09); + } + + // Prompt: PMOS common-source amplifier with 2k\u03a9 resistive load. + [Fact] + public void PMOS_common_source_amplifier_with_resistive_load_f3af31040bbb33b2() + { + var result = RunAcceptedExample( + "deepseek:01208_8471917abcafff86:f3af31040bbb33b2", + """ + * PMOS common-source amplifier with resistive load + VDD VDD 0 DC 5 + VIN in 0 DC 2.5 AC 1 + M1 drain in VDD VDD pmosmod W=10u L=1u + RD drain 0 2k + .MODEL pmosmod PMOS(VTO=-1 KP=100u LAMBDA=0.02) + .OP + .AC DEC 10 1 1MEG + .DC VIN 2.4 2.6 0.1 + .MEASURE DC d_id FIND I(RD) WHEN V(in)=2.5 + .MEASURE DC d_vd FIND V(drain) WHEN V(in)=2.5 + .MEASURE AC ac_gain FIND V(drain) AT=1k + .MEASURE AC ac_gain_db FIND DB(V(drain)) AT=1k + .MEASURE AC ac_phase FIND VP(drain) AT=1k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "d_id", 0.0011, 0.0013); + AssertMeasurementBetween(result, "d_vd", 2.2, 2.5); + AssertMeasurementBetween(result, "ac_gain", (-3.3), (-3.0)); + AssertMeasurementBetween(result, "ac_gain_db", 9.5, 9.8); + AssertMeasurementBetween(result, "ac_phase", 3.12, 3.16); + } + + // Prompt: CMOS inverter with PMOS width 20\xb5m, NMOS width 10\xb5m, both gate lengths 0.5\xb5m for increased drive current. + [Fact] + public void CMOS_Inverter_with_capacitive_load_cbeb4e28d5e42fe3() + { + var result = RunAcceptedExample( + "deepseek:01358_49c44ea152940fc5:cbeb4e28d5e42fe3", + """ + * CMOS Inverter with capacitive load + .param VDD=3.3 + VDD vdd 0 DC VDD + VIN in 0 PULSE(0 VDD 0 1n 1n 30n 60n) + M1 out in vdd vdd PMOS W=20u L=0.5u + M2 out in 0 0 NMOS W=10u L=0.5u + CL out 0 10p + .MODEL NMOS NMOS (VTO=0.7 KP=200u LAMBDA=0.02) + .MODEL PMOS PMOS (VTO=-0.7 KP=100u LAMBDA=0.02) + .TRAN 0.1n 100n + .MEAS TRAN risetime TRIG V(out) VAL='0.3*VDD' RISE=1 TARG V(out) VAL='0.7*VDD' RISE=1 + .MEAS TRAN falltime TRIG V(out) VAL='0.7*VDD' FALL=1 TARG V(out) VAL='0.3*VDD' FALL=1 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "risetime", 1e-09, 3e-09); + AssertMeasurementBetween(result, "falltime", 1e-09, 3e-09); + } + + // Prompt: Series RLC bandpass filter with 10mH inductor, 0.1uF capacitor, and 100\u03a9 resistor. + [Fact] + public void Series_RLC_Bandpass_Filter_AC_Analysis_845ad2cf505c6d30() + { + var result = RunAcceptedExample( + "deepseek:00067_e5f5e9c5245d22d9:845ad2cf505c6d30", + """ + * Series RLC Bandpass Filter AC Analysis + V1 in 0 AC 1 + L1 in mid 10mH + C1 mid out 0.1uF + R1 out 0 100 + .AC DEC 100 100 100k + .MEAS AC max_vout MAX V(out) + .MEAS AC f0 WHEN vp(out)=0 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "max_vout", 1.0, 0.05); + AssertMeasurementNear(result, "f0", 5033.0, 200.0); + } + + // Prompt: A CMOS dynamic precharge inverter consisting of a PMOS precharge transistor and an NMOS evaluation transistor. + [Fact] + public void CMOS_Dynamic_Precharge_Inverter_ed64cefb865da8d6() + { + var result = RunAcceptedExample( + "deepseek:01373_322be706d407f3a5:ed64cefb865da8d6", + """ + * CMOS Dynamic Precharge Inverter + .MODEL nmos NMOS(VTO=0.7 KP=100u) + .MODEL pmos PMOS(VTO=-0.7 KP=50u) + VDD VDD 0 DC 3.3 + VCLK CLK 0 PULSE(0 3.3 0 1n 1n 50n 100n) + VIN IN 0 PULSE(0 3.3 60n 1n 1n 30n 100n) + Mpre OUT CLK VDD VDD pmos L=1u W=10u + Meval OUT IN 0 0 nmos L=1u W=50u + C1 OUT 0 100f + .TRAN 0.1n 200n + .MEAS TRAN vprech FIND V(OUT) AT=40n + .MEAS TRAN veval FIND V(OUT) AT=80n + .MEAS TRAN vprech2 FIND V(OUT) AT=140n + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "vprech", 3.3, 0.1); + AssertMeasurementLess(result, "veval", 0.5); + AssertMeasurementNear(result, "vprech2", 3.3, 0.1); + } + + // Prompt: Resistive ladder divides reference voltage into 8 equal steps from 0V to 5V. + [Fact] + public void _3_bit_Flash_ADC_with_resistor_ladder_and_comparator_bank_6aeae66620c1ecda() + { + var result = RunAcceptedExample( + "deepseek:02206_200d811a6ef6f3d4:6aeae66620c1ecda", + """ + * 3-bit Flash ADC with resistor ladder and comparator bank + Vcc vcc 0 DC 5 + Vref vref 0 DC 5 + Vin in 0 DC 0 PULSE(0 5 0 1m 1m 2m 5m) + + * Input buffer (E-source voltage follower, gain=1) + E_buf buf 0 in 0 1 + + * Resistor ladder: 8 equal resistors from vref to ground + R1 vref n1 1k + R2 n1 n2 1k + R3 n2 n3 1k + R4 n3 n4 1k + R5 n4 n5 1k + R6 n5 n6 1k + R7 n6 n7 1k + R8 n7 0 1k + + * Comparator bank using voltage-controlled switches with pull-up resistors + .model SWMOD SW(RON=1 ROFF=100MEG VT=0 VH=0) + S7 vcc out7 buf n7 SWMOD + S6 vcc out6 buf n6 SWMOD + S5 vcc out5 buf n5 SWMOD + S4 vcc out4 buf n4 SWMOD + S3 vcc out3 buf n3 SWMOD + S2 vcc out2 buf n2 SWMOD + S1 vcc out1 buf n1 SWMOD + + Rup7 out7 0 10k + Rup6 out6 0 10k + Rup5 out5 0 10k + Rup4 out4 0 10k + Rup3 out3 0 10k + Rup2 out2 0 10k + Rup1 out1 0 10k + + * Analyses + .DC Vin 0 5 0.01 + .TRAN 1u 10m + + * Measurements + .MEAS DC vth7 WHEN V(out7)=2.5 + .MEAS DC vth6 WHEN V(out6)=2.5 + .MEAS DC vth5 WHEN V(out5)=2.5 + .MEAS DC vth4 WHEN V(out4)=2.5 + .MEAS DC vth3 WHEN V(out3)=2.5 + .MEAS DC vth2 WHEN V(out2)=2.5 + .MEAS DC vth1 WHEN V(out1)=2.5 + + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "vth7", 0.625, 0.05); + AssertMeasurementNear(result, "vth6", 1.25, 0.05); + AssertMeasurementNear(result, "vth5", 1.875, 0.05); + AssertMeasurementNear(result, "vth4", 2.5, 0.05); + AssertMeasurementNear(result, "vth3", 3.125, 0.05); + AssertMeasurementNear(result, "vth2", 3.75, 0.05); + AssertMeasurementNear(result, "vth1", 4.375, 0.05); + } + + // Prompt: MOSFET DC bias circuit using a voltage divider (R3-R4) to set gate voltage at 5V. + [Fact] + public void MOSFET_DC_Bias_Circuit_with_voltage_divider_6cecb587883e3432() + { + var result = RunAcceptedExample( + "deepseek:02350_a45e9a8edd2561db:6cecb587883e3432", + """ + * MOSFET DC Bias Circuit with voltage divider + M1 D G S 0 nmod W=1u L=10u + .MODEL nmod NMOS (VTO=1 KP=200u LAMBDA=0.01) + R1 D vdd 10k + R2 S 0 500 + R3 vdd G 100k + R4 G 0 100k + VDD vdd 0 DC 10 + .DC VDD 10 10 1 + .MEAS DC ID FIND I(R2) AT=10 + .MEAS DC VDS FIND V(D)-V(S) AT=10 + .MEAS DC VGS FIND V(G)-V(S) AT=10 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "ID", 0.00012, 0.00018); + AssertMeasurementBetween(result, "VDS", 7.5, 9.5); + AssertMeasurementBetween(result, "VGS", 4.5, 5.5); + } + + // Prompt: N-channel JFET source follower with \xb115V supplies + [Fact] + public void JFET_source_follower_buffer_d0dcaf4e464969b6() + { + var result = RunAcceptedExample( + "deepseek:01389_cc61c5cddc660690:d0dcaf4e464969b6", + """ + * JFET source follower buffer + J1 d g s jfet_n + VDD d 0 15 + VSS neg 0 -15 + Rs s neg 10k + VIN g 0 DC 0 AC 1 + .MODEL jfet_n NJF(VTO=-2 BETA=1m) + .OP + .AC DEC 10 10 100k + .MEAS OP ID_JF FIND I(VSS) AT=0 + .MEAS OP VGS_OP FIND V(g,s) AT=0 + .MEAS AC gain_1k FIND V(s) AT=1k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "ID_JF", 0.00157, 0.0001); + AssertMeasurementNear(result, "VGS_OP", (-0.745), 0.05); + AssertMeasurementNear(result, "gain_1k", 0.96, 0.05); + } + + // Prompt: CMOS 2-input NOR gate with input B tied low, making it function as an inverter. + [Fact] + public void CMOS_NOR2_Gate_Transient_Response_77c939233fbacf45() + { + var result = RunAcceptedExample( + "deepseek:00301_045e118a88bb2c3e:77c939233fbacf45", + """ + * CMOS NOR2 Gate Transient Response + .MODEL NMOS NMOS (VTO=1 KP=100U LAMBDA=0.02) + .MODEL PMOS PMOS (VTO=-1 KP=50U LAMBDA=0.02) + VDD VDD 0 DC 5 + VA A 0 PULSE(0 5 10n 1n 1n 40n 80n) + VB B 0 DC 0 + M1 out A 0 0 NMOS W=2u L=1u + M2 out B 0 0 NMOS W=2u L=1u + M3 mid A vdd vdd PMOS W=4u L=1u + M4 out B mid vdd PMOS W=4u L=1u + CL out 0 0.5p + .TRAN 0.1n 100n + .MEAS TRAN tphl TRIG V(A) VAL=2.5 RISE=1 TARG V(out) VAL=2.5 FALL=1 + .MEAS TRAN tplh TRIG V(A) VAL=2.5 FALL=1 TARG V(out) VAL=2.5 RISE=1 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "tphl", 1e-10, 5e-09); + AssertMeasurementBetween(result, "tplh", 1e-10, 5e-09); + } + + // Prompt: Switching preregulator (buck converter) steps 12V down to ~4.8V using a fixed 40% duty cycle at 100kHz. + [Fact] + public void Linear_Post_Regulator_After_Switching_Preregulator_7cbc98f5869d8e9e() + { + var result = RunAcceptedExample( + "deepseek:02004_2abb4e9469bbfb96:7cbc98f5869d8e9e", + """ + * Linear Post-Regulator After Switching Preregulator + VIN in 0 DC 12 + VPULSE ctrl 0 PULSE(0 5 0 10n 10n 4u 10u) + S1 in sw ctrl 0 SWMOD + D1 0 sw DDIODE + L1 sw vsw 100u + C1 vsw 0 100u + Rsw vsw 0 100 + VREF ref 0 DC 1.25 + R1 out fb 16.4k + R2 fb 0 10k + Eamp eout 0 fb ref 100k + Cc eout fb 100p + Rb eout qb 1 + Q1 vsw qb out QNPN + Cout out 0 10u + ILOAD out 0 PULSE(0.05 0.5 2m 1u 1u 2m 10m) + .MODEL QNPN NPN(IS=1e-14 BF=200) + .MODEL DDIODE D(IS=1n RS=0.1) + .MODEL SWMOD SW(RON=0.1 ROFF=1MEG VT=2.5 VH=0.1) + .OP + .TRAN 1u 10m + .MEAS TRAN vout_low AVG V(out) FROM=1.5m TO=1.9m + .MEAS TRAN vout_high AVG V(out) FROM=3m TO=3.5m + .MEAS TRAN ripple PP V(out) FROM=1.5m TO=1.55m + .END + """); + + AssertAllMeasurementsSuccessful(result); + var meas = MeasurementsDictionary(result); + var vout_low = meas["vout_low"]; + var vout_high = meas["vout_high"]; + var ripple = meas["ripple"]; + Assert.True(((Math.Abs((vout_low - 3.3)) < 0.1)), CaseLabel(result)); + Assert.True(((Math.Abs((vout_high - 3.3)) < 0.1)), CaseLabel(result)); + Assert.True(((ripple < 0.05)), CaseLabel(result)); + var load_reg_pct = ((100.0 * (vout_low - vout_high)) / 3.3); + Assert.True(((load_reg_pct < 5.0)), CaseLabel(result)); + } + + // Prompt: Simulate the AC response of a non-inverting operational amplifier with a gain of 2 (6 dB) using an ideal voltage-controlled voltage source. + [Fact] + public void Non_inverting_op_amp_amplifier_using_E_source_137732fb83718300() + { + var result = RunAcceptedExample( + "deepseek:00313_137732fb83718300:137732fb83718300", + """ + * Non-inverting op-amp amplifier using E-source + Vin pos 0 AC 1 DC 0 + Rin neg 0 10k + Rf out neg 10k + E1 out 0 pos neg 100k + Rload out 0 10k + .AC DEC 10 1 1MEG + .MEAS AC vout_db FIND VDB(out) AT=1kHz + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "vout_db", 6.02, 0.1); + } + + // Prompt: Cascode BJT current mirror with 10 V supply, 5 k\u03a9 resistor, and Vbias=1.5 V. + [Fact] + public void Cascode_BJT_Current_Mirror_with_adjusted_IS_1cccbfcc9f1e16ef() + { + var result = RunAcceptedExample( + "deepseek:01020_083a9167abc5533a:1cccbfcc9f1e16ef", + """ + * Cascode BJT Current Mirror with adjusted IS + VCC vcc 0 DC 10 + Vbias bias 0 DC 1.5 + Rref vcc ref 5k + Q1 e3 e3 0 npn_mod + Q2 e4 e3 0 npn_mod + Q3 ref bias e3 npn_mod + Q4 out_int bias e4 npn_mod + Vmeas out out_int 0 + Vout out 0 DC 5 + .model npn_mod NPN(IS=5e-16 BF=100 VAF=50) + .OP + .DC Vout 0 10 0.1 + .MEAS DC Iref FIND I(Rref) AT=5 + .MEAS DC Iout FIND I(Vmeas) AT=5 + .MEAS DC Ratio PARAM='Iout/Iref' + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "Ratio", 1.0, 0.1); + AssertMeasurementBetween(result, "Iref", 0.0015, 0.002); + AssertMeasurementBetween(result, "Iout", 0.0015, 0.002); + } + + // Prompt: Uses a parasitic-insensitive non-inverting SC integrator topology with four switches. + [Fact] + public void Switched_Capacitor_Non_Inverting_Integrator_fe6ed0e90e8ee278() + { + var result = RunAcceptedExample( + "deepseek:02253_3ead5301581d6df6:fe6ed0e90e8ee278", + """ + * Switched-Capacitor Non-Inverting Integrator + VIN in 0 DC 1 + S1 in left phi1 0 SMOD + S2 left 0 phi2 0 SMOD + S3 right 0 phi1 0 SMOD + S4 right nin phi2 0 SMOD + C1 left right 1p + C2 nin out 10p + Rf nin out 1000MEG + Eop out 0 0 nin 100k + Vphi1 phi1 0 PULSE(0 5 0 10n 10n 4u 10u) + Vphi2 phi2 0 PULSE(0 5 5u 10n 10n 4u 10u) + .MODEL SMOD SW(RON=10 ROFF=1E12 VT=2.5 VH=0.5) + .TRAN 10n 200u + .MEAS TRAN Vout100 FIND V(out) AT=100u + .MEAS TRAN Vout200 FIND V(out) AT=200u + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "Vout200", 1.8, 2.2); + AssertMeasurementBetween(result, "Vout100", 0.8, 1.2); + } + + // Prompt: Gilbert cell mixer using BJT differential pairs with 1 mA tail current + [Fact] + public void Gilbert_cell_mixer_with_BJT_differential_pairs_880d020fa847926b() + { + var result = RunAcceptedExample( + "deepseek:02083_4a99412d17e7ef6f:880d020fa847926b", + """ + * Gilbert cell mixer with BJT differential pairs + .MODEL NPN1 NPN(IS=1e-15 BF=200 VAF=50) + VCC VCC 0 5V + VEE VEE 0 -5V + I_EE em_lo VEE 1m + R1 VCC out_p 2k + R2 VCC out_n 2k + Q1 c1 LO+ em_lo NPN1 + Q2 c2 LO- em_lo NPN1 + Q3 out_p RF+ c1 NPN1 + Q4 out_n RF- c1 NPN1 + Q5 out_n RF+ c2 NPN1 + Q6 out_p RF- c2 NPN1 + V_RFp RF+ 0 SIN(2.5 0.01 100MEG) + V_RFn RF- 0 SIN(2.5 0.01 100MEG 0 0 180) + V_LOp LO+ 0 SIN(0 0.3 99MEG) + V_LOn LO- 0 SIN(0 0.3 99MEG 0 0 180) + .OP + .TRAN 1n 5u + .MEAS TRAN vout_pp PP V(out_p,out_n) FROM=1u TO=5u + .MEAS TRAN gain_db PARAM='20*log10(vout_pp/0.04)' + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "gain_db", 20.0, 35.0); + } + + // Prompt: Second-order multiple-feedback high-pass filter using an ideal opamp (E source with gain -100000). + [Fact] + public void Multiple_Feedback_High_Pass_Filter_Second_Order_f0_1kHz_31b3e0dca0a11e5c() + { + var result = RunAcceptedExample( + "deepseek:01678_616a07bd51688cb9:31b3e0dca0a11e5c", + """ + * Multiple-Feedback High-Pass Filter (Second-Order, f0~1kHz) + VIN in 0 AC 1 + C1 in a 10n + R4 a 0 7.5k + C2 a inv 10n + R3 out inv 33k + C5 a out 10n + E1 out 0 0 inv 100000 + .AC DEC 100 10 100k + .MEAS AC high_gain FIND VDB(out) AT=10k + .MEAS AC f3db WHEN VDB(out) = -3 RISE=1 + .MEAS AC low_gain FIND VDB(out) AT=100 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "high_gain", (-0.1), 1.0); + AssertMeasurementBetween(result, "f3db", 800.0, 1200.0); + AssertMeasurementLess(result, "low_gain", (-20.0)); + } + + // Prompt: The circuit is a voltage-to-current converter using an op-amp (modeled by E1) and an NPN transistor in a common-emitter configuration. + [Fact] + public void V_to_I_converter_with_grounded_load_load_between_VCC_and_collector_bbbdfbd51cd24f96() + { + var result = RunAcceptedExample( + "deepseek:01512_0cc10c2d1d090c46:bbbdfbd51cd24f96", + """ + * V-to-I converter with grounded load (load between VCC and collector) + VIN in 0 DC 0 + VCC vcc 0 DC 10 + RL vcc collector 1k + RS sense 0 1k + Q1 collector base sense QNPN + E1 base 0 in sense 100k + .model QNPN NPN(IS=1e-14 BF=1e9) + .op + .dc VIN 0 1 0.01 + .meas DC I_0p5 FIND I(RL) AT=0.5 + .meas DC I_1p0 FIND I(RL) AT=1.0 + .meas DC Error_0p5 param='abs(I_0p5 - 0.5e-3)' + .end + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "I_0p5", 0.0005, 1e-06); + AssertMeasurementNear(result, "I_1p0", 0.001, 2e-06); + } + + // Prompt: Design an active lead-lag compensator using an ideal op-amp with a non-inverting configuration. The circuit should provide phase lead at low frequencies and phase lag at high frequencies. Use an AC source of 1 V amplitude and perform an AC analysis from 1 Hz to 1 MHz. + [Fact] + public void Lead_Lag_Compensation_Network_ffc6c0a518283d2d() + { + var result = RunAcceptedExample( + "deepseek:00516_ffc6c0a518283d2d:ffc6c0a518283d2d", + """ + * Lead-Lag Compensation Network + * Active non-inverting configuration using ideal op-amp + V1 in 0 AC 1 + E1 out 0 in nminus 100000 + R2 out nminus 95k + C2 out nminus 1nF + R1 nminus n1 100k + C1 n1 0 10nF + RL out 0 10k + .AC DEC 100 1 1e6 + .MEAS AC phase_50Hz FIND VP(out) AT=50 + .MEAS AC phase_200Hz FIND VP(out) AT=200 + .MEAS AC phase_2kHz FIND VP(out) AT=2000 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementGreater(result, "phase_50Hz", 0.0); + AssertMeasurementGreater(result, "phase_200Hz", 0.0); + AssertMeasurementLess(result, "phase_2kHz", 0.0); + } + + // Prompt: Create a measured SPICE netlist for a series pass linear voltage regulator that uses an op-amp error amplifier and a BJT pass transistor. Include DC sweep and operating point analyses with measurements of output voltage and line regulation. + [Fact] + public void Series_Pass_Linear_Regulator_with_Op_Amp_Error_Amplifier_fe1f7543a24bb0af() + { + var result = RunAcceptedExample( + "deepseek:01873_0431d8397475da15:fe1f7543a24bb0af", + """ + * Series Pass Linear Regulator with Op-Amp Error Amplifier + VIN IN 0 DC 12 + VREF REF 0 DC 5 + R1 OUT FB 10k + R2 FB 0 10k + Rb DRV BASE 1k + Q1 IN BASE OUT QN + Rload OUT 0 100 + .MODEL QN NPN(IS=1e-14 BF=100) + E1 DRV 0 REF FB 100000 + .OP + .DC VIN 10 15 0.1 + .MEASURE DC VOUT_NOM FIND V(OUT) AT=12 + .MEASURE DC VOUT_MAX MAX V(OUT) + .MEASURE DC VOUT_MIN MIN V(OUT) + .MEASURE DC LINE_REG PARAM='(VOUT_MAX-VOUT_MIN)/(15-10)' + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "VOUT_NOM", 10.0, 0.5); + AssertMeasurementLess(result, "LINE_REG", 0.1); + } + + // Prompt: Beta-insensitive current source using an emitter follower (Q2) to buffer the voltage divider from the base current of Q1. + [Fact] + public void Beta_insensitive_BJT_bias_cell_4c0e8363f66aaefe() + { + var result = RunAcceptedExample( + "deepseek:01080_9e2895b972dc26fc:4c0e8363f66aaefe", + """ + * Beta-insensitive BJT bias cell + VCC VCC 0 DC 10 + R1 VCC B_Q2 7.5k + R2 B_Q2 0 2.5k + Q2 VCC B_Q2 E_Q2 NPN + Q1 C_OUT E_Q2 N_EMIT NPN + RE N_EMIT 0 1191 + Vout VCC C_OUT DC 0 + .MODEL NPN NPN(IS=1e-15 BF=100) + .OP + .DC VCC 5 15 0.1 + .MEAS DC I_nominal FIND I(Vout) AT=10 + .MEAS DC I_min MIN I(Vout) + .MEAS DC I_max MAX I(Vout) + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "I_nominal", 0.001, 5e-05); + } + + // Prompt: A voltage source with series resistance drives a parallel LC tank. + [Fact] + public void Damped_parallel_LC_tank_with_source_resistance_098732552dea7e61() + { + var result = RunAcceptedExample( + "deepseek:00542_1a6a0c449bb6e1ac:098732552dea7e61", + """ + * Damped parallel LC tank with source resistance + V1 in 0 DC 0 AC 1 + Rs in n1 100 + L1 n1 0 100u + C1 n1 0 10n + .AC DEC 1000 10k 1MEG + .MEAS AC V_max MAX vm(n1) + .MEAS AC f_low WHEN vm(n1)=0.707 CROSS=1 + .MEAS AC f_high WHEN vm(n1)=0.707 CROSS=2 + .MEAS AC f0 PARAM='sqrt(f_low*f_high)' + .MEAS AC BW PARAM='f_high - f_low' + .MEAS AC Q PARAM='f0/BW' + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "f0", 150000.0, 170000.0); + var Q = MeasurementValue(result, "Q"); + AssertMeasurementBetween(result, "Q", 0.9, 1.1); + AssertMeasurementNear(result, "V_max", 1.0, 0.01); + } + + // Prompt: Correlated double sampling (CDS) switched-capacitor amplifier that cancels input DC offset. + [Fact] + public void Correlated_Double_Sampling_Front_End_with_offset_cancellation_4cd08cbd0f1b3fce() + { + var result = RunAcceptedExample( + "deepseek:02279_63bef7514e4fb83d:4cd08cbd0f1b3fce", + """ + * Correlated Double Sampling Front-End with offset cancellation + * Input: VIN with 1V offset and 10mV 1kHz sine + * Clocks: phi1 (reset), phi2 (signal) + * Op-amp: E1 with gain 100k + * Capacitors: C1=10p, C2=1p => gain -10 + * Switches: S2,S3,S4, model swmod + C1 left mid 10p + C2 out inv 1p + R1 in left 1k + VIN in 0 DC 1 SIN(0 10m 1k) + Vphi1 phi1 0 PULSE(0 5 0 10n 10n 1u 300u) + Vphi2 phi2 0 PULSE(0 5 117u 10n 10n 50u 300u) + S2 mid inv phi2 0 swmod + S3 mid 0 phi1 0 swmod + S4 out inv phi1 0 swmod + E1 out 0 inv 0 100k + .model swmod SW(RON=100 ROFF=100MEG VT=2 VH=0.5) + .tran 0.1u 10m + .meas TRAN vout_avg AVG v(out) FROM=2m TO=10m + .meas TRAN vout_pp PP v(out) FROM=2m TO=10m + .meas TRAN offset_err AVG v(out) FROM=2m TO=10m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "vout_avg", 0.0, 0.025); + AssertMeasurementBetween(result, "vout_pp", 0.1, 0.3); + AssertMeasurementNear(result, "offset_err", 0.0, 0.025); + } + + // Prompt: Single-slope ADC front-end with current-source ramp and comparator. + [Fact] + public void Single_Slope_ADC_Ramp_and_Comparator_Front_End_2edde5b1053fbfe9() + { + var result = RunAcceptedExample( + "deepseek:02210_9f94c6af01750e4d:2edde5b1053fbfe9", + """ + * Single-Slope ADC Ramp and Comparator Front End + VIN in 0 DC 1.8 + I1 0 ramp 10u + C1 ramp 0 10p + S1 ramp 0 control 0 swmod + Vreset control 0 PULSE(5 0 0 1n 1n 2.5u 10u) + .MODEL swmod SW(RON=10 ROFF=100MEG VT=2.5 VH=0.5) + B_COMP out 0 V = IF(V(ramp) > V(in), 5, 0) + Rload out 0 10k + .TRAN 10n 10u + .MEASURE TRAN conv_time TRIG V(control) VAL=1 FALL=1 TARG V(out) VAL=2.5 RISE=1 + .MEASURE TRAN vramp_at_2us FIND V(ramp) AT=2u + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "conv_time", 1.7e-06, 1.9e-06); + AssertMeasurementBetween(result, "vramp_at_2us", 1.8, 2.0); + } + + // Prompt: Design an op-amp integrator with a reset switch across the capacitor using a behavioral voltage-controlled voltage source as the op-amp. + [Fact] + public void Op_amp_integrator_with_reset_switch_4ceab48fb57a0b8d() + { + var result = RunAcceptedExample( + "deepseek:00342_7de0d0852be23a4e:4ceab48fb57a0b8d", + """ + * Op-amp integrator with reset switch + R1 in neg 10k + C1 out neg 0.1u + E1 out 0 0 neg 100000 + R2 out 0 1Meg + VIN in 0 PULSE(0 1 1m 1n 1n 1m 10m) + S1 out neg reset 0 rsw + .MODEL rsw SW(RON=1 ROFF=1MEG VT=0.5 VH=0) + Vreset reset 0 PULSE(0 5 0 1n 1n 0.5m 10m) + .TRAN 0.1u 3m + .MEASURE TRAN vout_1ms FIND V(out) AT=1m + .MEASURE TRAN vout_2ms FIND V(out) AT=2m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "vout_1ms", 0.0, 0.05); + AssertMeasurementNear(result, "vout_2ms", (-1.0), 0.1); + } + + // Prompt: T-section LC impedance matching network designed for 50-ohm to 50-ohm match at 1 MHz. + [Fact] + public void T_section_LC_impedance_matching_network_51f36a1ff9dfde0d() + { + var result = RunAcceptedExample( + "deepseek:00674_551402857b5fb341:51f36a1ff9dfde0d", + """ + * T-section LC impedance matching network + V1 in 0 AC 1 + R1 in 1 50 + L1 1 2 1u + C1 2 0 787.5p + L2 2 3 1u + R2 3 0 50 + .AC DEC 100 100K 10MEG + .MEAS AC v_in_max MAX VM(1) + .MEAS AC v_out_max MAX VM(3) + .MEAS AC v_at_1meg FIND VM(1) AT=1e6 + .MEAS AC v_out_at_1meg FIND VM(3) AT=1e6 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "v_at_1meg", 0.5, 0.02); + AssertMeasurementNear(result, "v_out_at_1meg", 0.5, 0.02); + } + + // Prompt: Perform a transient simulation of a two-input CMOS NAND gate and measure the propagation delay from input B to the output falling edge. + [Fact] + public void CMOS_NAND2_gate_transient_response_019f78b37715758e() + { + var result = RunAcceptedExample( + "deepseek:00289_019f78b37715758e:019f78b37715758e", + """ + * CMOS NAND2 gate transient response + .MODEL nmos NMOS (VTO=0.7 KP=200u LAMBDA=0.01) + .MODEL pmos PMOS (VTO=-0.7 KP=80u LAMBDA=0.02) + VDD VDD 0 DC 5 + VA A 0 PULSE(0 5 5ns 0.1ns 0.1ns 15ns 40ns) + VB B 0 PULSE(0 5 10ns 0.1ns 0.1ns 15ns 40ns) + M1 VDD A out VDD pmos W=20u L=1u + M2 VDD B out VDD pmos W=20u L=1u + M3 out A n1 0 nmos W=10u L=1u + M4 n1 B 0 0 nmos W=10u L=1u + CL out 0 10f + .TRAN 0.1ns 100ns + .MEASURE TRAN tphl_B TRIG V(B) VAL=2.5 RISE=1 TARG V(out) VAL=2.5 FALL=1 + .MEASURE TRAN tplh_A TRIG V(A) VAL=2.5 FALL=1 TARG V(out) VAL=2.5 RISE=1 + .MEASURE TRAN vout_high MAX V(out) FROM=0 TO=100ns + .MEASURE TRAN vout_low MIN V(out) FROM=0 TO=100ns + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementLess(result, "tphl_B", 5e-09); + AssertMeasurementGreater(result, "vout_high", 4.5); + AssertMeasurementLess(result, "vout_low", 0.5); + } + + // Prompt: Buck converter preregulator steps down 12V to approximately 5.8V. + [Fact] + public void Buck_preregulator_followed_by_linear_post_regulator_0840b1618e309da3() + { + var result = RunAcceptedExample( + "deepseek:02002_ea04abc82d5a2115:0840b1618e309da3", + """ + * Buck preregulator followed by linear post-regulator + VIN in 0 DC 12 + Vclk clk 0 PULSE(0 5 0 1n 1n 5.33u 10u) + S1 in sw_out clk 0 swmod + .MODEL swmod SW(RON=1 ROFF=1MEG VT=2 VH=0.5) + D1 0 sw_out dmod + .MODEL dmod D(IS=1e-12) + L1 sw_out vmid 100u + C1 vmid 0 47u + E1 eout 0 vref vfb 10000 + Vref vref 0 DC 2.5 + Q1 vmid eout out qn + .MODEL qn NPN(IS=1e-15 BF=100) + R1 out vfb 10k + R2 vfb 0 10k + Rload out 0 10 + Cout out 0 100u + .op + .tran 0.1u 5m + .MEAS TRAN vout_avg AVG V(out) FROM=3m TO=5m + .MEAS TRAN vout_ripple PP V(out) FROM=3m TO=5m + .MEAS TRAN vmid_avg AVG V(vmid) FROM=3m TO=5m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "vout_avg", 5.0, 0.2); + AssertMeasurementLess(result, "vout_ripple", 0.05); + AssertMeasurementBetween(result, "vmid_avg", 5.5, 7.0); + } + + // Prompt: Create a single-balanced CMOS switching mixer. Use NMOS transistors for the switching pair and the transconductor. Apply a differential square-wave LO at 1MHz and an RF sine at 900kHz. Include a differential RC filter at the output and measure the peak-to-peak filtered differential voltage. + [Fact] + public void CMOS_Switching_Mixer_with_Differential_LO_Drive_d1a3aeda7154547e() + { + var result = RunAcceptedExample( + "deepseek:02090_26245fc2f7f62eb9:d1a3aeda7154547e", + """ + * CMOS Switching Mixer with Differential LO Drive + Vdd vdd 0 DC 5 + VLOp lop 0 PULSE(0 5 0 1n 1n 0.5u 1u) + VLOn lon 0 PULSE(5 0 0 1n 1n 0.5u 1u) + Vrf rfin 0 SIN(1.5 0.2 900k) + M1 d1 lop src 0 nmos W=100u L=2u + M2 d2 lon src 0 nmos W=100u L=2u + M3 src rfin s 0 nmos W=50u L=2u + Rs s 0 1k + R1 vdd d1 1k + R2 vdd d2 1k + Cdiff d1 d2 500pF + .MODEL nmos NMOS (VTO=0.7 KP=200u L=2u W=50u LAMBDA=0.02) + .TRAN 10n 200u + .MEAS TRAN v_pp_diff PP V(d1, d2) + .MEAS TRAN v_avg_diff AVG V(d1, d2) + .MEAS TRAN v_pp_abs PP V(d1) + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementGreater(result, "v_pp_diff", 0.01); + AssertMeasurementNear(result, "v_avg_diff", 0.0, 0.002); + AssertMeasurementGreater(result, "v_pp_abs", 0.1); + } + + // Prompt: Design a measured SPICE netlist for a SAR ADC's sample comparator front-end. Use a clocked switch, sampling capacitor, and a high-gain E-source comparator. Include a PULSE input and .MEAS to find the delay from input threshold crossing to output transition. + [Fact] + public void SAR_ADC_Sample_Comparator_Front_End_c039c5659f061254() + { + var result = RunAcceptedExample( + "deepseek:02220_9fc454c5e322422c:c039c5659f061254", + """ + * SAR ADC Sample Comparator Front End + VIN in 0 PULSE(0 2 0 10n 10n 1u 2u) + VCLK clk 0 PULSE(0 5 0 1n 1n 0.5u 1u) + VREF ref 0 DC 1.0 + S1 in ns clk 0 swmod + .MODEL swmod SW(RON=100 ROFF=1G VT=2.5 VH=0.1) + C1 ns 0 10p + E1 out 0 VALUE={IF(V(ns)>V(ref),5,0)} + R1 out 0 10k + VDD vdd 0 DC 5 + .TRAN 1n 3u + .MEAS TRAN t_clk_rise WHEN V(clk)=2.5 RISE=1 + .MEAS TRAN t_out_rise WHEN V(out)=2.5 RISE=1 + .MEAS TRAN t_in_1v WHEN V(in)=1.0 RISE=1 + .MEAS TRAN tpd PARAM='t_out_rise-t_in_1v' + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "tpd", 0.0, 5e-08); + } + + // Prompt: This is a second-order Sallen-Key Butterworth low-pass filter designed for a 1 kHz cutoff. + [Fact] + public void Sallen_Key_Butterworth_low_pass_filter_fc_1kHz_c361aef93ae4b20a() + { + var result = RunAcceptedExample( + "deepseek:01656_e2aec2e7e6ce45f6:c361aef93ae4b20a", + """ + * Sallen-Key Butterworth low-pass filter, fc=1kHz + Vin in 0 DC 0 AC 1 + R1 in A 10k + R2 A B 10k + C1 A out 22n + C2 B 0 11n + E1 out 0 B 0 1 + Vpos vcc 0 15 + Vneg vee 0 -15 + .AC DEC 100 1 100k + .MEAS AC dc_gain FIND VDB(out) AT=1 + .MEAS AC max_gain MAX VDB(out) + .MEAS AC fc WHEN VDB(out)=-3 + .MEAS AC gain_100 FIND VDB(out) AT=100 + .MEAS AC gain_10k FIND VDB(out) AT=10k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "dc_gain", 0.0, 0.1); + AssertMeasurementNear(result, "fc", 1000.0, 50.0); + AssertMeasurementNear(result, "gain_100", 0.0, 0.1); + AssertMeasurementLess(result, "gain_10k", (-38.0)); + AssertMeasurementNear(result, "max_gain", 0.0, 0.5); + } + + // Prompt: PWM DAC using a first-order RC low\u2011pass filter with R=10 k\u03a9 and C=10 nF. + [Fact] + public void PWM_DAC_with_RC_Reconstruction_Filter_5202e9dc6ff5596d() + { + var result = RunAcceptedExample( + "deepseek:02199_e6434294f80cb683:5202e9dc6ff5596d", + """ + * PWM DAC with RC Reconstruction Filter + Vpwm pwm 0 PULSE(0 3.3 0 10n 10n 5u 10u) + R1 pwm out 10k + C1 out 0 10n + .tran 0.1u 6m 0 0.1u + .measure TRAN vout_avg AVG V(out) FROM=5m TO=6m + .measure TRAN vout_ripple PP V(out) FROM=5m TO=6m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "vout_avg", 1.65, 0.05); + AssertMeasurementLess(result, "vout_ripple", 0.1); + } + + // Prompt: Logarithmic amplifier using an op-amp model (E1) and diode feedback + [Fact] + public void Diode_Log_Converter_with_Op_Amp_Feedback_9655093988b00bda() + { + var result = RunAcceptedExample( + "deepseek:00828_8e9c172e2208ea0b:9655093988b00bda", + """ + * Diode Log Converter with Op-Amp Feedback + VIN in 0 DC 1 + R1 in in_n 10k + E1 out 0 0 in_n 1e6 + D1 in_n out DMOD + .MODEL DMOD D(IS=1e-12 N=1 RS=1) + .OP + .DC VIN 0.1 10 0.1 + .MEAS DC out_at_1V FIND V(out) AT=1 + .MEAS DC out_at_0p1V FIND V(out) AT=0.1 + .MEAS DC out_at_10V FIND V(out) AT=10 + .END + """); + + AssertAllMeasurementsSuccessful(result); + var out_0p1 = MeasurementValue(result, "out_at_0p1V"); + var out_10 = MeasurementValue(result, "out_at_10V"); + Assert.True(((out_10 < out_0p1)), CaseLabel(result)); + AssertMeasurementBetween(result, "out_at_1V", (-0.5), (-0.45)); + } + + // Prompt: NMOS source follower with resistive feedback divider and behavioral error amplifier. + [Fact] + public void NMOS_Source_Follower_Linear_Regulator_39fae670913ded5c() + { + var result = RunAcceptedExample( + "deepseek:01894_a07fcea2cf74c777:39fae670913ded5c", + """ + * NMOS Source-Follower Linear Regulator + VIN in 0 DC 12 + VREF ref 0 DC 1.25 + R1 out fb 16.5k + R2 fb 0 10k + Eamp gate 0 ref fb 100k + M1 in gate out out NMOS1 L=1u W=500u + .MODEL NMOS1 NMOS (LEVEL=1 VTO=1.5 KP=500u LAMBDA=0.02) + RLOAD out 0 50 + .OP + .DC VIN 7 18 0.1 + .MEAS DC Vout_nom FIND V(out) AT=12 + .MEAS DC Vout_min FIND V(out) AT=7 + .MEAS DC Vout_max FIND V(out) AT=18 + .MEAS DC delta_Vout PARAM='Vout_max-Vout_min' + .MEAS DC line_reg PARAM='delta_Vout/11' + .MEAS DC Iq_nom FIND I(VIN) AT=12 + .MEAS DC Iout_nom FIND I(RLOAD) AT=12 + .MEAS DC Pout PARAM='Vout_nom*Iout_nom' + .MEAS DC Pin PARAM='-12*Iq_nom' + .MEAS DC efficiency PARAM='Pout/Pin*100' + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "Vout_nom", 3.3, 0.1); + AssertMeasurementBetween(result, "line_reg", 0.0, 0.001); + AssertMeasurementBetween(result, "efficiency", 20.0, 50.0); + } + + // Prompt: Create a non-inverting amplifier using an ideal op-amp with open-loop gain of 1,000,000. Include an input bias resistor of 10k\u03a9 from the non-inverting input to ground. Set the feedback resistors both to 10k\u03a9 for a gain of 2. Apply a 0.1V DC input and a 1V AC input. Run DC and AC analyses, then measure the DC output voltage and the AC output amplitude at 1kHz. + [Fact] + public void Non_inverting_op_amp_amplifier_with_input_bias_resistor_7efbf9aa58a38057() + { + var result = RunAcceptedExample( + "deepseek:01445_e246dee8292331f0:7efbf9aa58a38057", + """ + * Non-inverting op-amp amplifier with input bias resistor + VIN in 0 DC 0.1 AC 1 + Rbias in 0 10k + E1 out 0 in inv 1e6 + Rf out inv 10k + Rg inv 0 10k + .DC VIN 0.1 0.1 0.1 + .AC DEC 10 1 1MEG + .MEASURE DC vout_dc FIND V(out) AT=0.1 + .MEASURE AC vout_ac_mag FIND VM(out) AT=1k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "vout_dc", 0.2, 1e-06); + AssertMeasurementNear(result, "vout_ac_mag", 2.0, 0.01); + } + + // Prompt: Precision active clamp circuit using op-amp with diode in feedback. + [Fact] + public void Precision_Active_Clamp_01405a6b8890e56c() + { + var result = RunAcceptedExample( + "deepseek:01574_0cbaf8762a378432:01405a6b8890e56c", + """ + * Precision Active Clamp + VIN in 0 SIN(0 2 1k 0 0) + R1 in inv 10k + R2 out inv 10k + Rload out 0 100k + Rleak op_out 0 1e9 + E1 op_out_raw 0 inv 0 100000 + Ropout op_out_raw op_out 10 + D1 op_out out DMOD + .MODEL DMOD D(IS=1e-14 RS=1 N=1.5 CJO=10p) + Cstab op_out out 50pF + .TRAN 1u 5m 0 1u + .MEAS TRAN vout_clamp_max MAX V(out) FROM=0 TO=0.5m + .MEAS TRAN vout_neg_peak MAX V(out) FROM=0.5m TO=1m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementLess(result, "vout_clamp_max", 0.1); + AssertMeasurementGreater(result, "vout_neg_peak", 1.8); + AssertMeasurementNear(result, "vout_neg_peak", 2.0, 0.2); + } + + // Prompt: CMOS differential pair with NMOS input devices (W=5u) and PMOS current mirror load (W adjusted to 0.5u to achieve desired output bias). + [Fact] + public void CMOS_Differential_Pair_with_Current_Mirror_Load_139b3bcc02152426() + { + var result = RunAcceptedExample( + "deepseek:01269_3e5bf44de54381c9:139b3bcc02152426", + """ + * CMOS Differential Pair with Current-Mirror Load + .MODEL NMOS NMOS(LEVEL=1 VTO=0.7 KP=100u LAMBDA=0.1) + .MODEL PMOS PMOS(LEVEL=1 VTO=-0.7 KP=50u LAMBDA=0.1) + VDD VDD 0 5 + VSS VSS 0 -5 + I1 TAIL VSS 200U + M1 D1 INP TAIL VSS NMOS W=5u L=1u + M2 OUT INN TAIL VSS NMOS W=5u L=1u + M3 D1 D1 VDD VDD PMOS W=0.5u L=1u + M4 OUT D1 VDD VDD PMOS W=0.5u L=1u + VINP INP 0 DC 0 AC 0.5 + VINN INN 0 DC 0 AC -0.5 + .OP + .DC VINP -0.5 0.5 0.01 + .AC DEC 10 1Hz 100KHz + .MEAS DC VOUT_BALANCED FIND V(OUT) AT=0 + .MEAS AC GAIN_DC FIND VM(OUT) AT=1 + .MEAS AC GAIN_MAX MAX VM(OUT) + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "VOUT_BALANCED", 1.5, 2.5); + AssertMeasurementBetween(result, "GAIN_DC", 10.0, 25.0); + AssertMeasurementRatioBetween(result, "GAIN_DC", "GAIN_MAX", 0.95, 1.05); + } + + // Prompt: Design a diode-antilog amplifier using an op-amp, then simulate its DC transfer characteristic and verify the exponential relationship. + [Fact] + public void Diode_Antilog_Converter_with_Op_Amp_Feedback_e497a1b67fe27692() + { + var result = RunAcceptedExample( + "deepseek:00836_1be38497d4d84eae:e497a1b67fe27692", + """ + * Diode Antilog Converter with Op-Amp Feedback + VIN in 0 DC 0 + D1 in inv DM + Rf out inv 1k + E1 out 0 inv 0 -1E5 + .MODEL DM D(IS=1E-12 N=1 RS=0) + .DC VIN 0 0.55 0.01 + .OP + .MEAS DC vout_05 FIND V(out) AT=0.5 + .MEAS DC vout_055 FIND V(out) AT=0.55 + .MEAS DC ratio_antilog PARAM vout_055/vout_05 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "vout_05", (-0.5), (-0.01)); + AssertMeasurementBetween(result, "vout_055", (-3.0), (-0.5)); + AssertMeasurementBetween(result, "ratio_antilog", 5.0, 8.0); + } + + // Prompt: Design a complementary emitter follower buffer using NPN and PNP BJTs and verify its transfer characteristic. + [Fact] + public void Complementary_emitter_follower_buffer_8c1035ced5f2358d() + { + var result = RunAcceptedExample( + "deepseek:00959_eeb1156eccfe6a13:8c1035ced5f2358d", + """ + * Complementary emitter follower buffer + VCC pos 0 DC 12 + VEE neg 0 DC -12 + VIN in 0 SIN(0 5 1k 0 0) + Q1 pos in out NPNMOD + Q2 neg in out PNPMOD + Rload out 0 1k + .MODEL NPNMOD NPN(IS=1e-14 BF=200 VAF=100) + .MODEL PNPMOD PNP(IS=1e-14 BF=200 VAF=100) + .OP + .TRAN 1us 2ms + .MEAS TRAN vout_max MAX V(out) FROM=0 TO=2ms + .MEAS TRAN vout_min MIN V(out) FROM=0 TO=2ms + .MEAS TRAN vout_pp PARAM='vout_max - vout_min' + .MEAS TRAN vout_avg AVG V(out) FROM=0 TO=2ms + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "vout_pp", 8.0, 9.0); + AssertMeasurementNear(result, "vout_avg", 0.0, 0.5); + AssertMeasurementBetween(result, "vout_max", 4.0, 5.0); + AssertMeasurementBetween(result, "vout_min", (-5.0), (-4.0)); + } + + // Prompt: CMOS transmission gate consisting of NMOS M1 and PMOS M2 passes input signal to hold capacitor CH when control pulse is high. + [Fact] + public void CMOS_Transmission_Gate_Sample_and_Hold_cb3843f8a031e129() + { + var result = RunAcceptedExample( + "deepseek:01349_ccd707d1fc9fad10:cb3843f8a031e129", + """ + * CMOS Transmission Gate Sample-and-Hold + VDD vdd 0 DC 5 + VIN in 0 SIN(2 0.5 1k) + VCTRL ctrl 0 PULSE(0 5 1u 1n 1n 500n 2u) + VCTRL_BAR ctrl_bar 0 PULSE(5 0 1u 1n 1n 500n 2u) + M1 in ctrl out 0 N1 W=10u L=1u + M2 in ctrl_bar out vdd P1 W=20u L=1u + CH out 0 100pF + .MODEL N1 NMOS(VTO=1 KP=100u LAMBDA=0.02) + .MODEL P1 PMOS(VTO=-1 KP=40u LAMBDA=0.02) + .TRAN 10n 5u + .MEAS TRAN vin_samp FIND V(in) AT=1.5u + .MEAS TRAN vout_hold FIND V(out) AT=2u + .MEAS TRAN hold_error PARAM='vout_hold - vin_samp' + .END + """); + + AssertAllMeasurementsSuccessful(result); + var vin = MeasurementValue(result, "vin_samp"); + AssertMeasurementNear(result, "vout_hold", vin, 0.05); + AssertMeasurementBetween(result, "hold_error", (-0.05), 0.05); + } + + // Prompt: Design a MOS source-degenerated current mirror with NMOS transistors, include source resistors and measure the output current versus supply voltage. + [Fact] + public void MOS_Source_Degenerated_Current_Mirror_31a03ac2a3a21a4c() + { + var result = RunAcceptedExample( + "deepseek:01286_ed04ca14d3481a82:31a03ac2a3a21a4c", + """ + * MOS Source-Degenerated Current Mirror + VDD vdd 0 DC 5 + Rref vdd d1 10k + M1 d1 d1 s1 0 nmos W=10u L=1u + R1 s1 0 200 + M2 d2 d1 s2 0 nmos W=20u L=1u + R2 s2 0 200 + Rload vdd d2 1k + .MODEL nmos NMOS (VTO=1 KP=200u LAMBDA=0.02) + .OP + .DC VDD 0 10 0.1 + .MEAS DC IOUT FIND I(Rload) AT=5 + .MEAS DC IREF FIND I(Rref) AT=5 + .MEAS DC RATIO PARAM=IOUT/IREF + .MEAS DC VGATE FIND V(d1) AT=5 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementRatioBetween(result, "IOUT", "IREF", 1.0, 2.5); + AssertMeasurementBetween(result, "VGATE", 0.5, 4.5); + } + + // Prompt: CMOS transmission gate sample-and-hold using NMOS and PMOS with complementary gate drive. + [Fact] + public void CMOS_Transmission_Gate_Sample_and_Hold_High_Impedance_Hold_61afe890c44bd47e() + { + var result = RunAcceptedExample( + "deepseek:01348_6ee9dd0a9d12f397:61afe890c44bd47e", + """ + * CMOS Transmission Gate Sample-and-Hold High Impedance Hold + VDD vdd 0 DC 5 + VSIG in 0 SIN(2.5 1 1k 0 0) + VCTRL ctrl 0 PULSE(0 5 0 1n 1n 10u 20u) + VCTRLB ctrlb 0 PULSE(5 0 0 1n 1n 10u 20u) + M1 in ctrl out 0 NMOD W=10u L=1u + M2 in ctrlb out vdd PMOD W=20u L=1u + .model NMOD NMOS(LEVEL=1 VTO=0.7 KP=200u LAMBDA=0.02) + .model PMOD PMOS(LEVEL=1 VTO=-0.7 KP=80u LAMBDA=0.02) + C1 out 0 10p + R1 out 0 1e12 + .tran 0.1u 50u + .meas TRAN vout_at_5u FIND v(out) AT=5u + .meas TRAN vout_at_10u FIND v(out) AT=10u + .meas TRAN vout_at_15u FIND v(out) AT=15u + .meas TRAN hold_error PARAM='vout_at_15u - vout_at_10u' + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "hold_error", (-0.001), 0.001); + } + + // Prompt: Design a relaxation oscillator using a comparator built from an E-source, resistors, and a capacitor. + [Fact] + public void Relaxation_Oscillator_using_Comparator_E_source_d4f80df9212a5cb8() + { + var result = RunAcceptedExample( + "deepseek:00418_52140d9a844e43f2:d4f80df9212a5cb8", + """ + * Relaxation Oscillator using Comparator (E-source) + Vcc vcc 0 DC 5 + Vee vee 0 DC -5 + * Comparator with hysteresis + Ecomm out 0 VALUE={ IF(V(ninv) > V(inv), V(vcc), V(vee)) } + R1 out ninv 10k + R2 ninv 0 10k + R3 out inv 10k + C1 inv 0 1n + .ic v(out)=5 v(inv)=0 + .tran 0.01u 100u uic + .measure tran period trig v(out) val=0 rise=1 targ v(out) val=0 rise=2 + .measure tran freq param=1/period + .measure tran vout_avg avg v(out) + .measure tran vout_pp pp v(out) + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "period", 2e-05, 2.5e-05); + AssertMeasurementBetween(result, "freq", 40000.0, 50000.0); + AssertMeasurementBetween(result, "vout_avg", (-0.5), 0.5); + AssertMeasurementBetween(result, "vout_pp", 9.0, 11.0); + } + + // Prompt: Passive 3rd-order Bessel low-pass filter with 50-ohm terminations and 10 kHz cutoff. + [Fact] + public void Bessel_3rd_order_low_pass_ladder_filter_with_correct_component_values_2ca8269becc17b1e() + { + var result = RunAcceptedExample( + "deepseek:00652_29a6c6cca8a44964:2ca8269becc17b1e", + """ + * Bessel 3rd-order low-pass ladder filter with correct component values + Rsource in n1 50 + L1 n1 n2 0.268m + C2 n2 0 0.309u + L3 n2 out 1.753m + Rload out 0 50 + VIN in 0 DC 0 AC 1 + .AC DEC 100 100 100k + .MEAS AC gain_low FIND VDB(out) AT=100 + .MEAS AC gain_cut FIND VDB(out) AT=10000 + .MEAS AC gain_stop FIND VDB(out) AT=100000 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "gain_low", (-6.1), (-6.0)); + AssertMeasurementBetween(result, "gain_cut", (-9.1), (-8.9)); + AssertMeasurementLess(result, "gain_stop", (-30.0)); + } + + // Prompt: Create a precision half-wave rectifier using an ideal behavioral op-amp with gain 100k and a diode. The input is a 2V peak, 1kHz sine wave. Provide a SPICE netlist with transient analysis. + [Fact] + public void Precision_Half_Wave_Rectifier_using_Behavioral_Op_Amp_897d094c50be1a71() + { + var result = RunAcceptedExample( + "deepseek:00715_0eb4afa1c5774a2f:897d094c50be1a71", + """ + * Precision Half-Wave Rectifier using Behavioral Op-Amp + VIN in 0 SIN(0 2 1k) + E1 op_out 0 in out 100000 + D1 op_out out dmod + R1 out 0 10k + R2 in 0 100k + .model dmod D (IS=1e-12 RS=1) + .tran 0.1u 5m + .meas TRAN maxv max v(out) from=0 to=5m + .meas TRAN minv min v(out) from=0 to=5m + .meas TRAN avgr avg v(out) from=0 to=5m + .end + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "maxv", 2.0, 0.1); + AssertMeasurementLess(result, "minv", 0.1); + AssertMeasurementNear(result, "avgr", 0.6366, 0.05); + } + + // Prompt: Create a SPICE netlist for an inverting op-amp active clamp that limits the output to approximately \xb15 volts. The input is a 2V amplitude 1kHz sine wave, and the circuit uses a diode feedback network with DC reference voltages. + [Fact] + public void Op_Amp_Active_Clamp_with_Diode_Feedback_641a98065ea39b7f() + { + var result = RunAcceptedExample( + "deepseek:01568_4b2d2e83dcd9259b:641a98065ea39b7f", + """ + * Op-Amp Active Clamp with Diode Feedback + VIN in 0 SIN(0 2 1k) + E_OP out 0 inv 0 100000 + R1 in inv 1k + R2 out inv 10k + D1 out pl Dmod + VPHIGH pl inv DC 4.3 + D2 inv nl Dmod + VNLOW nl out DC 4.3 + .MODEL Dmod D(IS=1e-14) + .TRAN 0.01m 2m 0 0.01m + .MEAS TRAN max_out MAX V(out) FROM=0 TO=2m + .MEAS TRAN min_out MIN V(out) FROM=0 TO=2m + .MEAS TRAN max_in MAX V(in) FROM=0 TO=2m + .MEAS TRAN min_in MIN V(in) FROM=0 TO=2m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "max_out", 4.7, 5.3); + AssertMeasurementBetween(result, "min_out", (-5.3), (-4.7)); + AssertMeasurementBetween(result, "max_in", 1.9, 2.1); + AssertMeasurementBetween(result, "min_in", (-2.1), (-1.9)); + } + + // Prompt: All-pass filter with ideal op-amp (E source), two 10k\u03a9 resistors, and a 10nF capacitor. + [Fact] + public void All_pass_phase_shifter_using_ideal_op_amp_9c3a5c29dc075ebe() + { + var result = RunAcceptedExample( + "deepseek:00522_2f86b780cef119ff:9c3a5c29dc075ebe", + """ + * All-pass phase shifter using ideal op-amp + VIN in 0 DC 0 AC 1 + R1 in neg 10k + R2 out neg 10k + R3 in pos 10k + C1 pos 0 10n + E1 out 0 pos neg 1e6 + .AC DEC 10 1 100k + .MEAS AC mag_1 FIND VDB(out) AT=1 + .MEAS AC mag_f0 FIND VDB(out) AT=1591.5 + .MEAS AC mag_100k FIND VDB(out) AT=100k + .MEAS AC phase_1 FIND VP(out) AT=1 + .MEAS AC phase_f0 FIND VP(out) AT=1591.5 + .MEAS AC phase_100k FIND VP(out) AT=100k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "mag_1", (-0.1), 0.1); + AssertMeasurementBetween(result, "mag_f0", (-0.1), 0.1); + AssertMeasurementBetween(result, "mag_100k", (-0.1), 0.1); + AssertMeasurementBetween(result, "phase_1", (-0.05), 0.05); + AssertMeasurementBetween(result, "phase_f0", (-1.65), (-1.5)); + AssertMeasurementBetween(result, "phase_100k", (-3.2), (-3.0)); + } + + // Prompt: RC high-pass filter acting as a differentiator for a 1kHz square wave + [Fact] + public void RC_Differentiator_with_edge_detection_4c04ce0ad58911dd() + { + var result = RunAcceptedExample( + "deepseek:00637_f930836b69851fff:4c04ce0ad58911dd", + """ + * RC Differentiator with edge detection + R1 out 0 1k + C1 in out 1n + VIN in 0 PULSE(0 5 0 10n 10n 0.5m 1m) + .TRAN 0.1u 2m 0 1n + .MEAS TRAN vmax MAX V(out) FROM=0 TO=2m + .MEAS TRAN vmin MIN V(out) FROM=0 TO=2m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "vmax", 5.0, 0.5); + AssertMeasurementNear(result, "vmin", (-5.0), 0.5); + } + + // Prompt: BJT bistable latch with set/reset inputs using cross-coupled NPN transistors and diode steering. + [Fact] + public void BJT_Bistable_Multivibrator_Latch_with_SET_RESET_cf57d769a5840ea1() + { + var result = RunAcceptedExample( + "deepseek:01167_2a4864f294863e04:cf57d769a5840ea1", + """ + * BJT Bistable Multivibrator Latch with SET/RESET + VCC 1 0 DC 5 + Vset set 0 PULSE(0 5 10u 0.1u 0.1u 5u 100u) + Vrst rst 0 PULSE(0 5 30u 0.1u 0.1u 5u 100u) + Q1 out q1_base 0 npnmod + Q2 outbar q2_base 0 npnmod + Rc1 1 out 1k + Rc2 1 outbar 1k + R3 outbar q1_base 10k + R4 out q2_base 10k + R5 q1_base 0 10k + R6 q2_base 0 9.1k + Rset set_node set 1k + Dset set_node q2_base Dmod + Rsetpd set_node 0 10k + Rrst rst_node rst 1k + Drst rst_node q1_base Dmod + Rrstpd rst_node 0 10k + C1 out 0 10pF + C2 outbar 0 10pF + .MODEL npnmod NPN(IS=1e-15 BF=100 VAF=50) + .MODEL Dmod D(IS=1e-14) + .TRAN 0.1u 100u UIC + .IC V(out)=0.2 V(outbar)=5 + .OPTIONS RELTOL=1e-3 ITL1=200 + .MEAS TRAN t_rise WHEN V(out)=2.5 TD=10u RISE=1 + .MEAS TRAN t_fall WHEN V(out)=2.5 TD=30u FALL=1 + .MEAS TRAN v_out_20u FIND V(out) AT=20u + .MEAS TRAN v_out_40u FIND V(out) AT=40u + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "t_rise", 1e-05, 1.5e-05); + AssertMeasurementBetween(result, "t_fall", 3e-05, 3.5e-05); + AssertMeasurementNear(result, "v_out_20u", 5.0, 0.5); + AssertMeasurementNear(result, "v_out_40u", 0.2, 0.2); + } + + // Prompt: Design a dual-output power supply that rectifies a 60Hz AC input into both a positive and a negative DC voltage using a center-tapped transformer simulated by two out-of-phase sine sources. + [Fact] + public void Dual_Polarity_Full_Wave_Rectifier_Supply_fe7bc60aced2a65a() + { + var result = RunAcceptedExample( + "deepseek:00704_e9ad9b0267e251ca:fe7bc60aced2a65a", + """ + * Dual-Polarity Full-Wave Rectifier Supply + V1 A 0 SIN(0 10 60 0 0 0) Rser=1 + V2 0 B SIN(0 10 60 0 0 180) Rser=1 + D1 A voutp DN + D2 voutn B DN + C1 voutp 0 1000u IC=0 + C2 0 voutn 1000u IC=0 + R1 voutp 0 100 + R2 voutn 0 100 + .MODEL DN D(IS=1e-12 RS=1 CJO=5p) + .TRAN 1u 100m 0 1u UIC + .MEAS TRAN vpos_avg AVG V(voutp) FROM=80m TO=100m + .MEAS TRAN vneg_avg AVG V(voutn) FROM=80m TO=100m + .MEAS TRAN vpos_max MAX V(voutp) FROM=80m TO=100m + .MEAS TRAN vpos_min MIN V(voutp) FROM=80m TO=100m + .MEAS TRAN vneg_max MAX V(voutn) FROM=80m TO=100m + .MEAS TRAN vneg_min MIN V(voutn) FROM=80m TO=100m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "vpos_avg", 8.0, 10.0); + AssertMeasurementBetween(result, "vneg_avg", (-10.0), (-8.0)); + var vpos_ripple = (MeasurementValue(result, "vpos_max") - MeasurementValue(result, "vpos_min")); + Assert.True(((vpos_ripple < 2.0)), CaseLabel(result)); + var vneg_ripple = (MeasurementValue(result, "vneg_max") - MeasurementValue(result, "vneg_min")); + Assert.True(((vneg_ripple < 2.0)), CaseLabel(result)); + } + + // Prompt: Design an op-amp integrator with a reset switch using a behavioral voltage-controlled voltage source. The integrator should have an input resistor of 10k and a feedback capacitor of 0.1uF. Apply a 1V, 1ms pulse and measure the output before and after the reset. + [Fact] + public void Op_Amp_Integrator_with_Reset_Switch_Approximation_aac636b8aa4b025d() + { + var result = RunAcceptedExample( + "deepseek:00336_247b49a0ed2565bb:aac636b8aa4b025d", + """ + * Op-Amp Integrator with Reset Switch Approximation + Vin in 0 PULSE(0 1 0 1u 1u 1m 2m) + Rin in inv 10k + Cfb inv out 0.1uF + Eamp out 0 inv 0 100000 + Sreset inv out reset_ctrl 0 SWMOD + Vreset reset_ctrl 0 PULSE(0 5 1.5m 1u 1u 0.5m 2m) + .MODEL SWMOD SW(RON=10 ROFF=100MEG VT=2 VH=0.5) + .TRAN 1u 4m + .MEAS TRAN vout_int FIND V(out) AT=1.4m + .MEAS TRAN vout_reset FIND V(out) AT=2.1m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "vout_int", (-1.0), 0.1); + AssertMeasurementNear(result, "vout_reset", 0.0, 0.1); + } + + // Prompt: Op-amp subtractor with all resistors matched (10 k\u03a9) and op-amp gain 100 k. + [Fact] + public void Op_Amp_Subtractor_with_Matched_Resistors_1919307ebf0103ec() + { + var result = RunAcceptedExample( + "deepseek:01464_1919307ebf0103ec:1919307ebf0103ec", + """ + * Op-Amp Subtractor with Matched Resistors + V1 in 0 DC 1 AC 0.5 + V2 in2 0 DC 2 AC -0.5 + R1 in vin_n 10k + R2 vin_n out 10k + R3 in2 vin_p 10k + R4 vin_p 0 10k + E1 out 0 vin_p vin_n 100k + .OP + .DC V1 1 1 1 + .AC DEC 10 1 1MEG + .MEAS DC vout_dc FIND V(out) AT=1 + .MEAS AC gain_db FIND VDB(out) AT=1000 + .MEAS AC vout_ac FIND V(out) AT=1000 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "vout_dc", 1.0, 0.01); + AssertMeasurementNear(result, "gain_db", 0.0, 0.1); + AssertMeasurementNear(result, "vout_ac", (-1.0), 0.01); + } + + // Prompt: Design a linear post-regulator following a buck switching preregulator. Model the buck converter with a switch, diode, inductor and capacitor. Use a NPN pass transistor and an op-amp error amplifier for the linear stage. Simulate transient and DC operating point. + [Fact] + public void Linear_Post_Regulator_with_Switching_Preregulator_10f92e68a452642a() + { + var result = RunAcceptedExample( + "deepseek:02007_2558774621244a4d:10f92e68a452642a", + """ + * Linear Post-Regulator with Switching Preregulator + VIN vin 0 DC 12 + Vctrl ctrl 0 PULSE(0 5 0 1n 1n 4.1u 10u) + S1 vin swctrl ctrl 0 SW1 + .MODEL SW1 SW(RON=0.1 ROFF=1MEG VT=2.5 VH=0.5) + D1 0 swctrl DMOD + .MODEL DMOD D(IS=1n RS=0.1) + L1 swctrl pre_reg 100u + C1 pre_reg 0 100u IC=0 + VREF vref 0 DC 2.5 + R1 out fb 1k + R2 fb 0 3.3k + E1 eout 0 vref fb 100k + Rb eout qbase 100 + Q1 pre_reg qbase out QNPN + .MODEL QNPN NPN(IS=1e-14 BF=100) + Cout out 0 100u IC=0 + Rload out 0 10 + .OP + .TRAN 0.1u 2m 0 0.1u UIC + .MEAS TRAN avg_pre AVG V(pre_reg) FROM=1.5m TO=2m + .MEAS TRAN ripple_pre PP V(pre_reg) FROM=1.5m TO=2m + .MEAS TRAN avg_out AVG V(out) FROM=1.5m TO=2m + .MEAS TRAN ripple_out PP V(out) FROM=1.5m TO=2m + .MEAS TRAN i_load AVG I(Rload) FROM=1.5m TO=2m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "avg_out", 3.2, 3.35); + AssertMeasurementBetween(result, "ripple_out", 0.0, 0.01); + AssertMeasurementBetween(result, "avg_pre", 4.5, 5.5); + AssertMeasurementBetween(result, "ripple_pre", 0.01, 0.5); + AssertMeasurementBetween(result, "i_load", 0.3, 0.35); + } + + // Prompt: Greinacher voltage quadrupler using four diodes and four capacitors + [Fact] + public void Greinacher_Voltage_Quadrupler_extended_simulation_for_steady_state_322835b749188597() + { + var result = RunAcceptedExample( + "deepseek:00871_266ae89d9a9ebae8:322835b749188597", + """ + * Greinacher Voltage Quadrupler (extended simulation for steady-state) + VIN in 0 SIN(0 10 1k 0 0 0) + C1 in n1 10u + D1 0 n1 DMOD + D2 n1 out1 DMOD + C2 out1 0 10u + C3 in n2 10u + D3 out1 n2 DMOD + D4 n2 out DMOD + C4 out 0 10u + RLOAD out 0 100k + .MODEL DMOD D(IS=1e-12 RS=1 N=1) + .TRAN 10u 200m 0 10u + .MEASURE TRAN VOUT_AVG AVG V(out) FROM=190m TO=200m + .MEASURE TRAN VOUT_RIPPLE PP V(out) FROM=190m TO=200m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "VOUT_AVG", 36.0, 42.0); + AssertMeasurementLess(result, "VOUT_RIPPLE", 2.0); + } + + // Prompt: Inverting op-amp amplifier with voltage gain set to -10 (Rf/Rin = 10k/1k), including an input bias current compensation resistor Rbias = 909 ohms (Rin||Rf) on the non-inverting terminal. + [Fact] + public void Inverting_Op_Amp_Amplifier_with_Input_Bias_Compensation_Resistor_0b42839ee982e3f1() + { + var result = RunAcceptedExample( + "deepseek:01435_f84e2fd5de2dfaaf:0b42839ee982e3f1", + """ + * Inverting Op-Amp Amplifier with Input Bias Compensation Resistor + VIN in 0 DC 0 AC 1 + Rin in neg 1k + Rf out neg 10k + Rbias pos 0 909 + E1 out 0 pos neg 100k + Rload out 0 10k + .OP + .DC VIN -1 1 0.01 + .AC DEC 10 1 1MEG + .MEAS DC vout_dc FIND V(out) AT=0 + .MEAS AC gain_db MAX VDB(out) + .MEAS AC gain_lin FIND V(out) AT=1 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "vout_dc", 0.0, 1e-09); + AssertMeasurementBetween(result, "gain_db", 19.5, 20.5); + AssertMeasurementBetween(result, "gain_lin", (-10.5), (-9.5)); + } + + // Prompt: Design a CMOS inverter using a 5V supply with a 1 pF capacitive load. Apply a 0 to 5V pulse input at 10 MHz and measure the output rise and fall times. + [Fact] + public void CMOS_inverter_with_capacitive_load_and_rise_fall_measurement_5394cbb65a1a4c29() + { + var result = RunAcceptedExample( + "deepseek:01355_02f0bd398b039959:5394cbb65a1a4c29", + """ + * CMOS inverter with capacitive load and rise/fall measurement + VDD vdd 0 DC 5 + VIN in 0 PULSE(0 5 0 1n 1n 50n 100n) + Mp1 out in vdd vdd pmos W=4u L=0.5u + Mn1 out in 0 0 nmos W=2u L=0.5u + Cload out 0 1p + .MODEL nmos NMOS(VTO=1 KP=100u LAMBDA=0.02) + .MODEL pmos PMOS(VTO=-1 KP=50u LAMBDA=0.02) + .TRAN 0.1n 200n + .MEASURE TRAN trise TRIG V(out) VAL=0.5 RISE=1 TARG V(out) VAL=4.5 RISE=1 + .MEASURE TRAN tfall TRIG V(out) VAL=4.5 FALL=1 TARG V(out) VAL=0.5 FALL=1 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "trise", 1e-12, 1e-07); + AssertMeasurementBetween(result, "tfall", 1e-12, 1e-07); + } + + // Prompt: Design a standard CMOS inverter with a 1pF capacitive load and measure the output rise and fall times. + [Fact] + public void CMOS_Inverter_Rise_and_Fall_Time_Measurement_248df222f21aac00() + { + var result = RunAcceptedExample( + "deepseek:01353_f577d51eeb370885:248df222f21aac00", + """ + * CMOS Inverter Rise and Fall Time Measurement + M1 out in VDD VDD pmos W=10u L=1u + M2 out in 0 0 nmos W=5u L=1u + Cload out 0 1p + VDD VDD 0 DC 3.3 + Vin in 0 PULSE(0 3.3 0 1n 1n 50n 100n) + .MODEL nmos NMOS (VTO=0.7 KP=200u GAMMA=0.5 LAMBDA=0.02) + .MODEL pmos PMOS (VTO=-0.7 KP=100u GAMMA=0.5 LAMBDA=0.02) + .TRAN 0.1n 200n + .MEASURE TRAN t_rise TRIG V(out) VAL=0.33 RISE=1 TARG V(out) VAL=2.97 RISE=1 + .MEASURE TRAN t_fall TRIG V(out) VAL=2.97 FALL=1 TARG V(out) VAL=0.33 FALL=1 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "t_rise", 5e-10, 1e-08); + AssertMeasurementBetween(result, "t_fall", 5e-10, 1e-08); + } + + // Prompt: Design a resistive pi attenuator for 6 dB attenuation and 50-ohm characteristic impedance. + [Fact] + public void Resistive_Pi_Attenuator_6dB_50_Ohm_f0538c8b52df5e7b() + { + var result = RunAcceptedExample( + "deepseek:00006_2618ae70ad30e62f:f0538c8b52df5e7b", + """ + * Resistive Pi Attenuator -6dB 50 Ohm + V1 in 0 AC 1 + Rsh1 in 0 150 + Rser in out 37.5 + Rsh2 out 0 150 + Rload out 0 50 + .OP + .AC DEC 10 1k 100k + .MEAS AC vout_mag FIND VM(out) AT=10kHz + .MEAS AC att_db FIND VDB(out) AT=10kHz + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "vout_mag", 0.5, 0.05); + AssertMeasurementNear(result, "att_db", (-6.0), 0.2); + } + + // Prompt: Create a SPICE netlist for an NMOS common-source amplifier with a resistive load, performing DC operating point and AC analysis, and measure the DC drain voltage and mid-band gain. + [Fact] + public void NMOS_common_source_amplifier_with_resistive_load_24be421025227f95() + { + var result = RunAcceptedExample( + "deepseek:00246_7fecaa8f9595bd93:24be421025227f95", + """ + * NMOS common-source amplifier with resistive load + VDD vdd 0 DC 5 + VIN in 0 DC 1 AC 1 + RL vdd out 10k + M1 out in 0 0 mynmos W=10u L=1u + .MODEL mynmos NMOS(VTO=0.5 KP=200u LAMBDA=0.02) + .OP + .AC DEC 10 1 100MEG + .MEAS OP Vd_OP FIND V(out) AT=0 + .MEAS AC gain_dB FIND VDB(out) AT=1k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "Vd_OP", 2.0, 3.0); + AssertMeasurementBetween(result, "gain_dB", 18.0, 22.0); + } + + // Prompt: Constant-k low-pass filter designed for 50 \u03a9 characteristic impedance and 10 MHz cutoff using two cascaded T-sections. + [Fact] + public void Constant_k_low_pass_image_parameter_filter_two_T_sections_cca58dff49a7e142() + { + var result = RunAcceptedExample( + "deepseek:00605_36b0372503fcd201:cca58dff49a7e142", + """ + * Constant-k low-pass image-parameter filter, two T-sections + V1 1 0 AC 1 + RS 1 in 50 + L1 in 2 0.796u + C1 2 0 636p + L2 2 3 1.59u + C2 3 0 636p + L3 3 out 0.796u + RL out 0 50 + .AC DEC 100 1e3 100MEG + .param passband_db = -6.0206 + .param cutoff_db = -9.0206 + .MEAS AC vout_low_db FIND VDB(out) AT=1e3 + .MEAS AC f3dB WHEN VDB(out)=cutoff_db CROSS=1 + .MEAS AC vout_20M_db FIND VDB(out) AT=20e6 + .MEAS AC att_2fc PARAM='vout_low_db - vout_20M_db' + .MEAS AC v_in FIND V(in) AT=1e3 + .MEAS AC v_1 FIND V(1) AT=1e3 + .MEAS AC ratio_match PARAM='v_in/v_1' + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "f3dB", 8000000.0, 12000000.0); + AssertMeasurementGreater(result, "att_2fc", 30.0); + AssertMeasurementBetween(result, "ratio_match", 0.45, 0.55); + } + + // Prompt: Third-order Chebyshev low-pass filter with 1 dB passband ripple + [Fact] + public void Third_order_Chebyshev_low_pass_filter_1_dB_ripple_1_kHz_cutoff_8399226360644805() + { + var result = RunAcceptedExample( + "deepseek:00578_f5a061bbb3f7cdfa:8399226360644805", + """ + * Third-order Chebyshev low-pass filter (1 dB ripple, 1 kHz cutoff) + V1 in 0 AC 1 + Rs in n1 50 + L1 n1 n2 16.102mH + C2 n2 0 3.164uF + L3 n2 out 16.102mH + Rload out 0 50 + .ac dec 100 1 10k + .meas AC max_gain MAX vdb(out) FROM=1 TO=1000 + .meas AC min_pass MIN vdb(out) FROM=1 TO=1000 + .meas AC gain_at_1k FIND vdb(out) AT=1000 + .END + """); + + AssertAllMeasurementsSuccessful(result); + var max_g = MeasurementValue(result, "max_gain"); + var min_p = MeasurementValue(result, "min_pass"); + var ripple = (max_g - min_p); + Assert.True(((0.5 <= ripple) && (ripple <= 1.5)), CaseLabel(result)); + AssertMeasurementNear(result, "gain_at_1k", (-7.0), 0.5); + AssertMeasurementNear(result, "max_gain", (-6.02), 0.1); + } + + // Prompt: Wide-swing cascode current mirror using self-biased cascode generator. + [Fact] + public void Wide_swing_cascode_current_mirror_6171d00cb75c5502() + { + var result = RunAcceptedExample( + "deepseek:01289_f24408dd5ce5793d:6171d00cb75c5502", + """ + * Wide-swing cascode current mirror + .OPTIONS POST + .MODEL nmos NMOS (LEVEL=1 VTO=1 KP=100U LAMBDA=0.02) + VDD VDD 0 DC 10 + IREF VDD INPUT DC 1MA + M1 D1 D1 0 0 nmos W=10U L=1U + M2 D2 D1 0 0 nmos W=10U L=1U + M3 INPUT VBIAS D1 0 nmos W=10U L=1U + M4 D4 VBIAS D2 0 nmos W=10U L=1U + M5 VBIAS1 VBIAS1 0 0 nmos W=10U L=1U + M6 VBIAS VBIAS VBIAS1 0 nmos W=10U L=1U + R_BIAS VDD VBIAS 5.2K + V_SENSE OUT D4 DC 0 + VOUT OUT 0 DC 10 + .OP + .DC VOUT 0 10 0.1 + .MEAS DC IOUT5 FIND I(V_SENSE) AT=5 + .MEAS DC IOUT51 FIND I(V_SENSE) AT=5.1 + .MEAS DC ROUT PARAM='0.1/(IOUT51-IOUT5)' + .MEAS DC VCOMP FIND V(OUT) WHEN I(V_SENSE)=0.9m RISE=1 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "IOUT5", 0.001, 0.0002); + AssertMeasurementGreater(result, "ROUT", 100000.0); + AssertMeasurementLess(result, "VCOMP", 5.0); + } + + // Prompt: Design an RC differentiator circuit that generates voltage spikes at the rising and falling edges of a 5V, 100 kHz square wave. Use a 1 nF capacitor and a 1 k\u03a9 resistor. Run a transient analysis to observe the output and measure the peak voltages. + [Fact] + public void RC_Differentiating_Edge_Detector_28fc71d8c8eb7529() + { + var result = RunAcceptedExample( + "deepseek:00639_973c7cf42579dfe8:28fc71d8c8eb7529", + """ + * RC Differentiating Edge Detector + C1 in out 1n + R1 out 0 1k + VIN in 0 PULSE(0 5 0 1n 1n 5u 10u) + .TRAN 0.01u 20u + .MEAS TRAN max_v MAX V(out) FROM=0 TO=20u + .MEAS TRAN min_v MIN V(out) FROM=0 TO=20u + .MEAS TRAN pkpk PARAM max_v - min_v + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "max_v", 5.0, 0.2); + AssertMeasurementNear(result, "min_v", (-5.0), 0.2); + } + + // Prompt: Design a biased negative diode limiter that clips an input sine wave at approximately -2.7V. Use a 1kHz 5V amplitude sine wave, a 1k resistor, and a diode with a -2V bias voltage. + [Fact] + public void Biased_Negative_Diode_Limiter_3eda6a886d18158e() + { + var result = RunAcceptedExample( + "deepseek:00752_9dc98a19943c57ad:3eda6a886d18158e", + """ + * Biased Negative Diode Limiter + VIN in 0 SIN(0 5 1k 0 0 0) + R1 in out 1k + D1 bias out DMOD + VBIAS bias 0 DC -2 + .MODEL DMOD D(IS=1e-12 RS=1) + .TRAN 0.01m 2m + .MEAS TRAN Vout_min MIN V(out) FROM=0 TO=2m + .MEAS TRAN Vout_max MAX V(out) FROM=0 TO=2m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "Vout_min", (-3.2), (-2.2)); + AssertMeasurementGreater(result, "Vout_max", 4.5); + } + + // Prompt: Zener diode (D1) provides a stable reference voltage of 5.6V when reverse biased through R1. + [Fact] + public void Zener_Reference_Buffered_by_Emitter_Follower_77d7d5979b8d9055() + { + var result = RunAcceptedExample( + "deepseek:00851_87e8b3029f366404:77d7d5979b8d9055", + """ + * Zener Reference Buffered by Emitter Follower + VCC VCC 0 DC 10 + R1 VCC BASE 470 + D1 0 BASE DZ + Q1 VCC BASE EMIT NPN + RE EMIT 0 1k + RL EMIT 0 10k + .MODEL DZ D(IS=1e-12 N=1 BV=5.6 IBV=1e-3 RS=5) + .MODEL NPN NPN(IS=1e-15 BF=200 VAF=100) + .OP + .DC VCC 8 12 0.1 + .MEAS DC VOUT10 FIND V(EMIT) AT=10 + .MEAS DC VOUT8 FIND V(EMIT) AT=8 + .MEAS DC VOUT12 FIND V(EMIT) AT=12 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "VOUT10", 4.8, 5.0); + var vout8 = MeasurementValue(result, "VOUT8"); + var vout12 = MeasurementValue(result, "VOUT12"); + var line_reg = ((vout12 - vout8) / 4.0); + Assert.True(((line_reg < 0.02)), CaseLabel(result)); + } + + // Prompt: Second-order low-pass filter using two passive RC stages in a ladder configuration. + [Fact] + public void Two_pole_passive_RC_ladder_low_pass_filter_d0d75a376f469ae7() + { + var result = RunAcceptedExample( + "deepseek:00045_074f6e47b0d2a6fe:d0d75a376f469ae7", + """ + * Two-pole passive RC ladder low-pass filter + V1 in 0 DC 0 AC 1 + R1 in n1 1k + C1 n1 0 10n + R2 n1 out 1k + C2 out 0 10n + .ac dec 100 1 1e6 + .meas AC f3dB WHEN vdb(out)=-3 + .meas AC gain_10k FIND vdb(out) AT=10k + .meas AC gain_100k FIND vdb(out) AT=100k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "f3dB", 5000.0, 7000.0); + AssertMeasurementLess(result, "gain_10k", (-3.0)); + AssertMeasurementLess(result, "gain_100k", (-20.0)); + } + + // Prompt: 3-bit flash ADC using a resistor ladder and ideal behavioral comparators (E-sources). + [Fact] + public void Flash_ADC_3_bit_resistor_ladder_and_comparator_bank_164e99f6647f229f() + { + var result = RunAcceptedExample( + "deepseek:02201_72040b1b88d0a047:164e99f6647f229f", + """ + * Flash ADC 3-bit resistor ladder and comparator bank + VREF VREF 0 5 + VIN in 0 DC 0 PULSE(0 5 0 1u 1u 1u 4u) + R1 VREF n1 1k + R2 n1 n2 1k + R3 n2 n3 1k + R4 n3 n4 1k + R5 n4 n5 1k + R6 n5 n6 1k + R7 n6 n7 1k + R8 n7 0 1k + E1 c1 0 VALUE { IF(V(in)-V(n1)>0, 5, 0) } + E2 c2 0 VALUE { IF(V(in)-V(n2)>0, 5, 0) } + E3 c3 0 VALUE { IF(V(in)-V(n3)>0, 5, 0) } + E4 c4 0 VALUE { IF(V(in)-V(n4)>0, 5, 0) } + E5 c5 0 VALUE { IF(V(in)-V(n5)>0, 5, 0) } + E6 c6 0 VALUE { IF(V(in)-V(n6)>0, 5, 0) } + E7 c7 0 VALUE { IF(V(in)-V(n7)>0, 5, 0) } + .DC VIN 0 5 0.01 + .TRAN 10n 10u 0 1n + .MEAS DC v_th1 WHEN V(c1)=2.5 CROSS=1 + .MEAS DC v_th2 WHEN V(c2)=2.5 CROSS=1 + .MEAS DC v_th3 WHEN V(c3)=2.5 CROSS=1 + .MEAS DC v_th4 WHEN V(c4)=2.5 CROSS=1 + .MEAS DC v_th5 WHEN V(c5)=2.5 CROSS=1 + .MEAS DC v_th6 WHEN V(c6)=2.5 CROSS=1 + .MEAS DC v_th7 WHEN V(c7)=2.5 CROSS=1 + .MEAS TRAN t_rise1 WHEN V(c1)=2.5 CROSS=1 TD=0 + .MEAS TRAN t_rise2 WHEN V(c2)=2.5 CROSS=1 TD=0 + .MEAS TRAN t_rise3 WHEN V(c3)=2.5 CROSS=1 TD=0 + .MEAS TRAN t_rise4 WHEN V(c4)=2.5 CROSS=1 TD=0 + .MEAS TRAN t_rise5 WHEN V(c5)=2.5 CROSS=1 TD=0 + .MEAS TRAN t_rise6 WHEN V(c6)=2.5 CROSS=1 TD=0 + .MEAS TRAN t_rise7 WHEN V(c7)=2.5 CROSS=1 TD=0 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "v_th1", 4.375, 0.05); + AssertMeasurementNear(result, "v_th2", 3.75, 0.05); + AssertMeasurementNear(result, "v_th3", 3.125, 0.05); + AssertMeasurementNear(result, "v_th4", 2.5, 0.05); + AssertMeasurementNear(result, "v_th5", 1.875, 0.05); + AssertMeasurementNear(result, "v_th6", 1.25, 0.05); + AssertMeasurementNear(result, "v_th7", 0.625, 0.05); + AssertMeasurementNear(result, "t_rise1", 8.75e-07, 5e-09); + AssertMeasurementNear(result, "t_rise2", 7.5e-07, 5e-09); + AssertMeasurementNear(result, "t_rise3", 6.25e-07, 5e-09); + AssertMeasurementNear(result, "t_rise4", 5e-07, 5e-09); + AssertMeasurementNear(result, "t_rise5", 3.75e-07, 5e-09); + AssertMeasurementNear(result, "t_rise6", 2.5e-07, 5e-09); + AssertMeasurementNear(result, "t_rise7", 1.25e-07, 5e-09); + } + + // Prompt: Inverting summing amplifier with four equal 10k input resistors. + [Fact] + public void Op_amp_averaging_amplifier_with_four_inputs_f0c915c64b18d50f() + { + var result = RunAcceptedExample( + "deepseek:01461_d5039429a041a95e:f0c915c64b18d50f", + """ + * Op-amp averaging amplifier with four inputs + V1 in1 0 DC 1 AC 1 + V2 in2 0 DC 2 + V3 in3 0 DC 3 + V4 in4 0 DC 4 + R1 in1 in_n 10k + R2 in2 in_n 10k + R3 in3 in_n 10k + R4 in4 in_n 10k + Rf out in_n 2.5k + E1 out 0 0 in_n 100000 + .dc V1 1 1 1 + .ac dec 10 1 1meg + .meas DC VOUT_DC FIND V(out) AT=1 + .meas AC VMAG_1k FIND VM(out) AT=1k + .end + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "VOUT_DC", (-2.5), 0.1); + AssertMeasurementNear(result, "VMAG_1k", 0.25, 0.05); + } + + // Prompt: The circuit is a difference amplifier with four 10k resistors and an ideal op-amp (gain 100k). + [Fact] + public void Op_Amp_Subtractor_with_Matched_Resistor_Ratios_4b22fc8bd0cfb90d() + { + var result = RunAcceptedExample( + "deepseek:01470_25da8c2ed85ac6ea:4b22fc8bd0cfb90d", + """ + * Op-Amp Subtractor with Matched Resistor Ratios + V1 in1 0 DC 2 AC 1 + V2 in2 0 DC 3 AC 0 + R1 in1 inv 10k + R2 inv out 10k + R3 in2 noninv 10k + R4 noninv 0 10k + E1 out 0 noninv inv 100000 + .DC V1 2 2 1 + .AC DEC 10 1 1MEG + .MEAS DC VOUT_DC FIND V(out) AT=2 + .MEAS AC GAIN_DB FIND DB(V(out)) AT=1k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "VOUT_DC", 1.0, 0.001); + AssertMeasurementNear(result, "GAIN_DB", 0.0, 0.1); + } + + // Prompt: Classic BJT astable multivibrator powered by a 5V DC source. + [Fact] + public void Astable_Multivibrator_with_72kHz_oscillation_1fe71146dd018c95() + { + var result = RunAcceptedExample( + "deepseek:00412_3ebce98e2539369d:1fe71146dd018c95", + """ + * Astable Multivibrator with 72kHz oscillation + VCC VCC 0 DC 5 + RC1 VCC C1 1k + RC2 VCC C2 1k + RB1 VCC B1 10k + RB2 VCC B2 10k + C1 C1 B2 1n + C2 C2 B1 1n + Q1 C1 B1 0 npnmod + Q2 C2 B2 0 npnmod + .MODEL npnmod NPN(IS=1e-15 BF=100 VAF=50 CJC=5p CJE=5p) + .IC V(C1)=0 V(C2)=5 + .TRAN 10n 200u + .MEAS TRAN period TRIG V(C1) VAL=2.5 RISE=5 TARG V(C1) VAL=2.5 RISE=6 + .MEAS TRAN high_time TRIG V(C1) VAL=2.5 RISE=5 TARG V(C1) VAL=2.5 FALL=5 + .MEAS TRAN duty PARAM high_time/period + .MEAS TRAN freq PARAM 1/period + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "freq", 60000.0, 90000.0); + AssertMeasurementBetween(result, "duty", 0.45, 0.55); + AssertMeasurementLess(result, "period", 2e-05); + } + + // Prompt: 4th-order Sallen-Key Bessel low-pass filter. + [Fact] + public void _4th_Order_Sallen_Key_Bessel_Low_Pass_Filter_10_kHz_208a0e2979a446a4() + { + var result = RunAcceptedExample( + "deepseek:01648_9ab2ade030d6a578:208a0e2979a446a4", + """ + * 4th-Order Sallen-Key Bessel Low-Pass Filter (10 kHz) + .AC DEC 10 10 100k + .MEAS AC f3dB WHEN VDB(out)=-3 + .MEAS AC mag_1kHz FIND VDB(out) AT=1k + .MEAS AC mag_10kHz FIND VDB(out) AT=10k + Vdd VDD 0 DC 5 + Vss VSS 0 DC -5 + Vin in 0 DC 0 AC 1 + R11 in n11 10k + R12 n11 npos1 10k + C11 n11 stg1_out 1.1603n + C12 npos1 0 1.0645n + E1 stg1_out 0 npos1 stg1_out 1e5 + R21 stg1_out n21 10k + R22 n21 npos2 10k + C21 n21 out 1.5975n + C22 npos2 0 0.6146n + E2 out 0 npos2 out 1e5 + Rload out 0 10k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "f3dB", 9500.0, 10500.0); + AssertMeasurementGreater(result, "mag_1kHz", (-1.0)); + AssertMeasurementBetween(result, "mag_10kHz", (-4.0), (-2.0)); + } + + // Prompt: Added DC level shift of 1.5V to x inputs to prevent saturation of lower differential pair. + [Fact] + public void BJT_Gilbert_Multiplier_Core_with_proper_DC_biasing_02816b1cd66ee8d9() + { + var result = RunAcceptedExample( + "deepseek:02282_22a8b5ea86d97959:02816b1cd66ee8d9", + """ + * BJT Gilbert Multiplier Core with proper DC biasing + Vcc vcc 0 DC 5 + Vee vee 0 DC -5 + * Vy differential input: yp=+10mV, ym=0V => Vy_diff=+10mV + Vyp yp 0 DC 10m + Vym ym 0 DC 0 + * Vx differential input with DC offset to avoid saturation of lower pair + Vx_offset xp_int 0 DC 1.5 + Vxm xm 0 DC 1.5 + Vx_sweep xp xp_int DC 0 + * Load resistors + R1 vcc out1 1k + R2 vcc out2 1k + * Upper quad (cross-coupled) + Q1 out2 xp e1 npn + Q2 out1 xm e1 npn + Q3 out1 xp e2 npn + Q4 out2 xm e2 npn + * Lower differential pair + Q5 e1 yp e3 npn + Q6 e2 ym e3 npn + * Tail current source 4mA + Iee e3 vee 4m + .MODEL npn NPN(IS=1e-15 BF=100) + .OP + .DC Vx_sweep -10m 10m 0.1m + .MEAS DC vout_at_p10m FIND V(out1,out2) AT=10m + .MEAS DC vout_at_m10m FIND V(out1,out2) AT=-10m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "vout_at_p10m", 0.148, 0.01); + AssertMeasurementNear(result, "vout_at_m10m", (-0.148), 0.01); + } + + // Prompt: Design a CMOS transmission gate used as a sample-and-hold circuit with a 1 kHz sine input and a 50% duty cycle control signal at 1 kHz. + [Fact] + public void CMOS_Transmission_Gate_Sample_Hold_Circuit_763bf95e1c2341b8() + { + var result = RunAcceptedExample( + "deepseek:01347_f896196803485110:763bf95e1c2341b8", + """ + * CMOS Transmission Gate Sample-Hold Circuit + VSIG in 0 SIN(2.5 0.5 1k) + VCTRLN ctrln 0 PULSE(0 5 0 1n 1n 500u 1000u) + VCTRLP ctrlp 0 PULSE(5 0 0 1n 1n 500u 1000u) + VDD vdd 0 DC 5 + M1 out ctrln in 0 nmos W=10u L=1u + M2 out ctrlp in vdd pmos W=20u L=1u + RLOAD out 0 10MEG + C1 out 0 10n + .MODEL nmos NMOS (VTO=1 KP=100u LAMBDA=0.02) + .MODEL pmos PMOS (VTO=-1 KP=50u LAMBDA=0.02) + .TRAN 10u 2m + .MEAS TRAN vout_on FIND V(out) AT=250u + .MEAS TRAN vin_on FIND V(in) AT=250u + .MEAS TRAN vout_hold FIND V(out) AT=750u + .MEAS TRAN vout_sample FIND V(out) AT=500u + .MEAS TRAN vin_hold FIND V(in) AT=750u + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementRatioBetween(result, "vout_on", "vin_on", 0.95, 1.05); + AssertMeasurementRatioBetween(result, "vout_hold", "vout_sample", 0.9, 1.1); + AssertMeasurementGreater(result, "vout_hold", 2.2); + AssertMeasurementLess(result, "vout_hold", 2.8); + AssertMeasurementNear(result, "vin_hold", 2.0, 0.1); + } + + // Prompt: Three-stage Cockcroft-Walton voltage multiplier with 50 Hz, 5 V amplitude input. + [Fact] + public void Cockcroft_Walton_3_stage_voltage_multiplier_3d1911206a3d7ab3() + { + var result = RunAcceptedExample( + "deepseek:00163_74289d003631f58f:3d1911206a3d7ab3", + """ + * Cockcroft-Walton 3-stage voltage multiplier + VIN 1 0 SIN(0 5 50) AC 1 + RS 1 ac 1 + D1 0 n2 DMOD + D2 n2 n3 DMOD + D3 n3 n4 DMOD + D4 n4 n5 DMOD + D5 n5 n6 DMOD + D6 n6 out DMOD + C1 ac n2 10u IC=5 + C2 n3 0 10u IC=10 + C3 ac n4 10u IC=10 + C4 n5 0 10u IC=20 + C5 ac n6 10u IC=15 + C6 out 0 10u IC=25 + RLOAD out 0 1.2MEG + .MODEL DMOD D(IS=1e-12 N=1 RS=1) + .TRAN 0.1m 0.2 UIC + .MEASURE TRAN Vout_avg AVG V(out) FROM=0.15 TO=0.2 + .MEASURE TRAN Vripple PP V(out) FROM=0.15 TO=0.2 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "Vout_avg", 24.0, 27.0); + AssertMeasurementLess(result, "Vripple", 1.0); + } + + // Prompt: Three-section RC low-pass filter for audio ADC anti-aliasing, targeting ~1 kHz cutoff + [Fact] + public void Multi_section_RC_low_pass_anti_alias_filter_6d061ff3a08be8ac() + { + var result = RunAcceptedExample( + "deepseek:00642_6db04111bf328f3d:6d061ff3a08be8ac", + """ + * Multi-section RC low-pass anti-alias filter + V1 in 0 AC 1 + R1 in n1 1.5k + C1 n1 0 33n + R2 n1 n2 1.5k + C2 n2 0 33n + R3 n2 out 1.5k + C3 out 0 33n + .AC DEC 100 1 1MEG + .MEAS AC f3db WHEN VDB(out)=-3 + .MEAS AC att_10k FIND VDB(out) AT=10k + .MEAS AC att_100k FIND VDB(out) AT=100k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "f3db", 500.0, 1000.0); + AssertMeasurementLess(result, "att_10k", (-30.0)); + AssertMeasurementLess(result, "att_100k", (-60.0)); + } + + // Prompt: High-side current-sense amplifier using two ideal op-amp stages. + [Fact] + public void High_side_current_sense_amplifier_with_differential_amp_and_non_inverting_amp_f5a63e4fee843146() + { + var result = RunAcceptedExample( + "deepseek:02036_95af3608bb3595be:f5a63e4fee843146", + """ + * High-side current-sense amplifier with differential amp and non-inverting amp + V1 high 0 DC 24 + Rshunt high hvp 0.05 + Rload hvp 0 50 + R1 high pos 1k + R2 pos 0 10k + R3 hvp neg 1k + R4 neg out1 10k + E1 out1 0 pos neg 1e6 + Rf out neg2 9k + Rg neg2 0 1k + E2 out 0 out1 neg2 1e6 + .op + .dc V1 0 24 0.1 + .meas DC VOUT_MAX MAX V(out) + .meas DC ILOAD_MAX MAX I(Rload) + .meas DC VOUT_AT0 FIND V(out) AT=0 + .meas DC VOUT_AT24 FIND V(out) AT=24 + .meas DC ILOAD_AT24 FIND I(Rload) AT=24 + .meas DC GAIN_EST PARAM VOUT_AT24/(ILOAD_AT24*0.05) + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "VOUT_AT24", 2.4, 0.1); + AssertMeasurementNear(result, "ILOAD_AT24", 0.48, 0.01); + AssertMeasurementBetween(result, "GAIN_EST", 90.0, 110.0); + AssertMeasurementNear(result, "VOUT_AT0", 0.0, 0.01); + } + + // Prompt: Class-AB push-pull output stage using NPN and PNP transistors biased by two diodes to reduce crossover distortion. + [Fact] + public void Class_AB_Output_Stage_with_Diode_Bias_48c892def4104633() + { + var result = RunAcceptedExample( + "deepseek:01109_63381ab2165a18cc:48c892def4104633", + """ + * Class-AB Output Stage with Diode Bias + VCC vcc 0 15 + VEE vee 0 -15 + Vin mid 0 SIN(0 1 1k) + R1 vcc b1 10k + R2 vee b2 10k + D1 b1 mid Dmod + D2 mid b2 Dmod + Q1 vcc b1 e1 NPN + Re1 e1 out 1 + Q2 vee b2 e2 PNP + Re2 e2 out 1 + Rload out 0 100 + .MODEL NPN NPN(IS=1e-15 BF=100 VAF=50) + .MODEL PNP PNP(IS=1e-15 BF=100 VAF=50) + .MODEL Dmod D(IS=1e-15 RS=1) + .OP + .TRAN 1u 2m + .MEAS TRAN Iq_A1 AVG I(Re1) FROM=0 TO=10u + .MEAS TRAN Vout_max MAX V(out) FROM=0.5m TO=2m + .MEAS TRAN Vout_min MIN V(out) FROM=0.5m TO=2m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "Iq_A1", 0.001, 0.002); + AssertMeasurementBetween(result, "Vout_max", 0.8, 1.0); + AssertMeasurementBetween(result, "Vout_min", (-1.0), (-0.8)); + } + + // Prompt: Series pass linear regulator using NPN pass transistor (Q1) and op-amp error amplifier (E1) with 2.5V reference. + [Fact] + public void Series_pass_linear_regulator_with_op_amp_error_amplifier_288ee33101a6c19b() + { + var result = RunAcceptedExample( + "deepseek:01876_31102dcc71e1408c:288ee33101a6c19b", + """ + * Series pass linear regulator with op-amp error amplifier + VIN vin 0 DC 15 + VREF vref 0 DC 2.5 + R1 vout fb 10k + R2 fb 0 10k + E1 opout 0 vref fb 100000 + Rb opout base 1k + Q1 vin base vout qn + RL vout 0 100 + C1 vout 0 100u + .MODEL qn NPN(IS=1e-15 BF=100) + .OP + .DC VIN 10 20 0.1 + .MEAS DC VOUT_NOM FIND V(vout) AT=15 + .MEAS DC VOUT_MIN MIN V(vout) + .MEAS DC VOUT_MAX MAX V(vout) + .MEAS DC LINEREG PARAM='(VOUT_MAX - VOUT_MIN)/10' + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "VOUT_NOM", 5.0, 0.01); + AssertMeasurementBetween(result, "VOUT_MIN", 4.99, 5.01); + AssertMeasurementBetween(result, "VOUT_MAX", 4.99, 5.01); + AssertMeasurementLess(result, "LINEREG", 0.01); + } + + // Prompt: Three op-amp quadrature oscillator topology: two integrators and one inverter. + [Fact] + public void Quadrature_Oscillator_using_three_op_amps_E_sources_66072da47e641ae7() + { + var result = RunAcceptedExample( + "deepseek:01748_bb41486784df12b7:66072da47e641ae7", + """ + * Quadrature Oscillator using three op-amps (E sources) + R1 out3 n1 10k + C1 out1 n1 15.915n + R2 out1 n2 10k + C2 out2 n2 15.915n + R3 out2 n3 10k + R4 out3 n3 10k + E1 out1 0 n1 0 1e6 + E2 out2 0 n2 0 1e6 + E3 out3 0 n3 0 1e6 + .ic V(n1)=0.1 + .tran 0.01m 5m uic + .meas tran t_period trig v(out1) val=0 rise=1 targ v(out1) val=0 rise=2 + .meas tran t1 when v(out1)=0 rise=1 + .meas tran t2 when v(out2)=0 rise=1 + .meas tran vout1_pp PP v(out1) from=1m to=5m + .end + """); + + AssertAllMeasurementsSuccessful(result); + var meas = MeasurementsDictionary(result); + var period = meas["t_period"]; + var freq = (1.0 / period); + Assert.True(((Math.Abs((freq - 1000.0)) < 50.0)), CaseLabel(result)); + var t1 = meas["t1"]; + var t2 = meas["t2"]; + var phase_diff = ((Math.Abs((t2 - t1)) * 360.0) / period); + Assert.True(((85.0 < phase_diff) && (phase_diff < 95.0)), CaseLabel(result)); + var vpp = meas["vout1_pp"]; + Assert.True(((vpp > 0.1)), CaseLabel(result)); + } + + // Prompt: Simulate the transient response of a CMOS 2-input NAND gate using NMOS and PMOS models. Apply 5V pulse inputs and measure propagation delays. + [Fact] + public void CMOS_NAND2_Gate_Transient_Analysis_2d44717a6d2d1fa1() + { + var result = RunAcceptedExample( + "deepseek:00294_4c45e53a339b0cd3:2d44717a6d2d1fa1", + """ + * CMOS NAND2 Gate Transient Analysis + VDD vdd 0 DC 5 + VA A 0 PULSE(0 5 0 1n 1n 50n 100n) + VB B 0 PULSE(0 5 0 1n 1n 50n 100n) + M1 vdd A out vdd pmos W=10u L=2u + M2 vdd B out vdd pmos W=10u L=2u + M3 out A n1 0 nmos W=10u L=2u + M4 n1 B 0 0 nmos W=10u L=2u + Cload out 0 0.1pF + .MODEL nmos NMOS(VTO=1 KP=100u LAMBDA=0.02) + .MODEL pmos PMOS(VTO=-1 KP=50u LAMBDA=0.02) + .TRAN 1n 200n + .MEASURE TRAN tphl TRIG V(A) VAL=2.5 RISE=1 TARG V(out) VAL=2.5 FALL=1 + .MEASURE TRAN tplh TRIG V(A) VAL=2.5 FALL=1 TARG V(out) VAL=2.5 RISE=1 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "tphl", 1e-10, 1e-08); + AssertMeasurementBetween(result, "tplh", 1e-10, 1e-08); + } + + // Prompt: T-section LC impedance matching network transforming 50 ohms to 200 ohms at 10 MHz. + [Fact] + public void T_section_LC_impedance_matching_network_9a45b0e54a17994c() + { + var result = RunAcceptedExample( + "deepseek:00678_db84172d169c09c0:9a45b0e54a17994c", + """ + * T-section LC impedance matching network + V1 src 0 AC 1 + Rs src in 50 + L1 in mid 1.5915e-6 + C1 mid 0 159.15e-12 + L2 mid out 1.5915e-6 + Rload out 0 200 + .AC LIN 10000 5e6 15e6 + .MEAS AC V_in_mag FIND VM(in) AT=10e6 + .MEAS AC V_out_mag FIND VM(out) AT=10e6 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "V_in_mag", 0.5, 0.05); + AssertMeasurementNear(result, "V_out_mag", 1.0, 0.1); + } + + // Prompt: Low-side current sense amplifier using op-amp with gain of 10 + [Fact] + public void Low_Side_Current_Sense_Amplifier_Front_End_e686f4e55f35e266() + { + var result = RunAcceptedExample( + "deepseek:02031_d7f12f68d7a76318:e686f4e55f35e266", + """ + * Low-Side Current Sense Amplifier Front End + I1 0 SENSE DC 0 + RS SENSE 0 0.1 + E_AMP OUT 0 SENSE INV 100k + Rf OUT INV 9k + Rg INV 0 1k + .OP + .DC I1 0 1 0.1 + .MEAS DC VOUT_1A FIND V(OUT) AT=1 + .MEAS DC GAIN FIND V(OUT) AT=1 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "VOUT_1A", 1.0, 0.01); + AssertMeasurementNear(result, "GAIN", 1.0, 0.01); + } + + // Prompt: Ideal op\u2011amp (E1) with feedback capacitor Cf forms an integrator. + [Fact] + public void Switched_capacitor_integrator_inverting_with_non_overlapping_clocks_7fe24f1e468bdee3() + { + var result = RunAcceptedExample( + "deepseek:02248_7d6043935690096a:7fe24f1e468bdee3", + """ + * Switched-capacitor integrator (inverting) with non-overlapping clocks + VDD vdd 0 DC 5 + VSS vss 0 DC -5 + VIN in 0 DC 1 + Vphi1 phi1 0 PULSE(0 5 0 1n 1n 0.4u 1u) + Vphi2 phi2 0 PULSE(0 5 0.5u 1n 1n 0.4u 1u) + E1 out 0 0 neg 100k + Cf out neg 10pF + Cs b 0 5pF + Rleak out neg 1G + S3 b in phi1 0 swmod + S4 b neg phi2 0 swmod + .MODEL swmod SW(RON=10 ROFF=100MEG VT=2 VH=0.5) + .TRAN 1n 6u UIC + .IC V(out)=0 + .MEAS TRAN VOUT1 FIND V(out) AT=0.95u + .MEAS TRAN VOUT2 FIND V(out) AT=1.95u + .MEAS TRAN VOUT3 FIND V(out) AT=2.95u + .MEAS TRAN VOUT4 FIND V(out) AT=3.95u + .MEAS TRAN VOUT5 FIND V(out) AT=4.95u + .MEAS TRAN STEP12 PARAM VOUT2-VOUT1 + .MEAS TRAN STEP23 PARAM VOUT3-VOUT2 + .MEAS TRAN STEP34 PARAM VOUT4-VOUT3 + .MEAS TRAN STEP45 PARAM VOUT5-VOUT4 + .END + """); + + AssertAllMeasurementsSuccessful(result); + var tol = 0.01; + AssertMeasurementNear(result, "STEP12", (-0.5), tol); + AssertMeasurementNear(result, "STEP23", (-0.5), tol); + AssertMeasurementNear(result, "STEP34", (-0.5), tol); + AssertMeasurementNear(result, "STEP45", (-0.5), tol); + AssertMeasurementNear(result, "VOUT5", (-2.5), tol); + } + + // Prompt: 4-bit R-2R DAC with op-amp voltage follower buffer + [Fact] + public void _4_bit_R_2R_ladder_DAC_with_op_amp_buffer_ecc5bba65b3a5c82() + { + var result = RunAcceptedExample( + "deepseek:02181_488c6edf456db10a:ecc5bba65b3a5c82", + """ + * 4-bit R-2R ladder DAC with op-amp buffer + V3 msb 0 DC 5 + V2 bit2 0 DC 0 + V1 bit1 0 DC 0 + V0 lsb 0 DC 0 + R1 msb n3 2k + R2 bit2 n2 2k + R3 bit1 n1 2k + R4 lsb n0 2k + R5 n3 n2 1k + R6 n2 n1 1k + R7 n1 n0 1k + R8 n0 0 2k + E1 out 0 n3 out 100k + Rload out 0 10k + .OP + .DC V0 0 5 5 V1 0 5 5 V2 0 5 5 V3 0 5 5 + .MEAS DC maxout MAX V(out) + .MEAS DC minout MIN V(out) + .MEAS DC stepout PARAM='(maxout-minout)/15' + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "maxout", 4.6875, 0.2); + AssertMeasurementNear(result, "minout", 0.0, 0.05); + AssertMeasurementNear(result, "stepout", 0.3125, 0.02); + } + + // Prompt: JFET common-source amplifier with voltage-divider biasing. + [Fact] + public void JFET_Common_Source_Amplifier_a4398f18d9a0c452() + { + var result = RunAcceptedExample( + "deepseek:00282_595ebbcfc3c92eca:a4398f18d9a0c452", + """ + * JFET Common-Source Amplifier + VDD VDD 0 DC 15 + VIN IN 0 AC 1 + R1 VDD GATE 390k + R2 GATE 0 100k + Cin IN GATE 10u + J1 DRAIN GATE SOURCE NJF + RD VDD DRAIN 10k + RS SOURCE 0 3.9k + CS SOURCE 0 100u + Cout DRAIN OUT 10u + RL OUT 0 100k + .MODEL NJF NJF(VTO=-2 BETA=200u LAMBDA=0.02) + .OP + .AC DEC 10 10 1Meg + .MEAS DC vdrain FIND V(DRAIN) AT=15 + .MEAS DC idrain FIND I(RD) AT=15 + .MEAS AC gain FIND VDB(OUT) AT=1k + .MEAS AC phase FIND VP(OUT) AT=1k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "gain", 15.0, 20.0); + AssertMeasurementBetween(result, "phase", (-3.2), (-3.0)); + } + + // Prompt: Pi-network matching circuit designed for a 50 Ohm source and load at 100 MHz. + [Fact] + public void Pi_match_network_at_100_MHz_with_AC_analysis_9a2c43ec86839b55() + { + var result = RunAcceptedExample( + "deepseek:00097_d17588d5eabbbf78:9a2c43ec86839b55", + """ + * Pi-match network at 100 MHz with AC analysis + .AC DEC 100 1MEG 1000MEG + VIN in 0 AC 1 + RS in 1 50 + C1 1 0 31.83pF + L1 1 2 79.58nH + C2 2 0 31.83pF + RLOAD 2 0 50 + .MEASURE AC vm_in FIND VM(1) AT=100MEG + .MEASURE AC vm_out FIND VM(2) AT=100MEG + .MEASURE AC gain_db FIND VDB(2) AT=100MEG + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "vm_in", 0.5, 0.05); + AssertMeasurementNear(result, "vm_out", 0.5, 0.05); + AssertMeasurementNear(result, "gain_db", (-6.02), 0.2); + } + + // Prompt: This netlist models a single-slope ADC front-end composed of a ramp generator and a comparator. + [Fact] + public void Single_Slope_ADC_Ramp_and_Comparator_Front_End_66f37d5eb166a7dc() + { + var result = RunAcceptedExample( + "deepseek:02213_32fdba3e75857d31:66f37d5eb166a7dc", + """ + * Single-Slope ADC Ramp and Comparator Front End + VDD VDD 0 DC 5 + VIN IN 0 DC 2.5 + VRESET RESET 0 PULSE(5 0 0 0.1u 0.1u 4u 10u) + ICHG VDD RAMP 1e-3 + C1 RAMP 0 1e-9 + S1 RAMP 0 RESET 0 SWMOD + .MODEL SWMOD SW(RON=10 ROFF=100MEG VT=2 VH=0.5) + E_COMP COMP_OUT 0 VALUE={100000*(V(IN)-V(RAMP))} MIN=0 MAX=5 + RLOAD COMP_OUT 0 10k + .MEAS TRAN vmeas FIND V(RAMP) WHEN V(COMP_OUT)=2.5 FALL=1 + .TRAN 0.01u 10u + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "vmeas", 2.5, 0.01); + } + + // Prompt: Two reference voltages (2 V and 3 V) set the window boundaries. + [Fact] + public void Window_Comparator_with_Two_References_ab0a6bb1c68dfcda() + { + var result = RunAcceptedExample( + "deepseek:01602_94beaff161d96bfd:ab0a6bb1c68dfcda", + """ + * Window Comparator with Two References + Vref_low ref_low 0 DC 2 + Vref_high ref_high 0 DC 3 + Vin in 0 PULSE(1,4,0,1m,1m,1u,4m) + E_comp_low out_low 0 VALUE={ IF(V(in) > V(ref_low), 5, 0) } + E_comp_high out_high 0 VALUE={ IF(V(in) < V(ref_high), 5, 0) } + E_and out 0 VALUE={ IF( V(out_low) > 2.5, IF(V(out_high) > 2.5, 5, 0), 0 ) } + Rload out 0 1k + .TRAN 0.1u 4m + .MEAS TRAN win_width TRIG V(out) VAL=2.5 RISE=1 TARG V(out) VAL=2.5 FALL=1 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "win_width", 0.0003, 0.00035); + } + + // Prompt: Pulse source drives a series RL load (10\u03a9, 100\xb5H) with an RC snubber (100\u03a9, 10nF) in parallel with the inductor. + [Fact] + public void RC_Snubber_across_a_switching_inductive_load_dd46c97f2a9c1847() + { + var result = RunAcceptedExample( + "deepseek:00487_4f2f23273878254c:dd46c97f2a9c1847", + """ + * RC Snubber across a switching inductive load + VIN in 0 PULSE(0 10 1u 10n 10n 10u 100u) + RLOAD in load 10 + LLOAD load out 100uH + RSNUB load n1 100 + CSNUB n1 out 10n + .TRAN 0.1u 200u + .MEAS TRAN vmax MAX V(out) FROM=10u TO=200u + .MEAS TRAN v_settle FIND V(out) AT=199u + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementLess(result, "vmax", 15.0); + AssertMeasurementLess(result, "v_settle", 0.1); + } + + // Prompt: A 4\u2011bit SAR ADC front\u2011end with NMOS sample\u2011and\u2011hold (10 pF) and high\u2011gain comparator (gain=1000) for 5 V reference. + [Fact] + public void SAR_ADC_Sample_Comparator_Front_End_44a62db68158d9c7() + { + var result = RunAcceptedExample( + "deepseek:02219_6c100003a5b463df:44a62db68158d9c7", + """ + * SAR ADC Sample Comparator Front End + VIN in 0 DC 3.2 + VCLK clk 0 PULSE(0 5 0 10n 10n 0.1u 1u) + VDAC dac 0 PWL(0 2.5 0.6u 2.5 0.601u 3.75 1.1u 3.75 1.101u 3.125 1.6u 3.125 1.601u 3.4375 2.1u 3.4375 2.101u 3.125 3u 3.125) + M1 in clk sample 0 nmod L=1u W=10u + C1 sample 0 10p + E_COMP out 0 sample dac 1000 + R1 out 0 1k + C2 out 0 1p + VDD vdd 0 DC 5 + VSS vss 0 DC -5 + .MODEL nmod NMOS(VTO=1 KP=100u LAMBDA=0.02) + .TRAN 0.01u 3u + .MEAS TRAN vout1 FIND V(out) AT=0.6u + .MEAS TRAN vout2 FIND V(out) AT=1.1u + .MEAS TRAN vout3 FIND V(out) AT=1.6u + .MEAS TRAN vout4 FIND V(out) AT=2.1u + .MEAS TRAN vdac_final FIND V(dac) AT=2.5u + .MEAS TRAN vsample FIND V(sample) AT=0.05u + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementGreater(result, "vout1", 0.0); + AssertMeasurementLess(result, "vout2", 0.0); + AssertMeasurementGreater(result, "vout3", 0.0); + AssertMeasurementLess(result, "vout4", 0.0); + AssertMeasurementNear(result, "vdac_final", 3.125, 0.01); + AssertMeasurementNear(result, "vsample", 3.2, 0.1); + } + + // Prompt: Fifth-order Butterworth low\u2011pass filter using LC ladder topology + [Fact] + public void Fifth_order_Butterworth_LC_low_pass_ladder_filter_28ffc2392b48dc87() + { + var result = RunAcceptedExample( + "deepseek:00575_0926042a6196e63d:28ffc2392b48dc87", + """ + * Fifth-order Butterworth LC low-pass ladder filter + L1 1 2 4.916m + C2 2 0 5.15u + L3 2 3 15.915m + C4 3 0 5.15u + L5 3 out 4.916m + Rsrc in 1 50 + Rl out 0 50 + Vin in 0 AC 1 + .ac dec 100 1 100k + .meas AC ref_dc FIND VDB(out) AT=1 + .meas AC f3db when VDB(out)=-9 + .meas AC att10k FIND VDB(out) AT=10k + .meas AC phase10k FIND VP(out) AT=10k + .end + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "f3db", 1000.0, 100.0); + AssertMeasurementLess(result, "att10k", (-90.0)); + AssertMeasurementNear(result, "ref_dc", (-6.0), 0.5); + } + + // Prompt: A constant current source (1 mA) linearly charges a 1 nF capacitor, creating a voltage ramp. + [Fact] + public void Sawtooth_Oscillator_using_Current_Source_and_Switch_42b0544bdb784d59() + { + var result = RunAcceptedExample( + "deepseek:01853_4af514b8d32999e3:42b0544bdb784d59", + """ + * Sawtooth Oscillator using Current Source and Switch + .IC V(saw)=0 + C1 saw 0 1e-9 + I1 0 saw DC 1e-3 + S1 saw 0 ctrl 0 swmod + Vctrl ctrl 0 PULSE(0 5 0 10e-9 10e-9 1e-6 11e-6) + .MODEL swmod SW(RON=10 ROFF=100MEG VT=2 VH=0.5) + .TRAN 10e-9 200e-6 + .MEAS TRAN period TRIG V(saw) VAL=5 RISE=1 TARG V(saw) VAL=5 RISE=2 + .MEAS TRAN freq PARAM=1/period + .MEAS TRAN vmax MAX V(saw) FROM=0 TO=200e-6 + .MEAS TRAN vmin MIN V(saw) FROM=0 TO=200e-6 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "period", 1e-05, 1.2e-05); + AssertMeasurementBetween(result, "freq", 80000.0, 100000.0); + AssertMeasurementBetween(result, "vmax", 9.0, 11.0); + AssertMeasurementBetween(result, "vmin", 0.0, 0.5); + } + + // Prompt: Classic Greinacher voltage doubler using two diodes and two capacitors. + [Fact] + public void Simple_Charge_Pump_Voltage_Doubler_b8d02141e175ab55() + { + var result = RunAcceptedExample( + "deepseek:02342_04799baff02a4936:b8d02141e175ab55", + """ + * Simple Charge Pump Voltage Doubler + VIN in 0 PULSE(-5 5 0 1n 1n 5u 10u) + C1 in n1 1u + D1 0 n1 DMOD + D2 n1 out DMOD + C2 out 0 1u + Rload out 0 1MEG + .MODEL DMOD D + .TRAN 0.1u 10ms + .MEASURE TRAN AVG_VOUT AVG V(out) FROM=5ms TO=10ms + .MEASURE TRAN RIPPLE PP V(out) FROM=5ms TO=10ms + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "AVG_VOUT", 8.0, 9.0); + AssertMeasurementLess(result, "RIPPLE", 0.2); + } + + // Prompt: Uses voltage-controlled switches S1 and S2 to periodically charge a 1nF flying capacitor Cfly from a 5V reference, then transfer the charge to a 33nF hold capacitor Chold in parallel with a 100k\u03a9 load resistor. + [Fact] + public void Frequency_to_Voltage_Converter_with_Charge_Pump_4be940ed52da36b7() + { + var result = RunAcceptedExample( + "deepseek:01871_f129c059152a92fc:4be940ed52da36b7", + """ + * Frequency-to-Voltage Converter with Charge Pump + VREF vref 0 DC 5 + VCTRL1 ctrl1 0 PULSE(0 5 0 1n 1n 40u 100u) + VCTRL2 ctrl2 0 PULSE(0 5 50u 1n 1n 40u 100u) + Cfly a 0 1n + Chold vout 0 33n + Rload vout 0 100k + S1 vref a ctrl1 0 swmod + S2 a vout ctrl2 0 swmod + .model swmod SW(RON=10 ROFF=100MEG VT=2.5 VH=0) + .tran 0 100m 0 1u + .meas TRAN Vout_avg AVG V(vout) FROM=95m TO=100m + .meas TRAN Vripple PP V(vout) FROM=98m TO=100m + .end + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "Vout_avg", 2.4, 2.6); + AssertMeasurementLess(result, "Vripple", 0.1); + } + + // Prompt: Boost converter stepping 12 V to approximately 24 V with 100 kHz switching. + [Fact] + public void Boost_converter_with_diode_capacitor_snubber_491beb4a9dd60e6e() + { + var result = RunAcceptedExample( + "deepseek:01987_4435a3a357126c1c:491beb4a9dd60e6e", + """ + * Boost converter with diode-capacitor snubber + Vin in 0 DC 12 + L1 in sw_node 100u + S1 sw_node 0 ctrl 0 swmod + D1 sw_node out dmod + Cout out 0 470u IC=12 + Rload out 0 10 + * Snubber + Dsnub sw_node snub_node dmod + Csnub snub_node 0 10n + Rsnub snub_node 0 100 + * Switch control + Vctrl ctrl 0 PULSE(0 5 0 10n 10n 5u 10u) + .model dmod D(IS=1e-12 RS=0.1 BV=100 CJO=50p) + .model swmod SW(RON=0.01 ROFF=1MEG VT=2 VH=0.5) + .tran 0.1u 10m uic + .meas TRAN Vout_avg AVG V(out) FROM=8m TO=10m + .meas TRAN Vout_ripple PP V(out) FROM=8m TO=10m + .meas TRAN Iin_avg AVG I(L1) FROM=8m TO=10m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "Vout_avg", 22.0, 26.0); + AssertMeasurementLess(result, "Vout_ripple", 0.5); + AssertMeasurementBetween(result, "Iin_avg", 3.0, 6.0); + } + + // Prompt: Capacitive Wheatstone bridge with AC excitation (10kHz, 1V peak) + [Fact] + public void Capacitive_Sensor_Bridge_with_AC_Excitation_f77c4f44d0b1ce80() + { + var result = RunAcceptedExample( + "deepseek:02167_8f58a0a4863c9e48:f77c4f44d0b1ce80", + """ + * Capacitive Sensor Bridge with AC Excitation + V_ac top 0 AC 1 DC 0 + C1 top n001 100pF + C2 n001 0 100pF + C3 top n002 100pF + C4 n002 0 101pF + R1 n001 in_n 10Meg + R2 in_n out 100Meg + R3 n002 in_p 10Meg + R4 in_p 0 100Meg + R5 n001 0 1G + R6 n002 0 1G + E1 out 0 in_p in_n 1e6 + .AC DEC 100 100 100k + .MEAS AC vout_mag FIND VM(out) AT=10000 + .MEAS AC vout_ph FIND VP(out) AT=10000 + .MEAS AC vdiff_mag FIND VM(n001,n002) AT=10000 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "vout_mag", 0.02488, 0.001); + AssertMeasurementNear(result, "vdiff_mag", 0.002488, 0.0001); + } + + // Prompt: A simple RC delay line with 1 kOhm and 1 nF, driven by a 5 V pulse source and loaded by a high-impedance node (open circuit). Measure the propagation delay from the input 50% point to the output 50% point. + [Fact] + public void RC_Delay_Network_dd62652f15547ce6() + { + var result = RunAcceptedExample( + "deepseek:00033_dd62652f15547ce6:dd62652f15547ce6", + """ + * RC Delay Network + R1 in out 1k + C1 out 0 1n + VIN in 0 PULSE(0 5 1u 10n 10n 10u 20u) + .TRAN 10n 30u + .MEAS TRAN delay TRIG V(in) VAL=2.5 RISE=1 TARG V(out) VAL=2.5 RISE=1 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "delay", 6e-07, 8e-07); + } + + // Prompt: Create a diode-based input protection circuit that limits voltage excursions to safe levels. + [Fact] + public void Diode_steering_network_for_input_protection_ddd1df71d999309b() + { + var result = RunAcceptedExample( + "deepseek:00776_4f2d4bad2955f9d8:ddd1df71d999309b", + """ + * Diode steering network for input protection + R1 in clamp 1k + D1 clamp vcc DMOD + D2 vee clamp DMOD + VCC vcc 0 DC 5 + VEE vee 0 DC -5 + VIN in 0 PULSE(-10 10 0 1n 1n 5u 10u) + .MODEL DMOD D (IS=1e-12 RS=1) + .TRAN 1u 20u + .MEAS TRAN vmax MAX V(clamp) + .MEAS TRAN vmin MIN V(clamp) + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementLess(result, "vmax", 6.0); + AssertMeasurementGreater(result, "vmin", (-6.0)); + } + + // Prompt: RC low-pass filter with R=10k, C=10nF (tau=100us) driven by a 0-5V pulse after 20us delay. + [Fact] + public void RC_Step_Response_from_Pulse_c8ff572002936012() + { + var result = RunAcceptedExample( + "deepseek:00030_0e917fd2bb680fff:c8ff572002936012", + """ + * RC Step Response from Pulse + R1 in out 10k + C1 out 0 10n + Vpulse in 0 PULSE(0 5 20us 1ns 1ns 500us 1ms) + .tran 1us 1ms + .meas TRAN v_init FIND V(out) AT=19us + .meas TRAN v_steady FIND V(out) AT=500us + .meas TRAN t_rise TRIG V(out) VAL=0.5 RISE=1 TARG V(out) VAL=4.5 RISE=1 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "v_init", 0.0, 0.1); + AssertMeasurementBetween(result, "v_steady", 4.9, 5.1); + AssertMeasurementBetween(result, "t_rise", 0.0002, 0.00025); + } + + // Prompt: N-channel JFET constant-current source with source resistance Rs=200 \u03a9 + [Fact] + public void JFET_Current_Source_with_Rs_200_be576fa6347ea79c() + { + var result = RunAcceptedExample( + "deepseek:01409_a01cb4b2d7e7d36f:be576fa6347ea79c", + """ + * JFET Current Source with Rs=200 + .model NJF NJF(VTO=-2 BETA=1m LAMBDA=0) + J1 D 0 S NJF + R1 S 0 200 + V_DS D 0 DC 10 + .op + .DC V_DS 0 20 0.1 + .MEAS DC ID5 FIND I(R1) AT=5 + .MEAS DC ID10 FIND I(R1) AT=10 + .MEAS DC ID_RATIO PARAM=ID10/ID5 + .END + """); + + AssertAllMeasurementsSuccessful(result); + RequireMeasurement(result, "ID5"); + RequireMeasurement(result, "ID10"); + RequireMeasurement(result, "ID_RATIO"); + AssertMeasurementNear(result, "ID5", 0.00234, 5e-05); + AssertMeasurementNear(result, "ID10", 0.00234, 5e-05); + AssertMeasurementRatioBetween(result, "ID10", "ID5", 0.98, 1.02); + } + + // Prompt: Op-amp summing amplifier with three inputs using E1 ideal op-amp (gain 1e5) and resistors R1=10k, R2=20k, R3=30k, feedback Rf=30k. + [Fact] + public void Summing_Amplifier_with_Three_Inputs_5a14caafd793dad2() + { + var result = RunAcceptedExample( + "deepseek:00322_439736bad3ac53f6:5a14caafd793dad2", + """ + * Summing Amplifier with Three Inputs + V1 in1 0 DC 1 AC 1 + V2 in2 0 DC 2 AC 1 + V3 in3 0 DC 3 AC 1 + R1 in1 inv 10k + R2 in2 inv 20k + R3 in3 inv 30k + Rf out inv 30k + E1 out 0 0 inv 1e5 + .OP + .AC DEC 10 1 1MEG + .MEAS AC sum_gain_db FIND VDB(out) AT=1 + .MEAS AC sum_phase FIND VP(out) AT=1 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "sum_gain_db", 14.0, 16.0); + AssertMeasurementBetween(result, "sum_phase", (-3.5), (-2.7)); + } + + // Prompt: Single-stage common-emitter amplifier with voltage divider bias and emitter degeneration. + [Fact] + public void Common_Emitter_NPN_Amplifier_with_Split_Emitter_Degeneration_93127f24c15a99c8() + { + var result = RunAcceptedExample( + "deepseek:00175_444b9ea5663427ab:93127f24c15a99c8", + """ + * Common-Emitter NPN Amplifier with Split Emitter Degeneration + VCC vcc 0 DC 12 + VIN in 0 DC 0 AC 1 + RS in base_in 50 + C1 base_in base 10u + R1 vcc base 47k + R2 base 0 11k + Q1 collector base emitter npnmod + RC vcc collector 4.7k + RE1 emitter e1 680 + RE2 e1 0 330 + CE e1 0 100u + C2 collector out 10u + RL out 0 10k + .MODEL npnmod NPN(BF=100 IS=1e-14 VAF=100) + .OP + .AC DEC 10 1 1e6 + .MEAS OP V_CE FIND V(collector,emitter) AT=0 + .MEAS OP I_C FIND I(RC) AT=0 + .MEAS AC gain_db FIND VDB(out) AT=1k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "V_CE", 3.0, 4.0); + AssertMeasurementBetween(result, "I_C", 0.001, 0.002); + AssertMeasurementBetween(result, "gain_db", 10.0, 15.0); + } + + // Prompt: Diode AND gate with two diodes and a pull-up resistor to Vcc (5V). + [Fact] + public void Diode_AND_Gate_with_pull_up_resistor_ec624eea71a68f9c() + { + var result = RunAcceptedExample( + "deepseek:00770_f03a9e96df22f85e:ec624eea71a68f9c", + """ + * Diode AND Gate with pull-up resistor + Vcc vcc 0 DC 5 + Vin1 in1 0 PULSE(0 5 1u 1n 1n 2u 4u) + Vin2 in2 0 PULSE(0 5 2u 1n 1n 2u 4u) + D1 out in1 DMOD + D2 out in2 DMOD + R1 out vcc 10k + .MODEL DMOD D(IS=1e-14 RS=1) + .TRAN 10n 4u + .MEAS TRAN vout_00 AVG V(out) FROM=0.5u TO=0.9u + .MEAS TRAN vout_10 AVG V(out) FROM=1.5u TO=1.9u + .MEAS TRAN vout_11 AVG V(out) FROM=2.5u TO=2.9u + .MEAS TRAN vout_01 AVG V(out) FROM=3.5u TO=3.9u + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "vout_00", 0.5, 1.0); + AssertMeasurementBetween(result, "vout_10", 0.5, 1.0); + AssertMeasurementBetween(result, "vout_01", 0.5, 1.0); + AssertMeasurementGreater(result, "vout_11", 4.5); + } + + // Prompt: Create a diode peak detector circuit with a bleed resistor. + [Fact] + public void Diode_Peak_Detector_with_Bleed_Resistor_598ef13ef5626a58() + { + var result = RunAcceptedExample( + "deepseek:00737_a5120164a56498ae:598ef13ef5626a58", + """ + * Diode Peak Detector with Bleed Resistor + VIN in 0 SIN(0 5 1k 0 0) + D1 in out dmod + C1 out 0 1u + R1 out 0 10k + .MODEL dmod D(IS=1e-14 RS=1) + .TRAN 0.1u 10ms 0 0.1u + .MEAS TRAN max_output MAX V(out) FROM=5ms TO=10ms + .MEAS TRAN steady_output AVG V(out) FROM=9ms TO=10ms + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "max_output", 4.0, 4.5); + AssertMeasurementBetween(result, "steady_output", 4.0, 4.5); + } + + // Prompt: Resistive T-pad attenuator with 10 dB attenuation and 50 ohm impedance. + [Fact] + public void Resistive_T_pad_attenuator_10dB_50_ohm_15816ac522312ca4() + { + var result = RunAcceptedExample( + "deepseek:00011_4ede0ac49dd8b963:15816ac522312ca4", + """ + * Resistive T-pad attenuator, 10dB, 50 ohm + Vin in 0 DC 5 AC 1 + R1 in 1 25.975 + R2 1 0 35.136 + R3 1 out 25.975 + Rload out 0 50 + .DC Vin 0 5 0.1 + .AC DEC 10 1 1MEG + .MEAS DC vout_dc FIND V(out) AT=5 + .MEAS AC vout_db_f1k FIND VDB(out) AT=1k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "vout_dc", 1.581, 0.01); + AssertMeasurementBetween(result, "vout_db_f1k", (-10.1), (-9.9)); + } + + // Prompt: Two-input diode AND gate using 1N4148-like diodes (DMOD), a 1k\u03a9 pull-up resistor, and a 5V supply. + [Fact] + public void Diode_AND_Gate_bf396a845f70d94e() + { + var result = RunAcceptedExample( + "deepseek:00768_c51f0f50a15c37c3:bf396a845f70d94e", + """ + * Diode AND Gate + VCC VCC 0 DC 5 + VIN1 A 0 PULSE(0 5 0 1n 1n 0.5u 1u) + VIN2 B 0 PULSE(0 5 0.25u 1n 1n 0.5u 1u) + D1 out A DMOD + D2 out B DMOD + R1 out VCC 1k + .MODEL DMOD D(IS=1e-12 RS=1) + .TRAN 10n 2u + .MEAS TRAN Vout_both_high FIND V(out) AT=0.4u + .MEAS TRAN Vout_one_low FIND V(out) AT=0.6u + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementGreater(result, "Vout_both_high", 4.0); + AssertMeasurementLess(result, "Vout_one_low", 1.0); + } + + // Prompt: Constant-k low-pass T-section filter designed for 600 ohm image impedance and 1 kHz cutoff. + [Fact] + public void Constant_k_low_pass_image_parameter_filter_T_section_44e68ab8661422ef() + { + var result = RunAcceptedExample( + "deepseek:00606_ec66ef82f9a2cec8:44e68ab8661422ef", + """ + * Constant-k low-pass image parameter filter (T-section) + VIN in 0 AC 1 DC 0 + RS in n1 600 + L1 n1 n2 0.0955H + C1 n2 0 0.531uF + L2 n2 out 0.0955H + RL out 0 600 + .PARAM ref_dB = -6.0206 + .AC DEC 100 10 10k + .MEAS AC f3db WHEN vdb(out)=ref_dB-3 fall=last + .MEAS AC mag_at_fc FIND vdb(out) AT=1000 + .MEAS AC att_at_3fc FIND vdb(out) AT=3000 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "f3db", 1000.0, 200.0); + AssertMeasurementNear(result, "mag_at_fc", (-9.03), 1.0); + AssertMeasurementBetween(result, "att_at_3fc", (-40.0), (-10.0)); + } + + // Prompt: Negative peak clamper shifts the pulse waveform so its negative peak is clamped to approximately -3.7 V (the -3 V reference minus a diode forward drop). + [Fact] + public void Diode_negative_peak_clamper_to_3V_rail_4d578068f1b7a322() + { + var result = RunAcceptedExample( + "deepseek:00750_48cd8c836c8111e5:4d578068f1b7a322", + """ + * Diode negative peak clamper to -3V rail + C1 in out 1u + D1 clamp out DMOD + R1 out 0 100k + VCLAMP clamp 0 DC -3 + VIN in 0 PULSE(5 -5 0 1n 1n 0.5m 1m) + .MODEL DMOD D(IS=1e-12 RS=1) + .TRAN 0.01u 20ms + .MEAS TRAN VOUT_MIN MIN V(out) FROM=15ms TO=20ms + .MEAS TRAN VOUT_MAX MAX V(out) FROM=15ms TO=20ms + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "vout_min", (-4.0), (-3.4)); + AssertMeasurementGreater(result, "vout_max", 0.0); + } + + // Prompt: Design a second-order multiple-feedback high-pass filter with a cutoff frequency of 1 kHz using an ideal op-amp and three capacitors. + [Fact] + public void Multiple_Feedback_High_Pass_Filter_6aec2d9ebbd14c6d() + { + var result = RunAcceptedExample( + "deepseek:01679_6aec2d9ebbd14c6d:6aec2d9ebbd14c6d", + """ + * Multiple-Feedback High-Pass Filter + VIN in 0 AC 1 + C1 in x 10n + R1 x 0 7.5k + C2 x ninv 10n + C3 x out 10n + R3 ninv out 33k + E1 out 0 0 ninv 100k + .AC DEC 100 1 1MEG + .MEAS AC gain_hf FIND VDB(out) AT=100k + .MEAS AC gain_low FIND VDB(out) AT=10 + .MEAS AC f3db WHEN VDB(out)=-3 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "f3db", 1000.0, 200.0); + AssertMeasurementBetween(result, "gain_hf", (-1.0), 1.0); + AssertMeasurementLess(result, "gain_low", (-20.0)); + } + + // Prompt: Design a simple PWM DAC using an RC lowpass filter. The PWM signal is 5V amplitude, 50% duty cycle at 500kHz. Use R=1k and C=100nF. Simulate the transient response and measure the average output voltage. + [Fact] + public void PWM_DAC_with_RC_reconstruction_filter_ef93c4505a5f80aa() + { + var result = RunAcceptedExample( + "deepseek:02194_c9c13afdd7bf8561:ef93c4505a5f80aa", + """ + * PWM DAC with RC reconstruction filter + R1 in out 1k + C1 out 0 100n + Vpwm in 0 PULSE(0 5 0 1n 1n 1u 2u) + .TRAN 1u 20ms + .MEASURE TRAN avg_out AVG V(out) FROM=10ms TO=20ms + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "avg_out", 2.5, 0.01); + } + + // Prompt: Fixed diode D1 orientation to correct charge pump operation. + [Fact] + public void Simple_charge_pump_voltage_doubler_745778358e4cc49b() + { + var result = RunAcceptedExample( + "deepseek:02339_ed1d098d0c1f8c50:745778358e4cc49b", + """ + * Simple charge pump voltage doubler + Vdd vdd 0 DC 5 + Vclk clk 0 PULSE(0 5 0 10n 10n 0.5u 1u) + C1 clk n1 10n + D1 vdd n1 dmod + D2 n1 out dmod + C2 out 0 100n + Rload out 0 10k + .model dmod D(IS=1e-14 RS=1) + .tran 1n 200u + .meas tran vout_avg AVG V(out) FROM=50u TO=200u + .meas tran vout_ripple PP V(out) FROM=50u TO=200u + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "vout_avg", 8.0, 9.0); + AssertMeasurementLess(result, "vout_ripple", 0.5); + } + + // Prompt: DTL NAND gate with three inputs (A, B, C) + [Fact] + public void DTL_NAND_Gate_c5a0719d7c544020() + { + var result = RunAcceptedExample( + "deepseek:02462_97d59bd688220a2e:c5a0719d7c544020", + """ + * DTL NAND Gate + VCC vcc 0 DC 5 + R1 vcc n1 4.7k + D1 n1 A dmod + D2 n1 B dmod + D3 n1 C dmod + D4 n1 n2 dmod + R2 n2 0 10k + Q1 out n2 0 npn + R3 vcc out 1k + .MODEL dmod D(IS=1e-14 RS=1) + .MODEL npn NPN(IS=1e-15 BF=100) + VA A 0 PULSE(5 0 2m 1n 1n 2.5m 5m) + VB B 0 DC 5 + VC C 0 DC 5 + .TRAN 0.1u 5m + .MEAS TRAN vout_low FIND V(out) AT=1.9m + .MEAS TRAN vout_high FIND V(out) AT=3m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementLess(result, "vout_low", 1.0); + AssertMeasurementGreater(result, "vout_high", 4.0); + } + + // Prompt: N-channel JFET constant current source with a source resistor to set the operating point. + [Fact] + public void JFET_Current_Source_e6fbd867f1464b69() + { + var result = RunAcceptedExample( + "deepseek:01408_46c5f05ccf1e4e10:e6fbd867f1464b69", + """ + * JFET Current Source + J1 drain_source 0 src NJF + Rs src 0 500 + Vds drain_source 0 DC 10 + .MODEL NJF NJF(VTO=-2.0 BETA=1e-3 LAMBDA=0) + .OP + .DC Vds 0 20 0.1 + .MEAS DC I_curr AVG I(Rs) FROM=5 TO=15 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "I_curr", 0.001528, 0.0001); + } + + // Prompt: This circuit models a passive 10:1 oscilloscope probe using a compensated RC divider. + [Fact] + public void _10_1_Oscilloscope_Probe_with_Compensation_8876419aaf99ebc1() + { + var result = RunAcceptedExample( + "deepseek:00670_79be04ef4866bc16:8876419aaf99ebc1", + """ + * 10:1 Oscilloscope Probe with Compensation + VIN in 0 DC 1 AC 1 + R1 in out 9MEG + C1 in out 1.111pF + R2 out 0 1MEG + C2 out 0 10pF + .AC DEC 10 1 1e6 + .MEASURE AC v1k_mag FIND VM(out) AT=1000 + .MEASURE AC v1meg_mag FIND VM(out) AT=1e6 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "v1k_mag", 0.1, 0.001); + AssertMeasurementNear(result, "v1meg_mag", 0.1, 0.001); + AssertMeasurementRatioBetween(result, "v1meg_mag", "v1k_mag", 0.999, 1.001); + } + + // Prompt: Center-tapped transformer secondary modeled as two 12V AC sources with common ground. + [Fact] + public void Dual_polarity_full_wave_rectifier_supply_32c53e2632ec70b8() + { + var result = RunAcceptedExample( + "deepseek:00709_f7076258d15c5f2a:32c53e2632ec70b8", + """ + * Dual-polarity full-wave rectifier supply + Vpos n1 0 SIN(0 12 60) + Vneg 0 n2 SIN(0 12 60) + D1 n1 vp dmod + D2 vn n2 dmod + C1 vp 0 1200u + C2 vn 0 1200u + R1 vp 0 100 + R2 vn 0 100 + .model dmod D(IS=1e-9 RS=0.1 BV=100 CJO=10p) + .tran 10u 200m 100m 10u + .meas tran avg_vp AVG V(vp) FROM=100m TO=200m + .meas tran avg_vn AVG V(vn) FROM=100m TO=200m + .meas tran ripple_vp PP V(vp) FROM=100m TO=200m + .meas tran ripple_vn PP V(vn) FROM=100m TO=200m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "avg_vp", 10.0, 12.0); + AssertMeasurementBetween(result, "avg_vn", (-12.0), (-10.0)); + AssertMeasurementBetween(result, "ripple_vp", 0.5, 1.5); + AssertMeasurementBetween(result, "ripple_vn", 0.5, 1.5); + } + + // Prompt: Passive RC lag compensator with pole at 10 Hz and zero at 100 Hz. + [Fact] + public void Passive_Lag_Compensator_668e8ce926b81d86() + { + var result = RunAcceptedExample( + "deepseek:00507_68b3d26da95b39eb:668e8ce926b81d86", + """ + * Passive Lag Compensator + V1 in 0 AC 1 + R1 in out 14.3k + R2 out n1 1.59k + C1 n1 0 1u + .AC DEC 20 1 1e6 + .MEAS AC g1 FIND VDB(out) AT=1 + .MEAS AC g10 FIND VDB(out) AT=10 + .MEAS AC g100 FIND VDB(out) AT=100 + .MEAS AC p10 FIND VP(out) AT=10 + .MEAS AC p100 FIND VP(out) AT=100 + .MEAS AC p31p6 FIND VP(out) AT=31.6 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "g1", 0.0, 0.2); + AssertMeasurementNear(result, "g10", (-3.0), 0.5); + AssertMeasurementNear(result, "g100", (-17.0), 1.0); + AssertMeasurementNear(result, "p31p6", (-0.958), 0.05); + } + + // Prompt: The circuit is a three-op-amp instrumentation amplifier with a driven reference node. + [Fact] + public void Instrumentation_Amplifier_with_Driven_Reference_Node_d5004974ae2640e2() + { + var result = RunAcceptedExample( + "deepseek:01485_97a34da74875ba4a:d5004974ae2640e2", + """ + * Instrumentation Amplifier with Driven Reference Node + VINP inp 0 DC 0.5m AC 0.5 + VINM inm 0 DC -0.5m AC -0.5 + VREF ref_in 0 DC 1.25 AC 0 + EA1 out1 0 inp n1 100000 + EA2 out2 0 inm n2 100000 + Rgain n1 n2 1k + Rf1 out1 n1 10k + Rf2 out2 n2 10k + EA3 out 0 n3 n4 100000 + R3 out1 n3 10k + R6 n3 vref 10k + R5 out2 n4 10k + R4 n4 out 10k + EA4 vref 0 ref_in vref 100000 + .TRAN 1n 10n + .AC DEC 10 1 100k + .MEAS TRAN out_dc FIND V(out) AT=10n + .MEAS AC gain_mag FIND V(out) AT=1k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "out_dc", 1.271, 0.01); + AssertMeasurementNear(result, "gain_mag", 21.0, 0.5); + } + + // Prompt: Voltage follower using an ideal op-amp approximated by a behavioral voltage-controlled voltage source (E-source) with high gain (100k). + [Fact] + public void Voltage_follower_using_behavioral_E_source_57e693b357199bf1() + { + var result = RunAcceptedExample( + "deepseek:01425_d2dc4353f292592b:57e693b357199bf1", + """ + Voltage follower using behavioral E-source + VIN in 0 DC 0.5 AC 1 + VCC vcc 0 DC 15 + VEE vee 0 DC -15 + E1 out 0 in out 100k + Rload out 0 10k + .OP + .DC VIN 0.5 0.5 1 + .AC DEC 10 1 1MEG + .MEAS DC vout FIND V(out) AT=0.5 + .MEAS DC vdiff FIND V(in,out) AT=0.5 + .MEAS AC acmag FIND VDB(out) AT=1k + .MEAS AC acphase FIND VP(out) AT=1k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "vout", 0.5, 0.01); + AssertMeasurementBetween(result, "vdiff", (-0.001), 0.001); + AssertMeasurementBetween(result, "acmag", (-0.1), 0.1); + AssertMeasurementBetween(result, "acphase", (-1.0), 1.0); + } + + // Prompt: JFET source follower buffer circuit + [Fact] + public void JFET_Source_Follower_Buffer_766c305cb5e8152f() + { + var result = RunAcceptedExample( + "deepseek:01388_b49b31adbc9fd3e4:766c305cb5e8152f", + """ + * JFET Source Follower Buffer + VDD drain 0 DC 15 + RS source 0 10k + RG gate 0 100k + CIN in gate 1u + VIN in 0 DC 0 AC 1 + CLOAD source 0 1nF + J1 drain gate source J2N3819 + .model J2N3819 NJF(VTO=-3 BETA=1.3m LAMBDA=0.01) + .OP + .AC DEC 10 10 1Meg + .MEASURE AC gain_db FIND VDB(source) AT=1k + .MEASURE AC gain_mag FIND V(source) AT=1k + .MEASURE AC max_gain MAX VDB(source) + .MEASURE AC f_3db WHEN VDB(source) = -3 FALL=1 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "gain_db", (-1.0), 0.0); + AssertMeasurementBetween(result, "gain_mag", 0.8, 1.0); + AssertMeasurementGreater(result, "f_3db", 100000.0); + AssertMeasurementGreater(result, "max_gain", (-1.0)); + } + + // Prompt: SEPIC converter with ideal switches and diode, 12V input, 100kHz switching, 50% duty cycle. + [Fact] + public void SEPIC_converter_simplified_switching_model_9150496dce90e869() + { + var result = RunAcceptedExample( + "deepseek:01968_dcfbb95de760a925:9150496dce90e869", + """ + * SEPIC converter simplified switching model + Vin input 0 DC 12V + L1 input sw 100uH + S1 sw 0 gate 0 swmod + C1 sw mid 10uF + L2 mid 0 100uH + D1 mid out dmod + Cout out 0 100uF IC=0 + Rload out 0 10 + VG gate 0 PULSE(0 5 0 10n 10n 5u 10u) + .MODEL swmod SW(RON=0.01 ROFF=1MEG VT=0.5 VH=0.2) + .MODEL dmod D(IS=1e-14 RS=0.01) + .TRAN 1u 10m UIC + .MEASURE TRAN vout_avg AVG V(out) FROM=8m TO=10m + .MEASURE TRAN vout_ripple PP V(out) FROM=8m TO=10m + .MEASURE TRAN iin_avg AVG I(Vin) FROM=8m TO=10m + .MEASURE TRAN pin AVG V(input)*I(Vin) FROM=8m TO=10m + .MEASURE TRAN pout AVG V(out)*I(Rload) FROM=8m TO=10m + .MEASURE TRAN eff PARAM pout/pin + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "vout_avg", 11.0, 13.0); + AssertMeasurementBetween(result, "eff", 0.8, 1.0); + } + + // Prompt: Linear post-regulator using discrete error amplifier and pass transistor to clean up switching preregulator output. + [Fact] + public void Linear_post_regulator_after_switching_preregulator_c5452f10e5a42a31() + { + var result = RunAcceptedExample( + "deepseek:02005_78b6cc8203036d28:c5452f10e5a42a31", + """ + * Linear post-regulator after switching preregulator + VIN in 0 DC 12 SIN(12 0.105 100k) + R1 in n1 1k + D1 0 n1 DZ + Q2 n2 n1 n3 0 NPN + Q3 n4 fb n3 0 NPN + R6 n3 0 10k + Q4 n2 n2 in in PNP + Q5 n4 n2 in in PNP + Q1 in n4 out 0 NPN + R2 out fb 5.6k + R3 fb 0 10k + C1 out 0 10u + Ccomp n4 out 10p + .MODEL NPN NPN(IS=1e-14 BF=100 VAF=100) + .MODEL PNP PNP(IS=1e-14 BF=100 VAF=100) + .MODEL DZ D(IS=1n RS=1 BV=5.1 IBV=10m) + .OP + .TRAN 0.1u 200u + .MEAS TRAN vout_avg AVG V(out) FROM=50u TO=200u + .MEAS TRAN vout_pp PP V(out) FROM=50u TO=200u + .MEAS TRAN vin_pp PP V(in) FROM=50u TO=200u + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "vout_avg", 7.8, 8.1); + AssertMeasurementLess(result, "vout_pp", 0.005); + AssertMeasurementBetween(result, "vin_pp", 0.19, 0.21); + } + + // Prompt: The precision full-wave rectifier uses two high-gain voltage\u2011controlled voltage sources (E_hw, E_diff) as op\u2011amps. + [Fact] + public void RMS_to_DC_converter_approximation_precision_full_wave_rectifier_and_filter_e72856cbd0a26fe2() + { + var result = RunAcceptedExample( + "deepseek:02311_fbd4162e5784ec83:e72856cbd0a26fe2", + """ + * RMS-to-DC converter approximation - precision full-wave rectifier and filter + VIN in 0 SIN(0 1 1k) + R1 n_hw 0 10k + D1 out_hw n_hw dmod + E_hw out_hw 0 in n_hw 100k + R3 in n_diff 10k + R4 out n_diff 10k + E_diff out 0 n_hw n_diff 100k + Rf out dc 1k + Cf dc 0 1u + .model dmod D(IS=1e-12 RS=1) + .tran 0.01m 10m + .meas TRAN Vdc_avg AVG V(dc) FROM=5m TO=10m + .meas TRAN Vrms_input RMS V(in) FROM=5m TO=10m + .meas TRAN ratio_avg2rms PARAM Vdc_avg/Vrms_input + .end + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "Vdc_avg", 0.6, 0.65); + AssertMeasurementBetween(result, "ratio_avg2rms", 0.88, 0.92); + } + + // Prompt: Create a SPICE simulation of a two-transistor BJT current limiter that restricts the load current to approximately 100mA. Use an NPN pass transistor (Q1) with a sense resistor Rsense=7.5\u03a9 and an NPN sense transistor (Q2) that shunts base drive. Supply voltage is 12V. Perform a DC sweep of the output voltage from 0 to 12V and measure the limit current. + [Fact] + public void Two_Transistor_BJT_Current_Limiter_8c491e4bc4151453() + { + var result = RunAcceptedExample( + "deepseek:01045_362f0822447f46c8:8c491e4bc4151453", + """ + * Two-Transistor BJT Current Limiter + Vsup Vcc 0 DC 12 + Vctrl ctrl 0 DC 12 + Vload out 0 DC 0 + Rbase ctrl base1 1k + Q1 Vcc base1 emit1 npn_mod + Rsense emit1 out 7.5 + Q2 base1 emit1 out npn_mod + .model npn_mod NPN(IS=1e-14 BF=100 VAF=100) + .op + .dc Vload 0 12 0.01 + .meas DC I_limit_max MAX I(Vload) + .meas DC I_at_5V FIND I(Vload) AT=5 + .meas DC Vbe_Q2_at_5V FIND V(emit1,out) AT=5 + .end + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "I_limit_max", 0.085, 0.115); + AssertMeasurementRatioBetween(result, "I_at_5V", "I_limit_max", 0.9, 1.1); + AssertMeasurementBetween(result, "Vbe_Q2_at_5V", 0.6, 0.8); + } + + // Prompt: 555-style monostable timer using behavioral comparators and SR latch + [Fact] + public void _555_style_monostable_timer_using_behavioral_comparators_4c7489ee15ac2c77() + { + var result = RunAcceptedExample( + "deepseek:01821_48fa16fb32b123cc:4c7489ee15ac2c77", + """ + * 555-style monostable timer using behavioral comparators + VSUPPLY vcc 0 DC 5 + VTRIG trig 0 PULSE(5 0 10u 1n 1n 1u 200u) + R1 vcc cap 100k + C1 cap 0 10n + R2 vcc ref_2_3 10k + R3 ref_2_3 ref_1_3 10k + R4 ref_1_3 0 10k + E_SET SET 0 VALUE={5*(V(trig) < V(ref_1_3))} + E_RESET RESET 0 VALUE={5*(V(cap) > V(ref_2_3))} + E_nQ nQ 0 VALUE={5*((V(SET)<2.5)*(V(Q)<2.5))} + E_Q Q 0 VALUE={5*((V(RESET)<2.5)*(V(nQ)<2.5))} + .IC V(Q)=0 V(nQ)=5 V(cap)=0 + S_DISCH cap 0 nQ 0 SWMOD + .MODEL SWMOD SW(RON=10 ROFF=10MEG VT=2.5 VH=0.5) + E_OUT out 0 Q 0 1 + .TRAN 1u 2m UIC + .MEAS TRAN pulse_width TRIG V(out) VAL=2.5 RISE=1 TD=0 TARG V(out) VAL=2.5 FALL=1 + .MEAS TRAN max_cap MAX V(cap) + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "pulse_width", 0.0011, 5e-05); + AssertMeasurementNear(result, "max_cap", 3.333, 0.1); + } + + // Prompt: BJT current mirror with two NPN transistors. + [Fact] + public void Simple_BJT_current_mirror_2fe68fbd7c60af80() + { + var result = RunAcceptedExample( + "deepseek:00209_8a4fc232f3f48023:2fe68fbd7c60af80", + """ + * Simple BJT current mirror + VCC vcc 0 DC 10 + R1 vcc ref 10k + R2 vcc out 10k + Q1 ref ref 0 npn_mod + Q2 out ref 0 npn_mod + .MODEL npn_mod NPN(IS=1e-14 BF=100) + .DC VCC 10 10 1 + .MEASURE DC Iref FIND I(R1) AT=10 + .MEASURE DC Iout FIND I(R2) AT=10 + .MEASURE DC Io_Iref PARAM='Iout/Iref' + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "Io_Iref", 1.0, 0.1); + } + + // Prompt: A four-quadrant analog multiplier using a polynomial voltage-controlled current source. + [Fact] + public void Four_Quadrant_Analog_Multiplier_using_behavioral_G_source_9053b5d3891b37fd() + { + var result = RunAcceptedExample( + "deepseek:02296_652fc5b3c99ae649:9053b5d3891b37fd", + """ + * Four-Quadrant Analog Multiplier using behavioral G source + Vx in1 0 DC 0 SIN(0 2 1k) + Vy in2 0 DC 1 + G1 out 0 POLY(2) in1 0 in2 0 0 0 0 0 10u 0 + R1 out 0 10k + E1 vout 0 out 0 -1 + .TRAN 1u 5m + .DC Vx -2 2 0.1 + .MEAS TRAN vout_max MAX V(vout) FROM=0 TO=5m + .MEAS TRAN vout_min MIN V(vout) FROM=0 TO=5m + .MEAS DC vout_at_vx1 FIND V(vout) AT=1 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "vout_max", 0.2, 0.05); + AssertMeasurementNear(result, "vout_min", (-0.2), 0.05); + AssertMeasurementNear(result, "vout_at_vx1", 0.1, 0.01); + } + + // Prompt: Lumped-element LC ladder matching network + [Fact] + public void Quarter_wave_transmission_line_equivalent_LC_ladder_b71485bf819e1142() + { + var result = RunAcceptedExample( + "deepseek:00694_0296d0f75b426a10:b71485bf819e1142", + """ + * Quarter-wave transmission-line equivalent LC ladder + V1 in_src 0 AC 1 + Rsrc in_src in 50 + L1 in mid 15.915nH + L2 mid out 15.915nH + C1 mid 0 1.5915pF + Rload out 0 200 + .AC lin 1000 100e6 2000e6 + .MEAS AC v_in_mag FIND vm(in) AT=1e9 + .MEAS AC v_out_mag FIND vm(out) AT=1e9 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "v_in_mag", 0.5, 0.05); + AssertMeasurementNear(result, "v_out_mag", 1.0, 0.05); + } + + // Prompt: Two-input CMOS NOR gate with NMOS pull-down network (parallel) and PMOS pull-up network (series). + [Fact] + public void CMOS_NOR2_transient_response_6d788ad8db83fd33() + { + var result = RunAcceptedExample( + "deepseek:00299_cbc09c09c6d23b6b:6d788ad8db83fd33", + """ + * CMOS NOR2 transient response + M1 Y A 0 0 NMOD W=1u L=0.35u + M2 Y B 0 0 NMOD W=1u L=0.35u + M3 net1 A VDD VDD PMOD W=2u L=0.35u + M4 Y B net1 VDD PMOD W=2u L=0.35u + VDD VDD 0 DC 3.3 + VA A 0 PULSE(0 3.3 0 0.1n 0.1n 5n 20n) + VB B 0 PULSE(0 3.3 0 0.1n 0.1n 15n 30n) + CL Y 0 0.5pF + .MODEL NMOD NMOS (VTO=0.7 KP=200u LAMBDA=0.02) + .MODEL PMOD PMOS (VTO=-0.7 KP=80u LAMBDA=0.02) + .TRAN 0.01n 40n + .OP + .MEASURE TRAN tpd_A_FALL TRIG V(A) VAL=1.65 RISE=1 TARG V(Y) VAL=1.65 FALL=1 + .MEASURE TRAN tpd_B_FALL TRIG V(B) VAL=1.65 RISE=1 TARG V(Y) VAL=1.65 FALL=1 + .MEASURE TRAN vout_avg AVG V(Y) FROM=0 TO=40n + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "tpd_A_FALL", 0.0, 1e-09); + AssertMeasurementBetween(result, "tpd_B_FALL", 0.0, 1e-09); + AssertMeasurementBetween(result, "vout_avg", 0.0, 3.3); + } + + // Prompt: The circuit is a foldback current limiter using two NPN transistors. + [Fact] + public void Foldback_Current_Limiter_with_NPN_Pass_and_NPN_Limiter_b1e937f5dd36cd3d() + { + var result = RunAcceptedExample( + "deepseek:01050_d5a399bcdb786da1:b1e937f5dd36cd3d", + """ + * Foldback Current Limiter with NPN Pass and NPN Limiter + Vcc vcc 0 DC 12 + Rbias vcc base_q1 1k + Q1 vcc base_q1 sense NPNMOD + Rs sense out 20 + R1 sense fb 1k + R2 out fb 10k + R3 fb 0 5k + Q2 base_q1 fb out NPNMOD + Vout out 0 DC 0 + .MODEL NPNMOD NPN (IS=1e-14 BF=100 VAF=100) + .DC Vout 0 12 0.1 + .MEAS DC I_max MAX I(Vout) + .MEAS DC I_sc FIND I(Vout) AT=0 + .MEAS DC ratio PARAM I_sc/I_max + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementGreater(result, "I_max", 0.01); + AssertMeasurementLess(result, "I_max", 0.5); + AssertMeasurementLess(result, "I_sc", 0.1); + AssertMeasurementLess(result, "ratio", 0.8); + var i_max = MeasurementValue(result, "I_max"); + var i_sc = MeasurementValue(result, "I_sc"); + Assert.True(((i_max > i_sc)), CaseLabel(result)); + } + + // Prompt: Twin-T notch filter centered near 1.6 kHz using R=10k\u03a9 and C=10nF/20nF. + [Fact] + public void Twin_T_Notch_Filter_AC_Analysis_d5492ab73cc39ddc() + { + var result = RunAcceptedExample( + "deepseek:00093_ea190a23e5e96ba5:d5492ab73cc39ddc", + """ + * Twin-T Notch Filter - AC Analysis + V1 in 0 DC 0 AC 1 + R1 in n1 10k + R2 n1 out 10k + C1 n1 0 20n + C2 in n2 10n + C3 n2 out 10n + R3 n2 0 7.5k + Rload out 0 100k + .AC DEC 100 100 10k + .MEAS AC low_gain FIND MAG(V(out)) AT=100 + .MEAS AC high_gain FIND MAG(V(out)) AT=10k + .MEAS AC min_gain MIN MAG(V(out)) + .MEAS AC gain_at_f0 FIND MAG(V(out)) AT=1591 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "min_gain", 0.01, 0.15); + AssertMeasurementBetween(result, "gain_at_f0", 0.01, 0.15); + AssertMeasurementBetween(result, "low_gain", 0.7, 1.0); + AssertMeasurementBetween(result, "high_gain", 0.7, 1.1); + } + + // Prompt: This is a DTL NAND gate implemented with two input diodes, a level-shifting diode, an NPN transistor, and resistors. Input A is swept from 0 to 5V while input B is held high at 5V. + [Fact] + public void DTL_NAND_Gate_19fe261848bc77c1() + { + var result = RunAcceptedExample( + "deepseek:02463_f63c01c1b1adb74c:19fe261848bc77c1", + """ + * DTL NAND Gate + VCC VCC 0 DC 5 + VINA A 0 DC 0 + VINB B 0 DC 5 + R1 VCC BASE 10K + R2 VCC OUT 1K + R3 TBASE 0 10K + DMOD1 BASE A DMOD + DMOD2 BASE B DMOD + DMOD3 BASE TBASE DMOD + Q1 OUT TBASE 0 QNPN + .MODEL DMOD D(IS=1E-14 RS=10) + .MODEL QNPN NPN(IS=1E-14 BF=100 VAF=50) + .DC VINA 0 5 0.01 + .MEAS DC VOUT_HIGH FIND V(OUT) AT=0 + .MEAS DC VOUT_LOW FIND V(OUT) AT=3.5 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementGreater(result, "VOUT_HIGH", 4.5); + AssertMeasurementLess(result, "VOUT_LOW", 0.4); + } + + // Prompt: Design a three-stage RC low-pass filter for anti-aliasing with R=1k\u03a9 and C=10nF per stage. Perform an AC analysis to measure the -3 dB bandwidth and the attenuation at 100 kHz. + [Fact] + public void Three_section_RC_low_pass_anti_alias_filter_d43a00d3a8380bf8() + { + var result = RunAcceptedExample( + "deepseek:00644_0898d4113455f3a9:d43a00d3a8380bf8", + """ + * Three-section RC low-pass anti-alias filter + R1 in n1 1k + C1 n1 0 10n + R2 n1 n2 1k + C2 n2 0 10n + R3 n2 out 1k + C3 out 0 10n + VIN in 0 AC 1 DC 0 + .AC DEC 100 10 100k + .MEAS AC f3db WHEN VDB(out)=-3 + .MEAS AC att100k FIND VDB(out) AT=100k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "f3db", 1000.0, 10000.0); + AssertMeasurementLess(result, "att100k", (-40.0)); + } + + // Prompt: Diode-based charge pump inverter generating negative voltage from a 5V 50kHz square wave. + [Fact] + public void Diode_Charge_Pump_Inverter_dd955af64518b7e9() + { + var result = RunAcceptedExample( + "deepseek:00872_74cfe835e715bc2a:dd955af64518b7e9", + """ + * Diode Charge Pump Inverter + VCLK clk 0 PULSE(0 5 0 1n 1n 10u 20u) + C1 clk nA 100n + D1 nA 0 DMOD + D2 Vout nA DMOD + Cout Vout 0 100n + Rload Vout 0 1k + .MODEL DMOD D(IS=1e-12 RS=0.1 N=1) + .TRAN 1u 1m 0 1u + .MEAS TRAN Vout_avg AVG V(Vout) FROM=0.5m TO=1m + .MEAS TRAN Vout_min MIN V(Vout) FROM=0.5m TO=1m + .MEAS TRAN Vout_max MAX V(Vout) FROM=0.5m TO=1m + .MEAS TRAN Vout_ripple PP V(Vout) FROM=0.5m TO=1m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "Vout_avg", (-4.5), (-3.0)); + AssertMeasurementLess(result, "Vout_min", (-3.0)); + AssertMeasurementLess(result, "Vout_max", (-1.0)); + AssertMeasurementBetween(result, "Vout_ripple", 0.0, 1.5); + } + + // Prompt: Double-tuned RF amplifier using a BJT in common-emitter configuration with capacitive coupling between two LC tanks. + [Fact] + public void Double_tuned_RF_transformer_equivalent_amplifier_using_capacitive_coupling_27fa3ef4568078b8() + { + var result = RunAcceptedExample( + "deepseek:02055_597bec09d2bd07cf:27fa3ef4568078b8", + """ + * Double-tuned RF transformer-equivalent amplifier using capacitive coupling + VCC VCC 0 DC 12V + VIN IN 0 DC 0 AC 1 + Cb IN base 0.1uF + R1 VCC base 12k + R2 base 0 11k + Q1 collector base emitter npn_mod + RE emitter 0 5.1k + CE emitter 0 0.1uF + L1 VCC collector 1uH + C1 collector 0 250pF + Rpr1 collector 0 640 + Cc collector out 25pF + L2 out 0 1uH + C2 out 0 250pF + Rpr2 out 0 1.7k + Rload out 0 1k + .MODEL npn_mod NPN(IS=1e-15 BF=100 VAF=50) + .OP + .AC DEC 100 1MEG 100MEG + .MEAS AC gain_10M FIND VDB(out) AT=10MEG + .MEAS AC phase_10M FIND VP(out) AT=10MEG + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "gain_10M", 0.0, 30.0); + AssertMeasurementLess(result, "phase_10M", 0.0); + } + + // Prompt: Op-amp log amplifier with diode in feedback: input voltage via resistor to inverting input, diode anode to inverting input and cathode to op-amp output. + [Fact] + public void Diode_Log_Converter_with_Op_Amp_Feedback_b97618ba391bac7a() + { + var result = RunAcceptedExample( + "deepseek:00830_ca59689117370034:b97618ba391bac7a", + """ + Diode Log Converter with Op-Amp Feedback + VIN in 0 DC 1 + R1 in inv 1k + E1 out 0 0 inv 100000 + D1 inv out DMOD + .MODEL DMOD D(IS=1e-14 RS=0.1) + .OP + .DC VIN 0.1 10 0.1 + .MEAS DC vout_at_1v FIND V(out) WHEN V(in)=1 + .MEAS DC vout_at_10v FIND V(out) WHEN V(in)=10 + .MEAS DC dec_slope PARAM='vout_at_10v - vout_at_1v' + .END + """); + + AssertAllMeasurementsSuccessful(result); + var vout1 = MeasurementValue(result, "vout_at_1v"); + var vout10 = MeasurementValue(result, "vout_at_10v"); + AssertMeasurementLess(result, "vout_at_1v", 0.0); + AssertMeasurementLess(result, "vout_at_10v", vout1); + AssertMeasurementNear(result, "dec_slope", (-0.06), 0.015); + } + + // Prompt: Zener diode D1 provides a stable 5.1V reference when reverse biased (BV=5.1). + [Fact] + public void Zener_reference_with_emitter_follower_2f29d1b580fe20e3() + { + var result = RunAcceptedExample( + "deepseek:00853_319add54da9e4c07:2f29d1b580fe20e3", + """ + * Zener reference with emitter follower + VCC vcc 0 DC 12 + R1 vcc ref 1k + D1 0 ref zener_mod + Q1 vcc ref out npn_mod + R2 out 0 1k + Rload out 0 10k + .MODEL zener_mod D(BV=5.1 IS=1e-12 RS=5 IBV=20m) + .MODEL npn_mod NPN(BF=100 IS=1e-15 VAF=100) + .OP + .DC VCC 0 12 0.1 + .MEAS DC vref FIND V(ref) AT=12 + .MEAS DC vout FIND V(out) AT=12 + .MEAS DC vout10 FIND V(out) AT=10 + .MEAS DC vout12 FIND V(out) AT=12 + .MEAS DC line_reg PARAM='(vout12 - vout10)/2' + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "vref", 5.07, 0.1); + AssertMeasurementNear(result, "vout", 4.37, 0.15); + AssertMeasurementLess(result, "line_reg", 0.05); + } + + // Prompt: Design a Zobel network (RC series) to stabilize an inductive load, using a 4-ohm resistor and 1mH inductor for the load. + [Fact] + public void Zobel_Network_for_Load_Stabilization_e0ca45a60aa8d55f() + { + var result = RunAcceptedExample( + "deepseek:00494_99c2cd0c0b517b21:e0ca45a60aa8d55f", + """ + * Zobel Network for Load Stabilization + * AC analysis to verify impedance flattening + V1 in 0 DC 0 AC 1 + Rs in mid 4 + * Inductive load: speaker model + L1 mid load_top 1mH + Rload load_top 0 4 + * Zobel network: series RC + Rz mid zobel_mid 4 + Cz zobel_mid 0 62.5uF + .AC DEC 10 10 1MEG + .MEAS AC vmid_1k FIND v(mid) AT=1k + .MEAS AC vmid_100k FIND v(mid) AT=100k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "vmid_1k", 0.5, 0.05); + AssertMeasurementNear(result, "vmid_100k", 0.5, 0.05); + AssertMeasurementRatioBetween(result, "vmid_100k", "vmid_1k", 0.95, 1.05); + AssertHasSuccessfulMeasurement(result, "vmid_1k"); + AssertHasSuccessfulMeasurement(result, "vmid_100k"); + } + + // Prompt: Boost converter with RCD snubber across MOSFET to limit switching voltage spikes. + [Fact] + public void Boost_Converter_with_RCD_Snubber_a5e8de5bbae70eac() + { + var result = RunAcceptedExample( + "deepseek:01990_0bece25f58095e05:a5e8de5bbae70eac", + """ + * Boost Converter with RCD Snubber + VIN in 0 DC 12 + VG gate 0 PULSE(0 10 0 10n 10n 5.4u 10u) + L1 in sw 100u + M1 sw gate 0 0 nmos + D1 sw out dmod + C1 out 0 100u + Rload out 0 10 + D2 sw snub_mid dmod + Rsnub sw snub_mid 100 + Csnub snub_mid 0 10n + .MODEL dmod D(IS=1e-12 RS=0.1 CJO=10p) + .MODEL nmos NMOS(VTO=2 KP=1 LAMBDA=0.01) + Bpwr pwr 0 V=V(out)*V(out)/10 + Bin in_pwr 0 V=-V(in)*I(VIN) + .TRAN 0.1u 5m + .MEAS TRAN Vout_avg AVG V(out) FROM=4m TO=5m + .MEAS TRAN Pin_avg AVG V(in_pwr) FROM=4m TO=5m + .MEAS TRAN Pout_avg AVG V(pwr) FROM=4m TO=5m + .MEAS TRAN Eff PARAM='Pout_avg/Pin_avg' + .MEAS TRAN Vds_max MAX V(sw) FROM=4m TO=5m + .MEAS TRAN Vsnub_max MAX V(snub_mid) FROM=4m TO=5m + .MEAS TRAN I_L_avg AVG I(L1) FROM=4m TO=5m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "Vout_avg", 23.0, 25.0); + AssertMeasurementBetween(result, "Eff", 0.6, 0.95); + AssertMeasurementLess(result, "Vds_max", 40.0); + AssertMeasurementLess(result, "Vsnub_max", 40.0); + AssertMeasurementGreater(result, "I_L_avg", 0.0); + } + + // Prompt: Zener diode voltage regulator circuit with series resistor R1=300\u03a9 and load resistor RLOAD=1k\u03a9. + [Fact] + public void Zener_Voltage_Regulator_with_Series_Resistor_68a21bd26fc2ba7b() + { + var result = RunAcceptedExample( + "deepseek:00135_63e92561ab94c95e:68a21bd26fc2ba7b", + """ + * Zener Voltage Regulator with Series Resistor + VIN in 0 DC 9 + R1 in out 300 + D1 0 out DZ + RLOAD out 0 1k + .MODEL DZ D (BV=5.1 IBV=1m RS=1) + .OP + .DC VIN 0 10 0.1 + .MEAS DC vout_at_7V FIND V(out) AT=7 + .MEAS DC vout_at_9V FIND V(out) AT=9 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "vout_at_7V", 5.1, 0.2); + AssertMeasurementNear(result, "vout_at_9V", 5.1, 0.2); + } + + // Prompt: RC low-pass filter with R=1k, C=1u, time constant 1ms. + [Fact] + public void RC_step_response_from_pulse_source_3771b111531f2f3e() + { + var result = RunAcceptedExample( + "deepseek:00029_b488ccf43b4c0725:3771b111531f2f3e", + """ + * RC step response from pulse source + R1 in out 1k + C1 out 0 1u + VIN in 0 PULSE(0 1 0 1u 1u 5m 10m) + .TRAN 10u 10m + .MEAS TRAN trise TRIG V(out) VAL=0.1 RISE=1 TARG V(out) VAL=0.9 RISE=1 + .MEAS TRAN tfall TRIG V(out) VAL=0.9 FALL=1 TARG V(out) VAL=0.1 FALL=1 + .MEAS TRAN v_1ms FIND V(out) AT=1m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "trise", 0.002, 0.0024); + AssertMeasurementBetween(result, "tfall", 0.002, 0.0024); + AssertMeasurementNear(result, "v_1ms", 0.632, 0.01); + } + + // Prompt: Strain gauge signal conditioning circuit with a Wheatstone bridge powered by 10V DC and a three-op-amp instrumentation amplifier with gain 21. + [Fact] + public void Strain_gauge_Wheatstone_bridge_with_instrumentation_amplifier_a944a1589089e912() + { + var result = RunAcceptedExample( + "deepseek:02152_966b9baa2ee3b5eb:a944a1589089e912", + """ + * Strain-gauge Wheatstone bridge with instrumentation amplifier + Vbridge top 0 DC 10 + R1 top left 350 + R2 left 0 350 + R3 top right R = {350 + V(ctrl)} + R4 right 0 350 + Vctrl ctrl 0 DC 0 + E1 Aout 0 left A 100k + E2 Bout 0 right B 100k + Rf1 Aout A 10k + Rf2 Bout B 10k + RG A B 1k + E3 out 0 D C 100k + Rin1 Bout C 10k + Rf3 out C 10k + Rin2 Aout D 10k + Rgnd D 0 10k + .DC Vctrl -5 5 5 + .MEASURE DC Vout_balance FIND V(out) WHEN V(ctrl)=0 + .MEASURE DC Vout_strain FIND V(out) WHEN V(ctrl)=5 + .MEASURE DC Vout_min FIND V(out) WHEN V(ctrl)=-5 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "Vout_balance", (-0.1), 0.1); + AssertMeasurementBetween(result, "Vout_strain", 0.6, 0.9); + AssertMeasurementBetween(result, "Vout_min", (-0.9), (-0.6)); + } + + // Prompt: Design a 10 dB resistive L-pad attenuator for a 50-ohm source and load impedances, and simulate its AC response. + [Fact] + public void L_pad_attenuator_10dB_50_ohm_matched_input_7f03780a1382c8dd() + { + var result = RunAcceptedExample( + "deepseek:00450_146dc9d921715552:7f03780a1382c8dd", + """ + * L-pad attenuator 10dB, 50 ohm matched input + V1 src 0 DC 0 AC 1 + Rsrc src in 50 + Rser in out 18.4 + Rshunt out 0 86.1 + Rload out 0 50 + .OP + .AC DEC 10 1 1MEG + .MEAS AC atten_db FIND VDB(out) AT=1K + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "atten_db", (-10.0), 0.1); + } + + // Prompt: Dual-polarity full-wave rectifier using two diodes and center-tapped transformer secondary + [Fact] + public void Dual_Polarity_Full_Wave_Rectifier_Supply_9b3a7fa0e2c908f0() + { + var result = RunAcceptedExample( + "deepseek:00707_e39c4f6dd5bb3899:9b3a7fa0e2c908f0", + """ + * Dual-Polarity Full-Wave Rectifier Supply + V1 top 0 SIN(0 18 60 0 0 0) + V2 0 bottom SIN(0 18 60 0 0 0) + D1 top vplus dmod + D2 vminus bottom dmod + C1 vplus 0 470u + C2 vminus 0 470u + Rload1 vplus 0 1k + Rload2 vminus 0 1k + .model dmod D(IS=1e-12 RS=0.1) + .ic V(vplus)=17 V(vminus)=-17 + .tran 0.05m 0.3 + .meas tran vplus_avg AVG V(vplus) FROM=0.2 TO=0.3 + .meas tran vminus_avg AVG V(vminus) FROM=0.2 TO=0.3 + .meas tran vplus_ripple PP V(vplus) FROM=0.25 TO=0.3 + .meas tran vminus_ripple PP V(vminus) FROM=0.25 TO=0.3 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "vplus_avg", 16.0, 18.0); + AssertMeasurementBetween(result, "vminus_avg", (-18.0), (-16.0)); + AssertMeasurementLess(result, "vplus_ripple", 1.0); + AssertMeasurementLess(result, "vminus_ripple", 1.0); + } + + // Prompt: Simulate a half-wave rectifier that uses a single diode to convert a 10 V amplitude 60 Hz sine wave into DC, with a 100 uF smoothing capacitor and 1 kOhm load resistor. + [Fact] + public void Half_wave_rectifier_with_smoothing_capacitor_3528ca09e1bbc1d5() + { + var result = RunAcceptedExample( + "deepseek:00114_82b0eb5468dfffdd:3528ca09e1bbc1d5", + """ + * Half-wave rectifier with smoothing capacitor + VIN 1 0 SIN(0 10 60 0 0) + D1 1 out DMOD + C1 out 0 100u + Rload out 0 1k + .MODEL DMOD D(IS=1e-12 RS=1) + .tran 0.1m 0.1 + .meas TRAN Vavg AVG V(out) FROM=20m TO=100m + .meas TRAN Vripple PP V(out) FROM=20m TO=100m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "Vavg", 7.0, 9.5); + AssertMeasurementBetween(result, "Vripple", 0.5, 3.0); + } + + // Prompt: PMOS LDO with 1.8V output and 50mA load + [Fact] + public void PMOS_LDO_Linear_Regulator_5ff785af6b10b64c() + { + var result = RunAcceptedExample( + "deepseek:01883_a9afb9fa78343e2f:5ff785af6b10b64c", + """ + * PMOS LDO Linear Regulator + VIN in 0 3.3 + VREF ref 0 1.2 + E_ERR err_int 0 VALUE={ (V(fb) - V(ref)) * 1000 } + Rerr err_int gate 1k + Dlow 0 gate DCLAMP + Dhigh gate in DCLAMP + M_PASS out gate in in PMOS W=2000u L=1u + R1 out fb 100k + R2 fb 0 200k + ILOAD out 0 50m + .MODEL PMOS PMOS (VTO=-0.8 KP=100e-6 LAMBDA=0.02) + .MODEL DCLAMP D (IS=1e-12 RS=1) + .NODESET V(out)=1.8 + .OPTIONS ITL1=500 ITL2=500 + .OP + .DC VIN 1.6 5 0.01 + .MEAS DC VOUT33 FIND V(out) AT=3.3 + .MEAS DC VOUT5 FIND V(out) AT=5 + .MEAS DC LINEREG PARAM = (VOUT5-VOUT33)/(5-3.3)*1e3 + .MEAS DC VIN_DROP FIND V(in) WHEN V(out)=1.7 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "VOUT33", 1.79, 1.81); + AssertMeasurementBetween(result, "VOUT5", 1.79, 1.81); + AssertMeasurementBetween(result, "LINEREG", (-5.0), 5.0); + AssertMeasurementLess(result, "VIN_DROP", 2.0); + } + + // Prompt: Difference amplifier with op-amp (E-source) and matched resistor ratios + [Fact] + public void Op_Amp_Subtractor_with_Matched_Resistor_Ratios_78839c09c80ea95b() + { + var result = RunAcceptedExample( + "deepseek:01469_85b3bab85d762c2b:78839c09c80ea95b", + """ + * Op-Amp Subtractor with Matched Resistor Ratios + R1 in1 n1 10k + R2 n1 out 100k + R3 in2 n2 10k + R4 n2 0 100k + E1 out 0 n2 n1 100000 + V1 in1 0 DC 0.1 AC 0 + V2 in2 0 DC 0.2 AC 1 + .dc V2 0.2 0.2 1 + .ac dec 10 1 100k + .meas dc vout_dc FIND v(out) AT=0.2 + .meas ac gain_ac FIND mag(v(out)) AT=1k + .end + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "vout_dc", 1.0, 0.05); + AssertMeasurementNear(result, "gain_ac", 10.0, 0.5); + } + + // Prompt: The circuit is a wide-swing cascode NMOS current mirror using a 5V supply and a 100uA reference current. + [Fact] + public void Wide_Swing_Cascode_NMOS_Current_Mirror_5ce9bacd00954c84() + { + var result = RunAcceptedExample( + "deepseek:01292_2a684fbe38647e82:5ce9bacd00954c84", + """ + * Wide-Swing Cascode NMOS Current Mirror + .MODEL nmos_mod NMOS(VTO=0.7 KP=100u LAMBDA=0.02) + VDD vdd 0 DC 5 + IREF vdd ref DC 100u + Vcasc vcasc 0 DC 2 + M1 d1 d1 0 0 nmos_mod W=8u L=1u + M2 ref vcasc d1 0 nmos_mod W=8u L=1u + M3 d2 d1 0 0 nmos_mod W=8u L=1u + M4 out vcasc d2 0 nmos_mod W=8u L=1u + Vout out 0 DC 0 + .OP + .DC Vout 0 5 0.01 + .MEAS DC I_AT_0V5 FIND I(Vout) AT=0.5 + .MEAS DC I_AT_1V5 FIND I(Vout) AT=1.5 + .MEAS DC I_AT_3V FIND I(Vout) AT=3 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "I_AT_0V5", (-9.5e-05), 0.0); + AssertMeasurementBetween(result, "I_AT_1V5", (-0.000105), (-9.5e-05)); + AssertMeasurementBetween(result, "I_AT_3V", (-0.000105), (-9.5e-05)); + } + + // Prompt: Design a precision half-wave rectifier using an op-amp and a diode, with a sine wave input. + [Fact] + public void Precision_half_wave_rectifier_a8468b0d43422655() + { + var result = RunAcceptedExample( + "deepseek:00716_e02374a81d585931:a8468b0d43422655", + """ + * Precision half-wave rectifier + VIN in 0 SIN(0 1 1k) + R1 rect_out 0 10k + D1 op_out rect_out DMOD + E_OP op_out 0 in rect_out 100000 + .MODEL DMOD D(IS=1e-12 RS=1) + .tran 1u 2m + .measure TRAN Vout_avg AVG V(rect_out) from=1m to=2m + .measure TRAN Vout_max MAX V(rect_out) from=1m to=2m + .measure TRAN Vout_min MIN V(rect_out) from=1m to=2m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "Vout_max", 0.95, 1.05); + AssertMeasurementBetween(result, "Vout_min", (-0.001), 0.001); + AssertMeasurementBetween(result, "Vout_avg", 0.3, 0.35); + } + + // Prompt: This circuit is a two-pole passive low-pass filter built with two cascaded RC stages. + [Fact] + public void Two_pole_passive_RC_ladder_low_pass_filter_9c3e477460e909f7() + { + var result = RunAcceptedExample( + "deepseek:00047_ede8054ed3fe5afa:9c3e477460e909f7", + """ + * Two-pole passive RC ladder low-pass filter + VIN IN 0 AC 1 DC 0 + R1 IN 1 1k + C1 1 0 10n + R2 1 OUT 1k + C2 OUT 0 100n + .AC DEC 200 1 1MEG + .MEAS AC gain_lf FIND VDB(OUT) AT=1 + .MEAS AC gain_hf FIND VDB(OUT) AT=100k + .MEAS AC bw WHEN VDB(OUT)=-3 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "gain_lf", 0.0, 0.1); + AssertMeasurementLess(result, "gain_hf", (-40.0)); + AssertMeasurementBetween(result, "bw", 600.0, 800.0); + } + + // Prompt: Monostable 555 timer implemented with behavioral comparators and a switched-capacitor latch. + [Fact] + public void _555_monostable_timer_using_behavioral_comparators_switched_capacitor_latch_and_discharge_switch_1daf9285cad40f05() + { + var result = RunAcceptedExample( + "deepseek:01819_db0f353ed1e2dda8:1daf9285cad40f05", + """ + * 555 monostable timer using behavioral comparators, switched-capacitor latch, and discharge switch + VCC vcc 0 DC 5 + VTRIG trigger 0 PULSE(5 0 1m 1n 1n 0.1m 100m) + R_DIV1 vcc v2 10k + R_DIV2 v2 v1 10k + R_DIV3 v1 0 10k + R_TIM vcc thres 10k + C_TIM thres 0 1uF IC=0 + E_TRIG_LOW trig_low 0 VALUE={ IF(V(trigger) < V(v1), 5, 0) } + E_THRES_HIGH thres_high 0 VALUE={ IF(V(thres) > V(v2), 5, 0) } + C_LATCH latch 0 100nF IC=0 + .MODEL SW_LATCH SW(RON=1k ROFF=10MEG VT=2.5 VH=0.5) + S_SET vcc latch trig_low 0 SW_LATCH + S_RESET latch 0 thres_high 0 SW_LATCH + E_OUT out 0 VALUE={ IF(V(latch) > 2.5, 5, 0) } + E_DIS dis_ctrl 0 VALUE={ IF(V(latch) < 2.5, 5, 0) } + .MODEL SW_DIS SW(RON=10 ROFF=10MEG VT=2.5 VH=0.5) + S_DIS thres 0 dis_ctrl 0 SW_DIS + .TRAN 0.01m 20m UIC + .MEAS TRAN trig_fall WHEN V(trigger)=2.5 FALL=1 + .MEAS TRAN out_rise WHEN V(out)=2.5 RISE=1 + .MEAS TRAN out_fall WHEN V(out)=2.5 FALL=1 + .MEAS TRAN pw PARAM='out_fall - out_rise' + .END + """); + + AssertAllMeasurementsSuccessful(result); + var trig_fall = MeasurementValue(result, "trig_fall"); + var out_rise = MeasurementValue(result, "out_rise"); + var out_fall = MeasurementValue(result, "out_fall"); + var pw = MeasurementValue(result, "pw"); + Assert.True(((trig_fall < out_rise)), CaseLabel(result)); + Assert.True(((out_rise < out_fall)), CaseLabel(result)); + AssertMeasurementNear(result, "pw", 0.011, 0.001); + } + + // Prompt: Design a passive RLC notch filter that attenuates a 1 kHz signal by at least 40 dB while passing lower and higher frequencies. Provide a SPICE netlist with AC analysis and measurements. + [Fact] + public void RLC_notch_filter_c278190d6d382033() + { + var result = RunAcceptedExample( + "deepseek:00087_48b56524fa727376:c278190d6d382033", + """ + * RLC notch filter + V1 in 0 AC 1 + L1 in out 10m + C1 in out 2.533u + R1 in out 100k + R2 out 0 1k + .AC DEC 10 1 1MEG + .MEAS AC v_at_res FIND V(out) AT=1k + .MEAS AC v_at_low FIND V(out) AT=100 + .MEAS AC v_at_high FIND V(out) AT=10k + .MEAS AC v_min MIN V(out) + .END + """); + + AssertAllMeasurementsSuccessful(result); + var v_at_res = MeasurementValue(result, "v_at_res"); + var v_at_low = MeasurementValue(result, "v_at_low"); + var v_at_high = MeasurementValue(result, "v_at_high"); + var v_min = MeasurementValue(result, "v_min"); + AssertMeasurementLess(result, "v_at_res", 0.015); + AssertMeasurementGreater(result, "v_at_low", 0.9); + AssertMeasurementGreater(result, "v_at_high", 0.9); + AssertMeasurementNear(result, "v_min", v_at_res, 0.001); + } + + // Prompt: Design an op-amp controlled constant-current battery charger circuit. The charger should use an NPN transistor and a sense resistor to maintain a fixed charging current regardless of the battery voltage. Provide a SPICE netlist that demonstrates this behavior with a DC sweep of the battery voltage. + [Fact] + public void Constant_Current_Battery_Charger_with_Op_Amp_Control_07b32bb8c307b627() + { + var result = RunAcceptedExample( + "deepseek:01925_07b32bb8c307b627:07b32bb8c307b627", + """ + * Constant-Current Battery Charger with Op-Amp Control + Vcc vcc 0 DC 12V + Vref ref 0 DC 1.2V + Vbat vcc bat DC 3.7V + Rsense emitter 0 1 + Rbase ampout base 1k + Q1 bat base emitter QN + E1 ampout 0 ref emitter 1e5 + .model QN NPN(IS=1e-15 BF=100) + .OP + .DC Vbat 0 5 0.1 + .MEAS DC Icharge_AT_1V5 FIND I(Rsense) AT=1.5 + .MEAS DC Icharge_AT_3V7 FIND I(Rsense) AT=3.7 + .MEAS DC Icharge_AT_0V FIND I(Rsense) AT=0.0 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "Icharge_AT_3V7", 1.2, 0.05); + AssertMeasurementNear(result, "Icharge_AT_1V5", 1.2, 0.05); + AssertMeasurementNear(result, "Icharge_AT_0V", 1.2, 0.05); + } + + // Prompt: Design a passive twin-T notch filter centered at 1 kHz. Use proper resistor and capacitor values to achieve the notch. Perform an AC analysis from 10 Hz to 100 kHz and measure the output magnitude at the notch frequency. + [Fact] + public void Twin_T_Notch_Filter_AC_Analysis_3051e8138f273a96() + { + var result = RunAcceptedExample( + "deepseek:00091_1b76b33c190845ec:3051e8138f273a96", + """ + * Twin-T Notch Filter AC Analysis + .AC DEC 200 10 100k + V1 in 0 AC 1 + R1 in n1 10k + R2 n1 out 10k + C1 in n2 15.9155nF + C2 n2 out 15.9155nF + R3 n2 0 5k + C3 n1 0 31.831nF + .MEAS AC vout_dB_at_notch FIND VdB(out) AT=1kHz + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementLess(result, "vout_dB_at_notch", (-40.0)); + } + + // Prompt: Design a bridge rectifier polarity protection circuit using four diodes. The input is a 10V peak 50Hz sine wave. Output should always be positive across a 1k load. + [Fact] + public void Bridge_Diode_Polarity_Protector_67056763fda33cb9() + { + var result = RunAcceptedExample( + "deepseek:00785_cd2555c7b47b96ed:67056763fda33cb9", + """ + * Bridge Diode Polarity Protector + VIN in 0 SIN(0 10 50 0 0) + D1 in out1 DMOD + D2 0 out1 DMOD + D3 out2 in DMOD + D4 out2 0 DMOD + Rload out1 out2 1k + .MODEL DMOD D(IS=1e-9 RS=0.1) + .OP + .TRAN 0.1m 40m + .MEAS TRAN vout_min MIN V(out1,out2) + .MEAS TRAN vout_avg AVG V(out1,out2) FROM=20m TO=40m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementGreater(result, "vout_min", (-0.1)); + AssertMeasurementBetween(result, "vout_avg", 4.5, 6.5); + } + + // Prompt: Relaxation oscillator using an E\u2011source comparator with hysteresis defined by a TABLE, generating square and triangular waves. + [Fact] + public void Relaxation_Oscillator_with_Comparator_cf7314a1b0b9446b() + { + var result = RunAcceptedExample( + "deepseek:00422_cfc7ae16386337ef:cf7314a1b0b9446b", + """ + * Relaxation Oscillator with Comparator + E_COMP out 0 TABLE {V(nplus)-V(nminus)} = (-1e-6, -10) (1e-6, 10) + R1 out nplus 10k + R2 nplus 0 10k + R3 out nminus 10k + C1 nminus 0 0.1u + .IC V(nminus)=0.1 + .TRAN 1u 10ms 0 1u + .MEASURE TRAN period TRIG V(out) VAL=0 RISE=1 TARG V(out) VAL=0 RISE=2 + .MEASURE TRAN frequency PARAM 1/period + .MEASURE TRAN duty_cycle TRIG V(out) VAL=0 RISE=1 TARG V(out) VAL=0 FALL=1 + .MEASURE TRAN v_high MAX V(out) FROM=0.1m TO=10m + .MEASURE TRAN v_low MIN V(out) FROM=0.1m TO=10m + .MEASURE TRAN v_cap_max MAX V(nminus) FROM=0.1m TO=10m + .MEASURE TRAN v_cap_min MIN V(nminus) FROM=0.1m TO=10m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "frequency", 400.0, 500.0); + AssertMeasurementRatioBetween(result, "duty_cycle", "period", 0.4, 0.6); + AssertMeasurementBetween(result, "v_high", 9.5, 10.5); + AssertMeasurementBetween(result, "v_low", (-10.5), (-9.5)); + AssertMeasurementBetween(result, "v_cap_max", 4.5, 5.5); + AssertMeasurementBetween(result, "v_cap_min", (-5.5), (-4.5)); + } + + // Prompt: This circuit models an op-amp with a slew rate of 1 V/\xb5s using behavioral sources and a capacitor integrator. + [Fact] + public void Slew_Rate_Limiter_with_Behavioral_Op_Amp_41fbb87ba6575ec6() + { + var result = RunAcceptedExample( + "deepseek:01586_6ce05cc8b48558dc:41fbb87ba6575ec6", + """ + * Slew-Rate Limiter with Behavioral Op-Amp + VIN in 0 PULSE(-1 1 0 1n 1n 10u 20u) + R1 in inv 10k + R2 out inv 100k + G1 0 cap VALUE={ 1e-3 * tanh(1000 * V(0,inv)) } + C1 cap 0 1n + E1 out 0 cap 0 1 + Rload out 0 10MEG + .IC V(cap)=10 + .TRAN 0.1u 30u + .MEAS TRAN t_fall_start WHEN V(out)=8 FALL=1 + .MEAS TRAN t_fall_stop WHEN V(out)=2 FALL=1 + .MEAS TRAN t_rise_start WHEN V(out)=2 RISE=1 + .MEAS TRAN t_rise_stop WHEN V(out)=8 RISE=1 + .MEAS TRAN slew_falling PARAM='6/(t_fall_stop - t_fall_start)' + .MEAS TRAN slew_rising PARAM='6/(t_rise_stop - t_rise_start)' + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "slew_falling", 1000000.0, 100000.0); + AssertMeasurementNear(result, "slew_rising", 1000000.0, 100000.0); + } + + // Prompt: Fixed-bias common-emitter BJT amplifier using a 2N3904-like NPN transistor. + [Fact] + public void Fixed_bias_common_emitter_BJT_amplifier_6fd3dd19fea6ad96() + { + var result = RunAcceptedExample( + "deepseek:00889_016d9efbef5585af:6fd3dd19fea6ad96", + """ + * Fixed-bias common-emitter BJT amplifier + Vcc vcc 0 DC 12 + Vsig in 0 AC 1 + Cin in base 10uF + Rb vcc base 470k + Q1 collector base 0 NPN_mod + Rc vcc collector 2.2k + Cout collector out 10uF + RL out 0 10k + .model NPN_mod NPN(IS=1e-15 BF=100) + .OP + .AC DEC 10 10 10MEG + .MEAS AC vout_mag FIND VM(out) AT=1kHz + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "vout_mag", 150.0, 180.0); + } + + // Prompt: CMOS 5-stage current-starved ring oscillator. + [Fact] + public void CMOS_Current_Starved_Ring_Oscillator_2c24ede7f425322a() + { + var result = RunAcceptedExample( + "deepseek:01378_7683ea3bd6c849b7:2c24ede7f425322a", + """ + * CMOS Current-Starved Ring Oscillator + M_P1 pstarve1 out5 out1 vdd PMOD W=10u L=1u + M_N1 nstarve1 out5 out1 0 NMOD W=5u L=1u + M_PS1 pstarve1 Vbp vdd vdd PMOD W=20u L=1u + M_NS1 nstarve1 Vctrl 0 0 NMOD W=10u L=1u + C1 out1 0 100f + M_P2 pstarve2 out1 out2 vdd PMOD W=10u L=1u + M_N2 nstarve2 out1 out2 0 NMOD W=5u L=1u + M_PS2 pstarve2 Vbp vdd vdd PMOD W=20u L=1u + M_NS2 nstarve2 Vctrl 0 0 NMOD W=10u L=1u + C2 out2 0 100f + M_P3 pstarve3 out2 out3 vdd PMOD W=10u L=1u + M_N3 nstarve3 out2 out3 0 NMOD W=5u L=1u + M_PS3 pstarve3 Vbp vdd vdd PMOD W=20u L=1u + M_NS3 nstarve3 Vctrl 0 0 NMOD W=10u L=1u + C3 out3 0 100f + M_P4 pstarve4 out3 out4 vdd PMOD W=10u L=1u + M_N4 nstarve4 out3 out4 0 NMOD W=5u L=1u + M_PS4 pstarve4 Vbp vdd vdd PMOD W=20u L=1u + M_NS4 nstarve4 Vctrl 0 0 NMOD W=10u L=1u + C4 out4 0 100f + M_P5 pstarve5 out4 out5 vdd PMOD W=10u L=1u + M_N5 nstarve5 out4 out5 0 NMOD W=5u L=1u + M_PS5 pstarve5 Vbp vdd vdd PMOD W=20u L=1u + M_NS5 nstarve5 Vctrl 0 0 NMOD W=10u L=1u + C5 out5 0 100f + Vvdd vdd 0 DC 5 + Vctrl Vctrl 0 DC 2.5 + R1 vdd Vbp 10k + R2 Vbp 0 10k + .MODEL NMOD NMOS (VTO=1 KP=50U LAMBDA=0.02) + .MODEL PMOD PMOS (VTO=-1 KP=20U LAMBDA=0.02) + .TRAN 1n 100n + .IC V(out5)=0 + .MEAS TRAN period TRIG V(out1) VAL=2.5 RISE=1 TARG V(out1) VAL=2.5 RISE=2 + .MEAS TRAN freq PARAM 1/period + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "period", 2e-09, 1e-08); + AssertMeasurementBetween(result, "freq", 100000000.0, 500000000.0); + } + + // Prompt: Design a non-inverting amplifier with a gain of 10. Use an ideal op-amp modeled with a voltage-controlled voltage source. + [Fact] + public void Non_inverting_amplifier_with_ideal_op_amp_ddfb6f57ebeb5099() + { + var result = RunAcceptedExample( + "deepseek:00314_ddfb6f57ebeb5099:ddfb6f57ebeb5099", + """ + * Non-inverting amplifier with ideal op-amp + VIN plus 0 AC 1 + R1 minus 0 1k + Rf out minus 9k + E1 out 0 plus minus 1e5 + .AC DEC 10 1 100k + .MEAS AC gain_db FIND VDB(out) AT=1k + .MEAS AC phase FIND VP(out) AT=1k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "gain_db", 20.0, 0.1); + AssertMeasurementNear(result, "phase", 0.0, 1.0); + } + + // Prompt: An inverting op-amp integrator built with an E-source (gain = 1e5) configured for negative feedback. + [Fact] + public void Op_Amp_Integrator_with_Reset_Switch_ebcf9a2b3602c8a4() + { + var result = RunAcceptedExample( + "deepseek:00340_7e20bf699892eca1:ebcf9a2b3602c8a4", + """ + * Op-Amp Integrator with Reset Switch + .param R1=1k C1=0.1uF + VIN in 0 PULSE(0 1 20u 1n 1n 100u 200u) + V_reset reset_control 0 PULSE(5 0 1u 10n 10n 199u 200u) + E1 out 0 0 inv 1e5 + R1 in inv 1k + C1 out inv 0.1uF + Rload out 0 1k + S1 inv out reset_control 0 swmod + .model swmod SW(RON=10 ROFF=100MEG VT=2 VH=0.5) + .tran 1u 200u + .measure TRAN vout_at_19u FIND v(out) AT=19u + .measure TRAN vout_at_100u FIND v(out) AT=100u + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "vout_at_19u", (-0.05), 0.05); + AssertMeasurementBetween(result, "vout_at_100u", (-0.9), (-0.7)); + } + + // Prompt: Three-op-amp instrumentation amplifier with second-stage difference amplifier including a driven reference node (Vref). + [Fact] + public void Instrumentation_Amplifier_with_Driven_Reference_Node_7f73d964590c9f61() + { + var result = RunAcceptedExample( + "deepseek:01480_72a4455fedc75021:7f73d964590c9f61", + """ + * Instrumentation Amplifier with Driven Reference Node + Vpos vcc 0 12 + Vneg vee 0 -12 + Vref ref 0 DC 2.5 + Vinp inp 0 DC 0 AC 0.1 + Vinn inn 0 DC 0 + E_U1 v1 0 inp n1 100k + E_U2 v2 0 inn n2 100k + E_U3 out 0 n4 n3 100k + Rf1 v1 n1 10k + Rf2 v2 n2 10k + Rg n1 n2 2k + R3 v1 n3 10k + R4 n3 out 10k + R5 v2 n4 10k + R6 n4 ref 10k + Rload out 0 10k + .DC vref 0 5 0.1 + .AC dec 10 1 100k + .MEAS DC vout_dc FIND v(out) AT=2.5 + .MEAS DC vref_dc FIND v(ref) AT=2.5 + .MEAS AC vout_mag FIND vm(out) AT=1000 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "vout_dc", 2.5, 0.01); + AssertMeasurementNear(result, "vref_dc", 2.5, 0.01); + AssertMeasurementNear(result, "vout_mag", 1.1, 0.02); + } + + // Prompt: This is a biased negative diode limiter circuit. + [Fact] + public void Biased_Negative_Diode_Limiter_a941d21697c4fbf9() + { + var result = RunAcceptedExample( + "deepseek:00757_b530489a82d815e6:a941d21697c4fbf9", + """ + * Biased Negative Diode Limiter + VIN in 0 SIN(0 5 1k 0 0) + R1 in out 1k + D1 bias out dmod + VBIAS bias 0 DC -2 + .MODEL dmod D (IS=2.682n N=1.836 RS=0.566 BV=100 IBV=100u CJO=4p TT=11.54n) + .TRAN 0.1m 2m + .MEASURE TRAN vmax MAX V(out) FROM=0 TO=2m + .MEASURE TRAN vmin MIN V(out) FROM=0 TO=2m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "vmax", 5.0, 0.5); + AssertMeasurementBetween(result, "vmin", (-3.0), (-2.5)); + } + + // Prompt: Three-stage high-pass RC ladder with tapered impedance to minimize loading + [Fact] + public void Three_section_RC_phase_shift_ladder_with_tapered_impedance_for_negligible_loading_eccd863ab67fba20() + { + var result = RunAcceptedExample( + "deepseek:00055_855ea3e1463e00ff:eccd863ab67fba20", + """ + * Three-section RC phase-shift ladder with tapered impedance for negligible loading + VIN in 0 DC 0 AC 1 + C1 in n1 100nF + R1 n1 0 1k + C2 n1 n2 10nF + R2 n2 0 10k + C3 n2 out 1nF + R3 out 0 100k + .AC DEC 100 1 1000k + .MEAS AC phase_919 FIND VP(out) AT=919 + .MEAS AC gain_919 FIND VDB(out) AT=919 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "phase_919", (-190.0), 190.0); + AssertMeasurementNear(result, "gain_919", (-18.06), 2.0); + } + + // Prompt: Design a two-input CMOS NAND gate and run a transient analysis to observe its switching response. + [Fact] + public void CMOS_NAND2_Transient_Response_d68e9f47fa7d43af() + { + var result = RunAcceptedExample( + "deepseek:00292_4ae614176e96d9f2:d68e9f47fa7d43af", + """ + * CMOS NAND2 Transient Response + M1 out a vdd vdd pmos W=10u L=2u + M2 out b vdd vdd pmos W=10u L=2u + M3 out a n1 0 nmos W=4u L=2u + M4 n1 b 0 0 nmos W=4u L=2u + Vdd vdd 0 DC 5 + Vina a 0 PULSE(0 5 0 1n 1n 2u 4u) + Vinb b 0 PULSE(0 5 0 1n 1n 2u 4u) + .model nmos NMOS(VTO=1 KP=100u LAMBDA=0.02) + .model pmos PMOS(VTO=-1 KP=100u LAMBDA=0.02) + .tran 1n 10u + .measure TRAN vout_high MAX V(out) FROM=0 TO=10u + .measure TRAN vout_low MIN V(out) FROM=0 TO=10u + .measure TRAN prop_delay TRIG V(a) VAL=2.5 RISE=1 TARG V(out) VAL=2.5 FALL=1 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "vout_high", 5.0, 0.5); + AssertMeasurementNear(result, "vout_low", 0.0, 0.5); + AssertMeasurementLess(result, "prop_delay", 1e-08); + } + + // Prompt: Four-quadrant analog multiplier using a behavioral G-source and a resistor. + [Fact] + public void Four_quadrant_analog_multiplier_b164cba17c615afc() + { + var result = RunAcceptedExample( + "deepseek:02300_268d80d12d016e1f:b164cba17c615afc", + """ + * Four-quadrant analog multiplier + VX inx 0 DC 0 SIN(0 1 1k) + VY iny 0 DC 0.5 SIN(0.5 1 1k) + G1 0 out POLY(2) inx 0 iny 0 0 0 0 0 0.001 0 + Rload out 0 1k + .DC VX -1 1 0.01 + .TRAN 1u 2m + .MEAS DC vout_max MAX V(out) + .MEAS DC vout_at_1 FIND V(out) AT=1 + .MEAS TRAN vout_pp PP V(out) + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "vout_max", 0.5, 0.01); + AssertMeasurementNear(result, "vout_at_1", 0.5, 0.01); + AssertMeasurementNear(result, "vout_pp", 1.5625, 0.1); + } + + // Prompt: Synchronous AM detector using a voltage-controlled switch driven by a 100 kHz pulse, half-wave rectifying the AM signal. + [Fact] + public void Synchronous_AM_Detector_with_Switching_Demodulator_102144197d901566() + { + var result = RunAcceptedExample( + "deepseek:02107_97146b2c69d7d71d:102144197d901566", + """ + * Synchronous AM Detector with Switching Demodulator + Vcarrier carr 0 SIN(0 1 100kHz) + Vmod mod 0 SIN(0 0.5 1kHz) + E_AM am_out 0 VALUE = { V(carr) * (1 + V(mod)) } + R1 am_out sw_in 100 + S1 sw_in out switch_ctrl 0 SWMOD + .MODEL SWMOD SW(RON=10 ROFF=1MEG VT=0 VH=0.1) + Vswitch switch_ctrl 0 PULSE(-1 1 0 1n 1n 5u 10u) + Rload out 0 10k + C1 out 0 10nF + .tran 0.1u 5m + .meas tran vout_pp PP V(out) FROM=1m TO=5m + .meas tran vout_rms RMS V(out) FROM=1m TO=5m + .meas tran vout_avg AVG V(out) FROM=1m TO=5m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "vout_pp", 0.5, 1.5); + } + + // Prompt: Design a PWM-based digital-to-analog converter using a simple RC low-pass filter and a unity-gain buffer to reconstruct the analog voltage from a 10kHz PWM signal with 50% duty cycle. Measure the steady-state output voltage and ripple. + [Fact] + public void PWM_DAC_with_RC_reconstruction_filter_e18e405e2b523ce0() + { + var result = RunAcceptedExample( + "deepseek:02192_83f25f858ed9dd70:e18e405e2b523ce0", + """ + * PWM DAC with RC reconstruction filter + Vpwm pwm 0 PULSE(0 5 0 1n 1n 50u 100u) + R1 pwm filt 10k + C1 filt 0 0.1u + E1 out 0 filt out 1e5 + .TRAN 1u 10m 0 1u + .MEAS TRAN vout_avg AVG V(out) FROM=5m TO=10m + .MEAS TRAN vout_ripple PP V(out) FROM=5m TO=10m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "vout_avg", 2.45, 2.55); + AssertMeasurementLess(result, "vout_ripple", 0.15); + AssertMeasurementGreater(result, "vout_ripple", 0.01); + } + + // Prompt: Pi-network matching circuit for 50 Ohm source to 200 Ohm load at 100 MHz. + [Fact] + public void Pi_Network_Impedance_Match_100_MHz_b8afa13d0b50c2ab() + { + var result = RunAcceptedExample( + "deepseek:00100_fd10baf1e55a39f6:b8afa13d0b50c2ab", + """ + * Pi-Network Impedance Match 100 MHz + VIN src 0 AC 1 + RSRC src in 50 + RLOAD out 0 200 + C1 in 0 36.65pF + L1 in out 138nH + C2 out 0 22.93pF + .AC DEC 100 10MEG 1G + .MEAS AC vout_lin FIND VM(out) AT=100MEG + .MEAS AC vin_lin FIND VM(in) AT=100MEG + .MEAS AC vout_dB FIND VDB(out) AT=100MEG + .MEAS AC vin_dB FIND VDB(in) AT=100MEG + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "vout_lin", 1.0, 0.1); + AssertMeasurementNear(result, "vin_lin", 0.5, 0.05); + AssertMeasurementNear(result, "vout_dB", 0.0, 0.5); + AssertMeasurementNear(result, "vin_dB", (-6.0), 0.5); + } + + // Prompt: Two-pole RC ladder low-pass filter with R1=1k, C1=73.58n, R2=10k, C2=3.44n. + [Fact] + public void Two_pole_RC_ladder_low_pass_filter_with_corrected_values_for_1_7_kHz_cutoff_7e0e8c0ad0f181da() + { + var result = RunAcceptedExample( + "deepseek:00042_65ab591429137ac3:7e0e8c0ad0f181da", + """ + * Two-pole RC ladder low-pass filter with corrected values for ~1.7 kHz cutoff + VIN in 0 DC 0 AC 1 + R1 in 1 1k + C1 1 0 73.58n + R2 1 out 10k + C2 out 0 3.44n + .AC DEC 100 1 100k + .MEAS AC f3dB WHEN VDB(out)=-3 + .MEAS AC vout_10k FIND VDB(out) AT=10k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "f3dB", 1000.0, 2000.0); + AssertMeasurementLess(result, "vout_10k", (-20.0)); + } + + // Prompt: Three-stage current-starved ring oscillator using PMOS and NMOS transistors + [Fact] + public void CMOS_current_starved_ring_oscillator_VCO_b918f0f05c4ff04c() + { + var result = RunAcceptedExample( + "deepseek:01383_5990bbe91453af78:b918f0f05c4ff04c", + """ + * CMOS current-starved ring oscillator VCO + VDD vdd 0 DC 5 + Vctrl ctrl 0 DC 2.5 + Rctrl ctrl 0 100k + Mbp bias_p bias_p vdd vdd pch W=10u L=1u + Mbn bias_p ctrl 0 0 nch W=5u L=1u + M2p bias_n bias_p vdd vdd pch W=10u L=1u + Mbn2 bias_n bias_n 0 0 nch W=5u L=1u + MP1s sp1 bias_p vdd vdd pch W=10u L=1u + MP1inv out1 out3 sp1 vdd pch W=5u L=0.5u + MN1inv out1 out3 sn1 0 nch W=2u L=0.5u + MN1s sn1 bias_n 0 0 nch W=5u L=1u + CL1 out1 0 1p + MP2s sp2 bias_p vdd vdd pch W=10u L=1u + MP2inv out2 out1 sp2 vdd pch W=5u L=0.5u + MN2inv out2 out1 sn2 0 nch W=2u L=0.5u + MN2s sn2 bias_n 0 0 nch W=5u L=1u + CL2 out2 0 1p + MP3s sp3 bias_p vdd vdd pch W=10u L=1u + MP3inv out3 out2 sp3 vdd pch W=5u L=0.5u + MN3inv out3 out2 sn3 0 nch W=2u L=0.5u + MN3s sn3 bias_n 0 0 nch W=5u L=1u + CL3 out3 0 1p + .MODEL nch NMOS(VTO=1 KP=100u LAMBDA=0.02) + .MODEL pch PMOS(VTO=-1 KP=50u LAMBDA=0.02) + .TRAN 1n 200n + .IC V(out1)=0 + .MEASURE TRAN period TRIG V(out1) VAL=2.5 RISE=2 TARG V(out1) VAL=2.5 RISE=3 + .MEASURE TRAN freq PARAM=1/period + .MEASURE TRAN vpp PP V(out1) FROM=50n TO=200n + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "period", 2e-08, 6e-08); + AssertMeasurementBetween(result, "freq", 15000000.0, 50000000.0); + AssertMeasurementBetween(result, "vpp", 4.5, 5.5); + } + + // Prompt: Sample-and-hold: switch S1 closes when VSAMPLE pulse is high (0-1\u03bcs), charging CSH to Vin=2.5V; an ideal unity-gain buffer EBUF isolates the hold node. + [Fact] + public void SAR_ADC_Sample_Comparator_Front_End_c25b123971c9d024() + { + var result = RunAcceptedExample( + "deepseek:02221_5d6963507e7e813c:c25b123971c9d024", + """ + * SAR ADC Sample Comparator Front-End + VIN in 0 DC 2.5 + VSAMPLE sample 0 PULSE(0 5 0 10n 10n 1u 20u) + S1 in cap sample 0 swmod + CSH cap 0 10pF + EBUF hold 0 cap 0 1.0 + ECOMP out 0 hold dac 1e6 + D1 out 5 dmod + D2 0 out dmod + Rload out 0 1k + VDAC dac 0 PWL(0 0 2u 0 12u 5) + VCLAMP 5 0 DC 5 + B_DIFF diff 0 V=V(hold)-V(dac) + .MODEL dmod D(IS=1n RS=1) + .MODEL swmod SW(RON=10 ROFF=100MEG VT=2 VH=0.5) + .TRAN 0.01u 15u + .MEASURE TRAN v_held FIND V(hold) AT=1.5u + .MEASURE TRAN t_cross WHEN V(diff)=0 CROSS=1 + .MEASURE TRAN v_dac_cross FIND V(dac) WHEN V(diff)=0 CROSS=1 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "v_held", 2.5, 0.05); + AssertMeasurementNear(result, "t_cross", 7e-06, 1e-07); + AssertMeasurementNear(result, "v_dac_cross", 2.5, 0.1); + } + + // Prompt: The circuit demonstrates a resistive power splitter and combiner using 50\u2011ohm resistors in a delta configuration. + [Fact] + public void Resistive_Splitter_and_Combiner_Network_aa8cd59828feaf77() + { + var result = RunAcceptedExample( + "deepseek:00661_aa8cd59828feaf77:aa8cd59828feaf77", + """ + * Resistive Splitter and Combiner Network + * Splitter section + V1 in1 0 DC 0 AC 1 + Rs1 in1 n1 50 + R1s n1 n2 50 + R2s n1 n3 50 + R3s n2 n3 50 + Rload2s n2 0 50 + Rload3s n3 0 50 + + * Combiner section + V2 in2 0 DC 0 AC 1 + Rs2 in2 n4 50 + V3 in3 0 DC 0 AC 1 + Rs3 in3 n5 50 + R1c n4 n6 50 + R2c n5 n6 50 + R3c n4 n5 50 + Rload1c n6 0 50 + + .AC DEC 10 1k 10MEG + + .MEASURE AC vout1_mag FIND V(n2) AT=10MEG + .MEASURE AC vout2_mag FIND V(n3) AT=10MEG + .MEASURE AC vin_mag FIND V(n1) AT=10MEG + .MEASURE AC vcomb_mag FIND V(n6) AT=10MEG + + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "vout1_mag", 0.25, 0.02); + AssertMeasurementNear(result, "vout2_mag", 0.25, 0.02); + AssertMeasurementNear(result, "vin_mag", 0.5, 0.02); + AssertMeasurementNear(result, "vcomb_mag", 0.5, 0.02); + } + + // Prompt: The circuit is a diode charge pump inverter that generates a negative voltage from a positive clock pulse. + [Fact] + public void Diode_Charge_Pump_Inverter_4ce3d80afb37c7cf() + { + var result = RunAcceptedExample( + "deepseek:00878_89092c0f62c5f5ca:4ce3d80afb37c7cf", + """ + * Diode Charge Pump Inverter + VIN clk 0 PULSE(0 5 0 10n 10n 50u 100u) + D1 n1 0 DMOD + D2 out n1 DMOD + C1 clk n1 1uF + C2 out 0 1uF + Rload out 0 10k + .MODEL DMOD D(IS=1e-14 RS=1) + .TRAN 1u 20m + .MEASURE TRAN Vout_avg AVG V(out) FROM=15m TO=20m + .MEASURE TRAN Vripple PP V(out) FROM=15m TO=20m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "Vout_avg", (-4.2), (-3.5)); + AssertMeasurementLess(result, "Vripple", 0.1); + } + + // Prompt: Single BJT (NPN) phase splitter with equal collector and emitter resistors + [Fact] + public void BJT_Phase_Splitter_671e757065e9a2f9() + { + var result = RunAcceptedExample( + "deepseek:00969_fe1b24d174939955:671e757065e9a2f9", + """ + * BJT Phase Splitter + VCC vcc 0 DC 12 + VIN in 0 AC 1 SIN(0 0.1 1k) + CIN in base 10u + R1 vcc base 100k + R2 base 0 50k + RC vcc col 3.3k + RE em 0 3.3k + Q1 col base em NPN + .MODEL NPN NPN(IS=1e-14 BF=100 VAF=100) + .OP + .AC DEC 10 10 100k + .MEAS AC phase_c FIND VP(col) AT=1e3 + .MEAS AC phase_e FIND VP(em) AT=1e3 + .MEAS AC phase_diff PARAM='abs(phase_c - phase_e) * 180 / 3.14159265358979' + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "phase_diff", 170.0, 190.0); + } + + // Prompt: Frequency-to-voltage converter using charge pump + [Fact] + public void Frequency_to_voltage_converter_with_charge_pump_0d4864803878836c() + { + var result = RunAcceptedExample( + "deepseek:01867_d96a4297632b1452:0d4864803878836c", + """ + * Frequency-to-voltage converter with charge pump + Vdd vdd 0 DC 5 + I1 vdd top DC 100u + S1 top out ctrl 0 swmod + C1 out 0 1n + R1 out 0 100k + Vfin ctrl 0 PULSE(0 5 0 1n 1n 100n 1u) + .model swmod SW(RON=10 ROFF=100MEG VT=2 VH=0.5) + D1 top vdd DMOD + .model DMOD D + .tran 1u 1ms + .measure tran vout_avg AVG V(out) FROM=500u TO=1m + .measure tran vout_min MIN V(out) FROM=500u TO=1m + .measure tran vout_max MAX V(out) FROM=500u TO=1m + .measure tran vout_pp PARAM='vout_max - vout_min' + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "vout_avg", 0.9, 1.1); + AssertMeasurementLess(result, "vout_pp", 0.02); + } + + // Prompt: Linear regulator using op\u2011amp and NPN pass transistor. + [Fact] + public void Series_Pass_Linear_Regulator_with_Op_Amp_Error_Amplifier_9a99cdb801195e25() + { + var result = RunAcceptedExample( + "deepseek:01877_82b7dacc9dfe7baa:9a99cdb801195e25", + """ + * Series Pass Linear Regulator with Op-Amp Error Amplifier + V1 VIN 0 DC 10 + VREF ref 0 DC 2.5 + E1 op_out 0 inv ref 100k + Q1 VIN op_out out pwrnpn + R1 out inv 10k + R2 inv 0 10k + RL out 0 100 + .MODEL pwrnpn NPN(IS=1e-14 BF=200 VAF=100 IKF=1 ISE=1e-13 NE=2 BR=4 NR=1 VAR=20 IKR=0.5 ISC=1e-13 NC=2 RB=10 RE=0.1 RC=1 CJE=5p VJE=0.75 MJE=0.33 CJC=5p VJC=0.75 MJC=0.33 TF=0.5n TR=10n) + .OP + .DC V1 0 15 0.05 + .MEAS DC VOUT_NOM FIND V(out) AT=10 + .MEAS DC VOUT_8 FIND V(out) AT=8 + .MEAS DC VOUT_12 FIND V(out) AT=12 + .MEAS DC LINE_REG PARAM='(VOUT_12-VOUT_8)/(12-8)' + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "VOUT_NOM", 5.0, 0.05); + AssertMeasurementLess(result, "LINE_REG", 0.001); + } + + // Prompt: Double-balanced diode ring mixer with 10MHz RF and 9MHz LO. + [Fact] + public void Balanced_Diode_Ring_Mixer_909cdaedf78a6cfe() + { + var result = RunAcceptedExample( + "deepseek:00806_6cc7134047efd238:909cdaedf78a6cfe", + """ + * Balanced Diode Ring Mixer + V_LO A C SIN(0 2 9MEG) + V_RF B D SIN(0 0.1 10MEG) + D1 A B DMOD + D2 B C DMOD + D3 C D DMOD + D4 D A DMOD + .MODEL DMOD D(IS=1e-12 RS=1) + RgA A 0 10MEG + RgB B 0 10MEG + RgC C 0 10MEG + RgD D 0 10MEG + E_IF if_out 0 B D 1 + Rload B D 50 + Cfilter B D 1n + .TRAN 10n 50u + .MEASURE TRAN if_pp PP V(if_out) FROM=40u TO=50u + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementGreater(result, "if_pp", 0.02); + } + + // Prompt: Design a negative voltage generator using a charge pump with diodes, a 5V clock, and 10kHz frequency. + [Fact] + public void Diode_charge_pump_inverter_04943710a9df39e6() + { + var result = RunAcceptedExample( + "deepseek:00873_1edc5fb121e58918:04943710a9df39e6", + """ + * Diode charge pump inverter + Vclk clk 0 PULSE(0 5 0 10n 10n 49.99u 100u) + C1 clk mid 10u + D1 mid 0 dmod + D2 out mid dmod + C2 out 0 10u + Rload out 0 1k + .MODEL dmod D(IS=1e-10 RS=1) + .IC V(out)=0 + .TRAN 0.01m 10m + .MEAS TRAN vout_avg AVG V(out) FROM=9m TO=10m + .MEAS TRAN vout_min MIN V(out) FROM=9m TO=10m + .MEAS TRAN vout_max MAX V(out) FROM=9m TO=10m + .END + """); + + AssertAllMeasurementsSuccessful(result); + var v_avg = MeasurementValue(result, "vout_avg"); + var v_min = MeasurementValue(result, "vout_min"); + var v_max = MeasurementValue(result, "vout_max"); + Assert.True(((v_avg < 0.0)), CaseLabel(result)); + Assert.True(((v_avg > (-5.0))), CaseLabel(result)); + Assert.True((((v_max - v_min) < 0.3)), CaseLabel(result)); + } + + // Prompt: Diode AND gate with pull-up resistor using two pulse inputs + [Fact] + public void Diode_AND_gate_with_pull_up_resistor_668f8c28872220cc() + { + var result = RunAcceptedExample( + "deepseek:00771_d4f4913698f59c55:668f8c28872220cc", + """ + * Diode AND gate with pull-up resistor + VCC vcc 0 DC 5 + VA A 0 PULSE(0 5 0 1n 1n 4m 8m) + VB B 0 PULSE(0 5 2m 1n 1n 4m 8m) + D1 out A DMOD + D2 out B DMOD + R1 vcc out 1k + .MODEL DMOD D(IS=1e-12 RS=1) + .TRAN 0.01m 8m + .MEAS TRAN vout_high AVG v(out) FROM=3m TO=3.5m + .MEAS TRAN vout_low AVG v(out) FROM=1m TO=1.5m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementGreater(result, "vout_high", 4.5); + AssertMeasurementLess(result, "vout_low", 1.0); + } + + // Prompt: Design a non-inverting amplifier with a voltage gain of 5 using an ideal operational amplifier modeled as a behavioral E-source. Perform an AC sweep from 1 Hz to 100 kHz and report the gain in decibels at 1 kHz. + [Fact] + public void Non_inverting_amplifier_using_behavioral_E_source_e578667e04206126() + { + var result = RunAcceptedExample( + "deepseek:00315_42c1665fe73f722f:e578667e04206126", + """ + * Non-inverting amplifier using behavioral E-source + VIN in 0 DC 0 AC 1 + Rf out fb 10k + Rg fb 0 2.5k + E1 out 0 in fb 100k + .AC DEC 10 1 100k + .MEAS AC gain_db FIND VDB(out) AT=1k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "gain_db", 13.98, 0.2); + } + + // Prompt: CMOS differential pair with active current mirror load. + [Fact] + public void CMOS_differential_pair_with_current_mirror_load_f9d4a46e5b2dd179() + { + var result = RunAcceptedExample( + "deepseek:01268_53576df2e3b9cb28:f9d4a46e5b2dd179", + """ + * CMOS differential pair with current mirror load + M1 d1 in+ s1 0 nmos W=10U L=1U + M2 out in- s1 0 nmos W=10U L=1U + M3 d1 d1 vdd vdd pmos W=10U L=1U + M4 out d1 vdd vdd pmos W=10U L=1U + M5 s1 vbias 0 0 nmos W=10U L=1U + .model nmos NMOS(VTO=0.7 KP=200U LAMBDA=0.02) + .model pmos PMOS(VTO=-0.7 KP=200U LAMBDA=0.02) + Vdd vdd 0 DC 5 + Vbias vbias 0 DC 1.0 + Vinp in+ 0 DC 2.5 AC 1 + Vinm in- 0 DC 2.5 AC 0 + C1 out 0 1p + .OP + .DC Vinp 0 5 0.01 + .meas DC vout_cm FIND V(out) AT=2.5 + .meas DC vout_max MAX V(out) + .meas DC vout_min MIN V(out) + .AC DEC 10 1 100MEG + .meas AC gain_1k FIND VDB(out) AT=1k + .meas AC ugf WHEN VDB(out)=0 + .meas AC phase_at_ugf FIND VP(out) WHEN VDB(out)=0 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementGreater(result, "gain_1k", 20.0); + AssertMeasurementGreater(result, "ugf", 1000000.0); + var pm = (180.0 + MeasurementValue(result, "phase_at_ugf")); + Assert.True(((pm > 45.0)), CaseLabel(result)); + } + + // Prompt: Bridge diode polarity protector + [Fact] + public void Bridge_Diode_Polarity_Protector_b92fee7344c1cc46() + { + var result = RunAcceptedExample( + "deepseek:00786_18536447b5699504:b92fee7344c1cc46", + """ + * Bridge Diode Polarity Protector + VIN in1 in2 DC -5 PULSE(-5 5 0 1n 1n 0.5m 1m) + D1 in1 out DMOD + D2 0 in1 DMOD + D3 in2 out DMOD + D4 0 in2 DMOD + RLOAD out 0 1k + .MODEL DMOD D(IS=5e-9 RS=0.1) + .OP + .TRAN 1u 2m + .MEAS TRAN Vout_dc FIND V(out) AT=0 + .MEAS TRAN Vout_avg AVG V(out) FROM=0 TO=2m + .MEAS TRAN Vout_max MAX V(out) FROM=0 TO=2m + .MEAS TRAN Vout_min MIN V(out) FROM=0 TO=2m + .MEAS TRAN Vout_test FIND V(out) AT=1.5m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "Vout_dc", 3.0, 4.5); + AssertMeasurementGreater(result, "Vout_avg", 4.0); + AssertMeasurementGreater(result, "Vout_min", 0.0); + AssertMeasurementGreater(result, "Vout_max", 4.0); + } + + // Prompt: Sample-and-hold circuit with op-amp buffers (E sources), ideal switch (S element), and 1uF holding capacitor. + [Fact] + public void Sample_and_hold_circuit_with_ultra_low_tracking_error_11ac1bea0fe6cfde() + { + var result = RunAcceptedExample( + "deepseek:01576_0af2bcfd22fbc113:11ac1bea0fe6cfde", + """ + * Sample-and-hold circuit with ultra-low tracking error + VIN in 0 SIN(2 1 1k) + Ebuf buf1 0 in 0 1 + Vctrl ctrl 0 PULSE(0 5 0.2m 0.1u 0.1u 0.5m 1m) + S1 buf1 hold ctrl 0 swmod + Chold hold 0 1uF + Rbig hold 0 1G + Eout out 0 hold 0 1 + Rload out 0 10k + .MODEL swmod SW(RON=0.1 ROFF=100MEG VT=2 VH=0.5) + .TRAN 1u 2m + .MEAS TRAN v_hold FIND V(hold) AT=1m + .MEAS TRAN v_sampled FIND V(in) AT=0.7m + .MEAS TRAN v_diff PARAM 'v_hold - v_sampled' + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "v_diff", 0.0, 0.001); + AssertMeasurementBetween(result, "v_hold", 1.048, 1.05); + } + + // Prompt: Charge amplifier for capacitive sensor interface using behavioral op-amp (gain 100k). + [Fact] + public void Capacitive_sensor_interface_with_charge_amplifier_550d6df0b47e8060() + { + var result = RunAcceptedExample( + "deepseek:02455_f0f62d9fc3386bde:550d6df0b47e8060", + """ + * Capacitive sensor interface with charge amplifier + Vref in+ 0 DC 1 + Vsens sens 0 PULSE(1 2 10u 1n 1n 50u 100u) + Cs in- sens 100pF + Cf out in- 1n + Rf out in- 10MEG + S1 out in- reset_ctrl 0 SW1 + Vreset reset_ctrl 0 PULSE(0 5 1u 1n 1n 5u 100u) + E1 out 0 in+ in- 100000 + .MODEL SW1 SW(RON=1 ROFF=100MEG VT=2.5 VH=0) + .TRAN 0.1u 50u + .MEAS TRAN v_initial AVG V(out) FROM=8u TO=9u + .MEAS TRAN v_final AVG V(out) FROM=20u TO=25u + .MEAS TRAN delta_v PARAM='v_final - v_initial' + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "v_initial", 1.0, 0.01); + AssertMeasurementNear(result, "v_final", 0.9, 0.01); + AssertMeasurementNear(result, "delta_v", (-0.1), 0.01); + } + + // Prompt: Differential switch with Q1 input, Q2 reference, 1 mA tail current, 800 \u03a9 collector loads, emitter followers on both collectors. + [Fact] + public void ECL_OR_NOR_Gate_with_BJT_Differential_Switch_c7336bc87c5ef020() + { + var result = RunAcceptedExample( + "deepseek:01183_f3864687b18fa566:c7336bc87c5ef020", + """ + * ECL OR/NOR Gate with BJT Differential Switch + .MODEL NPN NPN(BF=100 IS=1e-15 CJC=0.2p CJE=0.2p TF=10p) + VEE vee 0 DC -5.2 + VREF ref 0 DC -1.3 + VIN in 0 PULSE(-2 -0.5 2n 0.1n 0.1n 5n 10n) + I_EE e vee DC 1mA + R_C1 c1 0 800 + R_C2 c2 0 800 + Q1 c1 in e NPN + Q2 c2 ref e NPN + Q3 0 c2 out_or NPN + Q4 0 c1 out_nor NPN + R_E1 out_or vee 2k + R_E2 out_nor vee 2k + .OP + .DC VIN -2 -0.5 0.005 + .TRAN 1p 10n + .MEAS DC v_or_high_dc MAX V(out_or) + .MEAS DC v_or_low_dc MIN V(out_or) + .MEAS DC v_thresh WHEN V(out_or)=-1.1 CROSS=1 + .MEAS DC v_nor_high_dc MAX V(out_nor) + .MEAS DC v_nor_low_dc MIN V(out_nor) + .MEAS TRAN v_or_high AVG V(out_or) FROM=5n TO=6n + .MEAS TRAN v_or_low AVG V(out_or) FROM=0 TO=1n + .MEAS TRAN v_or_swing PARAM = {abs(v_or_high - v_or_low)} + .MEAS TRAN v_nor_high AVG V(out_nor) FROM=0 TO=1n + .MEAS TRAN v_nor_low AVG V(out_nor) FROM=5n TO=6n + .MEAS TRAN v_nor_swing PARAM = {abs(v_nor_high - v_nor_low)} + .MEAS TRAN t_in_cross WHEN V(in)=-1.25 RISE=1 + .MEAS TRAN t_out_or_cross WHEN V(out_or)=-1.1 RISE=1 + .MEAS TRAN t_prop_delay PARAM = {t_out_or_cross - t_in_cross} + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "v_or_swing", 0.5, 1.0); + AssertMeasurementLess(result, "t_prop_delay", 1e-09); + AssertMeasurementBetween(result, "v_thresh", (-1.5), (-1.1)); + AssertMeasurementBetween(result, "v_nor_swing", 0.5, 1.0); + } + + // Prompt: Three op\u2011amp instrumentation amplifier with behavioral voltage\u2011controlled voltage sources (E1, E2, E3) having gain 1e5. + [Fact] + public void Instrumentation_Amplifier_with_Three_Behavioral_Op_Amps_6fab1b094a14bc87() + { + var result = RunAcceptedExample( + "deepseek:00404_c0382c9dfbda712f:6fab1b094a14bc87", + """ + * Instrumentation Amplifier with Three Behavioral Op-Amps + VINP inp 0 DC 2.5005 AC 0.5 + VINN inn 0 DC 2.4995 AC -0.5 + VREF vref 0 DC 2.5 + + E1 out1 0 inp inv1 1e5 + E2 out2 0 inn inv2 1e5 + Rf1 out1 inv1 10k + Rf2 out2 inv2 10k + Rg inv1 inv2 1k + + E3 out 0 nref inv3 1e5 + R1 out1 nref 10k + R2 nref vref 100k + R3 out2 inv3 10k + R4 inv3 out 100k + + .DC VREF 2.5 2.5 1 + .MEAS DC op_out AVG V(out) + .AC DEC 10 1 1MEG + .MEAS AC ac_gain_db FIND VDB(out) AT=1000 + + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "op_out", 2.71, 0.01); + AssertMeasurementNear(result, "ac_gain_db", 46.4, 0.5); + } + + // Prompt: Two-stage Dickson charge pump with diodes D1-D3 and capacitors C1-C2. + [Fact] + public void Two_stage_Dickson_charge_pump_level_shifter_98223f14b28bc8cb() + { + var result = RunAcceptedExample( + "deepseek:00885_0489a67ef0099411:98223f14b28bc8cb", + """ + * Two-stage Dickson charge pump level shifter + VDD vdd 0 DC 3.3 + VIN in 0 PULSE(0 3.3 0 10n 10n 500n 1u) + VIN2 in2 0 PULSE(3.3 0 0 10n 10n 500n 1u) + C1 in n1 1nF + D1 vdd n1 D1N4148 + D2 n1 n2 D1N4148 + C2 in2 n2 1nF + D3 n2 out D1N4148 + Cload out 0 1nF + Rload out 0 100k + .MODEL D1N4148 D(IS=1e-10 N=2 RS=0.1) + .tran 0 100u 0 10n + .meas TRAN Vout_avg AVG V(out) FROM=80u TO=100u + .meas TRAN Vout_ripple PP V(out) FROM=80u TO=100u + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "Vout_avg", 7.4, 8.2); + AssertMeasurementLess(result, "Vout_ripple", 0.2); + } + + // Prompt: Create a SPICE netlist for a CMOS dynamic precharge inverter. Use a PMOS precharge transistor clocked by a pulse, an NMOS evaluation transistor driven by a data input, and a load capacitor. Simulate with transient analysis and measure output high and low voltages, propagation delay, and fall time. + [Fact] + public void CMOS_Dynamic_Precharge_Inverter_90d4b67e9d834f2f() + { + var result = RunAcceptedExample( + "deepseek:01369_90d4b67e9d834f2f:90d4b67e9d834f2f", + """ + * CMOS Dynamic Precharge Inverter + M1 out in 0 0 nmos W=1u L=0.18u + M2 out clk vdd vdd pmos W=2u L=0.18u + CL out 0 10f + VDD vdd 0 DC 1.8 + VCLK clk 0 PULSE(0 1.8 10n 1n 1n 50n 100n) + VIN in 0 PULSE(0 1.8 20n 1n 1n 30n 100n) + .MODEL nmos NMOS(VTO=0.5 KP=200u LAMBDA=0.02) + .MODEL pmos PMOS(VTO=-0.5 KP=100u LAMBDA=0.02) + .TRAN 0.1n 200n + .MEASURE TRAN voh FIND V(out) AT=9n + .MEASURE TRAN vol FIND V(out) AT=50n + .MEASURE TRAN tphl TRIG V(in) VAL=0.9 RISE=1 TARG V(out) VAL=0.9 FALL=1 + .MEASURE TRAN tfall TRIG V(out) VAL=0.9 FALL=1 TARG V(out) VAL=0.1 FALL=1 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "voh", 1.6, 1.8); + AssertMeasurementLess(result, "vol", 0.2); + AssertMeasurementBetween(result, "tphl", 0.0, 5e-09); + AssertMeasurementBetween(result, "tfall", 0.0, 5e-09); + } + + // Prompt: Design an open-loop boost converter circuit using a MOSFET switch, diode, inductor, capacitor, and load resistor. The input voltage is 5V, and the switching frequency is 100 kHz. Use a pulse source to drive the gate with a duty cycle of approximately 58%. Include SPICE .MEAS statements to compute average output voltage, output voltage ripple, input power, and output power, and estimate efficiency. Provide the full netlist. + [Fact] + public void Boost_Converter_Open_Loop_Switching_Model_8dcbedb53ddff0c5() + { + var result = RunAcceptedExample( + "deepseek:02333_3fad16f2a7821ef7:8dcbedb53ddff0c5", + """ + * Boost Converter Open Loop Switching Model + VIN vin 0 DC 5 + VGATE g 0 PULSE(0 10 0 1n 1n 5.83u 10u) + L1 vin drain 50u + M1 drain g 0 0 nmod + D1 drain out dmod + C1 out 0 100u IC=0 + R1 out 0 10 + .MODEL dmod D(IS=1n RS=0.1) + .MODEL nmod NMOS(VTO=2 KP=0.5 LAMBDA=0.02) + .TRAN 0 5ms 0 0.1u + .MEAS TRAN Vout_avg AVG V(out) FROM=4ms TO=5ms + .MEAS TRAN Vout_ripple PP V(out) FROM=4ms TO=5ms + .MEAS TRAN Pin AVG V(vin)*I(VIN) FROM=4ms TO=5ms + .MEAS TRAN Pout AVG V(out)*I(R1) FROM=4ms TO=5ms + .END + """); + + AssertAllMeasurementsSuccessful(result); + var vout_avg = MeasurementValue(result, "Vout_avg"); + var vout_ripple = MeasurementValue(result, "Vout_ripple"); + var pin = MeasurementValue(result, "Pin"); + var pout = MeasurementValue(result, "Pout"); + var efficiency = (((pin > 0.0)) ? ((pout / pin) * 100.0) : 0.0); + AssertMeasurementBetween(result, "Vout_avg", 10.0, 13.0); + AssertMeasurementLess(result, "Vout_ripple", 1.0); + Assert.True(((efficiency > 60.0)), CaseLabel(result)); + } + + // Prompt: The Howland current pump uses a behavioral op-amp with 100k DC gain and a 1 Hz dominant pole, giving a GBW of 100 kHz. + [Fact] + public void Howland_Current_Pump_with_Behavioral_Op_Amp_Single_Pole_15bdb178664055bc() + { + var result = RunAcceptedExample( + "deepseek:01524_9d1304dfee686ffc:15bdb178664055bc", + """ + * Howland Current Pump with Behavioral Op-Amp (Single-Pole) + VIN in 0 DC 1 AC 1 + R1 in nplus 10k + R2 nplus 0 10k + R3 nminus 0 1k + Rload out x 1k + Vsense x nminus 0 + * Op-amp model: DC gain 100k, pole at 1 Hz (GBW=100kHz) + E1 op1 0 nplus nminus 100k + Rpole op1 op2 1e6 + Cpole op2 0 0.15916e-6 + E2 out 0 op2 0 1 + .OP + .DC VIN 0 2 0.1 + .AC DEC 10 1 1MEG + .MEAS DC Iout_05 FIND I(Vsense) AT=0.5 + .MEAS DC Iout_10 FIND I(Vsense) AT=1.0 + .MEAS DC Iout_15 FIND I(Vsense) AT=1.5 + .MEAS DC transconductance DERIV I(Vsense) AT=1.0 + .MEAS AC low_gain FIND I(Vsense) AT=1 + .MEAS AC bw WHEN I(Vsense)=3.535e-4 FALL=1 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "transconductance", 0.0005, 1e-05); + AssertMeasurementBetween(result, "Iout_05", 0.00024, 0.00026); + AssertMeasurementBetween(result, "Iout_10", 0.00049, 0.00051); + AssertMeasurementBetween(result, "Iout_15", 0.00074, 0.00076); + AssertMeasurementGreater(result, "bw", 10000.0); + AssertMeasurementNear(result, "low_gain", 0.0005, 1e-05); + } + + // Prompt: Design a PWM DAC using a pulse source and an RC lowpass filter to reconstruct the DC voltage. + [Fact] + public void PWM_DAC_with_RC_reconstruction_filter_aa0853dd45f87509() + { + var result = RunAcceptedExample( + "deepseek:02193_aa0853dd45f87509:aa0853dd45f87509", + """ + * PWM DAC with RC reconstruction filter + Vpwm pwm 0 PULSE(0 5 0 1n 1n 0.5u 1u) + R1 pwm out 10k + C1 out 0 10n + .TRAN 1u 2m + .MEASURE TRAN Vavg AVG V(out) FROM=1m TO=2m + .MEASURE TRAN Vripple PP V(out) FROM=1m TO=2m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "Vavg", 2.49, 2.51); + AssertMeasurementLess(result, "Vripple", 0.05); + } + + // Prompt: CMOS NOR2 gate transient simulation with realistic input slew rates + [Fact] + public void CMOS_NOR2_Gate_Transient_Measurement_0db5e5c35798db04() + { + var result = RunAcceptedExample( + "deepseek:00303_2637ac7ff0551536:0db5e5c35798db04", + """ + *CMOS NOR2 Gate Transient Measurement + M1 OUT A 0 0 nch W=10u L=1u + M2 OUT B 0 0 nch W=10u L=1u + M3 N2 A VDD VDD pch W=20u L=1u + M4 OUT B N2 VDD pch W=20u L=1u + VDD VDD 0 DC 5 + VA A 0 PULSE(0 5 2n 1n 1n 20n 40n) + VB B 0 PULSE(0 5 4n 1n 1n 30n 60n) + .MODEL nch NMOS(VTO=1 KP=200u LAMBDA=0.02) + .MODEL pch PMOS(VTO=-1 KP=80u LAMBDA=0.02) + .TRAN 0.01n 100n + .MEAS TRAN t_fall TRIG V(OUT) VAL=4.5 FALL=1 TARG V(OUT) VAL=0.5 FALL=1 + .MEAS TRAN t_rise TRIG V(OUT) VAL=0.5 RISE=1 TARG V(OUT) VAL=4.5 RISE=1 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "t_fall", 1e-10, 1e-08); + AssertMeasurementBetween(result, "t_rise", 1e-10, 1e-08); + } + + // Prompt: Design a non-inverting amplifier with a gain of 11 using an ideal op-amp modeled as an E-source. + [Fact] + public void Non_Inverting_Op_Amp_Amplifier_using_E_source_f48ab904278f6d1c() + { + var result = RunAcceptedExample( + "deepseek:00316_98af241aef9961d0:f48ab904278f6d1c", + """ + * Non-Inverting Op-Amp Amplifier using E-source + R1 out neg 10k + R2 neg 0 1k + E_opamp out 0 in neg 100000 + VIN in 0 DC 0 AC 1 + .AC DEC 10 10 1MEG + .MEAS AC gain_1kHz FIND V(out) AT=1k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "gain_1kHz", 11.0, 0.2); + } + + // Prompt: Design a precision half-wave rectifier using an ideal op-amp and a diode. The input is a 2V amplitude 1kHz sine wave. Use a behavioral E-source with gain 1e5 for the op-amp, and a diode model with IS=1e-14 RS=0.1. Include a load resistor of 10k\u03a9. Run a transient simulation and measure peak output, average output, and minimum output. + [Fact] + public void Precision_Half_Wave_Rectifier_cefa10c5e67c9906() + { + var result = RunAcceptedExample( + "deepseek:00714_90bfd55fb149007f:cefa10c5e67c9906", + """ + * Precision Half-Wave Rectifier + VIN in 0 SIN(0 2 1k 0 0 0) + VCC vcc 0 DC 15 + VEE vee 0 DC -15 + E_OPAMP opamp_int 0 in inv 1e5 + R_OUT opamp_int opout 1k + D1 opout inv DMOD + .MODEL DMOD D(IS=1e-14 RS=0.1) + DCLP1 opout vcc DCLAMP + DCLP2 vee opout DCLAMP + .MODEL DCLAMP D(IS=1e-12 RS=0.1) + RLOAD inv 0 10k + .TRAN 0.1u 3m 0 0.1u + .MEASURE TRAN peak_out MAX V(inv) FROM=0 TO=3m + .MEASURE TRAN avg_out AVG V(inv) FROM=1m TO=3m + .MEASURE TRAN min_out MIN V(inv) FROM=0 TO=3m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "peak_out", 2.0, 0.1); + AssertMeasurementBetween(result, "avg_out", 0.5, 0.7); + AssertMeasurementLess(result, "min_out", 0.1); + } + + // Prompt: The circuit uses a voltage-controlled current source (Gout) as a multiplier to modulate a 1 MHz carrier with a 1 kHz modulating tone plus DC offset. + [Fact] + public void AM_Modulator_using_G_multiplier_and_envelope_detector_e3b3f2fb0c7b6850() + { + var result = RunAcceptedExample( + "deepseek:02103_b284e781def51ee4:e3b3f2fb0c7b6850", + """ + * AM Modulator using G multiplier and envelope detector + * Multiplier with corrected POLY coefficients: V(mod) * V(car) + * Carrier 1 MHz, modulating signal 10 kHz, 1+mod into multiplier + Vmod mod 0 SIN(1 1 10k) + Vcar car 0 SIN(0 1 1MEG) + Gout rfraw 0 POLY(2) mod 0 car 0 0 0 0 0 0.001 0 + Rload rfraw 0 1k + Ebuf rfout 0 rfraw 0 1 + D1 rfout env dmod + Cenv env 0 10n + Renv env 0 1k + .MODEL dmod D(IS=1e-12 RS=0.1 N=0.01) + .TRAN 10n 200u 50u 10n + .MEAS TRAN Vmax_env MAX V(env) + .MEAS TRAN Vmin_env MIN V(env) + .MEAS TRAN modulation PARAM '(Vmax_env - Vmin_env)/(Vmax_env + Vmin_env)' + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "modulation", 0.8, 1.2); + AssertMeasurementGreater(result, "Vmax_env", 0.5); + } + + // Prompt: The circuit is an AM envelope detector using a single diode, resistor, and capacitor. + [Fact] + public void AM_Envelope_Detector_68c6be99eabdd07a() + { + var result = RunAcceptedExample( + "deepseek:00152_8b554b7cb6aa0e7e:68c6be99eabdd07a", + """ + * AM Envelope Detector + Vmod mod_sig 0 SIN(0 0.5 1k) + Vcar car_sig 0 SIN(0 1 10k) + B1 am_sig 0 V = (1 + V(mod_sig)) * V(car_sig) + D1 am_sig out DMOD + R1 out 0 10k + C1 out 0 68n + .MODEL DMOD D(IS=1e-14 RS=1) + .TRAN 1u 5m + .MEASURE TRAN vavg AVG V(out) FROM=1m TO=5m + .MEASURE TRAN vpp PP V(out) FROM=3m TO=4m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "vavg", 0.2, 0.7); + AssertMeasurementLess(result, "vpp", 0.5); + } + + // Prompt: T-section LC impedance matching network designed for 50-ohm to 150-ohm transformation. + [Fact] + public void T_section_LC_impedance_matching_network_26d9a4f84e6bfb3c() + { + var result = RunAcceptedExample( + "deepseek:00672_970c244becfce562:26d9a4f84e6bfb3c", + """ + * T-section LC impedance matching network + V1 in 0 DC 0 AC 1 + R1 in n1 50 + L1 n1 n2 1.32u + C1 n2 0 183p + L2 n2 out 1.2u + R2 out 0 150 + .AC DEC 100 1MEG 100MEG + .MEAS AC vout_10meg FIND VM(out) AT=10MEG + .MEAS AC gain_db_10meg FIND VDB(out) AT=10MEG + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "vout_10meg", 0.8, 0.9); + } + + // Prompt: This is a Howland current pump with grounded load. + [Fact] + public void Howland_current_pump_with_grounded_load_ideal_op_amp_2e770d6a38d658fa() + { + var result = RunAcceptedExample( + "deepseek:01519_9e41c67de06c0fbe:2e770d6a38d658fa", + """ + * Howland current pump with grounded load (ideal op-amp) + VIN in 0 DC 0 + R1 in nplus 110k + R2 nplus out 10k + R3 out nminus 110k + R4 nminus 0 10k + Rload out 0 1k + E1 out 0 nplus nminus 1e12 + .OP + .DC VIN -1 1 0.01 + .MEAS DC i_out_pos FIND i(Rload) AT=1 + .MEAS DC i_out_neg FIND i(Rload) AT=-1 + .MEAS DC gm DERIV i(Rload) WHEN V(in)=0 + .MEAS DC i_offset FIND i(Rload) WHEN V(in)=0 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "i_offset", 0.0, 1e-12); + AssertMeasurementNear(result, "gm", (-0.0001), 1e-09); + AssertMeasurementNear(result, "i_out_pos", (-0.0001), 1e-09); + AssertMeasurementNear(result, "i_out_neg", 0.0001, 1e-09); + } + + // Prompt: Diode D1 conducts when input voltage exceeds output voltage, charging capacitor C1 to the peak input voltage minus a diode forward drop. + [Fact] + public void Diode_Peak_Detector_with_Bleed_Resistor_899bedf2be216208() + { + var result = RunAcceptedExample( + "deepseek:00741_94a8c4eddefad5fe:899bedf2be216208", + """ + * Diode Peak Detector with Bleed Resistor + VIN in 0 SIN(0 5 1k) + D1 in out DMOD + C1 out 0 1uF + R1 out 0 10k + .MODEL DMOD D(IS=1e-12 RS=1) + .TRAN 10u 5m + .MEASURE TRAN peak_out MAX V(out) FROM=2m TO=5m + .MEASURE TRAN min_out MIN V(out) FROM=2m TO=5m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "peak_out", 4.0, 5.0); + AssertMeasurementBetween(result, "min_out", 3.8, 4.5); + var peak = MeasurementValue(result, "peak_out"); + var min_val = MeasurementValue(result, "min_out"); + Assert.True(((min_val < peak)), CaseLabel(result)); + } + + // Prompt: Photodiode readout circuit with reverse bias + [Fact] + public void Photodiode_reverse_bias_sensor_with_transimpedance_amplifier_3d46a858f468b78b() + { + var result = RunAcceptedExample( + "deepseek:02134_e063f366009839e2:3d46a858f468b78b", + """ + * Photodiode reverse-bias sensor with transimpedance amplifier + VREF bias 0 DC 5 + IPHOTO cathode 0 PULSE(0 10u 0 1n 1n 1m 2m) + D1 0 cathode DMOD + Rf out cathode 10k + RL out 0 100k + E1 out 0 bias cathode 100000 + .MODEL DMOD D (IS=1e-12 RS=1) + .OP + .TRAN 1u 2m + .MEASURE TRAN vout_avg AVG V(out) FROM=0.5m TO=1.5m + .MEASURE TRAN vout_max MAX V(out) FROM=0.5m TO=1.5m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "vout_avg", 5.0, 5.2); + AssertMeasurementBetween(result, "vout_max", 5.0, 5.2); + } + + // Prompt: NMOS cascode amplifier with resistive load and output capacitance. + [Fact] + public void NMOS_Cascode_Amplifier_with_Load_Capacitor_cd468719d4235215() + { + var result = RunAcceptedExample( + "deepseek:01224_6ff3664a728e0df0:cd468719d4235215", + """ + * NMOS Cascode Amplifier with Load Capacitor + VDD vdd 0 DC 5 + VIN vg1 0 DC 1.5 AC 1 + VG2 vg2 0 DC 2.5 + RD vdd out 10k + CLOAD out 0 1pF + M1 d1 vg1 0 0 nmos W=10u L=1u + M2 out vg2 d1 0 nmos W=10u L=1u + .MODEL nmos NMOS(VTO=1 KP=100u LAMBDA=0.02) + .OP + .AC DEC 10 1 1G + .MEAS AC gain_db MAX VDB(out) + .MEAS AC bw WHEN VDB(out)=11 FALL=1 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "gain_db", 10.0, 20.0); + AssertMeasurementBetween(result, "bw", 1000000.0, 100000000.0); + } + + // Prompt: Fixed-bias common-emitter BJT amplifier with NPN transistor. + [Fact] + public void Fixed_Bias_Common_Emitter_BJT_Amplifier_3756fc11d44bfa95() + { + var result = RunAcceptedExample( + "deepseek:00893_2a66bc2e9167467b:3756fc11d44bfa95", + """ + * Fixed-Bias Common-Emitter BJT Amplifier + VCC VCC 0 DC 12 + VIN in 0 DC 0 AC 1 + Rb VCC base 680k + Rc VCC collector 2.2k + RL out 0 10k + Cin in base 10u + Cout collector out 10u + Q1 collector base 0 NPN1 + .MODEL NPN1 NPN(IS=1e-14 BF=100 VAF=50) + .OP + .DC VCC 12 12 1 + .AC DEC 10 10 100k + .MEAS DC VCE_OP FIND V(collector) AT=12 + .MEAS AC gain_dB MAX VDB(out) + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "VCE_OP", 7.0, 8.0); + AssertMeasurementBetween(result, "gain_dB", 40.0, 44.0); + } + + // Prompt: The instrumentation amplifier has a gain of 21 set by Rf1, Rf2, and Rg (10k, 10k, 1k). + [Fact] + public void Instrumentation_Amplifier_with_Driven_Reference_Node_1987bc782f52c117() + { + var result = RunAcceptedExample( + "deepseek:01486_2a1d4c0af2e282ec:1987bc782f52c117", + """ + * Instrumentation Amplifier with Driven Reference Node + V_inp inp 0 DC 2.505 AC 0.5 + V_inn inn 0 DC 2.495 AC -0.5 + V_ref ref 0 DC 1 + V_pos vcc 0 DC 10 + V_neg vee 0 DC -10 + + .subckt ideal_opamp inp inn out vcc vee + E1 out 0 inp inn 1e6 + .ends + + X_U1 inp f1 out1 vcc vee ideal_opamp + X_U2 inn f2 out2 vcc vee ideal_opamp + X_U3 nplus n1 out3 vcc vee ideal_opamp + X_U4 ref ref_out ref_out vcc vee ideal_opamp + Rf1 out1 f1 10k + Rf2 out2 f2 10k + Rg f1 f2 1k + R1 out2 n1 10k + Rf3 out3 n1 10k + R3 out1 nplus 10k + R4 nplus ref_out 10k + Rload out3 0 100k + + .DC V_ref 1 1 1 + .AC DEC 10 1 100k + + .MEAS DC vout_dc FIND V(out3) AT=1 + .MEAS DC vref_dc FIND V(ref_out) AT=1 + .MEAS AC out_1k FIND V(out3) AT=1k + + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "vout_dc", 1.21, 0.02); + AssertMeasurementNear(result, "vref_dc", 1.0, 0.01); + AssertMeasurementNear(result, "out_1k", 21.0, 0.3); + } + + // Prompt: Full Wheatstone bridge with four strain gauges, two in tension and two in compression. + [Fact] + public void Strain_gauge_Wheatstone_bridge_with_instrumentation_amplifier_5124222690558934() + { + var result = RunAcceptedExample( + "deepseek:02157_260a4dd63e0c14b0:5124222690558934", + """ + * Strain-gauge Wheatstone bridge with instrumentation amplifier + .param R0=350 GF=2 + Vexc vexc 0 DC 5 + Vstrain strain 0 DC 0 + + * Behavioral resistors for strain gauges + B1 vexc bridge_p I=V(vexc,bridge_p)/(R0*(1+GF*V(strain))) + B2 bridge_p 0 I=V(bridge_p)/(R0*(1-GF*V(strain))) + B3 vexc bridge_n I=V(vexc,bridge_n)/(R0*(1-GF*V(strain))) + B4 bridge_n 0 I=V(bridge_n)/(R0*(1+GF*V(strain))) + + * Large resistors to prevent floating nodes + Rbig1 bridge_p 0 1G + Rbig2 bridge_n 0 1G + + * Two-op-amp instrumentation amplifier + E1 out1 0 bridge_p in1 1e6 + E2 out2 0 bridge_n in2 1e6 + Rf1 out1 in1 10k + Rf2 out2 in2 10k + Rg in1 in2 500 + + * Difference amplifier + E3 out 0 net2 net1 1e6 + R6 out1 net1 1k + R7 out2 net2 1k + R8 net1 out 10k + R9 net2 0 10k + + .DC Vstrain 0 0.001 0.00001 + .MEAS DC vout_0strain FIND v(out) AT=0 + .MEAS DC vout_maxstrain FIND v(out) AT=0.001 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "vout_0strain", 0.0, 0.001); + AssertMeasurementBetween(result, "vout_maxstrain", 4.0, 4.2); + } + + // Prompt: Voltage-to-current converter using an ideal op-amp (voltage follower) and a 10k\u03a9 series resistor. + [Fact] + public void Voltage_to_current_converter_with_grounded_load_6ba162a32f76ff9f() + { + var result = RunAcceptedExample( + "deepseek:01516_3a1bbeca119795ae:6ba162a32f76ff9f", + """ + * Voltage-to-current converter with grounded load + VIN in 0 DC 1 + E1 out 0 in out 100000 + Rconv out load 10k + RL load 0 100 + .DC VIN 0 1 0.1 + .OP + .meas dc i_at_1 find i(RL) at=1 + .meas dc i_at_0_5 find i(RL) at=0.5 + .meas dc current_gain param = (i_at_1 - i_at_0_5)/0.5 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "i_at_1", 9.8e-05, 0.0001); + AssertMeasurementBetween(result, "current_gain", 9.5e-05, 0.000105); + } + + // Prompt: Design a SPICE netlist for a sawtooth waveform generator that uses a constant current source to charge a capacitor and a voltage-controlled switch to discharge it periodically. + [Fact] + public void Sawtooth_Generator_using_Current_Source_and_Reset_Switch_de04cc7f9ce97ab3() + { + var result = RunAcceptedExample( + "deepseek:01854_fa0353608adc6185:de04cc7f9ce97ab3", + """ + * Sawtooth Generator using Current Source and Reset Switch + I1 0 out DC 100u + C1 out 0 10n + S1 out 0 ctl 0 swmod + Vctrl ctl 0 PULSE(0 1 0 1n 1n 1u 100u) + .MODEL swmod SW(RON=10 ROFF=10MEG VT=0.5 VH=0) + .TRAN 1u 500u 0 1u + .MEAS TRAN Vpeak MAX V(out) FROM=10u TO=500u + .MEAS TRAN period TRIG V(out) VAL=0.5 RISE=1 TARG V(out) VAL=0.5 RISE=2 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "Vpeak", 1.0, 0.1); + AssertMeasurementNear(result, "period", 0.0001, 5e-06); + } + + // Prompt: Sample-and-hold circuit using an ideal voltage-controlled switch (S) and a unity-gain buffer (E) to hold the sampled voltage on a capacitor. + [Fact] + public void Op_Amp_Sample_and_Hold_with_Ideal_Switch_32fde824492a11b9() + { + var result = RunAcceptedExample( + "deepseek:01580_3e970399a063b051:32fde824492a11b9", + """ + * Op-Amp Sample and Hold with Ideal Switch + VIN in 0 SIN(0 1 1k) + VCLK ctrl 0 PULSE(0 5 0 1n 1n 49u 100u) + S1 in cap ctrl 0 smod + .MODEL smod SW(RON=1 ROFF=1G VT=1 VH=0) + C1 cap 0 10n + E1 out 0 cap 0 1 + .tran 0.1u 200u + .MEAS TRAN vout_hold FIND V(out) AT=70u + .MEAS TRAN vin_sample FIND V(in) AT=49u + .MEAS TRAN vout_hold2 FIND V(out) AT=90u + .END + """); + + AssertAllMeasurementsSuccessful(result); + var vhold = MeasurementValue(result, "vout_hold"); + var vref = MeasurementValue(result, "vin_sample"); + var vhold2 = MeasurementValue(result, "vout_hold2"); + Assert.True(((Math.Abs((vhold - vref)) < 0.001)), CaseLabel(result)); + Assert.True(((Math.Abs((vhold - vhold2)) < 1e-06)), CaseLabel(result)); + } + + // Prompt: Design an inverting amplifier with a gain of 10 using an ideal op-amp modeled as a voltage-controlled voltage source. + [Fact] + public void Inverting_amplifier_using_behavioral_E_source_21f54cf65dca7784() + { + var result = RunAcceptedExample( + "deepseek:00309_fcd9ab580c7f7670:21f54cf65dca7784", + """ + * Inverting amplifier using behavioral E-source + VIN in 0 DC 0 AC 1 + R1 in n1 1k + Rf n1 out 10k + E1 out 0 0 n1 100000 + .AC DEC 10 1 1MEG + .MEAS AC gain_db FIND VDB(out) AT=1k + .MEAS AC phase FIND VP(out) AT=1k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "gain_db", 20.0, 0.1); + } + + // Prompt: AC analysis of electret microphone bias and preamplifier + [Fact] + public void Electret_Microphone_Bias_and_Preamplifier_67c3cf92e93b5917() + { + var result = RunAcceptedExample( + "deepseek:02175_8b5663990864e956:67c3cf92e93b5917", + """ + * Electret Microphone Bias and Preamplifier + Vcc vcc 0 DC 5 + Vmic mic_sig 0 AC 1 + Cmic1 mic_sig mic 10u + R_bias vcc mic 2.2k + Rmic mic 0 10k + Ccouple mic base 10u + R1 vcc base 100k + R2 base 0 27k + Q1 collector base emitter npnmod + Rc vcc collector 4.7k + Re emitter 0 1k + Cout collector out 10u + Rload out 0 100k + .model npnmod NPN(IS=1e-15 BF=100) + .OP + .AC DEC 10 10 100k + .MEAS AC gain_db FIND VDB(out)-VDB(mic) AT=1000 + .MEAS AC vout_1k FIND VM(out) AT=1000 + .MEAS AC vout_20 FIND VM(out) AT=20 + .MEAS AC vout_20k FIND VM(out) AT=20000 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "gain_db", 10.0, 20.0); + AssertMeasurementGreater(result, "vout_1k", 3.0); + AssertMeasurementRatioBetween(result, "vout_20", "vout_1k", 0.5, 1.5); + AssertMeasurementRatioBetween(result, "vout_20k", "vout_1k", 0.5, 1.5); + } + + // Prompt: Design a precision half-wave rectifier using an ideal op-amp and a diode. The input is a 1V 1kHz sine wave. Provide a SPICE netlist with transient analysis and measurements. + [Fact] + public void Precision_half_wave_rectifier_using_behavioral_op_amp_48eb46e200ab5789() + { + var result = RunAcceptedExample( + "deepseek:00712_1ba2b765defed1b8:48eb46e200ab5789", + """ + * Precision half-wave rectifier using behavioral op-amp + VIN in 0 SIN(0 1 1k) + RLOAD out 0 10k + D1 out_op out dmod + .MODEL dmod D(IS=1e-12 RS=1) + E_OP out_op 0 in out 1e6 + .TRAN 1u 5m 0 1u + .MEAS TRAN vout_peak MAX V(out) FROM=1m TO=5m + .MEAS TRAN vin_peak MAX V(in) FROM=1m TO=5m + .MEAS TRAN vout_neg MIN V(out) FROM=2.5m TO=3.5m + .END + """); + + AssertAllMeasurementsSuccessful(result); + RequireMeasurement(result, "vout_peak"); + RequireMeasurement(result, "vin_peak"); + RequireMeasurement(result, "vout_neg"); + AssertMeasurementNear(result, "vout_peak", 1.0, 0.02); + AssertMeasurementNear(result, "vin_peak", 1.0, 0.01); + AssertMeasurementLess(result, "vout_neg", 0.05); + } + + // Prompt: This is a Tow-Thomas biquad low-pass filter with Butterworth response (Q=0.707), unity gain, and a 1 kHz cutoff. + [Fact] + public void Tow_Thomas_Biquad_Low_Pass_Filter_8275cab277515a48() + { + var result = RunAcceptedExample( + "deepseek:01697_dcdcd53491a37111:8275cab277515a48", + """ + * Tow-Thomas Biquad Low-Pass Filter + VIN in 0 DC 0 AC 1 + R1 in 1 15.9k + R2 1 2 11.25k + C1 1 2 10n + E1 2 0 1 0 100k + R3 2 3 15.9k + C2 3 out 10n + E2 out 0 3 0 100k + R5 out 4 10k + R6 4 5 10k + E3 5 0 4 0 100k + R4 5 1 15.9k + .AC DEC 100 10 100k + .MEAS AC gain_dc FIND vm(out) AT=10 + .MEAS AC f3db WHEN vm(out)=0.70710678 FALL=1 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "gain_dc", 1.0, 0.01); + AssertMeasurementNear(result, "f3db", 1000.0, 50.0); + } + + // Prompt: Complementary push-pull emitter follower with NPN and PNP BJTs. + [Fact] + public void Complementary_Emitter_Follower_Buffer_3a8a40ca33f09ae9() + { + var result = RunAcceptedExample( + "deepseek:00953_b05225ffeac57ddf:3a8a40ca33f09ae9", + """ + * Complementary Emitter Follower Buffer + VCC vcc 0 DC 12 + VEE vee 0 DC -12 + VIN nodeB 0 DC 0 SIN(0 0.5 1k) + R1 vcc nodeA 10k + D1 nodeA nodeB DMOD + D2 nodeB nodeC DMOD + R2 nodeC vee 10k + Q1 vcc nodeA out NPN + Q2 vee nodeC out PNP + RL out 0 1k + .MODEL DMOD D(IS=1e-15 N=1 RS=1) + .MODEL NPN NPN(IS=1e-15 BF=100) + .MODEL PNP PNP(IS=1e-15 BF=100) + .OP + .TRAN 10us 2ms + .MEAS OP Vout_DC FIND V(out) AT=0 + .MEAS TRAN Vout_pp PP V(out) FROM=0.5ms TO=1.5ms + .MEAS TRAN Vin_pp PP V(nodeB) FROM=0.5ms TO=1.5ms + .MEAS TRAN gain PARAM Vout_pp/Vin_pp + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "Vout_DC", 0.0, 0.1); + AssertMeasurementBetween(result, "gain", 0.9, 1.1); + } + + // Prompt: Passive lag compensation network using a series 10k\u03a9 resistor and shunt 10nF capacitor to ground. + [Fact] + public void Lag_Compensation_RC_Network_1236827f72f79c5a() + { + var result = RunAcceptedExample( + "deepseek:00508_fb183a4627aa363e:1236827f72f79c5a", + """ + * Lag Compensation RC Network + .ac dec 10 10 100k + VIN in 0 AC 1 + R1 in out 10k + C1 out 0 10n + .meas AC gain_db FIND vdb(out) AT=10k + .meas AC phase_rad FIND vp(out) AT=10k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementLess(result, "gain_db", (-10.0)); + AssertMeasurementBetween(result, "phase_rad", (-1.58), (-1.22)); + } + + // Prompt: 5-stage CMOS current-starved ring oscillator with starved bias currents controlled by VBIASP and VBIASN. + [Fact] + public void CMOS_current_starved_ring_oscillator_a1ff97f54e056b90() + { + var result = RunAcceptedExample( + "deepseek:01376_bae3209ef144ef32:a1ff97f54e056b90", + """ + * CMOS current-starved ring oscillator + .MODEL NMOS NMOS (VTO=1 KP=50U LAMBDA=0.02) + .MODEL PMOS PMOS (VTO=-1 KP=20U LAMBDA=0.02) + VDD VDD 0 DC 5 + VBIASP VBIASP 0 DC 3.8 + VBIASN VBIASN 0 DC 1.4 + * Stage 1 + Mp1s1 VDD VBIASP n1p VDD PMOS W=40U L=2U + Mp1i1 node2 node1 n1p VDD PMOS W=20U L=2U + Mn1i1 node2 node1 n1n 0 NMOS W=10U L=2U + Mn1s1 n1n VBIASN 0 0 NMOS W=4U L=2U + C1 node2 0 0.1pF + * Stage 2 + Mp2s2 VDD VBIASP n2p VDD PMOS W=40U L=2U + Mp2i2 node3 node2 n2p VDD PMOS W=20U L=2U + Mn2i2 node3 node2 n2n 0 NMOS W=10U L=2U + Mn2s2 n2n VBIASN 0 0 NMOS W=4U L=2U + C2 node3 0 0.1pF + * Stage 3 + Mp3s3 VDD VBIASP n3p VDD PMOS W=40U L=2U + Mp3i3 node4 node3 n3p VDD PMOS W=20U L=2U + Mn3i3 node4 node3 n3n 0 NMOS W=10U L=2U + Mn3s3 n3n VBIASN 0 0 NMOS W=4U L=2U + C3 node4 0 0.1pF + * Stage 4 + Mp4s4 VDD VBIASP n4p VDD PMOS W=40U L=2U + Mp4i4 node5 node4 n4p VDD PMOS W=20U L=2U + Mn4i4 node5 node4 n4n 0 NMOS W=10U L=2U + Mn4s4 n4n VBIASN 0 0 NMOS W=4U L=2U + C4 node5 0 0.1pF + * Stage 5 + Mp5s5 VDD VBIASP n5p VDD PMOS W=40U L=2U + Mp5i5 node1 node5 n5p VDD PMOS W=20U L=2U + Mn5i5 node1 node5 n5n 0 NMOS W=10U L=2U + Mn5s5 n5n VBIASN 0 0 NMOS W=4U L=2U + C5 node1 0 0.1pF + * Output buffer + Mpout out node1 VDD VDD PMOS W=20U L=2U + Mnout out node1 0 0 NMOS W=10U L=2U + Rload out 0 10k + CL out 0 1pF + .IC V(node1)=0.1 + .TRAN 0.1n 15u UIC + .MEAS TRAN period TRIG V(out) VAL=2.5 RISE=2 TARG V(out) VAL=2.5 RISE=3 + .END + """); + + AssertAllMeasurementsSuccessful(result); + var period = MeasurementValue(result, "period"); + Assert.True(((period > 2e-07)), CaseLabel(result)); + Assert.True(((period < 1e-06)), CaseLabel(result)); + } + + // Prompt: The circuit is an NMOS source follower (common-drain) amplifier. + [Fact] + public void NMOS_Source_Follower_with_Resistor_Load_9b2b969f2bd8f371() + { + var result = RunAcceptedExample( + "deepseek:00258_d03a311e6fe3c761:9b2b969f2bd8f371", + """ + NMOS Source Follower with Resistor Load + VDD vdd 0 DC 12 + Vin gate 0 DC 6 AC 1 + Rload out 0 5k + M1 vdd gate out out nmos W=62u L=1u + .model nmos NMOS (VTO=1 KP=50u LAMBDA=0.02) + .op + .ac dec 10 1 1MEG + .dc Vin 0 12 0.1 + .meas AC ac_gain_lf AVG V(out) FROM=1 TO=1.000001 + .meas AC ac_gain_1k AVG V(out) FROM=1k TO=1.000001k + .meas DC dc_v5p9 AVG V(out) FROM=5.9 TO=5.900001 + .meas DC dc_v6p1 AVG V(out) FROM=6.1 TO=6.100001 + .end + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "ac_gain_lf", 0.9, 0.95); + AssertMeasurementBetween(result, "ac_gain_1k", 0.9, 0.95); + var v59 = MeasurementValue(result, "dc_v5p9"); + var v61 = MeasurementValue(result, "dc_v6p1"); + var dc_gain = ((v61 - v59) / 0.2); + Assert.True((((dc_gain > 0.9)) && ((dc_gain < 0.95))), CaseLabel(result)); + } + + // Prompt: Two-input CMOS NOR gate transient simulation. + [Fact] + public void CMOS_NOR2_Transient_Response_a03237c67582481c() + { + var result = RunAcceptedExample( + "deepseek:00296_e814e1292d26cca5:a03237c67582481c", + """ + * CMOS NOR2 Transient Response + VDD vdd 0 DC 5 + VA A 0 PULSE(0 5 2u 1n 1n 4u 10u) + VB B 0 PULSE(0 5 1u 1n 1n 2u 10u) + MP1 vdd A mid vdd pmos W=10u L=1u + MP2 mid B out vdd pmos W=10u L=1u + MN1 out A 0 0 nmos W=5u L=1u + MN2 out B 0 0 nmos W=5u L=1u + .MODEL nmos NMOS(VTO=1 KP=100u LAMBDA=0.02) + .MODEL pmos PMOS(VTO=-1 KP=50u LAMBDA=0.02) + .TRAN 0.01u 10u + .MEAS TRAN VOUT_HIGH1 AVG V(out) FROM=0.5u TO=0.9u + .MEAS TRAN VOUT_LOW1 AVG V(out) FROM=1.2u TO=1.8u + .MEAS TRAN VOUT_LOW2 AVG V(out) FROM=2.2u TO=2.8u + .MEAS TRAN VOUT_HIGH2 AVG V(out) FROM=7u TO=9u + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "VOUT_LOW1", 0.0, 0.5); + AssertMeasurementBetween(result, "VOUT_LOW2", 0.0, 0.5); + AssertMeasurementBetween(result, "VOUT_HIGH1", 4.5, 5.0); + AssertMeasurementBetween(result, "VOUT_HIGH2", 4.5, 5.0); + } + + // Prompt: Create a SPICE netlist for a track-and-hold amplifier consisting of a voltage-controlled switch, a sampling capacitor, and a unity-gain buffer made from a behavioral op-amp. Apply a 1 kHz sine input and a 50% duty cycle clock pulse. Simulate transient response and measure the output voltage at the end of the first hold period. + [Fact] + public void Track_and_Hold_Buffer_with_Sampling_Capacitor_e12cd979f7288066() + { + var result = RunAcceptedExample( + "deepseek:02241_6fc2e20b526011bb:e12cd979f7288066", + """ + * Track-and-Hold Buffer with Sampling Capacitor + VIN in 0 SIN(0 1 1kHz) + VCLK clk 0 PULSE(0 5 0 10n 10n 10u 20u) + S1 in hold_node clk 0 sw_mod + C1 hold_node 0 1n + E_BUF out 0 hold_node out 100k + RL out 0 10k + .MODEL sw_mod SW(RON=100 ROFF=1MEG VT=2.5 VH=0.5) + .TRAN 0.1u 100u + .MEASURE TRAN vhold_20u FIND V(out) AT=20u + .MEASURE TRAN vin_10u FIND V(in) AT=10u + .MEASURE TRAN vhold_40u FIND V(out) AT=40u + .MEASURE TRAN vin_30u FIND V(in) AT=30u + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertHasSuccessfulMeasurement(result, "vhold_20u"); + AssertHasSuccessfulMeasurement(result, "vin_10u"); + AssertMeasurementNear(result, "vhold_20u", 0.0628, 0.005); + AssertMeasurementNear(result, "vin_10u", 0.0628, 0.005); + AssertMeasurementNear(result, "vhold_40u", 0.1874, 0.005); + AssertMeasurementNear(result, "vin_30u", 0.1874, 0.005); + } + + // Prompt: Design a simple RC pulse stretcher using a diode, resistor, and capacitor. Apply a 5V pulse of 1us duration and observe the stretched output. Measure the width of the output pulse above 2.5V. + [Fact] + public void RC_Pulse_Stretcher_96a2e44171d2755c() + { + var result = RunAcceptedExample( + "deepseek:02367_96a2e44171d2755c:96a2e44171d2755c", + """ + * RC Pulse Stretcher + VIN in 0 PULSE(0 5 0 1n 1n 1u 20u) + D1 in vout DMOD + R1 vout 0 1k + C1 vout 0 10n + .MODEL DMOD D(IS=1e-14 RS=1) + .TRAN 10n 30u + .MEAS TRAN output_width TRIG V(vout) VAL=2.5 RISE=1 TARG V(vout) VAL=2.5 FALL=1 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "output_width", 5e-06, 8e-06); + } + + // Prompt: Create a 50-ohm pi-network attenuator that reduces signal level by 6 dB. + [Fact] + public void Resistive_Pi_Attenuator_Pad_6_dB_50_ohm_10e81b16c7cda7ce() + { + var result = RunAcceptedExample( + "deepseek:00002_24c71b9d3247f520:10e81b16c7cda7ce", + """ + * Resistive Pi Attenuator Pad (6 dB, 50 ohm) + V1 in 0 DC 0 AC 1 + Rs in 1 50 + R1 1 0 150 + R2 1 2 37.5 + R3 2 0 150 + Rload 2 0 50 + .OP + .AC DEC 10 1 1MEG + .MEAS AC vout_db FIND DB(V(2)) AT=1k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "vout_db", (-12.0), 1.0); + } + + // Prompt: Wide-swing cascode NMOS current mirror with a 200\xb5A reference current. + [Fact] + public void Wide_swing_cascode_NMOS_current_mirror_34d804840cfccecd() + { + var result = RunAcceptedExample( + "deepseek:01294_e9d6ec21438ff56f:34d804840cfccecd", + """ + * Wide-swing cascode NMOS current mirror + VDD vdd 0 DC 5 + R5 vdd vbias 130k + M5 vbias vbias 0 0 NMOS W=2u L=10u + IREF vdd in 200u + M1 n1 n1 0 0 NMOS W=200u L=2u + M3 in vbias n1 0 NMOS W=200u L=2u + M2 n2 n1 0 0 NMOS W=200u L=2u + Vsense out d 0 + M4 d vbias n2 0 NMOS W=200u L=2u + VOUT out 0 DC 1 + .MODEL NMOS NMOS (VTO=1 KP=100U LAMBDA=0.02) + .OP + .DC VOUT 0 5 0.1 + .MEAS DC IOUT_2V FIND I(Vsense) AT=2 + .MEAS DC IOUT_5V FIND I(Vsense) AT=5 + .MEAS DC IREF_VAL FIND I(IREF) AT=0.5 + .MEAS DC VBIAS_VAL FIND V(vbias) AT=0.5 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "IOUT_2V", 0.0002, 1e-05); + AssertMeasurementNear(result, "IOUT_5V", 0.0002, 2e-05); + AssertMeasurementNear(result, "IREF_VAL", 0.0002, 1e-05); + AssertMeasurementNear(result, "VBIAS_VAL", 2.4, 0.1); + } + + // Prompt: Ceramic resonator equivalent circuit consisting of a series RLC motional arm (R1, L1, C1) and a parallel capacitor (C0). + [Fact] + public void Ceramic_resonator_equivalent_circuit_AC_analysis_99d556094b840d29() + { + var result = RunAcceptedExample( + "deepseek:00631_b83ce21802873824:99d556094b840d29", + """ + * Ceramic resonator equivalent circuit AC analysis + V1 in 0 AC 1 + Rs in a 50 + * Equivalent circuit: motional arm R1 L1 C1 in series, parallel capacitor C0 + R1 a b 10 + L1 b c 1.22m + C1 c 0 100p + C0 a 0 200p + .AC DEC 100 100k 1MEG + .MEAS AC mag_at_res FIND V(a) AT=455k + .MEAS AC mag_at_antires FIND V(a) AT=557k + .END + """); + + AssertAllMeasurementsSuccessful(result); + var mag_res = MeasurementValue(result, "mag_at_res"); + var mag_antires = MeasurementValue(result, "mag_at_antires"); + Assert.True(((mag_res < mag_antires)), CaseLabel(result)); + Assert.True(((mag_res < 0.4)), CaseLabel(result)); + Assert.True(((mag_antires > 0.7)), CaseLabel(result)); + } + + // Prompt: Non-inverting amplifier with ideal op-amp (gain 100k) and equal 10k feedback resistors yielding voltage gain of 2. + [Fact] + public void Non_inverting_amplifier_with_input_bias_resistor_ceb2441823a5d355() + { + var result = RunAcceptedExample( + "deepseek:01446_245aac30ba28beca:ceb2441823a5d355", + """ + * Non-inverting amplifier with input bias resistor + VIN in 0 DC 0 AC 1 + C1 in nin 10u + R1 nin 0 100k + Rf out inv 10k + Rg inv 0 10k + E1 out 0 nin inv 100000 + .DC VIN 0 0 1 + .AC DEC 10 1 1MEG + .MEASURE DC vout_dc FIND V(out) AT=0 + .MEASURE AC gain_dB FIND VDB(out) AT=1k + .MEASURE AC gain_lin FIND VM(out) AT=1k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "gain_lin", 2.0, 0.1); + AssertMeasurementNear(result, "gain_dB", 6.0, 0.2); + AssertMeasurementNear(result, "vout_dc", 0.0, 0.1); + } + + // Prompt: Create a non-inverting operational amplifier using an ideal voltage-controlled voltage source (E-source) with a gain of 100k. Use feedback resistors R1=1k and R2=10k to set a closed-loop gain of 11. Perform AC analysis from 1 Hz to 100 kHz and measure the maximum voltage gain in dB. + [Fact] + public void Non_inverting_op_amp_amplifier_7f47cc267e3cd7c7() + { + var result = RunAcceptedExample( + "deepseek:00312_1b06fd7b30f1164e:7f47cc267e3cd7c7", + """ + * Non-inverting op-amp amplifier + Vin in 0 DC 0 AC 1 + R1 neg 0 1k + R2 out neg 10k + E1 out 0 in neg 100000 + .AC DEC 10 1 100k + .MEASURE AC gain_db MAX VDB(out) + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "gain_db", 20.8279, 1.0); + } + + // Prompt: Three-opamp instrumentation amplifier with a gain of 10 set by Rfb1, Rfb2, and Rg in the first stage, and all 10k resistors in the difference amplifier stage. + [Fact] + public void Instrumentation_Amplifier_with_Driven_Reference_Node_31b6a98c9e679f17() + { + var result = RunAcceptedExample( + "deepseek:01481_a90754392b99a47d:31b6a98c9e679f17", + """ + * Instrumentation Amplifier with Driven Reference Node + * Three op-amp INA, gain=10, Vref=2.5V driven by buffer + VCC vp 0 DC 15 + VEE 0 vn DC 15 + VREF vref 0 DC 2.5 + VINP inp 0 DC 0 AC 1 0 + VINN inn 0 DC 0 AC 1 180 + * First stage op-amps + E1 op1 0 inp in1 100k + E2 op2 0 inn in2 100k + * Difference amplifier op-amp + E3 out 0 vdiff_non vdiff_inv 100k + * Reference buffer + E4 ref_drive 0 vref 0 1 + * First stage resistors (gain = 1 + 2*Rfb/Rg = 1 + 2*10k/2.222k = 10) + Rfb1 op1 in1 10k + Rfb2 op2 in2 10k + Rg in1 in2 2.222k + * Difference amplifier resistors (all 10k) + R3 op1 vdiff_inv 10k + R4 op2 vdiff_non 10k + Rf out vdiff_inv 10k + R5 ref_drive vdiff_non 10k + * Analysis + .DC VINP 0 0.1 0.1 + .AC DEC 10 1 1MEG + * Measurements + .MEAS DC dc_out FIND V(out) AT=0 + .MEAS AC mag_1k FIND VM(out) AT=1k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "dc_out", 2.5, 0.01); + AssertMeasurementNear(result, "mag_1k", 20.0, 0.1); + } + + // Prompt: Design an RC low-pass filter and apply a pulse voltage source. Simulate the step response and measure the rise time to 90% of the final value. + [Fact] + public void RC_Step_Response_from_Pulse_Source_9856b9add516f72e() + { + var result = RunAcceptedExample( + "deepseek:00031_9856b9add516f72e:9856b9add516f72e", + """ + * RC Step Response from Pulse Source + Vpulse in 0 PULSE(0 1 0 1n 1n 100u 200u) + R1 in out 10k + C1 out 0 1n + .TRAN 0.1u 200u + .MEASURE TRAN t_rise WHEN V(out)=0.9 RISE=1 + .MEASURE TRAN v_final AVG V(out) FROM=90u TO=100u + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "t_rise", 2e-05, 3e-05); + AssertMeasurementBetween(result, "v_final", 0.99, 1.01); + } + + // Prompt: Sallen-Key second-order high-pass filter using equal 10k\u03a9 resistors and 10nF capacitors. + [Fact] + public void Sallen_Key_Second_Order_High_Pass_Filter_23638a8a882fffcb() + { + var result = RunAcceptedExample( + "deepseek:00362_d101a90f0ba31bc2:23638a8a882fffcb", + """ + * Sallen-Key Second-Order High-Pass Filter + .AC DEC 10 10 100k + .param R1=10k R2=10k C1=10n C2=10n + VIN in 0 AC 1 + C1 in n1 {C1} + R1 n1 0 {R1} + R2 n1 nin {R2} + C2 n1 out {C2} + E1 out 0 nin out 100000 + .MEAS AC fc WHEN VDB(out)=-3 RISE=1 + .MEAS AC gain_high FIND V(out) AT=100k + .MEAS AC maxgain MAX V(out) + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "fc", 1500.0, 1700.0); + AssertMeasurementGreater(result, "gain_high", 0.95); + AssertMeasurementBetween(result, "maxgain", 0.99, 1.05); + } + + // Prompt: DC operating point of an NMOS transistor biased via a resistive voltage divider at the gate and source degeneration. + [Fact] + public void MOSFET_DC_Bias_Point_Analysis_511d5458b85479c6() + { + var result = RunAcceptedExample( + "deepseek:02346_7de714f0f3c4bb77:511d5458b85479c6", + """ + * MOSFET DC Bias Point Analysis + VDD vdd 0 DC 5 + R1 vdd gate 150k + R2 gate 0 100k + Rd vdd drain 10k + Rs source 0 1k + M1 drain gate source 0 nmos + .model nmos nmos(vto=1 kp=200u lambda=0.02) + .DC VDD 5 5 1 + .MEAS DC vd FIND V(drain) AT=5 + .MEAS DC vg FIND V(gate) AT=5 + .MEAS DC vs FIND V(source) AT=5 + .MEAS DC id FIND I(Rd) AT=5 + .MEAS DC vds FIND V(drain)-V(source) AT=5 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "vg", 1.8, 2.2); + AssertMeasurementBetween(result, "vd", 3.5, 5.0); + AssertMeasurementBetween(result, "vs", 0.05, 0.15); + AssertMeasurementBetween(result, "id", 7e-05, 0.0001); + AssertMeasurementBetween(result, "vds", 3.5, 5.0); + } + + // Prompt: Negative impedance converter using an op-amp and resistors: the circuit presents an input impedance of -1 k\u03a9. + [Fact] + public void Negative_Impedance_Converter_84917daf20ff6819() + { + var result = RunAcceptedExample( + "deepseek:01540_dc8f39b518a6d508:84917daf20ff6819", + """ + * Negative Impedance Converter + .AC DEC 10 1 10k + .OP + IIN 0 in AC 1 + E1 out 0 in n1 100k + Rf out n1 1k + Rg n1 0 1k + R1 in out 1k + .MEAS AC zin_real FIND REAL(V(in)) AT=100 + .MEAS AC zin_imag FIND IMAG(V(in)) AT=100 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "zin_real", (-1100.0), (-900.0)); + AssertMeasurementBetween(result, "zin_imag", (-100.0), 100.0); + } + + // Prompt: Design a logarithmic amplifier that uses an op-amp and a diode in negative feedback. The circuit should produce an output voltage proportional to the logarithm of the input voltage. + [Fact] + public void Log_Converter_with_Op_Amp_and_Diode_Feedback_6d301093dd58ca41() + { + var result = RunAcceptedExample( + "deepseek:00826_763724a8227e248e:6d301093dd58ca41", + """ + * Log Converter with Op-Amp and Diode Feedback + VIN in 0 DC 1 + R1 in inv 1k + D1 inv out DMOD + E1 out 0 0 inv 100k + .MODEL DMOD D(IS=1e-12 RS=0.1 N=1.0) + .OP + .DC VIN 0.1 10 0.1 + .MEASURE DC VOUT_AT_0P1 FIND V(out) AT=0.1 + .MEASURE DC VOUT_AT_1 FIND V(out) AT=1 + .MEASURE DC VOUT_DIFF PARAM='VOUT_AT_1 - VOUT_AT_0P1' + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "VOUT_DIFF", (-0.0595), 0.005); + AssertMeasurementLess(result, "VOUT_AT_1", 0.0); + var vout0p1 = MeasurementValue(result, "VOUT_AT_0P1"); + var vout1 = MeasurementValue(result, "VOUT_AT_1"); + Assert.True(((vout0p1 > vout1)), CaseLabel(result)); + } + + // Prompt: This is a passive notch filter using a parallel LC tank in series with the signal path, providing attenuation at the resonant frequency of 1 kHz. + [Fact] + public void Parallel_resonant_trap_filter_notch_at_1_kHz_116ee16cd4c99e77() + { + var result = RunAcceptedExample( + "deepseek:00550_f161475a38873662:116ee16cd4c99e77", + """ + * Parallel resonant trap filter, notch at 1 kHz + V1 in 0 AC 1 + R1 in a 50 + R_loss a b 0.1 + L1 b out 10m + C1 b out 2.533u + R2 out 0 1k + .AC DEC 100 10 10k + .MEAS AC min_dB MIN VDB(out) + .MEAS AC db_at_1k FIND VDB(out) AT=1000 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementLess(result, "min_dB", (-25.0)); + AssertMeasurementLess(result, "db_at_1k", (-25.0)); + } + + // Prompt: The Zener diode D1 is connected in reverse breakdown configuration: cathode to output, anode to ground. + [Fact] + public void Zener_voltage_regulator_0e1e5ffebd3295a0() + { + var result = RunAcceptedExample( + "deepseek:00130_8b4894972f02c90a:0e1e5ffebd3295a0", + """ + * Zener voltage regulator + VIN in 0 DC 12 + R1 in out 1k + D1 0 out ZENER + RL out 0 10k + .MODEL ZENER D(BV=5.1 IS=1e-15 RS=0.5) + .OP + .DC VIN 0 15 0.01 + .MEASURE DC VOUT_NOM FIND V(OUT) AT=12 + .MEASURE DC VOUT_MIN FIND V(OUT) AT=8 + .MEASURE DC VOUT_MAX FIND V(OUT) AT=14 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "VOUT_NOM", 5.0, 5.2); + AssertMeasurementBetween(result, "VOUT_MIN", 5.0, 5.2); + AssertMeasurementBetween(result, "VOUT_MAX", 5.0, 5.2); + } + + // Prompt: NMOS common-source amplifier with current-source load biased in saturation. + [Fact] + public void NMOS_Common_Source_Amplifier_with_Current_Source_Load_f3cfe464ec6d86a8() + { + var result = RunAcceptedExample( + "deepseek:00248_b692b5cd7f4cc74e:f3cfe464ec6d86a8", + """ + * NMOS Common-Source Amplifier with Current-Source Load + VDD vdd 0 DC 3 + VG gate 0 DC 1.2 AC 1 + M1 drain gate 0 0 nch W=40u L=2u + I1 vdd drain DC 0.165m + .MODEL nch NMOS(VTO=0.8 KP=100u LAMBDA=0.02) + .OP + .DC VG 1.2 1.2 0.01 + .AC DEC 10 1 100MEG + .MEAS DC vout_dc FIND V(drain) AT=1.2 + .MEAS AC max_gain_db MAX VDB(drain) + .MEAS AC gain_v MAX VM(drain) + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "vout_dc", 1.56, 0.15); + AssertMeasurementBetween(result, "max_gain_db", 45.0, 55.0); + AssertMeasurementBetween(result, "gain_v", 200.0, 300.0); + } + + // Prompt: Capacitive bridge with one mismatched capacitor (101p vs 100p) creates a small differential AC signal. + [Fact] + public void Capacitive_Sensor_Bridge_with_AC_Excitation_9f73481f632e1032() + { + var result = RunAcceptedExample( + "deepseek:02166_5aff8009e9ef3cd0:9f73481f632e1032", + """ + * Capacitive Sensor Bridge with AC Excitation + VEXC exc 0 DC 2.5 AC 1 + C1 exc a 100p + C2 a 0 100p + C3 exc b 100p + C4 b 0 101p + R1 a 0 10MEG + R2 b 0 10MEG + E1 out_int 0 a b 1000 + ROUT out_int out 100 + CLOAD out 0 10n + .AC DEC 10 100 1MEG + .PARAM maxgain=7.9168 + .MEAS AC vout_mag FIND vm(out) AT=10k + .MEAS AC vout_phase FIND vp(out) AT=10k + .MEAS AC vout_dB_max MAX vdb(out) + .MEAS AC f3dB WHEN vdb(out)=maxgain-3 FALL=1 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "vout_mag", 2.4, 2.6); + AssertMeasurementBetween(result, "vout_phase", (-5.0), 0.0); + AssertMeasurementNear(result, "f3dB", 159000.0, 2000.0); + } + + // Prompt: Zener diode Dz corrected to anode=0, cathode=z for reverse breakdown operation. + [Fact] + public void Zener_reference_buffered_by_emitter_follower_ef29e73c32051d08() + { + var result = RunAcceptedExample( + "deepseek:00848_d4ddc41d5f2f1ae8:ef29e73c32051d08", + """ + * Zener reference buffered by emitter follower + Vcc vcc 0 DC 10 + Rs vcc z 1k + Dz 0 z dm + .model dm D(Is=1e-12 Rs=1 Bv=5.6 Ibv=1e-3) + Q1 vcc z eout npn + .model npn NPN(Is=1e-15 Bf=100) + Rload eout 0 1k + .op + .dc Vcc 8 12 0.01 + .meas DC Vout_nom FIND V(eout) AT=10 + .meas DC Vout_min FIND V(eout) WHEN V(vcc)=8 + .meas DC Vout_max FIND V(eout) WHEN V(vcc)=12 + .meas DC Line_reg PARAM '(Vout_max - Vout_min)/4' + .end + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "Vout_nom", 4.9, 0.2); + AssertMeasurementLess(result, "Line_reg", 0.05); + } + + // Prompt: DC current source I1 provides 1 mA from VCC to node Y. + [Fact] + public void Frequency_to_Voltage_Converter_with_Charge_Pump_ebd005c0d00f3697() + { + var result = RunAcceptedExample( + "deepseek:01870_f33c8a2189b2b272:ebd005c0d00f3697", + """ + * Frequency-to-Voltage Converter with Charge Pump + VCC vcc 0 DC 10 + I1 vcc Y DC 1mA + Rbyp Y 0 10k + VIN in 0 PULSE(0 5 0 1n 1n 1us 10us) + S1 Y X in 0 swmod + .MODEL swmod SW(RON=10 ROFF=100MEG VT=2 VH=0.5) + C1 X 0 10nF + Rdis X 0 10k + E1 out 0 X out 100k + .TRAN 0.1us 500us + .MEASURE TRAN Vavg AVG V(out) FROM=400u TO=500u + .MEASURE TRAN Vpp PP V(out) FROM=400u TO=500u + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "Vavg", 1.0, 0.2); + AssertMeasurementLess(result, "Vpp", 0.15); + } + + // Prompt: Push-pull BJT class-AB output stage with diode biasing using complementary NPN and PNP transistors. + [Fact] + public void Class_AB_output_stage_with_diode_bias_4a31722f60a6ddd8() + { + var result = RunAcceptedExample( + "deepseek:01110_d73fd4d8e6f17ce2:4a31722f60a6ddd8", + """ + * Class-AB output stage with diode bias + VCC vcc_int 0 DC 15 + Vsense1 vcc_int vcc 0 + VEE vee_int 0 DC -15 + Vsense2 vee vee_int 0 + VIN nd2 0 SIN(0 1 1k) + R1 vcc nd1 1.5k + D1 nd1 nd2 DMOD + D2 nd2 nd3 DMOD + R2 nd3 vee 1.5k + Q1 vcc nd1 n1 NPNMOD + RE1 n1 out 5 + Q2 vee nd3 n2 PNPMOD + RE2 n2 out 5 + RLOAD out 0 100 + .model NPNMOD NPN(IS=1e-14 BF=200) + .model PNPMOD PNP(IS=1e-14 BF=200) + .model DMOD D(IS=1e-14) + .op + .tran 0.1m 5m + .meas TRAN IQ_VCC AVG I(Vsense1) from=0 to=5m + .meas TRAN IQ_VEE AVG I(Vsense2) from=0 to=5m + .meas TRAN VOUT_MAX MAX V(out) from=0 to=5m + .meas TRAN VOUT_MIN MIN V(out) from=0 to=5m + .meas TRAN VIN_RMS RMS V(nd2) from=0 to=5m + .meas TRAN VOUT_RMS RMS V(out) from=0 to=5m + .meas TRAN GAIN param='VOUT_RMS/VIN_RMS' + .meas TRAN VOUT_DC AVG V(out) from=0 to=5m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "IQ_VCC", 0.005, 0.02); + AssertMeasurementBetween(result, "IQ_VEE", 0.005, 0.02); + AssertMeasurementBetween(result, "VOUT_MAX", 0.8, 1.2); + AssertMeasurementBetween(result, "VOUT_MIN", (-1.2), (-0.8)); + AssertMeasurementBetween(result, "GAIN", 0.9, 1.1); + AssertMeasurementBetween(result, "VOUT_DC", (-0.05), 0.05); + } + + // Prompt: Simulate a simple RC low-pass filter driven by a pulse voltage source. Measure the rise time and steady-state output voltage. + [Fact] + public void RC_step_response_from_pulse_source_ece5bed924569b6f() + { + var result = RunAcceptedExample( + "deepseek:00027_ece5bed924569b6f:ece5bed924569b6f", + """ + * RC step response from pulse source + VIN in 0 PULSE(0 5 10u 1n 1n 90u 200u) + R1 in out 1k + C1 out 0 10n + .TRAN 0.1u 200u + .MEAS TRAN t_rise TRIG V(out) VAL=0.5 RISE=1 TARG V(out) VAL=4.5 RISE=1 + .MEAS TRAN v_final FIND V(out) AT=100u + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "t_rise", 2e-05, 2.4e-05); + AssertMeasurementGreater(result, "v_final", 4.9); + } + + // Prompt: Precision bilateral active voltage clamp using two op-amp-like E sources. + [Fact] + public void Precision_Bilateral_Clamp_with_Op_Amps_0595bc53bd2be720() + { + var result = RunAcceptedExample( + "deepseek:01575_41ac91aff1688af6:0595bc53bd2be720", + """ + * Precision Bilateral Clamp with Op-Amps + VIN 1 0 SIN(0 5 10k 0 0) + RIN 1 2 1k + VREFP 3 0 DC 3 + VREFN 4 0 DC -3 + E1 5 0 3 2 100k + Rout1 5 5a 100 + DP 2 5a DMOD + E2 6 0 4 2 100k + Rout2 6 6a 100 + DN 6a 2 DMOD + .MODEL DMOD D(IS=1e-12 RS=0.1) + .TRAN 1u 2m + .MEAS TRAN vmax MAX V(2) FROM=0 TO=2m + .MEAS TRAN vmin MIN V(2) FROM=0 TO=2m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "vmax", 2.95, 3.05); + AssertMeasurementBetween(result, "vmin", (-3.05), (-2.95)); + } + + // Prompt: Common-base BJT transimpedance amplifier converting input current to output voltage + [Fact] + public void Common_base_transimpedance_input_stage_d0af5872688ab0ef() + { + var result = RunAcceptedExample( + "deepseek:00938_c88a0d864e92fd3b:d0af5872688ab0ef", + """ + * Common-base transimpedance input stage + VCC vcc 0 DC 5 + R1 vcc base 10k + R2 base 0 5k + Cbyp base 0 10uF + Q1 out base emitter npnmod + Rc vcc out 2k + Iin emitter 0 DC 1m AC 1 + Cpd emitter 0 10pF + .MODEL npnmod NPN(IS=1e-14 BF=150 VAF=75 CJE=5p CJC=2p) + .OP + .AC DEC 20 100 10MEG + .MEAS AC tz_gain_db FIND vdb(out) AT=1k + .MEAS AC vout_1k FIND vdb(out) AT=1k + .MEAS AC vout_10M FIND vdb(out) AT=10MEG + .MEAS AC phase_1k FIND vp(out) AT=1k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "tz_gain_db", 60.0, 70.0); + AssertMeasurementBetween(result, "vout_1k", 60.0, 70.0); + AssertMeasurementGreater(result, "vout_10M", 64.0); + AssertMeasurementBetween(result, "phase_1k", (-10.0), 10.0); + } + + // Prompt: Non-inverting input (pos) driven by VIN with DC 1V and AC 1V. + [Fact] + public void Voltage_follower_using_behavioral_op_amp_E_source_60a7f0e199d5b471() + { + var result = RunAcceptedExample( + "deepseek:01426_43833ee69151de53:60a7f0e199d5b471", + """ + * Voltage follower using behavioral op-amp (E-source) + VIN pos 0 DC 1 AC 1 + E1 out 0 pos neg 100000 + Rfb out neg 0.001 + Rload out 0 10k + .OP + .AC DEC 10 1 1MEG + .MEAS AC gain_dc FIND V(out) AT=1 + .MEAS AC gain_ac MAX V(out) FROM 1 TO 1MEG + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "gain_dc", 1.0, 0.01); + AssertMeasurementNear(result, "gain_ac", 1.0, 0.01); + } + + // Prompt: NPN emitter follower buffer with 10 V supply. + [Fact] + public void NPN_Emitter_Follower_Buffer_05e4495e3de3844f() + { + var result = RunAcceptedExample( + "deepseek:00180_7de8014a344cd43f:05e4495e3de3844f", + """ + * NPN Emitter Follower Buffer + VCC VCC 0 DC 10 + VIN IN 0 DC 0 AC 1 + R1 VCC BASE 100k + R2 BASE 0 100k + C1 IN BASE 10u + Q1 VCC BASE OUT NPN_MOD + RE OUT 0 1k + RL OUT 0 10k + .MODEL NPN_MOD NPN(IS=1e-14 BF=100 VAF=100) + .OP + .AC DEC 10 10 100k + .MEAS AC vout_max MAX V(OUT) + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "vout_max", 0.9, 1.1); + } + + // Prompt: Thermistor voltage divider with parallel linearization resistor. + [Fact] + public void Thermistor_voltage_divider_with_parallel_linearization_35b3a9e37c572f3a() + { + var result = RunAcceptedExample( + "deepseek:02141_d270e762fa2084bd:35b3a9e37c572f3a", + """ + * Thermistor voltage divider with parallel linearization + V1 vcc 0 DC 3.3 + R1 vcc out 10k + Vtemp temp_net 0 DC 25 + Rtherm out 0 R=10k*(1-0.01*(V(temp_net)-25)+0.0001*(V(temp_net)-25)*(V(temp_net)-25)) + Rlin out 0 3k + .DC Vtemp -20 70 1 + .MEAS DC Vout_neg20 FIND V(out) AT=-20 + .MEAS DC Vout_25 FIND V(out) AT=25 + .MEAS DC Vout_70 FIND V(out) AT=70 + .END + """); + + AssertAllMeasurementsSuccessful(result); + var v_neg20 = MeasurementValue(result, "Vout_neg20"); + var v_25 = MeasurementValue(result, "Vout_25"); + var v_70 = MeasurementValue(result, "Vout_70"); + var v_lin = (v_neg20 + (((25.0 - (-20.0)) * (v_70 - v_neg20)) / (70.0 - (-20.0)))); + var error = Math.Abs((v_25 - v_lin)); + Assert.True(((error < 0.01)), CaseLabel(result)); + Assert.True(((v_neg20 > v_25) && (v_25 > v_70)), CaseLabel(result)); + } + + // Prompt: High-pass RC differentiator circuit + [Fact] + public void RC_Differentiator_Edge_Detector_1813b175c642f37e() + { + var result = RunAcceptedExample( + "deepseek:00635_6f1db9b16cdc159e:1813b175c642f37e", + """ + * RC Differentiator Edge Detector + C1 in out 10nF + R1 out 0 1k + Vpulse in 0 PULSE(0 5 10u 1n 1n 100u 200u) + .TRAN 1u 500u + .MEAS TRAN vmax MAX V(out) + .MEAS TRAN vmin MIN V(out) + .MEAS TRAN t_rise WHEN V(out)=4.5 RISE=1 + .MEAS TRAN t_fall WHEN V(out)=-4.5 FALL=1 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "vmax", 4.8, 5.2); + AssertMeasurementBetween(result, "vmin", (-5.2), (-4.8)); + AssertMeasurementNear(result, "t_rise", 1e-05, 1e-06); + AssertMeasurementNear(result, "t_fall", 0.00011, 1e-06); + } + + // Prompt: Potentiometer-based volume control with source impedance (600 Ohm) and equal 5k Ohm resistors top and bottom. + [Fact] + public void Potentiometer_volume_control_with_source_impedance_33d831a412ced7a4() + { + var result = RunAcceptedExample( + "deepseek:00478_3ee6f5aa5a6eb86b:33d831a412ced7a4", + """ + * Potentiometer volume control with source impedance + V1 in 0 DC 1 AC 1 + Rs in a 600 + Rtop a out 5k + Rbot out 0 5k + .DC V1 1 1 1 + .AC DEC 10 1 100k + .MEAS DC vout_dc FIND V(out) AT=1 + .MEAS AC vout_ac FIND V(out) AT=1k + .MEAS AC vout_db FIND VDB(out) AT=1k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "vout_dc", 0.4717, 0.01); + AssertMeasurementNear(result, "vout_ac", 0.4717, 0.01); + AssertMeasurementNear(result, "vout_db", (-6.52), 0.1); + } + + // Prompt: Design a sample-and-hold circuit using an analog switch, a hold capacitor, and an output buffer. Apply a pulse input and a clock signal for sampling. Run transient simulation and measure output hold voltages. + [Fact] + public void Sample_and_Hold_Front_End_with_Clocked_Switch_1a146c04da233b92() + { + var result = RunAcceptedExample( + "deepseek:02235_5e7b0449dd72871a:1a146c04da233b92", + """ + * Sample-and-Hold Front End with Clocked Switch + VIN in 0 PULSE(0 5 1u 1u 1u 15u 30u) + VCLK clk 0 PULSE(0 5 0 10n 10n 10u 20u) + S1 in out clk 0 swmod + C1 out 0 1n + R1 out 0 100MEG + E1 out_buf 0 out 0 1 + .MODEL swmod SW(RON=10 ROFF=100MEG VT=2 VH=0.5) + .TRAN 0.01u 60u 0 0.1u + .MEAS TRAN vout_hold1 FIND V(out_buf) AT=15u + .MEAS TRAN vout_hold2 FIND V(out_buf) AT=35u + .MEAS TRAN vout_hold3 FIND V(out_buf) AT=55u + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "vout_hold1", 5.0, 0.1); + AssertMeasurementNear(result, "vout_hold2", 0.0, 0.1); + AssertMeasurementNear(result, "vout_hold3", 0.0, 0.1); + } + + // Prompt: Design a CMOS dynamic precharge inverter with a PMOS precharge transistor, an NMOS evaluation transistor, and an NMOS foot transistor. Use a 5V supply, and analyze transient response with a clock and input pulse. + [Fact] + public void CMOS_Dynamic_Precharge_Inverter_c573c0e02cd46751() + { + var result = RunAcceptedExample( + "deepseek:01371_a4e5043b297b0f0d:c573c0e02cd46751", + """ + * CMOS Dynamic Precharge Inverter + M1 OUT CLK VDD VDD pmos_mod L=1u W=10u + M2 OUT IN N001 0 nmos_mod L=1u W=4u + M3 N001 CLK 0 0 nmos_mod L=1u W=4u + CLOAD OUT 0 20f + VDD VDD 0 DC 5.0 + VIN IN 0 PULSE(0 5.0 20n 0.5n 0.5n 50n 200n) + VCLK CLK 0 PULSE(0 5.0 0 0.5n 0.5n 40n 100n) + .MODEL pmos_mod PMOS(VTO=-0.8 KP=30u LAMBDA=0.05) + .MODEL nmos_mod NMOS(VTO=0.8 KP=60u LAMBDA=0.05) + .OP + .TRAN 0.05n 200n + .MEAS TRAN vout_precharge AVG V(OUT) FROM=60n TO=70n + .MEAS TRAN vout_evaluate AVG V(OUT) FROM=30n TO=40n + .MEAS TRAN t_fall TRIG V(OUT) VAL=2.5 FALL=1 TARG V(OUT) VAL=0.5 FALL=1 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "vout_precharge", 4.5, 5.0); + AssertMeasurementBetween(result, "vout_evaluate", 0.0, 0.5); + AssertMeasurementBetween(result, "t_fall", 1e-10, 2e-09); + } + + // Prompt: Added IBIAS current source to set the diode-connected PMOS bias current, enabling proper current mirror operation. + [Fact] + public void CMOS_Common_Source_Amplifier_with_PMOS_Current_Mirror_Load_c9df94404053867f() + { + var result = RunAcceptedExample( + "deepseek:01223_5baab30883f0f499:c9df94404053867f", + """ + * CMOS Common-Source Amplifier with PMOS Current Mirror Load + VDD VDD 0 DC 3.3 + VIN IN 0 DC 0.8 AC 1 + IBIAS REF 0 DC 3.93u + CL OUT 0 1pF + M1 OUT IN 0 0 nmos W=0.16u L=1u + M2 REF REF VDD VDD pmos W=2u L=1u + M3 OUT REF VDD VDD pmos W=2u L=1u + .MODEL nmos NMOS (VTO=0.3 KP=200u LAMBDA=0.4) + .MODEL pmos PMOS (VTO=-0.7 KP=100u LAMBDA=0.4) + .OP + .AC DEC 10 1 1G + .MEAS AC gain_lf FIND vdb(OUT) AT=1kHz + .MEAS AC gain_max MAX vdb(OUT) + .MEAS AC f3dB WHEN vdb(OUT)=11 FALL=1 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "gain_lf", 10.0, 20.0); + AssertMeasurementBetween(result, "gain_max", 10.0, 20.0); + AssertMeasurementBetween(result, "f3dB", 300000.0, 1000000.0); + var gain_lf = MeasurementValue(result, "gain_lf"); + var gain_max = MeasurementValue(result, "gain_max"); + Assert.True((((gain_max - gain_lf) < 0.1)), CaseLabel(result)); + } + + // Prompt: Create a Widlar current source using BJTs with a reference current of about 2mA and an output current of about 0.5mA. Use a 10V supply. + [Fact] + public void Widlar_BJT_current_source_5a417b3f373b3b2a() + { + var result = RunAcceptedExample( + "deepseek:01008_1af007fc05da9497:5a417b3f373b3b2a", + """ + * Widlar BJT current source + VCC VCC 0 DC 10 + Rref VCC ref 4.7k + Q1 ref ref 0 npn_mod + Q2 out ref e2 npn_mod + R_E2 e2 0 75 + Rload VCC out 5k + .model npn_mod NPN(IS=1e-14 BF=100 VA=100) + .op + .DC VCC 0 10 0.1 + .MEAS DC Iout FIND I(Rload) AT=10 + .MEAS DC Iref FIND I(Rref) AT=10 + .MEAS DC Vout FIND V(out) AT=10 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "Iout", 0.00045, 0.00055); + AssertMeasurementBetween(result, "Iref", 0.0018, 0.0022); + AssertMeasurementBetween(result, "Vout", 7.0, 8.0); + } + + // Prompt: BJT differential pair with an active current mirror tail source using Q3 and Q4 + [Fact] + public void BJT_Differential_Pair_with_Tail_Current_Source_78618bc6ae9c8b8c() + { + var result = RunAcceptedExample( + "deepseek:00198_7c0c3f90c81e3a46:78618bc6ae9c8b8c", + """ + * BJT Differential Pair with Tail Current Source + VCC VCC 0 DC 12 + VEE VEE 0 DC -12 + VIN1 in1 0 DC 0 + VIN2 in2 0 DC 0 + R1 VCC out1 10k + R2 VCC out2 10k + R3 VEE e3 100 + R4 VEE e4 100 + R5 VCC n1 20k + Q3 n1 n1 e3 npn_mod + Q4 tail n1 e4 npn_mod + Q1 out1 in1 tail npn_mod + Q2 out2 in2 tail npn_mod + .model npn_mod NPN(IS=1e-15 BF=100 VAF=50) + .op + .dc VIN1 -0.02 0.02 0.001 + .meas DC VOUTMAX MAX V(out1) + .meas DC VOUTMIN MIN V(out1) + .meas DC VOUT0 FIND V(out1) AT=0 + .meas DC VOUT2MAX MAX V(out2) + .meas DC VOUT2MIN MIN V(out2) + .END + """); + + AssertAllMeasurementsSuccessful(result); + var VMAX = MeasurementValue(result, "VOUTMAX"); + var VMIN = MeasurementValue(result, "VOUTMIN"); + var V0 = MeasurementValue(result, "VOUT0"); + var gain = ((VMAX - VMIN) / 0.04); + AssertMeasurementBetween(result, "VOUT0", 5.9, 6.6); + Assert.True((((gain > 90.0)) && ((gain < 130.0))), CaseLabel(result)); + AssertMeasurementRatioBetween(result, "VOUT2MAX", "VOUTMAX", 0.9, 1.1); + AssertMeasurementRatioBetween(result, "VOUT2MIN", "VOUTMIN", 0.9, 1.1); + } + + // Prompt: BJT differential pair with 1mA tail current, 5k\u03a9 load resistors, and 10V supply + [Fact] + public void BJT_Differential_Pair_with_Tail_Current_Source_76cd9bea6f2114dc() + { + var result = RunAcceptedExample( + "deepseek:00194_eb5e54ed157a2f02:76cd9bea6f2114dc", + """ + * BJT Differential Pair with Tail Current Source + VCC VCC 0 DC 10 + I1 E 0 DC 1m + Q1 C1 B1 E NPN + Q2 C2 B2 E NPN + R1 VCC C1 5k + R2 VCC C2 5k + VIN1 B1 0 DC 0 + VIN2 B2 0 DC 0 + .MODEL NPN NPN (IS=1e-14 BF=100 VAF=100) + .OP + .DC VIN1 -200m 200m 1m + .MEAS DC VOUT1_N10 FIND V(C1) WHEN V(B1)=-10m + .MEAS DC VOUT2_N10 FIND V(C2) WHEN V(B1)=-10m + .MEAS DC VOUT1_P10 FIND V(C1) WHEN V(B1)=10m + .MEAS DC VOUT2_P10 FIND V(C2) WHEN V(B1)=10m + .MEAS DC DIFF_GAIN PARAM='((VOUT1_N10 - VOUT2_N10) - (VOUT1_P10 - VOUT2_P10))/20m' + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "DIFF_GAIN", 80.0, 120.0); + AssertMeasurementBetween(result, "VOUT1_N10", 7.5, 8.5); + AssertMeasurementBetween(result, "VOUT1_P10", 6.5, 7.5); + AssertMeasurementBetween(result, "VOUT2_N10", 6.5, 7.5); + AssertMeasurementBetween(result, "VOUT2_P10", 7.5, 8.5); + } + + // Prompt: T-section LC impedance matching network designed to match 50 ohm source to 100 ohm load at 10 MHz. + [Fact] + public void T_section_LC_impedance_matching_network_3edb1e1b3135ed40() + { + var result = RunAcceptedExample( + "deepseek:00679_48d95e3d2fe0879a:3edb1e1b3135ed40", + """ + * T-section LC impedance matching network + V1 in 0 AC 1 + Rs in a 50 + L1 a mid 2.4u + C mid 0 158.6p + L2 mid out 3.2u + RL out 0 100 + .AC dec 100 1e6 100e6 + .MEAS AC vout_mag FIND VM(out) AT=10e6 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "vout_mag", 0.7071, 0.05); + } + + // Prompt: Diode clamp circuit with resistor from input to output and diode from output to -2V rail. + [Fact] + public void Diode_Clamp_to_2V_Rail_65ddec7a395afe83() + { + var result = RunAcceptedExample( + "deepseek:00744_eeb51a888afa153c:65ddec7a395afe83", + """ + * Diode Clamp to -2V Rail + VIN in 0 PULSE(0 5 0 10n 10n 1u 2u) + R1 in out 1k + D1 out neg_rail dmod + VNEG neg_rail 0 DC -2 + .MODEL dmod D(IS=1e-14 RS=1) + .TRAN 0.1u 4u + .MEAS TRAN vout_min MIN V(out) FROM=0.5u TO=4u + .MEAS TRAN vout_max MAX V(out) FROM=0.5u TO=4u + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "vout_min", (-1.5), (-1.0)); + AssertMeasurementBetween(result, "vout_max", (-1.5), (-1.0)); + } + + // Prompt: Potentiometer volume control circuit with source impedance and capacitive load + [Fact] + public void Potentiometer_volume_control_with_source_impedance_and_capacitive_load_8cbc683926b45825() + { + var result = RunAcceptedExample( + "deepseek:00477_7ff0bdbe8ffd7c82:8cbc683926b45825", + """ + * Potentiometer volume control with source impedance and capacitive load + VIN IN 0 DC 1 AC 1 + RS IN A 1k + RP1 A OUT 5k + RP2 OUT 0 5k + CLOAD OUT 0 1n + .DC VIN 1 1 1 + .AC DEC 10 10 100k + .MEAS DC vout_dc FIND V(OUT) AT=1 + .MEAS AC gain_db FIND VDB(OUT) AT=1k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "vout_dc", 0.4545, 0.001); + AssertMeasurementNear(result, "gain_db", (-6.85), 0.01); + } + + // Prompt: Design a varactor-tuned Colpitts VCO operating near 10 MHz. + [Fact] + public void Varactor_tuned_Colpitts_VCO_d4716016c9f9e470() + { + var result = RunAcceptedExample( + "deepseek:02424_3b509c91c655d21d:d4716016c9f9e470", + """ + * Varactor-tuned Colpitts VCO + .PARAM Vtune=1 + .STEP PARAM Vtune LIST 1 2 3 4 5 + VCC vcc 0 DC 5 + V_VTUNE vtune 0 DC {Vtune} + R1 vcc base 10k + R2 base 0 5.6k + Cb base 0 10n + Re tap 0 1k + L vcc col 5uH + C1 col tap 100p + C2 tap 0 100p + Cblock tap varcath 1n + Rvar vtune varcath 1MEG + D1 varcath 0 varactor + Q1 col base tap npnmod + .MODEL varactor D(CJO=100p VJ=0.75 M=0.5) + .MODEL npnmod NPN(IS=1e-14 BF=100 VAF=100) + .IC V(tap)=1.0 + .TRAN 1n 100u + .MEAS TRAN period TRIG V(tap) VAL=1.0 RISE=10 TARG V(tap) VAL=1.0 RISE=11 + .MEAS TRAN freq param 1/period + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "freq", 8500000.0, 10500000.0); + } + + // Prompt: Op-amp feedback loop regulates current through sense resistor Rsense=1\u03a9 to match Vref=0.1V, yielding 100mA. + [Fact] + public void Constant_current_battery_charger_with_op_amp_control_98d54505935fa36c() + { + var result = RunAcceptedExample( + "deepseek:01924_68be36e7cc6833ab:98d54505935fa36c", + """ + * Constant-current battery charger with op-amp control + VCC VCC 0 DC 10 + Vref VREF 0 DC 0.1 + Rsense SEN 0 1 + Q1 VCC BASE EMIT QN + .MODEL QN NPN(IS=1e-15 BF=100) + Vbatt EMIT SEN DC 3 + E1 BASE 0 VREF SEN 100k + .OP + .DC Vbatt 2 8 0.5 + .MEAS DC I_AT_3V FIND I(Vbatt) AT=3 + .MEAS DC I_AT_2V FIND I(Vbatt) AT=2 + .MEAS DC I_AT_8V FIND I(Vbatt) AT=8 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "I_AT_3V", 0.1, 0.001); + AssertMeasurementRatioBetween(result, "I_AT_8V", "I_AT_2V", 0.95, 1.05); + } + + // Prompt: Non-inverting amplifier with ideal op-amp modeled as voltage-controlled voltage source (E) with gain 100k. + [Fact] + public void Non_inverting_amplifier_with_behavioral_E_source_op_amp_1582045b9a332ab7() + { + var result = RunAcceptedExample( + "deepseek:00317_2bc0d1fc13d0a2e8:1582045b9a332ab7", + """ + * Non-inverting amplifier with behavioral E-source op-amp + VIN IN 0 AC 1 DC 0 + R1 FB 0 1k + R2 OUT FB 9k + E1 OUT 0 IN FB 100000 + RL OUT 0 1MEG + .AC DEC 10 1 1MEG + .MEAS AC gain_db FIND VDB(OUT) AT=1k + .MEAS AC gain_lin FIND V(OUT) AT=1k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "gain_db", 20.0, 0.5); + AssertMeasurementNear(result, "gain_lin", 10.0, 0.1); + } + + // Prompt: Third-order Chebyshev low-pass ladder filter with 1 dB passband ripple. + [Fact] + public void Third_order_Chebyshev_low_pass_ladder_filter_with_1_dB_ripple_3_dB_at_1_kHz_b8104863356a8e36() + { + var result = RunAcceptedExample( + "deepseek:00577_f3538b7b374560ee:b8104863356a8e36", + """ + * Third-order Chebyshev low-pass ladder filter with 1 dB ripple, -3 dB at 1 kHz + V1 in 0 AC 1 + RS in n1 50 + L1 n1 n2 17.63m + C1 n2 0 3.464u + L2 n2 out 17.63m + RL out 0 50 + .AC DEC 100 10 10k + .MEAS AC max_gain MAX VDB(out) + .MEAS AC f3db WHEN VDB(out)=-9 + .MEAS AC gain_at_1k FIND VDB(out) AT=1k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "f3db", 900.0, 1100.0); + AssertMeasurementGreater(result, "max_gain", (-10.0)); + AssertMeasurementBetween(result, "gain_at_1k", (-9.5), (-8.5)); + } + + // Prompt: CMOS differential amplifier with NMOS input pair and PMOS current mirror load. + [Fact] + public void CMOS_Differential_Pair_with_Active_Load_2f4d00078d2c1025() + { + var result = RunAcceptedExample( + "deepseek:00270_5298022d8949433c:2f4d00078d2c1025", + """ + * CMOS Differential Pair with Active Load + VDD vdd 0 DC 5 + VSS vss 0 DC -5 + I1 s vss DC 100u + M1 d1 inp s s NMOS W=10u L=1u + M2 out inn s s NMOS W=10u L=1u + M3 d1 d1 vdd vdd PMOS W=20u L=1u + M4 out d1 vdd vdd PMOS W=20u L=1u + VINP inp 0 DC -2.0 + VINN inn 0 DC -2.0 + .MODEL NMOS NMOS(LEVEL=1 VTO=1 KP=200u LAMBDA=0.02) + .MODEL PMOS PMOS(LEVEL=1 VTO=-1 KP=100u LAMBDA=0.02) + .OP + .DC VINP -2.1 -1.9 0.001 + .MEASURE DC VOUT_MAX MAX V(out) + .MEASURE DC VOUT_MIN MIN V(out) + .MEASURE DC VOUT_0 FIND V(out) AT=-2.0 + .MEASURE DC VOUT_P FIND V(out) AT=-1.999 + .MEASURE DC VOUT_N FIND V(out) AT=-2.001 + .MEASURE DC GAIN PARAM='(VOUT_P-VOUT_N)/0.002' + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "GAIN", 100.0, 400.0); + AssertMeasurementBetween(result, "VOUT_0", (-1.0), 4.0); + AssertMeasurementBetween(result, "VOUT_MAX", 3.0, 5.0); + AssertMeasurementBetween(result, "VOUT_MIN", (-5.0), (-2.0)); + } + + // Prompt: Design a class-B BJT push-pull output stage capable of driving a 1k\u03a9 load with \xb115V supplies. Use a 5V peak 1kHz sine input and measure the output peak voltage and zero-crossing time. + [Fact] + public void Class_B_push_pull_output_stage_df889d465811b05e() + { + var result = RunAcceptedExample( + "deepseek:01101_96c5af211cf676b5:df889d465811b05e", + """ + * Class B push-pull output stage + VCC VCC 0 DC 15 + VEE VEE 0 DC -15 + VIN in 0 SIN(0 5 1k 0 0 0) + Q1 VCC in out NPN_MOD + Q2 VEE in out PNP_MOD + RL out 0 1k + .MODEL NPN_MOD NPN(IS=1e-14 BF=200 VAF=100) + .MODEL PNP_MOD PNP(IS=1e-14 BF=200 VAF=100) + .OP + .TRAN 0.1m 5m + .MEAS TRAN vout_peak MAX V(out) FROM=0 TO=5m + .MEAS TRAN vout_min MIN V(out) FROM=0 TO=5m + .MEAS TRAN crossover_time WHEN V(out)=0 CROSS=LAST + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "vout_peak", 3.5, 5.0); + AssertMeasurementBetween(result, "vout_min", (-5.0), (-3.5)); + AssertMeasurementBetween(result, "crossover_time", 0.004, 0.005); + } + + // Prompt: A BJT-based constant current source using a Zener diode (5.6V) to provide a stable reference voltage to the transistor base. + [Fact] + public void BJT_constant_current_source_with_Zener_diode_reference_f2d180244fc7d4b2() + { + var result = RunAcceptedExample( + "deepseek:01033_d33d197bdf308d17:f2d180244fc7d4b2", + """ + * BJT constant current source with Zener diode reference + VCC VCC 0 DC 15 + R_ref VCC bz 1k + D1 0 bz dmod + RE e 0 4.7k + Q1 c bz e npn + RL VCC c 1k + .model dmod D(IS=1n RS=1 BV=5.6 IBV=10m) + .model npn NPN(IS=1e-15 BF=100) + .op + .dc VCC 10 20 0.1 + .meas DC I_AVG AVG I(RL) from=10 to=20 + .meas DC I_MIN MIN I(RL) from=10 to=20 + .meas DC I_MAX MAX I(RL) from=10 to=20 + .meas DC I_VAR param='I_MAX - I_MIN' + .end + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "I_AVG", 0.001, 0.0011); + AssertMeasurementGreater(result, "I_MIN", 0.00095); + AssertMeasurementLess(result, "I_VAR", 5e-05); + } + + // Prompt: A discrete linear voltage regulator using an NPN transistor as emitter follower and a Zener diode as voltage reference. + [Fact] + public void Linear_regulator_with_NPN_pass_transistor_and_Zener_reference_a2eab8939be78ea8() + { + var result = RunAcceptedExample( + "deepseek:02312_a4d34686a0b2a27f:a2eab8939be78ea8", + """ + * Linear regulator with NPN pass transistor and Zener reference + VCC IN 0 DC 12 + R1 IN BASE 1.2k + D1 0 BASE DZ + Q1 IN BASE OUT QN + RL OUT 0 500 + .MODEL QN NPN(IS=1e-15 BF=100) + .MODEL DZ D(BV=5.6 IBV=1m RS=1) + .OP + .DC VCC 7 15 0.1 + .MEAS DC VOUT_AT_12 FIND V(OUT) AT=12 + .MEAS DC VOUT_MIN MIN V(OUT) FROM=7 TO=15 + .MEAS DC VOUT_MAX MAX V(OUT) FROM=7 TO=15 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "VOUT_AT_12", 4.7, 5.0); + AssertMeasurementBetween(result, "VOUT_MIN", 4.7, 5.0); + AssertMeasurementBetween(result, "VOUT_MAX", 4.7, 5.0); + } + + // Prompt: Potentiometer-based volume control with a 1k\u03a9 source impedance. + [Fact] + public void Potentiometer_Volume_Control_with_Source_Impedance_220fbca710bf9ad8() + { + var result = RunAcceptedExample( + "deepseek:00473_73c4ca641ed02087:220fbca710bf9ad8", + """ + * Potentiometer Volume Control with Source Impedance + VIN in 0 DC 1 AC 1 + RSOURCE in mid 1k + R1 mid out 5k + R2 out 0 5k + .DC VIN 0 1 1 + .AC DEC 10 10 100k + .MEASURE DC vout_dc FIND V(out) AT=1 + .MEASURE AC gain_db FIND DB(V(out)) AT=1k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "vout_dc", 0.45, 0.46); + AssertMeasurementBetween(result, "gain_db", (-7.0), (-6.8)); + } + + // Prompt: JFET constant-current source using an NJF transistor with source degeneration + [Fact] + public void JFET_constant_current_source_with_source_degeneration_acb32bd468a3dce7() + { + var result = RunAcceptedExample( + "deepseek:01410_18561c6bf3897065:acb32bd468a3dce7", + """ + * JFET constant-current source with source degeneration + VDS out 0 DC 5 + J1 out 0 src NJFET + Rs src 0 500 + .MODEL NJFET NJF(VTO=-1.0 BETA=4.0m LAMBDA=0.001) + .NODESET V(src)=0.5 + .DC VDS 0 10 0.01 + .OP + .MEAS DC I_MAX MAX I(Rs) FROM=1 TO=10 + .MEAS DC I_MIN MIN I(Rs) FROM=1 TO=10 + .MEAS DC I_OUT AVG I(Rs) FROM=1 TO=10 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "I_MAX", 0.0008, 0.0012); + AssertMeasurementBetween(result, "I_MIN", 0.0008, 0.0012); + AssertMeasurementBetween(result, "I_OUT", 0.0009, 0.0011); + AssertMeasurementRatioBetween(result, "I_MIN", "I_MAX", 0.95, 1.05); + } + + // Prompt: Design a diode peak detector circuit that captures the peak of a 1kHz sine wave using a capacitor and a bleed resistor, and measure the maximum output voltage. + [Fact] + public void Diode_peak_detector_with_bleed_resistor_a03d7b7f46460637() + { + var result = RunAcceptedExample( + "deepseek:00738_a9b51ee0f1d85631:a03d7b7f46460637", + """ + * Diode peak detector with bleed resistor + VIN in 0 SIN(0 2 1k) + D1 in out DMOD + C1 out 0 1u + R1 out 0 100k + .MODEL DMOD D(IS=1e-14 RS=1) + .TRAN 1u 5m + .MEASURE TRAN vmax MAX V(out) FROM=1m TO=5m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "vmax", 1.3, 0.2); + } + + // Prompt: Single-balanced diode mixer with LO at 1 MHz and RF at 1.1 MHz + [Fact] + public void Balanced_Diode_Mixer_with_Active_IF_Filter_0f6a338fbc4e38a6() + { + var result = RunAcceptedExample( + "deepseek:00803_e86c1c52c247afb6:0f6a338fbc4e38a6", + """ + * Balanced Diode Mixer with Active IF Filter + V_LO lo 0 SIN(0 1 1MEG) + V_RF rf 0 SIN(0 0.3 1.1MEG) + E_LO_P lo_p 0 lo 0 1 + E_LO_N lo_n 0 lo 0 -1 + D1 lo_p if_out Dmod + D2 lo_n if_out Dmod + .MODEL Dmod D(IS=1e-12 RS=10 CJO=1p) + C_couple rf if_out 10u + R_bias if_out 0 1k + R1 if_out n1 1k + R2 n1 n2 1k + C1 n1 out 1n + C2 n2 0 1n + E_op out 0 n2 ng 100000 + R_f1 out ng 10k + R_f2 ng 0 10k + .TRAN 0.01u 50u 40u 0.01u + .MEAS TRAN v_pp_out PP V(out) FROM=40u TO=50u + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "v_pp_out", 0.05, 0.3); + } + + // Prompt: Design a high-input-impedance buffer using an NPN emitter follower with a bootstrapped bias divider. + [Fact] + public void Bootstrapped_emitter_follower_b4c48d63dcc21e7a() + { + var result = RunAcceptedExample( + "deepseek:00948_d00c0e5c16158534:b4c48d63dcc21e7a", + """ + * Bootstrapped emitter follower + VCC VCC 0 DC 15 + VIN IN 0 DC 0 AC 1 + CIN IN BASE 1uF + CBOOT EMITTER B_BIAS 10uF + COUT EMITTER OUT 10uF + RL OUT 0 10k + RB1 VCC B_BIAS 100k + RB2 B_BIAS 0 47k + RB B_BIAS BASE 10k + RE EMITTER 0 2.2k + Q1 VCC BASE EMITTER Q2N2222 + .MODEL Q2N2222 NPN(IS=1E-14 BF=100 VAF=50) + .OP + .AC DEC 10 1 10MEG + .MEAS AC gain_1k FIND V(OUT) AT=1000 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "gain_1k", 0.98, 0.05); + } + + // Prompt: Shunt voltage regulator using op\u2011amp error amplifier (E source) and power NPN transistor. + [Fact] + public void Shunt_Regulator_with_Op_Amp_Error_Amplifier_ebaa624ba3c0e45e() + { + var result = RunAcceptedExample( + "deepseek:01898_06306503ed3fdc6b:ebaa624ba3c0e45e", + """ + * Shunt Regulator with Op-Amp Error Amplifier + VIN vcc 0 DC 12 + Rser vcc vout 50 + RLOAD vout 0 200 + R1 vout fb 10k + R2 fb 0 10k + VREF vref 0 DC 2.5 + E_OPAMP out_amp 0 fb vref 100000 + Q1 vout out_amp 0 npn + .MODEL npn NPN(IS=1e-14 BF=200 VAF=100) + .OP + .DC VIN 10 20 0.1 + .MEASURE DC vout_nom FIND V(Vout) AT=12 + .MEASURE DC vout_10 FIND V(Vout) AT=10 + .MEASURE DC vout_20 FIND V(Vout) AT=20 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "vout_nom", 5.0, 0.2); + AssertMeasurementRatioBetween(result, "vout_20", "vout_10", 0.95, 1.05); + } + + // Prompt: Design a non-inverting op-amp amplifier with a gain of 3 using an ideal op-amp and include a 10k input bias resistor. Perform DC operating point and AC sweep analyses. + [Fact] + public void Non_inverting_amplifier_with_input_bias_resistor_055f512e82be98dc() + { + var result = RunAcceptedExample( + "deepseek:01442_055f512e82be98dc:055f512e82be98dc", + """ + * Non-inverting amplifier with input bias resistor + R1 0 in_n 10k + Rf out in_n 20k + Rbias in 0 10k + E1 out 0 in in_n 100k + VIN in 0 DC 0 AC 1 + .OP + .AC DEC 10 1 1MEG + .MEAS AC gain_at_1k FIND V(out) AT=1k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "gain_at_1k", 3.0, 0.05); + } + + // Prompt: Voltage-controlled oscillator using a current-starved integrator and Schmitt trigger + [Fact] + public void Voltage_Controlled_Oscillator_with_Current_Starved_Integrator_394585be0d90a144() + { + var result = RunAcceptedExample( + "deepseek:01856_98f3817e8cd64379:394585be0d90a144", + """ + * Voltage-Controlled Oscillator with Current-Starved Integrator + Vctrl vctrl 0 DC 1 + Vdd vdd 0 DC 5 + G1 0 cap vctrl 0 1e-3 + C1 cap 0 1n + R1 ninv vref 10k + R2 ninv out 10k + Vref vref 0 DC 2.5 + Ecomp out 0 value={IF(V(ninv)-V(cap)>0,5,0)} + Einvert inv_out 0 value={5-V(out)} + Sreset cap 0 inv_out 0 swmod + .model swmod SW(RON=10 ROFF=100MEG VT=2.5 VH=0.1) + .IC V(cap)=0 + .NODESET V(out)=5 + .tran 0.1u 20u + .meas tran t1 when v(out)=2.5 rise=1 + .meas tran t2 when v(out)=2.5 rise=2 + .meas tran period param t2-t1 + .meas tran freq param 1/period + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "freq", 300000.0, 500000.0); + } + + // Prompt: High\u2011pass RC filter: series capacitor C1 from input to output, shunt resistor R1 from output to ground + [Fact] + public void Lead_compensation_RC_network_0f15398db50b3151() + { + var result = RunAcceptedExample( + "deepseek:00497_92303d5d327432da:0f15398db50b3151", + """ + * Lead compensation RC network + R1 out 0 1.6k + C1 in out 10n + Vin in 0 AC 1 + .AC DEC 100 1 100k + .MEASURE AC gain_10k FIND VDB(out) AT=10k + .MEASURE AC phase_10k_rad FIND VP(out) AT=10k + .MEASURE AC gain_100k FIND VDB(out) AT=100k + .MEASURE AC phase_100k_rad FIND VP(out) AT=100k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "gain_10k", (-3.0), 0.2); + AssertMeasurementNear(result, "phase_10k_rad", 0.785, 0.02); + AssertMeasurementNear(result, "gain_100k", 0.0, 0.05); + AssertMeasurementNear(result, "phase_100k_rad", 0.099, 0.01); + } + + // Prompt: Simulate an NMOS common-gate amplifier stage with biasing resistors and bypass capacitor. Perform DC and AC analyses, and measure the small-signal voltage gain. + [Fact] + public void NMOS_Common_Gate_Amplifier_d10c468dd67c3be3() + { + var result = RunAcceptedExample( + "deepseek:01184_fbe519e447031ce6:d10c468dd67c3be3", + """ + * NMOS Common-Gate Amplifier + M1 d g s 0 nmos W=1u L=1u + .MODEL nmos NMOS (VTO=1 KP=200u LAMBDA=0.01) + VDD vdd 0 DC 10 + RD vdd d 20k + RS s 0 8.2k + R1 vdd g 100k + R2 g 0 100k + CG g 0 100uF + Cin in s 100uF + Cout d out 100uF + RL out 0 20k + VIN in 0 AC 1 + .OP + .AC DEC 10 10 1MEG + .MEAS AC max_gain MAX V(out) + .MEAS AC gain_at_1k FIND V(out) AT=1k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "max_gain", 2.5, 4.5); + AssertMeasurementBetween(result, "gain_at_1k", 2.5, 4.5); + } + + // Prompt: AM signal generated by multiplying a 1 MHz carrier with a DC-shifted 10 kHz modulation tone (modulation index 0.8). + [Fact] + public void Synchronous_AM_Detector_with_Switching_Demodulator_70ae36670bf790c7() + { + var result = RunAcceptedExample( + "deepseek:02108_dd968e77b285c414:70ae36670bf790c7", + """ + * Synchronous AM Detector with Switching Demodulator + Vcarrier carrier 0 SIN(0 1 1MEG) + Vmod mod 0 SIN(0 0.8 10k) + B_AM am 0 V = V(carrier)*(1+V(mod)) + Vswctrl ctrl 0 PULSE(0 1 0 0.1n 0.1n 0.5u 1u) + S1 am mid ctrl 0 SWMOD + R1 mid out 100 + C1 out 0 100nF + Rload out 0 1MEG + .MODEL SWMOD SW(RON=1 ROFF=100MEG VT=0.5 VH=0) + .TRAN 1n 2m 0 1n + .MEAS TRAN Vdc AVG V(out) FROM=0.5m TO=2m + .MEAS TRAN Vmax MAX V(out) FROM=0.5m TO=2m + .MEAS TRAN Vmin MIN V(out) FROM=0.5m TO=2m + .MEAS TRAN Vpp PARAM Vmax - Vmin + .MEAS TRAN Vmod_ampl PARAM Vpp/2 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "Vdc", 0.6366, 0.05); + AssertMeasurementNear(result, "Vmod_ampl", 0.5093, 0.05); + } + + // Prompt: Design a passive lead-lag compensation network using only resistors and capacitors. Use an AC analysis to measure the phase shift at two frequencies, one where phase lead is dominant and one where phase lag is dominant. Include measurement commands to capture the phase at 2.2 kHz and 31.6 kHz. + [Fact] + public void Lead_Lag_Compensation_Network_f4aa195b780943b5() + { + var result = RunAcceptedExample( + "deepseek:00518_f49e509707d0f5b4:f4aa195b780943b5", + """ + * Lead-Lag Compensation Network + VIN in 0 DC 0 AC 1 + R1 in leadout 10k + C1 in leadout 16n + R2 leadout 0 2.49k + R3 leadout out 14.3k + R4 out n1 1.6k + C2 n1 0 1n + .AC DEC 100 100 1MEG + .MEAS AC phase_lead FIND VP(out) AT=2.2k + .MEAS AC phase_lag FIND VP(out) AT=31.6k + .MEAS AC gain_lead FIND V(out) AT=2.2k + .MEAS AC gain_lag FIND V(out) AT=31.6k + .END + """); + + AssertAllMeasurementsSuccessful(result); + var phase_lead = MeasurementValue(result, "phase_lead"); + var phase_lag = MeasurementValue(result, "phase_lag"); + AssertMeasurementGreater(result, "phase_lead", 0.0); + AssertMeasurementLess(result, "phase_lag", 0.0); + AssertMeasurementBetween(result, "gain_lead", 0.1, 10.0); + AssertMeasurementBetween(result, "gain_lag", 0.001, 1.0); + } + + // Prompt: T-pad attenuator with 10 dB attenuation designed for a 50-ohm system. + [Fact] + public void T_Pad_Attenuator_10_dB_50_Ohm_6e09a283545d9391() + { + var result = RunAcceptedExample( + "deepseek:00012_4ed8bba44d69f0c4:6e09a283545d9391", + """ + * T-Pad Attenuator (10 dB, 50 Ohm) + V1 in 0 DC 1 AC 1 + R1 in b 25.98 + R2 b 0 35.14 + R3 b out 25.98 + RL out 0 50 + .DC V1 1 1 1 + .AC DEC 10 1 1k + .MEAS DC vout FIND V(out) AT=1 + .MEAS AC gain FIND V(out) AT=1k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "vout", 0.31, 0.32); + AssertMeasurementBetween(result, "gain", 0.31, 0.32); + } + + // Prompt: Standard three-op-amp instrumentation amplifier with unity-gain difference stage and buffered reference. + [Fact] + public void Instrumentation_amplifier_with_buffered_reference_node_b9ce3f04ade30b08() + { + var result = RunAcceptedExample( + "deepseek:01482_48e8d09d7e1df237:b9ce3f04ade30b08", + """ + * Instrumentation amplifier with buffered reference node + VIN1 inp1 0 DC 0.1 AC 1 + VIN2 inp2 0 DC 0 AC 0 + VREF vref_node 0 DC 2.5 + E1 out1 0 inp1 inn1 100k + E2 out2 0 inp2 inn2 100k + E3 out 0 inp3 inn3 100k + E4 out_ref 0 vref_node 0 1 + Rg inn1 inn2 1k + R1 out1 inn1 10k + R2 out2 inn2 10k + R3 out1 inp3 10k + R4 inp3 out_ref 10k + R5 out2 inn3 10k + R6 inn3 out 10k + .OP + .AC DEC 10 1 100k + .MEAS OP Vout_op FIND V(out) AT=0 + .MEAS AC gain_10hz_db FIND VDB(out) AT=10Hz + .END + """); + + AssertAllMeasurementsSuccessful(result); + RequireMeasurement(result, "Vout_op"); + RequireMeasurement(result, "gain_10hz_db"); + AssertMeasurementNear(result, "Vout_op", 4.6, 0.1); + AssertMeasurementBetween(result, "gain_10hz_db", 26.0, 27.0); + } + + // Prompt: Charge amplifier using an E-source op-amp with 100k gain, 10M\u03a9 feedback resistor, 1nF feedback capacitor, and 2nF piezo capacitance. + [Fact] + public void Charge_Amplifier_for_Piezoelectric_Sensor_0b6bf8bb11fdf8cf() + { + var result = RunAcceptedExample( + "deepseek:01503_e7ec67c7b028afd4:0b6bf8bb11fdf8cf", + """ + * Charge Amplifier for Piezoelectric Sensor + I_piezo 0 in AC 1 PULSE(0 1u 0 1n 1n 1m 2m) + C_piezo in 0 2n + C_fb out in 1n + R_fb out in 10MEG + R_load out 0 10k + E_opamp out 0 0 in 100k + .OP + .TRAN 0.1u 2m + .AC DEC 10 1 100k + .MEAS TRAN Vout_min MIN V(out) FROM=0 TO=2m + .MEAS AC gain_lf FIND VM(out) AT=1 + .MEAS AC gain_hf FIND VM(out) AT=100k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "Vout_min", (-1.0), 0.1); + AssertMeasurementBetween(result, "gain_lf", 9500000.0, 10500000.0); + AssertMeasurementBetween(result, "gain_hf", 1000.0, 2000.0); + } + + // Prompt: Full-wave center-tapped rectifier using two 12 V amplitude 50 Hz sinusoidal sources with 180\xb0 phase difference to model a center-tapped transformer. + [Fact] + public void Full_wave_center_tapped_rectifier_with_smoothing_capacitor_19b53e3eb6609042() + { + var result = RunAcceptedExample( + "deepseek:00701_8827dbc16fd572df:19b53e3eb6609042", + """ + * Full-wave center-tapped rectifier with smoothing capacitor + VIN1 pos1 0 SIN(0 12 50 0 0 180) + VIN2 pos2 0 SIN(0 12 50 0 0 0) + D1 pos1 out DMOD + D2 pos2 out DMOD + CLOAD out 0 470u + RLOAD out 0 1k + .MODEL DMOD D(IS=2e-14 N=1) + .TRAN 0.1m 2s + .MEAS TRAN Vout_avg AVG V(out) FROM=1.5s TO=2s + .MEAS TRAN Vripple_pp PP V(out) FROM=1.5s TO=2s + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "Vout_avg", 10.0, 12.0); + AssertMeasurementBetween(result, "Vripple_pp", 0.05, 0.3); + } + + // Prompt: Design a beta-insensitive BJT current source that uses an emitter follower to buffer the base drive. + [Fact] + public void Beta_Insensitive_BJT_Current_Source_with_Emitter_Follower_Buffer_b0c1b13da8e25052() + { + var result = RunAcceptedExample( + "deepseek:01087_c680220223ceed34:b0c1b13da8e25052", + """ + * Beta-Insensitive BJT Current Source with Emitter Follower Buffer + VCC vcc 0 DC 12 + R2 vcc b1 10k + R3 b1 0 10k + Q1 vcc b1 e1 NPN + R1 e2 0 1k + Q2 out e1 e2 NPN + Rload vcc out 500 + .MODEL NPN NPN(IS=1e-14 BF=150 VAF=100) + .OP + .DC VCC 10 14 0.1 + .MEAS DC Iout_at12 FIND I(R1) AT=12 + .MEAS DC Iload_at12 FIND I(Rload) AT=12 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "Iout_at12", 0.0046, 0.0005); + AssertMeasurementNear(result, "Iload_at12", 0.0046, 0.0005); + AssertMeasurementRatioBetween(result, "Iload_at12", "Iout_at12", 0.95, 1.05); + } + + // Prompt: RC low-pass filter with R=10k\u03a9 and C=1\xb5F + [Fact] + public void RC_delay_network_with_high_impedance_load_dfb919d8a915863e() + { + var result = RunAcceptedExample( + "deepseek:00034_cac0aeee53573db8:dfb919d8a915863e", + """ + * RC delay network with high-impedance load + R1 in out 10k + C1 out 0 1u + Rload out 0 100MEG + VIN in 0 PULSE(0 1 1m 1n 1n 100m 200m) + .TRAN 10u 50m + .MEASURE TRAN delay TRIG V(in) VAL=0.5 RISE=1 TARG V(out) VAL=0.5 RISE=1 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "delay", 0.006, 0.008); + } + + // Prompt: 6.2V Zener diode voltage regulator using a 1k series resistor and a 10k load resistor. + [Fact] + public void Zener_voltage_regulator_with_series_resistor_554a9404b9a6144e() + { + var result = RunAcceptedExample( + "deepseek:00133_083d5f2d8e7bab5c:554a9404b9a6144e", + """ + * Zener voltage regulator with series resistor + VIN in 0 DC 12 + RS in out 1k + D 0 out dz + RL out 0 10k + .MODEL dz D(IS=1n RS=1 BV=6.2 IBV=10m) + .OP + .DC VIN 0 20 0.1 + .MEAS DC Vout_12V FIND V(out) WHEN V(in)=12 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "Vout_12V", 6.2, 0.5); + } + + // Prompt: Design a full-wave center-tapped rectifier using two diodes and a smoothing capacitor. The input is 50 Hz AC with 12V peak per half, load is 100 ohms. Simulate the transient response and measure output voltage average and ripple peak-to-peak. + [Fact] + public void Full_wave_center_tapped_rectifier_with_smoothing_capacitor_abcc6ad92ac84e40() + { + var result = RunAcceptedExample( + "deepseek:00702_6b61f7f455adfefa:abcc6ad92ac84e40", + """ + * Full-wave center-tapped rectifier with smoothing capacitor + VIN1 top 0 SIN(0 12 50 0 0 0) + VIN2 0 bot SIN(0 -12 50 0 0 0) + D1 top out DNOM + D2 bot out DNOM + C1 out 0 2200u + RL out 0 100 + .MODEL DNOM D(IS=1e-9 RS=0.1 N=1.2) + .TRAN 0.1m 100m + .MEAS TRAN Vripple PP V(out) FROM=80m TO=100m + .MEAS TRAN Vout_avg AVG V(out) FROM=80m TO=100m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "Vripple", 0.3, 1.0); + AssertMeasurementBetween(result, "Vout_avg", 10.0, 12.0); + } + + // Prompt: DC sweep from 0 to 1 V to extract operating point at 1 V input + [Fact] + public void Op_amp_voltage_follower_using_behavioral_E_source_0d3f207935ee00f8() + { + var result = RunAcceptedExample( + "deepseek:01431_b76453fde29e0d75:0d3f207935ee00f8", + """ + * Op-amp voltage follower using behavioral E-source + V1 in 0 DC 1 AC 1 + E1 out 0 in out 100000 + Rload out 0 1k + .dc V1 0 1 1 + .ac dec 10 1 1MEG + .measure DC dc_out FIND V(out) AT=1 + .measure AC ac_gain_db MAX DB(V(out)) + .end + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "dc_out", 1.0, 0.001); + AssertMeasurementNear(result, "ac_gain_db", 0.0, 0.1); + } + + // Prompt: Second-order multiple-feedback high-pass filter with Butterworth response. + [Fact] + public void Multiple_Feedback_High_Pass_Filter_Second_Order_Butterworth_1e939fa43c4ce416() + { + var result = RunAcceptedExample( + "deepseek:01672_0afaffdd9f961fd1:1e939fa43c4ce416", + """ + * Multiple-Feedback High-Pass Filter, Second-Order Butterworth + VIN in 0 DC 0 AC 1 + C1 in a 10n + R1 a 0 910 + C2 a b 2.2n + R2 b out 10k + C3 a out 10n + E1 out 0 0 b 100k + .AC DEC 100 10 1MEG + .MEASURE AC passband_gain FIND VDB(out) AT=100k + .MEASURE AC fc WHEN VDB(out)=-3 RISE=1 + .MEASURE AC low_gain FIND VDB(out) AT=100 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "passband_gain", 0.0, 0.5); + AssertMeasurementBetween(result, "fc", 10000.0, 12500.0); + AssertMeasurementLess(result, "low_gain", (-30.0)); + } + + // Prompt: BJT Gilbert gain cell as variable transconductance amplifier. + [Fact] + public void Gilbert_Gain_Cell_as_Variable_Transconductance_Amplifier_1b75b4e46ce13bf1() + { + var result = RunAcceptedExample( + "deepseek:02289_23c2dbc4f573a070:1b75b4e46ce13bf1", + """ + * Gilbert Gain Cell as Variable Transconductance Amplifier + VCC vcc 0 DC 10 + VCM in+ 0 DC 2.5 + VIN in+ in- DC 0 SIN(0 10m 1k) + VCTRL ctrl 0 DC 0.8 + VREF ref 0 DC 1.0 + R1 vcc out+ 1k + R2 vcc out- 1k + I_TAIL n0 0 DC 2m + Q1 out+ in+ n1 0 NPN + Q2 out- in- n1 0 NPN + Q3 out- in+ n2 0 NPN + Q4 out+ in- n2 0 NPN + Q5 n1 ctrl n0 0 NPN + Q6 n2 ref n0 0 NPN + .MODEL NPN NPN(IS=1e-15 BF=100 VAF=50) + .OP + .TRAN 0.01m 5m + .MEAS TRAN vout_max MAX V(out+,out-) FROM=0 TO=5m + .MEAS TRAN vout_min MIN V(out+,out-) FROM=0 TO=5m + .MEAS TRAN vout_pp PARAM='vout_max - vout_min' + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "vout_pp", 0.7, 0.85); + } + + // Prompt: Widlar BJT current source with emitter degeneration + [Fact] + public void Widlar_BJT_current_source_875d2f99a64ba55a() + { + var result = RunAcceptedExample( + "deepseek:01009_086d83f6d347b3c2:875d2f99a64ba55a", + """ + * Widlar BJT current source + VCC vcc 0 DC 15 + VOUT out 0 DC 7.5 + VM out col 0V + RREF vcc n1 10k + RE e2 0 470 + Q1 n1 n1 0 NPN + Q2 col n1 e2 NPN + .MODEL NPN NPN(IS=1e-14 BF=150 VAF=100) + .OP + .DC VOUT 0 15 0.1 + .MEAS DC IREF FIND I(RREF) WHEN V(out)=7.5 + .MEAS DC IOUT FIND I(VM) WHEN V(out)=7.5 + .MEAS DC I1 FIND I(VM) WHEN V(out)=7.4 + .MEAS DC I2 FIND I(VM) WHEN V(out)=7.6 + .MEAS DC ROUT PARAM='(7.6-7.4)/(I2-I1)' + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "IREF", 0.0013, 0.0015); + AssertMeasurementBetween(result, "IOUT", 0.00012, 0.00015); + AssertMeasurementGreater(result, "ROUT", 1000000.0); + } + + // Prompt: Second-order Sallen-Key high-pass filter with Butterworth response. + [Fact] + public void Sallen_Key_2nd_Order_High_Pass_Butterworth_Filter_6b779c036a233c45() + { + var result = RunAcceptedExample( + "deepseek:00361_8a4e369064b2bcfb:6b779c036a233c45", + """ + * Sallen-Key 2nd-Order High-Pass Butterworth Filter + .OP + .AC DEC 100 10 100k + .PRINT AC VDB(out) VP(out) + .MEASURE AC maxgain MAX VDB(out) + .MEASURE AC f3dB WHEN VDB(out)=1.03 RISE=1 + .MEASURE AC gain_10k FIND VDB(out) AT=10k + .MEASURE AC gain_100k FIND VDB(out) AT=100k + C1 in Vx 10n + C2 Vx nin 10n + R1 Vx out 15.9k + R2 nin 0 15.9k + Rf out inv 5.86k + Rg inv 0 10k + VIN in 0 DC 0 AC 1 + E1 out 0 nin inv 100000 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "f3dB", 800.0, 1200.0); + AssertMeasurementBetween(result, "maxgain", 3.5, 4.5); + AssertMeasurementBetween(result, "gain_10k", 3.5, 4.5); + AssertMeasurementBetween(result, "gain_100k", 3.5, 4.5); + } + + // Prompt: Design a BJT-based phase-shift oscillator with a 12V supply and oscillating around 1 kHz. Use a generic NPN transistor model and include required passive components. Provide a transient simulation showing the oscillation. + [Fact] + public void BJT_Phase_Shift_Oscillator_e30fe37fafc54aba() + { + var result = RunAcceptedExample( + "deepseek:01123_312479989d7d4ba2:e30fe37fafc54aba", + """ + * BJT Phase-Shift Oscillator + VCC vcc 0 DC 12 + Rc vcc col 6.2k + Re emit 0 1.5k + Ce emit 0 100uF + R1 vcc base 100k + R2 base 0 22k + Q1 col base emit QN + C1 col n1 6.8nF + Rph1 n1 0 10k + C2 n1 n2 6.8nF + Rph2 n2 0 10k + C3 n2 base 6.8nF + Rph3 base 0 10k + .MODEL QN NPN(IS=1e-14 BF=100 VAF=50) + .IC V(base)=1m + .TRAN 1u 10m UIC + .MEAS TRAN period TRIG V(col) VAL=6 RISE=2 TARG V(col) VAL=6 RISE=3 + .MEAS TRAN freq PARAM 1/period + .MEAS TRAN vmax MAX V(col) FROM=2m TO=10m + .MEAS TRAN vmin MIN V(col) FROM=2m TO=10m + .MEAS TRAN vpp PARAM vmax-vmin + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "freq", 800.0, 1200.0); + AssertMeasurementGreater(result, "vpp", 2.0); + } + + // Prompt: Two-stage Greinacher voltage quadrupler with four diodes and four 100uF capacitors. + [Fact] + public void Greinacher_Voltage_Quadrupler_c74833de3118f7fc() + { + var result = RunAcceptedExample( + "deepseek:00866_b8471fd9dbb79723:c74833de3118f7fc", + """ + * Greinacher Voltage Quadrupler + VIN in 0 SIN(0 10 50) + D1 0 a dmod + C1 in a 100u + D2 a b dmod + C2 b 0 100u + D3 b c dmod + C3 in c 100u + D4 c out dmod + C4 out 0 100u + RLOAD out 0 100k + .model dmod D(IS=1e-9 RS=0.1) + .tran 0.1 100 0 1m + .meas TRAN vout_avg AVG V(out) FROM=90 TO=100 + .meas TRAN vout_ripple PP V(out) FROM=90 TO=100 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "vout_avg", 38.0, 42.0); + AssertMeasurementLess(result, "vout_ripple", 0.5); + } + + // Prompt: Create a SPICE netlist for a JFET common-source amplifier with self-bias. Use a 12V supply, N-channel JFET model, and measure the gain at low, mid, and high frequencies. + [Fact] + public void JFET_Common_Source_Amplifier_58b79ae4295f10e5() + { + var result = RunAcceptedExample( + "deepseek:00283_6fe740a42b75bc70:58b79ae4295f10e5", + """ + * JFET Common-Source Amplifier + VDD VDD 0 DC 12 + VIN in 0 DC 0 AC 1 + Rg gate 0 1MEG + C1 in gate 10n + C2 drain out 10n + RL out 0 100k + Rd VDD drain 5k + Rs source 0 1k + Cs source 0 100u + J1 drain gate source NJF + .MODEL NJF NJF(VTO=-2 BETA=1e-3 LAMBDA=0.02) + .OP + .AC DEC 100 10 1MEG + .MEAS AC mid_gain FIND VDB(out) AT=10k + .MEAS AC low_gain FIND VDB(out) AT=10 + .MEAS AC high_gain FIND VDB(out) AT=1MEG + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "mid_gain", 15.0, 25.0); + AssertMeasurementGreater(result, "mid_gain", 0.0); + AssertMeasurementLess(result, "low_gain", 0.0); + AssertMeasurementBetween(result, "high_gain", 15.0, 25.0); + } + + // Prompt: Triangle-wave generator built from an integrator and a Schmitt trigger. + [Fact] + public void Triangle_wave_oscillator_using_integrator_and_Schmitt_trigger_765928324892f673() + { + var result = RunAcceptedExample( + "deepseek:00398_739944c002f4855d:765928324892f673", + """ + * Triangle-wave oscillator using integrator and Schmitt trigger + .OPTIONS ITL1=500 ITL4=100 RELTOL=1e-6 + VCC Vcc 0 DC 15 + VEE Vee 0 DC -15 + + * Non-inverting Schmitt trigger + Rin out_int noninv 10k + Rf out_sch noninv 20k + E_sch out_sch 0 TABLE { V(noninv) } = (-15,-15) (-0.001,-15) (0.001,15) (15,15) + + * Inverting integrator with high-gain op-amp + Rint out_sch inv_int 10k + Cint inv_int out_int 0.1u + E_int out_int 0 0 inv_int 1e6 + + * Initial condition to start oscillation + .IC V(out_int)=0.1 + + * Transient analysis with UIC and tight max step + .TRAN 0.1u 30m 0 1u UIC + + * Measurements: period via two when statements + .MEAS TRAN t1 WHEN V(out_sch)=0 RISE=1 TD=10m + .MEAS TRAN t2 WHEN V(out_sch)=0 RISE=2 TD=10m + .MEAS TRAN period PARAM t2-t1 + + * Triangle amplitude (peak-to-peak) after startup + .MEAS TRAN v_tri_pp PP V(out_int) FROM=10m TO=30m + + .END + """); + + AssertAllMeasurementsSuccessful(result); + var period = MeasurementValue(result, "period"); + Assert.True((!Equals(period, null)), CaseLabel(result)); + var freq = (1.0 / period); + Assert.True(((480.0 <= freq) && (freq <= 520.0)), CaseLabel(result)); + AssertMeasurementBetween(result, "v_tri_pp", 14.0, 16.0); + } + + // Prompt: Comparators are modeled with an ideal switch: when ramp > VIN, the switch closes, pulling the comparator output low. + [Fact] + public void Single_slope_ADC_ramp_and_comparator_front_end_78bd3bbf539407a8() + { + var result = RunAcceptedExample( + "deepseek:02214_99bc35ebcd966ec9:78bd3bbf539407a8", + """ + * Single-slope ADC ramp and comparator front end + VIN in 0 DC 1.5 + VRAMP ramp 0 PULSE(0 5 0 99u 0 1u 200u) + VDD vdd 0 5 + E1 ramp_buf 0 ramp 0 1 + C1 ramp_buf 0 1pF + R1 vdd comp 10k + S1 comp 0 ramp_buf in swmod + .MODEL swmod SW(RON=10 ROFF=100MEG VT=0 VH=0) + .TRAN 0.1u 50u + .MEAS TRAN t_trigger WHEN V(comp)=2.5 FALL=1 + .MEAS TRAN v_ramp_at_trigger FIND V(ramp_buf) WHEN V(comp)=2.5 FALL=1 + .MEAS TRAN error PARAM='abs(v_ramp_at_trigger - 1.5)' + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementLess(result, "error", 0.1); + AssertMeasurementBetween(result, "t_trigger", 2.5e-05, 3.5e-05); + AssertMeasurementBetween(result, "v_ramp_at_trigger", 1.4, 1.6); + } + + // Prompt: Design a current limiter using two BJTs that caps the output current at around 70mA. + [Fact] + public void Two_transistor_BJT_current_limiter_with_sense_resistor_a89deff576aa1393() + { + var result = RunAcceptedExample( + "deepseek:01042_0f29ae047c84dd75:a89deff576aa1393", + """ + * Two-transistor BJT current limiter with sense resistor + VCC vcc 0 DC 12 + RLOAD vcc collector 100 + RB vcc base 10k + RSENSE emitter 0 10 + Q1 collector base emitter npn_mod + Q2 base emitter 0 npn_mod + .MODEL npn_mod NPN(IS=1e-14 BF=100 VAF=100) + .OP + .DC VCC 0 12 0.1 + .MEAS DC I_LIM FIND I(RLOAD) AT=12 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "I_LIM", 0.06, 0.08); + } + + // Prompt: First-order sigma-delta modulator with ideal op-amp integrator and smooth comparator. + [Fact] + public void First_Order_Sigma_Delta_Modulator_55bad168afb9cebe() + { + var result = RunAcceptedExample( + "deepseek:02225_bcd0ef77cae3dfa4:55bad168afb9cebe", + """ + * First-Order Sigma-Delta Modulator + VIN in 0 PULSE(-0.5 0.5 1m 1u 1u 2m 4m) + E_INPUT inv_in 0 in 0 -1 + R1 inv_in vminus 10k + R2 comp_out vminus 10k + C1 int_out vminus 10n IC=0 + B_INT int_out 0 V=-10*tanh(1e4*V(vminus)) + B_COMP comp_out 0 V=5*tanh(1e3*V(int_out)) + Rload comp_out 0 1k + .TRAN 0.1u 5m 0 0.1u UIC + .IC V(int_out)=0.1 + .MEASURE TRAN avg_high AVG V(comp_out) FROM=2m TO=2.9m + .MEASURE TRAN avg_low AVG V(comp_out) FROM=4m TO=4.9m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "avg_high", 0.5, 0.05); + AssertMeasurementNear(result, "avg_low", (-0.5), 0.05); + } + + // Prompt: Series RC Zobel network from output to ground stabilizes the amplifier load. + [Fact] + public void Zobel_Network_for_Load_Stabilization_AC_Analysis_517ca38892fb7fae() + { + var result = RunAcceptedExample( + "deepseek:00489_b4238d823ea66b5b:517ca38892fb7fae", + """ + * Zobel Network for Load Stabilization - AC Analysis + V1 in 0 AC 1 + Rs in out 10 + Rload out 0 100 + Rz out n_z 10 + Cz n_z 0 10n + .ac dec 10 1 100MEG + .meas ac vout_low find v(out) at=1 + .meas ac f_3db when v(out)=0.6428 fall=1 + .end + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "vout_low", 0.909, 0.02); + AssertMeasurementBetween(result, "f_3db", 100000.0, 10000000.0); + } + + // Prompt: RC snubber circuit placed across a voltage-controlled switch to suppress inductive voltage spikes. + [Fact] + public void RC_Snubber_Across_Switching_Load_a8fb5d9c75a326c1() + { + var result = RunAcceptedExample( + "deepseek:00482_2b19779314e99e5c:a8fb5d9c75a326c1", + """ + * RC Snubber Across Switching Load + .OPTIONS POST + .MODEL swmod SW(RON=0.001 ROFF=1Meg VT=2 VH=0.5) + Vcc PWR 0 DC 12 + Vctrl ctrl 0 PULSE(0 5 10u 10n 10n 50u 100u) + S1 PWR sw_out ctrl 0 swmod + Lload sw_out load 100u + Rload load 0 10 + Cpar sw_out 0 100p + Rsnub sw_out snub 10 + Csnub snub 0 1000n + .TRAN 0.1u 200u + .MEAS TRAN Vmax MAX V(sw_out) FROM=55u TO=65u + .MEAS TRAN Vmin MIN V(sw_out) FROM=55u TO=65u + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementLess(result, "Vmax", 18.0); + AssertMeasurementGreater(result, "Vmin", (-5.0)); + } + + // Prompt: CMOS inverter with NMOS and PMOS transistors driving a 10pF capacitive load. + [Fact] + public void CMOS_Inverter_with_Capacitive_Load_and_Rise_Fall_Measurement_e2f567b7b7794eb4() + { + var result = RunAcceptedExample( + "deepseek:01356_7cb94a9dc232578e:e2f567b7b7794eb4", + """ + * CMOS Inverter with Capacitive Load and Rise/Fall Measurement + VDD vdd 0 DC 5 + VIN in 0 PULSE(0 5 10n 0.1n 0.1n 100n 200n) + M1 out in 0 0 NMOD W=2u L=1u + M2 out in vdd vdd PMOD W=4u L=1u + CL out 0 10p + .MODEL NMOD NMOS (VTO=1 KP=100u LAMBDA=0.02) + .MODEL PMOD PMOS (VTO=-1 KP=50u LAMBDA=0.02) + .TRAN 0.1n 200n + .MEASURE TRAN t_fall TRIG V(out) VAL=4.5 FALL=1 TARG V(out) VAL=0.5 FALL=1 + .MEASURE TRAN t_rise TRIG V(out) VAL=0.5 RISE=1 TARG V(out) VAL=4.5 RISE=1 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementLess(result, "t_rise", 1e-07); + AssertMeasurementLess(result, "t_fall", 1e-07); + } + + // Prompt: Common-collector emitter follower NPN buffer with voltage divider bias (R1=7.5k, R2=10k, RE=1k), transistor modeled with BF=100. + [Fact] + public void Common_collector_emitter_follower_NPN_buffer_d6dc859cd53a8559() + { + var result = RunAcceptedExample( + "deepseek:00179_cda039a73f2dc132:d6dc859cd53a8559", + """ + * Common-collector emitter follower NPN buffer + VCC vcc 0 DC 10 + VIN in 0 DC 0 AC 1 + C1 in base 10u + R1 vcc base 7.5k + R2 base 0 10k + Q1 vcc base out NPN_MOD + RE out 0 1k + .MODEL NPN_MOD NPN(IS=1e-15 BF=100 VAF=100) + .OP + .AC DEC 10 10 1MEG + .MEAS AC gain_100 FIND V(out) AT=100 + .MEAS AC gain_1k FIND V(out) AT=1k + .MEAS AC gain_max MAX V(out) + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "gain_100", 0.95, 1.0); + AssertMeasurementBetween(result, "gain_1k", 0.95, 1.0); + AssertMeasurementBetween(result, "gain_max", 0.95, 1.0); + } + + // Prompt: Instrumentation amplifier built from three behavioral op-amp models (E-sources). + [Fact] + public void Instrumentation_Amplifier_with_Three_E_source_Op_Amps_7996d48186a9a191() + { + var result = RunAcceptedExample( + "deepseek:00400_3e585a59f481029b:7996d48186a9a191", + """ + * Instrumentation Amplifier with Three E-source Op-Amps + VCC 10 0 DC 10 + VEE 20 0 DC -10 + Vdiff in+ in- DC 0 AC 1 + R5 in+ 0 100k + R6 in- 0 100k + E_U1 out1 0 in+ in1 100k + E_U2 out2 0 in- in2 100k + Rg in1 in2 1k + Rf1 out1 in1 10k + Rf2 out2 in2 10k + E_U3 out 0 nn np 100k + R1 out2 nn 10k + R2 nn out 10k + R3 out1 np 10k + R4 np 0 10k + C1 nn out 100n + Rload out 0 10k + .OP + .AC DEC 100 1 100k + .MEAS AC gain_1Hz FIND VM(out) AT=1 + .MEAS AC gain_159 FIND VM(out) AT=159 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "gain_1Hz", 20.0, 22.0); + AssertMeasurementBetween(result, "gain_159", 13.5, 16.0); + } + + // Prompt: Bridge diode polarity protector using four diodes in a full-wave bridge configuration. + [Fact] + public void Bridge_Diode_Polarity_Protector_b7978755f0d86f88() + { + var result = RunAcceptedExample( + "deepseek:00790_38fb077b95cf3f76:b7978755f0d86f88", + """ + Bridge Diode Polarity Protector + D1 A out dmod + D2 B out dmod + D3 0 A dmod + D4 0 B dmod + Rload out 0 1k + VIN A B DC -12 PULSE(-12 12 0 1u 1u 1m 2m) + Rgnd1 A 0 1e9 + Rgnd2 B 0 1e9 + .MODEL dmod D(IS=1e-12 RS=1) + .TRAN 1u 2m + .MEAS TRAN vout_neg FIND V(out) AT=1.5m + .MEAS TRAN vout_pos FIND V(out) AT=0.5m + .MEAS TRAN i_d1 FIND I(D1) AT=0.5m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "vout_neg", 10.0, 11.5); + AssertMeasurementBetween(result, "vout_pos", 10.0, 11.5); + AssertMeasurementGreater(result, "i_d1", 0.001); + } + + // Prompt: Logarithmic amplifier using an ideal op\u2011amp (E source with gain 100 000) and a diode in the feedback path. + [Fact] + public void Diode_log_converter_with_op_amp_feedback_3a75b442f07d32a1() + { + var result = RunAcceptedExample( + "deepseek:00825_9d6ee28b6ef4c8aa:3a75b442f07d32a1", + """ + * Diode log converter with op-amp feedback + Vin in 0 DC 1 + R1 in inv 1k + D1 inv out D1mod + E1 out 0 0 inv 100000 + .model D1mod D(IS=1e-12 RS=0) + .OP + .DC Vin 0.1 10 0.1 + .MEAS DC VOUT_AT_1V FIND V(out) WHEN V(in)=1V + .MEAS DC VOUT_AT_10V FIND V(out) WHEN V(in)=10V + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "VOUT_AT_1V", (-0.6), (-0.4)); + AssertMeasurementBetween(result, "VOUT_AT_10V", (-0.65), (-0.55)); + } + + // Prompt: Op-amp differentiator with a series 1 k\u03a9 resistor at the input to limit high-frequency gain. + [Fact] + public void Op_Amp_Differentiator_with_Input_Limit_Resistor_d7606062d7b55a75() + { + var result = RunAcceptedExample( + "deepseek:00346_3ab2cebab373a948:d7606062d7b55a75", + """ + * Op-Amp Differentiator with Input Limit Resistor + VIN in 0 AC 1 + C1 in n1 1uF + R1 n1 inv 1k + Rf out_opamp inv 10k + E1 out_opamp 0 0 inv 100000 + E2 out 0 out_opamp 0 -1 + Rload out 0 100k + .AC DEC 10 10 1000 + .MEAS AC gain_db FIND VDB(out) AT=50 + .MEAS AC phase FIND VP(out) AT=50 + .MEAS AC mag_50 FIND VM(out) AT=50 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "gain_db", 8.0, 11.0); + AssertMeasurementBetween(result, "phase", 1.13, 1.4); + AssertMeasurementBetween(result, "mag_50", 2.5, 3.5); + } + + // Prompt: Photodiode D1 is reverse\u2011biased (anode at virtual ground node pd, cathode at 5 V bias). + [Fact] + public void Reverse_Biased_Photodiode_Transimpedance_Amplifier_749bd49139808a2c() + { + var result = RunAcceptedExample( + "deepseek:02132_bb0bb2d36f5e52bc:749bd49139808a2c", + """ + * Reverse-Biased Photodiode Transimpedance Amplifier + Vbias bias 0 DC 5V + D1 pd bias photodiode + Iph bias pd PULSE(0 10u 100u 10u 10u 200u 500u) + Rf out pd 10k + Cf out pd 1p + Eop out 0 0 pd 1e5 + .MODEL photodiode D(IS=1e-12 N=1.2 RS=10 CJO=10p) + .OP + .TRAN 0.1u 500u + .MEAS TRAN vout_dark FIND V(out) AT=50u + .MEAS TRAN vout_lit FIND V(out) AT=300u + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "vout_lit", (-0.1), 0.01); + AssertMeasurementNear(result, "vout_dark", 0.0, 0.001); + } + + // Prompt: Common-gate low-noise amplifier using NMOS with W=100u, L=1u. + [Fact] + public void MOSFET_Common_Gate_Low_Noise_Amplifier_42ecea4e02fb464b() + { + var result = RunAcceptedExample( + "deepseek:02418_5962e5c92701d8dd:42ecea4e02fb464b", + """ + * MOSFET Common-Gate Low-Noise Amplifier + VDD vdd 0 DC 3 + VIN in 0 AC 1 + I1 source 0 DC 1m + Rg1 vdd gate 5.6k + Rg2 gate 0 4.7k + Cg gate 0 1n + M1 out gate source source nmos W=100u L=1u + Rd vdd out 1.6k + C1 in source 1u + Cl out 0 1p + .MODEL nmos NMOS(VTO=0.5 KP=200u LAMBDA=0.02 GAMMA=0) + .OP + .AC DEC 10 10k 10G + .MEAS AC gain_at_10M FIND VDB(out) AT=10MEG + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementGreater(result, "gain_at_10M", 15.0); + } + + // Prompt: 1kHz, \xb110V square wave input through 1k\u03a9 resistor + [Fact] + public void Negative_Diode_Clamp_to_5V_c45bb7b890d922a4() + { + var result = RunAcceptedExample( + "deepseek:00746_ccbce8f13609dada:c45bb7b890d922a4", + """ + * Negative Diode Clamp to -5V + VIN in 0 PULSE(-10 10 0 1n 1n 0.5m 1m) + R1 in out 1k + D1 clamp_neg out DMOD + VCLAMP clamp_neg 0 DC -4.3 + .MODEL DMOD D(IS=1e-13 RS=1) + .TRAN 0.01m 4m + .MEAS TRAN vmin_out MIN V(out) FROM=0.5m TO=3.5m + .MEAS TRAN vmax_out MAX V(out) FROM=0.5m TO=3.5m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "vmin_out", (-5.2), (-4.8)); + AssertMeasurementBetween(result, "vmax_out", 9.5, 10.5); + } + + // Prompt: Balanced diode ring mixer with LO at 100MHz (0.5V amplitude each source, giving 1V differential) and RF at 10MHz (0.05V each, 0.1V differential). + [Fact] + public void Balanced_Diode_Ring_Mixer_e6f2c81f161f02c9() + { + var result = RunAcceptedExample( + "deepseek:00805_75707730af03f6f1:e6f2c81f161f02c9", + """ + * Balanced Diode Ring Mixer + VLO1 lo_pos 0 SIN(0 0.5 100MEG 0 0 0) + VLO2 0 lo_neg SIN(0 0.5 100MEG 0 0 0) + VRF1 rf_pos if SIN(0 0.05 10MEG 0 0 0) + VRF2 if rf_neg SIN(0 0.05 10MEG 0 0 0) + D1 lo_pos rf_pos dmix + D2 rf_pos lo_neg dmix + D3 lo_neg rf_neg dmix + D4 rf_neg lo_pos dmix + RIF if 0 50 + .MODEL dmix D(IS=1e-9 N=1 RS=10) + .TRAN 0.1n 500n + .MEASURE TRAN IF_dc AVG V(if) FROM=200n TO=500n + .MEASURE TRAN IF_vpp PP V(if) FROM=200n TO=500n + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "IF_vpp", 0.05, 0.15); + AssertMeasurementNear(result, "IF_dc", 0.0, 0.001); + } + + // Prompt: Difference amplifier using an ideal op-amp (E source) with gain 100k and four 10k resistors. + [Fact] + public void Op_amp_subtractor_with_matched_10k_resistors_9a19967c7a42b292() + { + var result = RunAcceptedExample( + "deepseek:01471_84de30d26fa32d94:9a19967c7a42b292", + """ + * Op-amp subtractor with matched 10k resistors + V1 in1 0 DC 2 + V2 in2 0 DC 3 AC 1 + R1 in1 ninv 10K + R2 ninv out 10K + R3 in2 nplus 10K + R4 nplus 0 10K + E1 out 0 nplus ninv 100k + .OP + .AC DEC 10 1 10K + .MEAS OP vout_dc FIND v(out) AT=0 + .MEAS AC gain_at_1k FIND VDB(out) AT=1k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "vout_dc", 1.0, 0.001); + AssertMeasurementNear(result, "gain_at_1k", 0.0, 0.5); + } + + // Prompt: The input is a 100kHz carrier with 20% amplitude modulation at 1kHz, offset by 0.2V to ensure diode conduction. + [Fact] + public void Envelope_Detector_for_AM_Demodulation_f0df661bab302053() + { + var result = RunAcceptedExample( + "deepseek:00158_7147681a6adf246f:f0df661bab302053", + """ + * Envelope Detector for AM Demodulation + B1 in 0 V= sin(2*3.14159265*100000*time)*(1+0.2*sin(2*3.14159265*1000*time)) + 0.2 + D1 in out DMOD + .MODEL DMOD D(Is=1e-9 Rs=1) + R1 out 0 50k + C1 out 0 10n + .TRAN 0.1u 2m + .MEAS TRAN VMAX MAX V(out) FROM=0 TO=2m + .MEAS TRAN VMIN MIN V(out) FROM=1m TO=2m + .MEAS TRAN VAVG AVG V(out) FROM=0.5m TO=2m + .MEAS TRAN VP2P PARAM VMAX-VMIN + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "VMAX", 0.6, 1.2); + AssertMeasurementBetween(result, "VMIN", 0.2, 0.6); + AssertMeasurementBetween(result, "VAVG", 0.4, 0.8); + AssertMeasurementBetween(result, "VP2P", 0.2, 0.8); + } + + // Prompt: Design a Tow-Thomas biquad band-stop filter with a notch at 1 kHz and Q=10. + [Fact] + public void Tow_Thomas_biquad_band_stop_filter_9b7b06d950509ffa() + { + var result = RunAcceptedExample( + "deepseek:02467_3d0cf386fc8a72aa:9b7b06d950509ffa", + """ + * Tow-Thomas biquad band-stop filter + VIN in 0 DC 0 AC 1 + * Op-amp E3: inverting summer + R4 in n3 159K + R5 LP n3 15.9K + Rf sum_out n3 15.9K + E3 sum_out 0 0 n3 100K + * Op-amp E1: lossy integrator (BP output) + R1 sum_out n1 15.9K + C1 BP n1 10E-9 + RQ BP n1 159K + E1 BP 0 0 n1 100K + * Op-amp E2: integrator (LP output) + R2 BP n2 15.9K + C2 LP n2 10E-9 + E2 LP 0 0 n2 100K + * Op-amp E4: difference amplifier (subtractor) to produce notch + R6 in n4 10K + R7 n4 0 10K + R8 BP n5 10K + R9 n5 out 10K + E4 out 0 n4 n5 100K + * Analysis + .AC DEC 100 10 100K + .MEAS AC notch_min MIN VDB(out) + .MEAS AC f_lower WHEN VDB(out) = -3 CROSS=1 + .MEAS AC f_upper WHEN VDB(out) = -3 CROSS=2 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "notch_min", (-100.0), (-30.0)); + AssertMeasurementBetween(result, "f_lower", 900.0, 1000.0); + AssertMeasurementBetween(result, "f_upper", 1000.0, 1100.0); + } + + // Prompt: Three-stage CMOS current-starved ring oscillator with tail NMOS transistors controlled by VCTRL to vary oscillation frequency. + [Fact] + public void CMOS_Current_Starved_Ring_Oscillator_VCO_2b5dad213afc04ac() + { + var result = RunAcceptedExample( + "deepseek:01380_ad9322af41996b97:2b5dad213afc04ac", + """ + * CMOS Current-Starved Ring Oscillator (VCO) + VDD vdd 0 DC 5 + VCTRL vctrl 0 DC 2 + R1 vctrl 0 1G + MP1 out1 out3 vdd vdd P W=10u L=2u + MN1 out1 out3 t1 0 N W=10u L=2u + Mtail1 t1 vctrl 0 0 N W=10u L=2u + MP2 out2 out1 vdd vdd P W=10u L=2u + MN2 out2 out1 t2 0 N W=10u L=2u + Mtail2 t2 vctrl 0 0 N W=10u L=2u + MP3 out3 out2 vdd vdd P W=10u L=2u + MN3 out3 out2 t3 0 N W=10u L=2u + Mtail3 t3 vctrl 0 0 N W=10u L=2u + C1 out1 0 1.5p + C2 out2 0 1.5p + C3 out3 0 1.5p + .MODEL N NMOS (LEVEL=1 VTO=1 KP=100u LAMBDA=0.02) + .MODEL P PMOS (LEVEL=1 VTO=-1 KP=50u LAMBDA=0.02) + .IC V(out1)=0 V(out2)=5 V(out3)=0 + .TRAN 1n 200n UIC + .MEAS TRAN period TRIG V(out1) VAL=2.5 RISE=2 TARG V(out1) VAL=2.5 RISE=3 + .MEAS TRAN freq PARAM 1/period + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "period", 5e-08, 1e-07); + AssertMeasurementBetween(result, "freq", 10000000.0, 20000000.0); + } + + // Prompt: Difference amplifier with op-amp modeled as VCVS (gain 100k) and four resistors to achieve nominal gain of 10. + [Fact] + public void Op_Amp_Subtractor_68e9fc81bfcf67c2() + { + var result = RunAcceptedExample( + "deepseek:01466_f30dfab147dd0c9c:68e9fc81bfcf67c2", + """ + * Op-Amp Subtractor + VIN1 in1 0 DC 0.2 AC 1 + VIN2 in2 0 DC 0.3 AC 0 + R1 in1 in- 1k + R2 in2 pos 1k + R3 in- out 10k + R4 pos 0 10k + E1 out 0 pos in- 100000 + .OP + .AC DEC 10 1 100k + .MEAS OP VOUT_DC FIND V(out) AT=0 + .MEAS AC VOUT_MAG FIND VM(out) AT=1k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "VOUT_DC", 1.0, 0.01); + AssertMeasurementNear(result, "VOUT_MAG", 10.0, 0.1); + } + + // Prompt: Charge amplifier for capacitive sensor with ideal op-amp (E-source gain=100k). + [Fact] + public void Capacitive_sensor_interface_with_charge_amplifier_cb2b70ad3d00ea17() + { + var result = RunAcceptedExample( + "deepseek:02449_96d638f2349482e2:cb2b70ad3d00ea17", + """ + * Capacitive sensor interface with charge amplifier + VIN in 0 PULSE(0 0.1 10u 1n 1n 50u 100u) + CS in inv 10p + CF out inv 1p + RF out inv 1MEG + E1 out 0 0 inv 100000 + .TRAN 1n 100u + .MEAS TRAN vout_min MIN V(out) FROM=0 TO=100u + .MEAS TRAN vout_expected PARAM -0.1*(10p/1p) + .END + """); + + AssertAllMeasurementsSuccessful(result); + var vout_expected = MeasurementValue(result, "vout_expected"); + AssertMeasurementNear(result, "vout_min", vout_expected, 0.05); + } + + // Prompt: Design a low-side current-sense amplifier front end with a non-inverting op-amp to measure load current through a 0.1 ohm sense resistor and provide a 50x gain. + [Fact] + public void Low_side_current_sense_amplifier_5005fc894dda1682() + { + var result = RunAcceptedExample( + "deepseek:02028_4b2226037e5ac783:5005fc894dda1682", + """ + * Low-side current-sense amplifier + Vsupply vsupply 0 DC 12 + Rload vsupply load 11.9 + Rsense load 0 0.1 + E1 out 0 load n002 100k + R1 n002 0 1k + R2 out n002 49k + .OP + .DC Vsupply 0 12 0.01 + .MEAS DC Vout_1A FIND V(out) WHEN V(vsupply)=12 + .MEAS DC Vsense_1A FIND V(load) WHEN V(vsupply)=12 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "Vout_1A", 5.0, 0.1); + AssertMeasurementNear(result, "Vsense_1A", 0.1, 0.005); + AssertMeasurementRatioBetween(result, "Vout_1A", "Vsense_1A", 49.5, 50.5); + } + + // Prompt: The circuit is a BJT Gilbert cell with stepped tail current to demonstrate variable-gain operation. + [Fact] + public void Gilbert_Cell_Variable_Gain_Amplifier_a64b45af9cb54619() + { + var result = RunAcceptedExample( + "deepseek:02291_906407f6616c312b:a64b45af9cb54619", + """ + * Gilbert Cell Variable-Gain Amplifier + .MODEL NPN NPN(BF=100 IS=1e-14 VAF=50) + .PARAM IT=1m + .STEP PARAM IT LIST 0.5m 1m + VCC VCC 0 DC 10 + VEE 0 VEE DC 10 + VIN inp inn SIN(0 0.1 1k) + Vctrl p n DC 0.1 + I1 e VEE DC {IT} + R1 VCC outp 1k + R2 VCC outn 1k + Q1 c1 inp e NPN + Q2 c2 inn e NPN + Q3 outp p c1 NPN + Q4 outn n c1 NPN + Q5 outn n c2 NPN + Q6 outp p c2 NPN + .OP + .TRAN 1u 2ms + .MEAS TRAN Vout_pp PP V(outp,outn) FROM=0 TO=2ms + .END + """); + + AssertAllMeasurementsSuccessful(result); + var vpp1 = MeasurementValue(result, "Vout_pp", index: 0); + var vpp2 = MeasurementValue(result, "Vout_pp", index: 1); + Assert.True(((vpp2 > vpp1)), CaseLabel(result)); + } + + // Prompt: Design a BJT phase splitter with equal 10k collector and emitter resistors + [Fact] + public void BJT_Phase_Splitter_with_split_collector_and_emitter_loads_92a1201e89c735c5() + { + var result = RunAcceptedExample( + "deepseek:00973_4fdc2dcd91f8782f:92a1201e89c735c5", + """ + * BJT Phase Splitter with split collector and emitter loads + VCC vcc 0 DC 12 + VIN in 0 DC 0 AC 1 + R1 vcc base 100k + R2 base 0 27k + Cin in base 1uF + Q1 out_c base out_e npnmod + RC vcc out_c 10k + RE out_e 0 10k + .MODEL npnmod NPN(IS=1e-14 BF=100 VAF=50) + .OP + .AC DEC 10 10 1MEG + .MEAS OP out_c_dc FIND V(out_c) AT=0 + .MEAS OP out_e_dc FIND V(out_e) AT=0 + .MEAS AC out_c_gain MAX VM(out_c) + .MEAS AC out_e_gain MAX VM(out_e) + .MEAS AC phase_c FIND VP(out_c) AT=1k + .MEAS AC phase_e FIND VP(out_e) AT=1k + .END + """); + + var PI = 3.141592653589793; + AssertAllMeasurementsSuccessful(result); + var out_c_dc = MeasurementValue(result, "out_c_dc"); + var out_e_dc = MeasurementValue(result, "out_e_dc"); + Assert.True(((out_c_dc > out_e_dc)), CaseLabel(result)); + Assert.True(((out_c_dc < 12.0)), CaseLabel(result)); + AssertMeasurementBetween(result, "out_c_gain", 0.8, 1.2); + AssertMeasurementBetween(result, "out_e_gain", 0.8, 1.2); + var phase_c = MeasurementValue(result, "phase_c"); + var phase_e = MeasurementValue(result, "phase_e"); + var phase_diff = Math.Abs((phase_c - phase_e)); + Assert.True(((Math.Abs((phase_diff - PI)) < 0.1)), CaseLabel(result)); + } + + // Prompt: Design a series RC Zobel network to stabilize an op-amp driving a capacitive load. Simulate the frequency response and verify that gain peaking is below 3dB. + [Fact] + public void Series_RC_Zobel_network_for_load_stabilization_90826ba0584971a2() + { + var result = RunAcceptedExample( + "deepseek:00495_63b6086cd4e8db8b:90826ba0584971a2", + """ + * Series RC Zobel network for load stabilization + VIN in 0 AC 1 DC 0 + Rin in N+ 1k + E1 amp_int 0 N+ N- 100 + Rint amp_int int_out 1k + Cint int_out 0 159p + Rout int_out out 50 + Cload out 0 10n + Rf out N- 9k + Rg N- 0 1k + Rz out Z 10 + Cz Z 0 100n + .AC DEC 100 100 100MEG + .MEAS AC dc_gain FIND V(out) AT=100 + .MEAS AC max_gain MAX V(out) + .MEAS AC peak_ratio PARAM='max_gain/dc_gain' + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "dc_gain", 8.5, 9.7); + AssertMeasurementLess(result, "peak_ratio", 1.3); + } + + // Prompt: Non-inverting precision half-wave rectifier (super diode) using a high-gain behavioral op-amp (E-source) to eliminate diode forward drop. + [Fact] + public void Precision_Half_Wave_Rectifier_with_E_source_Op_Amp_Super_Diode_c6bf3aa60ffd7e2a() + { + var result = RunAcceptedExample( + "deepseek:00713_9c1e9a8c2d67a3f9:c6bf3aa60ffd7e2a", + """ + * Precision Half-Wave Rectifier with E-source Op-Amp (Super Diode) + Rload out 0 10k + D1 opout out dmodel + .MODEL dmodel D(IS=1n RS=1 CJO=10p) + E1 opout 0 TABLE { V(in) - V(out) } = (-150e-6, -15) (0,0) (150e-6, 15) + Ccomp opout out 10pF + VIN in 0 SIN(0 1 1k) + .tran 1u 10m + .meas tran vout_max MAX V(out) FROM=1m TO=10m + .meas tran vout_avg AVG V(out) FROM=1m TO=10m + .meas tran vout_min MIN V(out) FROM=0 TO=10m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "vout_max", 1.0, 0.02); + AssertMeasurementBetween(result, "vout_avg", 0.3, 0.35); + AssertMeasurementLess(result, "vout_min", 0.05); + } + + // Prompt: Voltage follower built with ideal VCVS (E source) and load resistor. + [Fact] + public void Op_Amp_Voltage_Follower_b87b441d42d498c1() + { + var result = RunAcceptedExample( + "deepseek:01428_62a2781512e31e08:b87b441d42d498c1", + """ + * Op-Amp Voltage Follower + VIN in 0 DC 1 AC 1 + E1 out 0 in out 100000 + RLOAD out 0 10k + .DC VIN 1 1 1 + .AC DEC 10 10 100k + .MEAS DC VOUT_DC FIND V(out) AT=1 + .MEAS AC GAIN_LOW FIND VDB(out) AT=1k + .MEAS AC GAIN_10K FIND VDB(out) AT=10k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "VOUT_DC", 1.0, 0.001); + AssertMeasurementBetween(result, "GAIN_LOW", (-0.1), 0.1); + AssertMeasurementBetween(result, "GAIN_10K", (-1.0), 0.0); + } + + // Prompt: Photodiode (D1) is reverse biased with VBIAS=5 V. + [Fact] + public void Photodiode_Reverse_Bias_Transimpedance_Amplifier_c912a9a042cf708f() + { + var result = RunAcceptedExample( + "deepseek:02131_5867599be3f8d80a:c912a9a042cf708f", + """ + * Photodiode Reverse-Bias Transimpedance Amplifier + VBIAS vbias 0 DC 5 + IPHOTO vbias pd PULSE(0 1u 0 1n 1n 10u 20u) + D1 pd vbias DPHOTO + .MODEL DPHOTO D(IS=1e-12 RS=10 CJO=10p) + R1 pd out 1MEG + C1 pd out 1p + E1 out 0 0 pd 100k + Rload out 0 10k + .OP + .TRAN 0.01u 20u + .MEAS TRAN VOUT_DC FIND V(out) AT=0 + .MEAS TRAN VOUT_ON FIND V(out) AT=9u + .MEAS TRAN VOUT_OFF FIND V(out) AT=19u + .MEAS TRAN T_RISE_START WHEN V(out) = -0.1 FALL=1 + .MEAS TRAN T_RISE_END WHEN V(out) = -0.9 FALL=1 + .MEAS TRAN TRISE PARAM T_RISE_END - T_RISE_START + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "VOUT_DC", (-0.001), 0.001); + AssertMeasurementBetween(result, "VOUT_ON", (-1.1), (-0.9)); + AssertMeasurementBetween(result, "VOUT_OFF", (-0.1), 0.1); + AssertMeasurementBetween(result, "TRISE", 1.5e-06, 3e-06); + } + + // Prompt: Logarithmic amplifier using ideal op-amp (VCVS) and diode in feedback. + [Fact] + public void Logarithmic_amplifier_using_op_amp_and_diode_b84409a73892f7ab() + { + var result = RunAcceptedExample( + "deepseek:00831_3496adae84ecdf8f:b84409a73892f7ab", + """ + * Logarithmic amplifier using op-amp and diode + VIN in 0 DC 0 + R1 in inv 10k + E_OPAMP out 0 0 inv 1e6 + D1 inv out DMOD + .MODEL DMOD D(IS=1e-14 N=1.05 RS=0) + .DC VIN 0.1 10 0.1 + .MEAS DC vout_01 FIND V(out) WHEN V(in)=0.1 + .MEAS DC vout_1 FIND V(out) WHEN V(in)=1 + .MEAS DC vout_10 FIND V(out) WHEN V(in)=10 + .MEAS DC delta1 PARAM 'vout_1 - vout_01' + .MEAS DC delta2 PARAM 'vout_10 - vout_1' + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "delta1", (-0.06), 0.01); + AssertMeasurementNear(result, "delta2", (-0.06), 0.01); + } + + // Prompt: H-pad attenuator with 6 dB voltage attenuation and 600 ohm characteristic impedance. + [Fact] + public void Balanced_H_pad_Attenuator_6dB_600_Ohm_af5a5a09cdd56c9f() + { + var result = RunAcceptedExample( + "deepseek:00456_8539a65a13178612:af5a5a09cdd56c9f", + """ + * Balanced H-pad Attenuator (6dB, 600 Ohm) + R1 in+ out+ 225 + R2 in- out- 225 + R3 in+ in- 1800 + R4 out+ out- 1800 + Rload out+ out- 600 + Rgnd in- 0 1MEG + V1 in+ in- DC 0 AC 1 + .OP + .AC DEC 10 1 100k + .MEASURE AC Vout_dB FIND VDB(out+,out-) AT=1k + .MEASURE AC Vin_dB FIND VDB(in+,in-) AT=1k + .MEASURE AC attenuation PARAM 'Vout_dB - Vin_dB' + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "attenuation", (-6.02), 0.1); + } + + // Prompt: Collector-feedback biased common-emitter amplifier with emitter degeneration. + [Fact] + public void Collector_feedback_biased_CE_amplifier_with_emitter_degeneration_44c5fa4c3f5b1562() + { + var result = RunAcceptedExample( + "deepseek:00902_398229005449a8ac:44c5fa4c3f5b1562", + """ + * Collector-feedback biased CE amplifier with emitter degeneration + VCC 1 0 DC 15 + VIN in 0 DC 0 AC 1 + C1 in base 10uF + C2 out vout 10uF + R_L vout 0 10k + R_C 1 out 1k + R_F out base 120k + R_E e 0 100 + Q1 out base e npn_mod + .model npn_mod NPN(IS=1e-14 BF=200 VA=100) + .OP + .MEAS OP vc FIND V(out) AT=0 + .AC DEC 10 10 100k + .MEAS AC vout_mag FIND VM(vout) AT=1k + .MEAS AC gain_db FIND VDB(vout) AT=1k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "vc", 6.0, 7.0); + AssertMeasurementBetween(result, "vout_mag", 8.0, 11.0); + AssertMeasurementBetween(result, "gain_db", 18.0, 22.0); + } + + // Prompt: A constant 1 mA current source charges a 1 \xb5F capacitor linearly, producing a ramp voltage of 1 V/ms. + [Fact] + public void Sawtooth_Generator_using_Current_Source_and_Reset_Switch_c0e0e96fbafc0d38() + { + var result = RunAcceptedExample( + "deepseek:01850_d3eb221435d5467f:c0e0e96fbafc0d38", + """ + * Sawtooth Generator using Current Source and Reset Switch + Vcc vcc 0 10 + I1 vcc out 1m + C1 out 0 1u IC=0 + S1 out 0 ctrl 0 smod + .model smod SW(RON=0.1 ROFF=100MEG VT=2 VH=0.5) + Vclk ctrl 0 PULSE(0 5 0 1n 1n 1u 5m) + .tran 0.1u 10m UIC + .measure TRAN period TRIG V(out) VAL=1 RISE=1 TARG V(out) VAL=1 RISE=2 + .measure TRAN freq PARAM 1/period + .measure TRAN vpeak MAX V(out) FROM=0 TO=10m + .measure TRAN trise TRIG V(out) VAL=0.5 RISE=1 TARG V(out) VAL=4.5 RISE=1 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "freq", 190.0, 210.0); + AssertMeasurementBetween(result, "vpeak", 4.8, 5.2); + AssertMeasurementBetween(result, "trise", 0.0039, 0.0041); + AssertMeasurementBetween(result, "period", 0.0049, 0.0051); + } + + // Prompt: Full-wave bridge rectifier with 14 V peak, 60 Hz AC input. + [Fact] + public void Full_wave_bridge_rectifier_with_filter_capacitor_0d36060b8fd7323d() + { + var result = RunAcceptedExample( + "deepseek:00124_a02c9e1b3e2573b7:0d36060b8fd7323d", + """ + * Full-wave bridge rectifier with filter capacitor + VIN in 0 SIN(0 14 60 0 0) + D1 in out_p DMOD + D2 0 out_p DMOD + D3 out_n in DMOD + D4 out_n 0 DMOD + RL out_p out_n 1k + CL out_p out_n 100uF + .MODEL DMOD D(IS=1e-14 RS=1 BV=1000) + .TRAN 1m 100m + .MEASURE TRAN vout_avg AVG V(out_p,out_n) FROM=50m TO=100m + .MEASURE TRAN vout_ripple PP V(out_p,out_n) FROM=50m TO=100m + .MEASURE TRAN vout_max MAX V(out_p,out_n) FROM=50m TO=100m + .MEASURE TRAN vout_min MIN V(out_p,out_n) FROM=50m TO=100m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "vout_avg", 11.0, 13.0); + AssertMeasurementBetween(result, "vout_ripple", 0.5, 2.0); + AssertMeasurementBetween(result, "vout_max", 12.0, 14.0); + AssertMeasurementBetween(result, "vout_min", 10.5, 12.5); + } + + // Prompt: Design a passive RC delay network with a high impedance load. + [Fact] + public void RC_delay_network_with_high_impedance_load_8eddfd3da12c47fd() + { + var result = RunAcceptedExample( + "deepseek:00039_42147cdf1198ee36:8eddfd3da12c47fd", + """ + * RC delay network with high impedance load + R1 in out 10k + C1 out 0 100nF + Rload out 0 1MEG + Vin in 0 PULSE(0 5 1u 10n 10n 5m 10m) + .tran 10u 20m + .meas tran vout_max MAX V(out) + .meas tran delay TRIG V(in) VAL=2.5 RISE=1 TARG V(out) VAL=2.5 RISE=1 + .end + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "vout_max", 4.9, 5.0); + AssertMeasurementBetween(result, "delay", 0.0005, 0.001); + } + + // Prompt: Asymmetric window diode clipper using two diodes and DC bias voltages. + [Fact] + public void Window_diode_limiter_with_asymmetric_thresholds_at_1V_and_3V_ea4878db9b89679d() + { + var result = RunAcceptedExample( + "deepseek:00763_b227f0f1eb8d9c30:ea4878db9b89679d", + """ + * Window diode limiter with asymmetric thresholds at +1V and -3V + VIN in 0 SIN(0 5 1k) + R1 in out 1k + D1 out posclamp DMOD + D2 negclamp out DMOD + Vpos posclamp 0 DC 0.388 + Vneg negclamp 0 DC -2.426 + .MODEL DMOD D (IS=1e-12 RS=10) + .TRAN 0.01m 2m 0 0.01m + .MEAS TRAN out_max MAX V(out) FROM=0 TO=2m + .MEAS TRAN out_min MIN V(out) FROM=0 TO=2m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "out_max", 0.9, 1.2); + AssertMeasurementBetween(result, "out_min", (-3.2), (-2.8)); + } + + // Prompt: Diode peak detector rectifies sinusoidal input to a DC voltage with ripple. + [Fact] + public void Diode_Peak_Detector_with_Bleed_Resistor_c3e5a47a8dc18abe() + { + var result = RunAcceptedExample( + "deepseek:00742_d769bae25ebd3509:c3e5a47a8dc18abe", + """ + * Diode Peak Detector with Bleed Resistor + VIN in 0 SIN(0 5 1k 0 0 0) + D1 in out DMOD + C1 out 0 1u + R1 out 0 100k + .MODEL DMOD D(IS=2.52n RS=0.568 N=1.752 CJO=4p M=0.4 BV=100 TT=5n) + .TRAN 0.1m 10m + .MEASURE TRAN Vpeak MAX V(out) FROM=1m TO=10m + .MEASURE TRAN Vmin MIN V(out) FROM=1m TO=10m + .END + """); + + AssertAllMeasurementsSuccessful(result); + var vpeak = ToDouble(MeasurementValue(result, "Vpeak")); + var vmin = ToDouble(MeasurementValue(result, "Vmin")); + Assert.True(((4.0 <= vpeak) && (vpeak <= 5.0)), CaseLabel(result)); + Assert.True(((3.0 <= vmin) && (vmin <= 5.0)), CaseLabel(result)); + Assert.True(((vpeak > vmin)), CaseLabel(result)); + var ripple = (vpeak - vmin); + Assert.True(((0.0 < ripple) && (ripple < 0.5)), CaseLabel(result)); + } + + // Prompt: Increased input pulse amplitude to \xb110V to exceed the 5V supply and engage clamping. + [Fact] + public void Diode_steering_network_for_input_protection_a7be1ab6b50760c8() + { + var result = RunAcceptedExample( + "deepseek:00783_25696ed44f0d1ff5:a7be1ab6b50760c8", + """ + * Diode steering network for input protection + VCC vcc 0 DC 5 + VIN in 0 PULSE(-10 10 0 1n 1n 1u 2u) + R1 in out 1k + D1 out vcc dm + D2 0 out dm + Rload out 0 10k + .MODEL dm D(IS=1e-15 N=1) + .TRAN 0.01u 5u + .MEAS TRAN vmax MAX V(out) FROM=0 TO=5u + .MEAS TRAN vmin MIN V(out) FROM=0 TO=5u + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "vmax", 5.5, 6.5); + AssertMeasurementBetween(result, "vmin", (-1.0), 0.0); + } + + // Prompt: Basic CMOS inverter with PMOS (W=5u, L=1u) and NMOS (W=2u, L=1u) for balanced drive. + [Fact] + public void CMOS_Inverter_with_Capacitive_Load_f2718ae19a3afd56() + { + var result = RunAcceptedExample( + "deepseek:01352_e7d88d7f1dc62586:f2718ae19a3afd56", + """ + * CMOS Inverter with Capacitive Load + M1 out in vdd vdd pmos_mod W=5u L=1u + M2 out in 0 0 nmos_mod W=2u L=1u + VDD vdd 0 DC 5 + VIN in 0 PULSE(0 5 0 1n 1n 50n 100n) + CL out 0 1pF + .MODEL nmos_mod NMOS (VTO=0.7 KP=100u LAMBDA=0.02) + .MODEL pmos_mod PMOS (VTO=-0.7 KP=40u LAMBDA=0.02) + .TRAN 0.1n 200n + .MEAS TRAN t_phl TRIG V(in) VAL=2.5 RISE=1 TARG V(out) VAL=2.5 FALL=1 + .MEAS TRAN t_plh TRIG V(in) VAL=2.5 FALL=1 TARG V(out) VAL=2.5 RISE=1 + .MEAS TRAN t_rise TRIG V(out) VAL=0.5 RISE=1 TARG V(out) VAL=4.5 RISE=1 + .MEAS TRAN t_fall TRIG V(out) VAL=4.5 FALL=1 TARG V(out) VAL=0.5 FALL=1 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "t_phl", 1e-09, 1e-08); + AssertMeasurementBetween(result, "t_plh", 1e-09, 1e-08); + AssertMeasurementBetween(result, "t_rise", 1e-10, 5e-09); + AssertMeasurementBetween(result, "t_fall", 1e-10, 5e-09); + } + + // Prompt: Series pass linear regulator with op-amp error amplifier + [Fact] + public void Series_pass_linear_regulator_with_op_amp_error_amplifier_e8679998ee0b17dc() + { + var result = RunAcceptedExample( + "deepseek:01874_e8a5c9d50df75333:e8679998ee0b17dc", + """ + * Series pass linear regulator with op-amp error amplifier + VIN in 0 DC 12 + VREF vp 0 DC 5 + R1 out vm 10k + R2 vm 0 10k + * Op-amp modeled with VCVS gain=1000 and output resistance + E1 base_e 0 vp vm 1000 + Rser base_e base 1k + * Clamp base voltage to prevent extreme voltages + D1 base in DCLAMP + .MODEL DCLAMP D (IS=1e-15) + * Pass transistor + Q1 in base out qn + RL out 0 100 + .MODEL qn NPN(IS=1e-15 BF=100) + * Initial node set for better convergence + .NODESET V(out)=10 V(base)=10.7 + .DC VIN 8 15 0.1 + .OP + .MEAS DC VOUT_12V FIND V(out) AT=12 + .MEAS DC VOUT_8V FIND V(out) AT=8 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "VOUT_12V", 10.0, 0.5); + AssertMeasurementLess(result, "VOUT_8V", 8.0); + AssertMeasurementGreater(result, "VOUT_8V", 7.0); + } + + // Prompt: Construct PMOS CS amplifier with VDD=24 V, VIN=16 V, RL=5 k\u03a9, PMOS W/L=100u/100u model. + [Fact] + public void PMOS_Common_Source_Amplifier_bbec58e8ac056159() + { + var result = RunAcceptedExample( + "deepseek:01212_c330dfc45581f09f:bbec58e8ac056159", + """ + * PMOS Common-Source Amplifier + VDD VDD 0 DC 24 + VIN IN 0 DC 16 AC 1 + M1 OUT IN VDD VDD PMOS W=100u L=100u + RL OUT 0 5k + .MODEL PMOS PMOS (VTO=-1 KP=100U LAMBDA=0.02) + .OP + .DC VIN 15 17 0.1 + .AC DEC 10 1 100MEG + .MEAS DC I_DC FIND I(RL) AT=16 + .MEAS DC VGS_DC FIND V(IN,VDD) AT=16 + .MEAS DC VDS_DC FIND V(OUT,VDD) AT=16 + .MEAS AC AVG FIND V(OUT) AT=1kHz + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "I_DC", 0.002, 0.003); + AssertMeasurementLess(result, "VGS_DC", 0.0); + AssertMeasurementLess(result, "VDS_DC", 0.0); + AssertMeasurementBetween(result, "AVG", (-4.0), (-3.0)); + } + + // Prompt: DC sweep of differential pair with emitter degeneration + [Fact] + public void BJT_differential_pair_large_signal_transfer_sweep_f65723bd20e573c1() + { + var result = RunAcceptedExample( + "deepseek:00998_8c655751585286af:f65723bd20e573c1", + """ + * BJT differential pair large-signal transfer sweep + VCC vcc 0 DC 10 + VIN1 in1 0 DC 0 + VIN2 in2 0 DC 0 + I1 em 0 DC 1m + RC1 vcc out1 5k + RC2 vcc out2 5k + RE1 e1 em 100 + RE2 e2 em 100 + Q1 out1 in1 e1 mod1 + Q2 out2 in2 e2 mod1 + .MODEL mod1 NPN(BF=200 IS=1e-14) + .DC VIN1 -2 2 0.01 + .MEAS DC gain DERIV V(out1) AT = 0 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "gain", (-20.0), (-10.0)); + } + + // Prompt: Simulate a variable-gain amplifier using a BJT Gilbert cell. Apply a 1 kHz, 10 mV peak differential sine wave to the signal input and a 100 mV DC differential control voltage. Measure the differential output amplitude. + [Fact] + public void Gilbert_cell_variable_transconductance_amplifier_9a2477c59929eb2b() + { + var result = RunAcceptedExample( + "deepseek:02288_d840ab5e43c2b411:9a2477c59929eb2b", + """ + * Gilbert cell variable transconductance amplifier + Q1 n1 inp n4 NPN + Q2 n2 inn n4 NPN + Q3 outp inpc n1 NPN + Q4 outn innc n1 NPN + Q5 outp innc n2 NPN + Q6 outn inpc n2 NPN + R1 outp VCC 2k + R2 outn VCC 2k + I_TAIL n4 VNEG DC 1m + VSUP_P VCC 0 DC 10 + VSUP_N 0 VNEG DC 10 + Vin1 inp 0 DC 0 SIN(0 5m 1k 0 0 0) + Vin2 inn 0 DC 0 SIN(0 -5m 1k 0 0 0) + Vctrl1 inpc 0 DC 2.05 + Vctrl2 innc 0 DC 1.95 + .MODEL NPN NPN(IS=1e-14 BF=100 VAF=100) + .OP + .TRAN 1u 10m 0 10u + .MEAS TRAN Vout_pp PP V(outp,outn) FROM=1m TO=10m + .MEAS TRAN Vin_pp PP V(inp,inn) FROM=1m TO=10m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "Vout_pp", 0.5, 1.0); + AssertMeasurementNear(result, "Vin_pp", 0.02, 0.001); + } + + // Prompt: NMOS current mirror with source degeneration resistors to increase output resistance. + [Fact] + public void Source_degenerated_NMOS_current_mirror_a99541a525666226() + { + var result = RunAcceptedExample( + "deepseek:01281_210c6975e782eb77:a99541a525666226", + """ + * Source-degenerated NMOS current mirror + IREF 0 in DC 100u + M1 in in src1 0 nmos W=10u L=1u + R1 src1 0 2k + M2 out in src2 0 nmos W=20u L=1u + R2 src2 0 1k + VDD vdd 0 DC 5 + VOUT out 0 DC 2.5 + .MODEL nmos NMOS(VTO=0.7 KP=200u LAMBDA=0.01) + .OP + .DC VOUT 2.45 2.55 0.01 + .MEAS DC Iout_at2p5 FIND I(R2) AT=2.5 + .MEAS DC Iout_at2p6 FIND I(R2) AT=2.51 + .MEAS DC Rout_calc PARAM='(2.51-2.5)/(Iout_at2p6-Iout_at2p5)' + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "Iout_at2p5", 0.0002, 5e-05); + AssertMeasurementBetween(result, "Rout_calc", 500000.0, 2000000.0); + } + + // Prompt: Basic sample-and-hold with ideal voltage-controlled switch and 500 kHz clock + [Fact] + public void Sample_and_Hold_Front_End_with_Clocked_Switch_29b73f9c53e087cf() + { + var result = RunAcceptedExample( + "deepseek:02234_6af77d0d2228362c:29b73f9c53e087cf", + """ + * Sample-and-Hold Front End with Clocked Switch + VIN in 0 SIN(0 1 1k) + VCLK clk 0 PULSE(0 5 0 1n 1n 1u 2u) + SSC in out clk 0 swmod + .MODEL swmod SW(RON=10 ROFF=100MEG VT=2 VH=0.5) + CH out 0 1n + RL out 0 100MEG + .TRAN 10n 10u + .MEAS TRAN vout_hold FIND V(out) AT=5.5u + .MEAS TRAN vin_sample FIND V(in) AT=4.9u + .MEAS TRAN vdiff PARAM='vout_hold - vin_sample' + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "vdiff", 0.0, 0.001); + } + + // Prompt: Common-collector NPN BJT emitter follower + [Fact] + public void Common_Collector_Emitter_Follower_Buffer_f1fca991022e10a5() + { + var result = RunAcceptedExample( + "deepseek:00183_893dd49579e41683:f1fca991022e10a5", + """ + * Common-Collector Emitter Follower Buffer + VCC vcc 0 DC 12 + VIN in 0 DC 0 AC 1 + R1 vcc base 100k + R2 base 0 47k + C1 in base 10u + Q1 vcc base out npn_mod + RE out 0 1k + .MODEL npn_mod NPN(IS=1e-14 BF=200 VAF=100) + .OP + .AC DEC 10 10 100k + .MEAS AC gain FIND V(out) AT=1kHz + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "gain", 0.99, 0.05); + } + + // Prompt: NMOS common-source amplifier with voltage divider biasing. + [Fact] + public void NMOS_common_source_amplifier_with_resistive_load_580c2008870f1255() + { + var result = RunAcceptedExample( + "deepseek:00243_970e32e2d2a553e0:580c2008870f1255", + """ + * NMOS common-source amplifier with resistive load + M1 out gate S 0 nmos W=10u L=1u + RS S 0 1k + RD VDD out 5k + R1 VDD gate 82k + R2 gate 0 47k + C1 in gate 10u + C2 out out_ac 10u + RL out_ac 0 100k + VDD VDD 0 DC 12 + VIN in 0 DC 0 AC 1 + .MODEL nmos NMOS(VTO=2 KP=1m LAMBDA=0.02) + .OP + .AC DEC 10 1 1Meg + .MEAS AC gain_1kHz FIND VDB(out_ac) AT=1k + .MEAS AC phase_1kHz FIND VP(out_ac) AT=1k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementGreater(result, "gain_1kHz", 0.0); + AssertMeasurementNear(result, "phase_1kHz", (-3.1415926535), 0.2); + } + + // Prompt: Transimpedance amplifier converts photodiode current into voltage. + [Fact] + public void Photodiode_transimpedance_amplifier_398810e1d4093910() + { + var result = RunAcceptedExample( + "deepseek:01494_a22a1ba0423a70d1:398810e1d4093910", + """ + * Photodiode transimpedance amplifier + Iph inv 0 DC 0 AC 1u + Rf out inv 10k + Cf out inv 1p + E1 out 0 0 inv 100000 + .DC Iph 0 1u 0.1u + .AC DEC 10 10 1MEG + .MEAS DC vout_dc FIND V(out) AT=0 + .MEAS AC gain_mag FIND MAG(V(out)) AT=1000 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "vout_dc", (-0.001), 0.001); + AssertMeasurementBetween(result, "gain_mag", 0.009, 0.011); + } + + // Prompt: Set up Wien bridge oscillator with behavioral op-amp and passive components. + [Fact] + public void Wien_bridge_oscillator_with_behavioral_op_amp_7c837210d798d8ce() + { + var result = RunAcceptedExample( + "deepseek:00384_f620ead8baef0656:7c837210d798d8ce", + """ + * Wien-bridge oscillator with behavioral op-amp + R1 out A 10k + C1 A pos 10n + R2 pos 0 10k + C2 pos 0 10n + Rf out neg 22k + Rg neg 0 10k + E1 out 0 VALUE={LIMIT(1e5*(V(pos)-V(neg)), -15, 15)} + .IC V(pos)=0.1 + .TRAN 0 50m 0 1u + * Measure frequency using 10 periods after steady state (start at 30ms) + .MEAS TRAN t1 WHEN V(out)=0 RISE=1 TD=30m + .MEAS TRAN t2 WHEN V(out)=0 RISE=11 TD=30m + .MEAS TRAN freq PARAM 10/(t2-t1) + * Measure peak-to-peak amplitude after steady state + .MEAS TRAN vmax MAX V(out) FROM=30m TO=50m + .MEAS TRAN vmin MIN V(out) FROM=30m TO=50m + .MEAS TRAN vpp PARAM vmax-vmin + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "freq", 1592.0, 50.0); + AssertMeasurementBetween(result, "vpp", 29.0, 31.0); + } + + // Prompt: Create a netlist for a 3-stage CMOS current-starved ring oscillator. The circuit should use separate PMOS and NMOS current sources per inverter, driven by bias voltages Vnbias and Vpbias. Include load resistor Rload and 10pF capacitors on each output node. Run a transient simulation and measure the oscillation period and frequency. + [Fact] + public void CMOS_Current_Starved_Ring_Oscillator_with_VCO_like_bias_control_85051e627487b5e0() + { + var result = RunAcceptedExample( + "deepseek:01382_e4154b5eb5cf11db:85051e627487b5e0", + """ + * CMOS Current-Starved Ring Oscillator with VCO-like bias control + .OPTIONS NOPAGE + .ic v(out1)=0 v(out2)=5 v(out3)=0 + M_PS1 vdd_ps1 pbias vdd vdd p1 W=10u L=1u + M_NS1 vss_ns1 nbias 0 0 n1 W=5u L=1u + M_P1 out1 out3 vdd_ps1 vdd p1 W=20u L=1u + M_N1 out1 out3 vss_ns1 0 n1 W=10u L=1u + M_PS2 vdd_ps2 pbias vdd vdd p1 W=10u L=1u + M_NS2 vss_ns2 nbias 0 0 n1 W=5u L=1u + M_P2 out2 out1 vdd_ps2 vdd p1 W=20u L=1u + M_N2 out2 out1 vss_ns2 0 n1 W=10u L=1u + M_PS3 vdd_ps3 pbias vdd vdd p1 W=10u L=1u + M_NS3 vss_ns3 nbias 0 0 n1 W=5u L=1u + M_P3 out3 out2 vdd_ps3 vdd p1 W=20u L=1u + M_N3 out3 out2 vss_ns3 0 n1 W=10u L=1u + VDD vdd 0 DC 5 + Vnbias nbias 0 DC 2.0 + Vpbias pbias 0 DC 3.0 + Rload out3 0 100k + C1 out1 0 10p + C2 out2 0 10p + C3 out3 0 10p + .MODEL n1 NMOS (VTO=1 KP=100u LAMBDA=0.02) + .MODEL p1 PMOS (VTO=-1 KP=50u LAMBDA=0.02) + .TRAN 10n 200u 0 10n UIC + .MEAS TRAN tper TRIG V(out3) VAL=2.5 RISE=5 TARG V(out3) VAL=2.5 RISE=6 + .MEAS TRAN freq PARAM 1/tper + .MEAS TRAN vmax MAX V(out3) FROM=50u TO=200u + .MEAS TRAN vmin MIN V(out3) FROM=50u TO=200u + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "freq", 500000.0, 2000000.0); + AssertMeasurementGreater(result, "vmax", 4.5); + AssertMeasurementLess(result, "vmin", 0.5); + } + + // Prompt: Four-input averaging amplifier using an ideal op-amp with finite gain of 100k. + [Fact] + public void Averaging_Amplifier_with_Four_Inputs_5331b8063a4c09be() + { + var result = RunAcceptedExample( + "deepseek:01462_086a499e75a0c9ef:5331b8063a4c09be", + """ + * Averaging Amplifier with Four Inputs + V1 in1 0 DC 1 AC 1 + V2 in2 0 DC 2 AC 1 + V3 in3 0 DC 3 AC 1 + V4 in4 0 DC 4 AC 1 + R1 in1 ninv 4k + R2 in2 ninv 4k + R3 in3 ninv 4k + R4 in4 ninv 4k + Rf out ninv 1k + E1 out 0 0 ninv 100000 + VCC vcc 0 DC 15 + VEE vee 0 DC -15 + .OP + .AC DEC 10 1 10k + .MEAS OP vout_dc FIND V(out) AT=0 + .MEAS AC vout_ac FIND VM(out) AT=1k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "vout_dc", (-2.5), 0.1); + AssertMeasurementNear(result, "vout_ac", 1.0, 0.1); + } + + // Prompt: Monostable multivibrator using a voltage-controlled switch as comparator with positive feedback and an RC timing network. + [Fact] + public void Monostable_Multivibrator_using_RC_and_Comparator_Switch_based_fed1274fdc1f03be() + { + var result = RunAcceptedExample( + "deepseek:00425_142c84fad9ba6fc2:fed1274fdc1f03be", + """ + * Monostable Multivibrator using RC and Comparator (Switch-based) + .OPTIONS BRIEF + VCC 5 0 DC 5V + Vtrigger trig 0 PULSE(0 5 1m 1n 1n 100u 100m) + S1 out 5 plus minus SMOD + .MODEL SMOD SW(Ron=1 Roff=1Meg Vt=0 Vh=0.1) + Rpd out 0 1k + Ctim minus 0 0.47uF + Rtim out minus 78k + R_minus minus 0 1Meg + R1 out plus 10k + R2 plus 0 10k + Dtrig trig plus DMOD + .MODEL DMOD D(IS=1n RS=1) + .IC V(out)=0 V(minus)=0 + .TRAN 0 40m 0 1u + .MEAS TRAN pw TRIG V(out) VAL=2.5 RISE=1 TARG V(out) VAL=2.5 FALL=1 + .MEAS TRAN vout_high MAX V(out) + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "pw", 0.025, 0.03); + AssertMeasurementGreater(result, "vout_high", 4.5); + } + + // Prompt: Practical differentiator using op-amp with input resistor to limit high-frequency noise gain. + [Fact] + public void Op_amp_differentiator_with_input_limit_resistor_cfaf391e5020254d() + { + var result = RunAcceptedExample( + "deepseek:00351_9210d65b7f451cdc:cfaf391e5020254d", + """ + * Op-amp differentiator with input limit resistor + VIN in 0 DC 0 AC 1 + R_limit in cin 1k + C cin inv 0.1u + Rf out inv 10k + E1 out 0 0 inv 100000 + .AC DEC 100 1 10k + .OP + .MEASURE AC mag_1k FIND VDB(out) AT=1k + .MEASURE AC mag_10k FIND VDB(out) AT=10k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "mag_1k", 14.0, 15.0); + AssertMeasurementBetween(result, "mag_10k", 19.0, 21.0); + } + + // Prompt: Design a 4-bit digital-to-analog converter using binary-weighted resistors and an ideal op-amp in inverting summing configuration. The digital code is fixed at 1010 (MSB=1, LSB=0). Sweep the reference voltage Vref and measure the output. + [Fact] + public void _4_bit_binary_weighted_resistor_DAC_with_op_amp_26e1f7a6a52d0c99() + { + var result = RunAcceptedExample( + "deepseek:02185_5fdc9294df8ad097:26e1f7a6a52d0c99", + """ + * 4-bit binary-weighted resistor DAC with op-amp + Vref ref 0 DC 5 + E_b3 b3 0 ref 0 1 + Vb2 b2 0 DC 0 + E_b1 b1 0 ref 0 1 + Vb0 b0 0 DC 0 + R1 b3 ninv 1k + R2 b2 ninv 2k + R3 b1 ninv 4k + R4 b0 ninv 8k + Rf out ninv 1k + E1 out 0 0 ninv 100000 + RL out 0 10k + .OP + .DC Vref 0 5 0.1 + .MEAS DC vout_max FIND V(out) AT=5 + .MEAS DC vout_half FIND V(out) AT=2.5 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "vout_max", (-6.25), 0.06); + AssertMeasurementNear(result, "vout_half", (-3.125), 0.03125); + } + + // Prompt: Common-emitter amplifier with collector-to-base feedback for bias stabilization. + [Fact] + public void Common_Emitter_Amplifier_with_Collector_to_Base_Feedback_0da8bceac8940c53() + { + var result = RunAcceptedExample( + "deepseek:00924_2a4ad80a6a5c603c:0da8bceac8940c53", + """ + * Common-Emitter Amplifier with Collector-to-Base Feedback + VCC VCC 0 DC 12 + VIN in 0 DC 0 AC 1 + Rs in inB 1k + C1 inB base 10uF + RC VCC out 2.2k + RFB out base 100k + Q1 out base 0 NPN + RL out 0 10k + CLOAD out 0 100pF + .MODEL NPN NPN(IS=1e-14 BF=100 VAF=100) + .OP + .AC DEC 50 1k 10MEG + .MEAS OP vc FIND V(out) AT=0 + .MEAS OP ic_supply FIND I(VCC) AT=0 + .MEAS AC gain_max MAX VDB(out) + .MEAS AC lf_gain FIND VDB(out) AT=1k + .MEAS AC bw WHEN VDB(out)=31 FALL=1 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "vc", 3.5, 5.0); + AssertMeasurementBetween(result, "ic_supply", (-0.01), (-0.001)); + AssertMeasurementBetween(result, "gain_max", 30.0, 40.0); + AssertMeasurementBetween(result, "bw", 1000000.0, 4000000.0); + } + + // Prompt: Hot-swap inrush limiter using N-MOSFET with gate RC network + [Fact] + public void Hot_swap_inrush_limiter_with_N_channel_MOSFET_96d4f6c3bc1faea1() + { + var result = RunAcceptedExample( + "deepseek:02019_4de53419b149d3e7:96d4f6c3bc1faea1", + """ + * Hot-swap inrush limiter with N-channel MOSFET + VIN input 0 PULSE(0 12 0 1u 1u 2m 4m) + Rg input gate 200k + Cgs gate 0 10n + Rload input load 10 + Cload input load 100u + M1 drain_m1 gate 0 0 nmos W=100u L=10u + Vmeas load drain_m1 DC 0 + .MODEL nmos NMOS(VTO=2 KP=10m LAMBDA=0.01) + .TRAN 10u 4m + .MEAS TRAN Iinrush MAX I(Vmeas) FROM=0 TO=2m + .MEAS TRAN Vout_final MAX V(input)-V(load) FROM=1.9m TO=2m + .MEAS TRAN t_rise WHEN V(input)-V(load)=10.8 TD=0 RISE=1 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementLess(result, "Iinrush", 2.0); + AssertMeasurementGreater(result, "Vout_final", 11.5); + AssertMeasurementLess(result, "t_rise", 0.0025); + } + + // Prompt: Power ORing circuit emulates ideal diodes using N-channel MOSFETs with high\u2011gain feedback amplifiers. + [Fact] + public void Ideal_Diode_ORing_Power_Mux_using_MOSFETs_d5f20ad8d28a18be() + { + var result = RunAcceptedExample( + "deepseek:02013_d68d4af8f994b69b:d5f20ad8d28a18be", + """ + * Ideal Diode ORing Power Mux using MOSFETs + V1 in1 0 PWL(0 3 1m 3 1.001m 5 2m 5) + V2 in2 0 PWL(0 4.5 2m 4.5) + E1 g1 0 in1 out 100k + E2 g2 0 in2 out 100k + M1 in1 g1 out 0 nmod W=1 L=1u + M2 in2 g2 out 0 nmod W=1 L=1u + RL out 0 1k + .MODEL nmod NMOS(VTO=1.5 KP=100u LAMBDA=0.01) + .TRAN 1u 2m + .OP + .MEAS TRAN vout0p5 FIND V(out) AT=0.5m + .MEAS TRAN vout1p5 FIND V(out) AT=1.5m + .MEAS TRAN i_v2_1p5 FIND I(V2) AT=1.5m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "vout0p5", 4.5, 0.1); + AssertMeasurementNear(result, "vout1p5", 5.0, 0.1); + AssertMeasurementLess(result, "i_v2_1p5", 0.001); + } + + // Prompt: The circuit is a voltage-to-current converter using an ideal op\u2011amp, four equal 1k resistors, and a grounded load. + [Fact] + public void Voltage_to_current_converter_Howland_current_pump_3a872ef93a662758() + { + var result = RunAcceptedExample( + "deepseek:01518_64d5e9053d9960f9:3a872ef93a662758", + """ + * Voltage-to-current converter (Howland current pump) + VIN n_pos 0 DC 0 + E1 out 0 n_pos n_neg 100000 + R1 out n_pos 1k + R2 n_pos 0 1k + R3 out vload 1k + R4 vload n_neg 1k + RL vload_s 0 1k + Vsense vload vload_s 0 + .OP + .DC VIN 0 2 0.2 + .MEAS DC I_LOAD_AT1V FIND I(Vsense) AT=1 + .MEAS DC VOUT_AT1V FIND V(out) AT=1 + .MEAS DC I_LOAD_MAX MAX I(Vsense) + .MEAS DC I_LOAD_MIN MIN I(Vsense) + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "I_LOAD_AT1V", 0.001, 1e-05); + AssertMeasurementNear(result, "VOUT_AT1V", 2.0, 0.01); + AssertMeasurementBetween(result, "I_LOAD_MAX", 0.0019, 0.0021); + AssertMeasurementBetween(result, "I_LOAD_MIN", (-1e-06), 1e-06); + } + + // Prompt: The sample-and-hold uses a MOS switch (S1) controlled by a clock pulse (V_clk). During the high phase, the input (V_in) charges C_hold through R1 and the switch on\u2011resistance. + [Fact] + public void SAR_ADC_Sample_Comparator_Front_End_abc0ca65a3b18a1c() + { + var result = RunAcceptedExample( + "deepseek:02218_25c8c5ba5f8e02b0:abc0ca65a3b18a1c", + """ + * SAR ADC Sample Comparator Front End + V_in in 0 PULSE(0 4 0 10n 10n 1u 2u) + V_clk clk 0 PULSE(0 5 50n 1n 1n 100n 200n) + V_dac dac 0 PWL(0 0 200n 2.5 300n 3.75 400n 4.375 500n 4.0625) + R1 in sw_in 10 + S1 sw_in hold clk 0 swmod + .MODEL swmod SW(RON=10 ROFF=1MEG VT=2.5 VH=0.5) + C_hold hold 0 100p + E_buf buf 0 hold 0 1 + R_buf buf 0 1G + B_comp out 0 V = if(V(buf) > V(dac), 5, -5) + R_load out 0 10k + .TRAN 0.01n 600n + .MEAS TRAN vhold FIND V(hold) AT=160n + .MEAS TRAN comp_msb FIND V(out) AT=200n + .MEAS TRAN comp_bit2 FIND V(out) AT=300n + .MEAS TRAN comp_bit1 FIND V(out) AT=400n + .MEAS TRAN comp_bit0 FIND V(out) AT=500n + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "vhold", 4.0, 0.1); + AssertMeasurementGreater(result, "comp_msb", 0.5); + AssertMeasurementGreater(result, "comp_bit2", 0.5); + AssertMeasurementLess(result, "comp_bit1", (-0.5)); + AssertMeasurementLess(result, "comp_bit0", (-0.5)); + } + + // Prompt: Double-balanced Gilbert cell mixer using NPN BJTs + [Fact] + public void Gilbert_Cell_Mixer_Double_balanced_with_BJTs_ec67b12cf422cb0c() + { + var result = RunAcceptedExample( + "deepseek:02087_7f703aa58d379834:ec67b12cf422cb0c", + """ + * Gilbert Cell Mixer - Double-balanced with BJTs + VCC VCC 0 DC 5 + I1 TAIL 0 DC 2m + RLOADP VCC OUTP 2k + RLOADN VCC OUTN 2k + RE1 E1 TAIL 1.2k + RE2 E2 TAIL 1.2k + QRF1 Ca RF_p E1 NPN + QRF2 Cb RF_n E2 NPN + QLO1 OUTP LO_p Ca NPN + QLO2 OUTN LO_n Ca NPN + QLO3 OUTP LO_n Cb NPN + QLO4 OUTN LO_p Cb NPN + VLO_p LO_p 0 SIN(2.8 0.02 11MEG) + VLO_n LO_n 0 SIN(2.8 -0.02 11MEG) + VRF_p RF_p 0 SIN(2 0.1 10MEG) + VRF_n RF_n 0 SIN(2 -0.1 10MEG) + .MODEL NPN NPN(IS=1e-15 BF=100) + .OP + .TRAN 10n 100u + .MEAS TRAN Vout_pp PP V(OUTP,OUTN) FROM=50u TO=100u + .MEAS TRAN Vrf_pp PP V(RF_p,RF_n) FROM=0 TO=100u + .MEAS TRAN Vlo_pp PP V(LO_p,LO_n) FROM=0 TO=100u + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "Vout_pp", 0.001, 1.0); + AssertMeasurementRatioBetween(result, "Vout_pp", "Vrf_pp", 0.01, 0.2); + } + + // Prompt: LC band-pass ladder filter synthesized from 3rd-order Butterworth low-pass prototype. + [Fact] + public void LC_Band_pass_Ladder_Filter_4ff3af69372bd902() + { + var result = RunAcceptedExample( + "deepseek:00592_41bed9523a06b060:4ff3af69372bd902", + """ + * LC Band-pass Ladder Filter + V1 in 0 AC 1 + RS in n1 50 + L1 n1 n2 7.9577mH + C1 n2 n3 31.831nF + L2 n3 0 39.79uH + C2 n3 0 6.3662uF + L3 n3 n4 7.9577mH + C3 n4 out 31.831nF + RL out 0 50 + .AC DEC 200 100 100k + .MEAS AC max_gain MAX VDB(out) + .MEAS AC bw_lower WHEN VDB(out)=-9.02 CROSS=1 + .MEAS AC bw_upper WHEN VDB(out)=-9.02 CROSS=2 + .MEAS AC stop_1k FIND VDB(out) AT=1k + .MEAS AC stop_100k FIND VDB(out) AT=100k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "max_gain", (-7.0), (-5.0)); + var f_low = MeasurementValue(result, "bw_lower"); + var f_high = MeasurementValue(result, "bw_upper"); + var f_center = Math.Pow((f_low * f_high), 0.5); + Assert.True(((9500.0 <= f_center) && (f_center <= 10500.0)), CaseLabel(result)); + var bw = (f_high - f_low); + Assert.True(((500.0 <= bw) && (bw <= 2000.0)), CaseLabel(result)); + AssertMeasurementLess(result, "stop_1k", (-40.0)); + AssertMeasurementLess(result, "stop_100k", (-40.0)); + } + + // Prompt: Design a dual-polarity full-wave rectifier using a center-tapped transformer, four diodes, and filter capacitors. + [Fact] + public void Dual_polarity_full_wave_rectifier_supply_a74a077df06d70d6() + { + var result = RunAcceptedExample( + "deepseek:00711_a74a077df06d70d6:a74a077df06d70d6", + """ + * Dual polarity full-wave rectifier supply + VTOP A1 0 SIN(0 12 60 0 0 0) + RTOP A1 A 0.5 + VBOT B1 0 SIN(0 12 60 0 0 180) + RBOT B1 B 0.5 + D1 A pos D1N4148 + D2 B pos D1N4148 + D3 neg A D1N4148 + D4 neg B D1N4148 + CPOS pos 0 470u + CNEG neg 0 470u + RLOAD_POS pos 0 1k + RLOAD_NEG neg 0 1k + .MODEL D1N4148 D(IS=1n RS=1 BV=100 CJO=4p) + .TRAN 1u 100m + .MEAS TRAN v_pos_avg AVG V(pos) FROM=50m TO=100m + .MEAS TRAN v_neg_avg AVG V(neg) FROM=50m TO=100m + .MEAS TRAN v_pos_ripple PP V(pos) FROM=50m TO=100m + .MEAS TRAN v_neg_ripple PP V(neg) FROM=50m TO=100m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "v_pos_avg", 10.0, 16.0); + AssertMeasurementBetween(result, "v_neg_avg", (-16.0), (-10.0)); + AssertMeasurementLess(result, "v_pos_ripple", 2.0); + AssertMeasurementLess(result, "v_neg_ripple", 2.0); + } + + // Prompt: A CMOS NAND2 gate with NMOS pull-down series and PMOS pull-up parallel. + [Fact] + public void CMOS_NAND2_Gate_Transient_Response_2d07cb3fc4910cea() + { + var result = RunAcceptedExample( + "deepseek:00291_610ae57d6930f2a5:2d07cb3fc4910cea", + """ + * CMOS NAND2 Gate Transient Response + .PARAM VDD=5 + .MODEL pmos PMOS(VTO=-1 KP=50u LAMBDA=0.02) + .MODEL nmos NMOS(VTO=1 KP=100u LAMBDA=0.02) + VDD VDD 0 DC {VDD} + VA A 0 PULSE(0 {VDD} 0 1n 1n 5u 10u) + VB B 0 DC {VDD} + M1 out A VDD VDD pmos W=20u L=1u + M2 out B VDD VDD pmos W=20u L=1u + M3 out A mid 0 nmos W=10u L=1u + M4 mid B 0 0 nmos W=10u L=1u + C1 out 0 1pF + .TRAN 1n 20u + .MEAS TRAN tphl TRIG V(A) VAL=VDD/2 RISE=1 TARG V(out) VAL=VDD/2 FALL=1 + .MEAS TRAN trise TRIG V(out) VAL=0.1*VDD RISE=1 TARG V(out) VAL=0.9*VDD RISE=1 + .MEAS TRAN tfall TRIG V(out) VAL=0.9*VDD FALL=1 TARG V(out) VAL=0.1*VDD FALL=1 + .MEAS TRAN vout_low FIND V(out) AT=15u + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "tphl", 0.0, 1e-06); + AssertMeasurementBetween(result, "trise", 0.0, 1e-06); + AssertMeasurementBetween(result, "tfall", 0.0, 1e-06); + AssertMeasurementLess(result, "vout_low", 0.5); + } + + // Prompt: Switched-capacitor equivalent resistor using two non-overlapping clocks, capacitor C1, and ideal switches. + [Fact] + public void Switched_Capacitor_Resistor_Equivalent_033e8fd22cb1edb4() + { + var result = RunAcceptedExample( + "deepseek:02268_6c6872edf9a5d4f1:033e8fd22cb1edb4", + """ + * Switched-Capacitor Resistor Equivalent + VIN in 0 DC 1 + C1 ctop 0 1n + S1 in ctop phi1 0 SWMOD + S2 ctop 0 phi2 0 SWMOD + VPHI1 phi1 0 PULSE(0 5 0 10n 10n 40u 100u) + VPHI2 phi2 0 PULSE(0 5 50u 10n 10n 40u 100u) + .MODEL SWMOD SW(RON=10 ROFF=100MEG VT=2 VH=0.5) + .TRAN 1u 5m + .MEAS TRAN I_in AVG I(VIN) FROM=1m TO=5m + .MEAS TRAN R_eq PARAM -1/I_in + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "R_eq", 100000.0, 10000.0); + AssertMeasurementNear(result, "I_in", (-1e-05), 1e-06); + } + + // Prompt: NMOS cascode current mirror with reference branch set by a resistor. + [Fact] + public void NMOS_Cascode_Current_Mirror_7e57a2ab4004c8e4() + { + var result = RunAcceptedExample( + "deepseek:00278_dea37df8268c1144:7e57a2ab4004c8e4", + """ + * NMOS Cascode Current Mirror + M1 d1 d1 0 0 nmos1 W=10u L=1u + M2 d2 bias d1 0 nmos1 W=10u L=1u + M3 d3 d1 0 0 nmos1 W=10u L=1u + M4 out bias d3 0 nmos1 W=10u L=1u + Vmeas outd out DC 0 + Vbias bias 0 DC 4.0 + Vsupply vdd 0 DC 5 + Vref vdd ref DC 0 + Rref1 ref d2 10k + VOUT outd 0 DC 3 + .model nmos1 NMOS(VTO=1 KP=500u LAMBDA=0.02) + .DC VOUT 0 5 0.02 + .OP + .MEAS DC Iref AVG I(Vref) FROM 0 TO 5 + .MEAS DC Iout_at_3v FIND I(Vmeas) AT=3 + .MEAS DC mirror_ratio PARAM='Iout_at_3v / Iref' + .MEAS DC Iout_at_5v FIND I(Vmeas) AT=5 + .MEAS DC rout PARAM='(5-3)/(Iout_at_5v - Iout_at_3v)' + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "mirror_ratio", 0.9, 1.1); + AssertMeasurementGreater(result, "rout", 1000000.0); + } + + // Prompt: Design a CMOS transmission gate sample-and-hold circuit that captures a 500 kHz sinusoid under control of a 1 MHz clock, and measure the held output voltage and droop. + [Fact] + public void CMOS_Transmission_Gate_Sample_and_Hold_f2ddf79bced15362() + { + var result = RunAcceptedExample( + "deepseek:01350_08e3825a4af33ca8:f2ddf79bced15362", + """ + * CMOS Transmission Gate Sample-and-Hold + VDD vdd 0 DC 5 + VIN in 0 SIN(2.5 1 500k) + Vclk clk 0 PULSE(0 5 0 1n 1n 0.5u 1u) + Vclk_bar clkb 0 PULSE(5 0 0 1n 1n 0.5u 1u) + M1 hold clk in 0 nmod W=10u L=1u + M2 hold clkb in vdd pmod W=20u L=1u + Chold hold 0 100p + Ebuf out 0 hold 0 1 + .MODEL nmod NMOS (VTO=1 KP=100u LAMBDA=0.02) + .MODEL pmod PMOS (VTO=-1 KP=50u LAMBDA=0.02) + .TRAN 10n 2u + .MEAS TRAN v_sampled FIND V(out) AT=1.5u + .MEAS TRAN v_hold_end FIND V(out) AT=2u + .MEAS TRAN droop PARAM='(v_sampled - v_hold_end) / v_sampled * 100' + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "v_sampled", 1.4, 1.6); + AssertMeasurementBetween(result, "v_hold_end", 1.4, 1.6); + AssertMeasurementLess(result, "droop", 1.0); + } + + // Prompt: The op-amp amplifies the input sine with high gain, and the diode clamping network limits the output to approximately \xb15.6V, creating a square wave that changes at the zero crossings of the input signal. + [Fact] + public void Zero_Crossing_Detector_using_Op_Amp_with_Diode_Clamping_7c8addc490dffead() + { + var result = RunAcceptedExample( + "deepseek:01610_6d9758482bb4a056:7c8addc490dffead", + """ + * Zero-Crossing Detector using Op-Amp with Diode Clamping + VIN in 0 SIN(0 100m 1k) + R1 in 0 10k + E1 amp_out 0 in 0 100000 + Rout amp_out out 1 + D1 out vpos Dclamp + D2 vneg out Dclamp + Vpos vpos 0 DC 5 + Vneg vneg 0 DC -5 + Rload out 0 10k + .MODEL Dclamp D(IS=1e-14 RS=1) + .TRAN 1u 2m + .MEASURE TRAN t_rise WHEN V(out)=2.5 RISE=1 + .MEASURE TRAN t_fall WHEN V(out)=2.5 FALL=1 + .MEASURE TRAN high_time TRIG V(out) VAL=2.5 RISE=1 TARG V(out) VAL=2.5 FALL=1 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "high_time", 0.0005, 1e-05); + } + + // Prompt: Design a SPICE netlist for a resistive H-pad attenuator intended for balanced 600-ohm lines. It should provide 10 dB attenuation. Include AC analysis and measure the voltage gain and input impedance at 1 kHz. + [Fact] + public void Balanced_H_pad_attenuator_600_ohm_10_dB_7dfcc186f7bbfa25() + { + var result = RunAcceptedExample( + "deepseek:00460_f582287ad47cc833:7dfcc186f7bbfa25", + """ + * Balanced H-pad attenuator, 600 ohm, 10 dB + VIN1 in1_src 0 DC 0 AC 1 0 + VIN2 in2_src 0 DC 0 AC 1 180 + RSRC1 in1_src in1 300 + RSRC2 in2_src in2 300 + R1 in1 n1 156 + R2 in2 n2 156 + R3 n1 out1 156 + R4 n2 out2 156 + R5 n1 n2 422 + RLOAD out1 out2 600 + .OP + .AC DEC 10 10 100k + .MEAS AC v_out FIND V(out1,out2) AT=1k + .MEAS AC v_in FIND V(in1,in2) AT=1k + .MEAS AC atten_db PARAM 20*log10(v_out/v_in) + .MEAS AC v_src FIND V(in1_src,in2_src) AT=1k + .MEAS AC overall_atten_db PARAM 20*log10(v_out/v_src) + .MEAS AC i_in FIND I(R1) AT=1k + .MEAS AC zin PARAM v_in/i_in + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "atten_db", (-10.0), 0.5); + AssertMeasurementNear(result, "zin", 600.0, 50.0); + } + + // Prompt: Class-B BJT push-pull output stage with dual +/-10V supplies. + [Fact] + public void BJT_Class_B_Push_Pull_Output_Stage_c4b6ee05d6878be3() + { + var result = RunAcceptedExample( + "deepseek:01097_a10b4d9fb47ea69a:c4b6ee05d6878be3", + """ + * BJT Class-B Push-Pull Output Stage + VCC vcc 0 10 + VEE vee 0 -10 + VIN in 0 SIN(0 2 1k) + Q1 vcc in out NPN_Model + Q2 vee in out PNP_Model + Rload out 0 1k + .MODEL NPN_Model NPN(IS=1e-14 BF=100 VAF=100) + .MODEL PNP_Model PNP(IS=1e-14 BF=100 VAF=100) + .OP + .TRAN 1e-6 5e-3 0 1e-6 + .MEASURE TRAN Vout_pp PP V(out) FROM=1e-3 TO=5e-3 + .MEASURE TRAN Vout_avg AVG V(out) FROM=1e-3 TO=5e-3 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "Vout_pp", 2.2, 3.0); + AssertMeasurementBetween(result, "Vout_avg", (-0.1), 0.1); + } + + // Prompt: Design a circuit that generates a negative voltage from a 0-5V square wave clock using only diodes and capacitors. Use a charge pump topology. + [Fact] + public void Diode_charge_pump_inverter_6631dbfbe6d071c7() + { + var result = RunAcceptedExample( + "deepseek:00877_08e7a8d60377a01e:6631dbfbe6d071c7", + """ + * Diode charge pump inverter + VCLK clk 0 PULSE(0 5 0 10n 10n 5u 10u) + D1 n1 0 D1N + D2 out n1 D1N + C1 clk n1 1u + C2 out 0 1u + Rload out 0 1k + .MODEL D1N D(IS=1e-12 RS=1) + .TRAN 1u 5m + .MEAS TRAN VOUT_AVG AVG V(out) FROM=4m TO=5m + .MEAS TRAN VOUT_RIPPLE PP V(out) FROM=4m TO=5m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "VOUT_AVG", (-5.0), (-3.0)); + AssertMeasurementLess(result, "VOUT_RIPPLE", 0.5); + } + + // Prompt: Difference amplifier using ideal op-amp E1 with gain 1e5 + [Fact] + public void Difference_Amplifier_073a62c9d648bfb2() + { + var result = RunAcceptedExample( + "deepseek:00328_4885957562a24eb1:073a62c9d648bfb2", + """ + * Difference Amplifier + V1 in1 0 DC 0 AC 1 + V2 in2 0 DC 1 AC 0 + R1 in1 n 10k + R2 n out 20k + R3 in2 p 10k + R4 p 0 20k + E1 out 0 p n 100000 + .OP + .AC DEC 10 1 1MEG + .MEAS OP output_dc FIND V(out) AT=0 + .MEAS AC gain_1k FIND VDB(out) AT=1000 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "output_dc", 2.0, 0.01); + AssertMeasurementNear(result, "gain_1k", 6.02, 0.1); + } + + // Prompt: Design an op-amp differentiator with a series resistor at the input to limit high-frequency gain. + [Fact] + public void Op_Amp_Differentiator_with_High_Frequency_Limit_Resistor_291ae7dd146ea089() + { + var result = RunAcceptedExample( + "deepseek:00348_703662b36b0b6947:291ae7dd146ea089", + """ + * Op-Amp Differentiator with High-Frequency Limit Resistor + VIN in 0 DC 0 AC 1 + C1 in n1 0.1u + Rlim n1 ninv 1k + Rf out ninv 10k + E1 out 0 0 ninv 100000 + .OP + .AC DEC 10 10 100k + .MEAS AC gain10 FIND VDB(out) AT=10 + .MEAS AC gain100 FIND VDB(out) AT=100 + .MEAS AC gain1k FIND VDB(out) AT=1k + .MEAS AC gain10k FIND VDB(out) AT=10k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "gain10", (-30.0), (-20.0)); + AssertMeasurementBetween(result, "gain100", (-10.0), 0.0); + AssertMeasurementBetween(result, "gain1k", 10.0, 20.0); + AssertMeasurementBetween(result, "gain10k", 18.0, 21.0); + } + + // Prompt: Design a diode frequency doubler that takes a 5MHz sinusoidal input and produces a 10MHz output using a parallel LC tank tuned to the second harmonic. Include both transient and AC analyses, and add measurement statements to verify proper operation. + [Fact] + public void Diode_frequency_doubler_with_tuned_load_fcfe21d5b9890d58() + { + var result = RunAcceptedExample( + "deepseek:00814_d47c7818d4418fdc:fcfe21d5b9890d58", + """ + * Diode frequency doubler with tuned load + VIN src 0 DC 0.7 AC 1 SIN(0.7 1.5 5MEG) + RIN src in 50 + D1 in mid Dmod + L1 mid out 10uH + C1 out 0 253pF + Rload out 0 500 + .MODEL Dmod D(IS=1e-14 RS=1 CJO=2p) + .OP + .TRAN 0.01u 20u + .AC DEC 100 100k 100MEG + .MEAS TRAN vout_rms RMS V(out) FROM=10u TO=20u + .MEAS AC vout_max MAX V(out) + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "vout_rms", 0.4, 1.2); + AssertMeasurementBetween(result, "vout_max", 0.7, 1.2); + } + + // Prompt: Design a high-side current sense amplifier using an op-amp and a shunt resistor to sense current from a 12V supply to a 10 ohm load. The amplifier should have a gain of 50 and output a ground-referenced voltage proportional to load current. + [Fact] + public void High_side_current_sense_amplifier_front_end_with_gain_50_ab7ef8676e1edf1d() + { + var result = RunAcceptedExample( + "deepseek:02035_475ba533f0cf5067:ab7ef8676e1edf1d", + """ + * High-side current-sense amplifier front end with gain=50 + Vsupply vsense_top 0 DC 12V + Rshunt vsense_top vsense_bot 0.1 + Rload vsense_bot 0 10 + Vplus vdd 0 DC 15V + R1 vsense_bot inn 1k + R2 inn out 50k + R3 vsense_top inp 1k + R4 inp 0 50k + E1 out 0 inp inn 1e5 + Ccomp out inn 10pF + .OP + .DC Vsupply 0 12 0.1 + .MEAS DC vsens FIND V(vsense_top,vsense_bot) AT=6 + .MEAS DC vout FIND V(out) AT=6 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "vsens", 0.058, 0.061); + AssertMeasurementBetween(result, "vout", 2.9, 3.05); + } + + // Prompt: Second-order MFB Butterworth high-pass filter with nominal cutoff 1kHz + [Fact] + public void MFB_Butterworth_High_Pass_Filter_fc_1kHz_1895df6456edff50() + { + var result = RunAcceptedExample( + "deepseek:01675_dff514736a14ef9a:1895df6456edff50", + """ + * MFB Butterworth High-Pass Filter (fc=1kHz) + VIN in 0 AC 1 DC 0 + E1 out 0 0 nin 100k + C1 in x 10n + C2 x nin 10n + R1 x 0 7.5k + C3 out x 10n + R2 out nin 33.2k + R3 nin 0 1MEG + .AC DEC 100 1 1MEG + .MEAS AC passband_gain FIND VDB(out) AT=10k + .MEAS AC fcutoff WHEN VDB(out)=-3 RISE=1 + .MEAS AC stopband_gain FIND VDB(out) AT=100 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "passband_gain", 0.0, 0.5); + AssertMeasurementBetween(result, "fcutoff", 800.0, 1200.0); + AssertMeasurementLess(result, "stopband_gain", (-35.0)); + } + + // Prompt: A bistable latch made from two NPN transistors cross-coupled with resistors and capacitors for pulse triggering. + [Fact] + public void BJT_Bistable_Multivibrator_Latch_ceb0e051ce3e7b02() + { + var result = RunAcceptedExample( + "deepseek:01163_dde083394c497dbc:ceb0e051ce3e7b02", + """ + * BJT Bistable Multivibrator Latch + Vcc vcc 0 DC 5 + Rc1 out vcc 2.2k + Rc2 out2 vcc 2.2k + Q1 out base1 0 npnmod + Q2 out2 base2 0 npnmod + Rb1 out2 base1 22k + Rb2 out base2 22k + Vset set 0 PULSE(0 -2 1u 1n 1n 1u 5u) + Vreset reset 0 PULSE(0 -2 3u 1n 1n 1u 5u) + Cset set base2 100p + Creset reset base1 100p + .MODEL npnmod NPN(IS=1e-14 BF=100 VAF=50) + .TRAN 0.1u 10u + .MEAS TRAN vout_set FIND V(out) AT=2u + .MEAS TRAN vout_reset FIND V(out) AT=4u + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementLess(result, "vout_set", 1.0); + AssertMeasurementGreater(result, "vout_reset", 4.0); + } + + // Prompt: CMOS NAND2 gate with two PMOS in parallel to VDD and two NMOS in series to ground. + [Fact] + public void CMOS_NAND2_Transient_Response_2ffad10b86c6e09e() + { + var result = RunAcceptedExample( + "deepseek:00293_984083c2130beb7c:2ffad10b86c6e09e", + """ + * CMOS NAND2 Transient Response + M1 out A VDD VDD pmos W=10u L=1u + M2 out B VDD VDD pmos W=10u L=1u + M3 out A n1 0 nmos W=5u L=1u + M4 n1 B 0 0 nmos W=5u L=1u + VDD VDD 0 DC 5 + VA A 0 PULSE(0 5 5n 0.1n 0.1n 20n 40n) + VB B 0 PULSE(0 5 0 0.1n 0.1n 100n 200n) + CL out 0 1pF + .MODEL nmos NMOS(VTO=1 KP=100u LAMBDA=0.02) + .MODEL pmos PMOS(VTO=-1 KP=100u LAMBDA=0.02) + .TRAN 0.1n 50n + .MEASURE TRAN td TRIG V(A) VAL=2.5 RISE=1 TARG V(out) VAL=2.5 FALL=1 + .MEASURE TRAN vout_high FIND V(out) AT=1n + .MEASURE TRAN vout_low FIND V(out) AT=15n + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "td", 1e-10, 5e-09); + AssertMeasurementGreater(result, "vout_high", 4.5); + AssertMeasurementLess(result, "vout_low", 0.5); + } + + // Prompt: This circuit implements an op-amp integrator with an ideal op-amp model. + [Fact] + public void Op_Amp_Integrator_with_Reset_Switch_307b480605e42657() + { + var result = RunAcceptedExample( + "deepseek:00341_6e695202065b3f32:307b480605e42657", + """ + * Op-Amp Integrator with Reset Switch + Vin in 0 PWL(0 0 1m 0 1.000001m 0.5 4m 0.5 4.000001m 0 5.999999m 0 6.000001m -0.5 10m -0.5) + R1 in inv 1k + C1 out inv 1u + E1 out 0 0 inv 1e7 + S1 out inv reset_ctrl 0 SW + .model SW SW(RON=10 ROFF=100MEG VT=2 VH=0.5) + Vreset reset_ctrl 0 PWL(0 5 1m 5 1.000001m 0) + .TRAN 1u 20m + .MEAS TRAN Vout2ms FIND V(out) AT=2m + .MEAS TRAN Vout4ms FIND V(out) AT=4m + .MEAS TRAN Vout6ms FIND V(out) AT=6m + .MEAS TRAN Vout8ms FIND V(out) AT=8m + .MEAS TRAN slope2ms DERIV V(out) AT=2m + .MEAS TRAN slope6ms DERIV V(out) AT=7m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "Vout2ms", (-0.5), 0.05); + AssertMeasurementNear(result, "Vout4ms", (-1.5), 0.05); + AssertMeasurementNear(result, "Vout6ms", (-1.5), 0.05); + AssertMeasurementNear(result, "Vout8ms", (-0.5), 0.05); + AssertMeasurementNear(result, "slope2ms", (-500.0), 50.0); + AssertMeasurementNear(result, "slope6ms", 500.0, 50.0); + } + + // Prompt: Diode-based negative charge pump inverting 5V clock to negative output + [Fact] + public void Diode_Charge_Pump_Inverter_negative_output_880cb5848a8ba990() + { + var result = RunAcceptedExample( + "deepseek:00875_0505d4a8eba64bc1:880cb5848a8ba990", + """ + * Diode Charge Pump Inverter (negative output) + Vclk clk 0 PULSE(0 5 0 1n 1n 10u 20u) + C1 clk n1 1u + D1 n1 0 dmod + D2 out n1 dmod + C2 out 0 10u + Rload out 0 100k + .model dmod D(IS=1e-14 RS=1) + .tran 1u 5m + .meas tran vout_avg AVG V(out) FROM=3m TO=5m + .meas tran vout_min MIN V(out) FROM=3m TO=5m + .meas tran vout_max MAX V(out) FROM=3m TO=5m + .meas tran vout_ripple PP V(out) FROM=3m TO=5m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "vout_avg", (-4.5), (-3.0)); + AssertMeasurementBetween(result, "vout_min", (-4.5), (-3.0)); + AssertMeasurementBetween(result, "vout_max", (-4.0), (-2.5)); + AssertMeasurementBetween(result, "vout_ripple", 0.0, 0.5); + } + + // Prompt: Passive lead-lag compensation network with separate lead and lag stages and an ideal buffer. + [Fact] + public void Lead_lag_compensation_network_with_buffer_ac5f1c72a82fe37c() + { + var result = RunAcceptedExample( + "deepseek:00512_7b6851689f8ebf81:ac5f1c72a82fe37c", + """ + * Lead-lag compensation network with buffer + VIN in 0 DC 0 AC 1 + R1 in out_lead 3.9k + C1 in out_lead 10nF + R2 out_lead 0 2.2k + E1 out_buf 0 out_lead 0 1 + R3 out_buf out 2.2k + R4 out mid 7k + C2 mid 0 1uF + RLOAD out 0 1MEG + .AC DEC 100 10 100k + .MEASURE AC gain_1k FIND VDB(out) AT=1kHz + .MEASURE AC gain_10k FIND VDB(out) AT=10kHz + .MEASURE AC phase_1k FIND VP(out) AT=1kHz + .MEASURE AC phase_10k FIND VP(out) AT=10kHz + .MEASURE AC max_phase MAX VP(out) + .MEASURE AC min_phase MIN VP(out) + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "gain_1k", (-12.0), (-9.0)); + AssertMeasurementBetween(result, "phase_1k", 0.087, 0.262); + AssertMeasurementBetween(result, "max_phase", 0.34, 0.78); + AssertMeasurementLess(result, "min_phase", (-0.087)); + AssertMeasurementGreater(result, "min_phase", (-0.349)); + } + + // Prompt: circuit stretches a short input pulse by charging a capacitor through a diode and discharging it slowly through a resistor + [Fact] + public void RC_Pulse_Stretcher_7d1fd90d8ac4b7b3() + { + var result = RunAcceptedExample( + "deepseek:02363_0fd42d2817afe1cf:7d1fd90d8ac4b7b3", + """ + * RC Pulse Stretcher + VIN in 0 PULSE(0 5 0 10n 10n 1u 500u) + D1 in out DMOD + R out 0 10k + C out 0 10n + .MODEL DMOD D(IS=1e-14 RS=0.1) + .TRAN 1u 300u + .MEAS TRAN t_rise_in WHEN V(in)=2.5 RISE=1 + .MEAS TRAN t_fall_in WHEN V(in)=2.5 FALL=1 + .MEAS TRAN pw_in PARAM t_fall_in - t_rise_in + .MEAS TRAN t_rise_out WHEN V(out)=2.5 RISE=1 + .MEAS TRAN t_fall_out WHEN V(out)=2.5 FALL=1 + .MEAS TRAN pw_out PARAM t_fall_out - t_rise_out + .MEAS TRAN stretch_ratio PARAM pw_out/pw_in + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "stretch_ratio", 50.0, 100.0); + } + + // Prompt: Active twin\u2011T notch filter using a behavioral op\u2011amp as voltage follower. + [Fact] + public void Multiple_feedback_notch_filter_with_Q_enhanced_twin_T_729c3016dba80916() + { + var result = RunAcceptedExample( + "deepseek:01686_642c9ee3591cdd73:729c3016dba80916", + """ + * Multiple-feedback notch filter with Q-enhanced twin-T + Vin in 0 AC 1 + R1 in nres_j 10k + R2 nres_j nfilter 10k + C1 in ncap_j 15.915nF + C2 ncap_j nfilter 15.915nF + C3 nres_j com 31.83nF + R3 ncap_j com 5k + R5 out com 1 + R6 com 0 39 + Eopamp out 0 nfilter out 100000 + .AC DEC 1000 10 100k + .MEAS AC notch_att FIND VDB(out) AT=1k + .MEAS AC gain_100hz FIND VDB(out) AT=100 + .MEAS AC gain_10khz FIND VDB(out) AT=10k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementLess(result, "notch_att", (-40.0)); + AssertMeasurementBetween(result, "gain_100hz", (-1.0), 1.0); + AssertMeasurementBetween(result, "gain_10khz", (-1.0), 1.0); + } + + // Prompt: JFET constant current source with source degenerated resistor + [Fact] + public void JFET_constant_current_source_9ccdfb7c3187b940() + { + var result = RunAcceptedExample( + "deepseek:01413_c8a04301fb9667eb:9ccdfb7c3187b940", + """ + * JFET constant current source + VDD VDD 0 DC 10 + RL VDD D 2k + J1 D 0 S NJFET + RS S 0 1k + .MODEL NJFET NJF(VTO=-2 BETA=1m LAMBDA=0.01) + .OP + .DC VDD 5 15 0.1 + .MEAS DC I_AVG AVG I(RL) + .MEAS DC I_MIN MIN I(RL) + .MEAS DC I_MAX MAX I(RL) + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "I_AVG", 0.0009, 0.0011); + AssertMeasurementBetween(result, "I_MIN", 0.00085, 0.00105); + AssertMeasurementBetween(result, "I_MAX", 0.00095, 0.00115); + } + + // Prompt: CMOS NAND2 gate with 3.3V supply using simple MOSFET models. + [Fact] + public void CMOS_NAND2_Transient_Response_0632fcb204975120() + { + var result = RunAcceptedExample( + "deepseek:00288_576e325f0514a942:0632fcb204975120", + """ + * CMOS NAND2 Transient Response + .model nch NMOS (VTO=1 KP=100u LAMBDA=0.02) + .model pch PMOS (VTO=-1 KP=50u LAMBDA=0.02) + VDD VDD 0 DC 3.3 + VA A 0 PULSE(0 3.3 0 0.1n 0.1n 30n 60n) + VB B 0 PULSE(0 3.3 15n 0.1n 0.1n 30n 60n) + M1 Y A n1 0 nch W=4u L=0.35u + M2 n1 B 0 0 nch W=4u L=0.35u + M3 Y A VDD VDD pch W=4u L=0.35u + M4 Y B VDD VDD pch W=4u L=0.35u + .tran 0.1n 80n + .meas tran v_high FIND V(Y) AT=10n + .meas tran v_low FIND V(Y) AT=25n + .meas tran v_mid1 FIND V(Y) AT=40n + .meas tran v_mid2 FIND V(Y) AT=55n + .end + """); + + AssertAllMeasurementsSuccessful(result); + var v_high = MeasurementValue(result, "v_high"); + var v_low = MeasurementValue(result, "v_low"); + var v_mid1 = MeasurementValue(result, "v_mid1"); + var v_mid2 = MeasurementValue(result, "v_mid2"); + Assert.True(((v_high > 2.5)), CaseLabel(result)); + Assert.True(((v_low < 0.5)), CaseLabel(result)); + Assert.True(((v_mid1 > 2.5)), CaseLabel(result)); + Assert.True(((v_mid2 > 2.5)), CaseLabel(result)); + } + + // Prompt: Widlar current source using two NPN BJTs and emitter degeneration resistor R2 + [Fact] + public void Widlar_BJT_current_source_efd99c3307eeca91() + { + var result = RunAcceptedExample( + "deepseek:01013_6c992f684a856294:efd99c3307eeca91", + """ + * Widlar BJT current source + VCC 1 0 DC 5 + Vsense 1 1a DC 0 + Rref 1a 2 4700 + Q1 2 2 0 npn + Q2 3 2 4 npn + R2 4 0 12000 + Vout_sense 1 3 DC 0 + .MODEL npn NPN(IS=1e-14 BF=200 VAF=100) + .OP + .DC VCC 0 10 0.1 + .MEAS DC IREF FIND I(Vsense) AT=5 + .MEAS DC IOUT FIND I(Vout_sense) AT=5 + .MEAS DC RATIO PARAM='IREF/IOUT' + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "IOUT", 9e-06, 1.1e-05); + AssertMeasurementGreater(result, "RATIO", 50.0); + } + + // Prompt: Common-emitter amplifier using NPN transistor with voltage-divider bias. + [Fact] + public void Common_Emitter_Amplifier_with_Emitter_Degeneration_89c046624d0c2de5() + { + var result = RunAcceptedExample( + "deepseek:00171_d5ab383dc7201d82:89c046624d0c2de5", + """ + * Common-Emitter Amplifier with Emitter Degeneration + VCC VCC 0 DC 15 + VIN in 0 DC 0 AC 1 SIN(0 10m 1k) + R1 VCC base 120k + R2 base 0 22k + RC VCC c 6.2k + RE1 e e1 82 + RE2 e1 0 1.3k + CE e1 0 10u + Q1 c base e NPN_MOD + Cin in base 10u + Cout c out 10u + RL out 0 10k + .MODEL NPN_MOD NPN(BF=100 IS=1e-15) + .OP + .DC VCC 15 15 1 + .AC DEC 10 10 1MEG + .MEASURE DC vc_at_15 FIND V(c) AT=15 + .MEASURE DC ve_at_15 FIND V(e) AT=15 + .MEASURE AC gain_at_1k FIND vm(out) AT=1k + .MEASURE AC gain_db_at_1k FIND vdb(out) AT=1k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "vc_at_15", 7.5, 9.0); + AssertMeasurementBetween(result, "ve_at_15", 1.4, 1.9); + AssertMeasurementBetween(result, "gain_at_1k", 30.0, 40.0); + AssertMeasurementBetween(result, "gain_db_at_1k", 28.0, 34.0); + } + + // Prompt: Diode AND gate with pull-up resistor R1 (1k) to VCC (5V DC). + [Fact] + public void Diode_AND_gate_with_pull_up_resistor_089b39ee2c6c9b24() + { + var result = RunAcceptedExample( + "deepseek:00772_c53695dba2845ad5:089b39ee2c6c9b24", + """ + * Diode AND gate with pull-up resistor + VCC vcc 0 DC 5 + R1 vcc out 1k + VA a 0 PULSE(0 5 1u 1n 1n 2u 5u) + VB b 0 PULSE(0 5 2u 1n 1n 2u 5u) + D1 out a DMOD + D2 out b DMOD + .MODEL DMOD D(IS=1e-12 RS=1) + .TRAN 0.1n 10u 0 10n + .MEAS TRAN vout_high FIND v(out) AT=2.5u + .MEAS TRAN vout_low FIND v(out) AT=3.5u + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "vout_high", 4.5, 5.5); + AssertMeasurementBetween(result, "vout_low", 0.3, 0.9); + Assert.True(((MeasurementValue(result, "vout_high") > MeasurementValue(result, "vout_low"))), CaseLabel(result)); + } + + // Prompt: Electret microphone biased via 2.2k pull-up to 5V supply. + [Fact] + public void Electret_microphone_bias_and_preamplifier_1b323305ab450b53() + { + var result = RunAcceptedExample( + "deepseek:02174_2ed446751dce156b:1b323305ab450b53", + """ + * Electret microphone bias and preamplifier + VCC vcc 0 DC 5 + Vmic node_a 0 AC 1 + C1 node_a mic 10uF + R_pullup vcc mic 2.2k + C_couple mic b 10uF + R1 vcc b 20k + R2 b 0 10k + Q1 c b e npnmod + .model npnmod NPN(IS=1e-14 BF=200 VAF=100) + Rc vcc c 1k + Re e 0 1k + Ce e 0 100uF + Cout c out 10uF + RL out 0 10k + .OP + .DC VCC 5 5 1 + .AC DEC 20 10 100k + .MEAS DC vc FIND V(c) AT=5 + .MEAS DC vb FIND V(b) AT=5 + .MEAS DC ve FIND V(e) AT=5 + .MEAS AC gain_mid FIND VDB(out) AT=1k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "vc", 4.066, 0.2); + AssertMeasurementNear(result, "vb", 1.634, 0.1); + AssertMeasurementNear(result, "ve", 0.934, 0.1); + AssertMeasurementNear(result, "gain_mid", 31.0, 1.0); + } + + // Prompt: Two-stage common-emitter BJT amplifier with capacitive interstage coupling between two parallel LC tanks. + [Fact] + public void Double_tuned_RF_transformer_equivalent_amplifier_ff6abc62a5030f31() + { + var result = RunAcceptedExample( + "deepseek:02051_8cd94bfcbd2f71b1:ff6abc62a5030f31", + """ + * Double-tuned RF transformer-equivalent amplifier + VCC vcc 0 DC 10 + VIN in 0 AC 1 + CIN in b1 0.1u + R1 vcc b1 22k + R2 b1 0 4.7k + RE1 e1 0 1k + CE1 e1 0 0.1u + Q1 coll1 b1 e1 npnmod + RC1 vcc coll1 5k + CC1 coll1 t1 0.1u + L1 t1 0 1u + C1 t1 0 250p + R1P t1 0 620 + CC12 t1 t2 30p + L2 t2 0 1u + C2 t2 0 250p + R2P t2 0 620 + CC2 t2 b2 0.1u + R3 vcc b2 22k + R4 b2 0 4.7k + RE2 e2 0 1k + CE2 e2 0 0.1u + Q2 coll2 b2 e2 npnmod + RC2 vcc coll2 5k + COUT coll2 out 0.1u + RL out 0 50 + .MODEL npnmod NPN(IS=1e-14 BF=100 VAF=50) + .OP + .AC DEC 100 1MEG 100MEG + .MEAS AC gain10m FIND VDB(out) AT=10MEG + .MEAS AC f_low WHEN VDB(out)=17 RISE=1 + .MEAS AC f_high WHEN VDB(out)=17 FALL=LAST + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementGreater(result, "gain10m", 15.0); + AssertMeasurementLess(result, "f_low", 10000000.0); + AssertMeasurementGreater(result, "f_high", 10000000.0); + } + + // Prompt: Open\u2011loop peak detector with E1 (gain 100k) and diode D1 charges hold capacitor C1. + [Fact] + public void Active_Peak_Detector_with_Op_Amp_Buffer_and_Reset_0643eeedb5104724() + { + var result = RunAcceptedExample( + "deepseek:00732_921c15cce7fd142d:0643eeedb5104724", + """ + * Active Peak Detector with Op-Amp Buffer and Reset + VIN in 0 SIN(2.5 2.5 1k 0 0) + E1 ea_out_raw 0 in hold 100k + R1_lim ea_out_raw ea_out 1k + VCC vcc 0 DC 6 + VEE vee 0 DC 0 + Dpos ea_out vcc dclamp + Dneg vee ea_out dclamp + .model dclamp D(IS=1e-12) + S2 ea_out ea_out_sw reset_n 0 swmod_series + D1 ea_out_sw hold dmod + C1 hold 0 1u + R1 hold 0 10k + S1 hold 0 reset 0 swmod_reset + E2 out 0 hold 0 1 + VRESET reset 0 PULSE(0 5 5m 1u 1u 100u 20m) + VRESET_N reset_n 0 PULSE(5 0 5m 1u 1u 100u 20m) + .MODEL dmod D(IS=1n RS=1) + .MODEL swmod_series SW(RON=10 ROFF=100MEG VT=2 VH=0.5) + .MODEL swmod_reset SW(RON=10 ROFF=100MEG VT=2 VH=0.5) + .TRAN 1u 10m 0 1u + .MEAS TRAN max_pre_reset MAX V(out) FROM=0 TO=4.9m + .MEAS TRAN v_reset_discharge FIND V(out) AT=5.05m + .MEAS TRAN max_post_reset MAX V(out) FROM=5.2m TO=10m + .MEAS TRAN v_at_6m FIND V(out) AT=6m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "max_pre_reset", 5.0, 0.2); + AssertMeasurementNear(result, "max_post_reset", 5.0, 0.2); + AssertMeasurementLess(result, "v_reset_discharge", 0.1); + AssertMeasurementBetween(result, "v_at_6m", 4.0, 5.0); + } + + // Prompt: Howland current pump using an ideal op\u2011amp (E source) with matched 1.1 k\u03a9 resistors sets output current \u2248 Vin/R1. + [Fact] + public void Howland_Current_Pump_with_Ideal_Op_Amp_6fac57312e13554a() + { + var result = RunAcceptedExample( + "deepseek:01522_47364d558c2854a9:6fac57312e13554a", + """ + * Howland Current Pump with Ideal Op-Amp + Vin in 0 DC 1 AC 1 + R1 in vn 1.1k + R2 out vn 1.1k + R3 out vp 1.1k + R4 vp 0 1.1k + Eop out 0 vp vn 1e5 + Vctrl ctrl 0 DC 0 + Rload out vp R=100 + 900*V(ctrl) + .dc Vctrl 0 1 0.1 + .ac dec 10 1 1e6 + .meas DC I_100 FIND I(Rload) AT=0 + .meas DC I_500 FIND I(Rload) AT=0.444444 + .meas DC I_1000 FIND I(Rload) AT=1 + .meas AC AC_GAIN FIND I(Rload) AT=1e3 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "I_100", 0.0009, 0.00092); + AssertMeasurementBetween(result, "I_500", 0.0009, 0.00092); + AssertMeasurementBetween(result, "I_1000", 0.0009, 0.00092); + var i100 = MeasurementValue(result, "I_100"); + var i1000 = MeasurementValue(result, "I_1000"); + Assert.True(((Math.Abs((i1000 - i100)) < 1e-05)), CaseLabel(result)); + AssertMeasurementNear(result, "AC_GAIN", 0.00091, 0.0001); + } + + // Prompt: Positive diode clamper with a 3V DC reference in series with the diode. + [Fact] + public void Positive_diode_clamper_with_3V_reference_982d9a483d1b1c81() + { + var result = RunAcceptedExample( + "deepseek:00140_86b77d9539c58885:982d9a483d1b1c81", + """ + * Positive diode clamper with 3V reference + VIN in 0 SIN(0 5 1k 0 0 0) + C1 in out 1u + D1 clamp out DMOD + Vclamp clamp 0 DC 3 + Rload out 0 100k + .MODEL DMOD D(IS=1e-14 N=1 RS=1) + .TRAN 10u 1 0.5 10u + .MEAS TRAN MIN_OUT MIN V(out) FROM=0.5 TO=1 + .MEAS TRAN MAX_OUT MAX V(out) FROM=0.5 TO=1 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "MIN_OUT", 2.0, 2.5); + AssertMeasurementBetween(result, "MAX_OUT", 11.5, 13.0); + } + + // Prompt: Self-biased common-emitter amplifier using an NPN BJT with a voltage-divider bias network (R1, R2). + [Fact] + public void Self_biased_common_emitter_amplifier_with_partially_bypassed_emitter_resistor_d0831a22f9a2d149() + { + var result = RunAcceptedExample( + "deepseek:00907_ac2813bb1dbd3064:d0831a22f9a2d149", + """ + * Self-biased common-emitter amplifier with partially bypassed emitter resistor + VCC vcc 0 DC 9V + VIN in 0 DC 0 AC 1 + R1 vcc b 75k + R2 b 0 18k + RC vcc c 4.7k + RE1 e e1 390 + RE2 e1 0 620 + CE e1 0 100uF + CIN in b 10uF + COUT c out 10uF + RL out 0 10k + Q1 c b e NPNmod + .MODEL NPNmod NPN(IS=1e-14 BF=200 VAF=100) + .OP + .DC VCC 9 9 1 + .AC DEC 10 10 100k + .MEAS DC Vc_dc FIND V(c) AT=9 + .MEAS AC gain_db FIND VDB(out) AT=1000 + .MEAS AC gain_linear FIND VM(out) AT=1000 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "Vc_dc", 2.0, 7.0); + AssertMeasurementBetween(result, "gain_linear", 5.0, 15.0); + AssertMeasurementBetween(result, "gain_db", 15.0, 25.0); + } + + // Prompt: A 10\xb5A current source charges a 1nF capacitor to generate a linear ramp. A voltage-controlled switch resets the ramp periodically with a 1.67kHz pulse. + [Fact] + public void Single_slope_ADC_ramp_and_comparator_front_end_b66ff781d0d0464c() + { + var result = RunAcceptedExample( + "deepseek:02209_0338dc0c2b573b42:b66ff781d0d0464c", + """ + * Single-slope ADC ramp and comparator front end + VIN in 0 DC 2.5 + I1 0 ramp DC 10uA + C1 ramp 0 1nF + S1 ramp 0 reset 0 swmod + Vreset reset 0 PULSE(5 0 0 1n 1n 500u 600u) + E1 out 0 ramp in 1e6 + Rload out 0 10k + .MODEL swmod SW(RON=0.1 ROFF=10MEG VT=2.5 VH=0.5) + .TRAN 0.1u 2m + .MEAS TRAN trig_time WHEN V(out)=2.5 CROSS=1 + .MEAS TRAN ramp_at_trig FIND V(ramp) WHEN V(out)=2.5 CROSS=1 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "trig_time", 0.00025, 2.5e-05); + AssertMeasurementNear(result, "ramp_at_trig", 2.5, 0.01); + } + + // Prompt: Passive potentiometer volume control with source impedance. + [Fact] + public void Potentiometer_Volume_Control_with_Source_Impedance_ad0a5e9698c1b50d() + { + var result = RunAcceptedExample( + "deepseek:00479_5bfb82bfbf1e881f:ad0a5e9698c1b50d", + """ + * Potentiometer Volume Control with Source Impedance + V1 in 0 AC 1 + Rs in n1 1k + Rtop n1 out 5k + Rbot out 0 5k + .OP + .AC dec 10 10 100k + .MEASURE AC vout FIND VM(out) AT=1000 + .MEASURE AC atten_db FIND VDB(out) AT=1000 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "vout", 0.4545, 0.05); + AssertMeasurementBetween(result, "atten_db", (-7.0), (-6.0)); + } + + // Prompt: Design an envelope detector circuit for AM demodulation using a series diode, a parallel capacitor, and a load resistor. + [Fact] + public void Envelope_Detector_for_AM_Demodulation_ff23a9f92cfa4779() + { + var result = RunAcceptedExample( + "deepseek:00155_cb801a608c03f638:ff23a9f92cfa4779", + """ + * Envelope Detector for AM Demodulation + Vcar carrier 0 SIN(0 1 100k) + Vmod mod 0 SIN(0 1 1k) + Eam am 0 value={V(carrier,0)*(1+V(mod,0))} + D1 am out DMOD + R1 out 0 10k + C1 out 0 10n + .MODEL DMOD D(IS=1e-12 RS=1) + .TRAN 1u 2m + .MEAS TRAN Vmax MAX V(out) FROM=0.5m TO=2m + .MEAS TRAN Vmin MIN V(out) FROM=0.5m TO=2m + .MEAS TRAN Vdemod PARAM Vmax - Vmin + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "Vdemod", 0.5, 2.0); + AssertMeasurementGreater(result, "Vmax", 0.5); + AssertMeasurementLess(result, "Vmin", 0.5); + } + + // Prompt: Design a diode clamp circuit to protect an analog input from voltages outside 0-5V. Show the transient response to a pulse swinging from -2V to 7V. + [Fact] + public void Diode_input_protection_clamping_circuit_e4249b99a3243f10() + { + var result = RunAcceptedExample( + "deepseek:00781_6df37d5c08d2c32e:e4249b99a3243f10", + """ + * Diode input protection clamping circuit + VCC vcc 0 DC 5 + VIN in 0 PULSE(-2 7 1u 1u 1u 10u 20u) + R1 in prot 1k + D1 prot vcc DMOD + D2 0 prot DMOD + Rload prot 0 10MEG + .model DMOD D(IS=1e-14 RS=1) + .tran 1u 40u + .meas TRAN vmax MAX V(prot) + .meas TRAN vmin MIN V(prot) + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "vmax", (-2.0), 5.8); + AssertMeasurementBetween(result, "vmin", (-0.8), 7.0); + } + + // Prompt: Wide-swing cascode NMOS current mirror with 100\xb5A reference current. + [Fact] + public void Wide_swing_cascode_NMOS_current_mirror_7b329f260d1f60ab() + { + var result = RunAcceptedExample( + "deepseek:01291_ae05af9749117f4a:7b329f260d1f60ab", + """ + * Wide-swing cascode NMOS current mirror + .MODEL nmos NMOS (VTO=0.7 KP=100u LAMBDA=0.02) + VDD vdd 0 DC 5 + IREF vdd n2 DC 100u + M1 n1 n1 0 0 nmos w=10u l=1u + M2 n2 n2 n1 0 nmos w=10u l=1u + M3 n3 n1 0 0 nmos w=10u l=1u + M4 out n2 n3 0 nmos w=10u l=1u + V1 out 0 DC 0 + .OP + .DC V1 0 5 0.01 + .MEAS DC iout_5 FIND i(v1) AT=5 + .MEAS DC iout_2p5 FIND i(v1) AT=2.5 + .MEAS DC iout_1 FIND i(v1) AT=1 + .MEAS DC iout_max MIN i(v1) FROM=0 TO=5 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "iout_5", (-0.00011), (-9e-05)); + AssertMeasurementBetween(result, "iout_2p5", (-0.00011), (-9e-05)); + AssertMeasurementBetween(result, "iout_1", (-0.000105), (-8e-05)); + AssertMeasurementBetween(result, "iout_max", (-0.000115), (-9.5e-05)); + } + + // Prompt: Sample-and-hold circuit with DC input, clocked switch, hold capacitor, and unity-gain buffer. + [Fact] + public void Sample_and_hold_with_DC_input_affaa78bd2d18de8() + { + var result = RunAcceptedExample( + "deepseek:02233_b248fcb93d7a9a46:affaa78bd2d18de8", + """ + * Sample-and-hold with DC input + VIN input 0 DC 1 + RI input swnode 100 + S1 swnode capnode clk 0 SWITCH + .MODEL SWITCH SW(RON=1 ROFF=1e12 VT=2.5) + CHOLD capnode 0 10n + E_BUF out 0 capnode 0 1 + RLOAD out 0 100k + VCLK clk 0 PULSE(0 5 0 1n 1n 0.5u 2u) + .TRAN 1n 10u + .MEAS TRAN v_sampled FIND V(out) AT=0.49u + .MEAS TRAN v_held FIND V(out) AT=1.5u + .END + """); + + AssertAllMeasurementsSuccessful(result); + var v_sampled = MeasurementValue(result, "v_sampled"); + var v_held = MeasurementValue(result, "v_held"); + var error = Math.Abs((v_sampled - v_held)); + Assert.True(((error < 1e-06)), CaseLabel(result)); + } + + // Prompt: CMOS double-balanced switching mixer with differential LO drive. + [Fact] + public void CMOS_Double_Balanced_Switching_Mixer_with_Differential_LO_Drive_8fe593874b645d06() + { + var result = RunAcceptedExample( + "deepseek:02091_9d9c63de8d6f0ee7:8fe593874b645d06", + """ + * CMOS Double-Balanced Switching Mixer with Differential LO Drive + VDD VDD 0 DC 5 + I_TAIL tail 0 DC 1m + R1 out1 VDD 1k + R2 out2 VDD 1k + C1 out1 out2 0.5p + VLOp lopnode 0 PULSE(0 5 0 10p 10p 490p 1n) + VLOm lonode 0 PULSE(0 5 500p 10p 10p 490p 1n) + VRFp gaterf_p 0 SIN(1.0 0.05 1.01G 0 0) + VRFm gaterf_n 0 SIN(1.0 0.05 1.01G 0 0 180) + M1 out1 lopnode src1 0 nmos W=10u L=0.18u + M2 out2 lonode src1 0 nmos W=10u L=0.18u + M5 out1 lonode src2 0 nmos W=10u L=0.18u + M6 out2 lopnode src2 0 nmos W=10u L=0.18u + M3 src1 gaterf_p tail 0 nmos W=20u L=0.18u + M4 src2 gaterf_n tail 0 nmos W=20u L=0.18u + .MODEL nmos NMOS(LEVEL=1 VTO=0.7 KP=200U LAMBDA=0.02) + .TRAN 0.01n 200n + .MEAS TRAN if_pp PP V(out1,out2) FROM=100n TO=200n + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "if_pp", 0.5, 0.8); + } + + // Prompt: Design a half-wave rectifier circuit using a 1N4148 diode, 10uF smoothing capacitor, and 1k load resistor. Supply a 10V peak 1kHz sine wave. Simulate transient response and measure ripple and average output voltage. + [Fact] + public void Half_wave_rectifier_with_smoothing_capacitor_and_resistive_load_e46d030ce14738fa() + { + var result = RunAcceptedExample( + "deepseek:00112_9c118e20536da72b:e46d030ce14738fa", + """ + * Half-wave rectifier with smoothing capacitor and resistive load + VIN in 0 SIN(0 10 1k) + D1 in out D1N4148 + C1 out 0 10uF + R1 out 0 1k + .MODEL D1N4148 D(IS=1n RS=1) + .TRAN 0.1m 20m + .MEASURE TRAN Vout_avg AVG V(out) FROM=10m TO=20m + .MEASURE TRAN Vripple PP V(out) FROM=10m TO=20m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "Vout_avg", 8.0, 10.0); + AssertMeasurementBetween(result, "Vripple", 0.5, 1.5); + } + + // Prompt: Open-loop inverting buck-boost converter with 12 V input, 50 kHz switching frequency, 50% duty cycle, 100 uH inductor, diode, 100 uF output capacitor, and 10 ohm load. + [Fact] + public void Inverting_Buck_Boost_Open_Loop_Converter_8e51174a16764c9e() + { + var result = RunAcceptedExample( + "deepseek:01950_2fde03c323794b08:8e51174a16764c9e", + """ + * Inverting Buck-Boost Open-Loop Converter + V1 Vin 0 DC 12 + Vgate gate 0 PULSE(0 5 0 10n 10n 10u 20u) + S1 Vin SW gate 0 sw_mod + L1 SW 0 100u + D1 out SW D_DIODE + C1 out 0 100u + R1 out 0 10 + .MODEL sw_mod SW(RON=0.01 ROFF=100MEG VT=2 VH=0.5) + .MODEL D_DIODE D(IS=1e-12 RS=0.01) + B_Pin in_power 0 V = -I(V1)*V(Vin) + B_Pout out_power 0 V = V(out)*I(R1) + .TRAN 0.1u 20m + .MEAS TRAN Vout_avg AVG V(out) FROM=10m TO=20m + .MEAS TRAN Vout_ripple PP V(out) FROM=19.98m TO=20m + .MEAS TRAN avg_in_power AVG V(in_power) FROM=10m TO=20m + .MEAS TRAN avg_out_power AVG V(out_power) FROM=10m TO=20m + .MEAS TRAN efficiency PARAM avg_out_power/avg_in_power + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "Vout_avg", (-13.0), (-11.0)); + AssertMeasurementLess(result, "Vout_ripple", 2.0); + AssertMeasurementGreater(result, "efficiency", 0.7); + } + + // Prompt: Bandpass L-match impedance transformer converting a 50 \u03a9 source to a 25 \u03a9 load at 10 MHz. + [Fact] + public void Band_pass_L_match_impedance_transformer_7f11b24f228ef23a() + { + var result = RunAcceptedExample( + "deepseek:00682_363a09b529bbbe6d:7f11b24f228ef23a", + """ + * Band-pass L-match impedance transformer + V1 in 0 AC 1 + Rs in n1 50 + C1 n1 0 204.9p + L1 n1 n2 362.2n + L2 n2 0 874.3n + C2 n2 out 989.1p + RL out 0 25 + .AC DEC 100 1k 100MEG + .MEASURE AC vout_db_10meg FIND Vdb(out) AT=10MEG + .MEASURE AC vout_db_max MAX Vdb(out) + .END + """); + + AssertAllMeasurementsSuccessful(result); + var vout_db_10meg = MeasurementValue(result, "vout_db_10meg"); + var vout_db_max = MeasurementValue(result, "vout_db_max"); + Assert.True(((!Equals(vout_db_10meg, null)) && (!Equals(vout_db_max, null))), CaseLabel(result)); + Assert.True((((-9.5) < vout_db_max) && (vout_db_max < (-8.5))), CaseLabel(result)); + Assert.True(((Math.Abs((vout_db_10meg - vout_db_max)) < 0.2)), CaseLabel(result)); + } + + // Prompt: Open-loop boost converter with NMOS switch driven by 100kHz PWM. + [Fact] + public void Open_Loop_Boost_Converter_with_NMOS_Switch_4029708957c14121() + { + var result = RunAcceptedExample( + "deepseek:02335_0c33f4bf874ecbc5:4029708957c14121", + """ + * Open-Loop Boost Converter with NMOS Switch + VIN in 0 DC 5 + VCLK gate 0 PULSE(0 5 0 10n 10n 5u 10u) + L1 in sw 100u + M1 sw gate 0 0 NMOD + D1 sw out DMOD + C1 out 0 470u + Rload out 0 10 + .MODEL NMOD NMOS(VTO=2.5 KP=4 LAMBDA=0.01) + .MODEL DMOD D(IS=1e-12 RS=0.01 BV=100) + .TRAN 10n 5ms 0s 10n + .MEASURE TRAN Vout_avg AVG V(out) FROM=4ms TO=5ms + .MEASURE TRAN Vout_ripple PP V(out) FROM=4ms TO=5ms + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "Vout_avg", 9.0, 11.0); + AssertMeasurementBetween(result, "Vout_ripple", 0.0, 0.5); + } + + // Prompt: Two-pole passive RC ladder low-pass filter + [Fact] + public void Two_pole_passive_RC_ladder_low_pass_filter_099b98472db6e18e() + { + var result = RunAcceptedExample( + "deepseek:00044_246f62bfcc4a5a97:099b98472db6e18e", + """ + * Two-pole passive RC ladder low-pass filter + VIN in 0 AC 1 + R1 in v1 2.2k + C1 v1 0 10n + R2 v1 out 4.7k + C2 out 0 1n + .ac dec 100 10 1Meg + .meas ac g0 find VDB(out) at=10 + .meas ac f3db when VDB(out)=-3 + .meas ac g_100k find VDB(out) at=100k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "f3db", 5000.0, 10000.0); + AssertMeasurementNear(result, "g0", 0.0, 0.5); + AssertMeasurementLess(result, "g_100k", (-20.0)); + } + + // Prompt: A diode steering network clamps the protected node PROT to safe voltage levels. + [Fact] + public void Diode_steering_network_for_input_protection_071673a6b8391023() + { + var result = RunAcceptedExample( + "deepseek:00780_216a6ed8de8c3eb2:071673a6b8391023", + """ + * Diode steering network for input protection + VDD VDD 0 DC 3.3 + Vin IN 0 PULSE(-10 10 0 10n 10n 100u 200u) + R1 IN PROT 1k + D1 PROT VDD DMOD + D2 0 PROT DMOD + .MODEL DMOD D(IS=1e-14 RS=1) + .TRAN 1u 300u + .MEASURE TRAN Vmax MAX V(PROT) FROM=0 TO=300u + .MEASURE TRAN Vmin MIN V(PROT) FROM=0 TO=300u + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "Vmax", 3.5, 4.5); + AssertMeasurementBetween(result, "Vmin", (-1.5), 0.0); + } + + // Prompt: 4-bit binary-weighted resistor DAC using ideal op-amp and voltage-controlled switches. + [Fact] + public void Binary_weighted_resistor_DAC_4_bit_a3fe55a1708ca1dd() + { + var result = RunAcceptedExample( + "deepseek:02191_b60aede5d95184d3:a3fe55a1708ca1dd", + """ + * Binary-weighted resistor DAC - 4-bit + Vref ref 0 DC 5 + Vb0 b0 0 PULSE(0 5 1u 10n 10n 1u 2u) + Vb1 b1 0 PULSE(0 5 2u 10n 10n 2u 4u) + Vb2 b2 0 PULSE(0 5 4u 10n 10n 4u 8u) + Vb3 b3 0 PULSE(0 5 8u 10n 10n 8u 16u) + .model swmod SW(RON=10 ROFF=100MEG VT=2.5 VH=0.5) + S0 ref n1 b0 0 swmod + S1 ref n2 b1 0 swmod + S2 ref n3 b2 0 swmod + S3 ref n4 b3 0 swmod + R0 n1 inv 80k + R1 n2 inv 40k + R2 n3 inv 20k + R3 n4 inv 10k + Rf out inv 5.33k + E_opamp out 0 0 inv 100000 + .TRAN 0.1u 16u + .MEAS TRAN vout_0 FIND V(out) AT=0.5u + .MEAS TRAN vout_1 FIND V(out) AT=1.5u + .MEAS TRAN vout_15 FIND V(out) AT=15.5u + .MEAS TRAN vout_max MAX V(out) FROM=0 TO=16u + .MEAS TRAN vout_min MIN V(out) FROM=0 TO=16u + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "vout_0", 0.0, 0.1); + AssertMeasurementNear(result, "vout_15", (-5.0), 0.1); + AssertMeasurementNear(result, "vout_1", (-0.3333), 0.01); + AssertMeasurementLess(result, "vout_max", 0.1); + AssertMeasurementGreater(result, "vout_min", (-5.1)); + } + + // Prompt: Buck converter with 24V input, 220uH inductor, 100uF capacitor, 20 Ohm load, switching at 50kHz. + [Fact] + public void Buck_Converter_Open_Loop_Corrected_Diode_030a9b0cb737a3c8() + { + var result = RunAcceptedExample( + "deepseek:02322_b984fd72ffc313fe:030a9b0cb737a3c8", + """ + * Buck Converter Open Loop - Corrected Diode + VIN in 0 DC 24 + VPWM gate 0 PULSE(0 10 0 10n 10n 6u 20u) + S1 in sw_node gate 0 Smod + D1 0 sw_node Dideal + L1 sw_node out 220u IC=0 + C1 out 0 100u IC=0 + RLOAD out 0 20 + .MODEL Smod SW(RON=0.1 ROFF=1MEG VT=5 VH=0.5) + .MODEL Dideal D(IS=1e-12 RS=0.1 BV=100) + .IC V(out)=0 + .TRAN 1u 10m 0 1u + .MEASURE TRAN Vout_avg AVG V(out) FROM=5m TO=10m + .MEASURE TRAN Vout_ripple PP V(out) FROM=5m TO=10m + .MEASURE TRAN I_L_avg AVG I(L1) FROM=5m TO=10m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "Vout_avg", 7.2, 0.5); + AssertMeasurementLess(result, "Vout_ripple", 1.0); + AssertMeasurementGreater(result, "I_L_avg", 0.1); + } + + // Prompt: Create a full-wave bridge rectifier using four diodes, driven by a 10V peak 50Hz sinusoidal source. Include a 100\xb5F filter capacitor across a 1k\u03a9 load. Simulate the transient response to observe the steady-state output voltage and measure its average and ripple. + [Fact] + public void Full_wave_bridge_rectifier_with_filter_capacitor_c24220d95798cc66() + { + var result = RunAcceptedExample( + "deepseek:00125_956a77a92ac20b48:c24220d95798cc66", + """ + * Full-wave bridge rectifier with filter capacitor + V1 1 2 SIN(0 10 50) + D1 1 out dmod + D2 2 out dmod + D3 0 1 dmod + D4 0 2 dmod + Rload out 0 1k + Cload out 0 100u + .MODEL dmod D(IS=1n RS=1) + .TRAN 0.1ms 100ms + .MEASURE TRAN Vout_avg AVG V(out) FROM=50ms TO=100ms + .MEASURE TRAN Vripple PP V(out) FROM=50ms TO=100ms + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "Vout_avg", 7.5, 9.0); + AssertMeasurementBetween(result, "Vripple", 0.5, 1.5); + } + + // Prompt: Common-collector NPN BJT amplifier with resistive divider biasing and AC-coupled input. + [Fact] + public void Emitter_Follower_Buffer_with_AC_Coupled_Input_ea044aa802252630() + { + var result = RunAcceptedExample( + "deepseek:00178_ea044aa802252630:ea044aa802252630", + """ + * Emitter Follower Buffer with AC-Coupled Input + VCC VCC 0 DC 5 + VIN IN_SIG 0 AC 1 SIN(0 0.1 1k) + C1 IN_SIG BASE 10u + R1 VCC BASE 10k + R2 BASE 0 18k + Q1 VCC BASE EMITTER npn_model + RE EMITTER 0 1k + RL EMITTER 0 10k + .model npn_model NPN(IS=1e-14 BF=100 VAF=50) + .OP + .AC DEC 10 1 100MEG + .MEASURE AC gain MAX V(EMITTER) + .MEASURE AC gain_db MAX VDB(EMITTER) + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "gain", 0.9, 1.1); + AssertMeasurementNear(result, "gain_db", 0.0, 1.0); + } + + // Prompt: Inverting amplifier with R1=1k\u03a9 and Rf=10k\u03a9 for a nominal gain of -10. + [Fact] + public void Inverting_op_amp_amplifier_with_input_bias_compensation_resistor_e02f251311bcf361() + { + var result = RunAcceptedExample( + "deepseek:01437_32c965b59903b451:e02f251311bcf361", + """ + * Inverting op-amp amplifier with input bias compensation resistor + VIN in 0 DC 0 AC 1 + R1 in neg 1k + Rf out neg 10k + .param Rpar = 1000*10000/(1000+10000) + Rcomp pos 0 {Rpar} + IBIASP 0 pos DC 1uA + IBIASN 0 neg DC 1uA + E1 out 0 pos neg 1e9 + .DC VIN 0 0 1 + .AC DEC 10 1 1MEG + .MEAS DC Vout_offset FIND V(out) AT=0 + .MEAS AC gain_mag FIND VM(out) AT=1k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "Vout_offset", 0.0, 1e-09); + AssertMeasurementNear(result, "gain_mag", 10.0, 1e-06); + } + + // Prompt: Design a resistive attenuator using a pi topology that provides about 6 dB of voltage loss. Use only resistors and a voltage source. Include .OP and .AC analyses, and measure the attenuation in dB at 1 kHz. + [Fact] + public void Resistive_attenuator_pad_pi_topology_a4d3f5a49f9a85d7() + { + var result = RunAcceptedExample( + "deepseek:00005_a4d3f5a49f9a85d7:a4d3f5a49f9a85d7", + """ + * Resistive attenuator pad, pi topology + V1 in 0 DC 1 AC 1 + R1 in 0 1k + R2 in out 50 + R3 out 0 50 + .OP + .AC DEC 10 1 1MEG + .MEAS AC vout FIND v(out) AT=1kHz + .MEAS AC vin FIND v(in) AT=1kHz + .MEAS AC attenuation_db PARAM 20*log10(vout/vin) + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "attenuation_db", (-6.1), (-5.9)); + } + + // Prompt: Series resonant trap filter using a shunt LC branch to notch out 5 kHz. + [Fact] + public void Series_Resonant_Trap_Notch_Filter_499a713d96ea267d() + { + var result = RunAcceptedExample( + "deepseek:00559_0321f9735d0e939a:499a713d96ea267d", + """ + * Series Resonant Trap Notch Filter + V1 in 0 DC 0 AC 1 + R1 in out 1k + L1 out 1 10m + C1 1 0 100n + .AC DEC 100 100 100k + .MEAS AC notch_db MIN VDB(out) + .MEAS AC notch_freq WHEN VDB(out)=-40 CROSS=1 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementLess(result, "notch_db", (-40.0)); + AssertMeasurementBetween(result, "notch_freq", 4900.0, 5100.0); + } + + // Prompt: Create an L-section matching network to match a 50 Ohm source to a 200 Ohm load at 100 MHz using a low-pass topology. + [Fact] + public void L_section_matching_network_50_Ohm_to_200_Ohm_at_100_MHz_6d1e8e65882bdcf0() + { + var result = RunAcceptedExample( + "deepseek:00104_6d1e8e65882bdcf0:6d1e8e65882bdcf0", + """ + * L-section matching network: 50 Ohm to 200 Ohm at 100 MHz + + * Source with internal resistance + Vs in 0 AC 1 + Rs in a 50 + + * L-match: series L, shunt C + L1 a b 138n + C1 b 0 13.8p + + * Load + RL b 0 200 + + * AC analysis + .AC DEC 10 1MEG 1G + + * Measurements at design frequency + .MEAS AC vout_db FIND VDB(b) AT=100MEG + .MEAS AC vout_max MAX VDB(b) FROM 1MEG TO 1G + + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "vout_db", 0.0, 1.0); + AssertMeasurementNear(result, "vout_max", 0.0, 1.0); + } + + // Prompt: Two-stage passive RC low-pass filter formed by cascading R1-C1 and R2-C2 sections. + [Fact] + public void Multi_section_RC_low_pass_anti_alias_filter_a9e28fc708157f98() + { + var result = RunAcceptedExample( + "deepseek:00641_6dd9aab43e98aace:a9e28fc708157f98", + """ + * Multi-section RC low-pass anti-alias filter + V1 in 0 DC 0 AC 1 + R1 in n1 1k + C1 n1 0 100n + R2 n1 out 2k + C2 out 0 47n + .AC DEC 100 1 100k + .meas ac vout_max_db MAX VDB(out) + .meas ac f3db WHEN VDB(out) = -3 FALL=1 + .meas ac gain_at_10k FIND VDB(out) AT=10k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "vout_max_db", 0.0, 0.5); + AssertMeasurementBetween(result, "f3db", 700.0, 900.0); + AssertMeasurementBetween(result, "gain_at_10k", (-35.0), (-25.0)); + } + + // Prompt: CMOS transmission-gate D-latch with clocked pass gates and feedback inverters. + [Fact] + public void CMOS_Transmission_Gate_D_Latch_34eb5273095d96e9() + { + var result = RunAcceptedExample( + "deepseek:01367_d74cd0ecb7df43e1:34eb5273095d96e9", + """ + * CMOS Transmission-Gate D-Latch + VDD vdd 0 DC 5 + VCLK clk 0 PULSE(0 5 10n 0.1n 0.1n 9.8n 20n) + VD d 0 PULSE(0 5 25n 0.1n 0.1n 15n 40n) + Mp1 clkb clk vdd vdd pm W=10u L=1u + Mn1 clkb clk 0 0 nm W=5u L=1u + Mtg1_n B clk d 0 nm W=5u L=1u + Mtg1_p B clkb d vdd pm W=10u L=1u + Mtg2_n B clkb fb 0 nm W=5u L=1u + Mtg2_p B clk fb vdd pm W=10u L=1u + Mp_inv1 Q B vdd vdd pm W=10u L=1u + Mn_inv1 Q B 0 0 nm W=5u L=1u + Mp_inv2 fb Q vdd vdd pm W=10u L=1u + Mn_inv2 fb Q 0 0 nm W=5u L=1u + CLOAD Q 0 0.1p + .IC V(B)=5 V(Q)=0 V(fb)=5 + .MODEL nm NMOS (LEVEL=1 VTO=1 KP=100u LAMBDA=0.02) + .MODEL pm PMOS (LEVEL=1 VTO=-1 KP=50u LAMBDA=0.02) + .TRAN 0.1n 100n UIC + .MEAS TRAN t_rise TRIG V(clk) VAL=2.5 RISE=1 TARG V(Q) VAL=2.5 RISE=1 + .MEAS TRAN t_fall TRIG V(clk) VAL=2.5 RISE=2 TARG V(Q) VAL=2.5 FALL=1 + .MEAS TRAN vhold MAX V(Q) FROM=20n TO=30n + .MEAS TRAN vhold_min MIN V(Q) FROM=20n TO=30n + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementLess(result, "t_rise", 2e-09); + AssertMeasurementLess(result, "t_fall", 2e-09); + AssertMeasurementGreater(result, "vhold", 4.5); + AssertMeasurementGreater(result, "vhold_min", 4.5); + } + + // Prompt: Design a Gilbert cell mixer using NPN BJTs for RF downconversion from 100.1 MHz to 100 kHz IF. + [Fact] + public void Gilbert_Cell_Mixer_with_BJTs_6043f923ab23953c() + { + var result = RunAcceptedExample( + "deepseek:02081_25880d7b9569f946:6043f923ab23953c", + """ + * Gilbert Cell Mixer with BJTs + .OPTIONS RELTOL=1e-4 + .MODEL NPN NPN(IS=1e-15 BF=100 VAF=50) + VCC VCC 0 DC 15 + I1 N1 0 DC 1m + Q1 N2 N3 N1 0 NPN + Q2 N4 N5 N1 0 NPN + R1 VCC N2 1k + R2 VCC N4 1k + Q3 out1 N6 N2 0 NPN + Q4 out2 N7 N2 0 NPN + Q5 out1 N7 N4 0 NPN + Q6 out2 N6 N4 0 NPN + R3 VCC out1 1k + R4 VCC out2 1k + VLO_P N6 0 SIN(15.2 0.2 100MEG) + VLO_N N7 0 SIN(15.2 0.2 100MEG 0 0 180) + VRF_P N3 0 SIN(5 0.1 100.1MEG) + VRF_N N5 0 SIN(5 0.1 100.1MEG 0 0 180) + E1 out_diff 0 out1 out2 1 + .OP + .TRAN 1n 50u 0 1n + .MEAS TRAN vpp PP V(out_diff) FROM=10u TO=50u + .MEAS TRAN vrms RMS V(out_diff) FROM=10u TO=50u + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementGreater(result, "vpp", 0.05); + AssertMeasurementGreater(result, "vrms", 0.0); + } + + // Prompt: An RC high-pass filter with R=10k\u03a9 and C=10pF, \u03c4=100ns, differentiates a 0-5V pulse with 1ns rise/fall times, generating positive and negative spikes. + [Fact] + public void RC_Differentiator_Edge_Detector_492f2d235c2115f7() + { + var result = RunAcceptedExample( + "deepseek:00633_c82c686d65459113:492f2d235c2115f7", + """ + * RC Differentiator Edge Detector + V1 in 0 PULSE(0 5 0 1n 1n 1u 2u) + C1 in out 10pF + R1 out 0 10k + .tran 0.01n 4u 0 0.01n + .meas tran vmax MAX V(out) + .meas tran vmin MIN V(out) + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "vmax", 4.8, 0.3); + AssertMeasurementNear(result, "vmin", (-4.8), 0.3); + } + + // Prompt: Two-op-amp instrumentation amplifier using voltage-controlled voltage sources as op-amps with finite open-loop gain of 100000. + [Fact] + public void Two_op_amp_instrumentation_amplifier_c66cb8c532d89e5a() + { + var result = RunAcceptedExample( + "deepseek:01478_332702fd7a8c2cd5:c66cb8c532d89e5a", + """ + * Two-op-amp instrumentation amplifier + V1 in_n 0 DC 0 AC 0 + Voff1 in_n_buf in_n DC 1e-3 + V2 in_p 0 DC 1e-3 AC 1 + Voff2 in_p_buf in_p DC 0.5e-3 + R1 a 0 9k + R2 u1out a 1k + R3 u1out b 1k + R4 out b 9k + E1 u1out 0 in_n_buf a 100000 + E2 out 0 in_p_buf b 100000 + .DC V1 0 1 1 + .MEAS DC VOUT_DC FIND V(out) AT=0 + .AC DEC 10 1 1MEG + .MEAS AC VGAIN FIND V(out) AT=1 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "VOUT_DC", 0.004, 0.006); + AssertMeasurementNear(result, "VGAIN", 10.0, 0.1); + } + + // Prompt: Standard CMOS inverter built with NMOS and PMOS transistors driving a 1 pF capacitive load. + [Fact] + public void CMOS_inverter_with_capacitive_load_and_rise_fall_measurement_8fda4d90543d1b19() + { + var result = RunAcceptedExample( + "deepseek:01359_8fda4d90543d1b19:8fda4d90543d1b19", + """ + * CMOS inverter with capacitive load and rise-fall measurement + M1 out in Vdd Vdd pmos W=2u L=0.35u + M2 out in 0 0 nmos W=1u L=0.35u + .model nmos NMOS(VTO=0.7 KP=200u LAMBDA=0.02) + .model pmos PMOS(VTO=-0.7 KP=100u LAMBDA=0.02) + Vdd Vdd 0 DC 3.3 + Vin in 0 PULSE(0 3.3 1n 1n 1n 10n 20n) + Cload out 0 1p + .tran 0.1n 50n + .measure tran trise TRIG v(out) VAL=0.33 RISE=1 TARG v(out) VAL=2.97 RISE=1 + .measure tran tfall TRIG v(out) VAL=2.97 FALL=1 TARG v(out) VAL=0.33 FALL=1 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementCount(result, "trise", 1); + AssertMeasurementCount(result, "tfall", 1); + AssertMeasurementBetween(result, "trise", 5e-10, 5e-09); + AssertMeasurementBetween(result, "tfall", 5e-10, 5e-09); + } + + // Prompt: Double-balanced CMOS Gilbert cell mixer with differential square-wave LO and differential sinusoidal RF. + [Fact] + public void CMOS_Gilbert_cell_mixer_fixed_eabeba854b7e4c3f() + { + var result = RunAcceptedExample( + "deepseek:02093_ec56a80c0e5a3306:eabeba854b7e4c3f", + """ + * CMOS Gilbert cell mixer - fixed + .OPTIONS POST PROBE NOMOD + VDD vdd 0 DC 5 + VBIAS bias 0 DC 1.594 + VINP inp 0 SIN(2.5 0.05 1e9 0 0 0) + VINN inn 0 SIN(2.5 -0.05 1e9 0 0 0) + VLOP lop 0 PULSE(0 5 0 1p 1p 0.555n 1.111n) + VLON lon 0 PULSE(5 0 0 1p 1p 0.555n 1.111n) + Mtail tail bias 0 0 NMOS W=100u L=1u + MRFp d3a inp tail 0 NMOS W=50u L=1u + MRFn d3b inn tail 0 NMOS W=50u L=1u + M1 ifp lop d3a 0 NMOS W=50u L=1u + M2 ifp lon d3b 0 NMOS W=50u L=1u + M3 ifn lop d3b 0 NMOS W=50u L=1u + M4 ifn lon d3a 0 NMOS W=50u L=1u + RL1 vdd ifp 600 + RL2 vdd ifn 600 + .MODEL NMOS NMOS (VTO=0.7 KP=100u LAMBDA=0.02) + .TRAN 10p 100n + .MEAS TRAN VIFPP PP V(ifp,ifn) FROM=50n TO=100n + .MEAS TRAN VRFPP PP V(inp,inn) FROM=50n TO=100n + .MEAS TRAN CONV_GAIN PARAM='20*log10(VIFPP/VRFPP)' + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "VIFPP", 0.5, 0.8); + AssertMeasurementBetween(result, "CONV_GAIN", 8.0, 12.0); + } + + // Prompt: Design an op-amp integrator with a reset switch that periodically discharges the feedback capacitor. Use a behavioral op-amp, a voltage-controlled switch, and measure the output voltage during integration and after reset. + [Fact] + public void Op_Amp_Integrator_with_Reset_Switch_5525f67ff487a142() + { + var result = RunAcceptedExample( + "deepseek:00338_33f675d452ab9241:5525f67ff487a142", + """ + * Op-Amp Integrator with Reset Switch + VIN in 0 DC 1 + R1 in ninv 10k + C1 out ninv 0.1uF + E_OPAMP out 0 0 ninv 100k + V_RESET reset 0 PULSE(5 0 1n 1u 1u 1.9m 2m) + S1 ninv out reset 0 swmod + .MODEL swmod SW(RON=10 ROFF=100MEG VT=2 VH=0.5) + .TRAN 10u 2m + .MEASURE TRAN Vmid FIND V(out) AT=1m + .MEASURE TRAN Vpeak FIND V(out) AT=1.9m + .MEASURE TRAN Vreset FIND V(out) AT=1.92m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "Vmid", (-1.1), (-0.9)); + AssertMeasurementBetween(result, "Vpeak", (-2.0), (-1.8)); + AssertMeasurementBetween(result, "Vreset", (-0.1), 0.1); + } + + // Prompt: Design a positive diode clamper that shifts a 5V peak sine wave upward by a 2V DC reference voltage. The circuit uses a diode, capacitor, resistor, and reference source. + [Fact] + public void Positive_Diode_Clamper_with_2V_Reference_002426f6de81c938() + { + var result = RunAcceptedExample( + "deepseek:00136_6448688ba26246f2:002426f6de81c938", + """ + * Positive Diode Clamper with 2V Reference + VIN in 0 SIN(0 5 1k 0 0) + C1 in out 1u + D1 ref out DMOD + Rload out 0 10k + Vref ref 0 DC 2 + .MODEL DMOD D(IS=1e-14 N=1) + .TRAN 0 10ms 0 10u + .MEASURE TRAN vout_min MIN v(out) FROM=2ms TO=10ms + .MEASURE TRAN vout_max MAX v(out) FROM=2ms TO=10ms + .MEASURE TRAN vout_avg AVG v(out) FROM=2ms TO=10ms + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "vout_min", 0.5, 1.8); + AssertMeasurementBetween(result, "vout_max", 10.5, 12.5); + AssertMeasurementBetween(result, "vout_avg", 6.0, 8.0); + } + + // Prompt: Design a simple diode peak detector circuit with a bleed resistor. + [Fact] + public void Diode_Peak_Detector_with_Bleed_Resistor_49c6ff2561ebf6d5() + { + var result = RunAcceptedExample( + "deepseek:00740_49c6ff2561ebf6d5:49c6ff2561ebf6d5", + """ + * Diode Peak Detector with Bleed Resistor + VIN in 0 SIN(0 2 1k) + D1 in out DMOD + C1 out 0 1u + R1 out 0 100k + .MODEL DMOD D(IS=1e-13) + .TRAN 0.1m 10m + .MEASURE TRAN vout_avg AVG V(out) FROM=9m TO=10m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "vout_avg", 1.3, 1.5); + } + + // Prompt: NMOS common-source amplifier with source degeneration resistor RS=200 Ohm. + [Fact] + public void NMOS_Common_Source_Amplifier_with_Source_Degeneration_bd13371a9e5aa5f1() + { + var result = RunAcceptedExample( + "deepseek:01199_b310caa5041d63c3:bd13371a9e5aa5f1", + """ + * NMOS Common-Source Amplifier with Source Degeneration + VDD VDD 0 DC 5V + VIN in 0 DC 0 AC 1 + C1 in gate 1u + R1 VDD gate 1MEG + R2 gate 0 1MEG + M1 out gate s 0 nmod W=10u L=1u + RS s 0 200 + RD VDD out 2k + .MODEL nmod NMOS(VTO=1 KP=100u LAMBDA=0.02) + .OP + .DC VIN 0 0 1 + .AC DEC 10 1 100MEG + .MEAS DC vgs FIND V(gate)-V(s) AT=0 + .MEAS DC id FIND I(RD) AT=0 + .MEAS AC gain FIND VDB(out) AT=1k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "gain", 5.0, 7.0); + AssertMeasurementBetween(result, "vgs", 2.0, 2.5); + AssertMeasurementBetween(result, "id", 0.0005, 0.0015); + } + + // Prompt: A track-and-hold buffer using an ideal op-amp voltage follower, a voltage-controlled switch, and a 1 nF sampling capacitor with a 1 M\u03a9 leakage resistor. + [Fact] + public void Track_and_hold_buffer_with_sampling_capacitor_45293f10e65fa773() + { + var result = RunAcceptedExample( + "deepseek:02245_23c104517e8f7ef9:45293f10e65fa773", + """ + * Track-and-hold buffer with sampling capacitor + VIN in 0 DC 2.5 + VCLK clk 0 PULSE(0 5 0 1n 1n 500u 1000u) + E1 buf_out 0 VALUE={LIMIT((V(in)-V(buf_out))*1e5, -5, 5)} + S1 buf_out hold_node clk 0 swmod + C_hold hold_node 0 1n + Rleak hold_node 0 1MEG + E2 out 0 VALUE={LIMIT((V(hold_node)-V(out))*1e5, -5, 5)} + Rload out 0 10k + .MODEL swmod SW(RON=100 ROFF=100MEG VT=2 VH=0.5) + .TRAN 1u 3m + .MEASURE TRAN v_track FIND V(out) AT=400u + .MEASURE TRAN v_hold_init FIND V(out) AT=600u + .MEASURE TRAN v_hold_final FIND V(out) AT=950u + .MEASURE TRAN droop PARAM='v_hold_init - v_hold_final' + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "v_track", 2.5, 0.1); + AssertMeasurementBetween(result, "v_hold_init", 2.2, 2.3); + AssertMeasurementBetween(result, "droop", 0.6, 0.7); + } + + // Prompt: Constant 5mA current source charges 1nF capacitor, producing a linear ramp. + [Fact] + public void Sawtooth_Generator_using_Current_Source_and_Reset_Switch_d9fc5d81f2d22d44() + { + var result = RunAcceptedExample( + "deepseek:01851_4207597971b5ee07:d9fc5d81f2d22d44", + """ + * Sawtooth Generator using Current Source and Reset Switch + I1 vcc ramp DC 5mA + C1 ramp 0 1nF + S1 ramp 0 reset 0 swmod + Vreset reset 0 PULSE(0 5 1u 1n 1n 108.8n 1u) + Vcc vcc 0 DC 10 + .model swmod SW(RON=10 ROFF=1MEG VT=2 VH=0.5) + .tran 0.1n 10u 2u 1n + .meas TRAN period TRIG V(ramp) VAL=2 RISE=1 TARG V(ramp) VAL=2 RISE=2 + .meas TRAN vmax MAX V(ramp) FROM=2u TO=10u + .meas TRAN freq PARAM 1/period + .end + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "period", 1e-06, 1e-08); + AssertMeasurementNear(result, "vmax", 4.5, 0.1); + AssertMeasurementBetween(result, "freq", 950000.0, 1100000.0); + } + + // Prompt: Half-wave rectifier with smoothing capacitor converts AC to DC. + [Fact] + public void Half_wave_rectifier_with_smoothing_capacitor_13aabe1818bb9395() + { + var result = RunAcceptedExample( + "deepseek:00119_fbf6f7d326cd2df7:13aabe1818bb9395", + """ + * Half-wave rectifier with smoothing capacitor + V1 in 0 SIN(0 10 60 0 0) + D1 in out dmod + C1 out 0 82uF + R1 out 0 1k + .MODEL dmod D(IS=1e-12 RS=1) + .TRAN 0.1m 100m + .MEAS TRAN Vavg AVG V(out) FROM=80m TO=100m + .MEAS TRAN Vpp PP V(out) FROM=80m TO=100m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "Vavg", 7.0, 9.0); + AssertMeasurementBetween(result, "Vpp", 1.0, 2.0); + } + + // Prompt: 4\u2011bit R\u20112R ladder DAC with ideal voltage\u2011follower op\u2011amp buffer. The R\u20112R network uses 1k\u03a9 (R) and 2k\u03a9 (2R) resistors. Digital inputs are represented by voltage sources: b3 and b1 track VREF (code '1'), b2 and b0 are 0V (code '0'). The ladder is terminated with a 2k\u03a9 resistor to ground at the LSB end. The op\u2011amp buffer (E1) forces V(out) \u2248 V(n3), providing low output impedance. A DC sweep of VREF from 0 to 5V in 0.1V steps verifies the transfer characteristic V(out) = 0.625\xb7VREF for input code 1010. + [Fact] + public void _4_bit_R_2R_ladder_DAC_with_op_amp_buffer_f176a728f1c7db7c() + { + var result = RunAcceptedExample( + "deepseek:02179_02fc6ea716fff71a:f176a728f1c7db7c", + """ + * 4-bit R-2R ladder DAC with op-amp buffer + VREF vref 0 DC 5 + E_B3 b3 0 vref 0 1 + Vb2 b2 0 DC 0 + E_B1 b1 0 vref 0 1 + Vb0 b0 0 DC 0 + Rsh3 n3 b3 2000 + Rser2 n3 n2 1000 + Rsh2 n2 b2 2000 + Rser3 n2 n1 1000 + Rsh1 n1 b1 2000 + Rser4 n1 n0 1000 + Rsh0 n0 b0 2000 + Rgnd n0 0 2000 + E1 out 0 n3 out 100000 + .OP + .DC VREF 0 5 0.1 + .MEAS DC vout_at_5v FIND v(out) WHEN v(vref)=5 + .MEAS DC vout_at_2_5v FIND v(out) WHEN v(vref)=2.5 + .MEAS DC vref_for_half FIND v(vref) WHEN v(out)=1.5625 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "vout_at_5v", 3.125, 0.01); + AssertMeasurementNear(result, "vout_at_2_5v", 1.5625, 0.01); + AssertMeasurementNear(result, "vref_for_half", 2.5, 0.01); + } + + // Prompt: Inverting summing amplifier with three input voltages. + [Fact] + public void Summing_amplifier_with_three_inputs_2a209b274da68264() + { + var result = RunAcceptedExample( + "deepseek:00326_b2cc5d299954d341:2a209b274da68264", + """ + * Summing amplifier with three inputs + V1 in1 0 DC 0.1 AC 1 + V2 in2 0 DC 0.2 AC 1 + V3 in3 0 DC 0.3 AC 1 + R1 in1 vin 10k + R2 in2 vin 10k + R3 in3 vin 10k + Rf out vin 10k + E1 out 0 0 vin 100000 + RL out 0 1k + .DC V1 0.1 0.1 0.1 + .AC DEC 10 10 100k + .MEAS DC OP_OUT FIND V(out) AT=0.1 + .MEAS AC SUM_GAIN FIND VM(out) AT=1000 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "OP_OUT", (-0.6), 0.01); + AssertMeasurementNear(result, "SUM_GAIN", 3.0, 0.05); + } + + // Prompt: T-pad attenuator providing 10 dB loss in a 75 ohm impedance system, simulated with AC analysis. + [Fact] + public void T_pad_10_dB_75_ohm_attenuator_0ac640f2f0257f05() + { + var result = RunAcceptedExample( + "deepseek:00015_aaf07f1729a27024:0ac640f2f0257f05", + """ + * T-pad 10 dB 75 ohm attenuator + V1 in 0 AC 1 DC 1 + R1 in mid 38.862 + R2 mid 0 52.705 + R3 mid out 38.862 + RL out 0 75 + .OP + .AC DEC 10 1 100k + .MEAS AC vout_1k FIND V(out) AT=1k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "vout_1k", 0.3162, 0.01); + } + + // Prompt: Design a biased negative diode limiter that clips negative peaks of a 1kHz sine wave at around -2.7V. + [Fact] + public void Biased_Negative_Diode_Limiter_c3f748cd81a55786() + { + var result = RunAcceptedExample( + "deepseek:00755_60d2e09a534b0724:c3f748cd81a55786", + """ + * Biased Negative Diode Limiter + .TRAN 0.1u 2m + VIN in 0 SIN(0 5 1k) + R1 in out 1k + D1 nbias out DMOD + VBIAS nbias 0 DC -2 + Rload out 0 100k + .MODEL DMOD D(IS=1e-14 RS=1 N=1) + .MEAS TRAN Vmin MIN V(out) + .MEAS TRAN Vmax MAX V(out) + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "Vmin", (-2.7), 0.3); + AssertMeasurementNear(result, "Vmax", 5.0, 0.5); + } + + // Prompt: The circuit is an inverting summing amplifier with three DC inputs (0V, 0.5V, -0.2V) each connected through a 1k\u03a9 resistor to the inverting input of an ideal opamp with gain 100,000 and 1k\u03a9 feedback. + [Fact] + public void Inverting_summing_amplifier_with_three_inputs_using_ideal_opamp_a5d74cbf63b151ae() + { + var result = RunAcceptedExample( + "deepseek:00324_7364e61b059dfe18:a5d74cbf63b151ae", + """ + * Inverting summing amplifier with three inputs using ideal opamp + V1 in1 0 DC 0 AC 1 + V2 in2 0 DC 0.5 AC 1 + V3 in3 0 DC -0.2 AC 1 + R1 in1 neg 1k + R2 in2 neg 1k + R3 in3 neg 1k + Rf neg out 1k + E1 out 0 0 neg 100k + V0 dummy 0 DC 0 + .DC V0 0 1 1 + .AC DEC 10 1 1MEG + .MEASURE DC VOUT_DC FIND V(out) AT=0 + .MEASURE AC VOUT_1K FIND VM(out) AT=1k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "VOUT_DC", (-0.3), 0.001); + AssertMeasurementNear(result, "VOUT_1K", 3.0, 0.01); + } + + // Prompt: Fixed-bias common-emitter amplifier with NPN transistor, 12V supply, 500k base resistor, and 2k collector resistor. + [Fact] + public void Fixed_bias_common_emitter_amplifier_45b07aa935bf026b() + { + var result = RunAcceptedExample( + "deepseek:00894_a69b709d70ed94a7:45b07aa935bf026b", + """ + * Fixed-bias common-emitter amplifier + VCC vcc 0 DC 12 + VIN in 0 AC 1 + C1 in base 10u + RB vcc base 500k + Q1 collector base 0 NPNN + RC vcc collector 2k + C2 collector out 10u + RL out 0 10k + .MODEL NPNN NPN(IS=1e-14 BF=100 VAF=100) + .OP + .DC VCC 12 12 1 + .AC DEC 10 10 1MEG + .MEAS DC vce FIND V(collector) AT=12 + .MEAS DC ic FIND I(RC) AT=12 + .MEAS AC gain_db_1k FIND VDB(out) AT=1k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "vce", 7.0, 8.0); + AssertMeasurementBetween(result, "ic", 0.002, 0.0025); + AssertMeasurementBetween(result, "gain_db_1k", 40.0, 50.0); + } + + // Prompt: Second-order multiple-feedback low-pass filter with Butterworth response. + [Fact] + public void Multiple_Feedback_Low_Pass_Filter_Butterworth_fc_1kHz_unity_DC_gain_1a115e20156a3f21() + { + var result = RunAcceptedExample( + "deepseek:01666_a8b03576961cac47:1a115e20156a3f21", + """ + * Multiple-Feedback Low-Pass Filter (Butterworth, fc=1kHz, unity DC gain) + VIN in 0 DC 0 AC 1 + R1 in vx 112540 + C1 vx 0 4n + R3 vx inv_in 56270 + R2 out vx 112540 + C2 inv_in out 1n + E_opamp out 0 0 inv_in 100000 + .AC DEC 10 1 100k + .MEAS AC dc_gain_db FIND VDB(out) AT=1 + .MEAS AC f3dB WHEN VDB(out)=-3 FALL=1 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "dc_gain_db", 0.0, 0.1); + AssertMeasurementNear(result, "f3dB", 1000.0, 10.0); + } + + // Prompt: Class-AB push-pull amplifier using complementary BJTs with diode biasing and op-amp feedback. + [Fact] + public void Class_AB_Push_Pull_Amplifier_with_Diode_Bias_43084bfb53753454() + { + var result = RunAcceptedExample( + "deepseek:01106_86c81d98df1fd5c4:43084bfb53753454", + """ + * Class-AB Push-Pull Amplifier with Diode Bias + VCC vcc 0 DC 15 + VEE vee 0 DC -15 + VIN in 0 SIN(0 1 1k) + Rf out in- 9k + Rg in- 0 1k + R1 vcc drive 6.8k + R2 drive vee 6.8k + D1 drive base_n D1N4148 + D2 base_p drive D1N4148 + Q1 vcc base_n n1 NPNMOD + Q2 vee base_p n2 PNPMOD + Re1 n1 out 0.47 + Re2 n2 out 0.47 + E1 drive 0 in in- 100000 + .MODEL D1N4148 D(IS=1n RS=1) + .MODEL NPNMOD NPN(IS=1e-14 BF=100 VAF=100) + .MODEL PNPMOD PNP(IS=1e-14 BF=50 VAF=100) + .OP + .TRAN 1u 10m 0 1u + .MEAS TRAN Vout_rms RMS V(out) FROM=1m TO=10m + .MEAS TRAN Icc_avg AVG I(VCC) FROM=1m TO=10m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "Vout_rms", 6.9, 7.2); + AssertMeasurementLess(result, "Icc_avg", 0.01); + } + + // Prompt: This circuit is an op-amp differentiator with an input series resistor to limit high-frequency gain. + [Fact] + public void op_amp_differentiator_with_input_limit_resistor_0f679010bd41414e() + { + var result = RunAcceptedExample( + "deepseek:00349_77f9f83faa5cde40:0f679010bd41414e", + """ + * op-amp differentiator with input limit resistor + VIN in 0 DC 0 AC 1 + C1 in n1 100n + Rlimit n1 n2 1k + E1 out 0 n2 0 100000 + Rf out n2 100k + Rload out 0 10k + .AC DEC 10 10 1MEG + .MEAS AC gain_10 FIND VDB(out) AT=10 + .MEAS AC gain_100 FIND VDB(out) AT=100 + .MEAS AC gain_100k FIND VDB(out) AT=100k + .MEAS AC diff_slope PARAM gain_100-gain_10 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "diff_slope", 18.0, 22.0); + AssertMeasurementBetween(result, "gain_100k", 38.0, 42.0); + AssertMeasurementBetween(result, "gain_100", 14.0, 18.0); + } + + // Prompt: Design a power supply with a buck switching preregulator followed by a linear post-regulator to provide a clean 3.3V output from a 12V input. + [Fact] + public void Switching_preregulator_linear_post_regulator_0a7f237a705eef53() + { + var result = RunAcceptedExample( + "deepseek:02006_713ba184287c2b9c:0a7f237a705eef53", + """ + * Switching preregulator + linear post-regulator + VIN vin 0 DC 12 + VCTRL ctrl 0 PULSE(0 5 0 10n 10n 0.8u 2u) + S1 vin sw ctrl 0 SMOD + D1 0 sw DMOD + L1 sw lnode 100u + R1 lnode buckout 0.1 + C1 buckout 0 100u + * Linear post-regulator + VREF ref 0 DC 2.5 + E1 errbase 0 ref fb 100k + Rbase errbase base 100 + Q1 buckout base out 0 QN + Rf1 out fb 3.3k + Rf2 fb 0 10k + RL out 0 10 + C2 out 0 10u + .MODEL DMOD D(IS=1n RS=0.1) + .MODEL QN NPN(IS=1e-15 BF=100) + .MODEL SMOD SW(RON=0.1 ROFF=10MEG VT=2.5 VH=0.5) + .OP + .TRAN 0.1u 50u + .MEAS tran vout_avg AVG v(out) FROM=40u TO=50u + .MEAS tran vout_ripple PP v(out) FROM=40u TO=50u + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "vout_avg", 3.2, 3.4); + AssertMeasurementLess(result, "vout_ripple", 0.05); + } + + // Prompt: NMOS common-source amplifier with resistive load + [Fact] + public void NMOS_DC_bias_point_analysis_42c1128537cd367d() + { + var result = RunAcceptedExample( + "deepseek:02351_b1fc8c0c9449e0bf:42c1128537cd367d", + """ + * NMOS DC bias point analysis + VDD VDD 0 DC 5 + VGS G 0 DC 1.8 + M1 D G 0 0 NMOS W=1u L=1u + RD VDD D 10k + .MODEL NMOS NMOS (VTO=1 KP=1m LAMBDA=0.01) + .DC VGS 1.8 1.8 0.1 + .MEAS DC VDS FIND V(D) AT=1.8 + .MEAS DC ID FIND I(RD) AT=1.8 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "VDS", 1.74, 0.2); + AssertMeasurementNear(result, "ID", 0.000325, 0.0001); + AssertMeasurementGreater(result, "VDS", 0.5); + } + + // Prompt: A window limiter using two diodes and DC reference voltages to asymmetrically clamp a 5V amplitude sine wave. + [Fact] + public void Window_diode_limiter_with_asymmetric_thresholds_2V_1V_379b87f58ad17c4f() + { + var result = RunAcceptedExample( + "deepseek:00762_92b688ffb7e3f36d:379b87f58ad17c4f", + """ + * Window diode limiter with asymmetric thresholds +2V/-1V + VIN in 0 DC 0 SIN(0 5 1k) + V_POS vpos 0 DC 1.4 + V_NEG vneg 0 DC -0.4 + R1 in out 1k + R2 out 0 100k + D1 out vpos DMOD + D2 vneg out DMOD + .MODEL DMOD D(IS=1e-12 N=1 RS=1) + .TRAN 1u 10m + .MEAS TRAN vmax MAX V(out) + .MEAS TRAN vmin MIN V(out) + .MEAS TRAN vpp PARAM = VMAX - VMIN + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "vmax", 2.0, 0.2); + AssertMeasurementNear(result, "vmin", (-1.0), 0.2); + AssertMeasurementNear(result, "vpp", 3.0, 0.3); + } + + // Prompt: Three-section constant-k low-pass filter designed for 50 Ohm image impedance and 1 MHz cutoff. + [Fact] + public void Three_section_constant_k_low_pass_filter_b47029c0cee239f4() + { + var result = RunAcceptedExample( + "deepseek:00607_86bf39e55ac7f176:b47029c0cee239f4", + """ + * Three-section constant-k low-pass filter + V1 in 0 AC 1 + Rsource in 1 50 + L1 1 2 15.9155u + C1 2 0 6.3662n + L2 2 3 15.9155u + C2 3 0 6.3662n + L3 3 out 15.9155u + Rload out 0 50 + .AC dec 100 10k 100Meg + .MEAS AC f3dB WHEN VDB(out)=-9 CROSS=1 + .MEAS AC att_2MHz FIND VDB(out) AT=2e6 + .END + """); + + AssertAllMeasurementsSuccessful(result); + } + + // Prompt: Adjusted VIN PULSE parameters (TD=0.5m, PW=0.5m, PER=1m) so the square wave starts high for the first half\u2011cycle. + [Fact] + public void Op_Amp_Integrator_with_Reset_Switch_a3e1df93a815e074() + { + var result = RunAcceptedExample( + "deepseek:00337_15509f4ba580ede2:a3e1df93a815e074", + """ + * Op-Amp Integrator with Reset Switch + VIN in 0 PULSE(1 -1 0.5m 1u 1u 0.5m 1m) + VRST reset 0 PULSE(0 5 1.5m 1u 1u 0.1m 2m) + R1 in net_inv 10k + C1 net_inv out 0.1u + Rf net_inv out 1MEG + RLOAD out 0 10k + E1 out 0 0 net_inv 100000 + S1 out net_inv reset 0 SWMOD + .MODEL SWMOD SW(RON=10 ROFF=10MEG VT=0.5 VH=0.1) + .IC V(out)=0 V(net_inv)=0 + .TRAN 1u 2m UIC + .MEAS TRAN int_min MIN v(out) FROM=0 TO=1.5m + .MEAS TRAN after_reset FIND v(out) AT=1.6m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "int_min", (-0.52), (-0.48)); + AssertMeasurementBetween(result, "after_reset", (-0.01), 0.01); + } + + // Prompt: Sample-and-hold front-end for SAR ADC + [Fact] + public void SAR_ADC_Sample_Comparator_Front_End_a24d4b76d098b7ee() + { + var result = RunAcceptedExample( + "deepseek:02217_dd3f9caa45c536ae:a24d4b76d098b7ee", + """ + * SAR ADC Sample Comparator Front End + Vin vin 0 DC 0.6 + Vclk clk 0 PULSE(0 5 0 10n 10n 100n 200n) + Vref ref 0 PWL(0 0 199n 0 200n 0.5 299n 0.5 300n 0.75 399n 0.75 400n 0.625 499n 0.625 500n 0.5625) + S1 vin hold clk 0 swmod + .MODEL swmod SW(RON=100 ROFF=1G VT=2.5 VH=0.5) + C1 hold 0 10pF + Ecomp out 0 value={5*(V(hold,ref) > 0)} + Rload out 0 1k + .IC V(hold)=0 + .TRAN 10n 1u + .MEAS TRAN vout_250n FIND V(out) AT=250n + .MEAS TRAN vout_350n FIND V(out) AT=350n + .MEAS TRAN vout_450n FIND V(out) AT=450n + .MEAS TRAN vout_550n FIND V(out) AT=550n + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "vout_250n", 5.0, 0.5); + AssertMeasurementNear(result, "vout_350n", 0.0, 0.5); + AssertMeasurementNear(result, "vout_450n", 0.0, 0.5); + AssertMeasurementNear(result, "vout_550n", 5.0, 0.5); + } + + // Prompt: Two diodes with anodes connected to the output and cathodes to the inputs form a wired-AND function. + [Fact] + public void Diode_AND_Gate_with_Pull_Up_Resistor_a5f1bf766ff4ba5e() + { + var result = RunAcceptedExample( + "deepseek:00775_4dfc68ca699a2f8e:a5f1bf766ff4ba5e", + """ + * Diode AND Gate with Pull-Up Resistor + R1 out Vcc 1k + D1 out A DMOD + D2 out B DMOD + VA A 0 PULSE(0 5 0 1n 1n 49.9u 100u) + VB B 0 PULSE(0 5 0 1n 1n 99.9u 200u) + Vcc Vcc 0 DC 5 + .MODEL DMOD D(IS=1e-12 RS=0.5) + .TRAN 1u 200u + .MEAS TRAN vout_high AVG V(out) FROM=10u TO=20u + .MEAS TRAN vout_low1 AVG V(out) FROM=60u TO=70u + .MEAS TRAN vout_low2 AVG V(out) FROM=150u TO=160u + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementGreater(result, "vout_high", 4.0); + AssertMeasurementLess(result, "vout_low1", 1.0); + AssertMeasurementLess(result, "vout_low2", 1.0); + } + + // Prompt: Tow-Thomas biquad low-pass filter using three op-amps modeled as voltage-controlled voltage sources with gain 100,000. + [Fact] + public void Tow_Thomas_Biquad_Low_Pass_Filter_c3feef0209fe7c21() + { + var result = RunAcceptedExample( + "deepseek:01698_f60ebf1332ff686d:c3feef0209fe7c21", + """ + * Tow-Thomas Biquad Low-Pass Filter + VIN IN 0 DC 0 AC 1 + R1 IN N1 10K + R3 FB N1 10K + RD BP N1 10K + C1 BP N1 10N + E1 BP 0 N1 0 1E5 + R2 BP N2 10K + C2 OUT N2 10N + E2 OUT 0 N2 0 1E5 + R4 OUT N3 10K + R5 FB N3 10K + E3 FB 0 N3 0 1E5 + RLOAD OUT 0 1MEG + .AC DEC 100 1 100K + .MEAS AC Gdc FIND VDB(OUT) AT=10 + .MEAS AC f3db WHEN VDB(OUT)=-3 + .MEAS AC Gstop FIND VDB(OUT) AT=10K + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "Gdc", 0.0, 1.0); + AssertMeasurementBetween(result, "f3db", 1800.0, 2300.0); + AssertMeasurementLess(result, "Gstop", (-30.0)); + } + + // Prompt: Design a 12V-to-5V current-mode buck converter switching at 100kHz. + [Fact] + public void current_mode_buck_converter_6a095dba9953f304() + { + var result = RunAcceptedExample( + "deepseek:01930_288e0618554b694e:6a095dba9953f304", + """ + * current-mode buck converter + VIN in 0 DC 12 + VGG gg 0 DC 10 + VCLK clk 0 PULSE(0 5 0 10n 10n 100n 10u) + VREF ref 0 DC 5 + V_sense sw_sense out DC 0 + H_sense vsense 0 V_sense 1 + S_power in sw_node Q 0 SW_power + D1 0 sw_node DMOD + L1 sw_node sw_sense 100uH + C out 0 100uF + Rload out 0 5 + E_ea ea_out 0 VALUE = { MIN( MAX( (V(ref) - V(out)) * 1000, 0 ), 2 ) } + Rcomp ea_out vc 10k + Ccomp vc 0 10n + E_comp comp_out 0 VALUE = { IF( V(vsense) > V(vc), 10, 0 ) } + S_set gg Q clk 0 SW_set + S_reset Q 0 comp_out 0 SW_reset + CQ Q 0 1n IC=0 + RQ Q 0 1MEG + .MODEL SW_set SW(RON=100 ROFF=1MEG VT=2.5 VH=0.1) + .MODEL SW_reset SW(RON=1 ROFF=1MEG VT=2.5 VH=0.1) + .MODEL SW_power SW(RON=0.1 ROFF=10MEG VT=2 VH=0.1) + .MODEL DMOD D(IS=1e-12 RS=0.01) + .TRAN 0 2m 0 1u UIC + .IC V(Q)=0 V(out)=0 + .MEAS TRAN avg_out AVG V(out) FROM=1.5m TO=2m + .MEAS TRAN ripple PP V(out) FROM=1.5m TO=2m + .MEAS TRAN period TRIG V(clk) VAL=2.5 RISE=1 TARG V(clk) VAL=2.5 RISE=2 + .MEAS TRAN freq PARAM 1/period + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "avg_out", 5.0, 0.5); + AssertMeasurementLess(result, "ripple", 0.2); + AssertMeasurementNear(result, "freq", 100000.0, 10000.0); + } + + // Prompt: Design a second-order Butterworth low-pass filter using a Sallen-Key topology with unity gain. Provide a measured SPICE netlist with AC analysis and appropriate measurements. + [Fact] + public void Sallen_Key_Butterworth_Low_Pass_Filter_2ec7c9ed719c649a() + { + var result = RunAcceptedExample( + "deepseek:01661_8623ebfd7db4940d:2ec7c9ed719c649a", + """ + * Sallen-Key Butterworth Low-Pass Filter + VIN in 0 DC 0 AC 1 + R1 in n1 10k + C1 n1 out 22.6n + R2 n1 pos 10k + C2 pos 0 11.3n + E1 out 0 pos out 100000 + .AC DEC 100 1 100k + .MEAS AC f3db WHEN VDB(out)=-3 FALL=1 + .MEAS AC gain_lf FIND VDB(out) AT=1 + .MEAS AC gain_10k FIND VDB(out) AT=10k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "f3db", 900.0, 1100.0); + AssertMeasurementBetween(result, "gain_lf", (-0.5), 0.5); + AssertMeasurementLess(result, "gain_10k", (-20.0)); + } + + // Prompt: Wien-bridge oscillator uses a behavioral op-amp (E source) with high gain. + [Fact] + public void Wien_bridge_sine_wave_oscillator_89d73d19f97843d3() + { + var result = RunAcceptedExample( + "deepseek:00387_1f13796ffb5b91e9:89d73d19f97843d3", + """ + * Wien-bridge sine-wave oscillator + .OPTIONS POST PROBE + E_opamp out 0 pos neg 100000 + R1 out a 10k + C1 a pos 10n + R2 pos 0 10k + C2 pos 0 10n + Rf out neg 22k + Rg neg 0 10k + D1 out neg diode_model + D2 neg out diode_model + .MODEL diode_model D(IS=1p RS=1) + .IC V(pos)=0.1 + .TRAN 1u 10m 0 1u UIC + .measure TRAN period TRIG V(out) VAL=0 RISE=5 TARG V(out) VAL=0 RISE=6 + .measure TRAN vpp PP V(out) FROM=6m TO=10m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "period", 0.000588, 0.000667); + AssertMeasurementBetween(result, "vpp", 0.5, 10.0); + } + + // Prompt: Non-inverting precision half-wave rectifier using a behavioral op-amp with gain 100 000 and \xb115 V limits. + [Fact] + public void Precision_half_wave_rectifier_with_non_inverting_op_amp_5034eb3d2d6fcd31() + { + var result = RunAcceptedExample( + "deepseek:00717_f2fb5456300c3ba4:5034eb3d2d6fcd31", + """ + * Precision half-wave rectifier with non-inverting op-amp + VIN in 0 SIN(0 1 1k) + R1 inv 0 1k + R2 out inv 9k + XOP in inv opout opamp + D1 opout out D1N4148 + .MODEL D1N4148 D(IS=2.52e-09 RS=0.568 N=1.752 CJO=4e-12 M=0.4 TT=2e-08) + .SUBCKT opamp ninv inv out + E1 nout 0 VALUE={LIMIT(100000*V(ninv,inv), -15, 15)} + Rout nout out 100 + .ENDS + .TRAN 1u 5m + .meas tran vout_max MAX V(out) + .meas tran vout_avg AVG V(out) + .meas tran vout_at_2ms FIND V(out) AT=2m + .meas tran vout_min MIN V(out) + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "vout_max", 10.0, 0.5); + AssertMeasurementNear(result, "vout_avg", 3.183, 0.2); + AssertMeasurementNear(result, "vout_at_2ms", 0.0, 0.1); + AssertMeasurementNear(result, "vout_min", 0.0, 0.1); + } + + // Prompt: Design a CMOS inverter with a capacitive load and measure the output rise and fall times. + [Fact] + public void CMOS_Inverter_with_Capacitive_Load_and_Rise_Fall_Measurement_8377694ffdf67409() + { + var result = RunAcceptedExample( + "deepseek:01354_8377694ffdf67409:8377694ffdf67409", + """ + * CMOS Inverter with Capacitive Load and Rise-Fall Measurement + M1 out in 0 0 nmos W=2u L=0.18u + M2 out in vdd vdd pmos W=4u L=0.18u + VDD vdd 0 DC 1.8 + VIN in 0 PULSE(0 1.8 1n 0.1n 0.1n 5n 10n) + CLOAD out 0 100f + .MODEL nmos NMOS (VTO=0.5 KP=100u LAMBDA=0.05) + .MODEL pmos PMOS (VTO=-0.5 KP=50u LAMBDA=0.05) + .TRAN 0.01n 20n + .MEASURE tran TRISE TRIG v(out) VAL='0.1*1.8' RISE=1 TARG v(out) VAL='0.9*1.8' RISE=1 + .MEASURE tran TFALL TRIG v(out) VAL='0.9*1.8' FALL=1 TARG v(out) VAL='0.1*1.8' FALL=1 + .MEASURE tran TPLH TRIG v(in) VAL='0.9*1.8' FALL=1 TARG v(out) VAL='0.9*1.8' RISE=1 + .MEASURE tran TPHL TRIG v(in) VAL='0.1*1.8' RISE=1 TARG v(out) VAL='0.1*1.8' FALL=1 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "TRISE", 1e-11, 5e-10); + AssertMeasurementBetween(result, "TFALL", 1e-11, 5e-10); + AssertMeasurementBetween(result, "TPLH", 1e-11, 5e-10); + AssertMeasurementBetween(result, "TPHL", 1e-11, 5e-10); + } + + // Prompt: Simulate a CMOS 2-input NOR gate using 0.5\xb5m MOSFET models with 3.3V supply, and measure the high-to-low propagation delay. + [Fact] + public void CMOS_NOR2_Gate_Transient_Response_c4df63ee1ad99b4f() + { + var result = RunAcceptedExample( + "deepseek:00298_8852c2b9b226d5ce:c4df63ee1ad99b4f", + """ + * CMOS NOR2 Gate Transient Response + VDD Vdd 0 DC 3.3 + VA A 0 PULSE(0 3.3 10n 0.1n 0.1n 40n 80n) + VB B 0 PULSE(0 3.3 30n 0.1n 0.1n 40n 80n) + M1 Y A 0 0 NMOS W=10u L=1u + M2 Y B 0 0 NMOS W=10u L=1u + Mp1 Y A int Vdd PMOS W=20u L=1u + Mp2 int B Vdd Vdd PMOS W=20u L=1u + .MODEL NMOS NMOS (LEVEL=1 VTO=0.7 KP=100u LAMBDA=0.02) + .MODEL PMOS PMOS (LEVEL=1 VTO=-0.7 KP=40u LAMBDA=0.02) + .TRAN 0.01n 200n + .MEASURE TRAN tphl_A TRIG v(A) VAL=1.65 RISE=1 TARG v(Y) VAL=1.65 FALL=1 + .MEASURE TRAN vout_high FIND v(Y) AT=90n + .MEASURE TRAN vout_low FIND v(Y) AT=40n + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementLess(result, "tphl_A", 5e-09); + AssertMeasurementGreater(result, "vout_high", 3.0); + AssertMeasurementLess(result, "vout_low", 0.3); + } + + // Prompt: Class-AB push-pull output stage with NPN Q1 and PNP Q2 driven by \xb115 V supplies. + [Fact] + public void Class_AB_output_stage_with_diode_bias_and_series_resistor_for_quiescent_current_adjustment_6d8eea61f3af3338() + { + var result = RunAcceptedExample( + "deepseek:01107_4bf524ba95262d17:6d8eea61f3af3338", + """ + * Class-AB output stage with diode bias and series resistor for quiescent current adjustment + VCC vcc 0 DC 15 + VEE vee 0 DC -15 + VIN in 0 SIN(0.7 0.5 1k 0 0) + R1 vcc in 10k + D1 in mid dmod + R3 mid tmp 1 + D2 tmp base2 dmod + R2 base2 vee 10k + Q1 vcc in q1e npn_mod + Vq1meas q1e out 0 + Q2 vee base2 out pnp_mod + RL out 0 1k + .MODEL dmod D(IS=1e-14 RS=1) + .MODEL npn_mod NPN(IS=1e-14 BF=100) + .MODEL pnp_mod PNP(IS=1e-14 BF=80) + .OP + .TRAN 0.1m 5m + .MEASURE OP vout_dc FIND V(out) AT=0 + .MEASURE OP iq1 FIND I(Vq1meas) AT=0 + .MEASURE TRAN vout_pp PP V(out) FROM=0 TO=5m + .MEASURE TRAN vout_max MAX V(out) FROM=0 TO=5m + .MEASURE TRAN vout_min MIN V(out) FROM=0 TO=5m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "vout_dc", (-0.5), 0.5); + AssertMeasurementBetween(result, "iq1", 0.0001, 0.01); + AssertMeasurementBetween(result, "vout_pp", 0.8, 1.2); + AssertMeasurementBetween(result, "vout_max", 0.3, 0.7); + AssertMeasurementBetween(result, "vout_min", (-0.7), (-0.3)); + } + + // Prompt: Connect two PMOS with drain to input, source to output, body to source. + [Fact] + public void Ideal_Diode_ORing_Power_Mux_with_PMOS_correct_orientation_d1ad77ca91626de3() + { + var result = RunAcceptedExample( + "deepseek:02012_559a013d09156158:d1ad77ca91626de3", + """ + * Ideal-Diode ORing Power Mux with PMOS (correct orientation) + V1 in1 0 DC 5 + V2 in2 0 PULSE(5.5 4 0.1m 0.1m 0.1m 0.5m 1m) + Rload out 0 10 + M1 in1 gate1 out out pmos + M2 in2 gate2 out out pmos + .MODEL pmos PMOS(VTO=-2 KP=1) + E1 gate1 0 VALUE = { IF(V(in1) > V(in2), 0, V(out)) } + E2 gate2 0 VALUE = { IF(V(in2) > V(in1), 0, V(out)) } + .OP + .TRAN 0.01m 2m + .MEAS TRAN vout_init FIND V(out) AT=0 + .MEAS TRAN i_v1_at0 FIND I(V1) AT=0 + .MEAS TRAN i_v2_at0 FIND I(V2) AT=0 + .MEAS TRAN vout_min MIN V(out) FROM=0 TO=2m + .MEAS TRAN i_v2_low FIND I(V2) AT=0.5m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "vout_init", 5.5, 0.2); + AssertMeasurementNear(result, "i_v1_at0", 0.0, 0.0001); + AssertMeasurementLess(result, "i_v2_at0", (-0.4)); + AssertMeasurementGreater(result, "vout_min", 4.5); + AssertMeasurementNear(result, "i_v2_low", 0.0, 0.0001); + } + + // Prompt: Design a diode steering network to protect an analog input from overvoltage. Use two diodes to clamp the input node between 5V and ground, with a series current-limiting resistor. + [Fact] + public void Diode_steering_input_protection_clamp_465056fdfd0c91c2() + { + var result = RunAcceptedExample( + "deepseek:00779_2aee08272d28a456:465056fdfd0c91c2", + """ + * Diode steering input protection clamp + VIN in_src 0 PULSE(-2 10 1u 0.5u 0.5u 4u 10u) + R1 in_src clamped 1k + Rload clamped 0 10k + D1 clamped VCC dmod + D2 0 clamped dmod + VCC VCC 0 DC 5 + .MODEL dmod D(IS=1e-14 RS=10) + .TRAN 0.05u 20u + .MEAS TRAN vclamp_max MAX V(clamped) FROM=0 TO=20u + .MEAS TRAN vclamp_min MIN V(clamped) FROM=0 TO=20u + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "vclamp_max", 5.4, 6.1); + AssertMeasurementBetween(result, "vclamp_min", (-1.1), (-0.3)); + } + + // Prompt: Design a class-B push-pull output stage using complementary NPN and PNP BJTs, driven by a sinusoidal input, and simulate the transient response to observe crossover distortion. + [Fact] + public void Class_B_push_pull_output_stage_db4834633e292c12() + { + var result = RunAcceptedExample( + "deepseek:01103_bd926db3f3a4f3ae:db4834633e292c12", + """ + * Class-B push-pull output stage + Q1 VCC in out NPN + Q2 VEE in out PNP + Rload out 0 100 + VCC VCC 0 DC 12 + VEE VEE 0 DC -12 + VIN in 0 SIN(0 10 1k) + .MODEL NPN NPN(IS=1e-14 BF=100) + .MODEL PNP PNP(IS=1e-14 BF=100) + .OP + .TRAN 0.1u 2m 0 0.1u + .MEASURE TRAN max_out MAX V(out) + .MEASURE TRAN min_out MIN V(out) + .MEASURE TRAN vout_rms RMS V(out) FROM=1m TO=2m + .MEASURE TRAN vin_rms RMS V(in) FROM=1m TO=2m + .MEASURE TRAN gain_ratio PARAM vout_rms/vin_rms + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "max_out", 8.0, 11.0); + AssertMeasurementBetween(result, "min_out", (-11.0), (-8.0)); + AssertMeasurementBetween(result, "gain_ratio", 0.7, 0.99); + } + + // Prompt: The circuit is a positive-level-sensitive D-latch built with CMOS transmission gates and standard inverters. + [Fact] + public void CMOS_Transmission_Gate_Latch_4ab0fa930bab5fad() + { + var result = RunAcceptedExample( + "deepseek:01366_d869f9576551172d:4ab0fa930bab5fad", + """ + * CMOS Transmission-Gate Latch + VDD VDD 0 DC 3.3 + VCLK clk 0 PULSE(0 3.3 0 0.1n 0.1n 5n 10n) + VIN D 0 PWL(0 0 1.9n 0 2n 3.3 6.9n 3.3 7n 0 15n 0) + Mp1 clkbar clk VDD VDD PMOS W=10u L=0.35u + Mn1 clkbar clk 0 0 NMOS W=5u L=0.35u + Mtg1n X clk D 0 NMOS W=5u L=0.35u + Mtg1p X clkbar D VDD PMOS W=10u L=0.35u + Mtg2n X clkbar Q 0 NMOS W=5u L=0.35u + Mtg2p X clk Q VDD PMOS W=10u L=0.35u + Mp2 Y X VDD VDD PMOS W=10u L=0.35u + Mn2 Y X 0 0 NMOS W=5u L=0.35u + Mp3 Q Y VDD VDD PMOS W=10u L=0.35u + Mn3 Q Y 0 0 NMOS W=5u L=0.35u + Cload Q 0 100f + Cx X 0 10f + .MODEL NMOS NMOS (VTO=0.7 KP=200u LAMBDA=0.05) + .MODEL PMOS PMOS (VTO=-0.7 KP=80u LAMBDA=0.05) + .TRAN 0.1n 20n + .MEAS TRAN v_q_4n FIND V(Q) AT=4n + .MEAS TRAN v_q_9n FIND V(Q) AT=9n + .MEAS TRAN v_q_14n FIND V(Q) AT=14n + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "v_q_4n", 3.0, 3.35); + AssertMeasurementBetween(result, "v_q_9n", 3.0, 3.35); + AssertMeasurementBetween(result, "v_q_14n", 0.0, 0.5); + } + + // Prompt: Basic RC low\u2011pass filter: 1k\u03a9 resistor and 1\xb5F capacitor. + [Fact] + public void First_order_RC_low_pass_filter_584bf3c7307746bb() + { + var result = RunAcceptedExample( + "deepseek:00061_337079027fb4941e:584bf3c7307746bb", + """ + * First-order RC low-pass filter + V1 in 0 DC 0 AC 1 + R1 in out 1k + C1 out 0 1u + .ac dec 10 1 10k + .MEAS AC dc_gain FIND vdb(out) AT=1 + .MEAS AC cutoff_freq WHEN vdb(out)=-3 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "cutoff_freq", 159.15, 2.0); + AssertMeasurementNear(result, "dc_gain", 0.0, 0.1); + } + + // Prompt: Wheatstone bridge with PT100 RTD in one leg, powered by 5 V. + [Fact] + public void RTD_Bridge_with_Instrumentation_Amplifier_560ad56545fb8a0b() + { + var result = RunAcceptedExample( + "deepseek:02146_da70fb3db0422e93:560ad56545fb8a0b", + """ + * RTD Bridge with Instrumentation Amplifier + Vtemp T 0 DC 0 + Vbridge V_bridge 0 DC 5 + Rrtd V_bridge n1 R=100*(1+0.00385*V(T)) + Rleft n1 0 100 + Rtop_right V_bridge n2 100 + Rbot_right n2 0 100 + Rf1_1 out1 inv1 5.75k + Rf1_2 out2 inv2 5.75k + Rgain inv1 inv2 1k + R1a out1 in3 10k + Rfb out in3 10k + R2a out2 inn3 10k + R2g inn3 0 10k + E_A1 out1 0 n1 inv1 1E5 + E_A2 out2 0 n2 inv2 1E5 + E_A3 out 0 inn3 in3 1E5 + .OP + .DC Vtemp 0 100 10 + .MEAS DC VOUT0 FIND V(OUT) AT=0 + .MEAS DC VOUT100 FIND V(OUT) AT=100 + .MEAS DC VOUT_DIFF PARAM VOUT100 - VOUT0 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "VOUT0", 0.0, 0.001); + AssertMeasurementBetween(result, "VOUT_DIFF", 4.9, 5.2); + } + + // Prompt: Common-source JFET amplifier with source bypass capacitor increases gain. + [Fact] + public void JFET_Common_Source_Amplifier_with_Source_Bypass_e551c8b2ee6f270d() + { + var result = RunAcceptedExample( + "deepseek:00280_3eae93507a1badfc:e551c8b2ee6f270d", + """ + * JFET Common-Source Amplifier with Source Bypass + VDD VDD 0 DC 15 + VIN in 0 DC 0 AC 1 SIN(0 0.1 1k) + C1 in gate 10u + Rg gate 0 1MEG + Rs source 0 1k + C3 source 0 100u + Rd VDD drain 10k + J1 drain gate source nj + C2 drain out 10u + Rload out 0 100k + .MODEL nj NJF(VTO=-1.8333 BETA=1.44E-3 LAMBDA=0.01) + .OP + .DC VIN 0 0 1 + .MEASURE DC vd FIND V(drain) AT=0 + .MEASURE DC vs FIND V(source) AT=0 + .MEASURE DC vgs FIND V(gate,source) AT=0 + .MEASURE DC id FIND I(Rd) AT=0 + .AC DEC 10 10 100k + .MEAS AC gain_db FIND VDB(out) AT=1000 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "vd", 4.5, 5.5); + AssertMeasurementBetween(result, "vs", 0.8, 1.2); + AssertMeasurementBetween(result, "vgs", (-1.3), (-0.7)); + AssertMeasurementBetween(result, "id", 0.0008, 0.0012); + AssertMeasurementBetween(result, "gain_db", 24.0, 28.0); + } + + // Prompt: The circuit is a diode clamp using a negative supply rail as the clamping reference. + [Fact] + public void Diode_clamp_to_negative_rail_43a3c01a999d78cd() + { + var result = RunAcceptedExample( + "deepseek:00751_e05a27b2e7405992:43a3c01a999d78cd", + """ + * Diode clamp to negative rail + VIN in 0 PULSE(-1 1 0 1n 1n 0.5m 1m) + VNEG VNEG 0 DC -5 + C1 in clamp 1u + D1 VNEG clamp DN + .MODEL DN D(IS=1e-14 N=1) + R1 clamp VNEG 10k + .TRAN 0.01m 20m + .MEAS TRAN vmin MIN V(clamp) FROM=10m TO=20m + .MEAS TRAN vmax MAX V(clamp) FROM=10m TO=20m + .MEAS TRAN vavg AVG V(clamp) FROM=10m TO=20m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "vmin", (-6.0), (-4.5)); + AssertMeasurementBetween(result, "vmax", (-4.0), (-2.5)); + AssertMeasurementBetween(result, "vavg", (-5.5), (-4.0)); + } + + // Prompt: First-order passive RC low-pass filter with R=1k and C=1uF + [Fact] + public void First_order_RC_low_pass_filter_e4b1c713a0623351() + { + var result = RunAcceptedExample( + "deepseek:00063_50372b7aea0a01e4:e4b1c713a0623351", + """ + * First-order RC low-pass filter + Vin in 0 AC 1 + R1 in out 1000 + C1 out 0 1u + .AC DEC 10 1 100k + .MEAS AC gain_dc MAX VDB(out) + .MEAS AC f3db WHEN VDB(out)=-3.01 FALL=1 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "gain_dc", (-1.0), 1.0); + AssertMeasurementBetween(result, "f3db", 100.0, 300.0); + } + + // Prompt: Shunt voltage regulator using an op-amp as error amplifier. + [Fact] + public void Shunt_regulator_with_op_amp_error_amplifier_0beb6de35faf0b09() + { + var result = RunAcceptedExample( + "deepseek:01903_d72cffe958e5849c:0beb6de35faf0b09", + """ + * Shunt regulator with op-amp error amplifier + VREG IN 0 DC 10 + RS IN OUT 20 + RLOAD OUT 0 100 + R1 OUT FB 20k + R2 FB 0 10k + VREF REF 0 DC 2.5 + E1 OPAMP 0 FB REF 100000 + RB OPAMP BASE 1k + Q1 OUT BASE 0 QNPN + .MODEL QNPN NPN(IS=1e-14 BF=100 VAF=100) + .OP + .DC VREG 0 20 0.1 + .MEAS DC vout_at_vin10 FIND V(OUT) AT=10 + .MEAS DC vout_at_vin12 FIND V(OUT) AT=12 + .MEAS DC vout_at_vin8 FIND V(OUT) AT=8 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "vout_at_vin10", 7.4, 7.6); + AssertMeasurementBetween(result, "vout_at_vin12", 7.4, 7.6); + AssertMeasurementLess(result, "vout_at_vin8", 7.0); + } + + // Prompt: Bridged-T attenuator provides 6 dB loss in a 50 ohm system. + [Fact] + public void Bridged_T_Attenuator_6_dB_50_ohm_84b042964682ece3() + { + var result = RunAcceptedExample( + "deepseek:00470_160d3c8275eff75e:84b042964682ece3", + """ + * Bridged-T Attenuator, 6 dB, 50 ohm + Vs in_src 0 AC 1 DC 1 + Rs in_src in 50 + R1 in mid 50 + R2 mid out 50 + R3 mid 0 50 + R4 in out 50 + RL out 0 50 + + .OP + .AC DEC 10 100 100k + .MEAS AC Vout_mag MAX V(out) + .MEAS AC Vin_mag MAX V(in) + .MEAS AC attenuation_db PARAM 20*LOG10(Vout_mag/Vin_mag) + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "attenuation_db", (-6.02), 0.1); + } + + // Prompt: Two-pole passive RC ladder low-pass filter + [Fact] + public void Two_pole_RC_ladder_low_pass_filter_8a732a225861934f() + { + var result = RunAcceptedExample( + "deepseek:00040_010f89b647c29701:8a732a225861934f", + """ + * Two-pole RC ladder low-pass filter + V1 in 0 DC 0 AC 1 + R1 in n1 1k + C1 n1 0 100n + R2 n1 out 1k + C2 out 0 100n + .AC DEC 100 1 100k + .MEAS AC f3dB WHEN VDB(out)=-3 CROSS=1 + .MEAS AC gain_lf FIND VDB(out) AT=1 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "f3dB", 580.0, 610.0); + AssertMeasurementBetween(result, "gain_lf", (-0.1), 0.1); + } + + // Prompt: Design an RC differentiator circuit to detect edges of a 10 kHz square wave. + [Fact] + public void RC_Differentiating_Edge_Detector_d8bfb714e5497e1e() + { + var result = RunAcceptedExample( + "deepseek:00632_d8bfb714e5497e1e:d8bfb714e5497e1e", + """ + * RC Differentiating Edge Detector + V1 in 0 PULSE(0 5 0 1n 1n 10u 20u) + C1 in out 100p + R1 out 0 1k + .TRAN 0.01u 40u + .MEAS TRAN vmax MAX V(out) FROM=0 TO=20u + .MEAS TRAN vmin MIN V(out) FROM=0 TO=40u + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementGreater(result, "vmax", 4.5); + AssertMeasurementLess(result, "vmin", (-4.5)); + } + + // Prompt: Wien bridge oscillator with op-amp (E1) and diode amplitude control. + [Fact] + public void Wien_bridge_oscillator_with_diode_amplitude_control_fe4569602bc89385() + { + var result = RunAcceptedExample( + "deepseek:01766_4b337647227de71a:fe4569602bc89385", + """ + * Wien bridge oscillator with diode amplitude control + R1 out n1 10k + C1 n1 in+ 15n + R2 in+ 0 10k + C2 in+ 0 15n + Rf out in- 22k + Rg in- 0 10k + Rd out nd 1k + D1 nd in- DMOD + D2 in- nd DMOD + E1 out 0 in+ in- 100000 + .MODEL DMOD D(IS=1e-12 RS=1.5) + .IC V(in+)=0.01 + .TRAN 1u 10m UIC + .MEAS TRAN t1 WHEN V(out)=0 RISE=5 + .MEAS TRAN t2 WHEN V(out)=0 RISE=10 + .MEAS TRAN frequency PARAM 5/(t2-t1) + .MEAS TRAN vpp PP V(out) FROM=5m TO=10m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "frequency", 900.0, 1100.0); + AssertMeasurementBetween(result, "vpp", 1.0, 3.0); + } + + // Prompt: Design a Gilbert cell mixer using BJT differential pairs and measure conversion gain. + [Fact] + public void Gilbert_Mixer_9afb70a7897b87ab() + { + var result = RunAcceptedExample( + "deepseek:02080_eb5c9eb7fac93178:9afb70a7897b87ab", + """ + * Gilbert Mixer + VCC vcc 0 DC 5 + I1 tail 0 DC 1m + .MODEL QNPN NPN(IS=1e-15 BF=100 VAF=50) + R1 vcc out1 2k + R2 vcc out2 2k + Q1 em1 rf_p tail QNPN + Q2 em2 rf_n tail QNPN + Q3 out1 lo_p em1 QNPN + Q4 out2 lo_n em1 QNPN + Q5 out1 lo_n em2 QNPN + Q6 out2 lo_p em2 QNPN + VRFP rf_p 0 SIN(1.5 0.01 11MEG) + VRFN rf_n 0 SIN(1.5 0.01 11MEG 0 0 180) + VLOP lo_p 0 SIN(3.3 0.2 10MEG) + VLON lo_n 0 SIN(3.3 0.2 10MEG 0 0 180) + .OP + .TRAN 10n 5u + .MEAS TRAN vout_rms RMS V(out1,out2) FROM=4u TO=5u + .MEAS TRAN vin_rms RMS V(rf_p,rf_n) FROM=4u TO=5u + .MEAS TRAN gain PARAM='vout_rms/vin_rms' + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "gain", 15.0, 35.0); + } + + // Prompt: BJT Schmitt trigger built with two NPN transistors. + [Fact] + public void BJT_Schmitt_trigger_discrete_pair_5849b0d28af231d8() + { + var result = RunAcceptedExample( + "deepseek:01152_6c2e31f372079be6:5849b0d28af231d8", + """ + * BJT Schmitt trigger discrete pair + VCC vcc 0 DC 5 + VIN in 0 PULSE(0 5 0 2.5m 2.5m 0.1u 10m) + R1 vcc q2b 12k + R2 q2b 0 8k + RC1 vcc q1c 4.7k + RC2 vcc out 4.7k + RE e 0 1k + Q1 q1c in e npn + Q2 out q2b e npn + .MODEL npn NPN(IS=1e-14 BF=100 VAF=100) + .TRAN 0.1m 10m + .MEAS TRAN V_IH FIND V(in) WHEN V(out)=2.5 RISE=1 + .MEAS TRAN V_IL FIND V(in) WHEN V(out)=2.5 FALL=1 + .MEAS TRAN hysteresis PARAM V_IH - V_IL + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "hysteresis", 0.05, 2.0); + AssertMeasurementBetween(result, "V_IH", 1.5, 4.0); + AssertMeasurementBetween(result, "V_IL", 0.5, 2.5); + AssertMeasurementGreater(result, "hysteresis", 0.0); + } + + // Prompt: CMOS telescopic cascode amplifier with NMOS input pair, NMOS cascode devices, and PMOS cascode current mirror load. + [Fact] + public void CMOS_Telescopic_Cascode_Amplifier_0bd11db9d0e59354() + { + var result = RunAcceptedExample( + "deepseek:01246_b92498756a98a30f:0bd11db9d0e59354", + """ + * CMOS Telescopic Cascode Amplifier + VDD 1 0 DC 2.5 + VSS 2 0 DC -2.5 + * Tail current source + I1 10 2 DC 500U + * Input differential pair + M1 20 in1 10 2 NMOD W=50U L=0.5U + M2 30 in2 10 2 NMOD W=50U L=0.5U + * NMOS cascode transistors + M3 40 5 20 2 NMOD W=50U L=0.5U + M4 50 5 30 2 NMOD W=50U L=0.5U + * PMOS current mirror load with cascode + M5 60 60 1 1 PMOD W=50U L=0.5U + M6 70 60 1 1 PMOD W=50U L=0.5U + M7 40 6 60 1 PMOD W=50U L=0.5U + M8 50 6 70 1 PMOD W=50U L=0.5U + * Bias voltages + Vbiasn 5 0 DC 1.02 + Vbiasp 6 0 DC 0.47 + * Input voltage sources + Vin1 in1 0 DC 0 AC 1 + Vin2 in2 0 DC 0 AC 0 + * Load capacitor + CL 50 0 1P + * Models + .MODEL NMOD NMOS (VTO=0.5 KP=100U LAMBDA=0.02 GAMMA=0) + .MODEL PMOD PMOS (VTO=-0.7 KP=50U LAMBDA=0.02 GAMMA=0) + * Analyses + .OP + .DC Vin1 -0.1 0.1 0.01 + .AC DEC 10 1 1E9 + * Measurements + .MEAS DC vout_dc FIND V(50) AT=0 + .MEAS DC vds1_dc FIND V(20,10) AT=0 + .MEAS AC max_gain MAX VDB(50) + .MEAS AC ugfreq WHEN VDB(50)=0 FALL=1 + .MEAS AC gain_at_1k FIND VDB(50) AT=1k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementGreater(result, "max_gain", 20.0); + AssertMeasurementBetween(result, "ugfreq", 1000000.0, 1000000000.0); + AssertMeasurementBetween(result, "vout_dc", (-2.5), 2.5); + var max_gain = MeasurementValue(result, "max_gain"); + var gain_at_1k = MeasurementValue(result, "gain_at_1k"); + AssertMeasurementNear(result, "gain_at_1k", max_gain, 1.0); + } + + // Prompt: Design an L-section matching network to transform a 200 ohm load to a 50 ohm source at 1 MHz. Use SPICE with AC analysis and measure output voltage. + [Fact] + public void L_section_Matching_Network_50_Ohm_source_to_200_Ohm_load_at_1_MHz_5f314cc44ea4e6b0() + { + var result = RunAcceptedExample( + "deepseek:00105_5f314cc44ea4e6b0:5f314cc44ea4e6b0", + """ + * L-section Matching Network: 50 Ohm source to 200 Ohm load at 1 MHz + * Series L = 13.78uH, Shunt C = 1.38nF (low-pass configuration) + VIN in 0 AC 1 DC 0 + Rsrc in n1 50 + L1 n1 out 13.78u + C1 out 0 1.38n + Rload out 0 200 + .AC DEC 10 100k 10MEG + .MEASURE AC vout_at_1MHz FIND VM(out) AT=1MEG + .MEASURE AC max_vout MAX VM(out) + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "vout_at_1MHz", 1.0, 0.1); + AssertMeasurementNear(result, "max_vout", 1.0, 0.1); + } + + // Prompt: Create a diode steering network to protect an input pin from overvoltage. Use two diodes clamping to +5V and -5V supplies, with a 1k\u03a9 series resistor. Apply a pulse input that swings from -10V to +10V. Run a transient simulation and measure the maximum and minimum output voltages. + [Fact] + public void Diode_input_protection_with_clamping_to_5V_rails_e596e87637906c64() + { + var result = RunAcceptedExample( + "deepseek:00778_8e5748e4e94aef52:e596e87637906c64", + """ + * Diode input protection with clamping to +/-5V rails + VIN in 0 PULSE(-10 10 0 1u 1u 1m 2m) + R1 in out 1k + D1 out vcc DMOD + D2 vee out DMOD + VCC vcc 0 DC 5 + VEE vee 0 DC -5 + .MODEL DMOD D(IS=1e-14 RS=1) + .TRAN 1u 5m + .MEAS TRAN max_vout MAX V(out) + .MEAS TRAN min_vout MIN V(out) + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "max_vout", 4.5, 6.5); + AssertMeasurementBetween(result, "min_vout", (-6.5), (-4.5)); + } + + // Prompt: This circuit is a parameterized resistor voltage divider. + [Fact] + public void Parameterized_Resistor_Divider_58ecc7504e9edd4e() + { + var result = RunAcceptedExample( + "deepseek:02382_ea72184615d913c7:58ecc7504e9edd4e", + """ + * Parameterized Resistor Divider + .PARAM r1=1k r2=2k vcc=10 + V1 in 0 DC {vcc} + R1 in out {r1} + R2 out 0 {r2} + .OP + .MEAS OP vout FIND V(out) AT=0 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "vout", 6.6667, 0.001); + } + + // Prompt: Design an RC delay network with R=1k\u03a9 and C=1\xb5F, driven by a voltage pulse source, and connected to a high-impedance load. Simulate the transient response and measure the time to reach 63% of the input voltage. + [Fact] + public void RC_Delay_Network_Driving_High_Impedance_Load_7819beca88b32e0d() + { + var result = RunAcceptedExample( + "deepseek:00032_7819beca88b32e0d:7819beca88b32e0d", + """ + * RC Delay Network Driving High Impedance Load + VIN in 0 PULSE(0 5 0 1u 1u 10m 20m) + R1 in out 1k + C1 out 0 1u + RLOAD out 0 1MEG + .TRAN 1u 10m + .MEAS TRAN delay_time WHEN V(out)=3.15 RISE=1 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "delay_time", 0.0009, 0.0011); + } + + // Prompt: The reset switch across the feedback capacitor is closed from ~1 \xb5s to 11 \xb5s, forcing the output to approximately Vref = 1.25 V. + [Fact] + public void Capacitive_Sensor_Charge_Amplifier_ee85b3320e713ee1() + { + var result = RunAcceptedExample( + "deepseek:02453_6ab2d2aeaa4a7317:ee85b3320e713ee1", + """ + * Capacitive Sensor Charge Amplifier + Vref vref 0 DC 1.25 + Vsrc src 0 PULSE(0 1 12u 1u 1u 100u 200u) + Cs src inv 100pF + Cf inv out 1nF + Rf inv out 100MEG + .MODEL swmod SW(RON=10 ROFF=100MEG VT=1.25 VH=0.25) + S1 inv out ctrl 0 swmod + Vctrl ctrl 0 PULSE(0 2.5 0 1u 1u 10u 20u) + E1 out 0 vref inv 100k + .TRAN 1u 50u + .MEASURE TRAN vout_reset FIND v(out) AT=5u + .MEASURE TRAN vout_final FIND v(out) AT=20u + .MEASURE TRAN delta_v PARAM='vout_final - vout_reset' + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "delta_v", (-0.1), 0.0001); + } + + // Prompt: Design a sawtooth generator using a current source, capacitor, and switch with a pulse reset. + [Fact] + public void Sawtooth_Generator_using_Current_Source_and_Reset_Switch_c202770e8cbb2626() + { + var result = RunAcceptedExample( + "deepseek:01852_c8772737ed2c1363:c202770e8cbb2626", + """ + * Sawtooth Generator using Current Source and Reset Switch + I1 vcc ramp 100uA + C1 ramp 0 1n + Vcc vcc 0 10 + Vreset reset 0 PULSE(0 5 0 1n 1n 1u 50u) + S1 ramp 0 reset 0 smod + .MODEL smod SW(RON=1 ROFF=1000MEG VT=0.5 VH=0.1) + .IC V(ramp)=0 + .TRAN 0.1u 200u UIC + .MEAS TRAN period TRIG V(ramp) VAL=2.5 RISE=1 TARG V(ramp) VAL=2.5 RISE=2 + .MEAS TRAN freq PARAM 1/period + .MEAS TRAN vmax MAX V(ramp) FROM=0 TO=200u + .MEAS TRAN vmin MIN V(ramp) FROM=0 TO=200u + .MEAS TRAN ampl PARAM vmax-vmin + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "period", 5e-05, 2e-06); + AssertMeasurementNear(result, "freq", 20000.0, 800.0); + AssertMeasurementBetween(result, "vmax", 4.8, 5.1); + AssertMeasurementBetween(result, "vmin", (-0.1), 0.1); + AssertMeasurementBetween(result, "ampl", 4.8, 5.1); + } + + // Prompt: BJT Colpitts oscillator biased from 12V supply + [Fact] + public void BJT_Colpitts_Oscillator_a1d65adf63d127a0() + { + var result = RunAcceptedExample( + "deepseek:01135_0b046dc1cc4faecb:a1d65adf63d127a0", + """ + * BJT Colpitts Oscillator + VCC VCC 0 12 + L1 VCC collector 10uH + C1 collector emitter 100pF + C2 emitter 0 100pF + Cbp base 0 100nF + R1 VCC base 47k + R2 base 0 10k + RE emitter 0 1k + Q1 collector base emitter QNPN + .model QNPN NPN(IS=1e-15 BF=150 VAF=100) + .IC V(emitter)=0.1 + .TRAN 10n 100u + .MEAS TRAN t1 WHEN V(collector)=12 RISE=500 + .MEAS TRAN t2 WHEN V(collector)=12 RISE=501 + .MEAS TRAN Tperiod PARAM t2-t1 + .MEAS TRAN fosc PARAM 1/Tperiod + .MEAS TRAN Vpp PP V(collector) FROM=80u TO=100u + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "fosc", 7120000.0, 200000.0); + AssertMeasurementGreater(result, "Vpp", 1.0); + } + + // Prompt: Current-starved integrator VCO using E-source op-amp and comparator + [Fact] + public void VCO_using_current_starved_integrator_7805d7562e8c5039() + { + var result = RunAcceptedExample( + "deepseek:01861_c7661d58f5140ed0:7805d7562e8c5039", + """ + * VCO using current-starved integrator + .param vctrl_val=2 + Vctrl ctrl 0 {vctrl_val} + Eopamp int_out 0 0 inv_int 100k + C1 int_out inv_int 100n + Rleak int_out inv_int 100Meg + R_curr inv_int v_curr 1k + E_mult v_curr 0 VALUE={ -V(ctrl) * V(comp_out)/5 } + Ecomp comp_out 0 VALUE={ 5*tanh(1e5*(V(inv_non)-V(int_out))) } + R3 comp_out inv_non 10k + R4 inv_non ref 10k + Vref ref 0 DC 2.5 + .IC V(int_out)=0 V(comp_out)=5 + .TRAN 0.1u 10m UIC + .STEP param vctrl_val LIST 1 2 3 4 5 + .MEAS TRAN period TRIG V(int_out) VAL=1 RISE=2 TARG V(int_out) VAL=1 RISE=3 + .MEAS TRAN freq PARAM 1/period + .END + """); + + AssertAllMeasurementsSuccessful(result); + var freq_1v = MeasurementValue(result, "freq", index: 0); + var freq_5v = MeasurementValue(result, "freq", index: 4); + Assert.True(((freq_5v > freq_1v)), CaseLabel(result)); + Assert.True(((500.0 <= freq_1v) && (freq_1v <= 6000.0)), CaseLabel(result)); + Assert.True(((3000.0 <= freq_5v) && (freq_5v <= 8000.0)), CaseLabel(result)); + } + + // Prompt: Design a negative voltage clamper using a diode that clamps the positive peak to -4.3V. + [Fact] + public void Diode_clamp_to_negative_rail_01936165b3167f5a() + { + var result = RunAcceptedExample( + "deepseek:00748_6baccd66e8211ab9:01936165b3167f5a", + """ + * Diode clamp to negative rail + VIN in 0 SIN(0 1 1k) + C1 in out 1uF + D1 out nrail dmod + .MODEL dmod D(IS=1e-14) + VEE nrail 0 DC -5 + R1 out 0 100k + .TRAN 0.01m 5m + .MEASURE TRAN vmax MAX V(out) FROM=1m TO=5m + .MEASURE TRAN vmin MIN V(out) FROM=1m TO=5m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "vmax", (-4.5), (-4.0)); + AssertMeasurementBetween(result, "vmin", (-6.5), (-6.0)); + } + + // Prompt: 5th-order Chebyshev high-pass LC ladder with 0.5 dB passband ripple. + [Fact] + public void _5th_Order_Chebyshev_High_Pass_Ladder_0_5_dB_ripple_fc_1_kHz_Rs_RL_50_scaled_185c095213684bd8() + { + var result = RunAcceptedExample( + "deepseek:00591_b9c6d25e35bfe1d6:185c095213684bd8", + """ + * 5th-Order Chebyshev High-Pass Ladder, 0.5 dB ripple, fc=1 kHz, Rs=RL=50 (scaled) + VIN in 0 DC 0 AC 2 + RS in 1 50 + C1 1 2 1.3995u + L2 2 0 4.854m + C3 2 3 0.9398u + L4 3 0 4.854m + C5 3 out 1.3995u + RL out 0 50 + .AC DEC 100 10 100k + .MEAS AC f3db WHEN VDB(out)=-3 RISE=1 + .MEAS AC att100Hz FIND VDB(out) AT=100 + .MEAS AC att10kHz FIND VDB(out) AT=10k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "f3db", 1000.0, 2000.0); + AssertMeasurementLess(result, "att100Hz", (-30.0)); + AssertMeasurementBetween(result, "att10kHz", (-1.0), 1.0); + } + + // Prompt: Zero-crossing detector using ideal op-amp (E source) with clamping diodes. + [Fact] + public void Zero_crossing_detector_fa7cca35daa47f0a() + { + var result = RunAcceptedExample( + "deepseek:01613_b6d59398316b850c:fa7cca35daa47f0a", + """ + * Zero-crossing detector + VCC vcc 0 DC 5 + VEE vee 0 DC -5 + VIN in 0 SIN(0 1 1k) + E_AMP amp_int 0 in 0 1e5 + R1 amp_int out 100 + RLOAD out 0 10k + D1 out vcc DMOD + D2 vee out DMOD + .model DMOD D(IS=1e-12) + .tran 1u 5m 0 0.1u + .meas TRAN Vout_avg AVG V(out) FROM=0 TO=5m + .meas TRAN Vout_max MAX V(out) + .meas TRAN Vout_min MIN V(out) + .meas TRAN Vout_high WHEN V(out)=4 RISE=1 + .meas TRAN Vout_low WHEN V(out)=-4 FALL=1 + .meas TRAN t_in0 WHEN V(in)=0 RISE=1 + .meas TRAN t_out0 WHEN V(out)=0 RISE=1 + .meas TRAN delay PARAM t_out0 - t_in0 + .meas TRAN t_rise1 WHEN V(out)=0 RISE=1 + .meas TRAN t_rise2 WHEN V(out)=0 RISE=2 + .meas TRAN period PARAM t_rise2 - t_rise1 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "Vout_avg", 0.0, 0.1); + AssertMeasurementBetween(result, "Vout_max", 5.0, 6.0); + AssertMeasurementBetween(result, "Vout_min", (-6.0), (-5.0)); + AssertMeasurementNear(result, "period", 0.001, 0.0001); + AssertMeasurementLess(result, "delay", 1e-05); + } + + // Prompt: 4-bit SAR ADC front-end with sample-and-hold and comparator using ideal voltage-controlled switches. + [Fact] + public void SAR_ADC_Sample_Comparator_Front_End_f6bf021245fc7f03() + { + var result = RunAcceptedExample( + "deepseek:02223_c05853bab52e46ff:f6bf021245fc7f03", + """ + * SAR ADC Sample Comparator Front End + * Samples 1.2V input and compares to DAC output during SAR sequence + Vin in 0 DC 1.2 + Vref vref 0 DC 2.5 + Vclk clk 0 PULSE(0 5 0 1n 1n 0.5u 1u) + S1 in sample clk 0 swmod + .model swmod SW(RON=100 ROFF=1MEG VT=2.5 VH=0.5) + C1 sample 0 10pF + Ebuf buf 0 sample 0 1.0 + Rbuf buf comp_pos 1k + Ecomp comp_out 0 VALUE={( V(comp_pos) > V(dac_out) )? 5 : 0} + Vb3 b3 0 PULSE(0 5 1u 1n 1n 0.5u 100u) + Vb2 b2 0 PULSE(0 5 1.5u 1n 1n 3.5u 100u) + Vb1 b1 0 PULSE(0 5 2u 1n 1n 3u 100u) + Vb0 b0 0 PULSE(0 5 2.5u 1n 1n 2.5u 100u) + Einv3 inv_b3 0 VALUE={5 - V(b3)} + Einv2 inv_b2 0 VALUE={5 - V(b2)} + Einv1 inv_b1 0 VALUE={5 - V(b1)} + Einv0 inv_b0 0 VALUE={5 - V(b0)} + R2r3 dac_out b3_sw 20k + S3v b3_sw vref b3 0 swmod + S3g b3_sw 0 inv_b3 0 swmod + Rseries1 dac_out node2 10k + R2r2 node2 b2_sw 20k + S2v b2_sw vref b2 0 swmod + S2g b2_sw 0 inv_b2 0 swmod + Rseries2 node2 node3 10k + R2r1 node3 b1_sw 20k + S1v b1_sw vref b1 0 swmod + S1g b1_sw 0 inv_b1 0 swmod + Rseries3 node3 node4 10k + R2r0 node4 b0_sw 20k + S0v b0_sw vref b0 0 swmod + S0g b0_sw 0 inv_b0 0 swmod + Rterm node4 0 20k + .tran 10n 5u 0 10n + .meas TRAN samp_out FIND V(buf) AT=0.6u + .meas TRAN comp1 FIND V(comp_out) AT=1.4u + .meas TRAN comp2 FIND V(comp_out) AT=1.9u + .meas TRAN comp3 FIND V(comp_out) AT=2.4u + .meas TRAN comp4 FIND V(comp_out) AT=2.9u + .end + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "samp_out", 1.2, 0.1); + AssertMeasurementLess(result, "comp1", 1.0); + AssertMeasurementGreater(result, "comp2", 4.0); + AssertMeasurementGreater(result, "comp3", 4.0); + AssertMeasurementGreater(result, "comp4", 4.0); + } + + // Prompt: Synchronous AM detector using two switches driven by complementary 1MHz square waves to perform full-wave rectification. + [Fact] + public void Synchronous_AM_detector_with_switching_demodulator_f6f1c122300092c4() + { + var result = RunAcceptedExample( + "deepseek:02109_f53aafa8c1afccb4:f6f1c122300092c4", + """ + * Synchronous AM detector with switching demodulator + .param pi=3.14159 + V_SQ_P pos 0 PULSE(0 5 0 1n 1n 0.5u 1u) + V_SQ_N neg 0 PULSE(5 0 0 1n 1n 0.5u 1u) + E_AM am 0 VALUE={1.05*(1+0.5*SIN(2*pi*1e4*TIME))*SIN(2*pi*1e6*TIME)} + R1 p 0 10k + R2 n 0 10k + S1 am p pos 0 smod + S2 am n neg 0 smod + .MODEL smod SW(RON=1 ROFF=1MEG VT=2.5 VH=0.5) + E_DIFF diff_out 0 p n 1 + R3 diff_out demod_filt 1k + C1 demod_filt 0 1.5nF + C_HP demod_filt demod_out 1nF + R_HP demod_out 0 100k + .TRAN 0.01u 2m 0 0.01u + .MEAS TRAN vout_pp PP V(demod_out) FROM=1m TO=2m + .MEAS TRAN vout_rms RMS V(demod_out) FROM=1m TO=2m + .MEAS TRAN vout_dc AVG V(diff_out) FROM=1m TO=2m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "vout_pp", 0.5, 0.8); + AssertMeasurementBetween(result, "vout_rms", 0.2, 0.3); + AssertMeasurementBetween(result, "vout_dc", 0.6, 0.7); + } + + // Prompt: A 5V DC supply powers a voltage divider formed by R1 (10k\u03a9) and R2 (30k\u03a9). + [Fact] + public void Parameterized_Resistor_Divider_7951a85c6199c6f5() + { + var result = RunAcceptedExample( + "deepseek:02381_a8c13823d83dc721:7951a85c6199c6f5", + """ + * Parameterized Resistor Divider + .PARAM Vs=5 R1=10k R2=30k + V1 n1 0 DC {Vs} + R1 n1 out {R1} + R2 out 0 {R2} + .DC V1 5 5 1 + .MEAS DC vout FIND V(out) AT=5 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "vout", 3.7, 3.8); + } + + // Prompt: Improved Wilson current mirror using NPN BJTs with emitter degeneration resistors. + [Fact] + public void Improved_Wilson_BJT_Current_Mirror_with_Emitter_Degeneration_3a40f3adf7b22675() + { + var result = RunAcceptedExample( + "deepseek:01031_015c4efef4d4b220:3a40f3adf7b22675", + """ + * Improved Wilson BJT Current Mirror with Emitter Degeneration + VCC vcc 0 DC 10 + Rref vcc ref 9.3k + Q1 ref ref e1 npn + R1 e1 0 5 + Q2 q2c ref e2 npn + R2 e2 0 5 + Q3 out ref q2c npn + VOUT out 0 DC 10 + .MODEL npn NPN(IS=1e-15 BF=100 VAF=50) + .OP + .DC VOUT 0 10 0.1 + .MEAS DC iout_at5 FIND I(VOUT) AT=5 + .MEAS DC iout_at8 FIND I(VOUT) AT=8 + .MEAS DC iref FIND I(Rref) AT=5 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "iout_at5", 0.001, 0.05); + AssertMeasurementNear(result, "iout_at8", 0.001, 0.05); + AssertMeasurementNear(result, "iref", 0.001, 0.05); + } + + // Prompt: Single-ended class-A audio output stage using one NPN BJT in emitter-follower configuration + [Fact] + public void Class_A_BJT_emitter_follower_output_stage_e3bbd91d23228208() + { + var result = RunAcceptedExample( + "deepseek:00233_25f541e6091bea14:e3bbd91d23228208", + """ + * Class-A BJT emitter follower output stage + VCC VCC 0 DC 12 + VIN IN 0 SIN(0 2 1k 1m 0) AC 1 + R1 VCC N001 141.3 + R2 N001 0 178.7 + C1 IN N001 10u + Q1 VCC N001 N003 NPNMOD + RE N003 0 15 + COUT N003 OUT 1000u + RL OUT 0 8 + .MODEL NPNMOD NPN(IS=1e-15 BF=100) + .OP + .TRAN 1u 5m 0 1u + .MEASURE TRAN vce_q FIND V(VCC,N003) AT=0.5m + .MEASURE TRAN vout_max MAX V(OUT) FROM=1m TO=5m + .MEASURE TRAN vce_min MIN V(VCC,N003) FROM=1m TO=5m + .END + """); + + AssertAllMeasurementsSuccessful(result); + var vce_q = MeasurementValue(result, "vce_q"); + Assert.True(((5.0 < vce_q) && (vce_q < 7.0)), CaseLabel(result)); + var vout_max = MeasurementValue(result, "vout_max"); + Assert.True(((vout_max > 1.0)), CaseLabel(result)); + var vce_min = MeasurementValue(result, "vce_min"); + Assert.True(((vce_min > 0.2)), CaseLabel(result)); + } + + // Prompt: Create a SPICE netlist of a DTL NAND gate using two input diodes, a series diode, and an NPN BJT. Include a DC sweep from 0 to 5V on one input while keeping the other at 5V, and measure output voltage at both extremes. + [Fact] + public void DTL_NAND_Gate_fc06dcac68702893() + { + var result = RunAcceptedExample( + "deepseek:02456_8b8db5d41ba1d291:fc06dcac68702893", + """ + * DTL NAND Gate + VCC vcc 0 DC 5 + VINA ina 0 DC 0 + VINB inb 0 DC 5 + R1 vcc a 4.7k + D1 a ina DMOD + D2 a inb DMOD + D3 a b DMOD + Q1 out b 0 NPN1 + RC vcc out 1k + RBE b 0 10k + .MODEL DMOD D(IS=1e-12 RS=10) + .MODEL NPN1 NPN(IS=1e-14 BF=100 VAF=50) + .DC VINA 0 5 0.1 + .MEAS DC vout_low FIND V(out) AT=5 + .MEAS DC vout_high FIND V(out) AT=0 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementLess(result, "vout_low", 0.4); + AssertMeasurementGreater(result, "vout_high", 4.0); + } + + // Prompt: The NMOS differential pair with PMOS current mirror load amplifies the difference between inp and inn. + [Fact] + public void MOSFET_Differential_Pair_with_Active_Load_d5fedca0d4a04750() + { + var result = RunAcceptedExample( + "deepseek:00265_c3ba933f0a5a360b:d5fedca0d4a04750", + """ + * MOSFET Differential Pair with Active Load + VDD vdd 0 DC 5 + VSS vss 0 DC -5 + Vin_p inp 0 DC 0 + Vin_n inn 0 DC 0 + M1 d1 inp tail vss NMOS W=40u L=2u + M2 out inn tail vss NMOS W=40u L=2u + M3 d1 d1 vdd vdd PMOS W=1.5u L=2u + M4 out d1 vdd vdd PMOS W=1.5u L=2u + M5 tail bias vss vss NMOS W=10u L=2u + M6 bias bias vss vss NMOS W=10u L=2u + Rref vdd bias 36k + .MODEL NMOS NMOS (VTO=0.7 KP=200u LAMBDA=0.02 GAMMA=0.5 PHI=0.7) + .MODEL PMOS PMOS (VTO=-0.7 KP=80u LAMBDA=0.03 GAMMA=0.6 PHI=0.7) + .OP + .DC Vin_p -0.1 0.1 0.001 + .PRINT DC v(out) + .MEAS DC VOUT_OFFSET FIND v(out) AT=0 + .MEAS DC GAIN DERIV v(out) AT=0 + .MEAS DC VOUT_MAX MAX v(out) + .MEAS DC VOUT_MIN MIN v(out) + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "VOUT_OFFSET", 2.0, 3.0); + AssertMeasurementBetween(result, "GAIN", 100.0, 300.0); + AssertMeasurementGreater(result, "VOUT_MAX", 4.0); + AssertMeasurementLess(result, "VOUT_MIN", (-0.5)); + } + + // Prompt: Design a passive volume control using a potentiometer and a source resistance. + [Fact] + public void Potentiometer_Volume_Control_with_Source_Impedance_2e91138b8dd5cb8c() + { + var result = RunAcceptedExample( + "deepseek:00475_e18530141105b3b5:2e91138b8dd5cb8c", + """ + * Potentiometer Volume Control with Source Impedance + VIN in 0 DC 1 AC 1 + RS in n1 1k + R1 n1 out 5k + R2 out 0 5k + .OP + .AC DEC 10 10 100k + .MEAS AC vout_mag FIND V(out) AT=1k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "vout_mag", 0.4545, 0.01); + } + + // Prompt: Ideal op\u2011amp (E1) configured as an inverting amplifier with diode D1 in the input and feedback resistor Rf. + [Fact] + public void Diode_Antilog_Converter_with_Op_Amp_Feedback_54f814cda3444019() + { + var result = RunAcceptedExample( + "deepseek:00837_d67f93ff1bb2ba11:54f814cda3444019", + """ + * Diode Antilog Converter with Op-Amp Feedback + .MODEL DMOD D(IS=1e-14 N=1) + Rf out inv 2.2k + D1 in inv DMOD + E1 out 0 inv 0 -100k + VIN in 0 DC 0 + .NODESET V(out)=-0.001 + .DC VIN 0 0.7 0.01 + .MEAS DC vout05 FIND V(out) AT=0.5 + .MEAS DC vout06 FIND V(out) AT=0.6 + .MEAS DC ratio PARAM vout06/vout05 + .MEAS DC inv_vt PARAM 10*ln(ratio) + .MEAS DC vout0 FIND V(out) AT=0 + .MEAS DC vout7 FIND V(out) AT=0.7 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "vout05", (-0.0055), 0.001); + AssertMeasurementNear(result, "vout06", (-0.264), 0.01); + AssertMeasurementNear(result, "inv_vt", 38.7, 1.0); + AssertMeasurementGreater(result, "ratio", 1.0); + AssertMeasurementNear(result, "vout0", 0.0, 1e-09); + AssertMeasurementLess(result, "vout7", (-10.0)); + } + + // Prompt: Diode-connected NMOS with 1 k\u03a9 pull-up resistor demonstrates nonlinear load line + [Fact] + public void Diode_connected_NMOS_load_with_resistor_pull_up_e0a25326ffc32c53() + { + var result = RunAcceptedExample( + "deepseek:01333_90ea96cf48fe0549:e0a25326ffc32c53", + """ + * Diode-connected NMOS load with resistor pull-up + V1 VDD 0 DC 5 + R1 VDD a 1k + M1 a a 0 0 NMOS + .MODEL NMOS NMOS (VTO=0.7 KP=100u LAMBDA=0.02) + .OP + .DC V1 0 5 0.1 + .MEAS DC ID5 FIND I(R1) AT=5 + .MEAS DC VOUT3 FIND V(a) AT=3 + .MEAS DC VDD_AT_VOUT2_5 FIND V(VDD) WHEN V(a)=2.5 RISE=1 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "ID5", 0.0006, 0.0008); + AssertMeasurementBetween(result, "VOUT3", 2.6, 2.9); + AssertMeasurementGreater(result, "VDD_AT_VOUT2_5", 2.6); + AssertMeasurementLess(result, "VDD_AT_VOUT2_5", 3.0); + } + + // Prompt: Three charge amplifier circuits with different sensor capacitors C_sens (10pF, 15pF, 20pF) and fixed reference capacitor 10pF. + [Fact] + public void Capacitive_sensor_interface_with_charge_amplifier_5e474068cd399118() + { + var result = RunAcceptedExample( + "deepseek:02450_655ceb27844e0f24:5e474068cd399118", + """ + * Capacitive sensor interface with charge amplifier + Vclk_pos pos 0 PULSE(0 5 0 1n 1n 5u 10u) + Vclk_neg neg 0 PULSE(5 0 0 1n 1n 5u 10u) + C_sens1 pos inv1 10p + C_ref1 neg inv1 10p + R_f1 inv1 out1 10MEG + C_f1 inv1 out1 10p + E_opamp1 out1 0 inv1 0 100k + C_sens2 pos inv2 15p + C_ref2 neg inv2 10p + R_f2 inv2 out2 10MEG + C_f2 inv2 out2 10p + E_opamp2 out2 0 inv2 0 100k + C_sens3 pos inv3 20p + C_ref3 neg inv3 10p + R_f3 inv3 out3 10MEG + C_f3 inv3 out3 10p + E_opamp3 out3 0 inv3 0 100k + .tran 1u 200u + .meas TRAN Vout_pp_1 PP V(out1) FROM=150u TO=190u + .meas TRAN Vout_pp_2 PP V(out2) FROM=150u TO=190u + .meas TRAN Vout_pp_3 PP V(out3) FROM=150u TO=190u + .end + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementLess(result, "Vout_pp_1", 0.1); + AssertMeasurementBetween(result, "Vout_pp_2", 1.0, 3.0); + AssertMeasurementBetween(result, "Vout_pp_3", 3.0, 6.0); + AssertMeasurementRatioBetween(result, "Vout_pp_3", "Vout_pp_2", 1.5, 2.5); + } + + // Prompt: Design a non-inverting amplifier with a gain of 2 using an ideal op-amp. + [Fact] + public void Non_inverting_amplifier_with_behavioral_op_amp_8e6e75ea1970c3ee() + { + var result = RunAcceptedExample( + "deepseek:00319_8e6e75ea1970c3ee:8e6e75ea1970c3ee", + """ + * Non-inverting amplifier with behavioral op-amp + VIN in 0 AC 1 DC 0 + R1 neg 0 10k + Rf out neg 10k + E1 out 0 in neg 1e5 + .AC DEC 10 1 1MEG + .MEAS AC gain_mag MAX VM(out) FROM 10 TO 100k + .MEAS AC gain_db MAX DB(V(out)) FROM 10 TO 100k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "gain_mag", 1.9, 2.1); + AssertMeasurementBetween(result, "gain_db", 5.8, 6.2); + } + + // Prompt: Switched-capacitor comparator with NMOS switch transistors and an ideal op-amp (G=1e6). + [Fact] + public void Switched_capacitor_comparator_with_NMOS_switches_a1f50add20c77a93() + { + var result = RunAcceptedExample( + "deepseek:02406_7a83341e1e07d44e:a1f50add20c77a93", + """ + * Switched-capacitor comparator with NMOS switches + .model mn NMOS(VTO=1 KP=200u LAMBDA=0.02) + .model dideal D(IS=1e-14 RS=10 N=0.01) + Vphi1 phi1 0 PULSE(0 5 0 10n 10n 0.8u 2u) + Vphi2 phi2 0 PULSE(0 5 1u 10n 10n 0.8u 2u) + Vin in 0 PWL(0 0 50u 5) + Vref ref 0 DC 2.5 + Vcm vcm 0 DC 2.5 + Vdd 5 0 DC 5 + C1 cap_top X 1p + Cp X 0 10f + M1 cap_top phi1 ref 0 mn W=10u L=1u + M2 in phi2 cap_top 0 mn W=10u L=1u + M3 X phi1 out 0 mn W=10u L=1u + E1 out 0 vcm X 1e6 + D1 out 5 dideal + D2 0 out dideal + .TRAN 0.1u 50u + .MEAS TRAN vin_thres FIND V(in) WHEN V(out)=2.45 FALL=1 TD=10u + .MEAS TRAN vout_meas FIND V(out) AT=49.5u + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "vin_thres", 2.45, 2.55); + AssertMeasurementLess(result, "vout_meas", 0.5); + } + + // Prompt: BJT differential pair with a 2 mA tail current source and 5 k\u03a9 collector loads. + [Fact] + public void BJT_Differential_Pair_with_Tail_Current_Source_032521c1beafde58() + { + var result = RunAcceptedExample( + "deepseek:00199_5cc2fb3493c60ddd:032521c1beafde58", + """ + * BJT Differential Pair with Tail Current Source + Q1 out1 inp em 0 npn + Q2 out2 inn em 0 npn + I1 em VEE DC 2m + R1 VCC out1 5k + R2 VCC out2 5k + VSUP_VCC VCC 0 DC 10 + VSUP_VEE VEE 0 DC -5 + VINP inp 0 DC 0 + VINN inn 0 DC 0 + .MODEL npn NPN(IS=1e-14 BF=100 VAF=500) + .OP + .DC VINP -0.2 0.2 0.001 + .MEAS DC vdiff0 FIND V(out1,out2) AT=0 + .MEAS DC vmax MAX V(out1,out2) + .MEAS DC vmin MIN V(out1,out2) + .MEAS DC vdiff_plus10m FIND V(out1,out2) AT=0.01 + .MEAS DC vdiff_minus10m FIND V(out1,out2) AT=-0.01 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "vdiff0", (-0.1), 0.1); + AssertMeasurementBetween(result, "vmax", 9.5, 10.5); + AssertMeasurementBetween(result, "vmin", (-10.5), (-9.5)); + var gain = ((MeasurementValue(result, "vdiff_plus10m") - MeasurementValue(result, "vdiff_minus10m")) / 0.02); + Assert.True((((-250.0) < gain) && (gain < (-150.0))), CaseLabel(result)); + } + + // Prompt: Passive twin-T notch filter designed to reject a specific frequency (1.592 kHz) using only resistors and capacitors. + [Fact] + public void Twin_T_notch_filter_95cc5866123e3034() + { + var result = RunAcceptedExample( + "deepseek:00089_74ec599743082b7a:95cc5866123e3034", + """ + * Twin-T notch filter + VIN in 0 AC 1 + R1 in n1 10k + R2 n1 out 10k + C1 n1 0 20n + C2 in n2 10n + C3 n2 out 10n + R3 n2 0 5k + .AC DEC 100 10 10k + .MEAS AC notch_db FIND VDB(out) AT=1592 + .MEAS AC pass_db FIND VDB(out) AT=100 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementLess(result, "notch_db", (-30.0)); + AssertMeasurementGreater(result, "pass_db", (-3.0)); + } + + // Prompt: PMOS common-source amplifier with a 10k\u03a9 resistive load and 12V supply. + [Fact] + public void PMOS_common_source_amplifier_with_resistive_load_a87ad717f363009b() + { + var result = RunAcceptedExample( + "deepseek:01215_10548fb6addba853:a87ad717f363009b", + """ + * PMOS common-source amplifier with resistive load + M1 out gate VDD VDD pmos_mod W=10u L=1u + RL out 0 10k + VDD VDD 0 DC 12 + VGG gate 0 DC 9.6 AC 1 + .model pmos_mod PMOS(VTO=-1.0 KP=50U LAMBDA=0.05) + .OP + .AC DEC 10 10 1G + .MEAS AC gain_db MAX VDB(out) FROM=10 TO=100 + .MEAS AC gain_lf find V(out) at=100 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "gain_lf", (-7.5), (-6.0)); + AssertMeasurementBetween(result, "gain_db", 15.0, 18.0); + } + + // Prompt: Fixed-bias common-emitter NPN BJT amplifier with 12V supply, 1M base resistor, and 4.7k collector resistor. + [Fact] + public void Fixed_bias_common_emitter_BJT_amplifier_4438777eafb94d2f() + { + var result = RunAcceptedExample( + "deepseek:00890_25cf07c879aa89f0:4438777eafb94d2f", + """ + * Fixed-bias common-emitter BJT amplifier + VCC vcc 0 DC 12 + VIN in 0 AC 1 + C1 in base 1u + RB vcc base 1e6 + RC vcc out 4.7k + Q1 out base 0 npn_mod + .model npn_mod NPN(IS=1e-15 BF=100) + .OP + .DC VIN 0 0 1 + .AC DEC 10 10 100MEG + .MEAS DC Icq FIND I(RC) AT=0 + .MEAS DC Vceq FIND V(out) AT=0 + .MEAS AC gain_1k FIND VM(out) AT=1k + .MEAS AC max_gain MAX VM(out) + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "Icq", 0.001, 0.0015); + AssertMeasurementBetween(result, "Vceq", 5.0, 8.0); + AssertMeasurementBetween(result, "gain_1k", 150.0, 300.0); + AssertMeasurementBetween(result, "max_gain", 150.0, 300.0); + } + + // Prompt: Create a SPICE netlist for a Zobel network used in load stabilization, with a series RC across a resistive load, driven by a source with 10k output resistance. Run AC analysis and measure voltage at 1 Hz, 1.6 kHz, and 100 kHz. + [Fact] + public void Zobel_Load_Stabilization_Network_b9d37a1d49d39dde() + { + var result = RunAcceptedExample( + "deepseek:00492_b9d37a1d49d39dde:b9d37a1d49d39dde", + """ + * Zobel Load Stabilization Network + V1 in 0 DC 0 AC 1 + Rsrc in out 10k + RL out 0 1k + Rz out mid 100 + Cz mid 0 100n + .AC DEC 100 1 1MEG + .MEAS AC v_db_at_1 FIND DB(V(out)) AT=1 + .MEAS AC v_db_at_1k6 FIND DB(V(out)) AT=1600 + .MEAS AC v_db_at_100k FIND DB(V(out)) AT=100k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "v_db_at_1", (-20.8), 0.5); + AssertMeasurementNear(result, "v_db_at_1k6", (-23.8), 0.5); + AssertMeasurementLess(result, "v_db_at_100k", (-35.0)); + var v1 = MeasurementValue(result, "v_db_at_1"); + var v1k6 = MeasurementValue(result, "v_db_at_1k6"); + var v100k = MeasurementValue(result, "v_db_at_100k"); + Assert.True(((v100k < v1k6) && (v1k6 < v1)), CaseLabel(result)); + } + + // Prompt: Inverting amplifier using ideal op-amp (E source) with gain -10. + [Fact] + public void Inverting_amplifier_with_behavioral_E_source_398fb16b4d6421bd() + { + var result = RunAcceptedExample( + "deepseek:00305_f64b131655836535:398fb16b4d6421bd", + """ + * Inverting amplifier with behavioral E-source + VIN in 0 DC 0 AC 1 + R1 in n1 1k + R2 n1 out 10k + RL out 0 10k + E1 out 0 n1 0 100000 + .AC DEC 10 1 100k + .MEAS AC gain FIND VR(out) AT=1000 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "gain", (-10.5), (-9.5)); + } + + // Prompt: 4-bit binary-weighted inverting DAC using ideal op-amp + [Fact] + public void Binary_weighted_resistor_DAC_3386e99ebb1cc883() + { + var result = RunAcceptedExample( + "deepseek:02187_3f3e9bdb139c7d10:3386e99ebb1cc883", + """ + * Binary-weighted resistor DAC + Vref ref 0 DC 5 + Vb3 b3 0 DC 0 + Vb2 b2 0 DC 0 + Vb1 b1 0 DC 0 + Vb0 b0 0 DC 0 + R1 b3 neg 10k + R2 b2 neg 20k + R3 b1 neg 40k + R4 b0 neg 80k + Rf out neg 10k + Eop out 0 neg 0 1e5 + RL out 0 10k + .DC Vb3 0 5 5 Vb2 0 5 5 Vb1 0 5 5 Vb0 0 5 5 + .MEASURE DC vout_max MAX V(out) + .MEASURE DC vout_min MIN V(out) + .END + """); + + AssertAllMeasurementsSuccessful(result); + var vmax = MeasurementValue(result, "vout_max"); + var vmin = MeasurementValue(result, "vout_min"); + AssertMeasurementBetween(result, "vout_max", (-0.1), 0.1); + AssertMeasurementBetween(result, "vout_min", (-9.5), (-9.2)); + var range_val = Math.Abs((vmax - vmin)); + Assert.True(((Math.Abs((range_val - 9.375)) < 0.2)), CaseLabel(result)); + } + + // Prompt: First-order sigma-delta modulator with 1kHz sine input, 1MHz clock, op-amp integrator, switched capacitor sample-and-hold, and comparator. + [Fact] + public void First_order_Sigma_Delta_Modulator_93ca3c929fc8e6e8() + { + var result = RunAcceptedExample( + "deepseek:02224_ccafecf9d3f363a2:93ca3c929fc8e6e8", + """ + * First-order Sigma-Delta Modulator + VIN in 0 SIN(0 0.5 1k) + VCLK clk 0 PULSE(0 5 0 1n 1n 1n 1u) + RIN in sum 10k + RFB comp_out sum 10k + RINT int_out sum 100MEG + E_INT int_out 0 sum 0 -100k + CINT int_out sum 100p + S1 int_out hold clk 0 SWMOD + .MODEL SWMOD SW(RON=10 ROFF=100MEG VT=2.5 VH=0) + CHOLD hold 0 10p + E_COMP comp_out 0 TABLE {V(hold)*1e4} = (-1,-1) (1,1) + RLPF comp_out vout 1k + CLPF vout 0 200n + .TRAN 0.1u 5m + .MEAS TRAN VOUT_RMS RMS V(vout) FROM=4m TO=5m + .MEAS TRAN VIN_RMS RMS V(in) FROM=4m TO=5m + .MEAS TRAN VOUT_AVG AVG V(vout) FROM=4m TO=5m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "VOUT_RMS", 0.2, 0.3); + AssertMeasurementBetween(result, "VIN_RMS", 0.3, 0.4); + AssertMeasurementBetween(result, "VOUT_AVG", (-0.05), 0.05); + } + + // Prompt: CMOS differential pair with NMOS input transistors and PMOS active current mirror load + [Fact] + public void CMOS_Differential_Pair_with_Current_Mirror_Load_806609f3ceae49a9() + { + var result = RunAcceptedExample( + "deepseek:01264_434a015653034688:806609f3ceae49a9", + """ + * CMOS Differential Pair with Current Mirror Load + VDD vdd 0 DC 5 + VSS vss 0 DC -5 + I1 tail vss DC 100u + VIP vip 0 DC 0 AC 1 + VIM vim 0 DC 0 AC 0 + M1 out vip tail tail NMOS W=2u L=1u + M2 nmir vim tail tail NMOS W=2u L=1u + M3 nmir nmir vdd vdd PMOS W=4u L=1u + M4 out nmir vdd vdd PMOS W=4u L=1u + CL out 0 1p + .MODEL NMOS NMOS (VTO=0.7 KP=200u LAMBDA=0.1) + .MODEL PMOS PMOS (VTO=-0.7 KP=100u LAMBDA=0.1) + .OP + .DC VIP -0.5 0.5 0.01 + .AC DEC 10 1 1E9 + .MEASURE DC vout_max MAX V(out) + .MEASURE DC vout_min MIN V(out) + .MEASURE AC gain_mag MAX VM(out) + .MEASURE AC gain_nom FIND VM(out) AT=1 + .MEASURE AC gain_1k FIND VDB(out) AT=1k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementGreater(result, "vout_max", 3.0); + AssertMeasurementLess(result, "vout_max", 5.0); + AssertMeasurementGreater(result, "vout_min", (-5.0)); + AssertMeasurementLess(result, "vout_min", 2.0); + AssertMeasurementBetween(result, "gain_mag", 10.0, 50.0); + AssertMeasurementBetween(result, "gain_nom", 10.0, 50.0); + AssertMeasurementGreater(result, "gain_1k", 0.0); + } + + // Prompt: Design a SPICE netlist for a diode antilog converter using an op-amp. Sweep the input voltage from 0 to 0.7V and measure the output at 0V, 0.3V, and 0.6V. + [Fact] + public void Diode_Antilog_Converter_35085aff9ccb05c1() + { + var result = RunAcceptedExample( + "deepseek:00835_2811379e83059295:35085aff9ccb05c1", + """ + * Diode Antilog Converter + VIN in 0 DC 0 + D1 in n1 DMOD + Rf out n1 100k + E1 out 0 0 n1 100000 + .MODEL DMOD D(IS=1e-14 RS=1) + .OP + .DC VIN 0 0.7 0.01 + .MEAS DC Vout0 FIND V(out) AT=0 + .MEAS DC Vout03 FIND V(out) AT=0.3 + .MEAS DC Vout06 FIND V(out) AT=0.6 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "Vout0", 0.0, 1e-06); + AssertMeasurementBetween(result, "Vout03", (-0.1), (-1e-06)); + AssertMeasurementLess(result, "Vout06", (-1.0)); + var v03 = MeasurementValue(result, "Vout03"); + var v06 = MeasurementValue(result, "Vout06"); + var ratio = (Math.Abs(v06) / Math.Abs(v03)); + Assert.True((((ratio > 10000.0)) && ((ratio < 1000000.0))), CaseLabel(result)); + } + + // Prompt: Input: 10V amplitude 1kHz sine wave at node in. + [Fact] + public void Biased_negative_diode_limiter_ade921711aaf8286() + { + var result = RunAcceptedExample( + "deepseek:00759_9a96ea223099158f:ade921711aaf8286", + """ + * Biased negative diode limiter + VIN in 0 SIN(0 10 1k 0 0) + R1 in out 100 + RLOAD out 0 10k + D1 neg out DMOD + VBIAS neg 0 DC -5 + .MODEL DMOD D(IS=1e-14 RS=1 N=1) + .TRAN 10u 5m + .MEAS TRAN vout_min MIN V(out) + .MEAS TRAN vout_max MAX V(out) + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "vout_min", (-6.0), (-5.4)); + AssertMeasurementBetween(result, "vout_max", 9.0, 10.1); + } + + // Prompt: Three-stage passive RC low-pass filter for anti-aliasing + [Fact] + public void Multi_stage_RC_low_pass_anti_alias_filter_65d0043b0f1b146f() + { + var result = RunAcceptedExample( + "deepseek:00645_4f009c9cfdab33a4:65d0043b0f1b146f", + """ + * Multi-stage RC low-pass anti-alias filter + VIN in 0 DC 0 AC 1 + RS in n1 50 + R1 n1 n2 1E3 + C1 n2 0 1.5E-9 + R2 n2 n3 1E3 + C2 n3 0 1.5E-9 + R3 n3 out 1E3 + C3 out 0 1.5E-9 + RL out 0 1E6 + .AC DEC 100 100 1E6 + .MEAS AC f3db WHEN VDB(out) = -3 + .MEAS AC atten_100k FIND VM(out) AT=100E3 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "f3db", 20600.0, 2000.0); + AssertMeasurementBetween(result, "atten_100k", 0.15, 0.2); + } + + // Prompt: Sample-and-hold circuit with analog switch S1 controlled by 1MHz clock VCLK. + [Fact] + public void Sample_and_Hold_with_Clocked_Switch_79d908504f6cb7f8() + { + var result = RunAcceptedExample( + "deepseek:02237_81d29a84b0d7bc97:79d908504f6cb7f8", + """ + * Sample and Hold with Clocked Switch + VIN in 0 SIN(0 1 10k) + VCLK clk 0 PULSE(0 5 0 10n 10n 0.5u 1u) + R1 in sw 0.1 + S1 sw cap clk 0 swmod + CH cap 0 1n + E1 out 0 cap out 100000 + RL out 0 10k + .MODEL swmod SW(RON=1 ROFF=100MEG VT=2 VH=0.5) + .TRAN 0.1u 3u + .MEAS TRAN vin_sample FIND V(in) AT=0.5u + .MEAS TRAN vout_hold FIND V(out) AT=0.9u + .MEAS TRAN hold_error PARAM='vout_hold - vin_sample' + .MEAS TRAN vout_sample FIND V(out) AT=0.4u + .MEAS TRAN vin_sample_at_0_4 FIND V(in) AT=0.4u + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "hold_error", 0.0, 0.01); + var vin_sample = MeasurementValue(result, "vin_sample"); + var vout_hold = MeasurementValue(result, "vout_hold"); + Assert.True(((Math.Abs((vout_hold - vin_sample)) < 0.01)), CaseLabel(result)); + } + + // Prompt: Third-order Butterworth low-pass filter implemented as a doubly-terminated LC ladder network. + [Fact] + public void Third_order_Butterworth_LC_low_pass_ladder_filter_813ff97781f316c8() + { + var result = RunAcceptedExample( + "deepseek:00562_813ff97781f316c8:813ff97781f316c8", + """ + * Third-order Butterworth LC low-pass ladder filter + VIN in 0 AC 1 + Rs in node1 1k + L1 node1 node2 15.915m + C2 node2 0 31.83n + L3 node2 out 15.915m + Rl out 0 1k + .AC DEC 100 100 1MEG + .MEAS AC f3dB WHEN VDB(out)=-9 + .MEAS AC gain_dc FIND VDB(out) AT=100 + .MEAS AC att_10k FIND VDB(out) AT=10k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "f3dB", 10000.0, 1000.0); + AssertMeasurementNear(result, "gain_dc", (-6.0), 0.2); + AssertMeasurementNear(result, "att_10k", (-9.0), 0.3); + } + + // Prompt: Frequency-to-voltage converter using a switched-capacitor charge pump. + [Fact] + public void Frequency_to_Voltage_Converter_using_Charge_Pump_0f626e01bdc35179() + { + var result = RunAcceptedExample( + "deepseek:01865_4b69cedf9434e6d7:0f626e01bdc35179", + """ + * Frequency-to-Voltage Converter using Charge Pump + .OPTIONS POST + Vref vref 0 DC 5 + Vin in 0 PULSE(0 5 0 1n 1n 4.999u 10u) + E_inv ctrl_inv 0 POLY(1) in 0 5 -1 + .model swmod SW(RON=10 ROFF=1e12 VT=2.5 VH=0.5) + S1 vref fly_top in 0 swmod + S2 fly_top out ctrl_inv 0 swmod + Cfly fly_top 0 1n + Chold out 0 100n + Rload out 0 1k + .IC V(out)=0 V(fly_top)=0 + .TRAN 0.1u 0.2s UIC + .MEAS TRAN Vout_avg AVG V(out) FROM=0.19 TO=0.2 + .MEAS TRAN Vripple PP V(out) FROM=0.19 TO=0.2 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "Vout_avg", 0.455, 0.1); + AssertMeasurementLess(result, "Vripple", 0.1); + } + + // Prompt: Dynamic precharge-evaluate inverter stage with weak keeper PMOS to maintain precharged state. + [Fact] + public void CMOS_dynamic_precharge_inverter_with_keeper_c6ac0fba848f5406() + { + var result = RunAcceptedExample( + "deepseek:01372_1444ccd03b08b57c:c6ac0fba848f5406", + """ + * CMOS dynamic precharge inverter with keeper + Vdd vdd 0 DC 5 + Vclk clk 0 PULSE(0 5 5n 0.1n 0.1n 20n 40n) + Vin in 0 PULSE(0 5 10n 0.1n 0.1n 15n 40n) + Cload out 0 1p + Mp out clk vdd vdd PMOS W=10u L=1u + Mn out in 0 0 NMOS W=1u L=1u + Mk out 0 vdd vdd PMOS W=1u L=5u + .MODEL NMOS NMOS (LEVEL=1 VTO=0.7 KP=100u LAMBDA=0.02 GAMMA=0.5 PHI=0.7) + .MODEL PMOS PMOS (LEVEL=1 VTO=-0.7 KP=40u LAMBDA=0.02 GAMMA=0.8 PHI=0.7) + .TRAN 0.01n 80n + .MEAS TRAN tphl TRIG V(in) VAL=2.5 RISE=1 TARG V(out) VAL=2.5 FALL=1 + .MEAS TRAN tw_out_low TRIG V(out) VAL=2.5 FALL=1 TARG V(out) VAL=2.5 RISE=1 + .MEAS TRAN vout_min MIN V(out) FROM=5n TO=25n + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "tphl", 1e-09, 8e-09); + AssertMeasurementBetween(result, "tw_out_low", 1e-08, 1.6e-08); + AssertMeasurementLess(result, "vout_min", 0.5); + } + + // Prompt: Full-wave center-tapped rectifier using two diodes and a center-tapped transformer simulated with two out-of-phase sinusoidal sources. + [Fact] + public void Full_Wave_Center_Tapped_Rectifier_with_Smoothing_Capacitor_5121f9d7d2509921() + { + var result = RunAcceptedExample( + "deepseek:00703_9c368a45cd008fc8:5121f9d7d2509921", + """ + * Full-Wave Center-Tapped Rectifier with Smoothing Capacitor + V1 n1 0 SIN(0 12 60 0 0 0) + V2 0 n2 SIN(0 12 60 0 0 180) + D1 n1 out DMOD + D2 n2 out DMOD + C1 out 0 100uF + Rload out 0 1k + .MODEL DMOD D(IS=1e-9 RS=1 N=1.5) + .TRAN 1u 100m 0 1u + .MEAS TRAN avg_vout AVG V(out) FROM=30m TO=100m + .MEAS TRAN ripple PP V(out) FROM=30m TO=100m + .MEAS TRAN min_vout MIN V(out) FROM=30m TO=100m + .MEAS TRAN max_vout MAX V(out) FROM=30m TO=100m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "avg_vout", 9.0, 12.0); + AssertMeasurementBetween(result, "ripple", 0.5, 2.0); + AssertMeasurementBetween(result, "min_vout", 8.0, 12.0); + AssertMeasurementBetween(result, "max_vout", 10.0, 12.0); + } + + // Prompt: PMOS hot-swap inrush limiter with soft-start gate RC network + [Fact] + public void Hot_swap_inrush_limiter_with_PMOS_cf577412f237c08b() + { + var result = RunAcceptedExample( + "deepseek:02016_510cf538d8190f32:cf577412f237c08b", + """ + * Hot-swap inrush limiter with PMOS + VIN in 0 PULSE(0 12 0 1u 1u 10m 20m) + RLOAD out 0 22 + CLOAD out 0 50u + M1 out gate in in pmos W=1m L=1u + RG gate 0 10k + CG gate in 0.47u + .MODEL pmos PMOS(VTO=-2.0 KP=100u LAMBDA=0.02) + .TRAN 1u 12m + .MEAS TRAN inrush_max MAX I(VIN) FROM=0 TO=5m + .MEAS TRAN t10 WHEN V(out)=1.2 RISE=1 + .MEAS TRAN t90 WHEN V(out)=10.8 RISE=1 + .MEAS TRAN rise PARAM='t90 - t10' + .MEAS TRAN i_steady AVG I(RLOAD) FROM=9m TO=9.9m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementLess(result, "inrush_max", 2.0); + AssertMeasurementBetween(result, "rise", 0.001, 0.01); + AssertMeasurementNear(result, "i_steady", 0.545, 0.1); + } + + // Prompt: Four-quadrant analog multiplier using polynomial voltage-controlled current sources. + [Fact] + public void Four_Quadrant_Analog_Multiplier_using_Behavioral_G_sources_89853ad0ac94ce28() + { + var result = RunAcceptedExample( + "deepseek:02302_cb549ad4cba0d1d9:89853ad0ac94ce28", + """ + * Four-Quadrant Analog Multiplier using Behavioral G-sources + VX XP XN DC 0 SIN(0 0.1 1K 0 0 90) + VY YP YN DC 0 SIN(0 0.2 500 0 0) + R1 OUTP 0 1K + R2 OUTN 0 1K + RX1 XP 0 1G + RX2 XN 0 1G + RY1 YP 0 1G + RY2 YN 0 1G + G1 OUTP 0 POLY(2) XP XN YP YN 0 0 0 0 0.01 0 + G2 OUTN 0 POLY(2) XP XN YP YN 0 0 0 0 -0.01 0 + .DC VX -0.2 0.2 0.01 VY -0.2 0.2 0.05 + .TRAN 0.001MS 2MS + .MEAS DC mult_out_max MAX V(OUTP,OUTN) + .MEAS TRAN vout_peak MAX V(OUTP,OUTN) FROM=0 TO=2MS + .MEAS TRAN vout_rms RMS V(OUTP,OUTN) FROM=0 TO=2MS + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "mult_out_max", 0.8, 0.05); + AssertMeasurementNear(result, "vout_peak", 0.4, 0.05); + AssertMeasurementNear(result, "vout_rms", 0.2, 0.05); + } + + // Prompt: Gilbert cell mixer using six NPN BJTs, 1 mA tail current. + [Fact] + public void Gilbert_Cell_Mixer_using_BJT_Differential_Pairs_8c1cf2be28537204() + { + var result = RunAcceptedExample( + "deepseek:02084_343357294fd1971d:8c1cf2be28537204", + """ + * Gilbert Cell Mixer using BJT Differential Pairs + VCC VCC 0 DC 5 + IEE e 0 DC 1m + VRF1 base1 0 SIN(0.85 0.01 101MEG 0 0 0) + VRF2 base2 0 SIN(0.85 0.01 101MEG 0 0 180) + VLO1 lo_p 0 SIN(0.85 0.2 100MEG 0 0 0) + VLO2 lo_n 0 SIN(0.85 0.2 100MEG 0 0 180) + Q1 n1 base1 e NPN + Q2 n2 base2 e NPN + Q3 outp lo_p n1 NPN + Q4 outn lo_n n1 NPN + Q5 outp lo_n n2 NPN + Q6 outn lo_p n2 NPN + R1 outp VCC 1k + R2 outn VCC 1k + Cif outp outn 10p + Eif if_out 0 outp outn 1 + .MODEL NPN NPN(IS=1e-15 BF=100 VAF=50) + .OP + .TRAN 0.1n 15u 5u + .MEAS TRAN vpp_diff PP V(if_out) FROM=10u TO=15u + .MEAS TRAN vdc AVG V(if_out) FROM=10u TO=15u + .MEAS TRAN vmax MAX V(if_out) FROM=10u TO=15u + .MEAS TRAN vmin MIN V(if_out) FROM=10u TO=15u + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "vpp_diff", 0.2, 2.0); + AssertMeasurementBetween(result, "vdc", (-0.1), 0.1); + AssertMeasurementGreater(result, "vmax", 0.0); + AssertMeasurementBetween(result, "vmin", (-1.0), 0.0); + } + + // Prompt: Simple PWM DAC using a pulse voltage source and a single-pole RC low\u2011pass filter. + [Fact] + public void PWM_DAC_with_RC_Filter_7faca0023026bd31() + { + var result = RunAcceptedExample( + "deepseek:02197_2d8e934641e90bb9:7faca0023026bd31", + """ + * PWM DAC with RC Filter + Vpwm pwm 0 PULSE(0 5 0 1n 1n 5u 10u) + R1 pwm out 10k + C1 out 0 100n + .tran 1u 10m + .meas TRAN vout_avg AVG V(out) FROM=5m TO=10m + .meas TRAN vout_ripple PP V(out) FROM=5m TO=10m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "vout_avg", 2.5, 0.05); + AssertMeasurementLess(result, "vout_ripple", 0.1); + } + + // Prompt: Design a 555-style monostable timer using two comparators and an RS latch built from behavioral sources. + [Fact] + public void _555_Style_Monostable_Timer_Using_Behavioral_Comparators_9103a7d630e2596b() + { + var result = RunAcceptedExample( + "deepseek:01818_8e708dd260bf420d:9103a7d630e2596b", + """ + * 555-Style Monostable Timer Using Behavioral Comparators + .TRAN 0.1m 20m UIC + .PRINT TRAN V(Q) V(trigger) V(threshold) + .OPTIONS NOOPTS + + VCC VCC 0 DC 5 + VTRIG trigger 0 PULSE(5 0 1m 1u 1u 100u 20m) + + R_TIMING VCC threshold 10k + C_TIMING threshold 0 1u IC=0 + + E_TRIG_COMP trig_comp 0 VALUE={5*(V(trigger) < 1.6667)} + E_THRESH_COMP thresh_comp 0 VALUE={5*(V(threshold) > 3.3333)} + + E_SET_CTRL set_ctrl 0 VALUE={5*(V(trig_comp)>2.5)*(V(thresh_comp)<2.5)} + E_RESET_CTRL reset_ctrl 0 VALUE={V(thresh_comp)} + + C_Q Q 0 1n IC=0 + S_SET VCC Q set_ctrl 0 SWMOD + S_RESET Q 0 reset_ctrl 0 SWMOD + + E_DISCH_CTRL disc_ctrl 0 VALUE={5*(V(Q) < 2.5)} + S_DISCH threshold 0 disc_ctrl 0 SWMOD + + .MODEL SWMOD SW(RON=10 ROFF=100MEG VT=2.5 VH=0.1) + + .MEAS TRAN t_rise WHEN V(Q)=2.5 RISE=1 + .MEAS TRAN t_fall WHEN V(Q)=2.5 FALL=1 + .MEAS TRAN pulse_width PARAM t_fall - t_rise + .MEAS TRAN vth_max MAX V(threshold) + .MEAS TRAN vth_final FIND V(threshold) AT=20m + + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "t_rise", 0.0009, 0.0015); + AssertMeasurementBetween(result, "t_fall", 0.011, 0.013); + AssertMeasurementBetween(result, "pulse_width", 0.01, 0.012); + AssertMeasurementBetween(result, "vth_max", 3.2, 3.4); + AssertMeasurementLess(result, "vth_final", 0.1); + } + + // Prompt: Unity-gain Sallen-Key low-pass filter with second-order Butterworth response. + [Fact] + public void Sallen_Key_Butterworth_Low_Pass_Filter_Unity_Gain_dd0fea88d641c95c() + { + var result = RunAcceptedExample( + "deepseek:01659_8e2da2c174f1f90a:dd0fea88d641c95c", + """ + * Sallen-Key Butterworth Low-Pass Filter (Unity Gain) + VIN in 0 AC 1 + R1 in n1 10k + R2 n1 nin 10k + C1 n1 out 20n + C2 nin 0 10n + E1 out 0 nin out 100k + .AC DEC 100 1 100k + .MEAS AC f3dB WHEN VDB(out)=-3 FALL=1 + .MEAS AC pass_gain FIND VDB(out) AT=112.5 + .MEAS AC atten_10fc FIND VDB(out) AT=11250 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "pass_gain", 0.0, 0.5); + AssertMeasurementNear(result, "atten_10fc", (-40.0), 2.0); + AssertMeasurementBetween(result, "f3dB", 1000.0, 1300.0); + } + + // Prompt: Asymmetric window diode limiter with two diodes and two DC sources, clipping a 1kHz 5V amplitude sine wave. + [Fact] + public void Window_Diode_Limiter_with_Asymmetric_Thresholds_7278591a9947a311() + { + var result = RunAcceptedExample( + "deepseek:00766_a4b960f8548d2c8f:7278591a9947a311", + """ + * Window Diode Limiter with Asymmetric Thresholds + VIN in 0 SIN(0 5 1k) + R1 in out 1k + D1 out a dmod + V2 a 0 DC 1.5 + D2 b out dmod + V3 b 0 DC -1.2 + .MODEL dmod D(IS=1e-14 RS=1) + .TRAN 0 5ms 0 10u + .MEAS TRAN max_vout MAX V(out) FROM=0 TO=5ms + .MEAS TRAN min_vout MIN V(out) FROM=0 TO=5ms + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "max_vout", 2.1, 2.3); + AssertMeasurementBetween(result, "min_vout", (-2.0), (-1.8)); + } + + // Prompt: NMOS differential pair with PMOS current mirror active load, biased by 100 \xb5A ideal sink to -5 V. + [Fact] + public void MOSFET_Differential_Pair_with_Active_Load_90205372d7f0ec4a() + { + var result = RunAcceptedExample( + "deepseek:00267_10b20a2685d07b99:90205372d7f0ec4a", + """ + * MOSFET Differential Pair with Active Load + M1 drain1 in_p tail vss nch W=10u L=1u + M2 out cm tail vss nch W=10u L=1u + M3 drain1 drain1 vdd vdd pch W=20u L=1u + M4 out drain1 vdd vdd pch W=20u L=1u + I1 tail vss DC 100u + VDD vdd 0 DC 5 + VSS vss 0 DC -5 + VCM cm 0 DC 0 + VIN in_p cm DC 0 + .MODEL nch NMOS(VTO=1 KP=100u LAMBDA=0.02) + .MODEL pch PMOS(VTO=-1 KP=50u LAMBDA=0.02) + .OP + .DC VIN -0.5 0.5 0.01 + .MEAS DC vout_at_0 FIND V(out) AT=0 + .MEAS DC gain DERIV V(out) AT=0 + .MEAS DC vout_sat_pos FIND V(out) AT=0.5 + .MEAS DC vout_sat_neg FIND V(out) AT=-0.5 + .END + """); + + AssertAllMeasurementsSuccessful(result); + var gain = MeasurementValue(result, "gain"); + Assert.True((!Equals(gain, null)), CaseLabel(result)); + Assert.True(((Math.Abs(gain) > 100.0)), CaseLabel(result)); + Assert.True(((Math.Abs(gain) < 300.0)), CaseLabel(result)); + var vout0 = MeasurementValue(result, "vout_at_0"); + Assert.True((!Equals(vout0, null)), CaseLabel(result)); + Assert.True(((3.0 < vout0) && (vout0 < 4.5)), CaseLabel(result)); + var vout_sat_pos = MeasurementValue(result, "vout_sat_pos"); + Assert.True((!Equals(vout_sat_pos, null)), CaseLabel(result)); + Assert.True(((vout_sat_pos > 4.0)), CaseLabel(result)); + var vout_sat_neg = MeasurementValue(result, "vout_sat_neg"); + Assert.True((!Equals(vout_sat_neg, null)), CaseLabel(result)); + Assert.True(((vout_sat_neg < 0.5)), CaseLabel(result)); + } + + // Prompt: Window comparator using two high-gain E sources with open\u2011collector\u2011like diode pull\u2011downs. + [Fact] + public void Window_Comparator_with_Two_References_308f76574127d0d2() + { + var result = RunAcceptedExample( + "deepseek:01606_5b027420094b7a27:308f76574127d0d2", + """ + * Window Comparator with Two References + VCC VCC 0 DC 5 + VIN vin 0 PULSE(0 5 0 2m 2m 1n 5m) + Rpu out VCC 10k + + * Low-side comparator: pulls down when vin < 2V + E_LOW out_low 0 VALUE={1000*(V(vin)-2)} + Dclp_low_hi out_low VCC DMOD + Dclp_low_lo 0 out_low DMOD + Dout_low out out_low DMOD + + * High-side comparator: pulls down when vin > 3V + E_HIGH out_high 0 VALUE={1000*(3-V(vin))} + Dclp_high_hi out_high VCC DMOD + Dclp_high_lo 0 out_high DMOD + Dout_high out out_high DMOD + + .MODEL DMOD D(IS=1e-12 RS=1) + + .TRAN 10u 2m + + .MEAS TRAN vth_low FIND v(vin) WHEN v(out)=2.5 RISE=1 + .MEAS TRAN vth_high FIND v(vin) WHEN v(out)=2.5 FALL=1 + + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "vth_low", 1.9, 2.1); + AssertMeasurementBetween(result, "vth_high", 2.9, 3.1); + } + + // Prompt: Two-op-amp instrumentation amplifier with finite\u2011bandwidth op\u2011amp macromodels. + [Fact] + public void Two_Op_Amp_Instrumentation_Amplifier_with_Finite_Bandwidth_Op_Amps_6152e9a63ff5986a() + { + var result = RunAcceptedExample( + "deepseek:01473_2765601399313100:6152e9a63ff5986a", + """ + * Two-Op-Amp Instrumentation Amplifier with Finite-Bandwidth Op-Amps + .SUBCKT opamp nplus nminus out + E1 n1 0 nplus nminus 100k + R1 n1 out 1k + C1 out 0 15.9uF + .ENDS + Vcm common 0 DC 2.5 + Vdiff inp common DC 0 AC 1 + Rg n1 n2 1k + Rf1 out1 n1 10k + Rf2 out2 n2 10k + XU1 inp n1 out1 opamp + XU2 common n2 out2 opamp + E_out out 0 out1 out2 1 + .DC Vdiff 0 0 1 + .AC DEC 20 1 100k + .MEAS DC out_diff_quiescent FIND V(out) AT=0 + .MEAS AC gain_lf FIND V(out) AT=10 + .MEAS AC gain_1k FIND V(out) AT=1e3 + .MEAS AC phase_1k FIND VP(out) AT=1e3 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "gain_lf", 21.0, 1.0); + AssertMeasurementNear(result, "gain_1k", 21.0, 2.0); + AssertMeasurementBetween(result, "phase_1k", (-5.0), 5.0); + AssertMeasurementNear(result, "out_diff_quiescent", 0.0, 0.001); + } + + // Prompt: Quadrature oscillator using two op-amp integrators and an inverting stage. + [Fact] + public void Quadrature_oscillator_with_amplitude_limiting_c54ea6fecb6c6ae9() + { + var result = RunAcceptedExample( + "deepseek:01751_3ed92b8c26773384:c54ea6fecb6c6ae9", + """ + * Quadrature oscillator with amplitude limiting + .IC V(out1)=0.1 V(out2)=0 + .TRAN 1us 20ms 0 1us UIC + .MEAS TRAN ta WHEN V(out1)=0 RISE=1 + .MEAS TRAN tb WHEN V(out1)=0 RISE=2 + .MEAS TRAN period1 PARAM='tb-ta' + .MEAS TRAN freq1 PARAM='1/period1' + .MEAS TRAN t1 WHEN V(out1)=0 RISE=1 + .MEAS TRAN t2 WHEN V(out2)=0 RISE=1 + .MEAS TRAN delta_t PARAM='t1-t2' + .MEAS TRAN phase_diff PARAM='360*delta_t/period1' + R1 inv_out n1 10k + Rf1 out1 n1 1MEG + C1 out1 n1 0.1u + D1 n1 out1 D1N4148 + D2 out1 n1 D1N4148 + E1 out1 0 n1 0 100000 + R2 out1 n2 10k + Rf2 out2 n2 1MEG + C2 out2 n2 0.1u + E2 out2 0 n2 0 100000 + R3 out2 n3 10k + R4 inv_out n3 10k + E3 inv_out 0 n3 0 100000 + .model D1N4148 D (Is=2.52n Rs=0.568 N=1.75 Cjo=4p M=0.4 tt=5n) + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "freq1", 159.0, 10.0); + AssertMeasurementNear(result, "phase_diff", 90.0, 5.0); + } + + // Prompt: Simulate an RC low-pass filter with a 1 kHz square wave input. Include measurements of the output rise time to 63% and 90% of the input pulse. + [Fact] + public void RC_step_response_with_pulse_source_4a79f903a993d12b() + { + var result = RunAcceptedExample( + "deepseek:00028_e0469a3acfa27569:4a79f903a993d12b", + """ + * RC step response with pulse source + R1 in out 1k + C1 out 0 1u + VIN in 0 PULSE(0 1 0 1n 1n 4.9m 10m) + .TRAN 1u 20m + .MEASURE TRAN t_rise63 TRIG v(in) VAL=0.5 RISE=1 TARG v(out) VAL=0.632 RISE=1 + .MEASURE TRAN t_rise90 TRIG v(in) VAL=0.5 RISE=1 TARG v(out) VAL=0.9 RISE=1 + .MEASURE TRAN v_out_max MAX v(out) FROM=0 TO=20m + .END + """); + + AssertAllMeasurementsSuccessful(result); + var t_rise63 = MeasurementValue(result, "t_rise63"); + var t_rise90 = MeasurementValue(result, "t_rise90"); + AssertMeasurementNear(result, "t_rise63", 0.001, 5e-06); + AssertMeasurementNear(result, "t_rise90", 0.0023026, 5e-05); + AssertMeasurementNear(result, "v_out_max", 1.0, 0.01); + AssertMeasurementRatioBetween(result, "t_rise90", "t_rise63", 2.2, 2.4); + } + + // Prompt: 3-bit binary-weighted DAC with ideal op-amp (E1 gain=1e5) and Rf=500\u03a9, R=1k/2k/4k. All bits tied to Vref for full-scale code 111. + [Fact] + public void Binary_weighted_resistor_DAC_3_bit_full_scale_code_111_6813df3c11fb0886() + { + var result = RunAcceptedExample( + "deepseek:02190_65fa0d3231d2ce54:6813df3c11fb0886", + """ + * Binary-weighted resistor DAC, 3-bit, full-scale code 111 + Vref ref 0 DC 5 + R2 sum ref 1k + R1 sum ref 2k + R0 sum ref 4k + Rf out sum 500 + E1 out 0 0 sum 100000 + .OP + .DC Vref 0 5 0.1 + .MEAS DC Vout_max FIND V(out) AT=5 + .MEAS DC Vout_min FIND V(out) AT=0 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "Vout_max", (-4.375), 0.1); + AssertMeasurementNear(result, "Vout_min", 0.0, 0.1); + } + + // Prompt: Design a BJT-based Schmitt trigger using discrete transistors. Use a differential pair with common emitter resistor. Include pulse input and measure hysteresis. + [Fact] + public void BJT_Schmitt_Trigger_71ea5c9b3af66d6d() + { + var result = RunAcceptedExample( + "deepseek:01159_484e19fd2b35a0c5:71ea5c9b3af66d6d", + """ + * BJT Schmitt Trigger + .OPTIONS POST + VCC VCC 0 DC 5 + VIN IN 0 PULSE(0 5 0 1m 1m 1m 3m) + RE EMIT 0 470 + RC1 VCC Q1C 2.2k + RC2 VCC OUT 2.2k + R1 VCC QB2 10k + R2 QB2 0 10k + Q1 Q1C IN EMIT NPN + Q2 OUT QB2 EMIT NPN + .MODEL NPN NPN(IS=1e-14 BF=100 VAF=50) + .TRAN 0.1u 3m + .MEAS TRAN Vth_rise FIND V(IN) WHEN V(OUT)=2.5 RISE=1 + .MEAS TRAN Vth_fall FIND V(IN) WHEN V(OUT)=2.5 FALL=1 + .MEAS TRAN hysteresis PARAM Vth_rise - Vth_fall + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementGreater(result, "hysteresis", 0.1); + AssertMeasurementBetween(result, "hysteresis", 0.1, 3.0); + AssertMeasurementBetween(result, "Vth_rise", 2.0, 4.0); + AssertMeasurementBetween(result, "Vth_fall", 0.0, 3.0); + } + + // Prompt: Series resonant trap filter using an RLC shunt branch to create a deep notch at the series resonance frequency. + [Fact] + public void Series_Resonant_Trap_Notch_Filter_00e403e6e64f14fe() + { + var result = RunAcceptedExample( + "deepseek:00553_735067f5563eac13:00e403e6e64f14fe", + """ + Series Resonant Trap Notch Filter + V1 in 0 DC 0 AC 1 + Rs in out 50 + Rload out 0 1k + L1 out n1 1mH + C1 n1 n2 1uF + R1 n2 0 10 + .ac dec 10 100 100k + .meas ac notch_dB MIN VDB(out) + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "notch_dB", (-17.0), (-13.0)); + } + + // Prompt: Sawtooth oscillator using a 1mA current source to linearly charge a 1nF capacitor. + [Fact] + public void Sawtooth_Generator_using_current_source_and_reset_switch_f131cf28a23b70da() + { + var result = RunAcceptedExample( + "deepseek:01848_d1ca9982c5e87de7:f131cf28a23b70da", + """ + * Sawtooth Generator using current source and reset switch + I1 0 out DC 1m + C1 out 0 1n + S1 out 0 ctrl 0 swmod + .model swmod SW(RON=10 ROFF=10MEG VT=2 VH=0.5) + Vctrl ctrl 0 PULSE(0 5 0 10n 10n 1u 2u) + .IC V(out)=0 + .tran 0.01u 10u UIC + .meas TRAN vmax MAX V(out) FROM=0 TO=10u + .meas TRAN tper TRIG V(out) VAL=0.5 RISE=1 TD=0.5u TARG V(out) VAL=0.5 RISE=2 TD=0.5u + .meas TRAN freq PARAM 1/tper + .meas TRAN vmin MIN V(out) FROM=1u TO=10u + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "vmax", 1.0, 0.1); + AssertMeasurementNear(result, "vmin", 0.0, 0.1); + AssertMeasurementNear(result, "freq", 500000.0, 10000.0); + } + + // Prompt: Charge pump PLL front-end with a switched current source and passive loop filter. + [Fact] + public void PLL_Charge_Pump_with_Passive_Loop_Filter_6ba35e546db99108() + { + var result = RunAcceptedExample( + "deepseek:02119_f2e17924867a7b05:6ba35e546db99108", + """ + * PLL Charge Pump with Passive Loop Filter + VSUP VDD 0 DC 5 + VUP UP 0 PULSE(0 5 0 1n 1n 100n 1u) + IUP VDD in_up PULSE(0 90u 0 1n 1n 100n 1u) + R1 Vctrl vfilt 100k + C1 vfilt 0 1n + C2 Vctrl 0 1n + SUP in_up Vctrl UP 0 swmod + .model swmod SW(RON=10 ROFF=1e12 VT=1 VH=0.1) + Rgnd in_up 0 1G + .tran 10n 20u 0 10n + .MEAS TRAN vctrl_final FIND V(vctrl) AT=20u + .MEAS TRAN vctrl_avg AVG V(vctrl) FROM=10u TO=20u + .MEAS TRAN vctrl_pp PP V(vctrl) FROM=19u TO=20u + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "vctrl_final", 0.15, 0.25); + AssertMeasurementLess(result, "vctrl_pp", 0.01); + } + + // Prompt: Design an NMOS source follower buffer with a 10k\u03a9 source resistor and a 12V supply. Bias the gate at 6V DC and add a 1V AC signal for frequency response measurement from 1Hz to 10MHz. + [Fact] + public void NMOS_source_follower_buffer_947dfe9b05526459() + { + var result = RunAcceptedExample( + "deepseek:00256_526c5d2497f3c639:947dfe9b05526459", + """ + * NMOS source follower buffer + VDD vdd 0 DC 12 + VIN in 0 DC 6 AC 1 + RS out 0 10k + M1 vdd in out 0 NMOD W=100u L=10u + .MODEL NMOD NMOS (VTO=1 KP=100u LAMBDA=0.02) + .OP + .DC VIN 0 12 0.1 + .AC DEC 10 1 10MEG + .MEAS DC vout_dc FIND V(out) WHEN V(in)=6 + .MEAS AC vout_ac FIND V(out) AT=1k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "vout_ac", 0.8, 1.0); + AssertMeasurementBetween(result, "vout_dc", 3.8, 4.3); + } + + // Prompt: NMOS source-follower regulator with op-amp feedback + [Fact] + public void NMOS_Source_Follower_Linear_Regulator_2c1ee9a26accaf53() + { + var result = RunAcceptedExample( + "deepseek:01895_737ee3c56b912d7b:2c1ee9a26accaf53", + """ + * NMOS Source-Follower Linear Regulator + .OPTIONS PROBE POST + .MODEL nmod NMOS (VTO=1.0 KP=1.0E-3 LAMBDA=0.02) + VDD vdd 0 DC 12 + VREF vref 0 DC 2.5 + R1 fb 0 10K + R2 out fb 10K + RLOAD out 0 1K + EOPAMP gate 0 vref fb 100000 + M1 vdd gate out out nmod + .OP + .DC VDD 10 15 0.1 + .MEAS DC vout_nom FIND V(out) AT=12 + .MEAS DC vout_max MAX V(out) + .MEAS DC vout_min MIN V(out) + .MEAS DC line_reg PARAM='(vout_max - vout_min)/5' + .END + """); + + AssertAllMeasurementsSuccessful(result); + var vout_nom = MeasurementValue(result, "vout_nom"); + var vout_max = MeasurementValue(result, "vout_max"); + var vout_min = MeasurementValue(result, "vout_min"); + AssertMeasurementNear(result, "vout_nom", 5.0, 0.005); + Assert.True((((vout_max - vout_min) < 0.001)), CaseLabel(result)); + AssertMeasurementLess(result, "line_reg", 0.02); + } + + // Prompt: AM signal is generated by multiplying the modulating signal (1 V DC + 0.5 Vpk 1 kHz sine) with a 1 MHz sine carrier. + [Fact] + public void Synchronous_AM_Detector_with_Sample_and_Hold_Peak_Sampling_68ebfe1166bbe42e() + { + var result = RunAcceptedExample( + "deepseek:02105_4295b59307ac872b:68ebfe1166bbe42e", + """ + * Synchronous AM Detector with Sample-and-Hold Peak Sampling + V_mod mod 0 SIN(1 0.5 1k) + V_carrier_sin carr 0 SIN(0 1 1MEG) + E_am am_out 0 value={V(mod)*V(carr)} + V_pulse pulse 0 PULSE(0 5 0.25u 1n 1n 50n 1u) + S1 am_out samp_node pulse 0 swmod + C_samp samp_node 0 100pF + E_buffer buff_out 0 samp_node 0 1 + R1 buff_out filt_out 10k + C1 filt_out 0 1nF + .MODEL swmod SW(RON=10 ROFF=100MEG VT=2.5 VH=0.1) + .tran 0.1u 10m 0 0.1u + .MEAS TRAN V_avg AVG V(filt_out) FROM=5m TO=10m + .MEAS TRAN V_pp PP V(filt_out) FROM=5m TO=10m + .MEAS TRAN V_max MAX V(filt_out) FROM=5m TO=10m + .MEAS TRAN V_min MIN V(filt_out) FROM=5m TO=10m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "V_avg", 1.0, 0.1); + AssertMeasurementNear(result, "V_pp", 1.0, 0.15); + AssertMeasurementNear(result, "V_max", 1.5, 0.15); + AssertMeasurementNear(result, "V_min", 0.5, 0.15); + } + + // Prompt: The Greinacher circuit uses two diodes and two capacitors to double the peak input voltage. + [Fact] + public void Greinacher_Voltage_Doubler_c28c9c1bcc240e3e() + { + var result = RunAcceptedExample( + "deepseek:00147_4de939ee39133a73:c28c9c1bcc240e3e", + """ + * Greinacher Voltage Doubler + V1 in 0 SIN(0 10 50) + C1 in mid 100u + D1 mid out dmod + D2 0 mid dmod + C2 out 0 100u + Rload out 0 10k + .MODEL dmod D (IS=1e-12 RS=1) + .tran 0.1m 10s 0 0.1m UIC + .meas tran vout_avg AVG V(out) FROM=8s TO=10s + .meas tran vout_ripple PP V(out) FROM=8s TO=10s + .meas tran vin_ampl PP V(in) FROM=8s TO=10s + .meas tran vout_end FIND V(out) AT=10s + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "vout_avg", 18.0, 19.5); + AssertMeasurementLess(result, "vout_ripple", 1.0); + AssertMeasurementNear(result, "vin_ampl", 20.0, 0.1); + AssertMeasurementBetween(result, "vout_end", 18.0, 19.5); + } + + // Prompt: Series RLC circuit with AC voltage source. + [Fact] + public void Series_RLC_AC_Analysis_fc1dff9ee6b628b4() + { + var result = RunAcceptedExample( + "deepseek:00065_fc1dff9ee6b628b4:fc1dff9ee6b628b4", + """ + * Series RLC AC Analysis + V1 in 0 AC 1 + R1 in out 1k + L1 out mid 10mH + C1 mid 0 100nF + .AC DEC 100 100 100k + .MEASURE AC max_mag MAX V(out) + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "max_mag", 1.0, 0.01); + } + + // Prompt: Charge amplifier for piezoelectric sensor with capacitive feedback. + [Fact] + public void Charge_Amplifier_for_Piezoelectric_Sensor_6e0c93bef2ee1b96() + { + var result = RunAcceptedExample( + "deepseek:01499_56a19a3fa5aecd11:6e0c93bef2ee1b96", + """ + * Charge Amplifier for Piezoelectric Sensor + Iin in 0 DC 0 AC 1 SIN(0 10u 1k) + Cp in 0 1n + Rp in 0 10Meg + Rf out in 100Meg + Cf out in 1n + E1 out 0 0 in 100k + Vpos vp 0 DC 15 + Vneg vn 0 DC -15 + .AC DEC 10 0.1 100k + .TRAN 10u 5m + .MEAS AC dc_gain FIND VM(out) AT=0.1Hz + .MEAS AC gain_1k FIND VM(out) AT=1kHz + .MEAS AC gain_10k FIND VM(out) AT=10kHz + .MEAS TRAN vout_pp PP V(out) FROM=4ms TO=5ms + .MEAS TRAN iin_pp PP I(Iin) FROM=4ms TO=5ms + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "dc_gain", 90000000.0, 110000000.0); + AssertMeasurementBetween(result, "gain_1k", 150000.0, 170000.0); + AssertMeasurementBetween(result, "gain_10k", 14000.0, 18000.0); + AssertMeasurementRatioBetween(result, "vout_pp", "iin_pp", 150000.0, 170000.0); + } + + // Prompt: Pi-network matching circuit designed for a center frequency of 1 MHz, using two shunt capacitors and one series inductor. + [Fact] + public void Pi_network_impedance_matching_at_1_MHz_ee36f5d6f7986e4c() + { + var result = RunAcceptedExample( + "deepseek:00099_88462446fdede956:ee36f5d6f7986e4c", + """ + * Pi-network impedance matching at 1 MHz + Vin 1 0 AC 1 + Rsrc 1 in 50 + C1 in 0 3.429nF + L1 in out 14.15uH + C2 out 0 2.2nF + RL out 0 200 + .AC DEC 100 500k 2MEG + .MEAS AC V_in_mag FIND VM(in) AT=1MEG + .MEAS AC V_in_dB FIND VDB(in) AT=1MEG + .MEAS AC V_out_mag FIND VM(out) AT=1MEG + .MEAS AC V_out_dB FIND VDB(out) AT=1MEG + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "V_in_mag", 0.5, 0.05); + AssertMeasurementNear(result, "V_out_mag", 1.0, 0.05); + } + + // Prompt: Dynamic precharge inverter with PMOS precharge, NMOS evaluation, and pass transistor to prevent static DC path. + [Fact] + public void CMOS_Dynamic_Precharge_Inverter_b32fe468389f0657() + { + var result = RunAcceptedExample( + "deepseek:01375_d3219e80aacaa788:b32fe468389f0657", + """ + * CMOS Dynamic Precharge Inverter + .OPTIONS RELTOL=0.01 + Vdd VDD 0 DC 1.8 + VIN IN 0 PULSE(0 1.8 15n 1n 1n 20n 80n) + VCLK CLK 0 PULSE(0 1.8 0 0.5n 0.5n 10n 20n) + Cout OUT 0 100fF + M1 OUT CLK VDD VDD PMOD L=0.18u W=2u + M2 OUT IN n1 0 NMOD L=0.18u W=1u + M3 n1 CLK 0 0 NMOD L=0.18u W=1u + .MODEL NMOD NMOS (LEVEL=1 VTO=0.5 KP=200u LAMBDA=0.05) + .MODEL PMOD PMOS (LEVEL=1 VTO=-0.5 KP=100u LAMBDA=0.05) + .TRAN 1p 100n + .MEAS TRAN t_phl_eval TRIG V(CLK) VAL=0.9 RISE=2 TARG V(OUT) VAL=0.9 FALL=1 + .MEAS TRAN t_rise_pre TRIG V(CLK) VAL=0.9 FALL=2 TARG V(OUT) VAL=0.9 RISE=1 + .MEAS TRAN tfall_out TRIG V(OUT) VAL=1.35 FALL=1 TARG V(OUT) VAL=0.45 FALL=1 + .MEAS TRAN trise_out TRIG V(OUT) VAL=0.45 RISE=1 TARG V(OUT) VAL=1.35 RISE=1 + .MEAS TRAN t_precharge_time TRIG V(CLK) VAL=0.9 FALL=2 TARG V(OUT) VAL=1.62 RISE=1 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "t_phl_eval", 1e-10, 5e-09); + AssertMeasurementBetween(result, "t_rise_pre", 1e-10, 5e-09); + AssertMeasurementBetween(result, "tfall_out", 5e-11, 3e-09); + AssertMeasurementBetween(result, "trise_out", 5e-11, 3e-09); + AssertMeasurementBetween(result, "t_precharge_time", 1e-10, 5e-09); + } + + // Prompt: This is a BJT differential pair with an active current mirror load (PNP transistors) and a tail current source formed by an NPN current mirror. + [Fact] + public void BJT_Differential_Pair_with_Active_Load_and_Tail_Current_Mirror_No_Resistive_Load_for_High_Gain_26a5806047a0d908() + { + var result = RunAcceptedExample( + "deepseek:00196_4902454c0df7b751:26a5806047a0d908", + """ + * BJT Differential Pair with Active Load and Tail Current Mirror (No Resistive Load for High Gain) + VCC vcc 0 DC 12 + VEE vee 0 DC -12 + VIN1 in1 0 DC 0 + VIN2 in2 0 DC 0 + Rref vcc b5 220k + Q1 n1 in1 e npn_mod + Q2 out in2 e npn_mod + Q3 n1 n1 vcc pnp_mod + Q4 out n1 vcc pnp_mod + Q5 col_q5 b5 vee npn_mod + Q6 b5 b5 vee npn_mod + Vmeas_tail e col_q5 DC 0 + .MODEL npn_mod NPN(IS=1e-14 BF=100 VAF=100) + .MODEL pnp_mod PNP(IS=1e-14 BF=50 VAF=50) + .OP + .DC VIN1 -50m 50m 1m + .MEAS DC i_tail FIND I(Vmeas_tail) AT=0 + .MEAS DC v_out_op FIND V(out) AT=0 + .MEAS DC gain DERIV V(out) AT=0 + .MEAS DC vout_max MAX V(out) + .MEAS DC vout_min MIN V(out) + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "i_tail", 0.0001, 2e-05); + AssertMeasurementBetween(result, "v_out_op", (-12.0), 12.0); + AssertMeasurementGreater(result, "gain", 1000.0); + var vout_max = MeasurementValue(result, "vout_max"); + var vout_min = MeasurementValue(result, "vout_min"); + Assert.True((((vout_max - vout_min) > 1.0)), CaseLabel(result)); + } + + // Prompt: Design a diode-based antilogarithmic amplifier using an op-amp and measure its exponential output characteristics. + [Fact] + public void Diode_antilog_converter_with_op_amp_feedback_d79b1dacad786e9d() + { + var result = RunAcceptedExample( + "deepseek:00839_5829effb14e9ce35:d79b1dacad786e9d", + """ + * Diode antilog converter with op-amp feedback + E1 out 0 0 in- 100000 + D1 in in- dmod + Rf out in- 100k + VIN in 0 DC 0.1 + .MODEL dmod D(IS=1e-14 N=1 RS=1) + .OP + .DC VIN 0 0.7 0.01 + .MEAS DC VOUT05 FIND V(out) AT=0.5 + .MEAS DC VOUT06 FIND V(out) AT=0.6 + .MEAS DC RATIO PARAM='VOUT06/VOUT05' + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementLess(result, "VOUT05", 0.0); + AssertMeasurementLess(result, "VOUT06", 0.0); + AssertMeasurementBetween(result, "RATIO", 30.0, 70.0); + } + + // Prompt: Switched-capacitor resistor equivalent using two switches and a capacitor. + [Fact] + public void Switched_Capacitor_Resistor_Equivalent_5f39d110dd56ea6b() + { + var result = RunAcceptedExample( + "deepseek:02266_c1b6b935f68661ef:5f39d110dd56ea6b", + """ + * Switched-Capacitor Resistor Equivalent + VIN 1 0 DC 1 + VM 1 in DC 0 + VOUT out 0 DC 0 + S1 in mid phi1 0 swmod + S2 mid out phi2 0 swmod + C1 mid 0 100pF + Vphi1 phi1 0 PULSE(0 5 0 1n 1n 4.5u 10u) + Vphi2 phi2 0 PULSE(0 5 5u 1n 1n 4.5u 10u) + .model swmod SW(RON=10 ROFF=100MEG VT=1 VH=0.5) + .TRAN 0.1u 100u 0 0.1u + .MEASURE TRAN iavg AVG I(VM) FROM=50u TO=100u + .MEASURE TRAN R_eq PARAM 1/iavg + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "iavg", 1e-05, 1e-07); + AssertMeasurementNear(result, "R_eq", 100000.0, 1000.0); + } + + // Prompt: Simulate a simple RC high-pass filter used as an edge detector for a square wave. + [Fact] + public void RC_Differentiating_Edge_Detector_93c1d309f25fed22() + { + var result = RunAcceptedExample( + "deepseek:00638_9635f6c94447f228:93c1d309f25fed22", + """ + * RC Differentiating Edge Detector + C1 in out 100pF + R1 out 0 1k + VIN in 0 PULSE(0 1 0 10n 10n 1u 2u) + .TRAN 1n 10u + .MEAS TRAN vmax MAX V(out) FROM=0 TO=10u + .MEAS TRAN vmin MIN V(out) FROM=0 TO=10u + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "vmax", 1.0, 0.1); + AssertMeasurementNear(result, "vmin", (-1.0), 0.1); + } + + // Prompt: Op-amp voltage follower using E-source with gain 100k + [Fact] + public void Op_Amp_Voltage_Follower_d2b076ef39e3dee6() + { + var result = RunAcceptedExample( + "deepseek:01427_0d7d49130494b69d:d2b076ef39e3dee6", + """ + * Op-Amp Voltage Follower + VIN in 0 DC 0 AC 1 + E1 out 0 in out 100k + RLOAD out 0 10k + .op + .ac dec 10 1 1e6 + .meas AC ac_gain_db MAX DB(V(out)) + .meas AC ac_gain_mag MAX MAG(V(out)) + .end + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "ac_gain_db", 0.0, 0.1); + AssertMeasurementNear(result, "ac_gain_mag", 1.0, 0.01); + } + + // Prompt: Design a positive diode clamper circuit that shifts a sinusoidal input signal upward by a 3V reference. The input is a 1 kHz sine wave with 5V amplitude. Use a 1N4148-like diode, a 1uF capacitor, and a 100k load resistor. Run a transient simulation and measure the minimum and maximum output voltages. + [Fact] + public void Positive_Diode_Clamper_with_3V_Reference_6b08108b1b4342b8() + { + var result = RunAcceptedExample( + "deepseek:00138_6b08108b1b4342b8:6b08108b1b4342b8", + """ + * Positive Diode Clamper with 3V Reference + VIN in 0 SIN(0 5 1k 0 0) + VREF ref 0 DC 3 + C1 in out 1u + D1 ref out Dmod + R1 out 0 100k + .MODEL Dmod D(IS=1e-14) + .TRAN 1u 5m + .MEAS TRAN vmin MIN V(out) FROM=1m TO=5m + .MEAS TRAN vmax MAX V(out) FROM=1m TO=5m + .MEAS TRAN vavg AVG V(out) FROM=1m TO=5m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "vmin", 2.0, 3.0); + AssertMeasurementBetween(result, "vmax", 12.0, 13.0); + AssertMeasurementBetween(result, "vavg", 7.0, 8.0); + } + + // Prompt: Wheatstone bridge powered by 5V with three 120 ohm resistors and one strain gauge modeled as behavioral resistor swept via DC source. + [Fact] + public void Strain_gauge_Wheatstone_bridge_with_instrumentation_amplifier_552865f88460219b() + { + var result = RunAcceptedExample( + "deepseek:02159_cedc9232b69d166f:552865f88460219b", + """ + * Strain gauge Wheatstone bridge with instrumentation amplifier + VEXC vtop 0 DC 5 + V_RSWEEP rsw 0 DC 120 + B_R1 vtop vplus I=(V(vtop,vplus))/V(rsw) + R2 vtop vminus 120 + R3 vplus 0 120 + R4 vminus 0 120 + E_U1 out1 0 vplus inv1 1e5 + E_U2 out2 0 vminus inv2 1e5 + Rf1 out1 inv1 49.5k + Rf2 out2 inv2 49.5k + Rg inv1 inv2 1k + R3a out1 inv3 10k + R4a inv3 out 10k + R3b out2 ninv3 10k + R4b ninv3 0 10k + E_U3 out 0 inv3 ninv3 1e5 + .OP + .DC V_RSWEEP 119 121 0.01 + .MEAS DC vout_balanced FIND V(out) AT=120 + .MEAS DC vout_strained FIND V(out) AT=120.1 + .MEAS DC delta PARAM vout_strained - vout_balanced + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "vout_balanced", 0.0, 0.001); + AssertMeasurementNear(result, "vout_strained", 0.1041, 0.002); + AssertMeasurementNear(result, "delta", 0.1041, 0.002); + } + + // Prompt: Dynamic precharge CMOS inverter with precharge PMOS (M1) and evaluation NMOS stack (M2, M3). + [Fact] + public void CMOS_Dynamic_Precharge_Inverter_8760b4a549b3934f() + { + var result = RunAcceptedExample( + "deepseek:01368_ac78800d8f798712:8760b4a549b3934f", + """ + * CMOS Dynamic Precharge Inverter + .MODEL NMOS NMOS (VTO=0.7 KP=200u) + .MODEL PMOS PMOS (VTO=-0.7 KP=100u) + VDD vdd 0 DC 3.3 + VCLK clk 0 PULSE(0 3.3 5n 0.1n 0.1n 4.9n 10n) + VIN in 0 PWL(0 0 5.1n 0 5.2n 3.3 15n 3.3) + M1 vdd clk out vdd PMOS L=0.35u W=4u + M2 out clk node1 0 NMOS L=0.35u W=2u + M3 node1 in 0 0 NMOS L=0.35u W=2u + C1 out 0 50fF + .TRAN 0.01n 15n + .MEAS TRAN vout_high FIND V(out) AT=4n + .MEAS TRAN vout_low FIND V(out) AT=7n + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "vout_high", 3.3, 0.2); + AssertMeasurementLess(result, "vout_low", 0.5); + } + + // Prompt: Design an inverting op-amp amplifier with a gain of -10 using a behavioral op-amp. Use an AC analysis to verify the gain. + [Fact] + public void Inverting_amplifier_using_E_source_op_amp_0a25e2c4d444fcf5() + { + var result = RunAcceptedExample( + "deepseek:00311_ca17c4d3afb77636:0a25e2c4d444fcf5", + """ + * Inverting amplifier using E-source op-amp + .AC DEC 10 1 100k + VIN in 0 AC 1 DC 0 + R1 in neg 1k + R2 out neg 10k + E1 out 0 0 neg 100k + VCC VCC 0 DC 12 + VEE VEE 0 DC -12 + .meas AC gain_db FIND db(V(out)) AT=1k + .meas AC phase FIND ph(V(out)) AT=1k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "gain_db", 20.0, 0.1); + } + + // Prompt: Parameterized resistor divider with configurable total resistance and tap ratio + [Fact] + public void Parameterized_resistor_divider_2a3b5402e3b53c4c() + { + var result = RunAcceptedExample( + "deepseek:02380_8dde128836d532cf:2a3b5402e3b53c4c", + """ + * Parameterized resistor divider + .PARAM RTOT=20k RATIO=0.5 + V1 in 0 DC 10 + R1 in out {RTOT*RATIO} + R2 out 0 {RTOT*(1-RATIO)} + .OP + .DC V1 10 10 1 + .MEAS DC VOUT FIND V(out) AT=10 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "VOUT", 4.5, 5.5); + } + + // Prompt: Create a SPICE netlist for a two-input CMOS NAND gate and simulate its transient response to pulse inputs. + [Fact] + public void CMOS_NAND2_Gate_Transient_Response_c44550d8924335f5() + { + var result = RunAcceptedExample( + "deepseek:00295_5b5661faf7a8d7d8:c44550d8924335f5", + """ + * CMOS NAND2 Gate Transient Response + VDD vdd 0 DC 5V + VINA A 0 PULSE(0 5 0 1n 1n 5u 10u) + VINB B 0 PULSE(0 5 2.5u 1n 1n 5u 10u) + MP1 Y A vdd vdd PMOD W=10u L=1u + MP2 Y B vdd vdd PMOD W=10u L=1u + MN1 Y A n1 0 NMOD W=10u L=1u + MN2 n1 B 0 0 NMOD W=10u L=1u + CLOAD Y 0 100pF + .MODEL NMOD NMOS(VTO=1 KP=100U LAMBDA=0.02) + .MODEL PMOD PMOS(VTO=-1 KP=100U LAMBDA=0.02) + .TRAN 0.01u 20u + .MEAS TRAN tpd_BY TRIG V(B) VAL=2.5 RISE=1 TARG V(Y) VAL=2.5 FALL=1 + .MEAS TRAN tfall_Y TRIG V(Y) VAL=4.5 FALL=1 TARG V(Y) VAL=0.5 FALL=1 + .MEAS TRAN max_Y MAX V(Y) FROM=0 TO=20u + .MEAS TRAN min_Y MIN V(Y) FROM=0 TO=20u + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "tpd_BY", 1e-08, 2e-07); + AssertMeasurementBetween(result, "tfall_Y", 1e-09, 5e-07); + AssertMeasurementNear(result, "max_Y", 5.0, 0.2); + AssertMeasurementNear(result, "min_Y", 0.0, 0.2); + } + + // Prompt: Shunt voltage regulator using an op-amp error amplifier and NPN transistor. + [Fact] + public void Shunt_Regulator_with_Op_Amp_Error_Amplifier_c83c3896b09e4413() + { + var result = RunAcceptedExample( + "deepseek:01901_52ee69dff328112a:c83c3896b09e4413", + """ + * Shunt Regulator with Op-Amp Error Amplifier + VIN IN 0 DC 12 + RS IN OUT 100 + VREF 5 0 DC 5 + R1 OUT FB 10K + R2 FB 0 10K + E1 OPOUT 0 FB 5 1E5 + VMEAS OUT COLL DC 0 + Q1 COLL OPOUT 0 QN + RL OUT 0 1K + .MODEL QN NPN(IS=1E-15 BF=100) + .OP + .DC VIN 12 20 0.1 + .MEAS DC VOUT_12 FIND V(OUT) AT=12 + .MEAS DC VOUT_20 FIND V(OUT) AT=20 + .MEAS DC IQ1_20 FIND I(VMEAS) AT=20 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "vout_12", 9.9, 10.1); + AssertMeasurementBetween(result, "vout_20", 9.9, 10.1); + AssertMeasurementBetween(result, "iq1_20", 0.08, 0.1); + } + + // Prompt: Switched-capacitor comparator with MOSFET switches + [Fact] + public void SC_Comparator_with_adjusted_clocks_f099ff4d59dd9082() + { + var result = RunAcceptedExample( + "deepseek:02407_7470eb812a95e871:f099ff4d59dd9082", + """ + * SC Comparator with adjusted clocks + VDD VDD 0 DC 5 + Vref Vref 0 DC 2.5 + Vin in 0 DC 2.5 PWL(0 0, 10u 5, 20u 5) + Vclk1 CLK1 0 PULSE(0 5 0.4u 50n 50n 0.9u 2u) + Vclk2 CLK2 0 PULSE(0 5 1.5u 50n 50n 0.8u 2u) + M1 n1 CLK1 in 0 nmos_sw W=10u L=1u + M2 n1 CLK2 Vref 0 nmos_sw W=10u L=1u + M3 neg CLK1 Vref 0 nmos_sw W=10u L=1u + C1 n1 neg 1pF + C2 n1 0 0.1pF + C3 neg 0 0.1pF + E1 e1_out 0 Vref neg 1e4 + Rpole e1_out out_int 1k + Cpole out_int 0 0.5pF + Rout out_int out 1 + D1 out VDD dclamp + D2 0 out dclamp + Cout out 0 0.1pF + Rneg neg 0 1e12 + Rn1 n1 0 1e12 + .MODEL nmos_sw NMOS(VTO=0.7 KP=100u LAMBDA=0.02 RS=10 RD=10) + .MODEL dclamp D(IS=1n RS=1 CJO=0.5pF) + .OPTIONS GMIN=1e-12 ABSTOL=1e-12 RELTOL=0.001 METHOD=GEAR + .TRAN 10n 20u 0 10n + .MEAS TRAN t_cross WHEN V(out)=2.5 RISE=1 + .MEAS TRAN vin_cross FIND V(in) WHEN V(out)=2.5 RISE=1 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "t_cross", 4.5e-06, 6e-06); + AssertMeasurementBetween(result, "vin_cross", 2.3, 2.8); + } + + // Prompt: Reverse-biased photodiode (D1) with 5V bias (Vbias) connected to a transimpedance amplifier. + [Fact] + public void Photodiode_reverse_bias_transimpedance_amplifier_2909ed5065020093() + { + var result = RunAcceptedExample( + "deepseek:02130_358af66d19f242a8:2909ed5065020093", + """ + * Photodiode reverse-bias transimpedance amplifier + Vbias vb 0 DC 5 + I1 inv vb DC 50u PULSE(50u 100u 1u 1n 1n 9u 10u) + D1 inv vb Dphoto + Rf out inv 10k + Eop out 0 0 inv 100k + .MODEL Dphoto D(IS=1e-12 RS=10 CJO=10p BV=50) + .OP + .TRAN 1n 10u 0 1n + .MEAS TRAN Vout_OP FIND V(out) AT=0.5u + .MEAS TRAN Vout_DC FIND V(out) AT=0.99u + .MEAS TRAN Vout_tran FIND V(out) AT=5u + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "Vout_OP", 0.5, 0.01); + AssertMeasurementNear(result, "Vout_DC", 0.5, 0.01); + AssertMeasurementNear(result, "Vout_tran", 1.0, 0.01); + } + + // Prompt: Design a BJT Gilbert gain cell that acts as a variable transconductance amplifier. Use a 1mA tail current, 2k load resistors, and a control voltage of 50mV to set the gain. Show the transient response for a 10mV 1kHz differential input. + [Fact] + public void Gilbert_Variable_Transconductance_Amplifier_9e58887f7e5bf0f5() + { + var result = RunAcceptedExample( + "deepseek:02290_91503117d627c38d:9e58887f7e5bf0f5", + """ + * Gilbert Variable Transconductance Amplifier + VCC 10 0 DC 5 + VEE 20 0 DC -5 + I1 3 20 DC 1m + Q1 4 inp 3 npnmod + Q2 5 inn 3 npnmod + Q3 outp vcp 4 npnmod + Q4 outn vcn 4 npnmod + Q5 outn vcp 5 npnmod + Q6 outp vcn 5 npnmod + R1 outp 10 2k + R2 outn 10 2k + VIN inp inn DC 0 SIN(0 10m 1k) + VCTL vcp vcn DC 50m + .MODEL npnmod NPN(IS=1e-15 BF=100 VAF=50) + .OP + .TRAN 1u 2m + .MEASURE TRAN vout_pp PP V(outp,outn) FROM=1m TO=2m + .MEASURE TRAN vin_pp PP V(inp,inn) FROM=1m TO=2m + .MEASURE TRAN gain PARAM='vout_pp/vin_pp' + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "gain", 25.0, 35.0); + } + + // Prompt: A Zener diode shunt regulator with series resistor and load resistor + [Fact] + public void Zener_voltage_regulator_with_series_resistor_d4943cf698518a1a() + { + var result = RunAcceptedExample( + "deepseek:00132_073610f5412dac26:d4943cf698518a1a", + """ + * Zener voltage regulator with series resistor + VIN in 0 DC 10 + R1 in out 500 + D1 0 out zener + RL out 0 1k + .MODEL zener D(IS=1e-12 RS=5 BV=5.1 IBV=20m N=1) + .DC VIN 0 15 0.1 + .MEAS DC Vout_nom FIND V(out) AT=10 + .MEAS DC Vout8 FIND V(out) AT=8 + .MEAS DC Vout12 FIND V(out) AT=12 + .MEAS DC line_reg PARAM='Vout12-Vout8' + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "Vout_nom", 5.0, 5.3); + AssertMeasurementLess(result, "line_reg", 0.1); + } + + // Prompt: 1 kHz 2 V zero-offset sine input + [Fact] + public void Peak_Detector_with_Bleed_Resistor_d2ba702ab327b61b() + { + var result = RunAcceptedExample( + "deepseek:00743_14f7fa215e0f90c8:d2ba702ab327b61b", + """ + * Peak Detector with Bleed Resistor + VIN in 0 SIN(0 2 1k) + D1 in out Ddet + C1 out 0 1uF + R1 out 0 100k + .MODEL Ddet D(IS=1e-12 RS=1) + .TRAN 1u 5m + .MEAS TRAN vout_max MAX V(out) FROM=2m TO=5m + .MEAS TRAN vout_min MIN V(out) FROM=2m TO=5m + .MEAS TRAN vout_avg AVG V(out) FROM=2m TO=5m + .END + """); + + AssertAllMeasurementsSuccessful(result); + var vout_max = MeasurementValue(result, "vout_max"); + var vout_min = MeasurementValue(result, "vout_min"); + AssertMeasurementBetween(result, "vout_max", 1.0, 2.0); + AssertMeasurementBetween(result, "vout_min", 0.8, 2.0); + var ripple = (vout_max - vout_min); + Assert.True(((ripple < 0.2)), CaseLabel(result)); + } + + // Prompt: Design a track-and-hold circuit using a sampling capacitor and an op-amp buffer. + [Fact] + public void Track_and_Hold_Buffer_with_Sampling_Capacitor_d954903bca1f299b() + { + var result = RunAcceptedExample( + "deepseek:02247_36b1329a22253737:d954903bca1f299b", + """ + * Track-and-Hold Buffer with Sampling Capacitor + VIN inp 0 SIN(0.5 0.5 1k) + VCLK clk 0 PULSE(0 5 0 10n 10n 5u 10u) + E_BUF out_buf 0 inp out_buf 100000 + S1 out_buf hold_node clk 0 SW1 + .MODEL SW1 SW(RON=100 ROFF=100MEG VT=2 VH=0.5) + C_HOLD hold_node 0 1n + R_LOAD hold_node 0 1MEG + .TRAN 0.1u 20u + .MEAS TRAN v_track FIND V(hold_node) AT=4.9u + .MEAS TRAN v_hold FIND V(hold_node) AT=9.9u + .MEAS TRAN v_inp_track FIND V(inp) AT=4.9u + .MEAS TRAN v_track_err PARAM='v_inp_track - v_track' + .MEAS TRAN v_droop PARAM='v_track - v_hold' + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "v_track_err", (-0.001), 0.001); + AssertMeasurementBetween(result, "v_hold", 0.51, 0.52); + AssertMeasurementBetween(result, "v_droop", 0.002, 0.003); + } + + // Prompt: Sallen-Key second-order low-pass filter + [Fact] + public void Sallen_Key_2nd_order_Butterworth_low_pass_filter_7a5646b67cdb9ac1() + { + var result = RunAcceptedExample( + "deepseek:00354_4152e73ed68f4844:7a5646b67cdb9ac1", + """ + * Sallen-Key 2nd-order Butterworth low-pass filter + R1 in 1 10k + R2 1 pos 10k + C1 1 out 14.14n + C2 pos 0 7.07n + E1 out 0 pos out 100000 + VIN in 0 DC 0 AC 1 + .AC DEC 100 1 100k + .MEAS AC max_gain MAX vdb(out) + .MEAS AC fcut3db WHEN vdb(out)=-3 FALL=1 + .MEAS AC dc_gain FIND v(out) AT=1 + .MEAS AC att_10k FIND vdb(out) AT=10k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "max_gain", 0.0, 0.1); + AssertMeasurementNear(result, "fcut3db", 1591.55, 159.155); + AssertMeasurementNear(result, "dc_gain", 1.0, 0.01); + AssertMeasurementBetween(result, "att_10k", (-35.0), (-25.0)); + AssertMeasurementLess(result, "att_10k", (-3.0)); + } + + // Prompt: Design a half-wave rectifier circuit with an AC input, a diode, a smoothing capacitor, and a resistive load. Simulate transient response to verify output voltage and ripple. + [Fact] + public void Half_Wave_Rectifier_with_Smoothing_Capacitor_034eaeba772ac26c() + { + var result = RunAcceptedExample( + "deepseek:00113_034eaeba772ac26c:034eaeba772ac26c", + """ + * Half-Wave Rectifier with Smoothing Capacitor + VIN in 0 SIN(0 10 60 0 0) + D1 in out DMOD + C1 out 0 470u + Rload out 0 1k + .MODEL DMOD D(IS=1e-14 RS=0.1 CJO=2p) + .TRAN 10u 100m 20m 10u + .MEAS TRAN vout_avg AVG V(out) FROM=20ms TO=100ms + .MEAS TRAN vout_pp PP V(out) FROM=20ms TO=100ms + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "vout_avg", 8.5, 9.5); + AssertMeasurementBetween(result, "vout_pp", 0.2, 0.5); + } + + // Prompt: Design a Pi-network impedance matching circuit at 1 MHz to match a 50 ohm source to a 200 ohm load. + [Fact] + public void Pi_network_impedance_matching_at_1_MHz_3d4accaaffd8cb38() + { + var result = RunAcceptedExample( + "deepseek:00098_3d4accaaffd8cb38:3d4accaaffd8cb38", + """ + * Pi-network impedance matching at 1 MHz + VIN 1 0 AC 1 + RS 1 in 50 + C1 in 0 1.5915n + L1 in out 15.915u + C2 out 0 1.5915n + RL out 0 200 + .AC DEC 10 100K 10MEG + .MEAS AC v_in_mag FIND VM(in) AT=1MEG + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "v_in_mag", 0.5, 0.01); + } + + // Prompt: The oscillator uses a common-emitter NPN transistor with tapped inductor providing 180\xb0 phase shift. + [Fact] + public void BJT_Hartley_Oscillator_VCC_at_tap_common_emitter_792fb1eafb7ed64b() + { + var result = RunAcceptedExample( + "deepseek:01138_245d57ded31501bb:792fb1eafb7ed64b", + """ + * BJT Hartley Oscillator (VCC at tap, common-emitter) + VCC vcc 0 DC 12 + R1 vcc b 48k + R2 b 0 12k + RE e 0 1.2k + CE e 0 1u + Q1 c b e mynpn + L1 c tap 10u + L2 tap n2 90u + C2 n2 b 100n + K L1 L2 0.95 + C1 c n2 12n + .MODEL mynpn NPN(IS=1e-14 BF=150 VAF=100) + .TRAN 100n 1m UIC + .IC V(c)=10 V(tap)=6 V(n2)=8 + .MEAS TRAN t_per TRIG V(c) VAL=8 RISE=11 TARG V(c) VAL=8 RISE=31 + .MEAS TRAN freq PARAM 20/t_per + .MEAS TRAN vpp PP V(c) FROM=200u TO=1m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "freq", 100000.0, 150000.0); + AssertMeasurementGreater(result, "vpp", 5.0); + } + + // Prompt: Complementary (NPN/PNP) emitter follower buffer with diode biasing. + [Fact] + public void Complementary_Emitter_Follower_Buffer_with_Diode_Biasing_d26222eca68254f7() + { + var result = RunAcceptedExample( + "deepseek:00957_5583227f914c87ea:d26222eca68254f7", + """ + * Complementary Emitter Follower Buffer with Diode Biasing + VCC vcc 0 DC 12V + VEE vee 0 DC -12V + VIN in 0 DC 0 SIN(0 1 1k) + R1 vcc bias_p 10k + R2 vee bias_n 10k + D1 bias_p in DD + D2 in bias_n DD + Q1 vcc bias_p out NPN1 + Q2 vee bias_n out PNP1 + RL out 0 1k + .MODEL DD D(IS=1e-16) + .MODEL NPN1 NPN(BF=200 IS=1e-16) + .MODEL PNP1 PNP(BF=200 IS=1e-16) + .OP + .TRAN 0.01ms 2ms + .MEAS TRAN vout_pp PP V(out) FROM=1ms TO=2ms + .MEAS TRAN gain PARAM vout_pp/2.0 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "gain", 0.95, 1.05); + } + + // Prompt: Design a diode peak detector with a bleed resistor to extract the envelope of a sinusoidal signal. + [Fact] + public void Diode_Peak_Detector_with_Bleed_Resistor_5fb6a294af340d0e() + { + var result = RunAcceptedExample( + "deepseek:00736_18410ee46ab3ffff:5fb6a294af340d0e", + """ + * Diode Peak Detector with Bleed Resistor + VIN in 0 SIN(0 5 1k) + D1 in out DMOD + C1 out 0 1u + Rbleed out 0 100k + .MODEL DMOD D(IS=1e-14 N=1 RS=1) + .TRAN 10u 10m + .MEAS TRAN vout_max MAX V(out) FROM=5m TO=10m + .MEAS TRAN vout_min MIN V(out) FROM=5m TO=10m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementGreater(result, "vout_max", 4.0); + AssertMeasurementGreater(result, "vout_min", 3.8); + } + + // Prompt: Simulate a CMOS inverter with a 1pF capacitive load. Measure rise and fall times of the output when driven by a 0-5V pulse. + [Fact] + public void CMOS_Inverter_with_Capacitive_Load_and_Rise_Fall_Time_Measurement_3cc2268d9da67cf8() + { + var result = RunAcceptedExample( + "deepseek:01357_573a809d6f3c03b5:3cc2268d9da67cf8", + """ + *CMOS Inverter with Capacitive Load and Rise/Fall Time Measurement + M1 out in 0 0 NMOS W=2u L=1u + M2 out in vdd vdd PMOS W=4u L=1u + Vdd vdd 0 DC 5 + Vin in 0 PULSE(0 5 1n 1n 1n 50n 100n) + Cout out 0 1p + .MODEL NMOS NMOS (VTO=1 KP=200u LAMBDA=0.02) + .MODEL PMOS PMOS (VTO=-1 KP=100u LAMBDA=0.02) + .TRAN 0.1n 200n + .MEASURE TRAN trise TRIG v(out) VAL=0.5 RISE=1 TARG v(out) VAL=4.5 RISE=1 + .MEASURE TRAN tfall TRIG v(out) VAL=4.5 FALL=1 TARG v(out) VAL=0.5 FALL=1 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "trise", 0.0, 5e-08); + AssertMeasurementBetween(result, "tfall", 0.0, 5e-08); + } + + // Prompt: Passive RC low-pass filter acting as a lag compensator. + [Fact] + public void Lag_Compensation_RC_Network_05ab16d7fc41afb6() + { + var result = RunAcceptedExample( + "deepseek:00509_05ab16d7fc41afb6:05ab16d7fc41afb6", + """ + * Lag Compensation RC Network + V1 in 0 AC 1 + R1 in out 1k + C1 out 0 1u + .AC DEC 10 1 100k + .MEAS AC dc_gain FIND VDB(out) AT=1 + .MEAS AC fcutoff WHEN VDB(out)=-3 FALL=1 + .MEAS AC phase_at_fcutoff FIND VP(out) WHEN VDB(out)=-3 FALL=1 + .MEAS AC phase_at_100k FIND VP(out) AT=100k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "dc_gain", 0.0, 0.1); + AssertMeasurementNear(result, "fcutoff", 159.0, 2.0); + AssertMeasurementNear(result, "phase_at_fcutoff", (-0.7854), 0.035); + AssertMeasurementNear(result, "phase_at_100k", (-1.57), 0.02); + } + + // Prompt: Unity-gain subtractor using an ideal opamp (gain=100k) and four 10 k\u03a9 resistors. + [Fact] + public void Op_Amp_Subtractor_with_Matched_Resistors_686e3584fb8e13de() + { + var result = RunAcceptedExample( + "deepseek:01468_df31f326c6a4b884:686e3584fb8e13de", + """ + * Op-Amp Subtractor with Matched Resistors + V1 in1 0 DC 1.5 AC 0.1 + V2 in2 0 DC 2.0 AC 0.15 + R1 in1 inv 10k + R2 inv out 10k + R3 in2 non 10k + R4 non 0 10k + E1 out 0 non inv 100k + .OP + .AC DEC 10 10 100k + .MEAS OP vout_dc FIND V(out) AT=0 + .MEAS AC vout_ac FIND VM(out) AT=1000 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "vout_dc", 0.5, 0.01); + AssertMeasurementNear(result, "vout_ac", 0.05, 0.001); + } + + // Prompt: Precision full-wave absolute-value rectifier using two op\u2011amps (E sources with gain 100k) and a Schottky diode. + [Fact] + public void Precision_Full_Wave_Absolute_Value_Rectifier_d4b4b80ac54103f6() + { + var result = RunAcceptedExample( + "deepseek:00722_3a99da14b312ff87:d4b4b80ac54103f6", + """ + * Precision Full-Wave Absolute-Value Rectifier + VIN in 0 SIN(0 1.5 1k 0 0 0) + E_U1 u1out 0 in vpos 100000 + D1 u1out vpos Schottky + R_PULL vpos 0 10k + E_U2 out 0 vpos ninv 100000 + R1 in ninv 10k + Rf out ninv 10k + .MODEL Schottky D(IS=1e-12 RS=0.1 N=1.01 CJO=1p VJ=0.4 M=0.5) + .TRAN 10u 3m 0 10u + .MEAS TRAN V_MAX MAX V(out) FROM=2m TO=3m + .MEAS TRAN V_MIN MIN V(out) FROM=2m TO=3m + .MEAS TRAN V_AVG AVG V(out) FROM=2m TO=3m + .MEAS TRAN V_IN_MAX MAX V(in) FROM=2m TO=3m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementRatioBetween(result, "V_MAX", "V_IN_MAX", 0.99, 1.01); + AssertMeasurementLess(result, "V_MIN", 0.01); + AssertMeasurementBetween(result, "V_AVG", 0.92, 0.98); + } + + // Prompt: Sample-and-hold front end with 10pF hold capacitor and unity-gain buffer (E-source). + [Fact] + public void SAR_ADC_sample_comparator_front_end_db21374203ddef1e() + { + var result = RunAcceptedExample( + "deepseek:02216_427a27fe55c06abb:db21374203ddef1e", + """ + * SAR ADC sample comparator front end + V_IN in 0 DC 2.3 + R_LEAK hold 0 100MEG + C_HOLD hold 0 10p IC=2.3 + .IC V(hold)=2.3 + E_BUF buf 0 hold 0 1 + V_CLK1 phi1 0 PULSE(0 5 0 1n 1n 2u 20u) + S1 in hold phi1 0 swmod + .MODEL swmod SW(RON=10 ROFF=100MEG VT=0.5 VH=0.1) + V_REF1 ref1 0 PULSE(0 2.5 5u 1n 1n 1e9 1e9) + V_REF2 ref1 ref PULSE(0 1.25 10u 1n 1n 1e9 1e9) + E_COMP out 0 VALUE={IF(V(buf) > V(ref), 0, 5)} + R_LOAD out 0 10k + C_OUT out 0 1pF + .TRAN 0.1u 20u + .MEAS TRAN v_hold_at_5u FIND V(hold) AT=5u + .MEAS TRAN out_at_7u FIND V(out) AT=7u + .MEAS TRAN out_at_12u FIND V(out) AT=12u + .MEAS TRAN t_cross1 WHEN V(out)=2.5 RISE=1 + .MEAS TRAN t_cross2 WHEN V(out)=2.5 FALL=1 + .MEAS TRAN high_pulse_width PARAM='t_cross2 - t_cross1' + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "v_hold_at_5u", 2.3, 0.05); + AssertMeasurementNear(result, "out_at_7u", 5.0, 0.1); + AssertMeasurementNear(result, "out_at_12u", 0.0, 0.1); + AssertMeasurementRatioBetween(result, "high_pulse_width", "t_cross2", 0.45, 0.55); + } + + // Prompt: The circuit is a biased negative diode clipper that limits the negative voltage swing using a diode with a DC bias source. + [Fact] + public void Biased_Negative_Diode_Clipper_8a905037ac23bb6b() + { + var result = RunAcceptedExample( + "deepseek:00754_73c751b68f861323:8a905037ac23bb6b", + """ + * Biased Negative Diode Clipper + VIN in 0 SIN(0 5 1k) + R1 in out 1k + RL out 0 10k + D1 bias out dmod + VBIAS bias 0 DC -3 + .MODEL dmod D(IS=1e-15) + .TRAN 1u 10m 0 1u + .MEAS TRAN vout_min MIN V(out) FROM=5m TO=10m + .MEAS TRAN vout_max MAX V(out) FROM=5m TO=10m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "vout_min", (-3.7), 0.2); + AssertMeasurementGreater(result, "vout_max", 4.5); + } + + // Prompt: Design a sawtooth waveform generator using a constant current source, a capacitor, and a voltage-controlled switch reset. The switch should be driven by a periodic pulse. Provide a SPICE netlist with transient analysis and measure the peak voltage, minimum voltage, period, average voltage, and frequency of the output. + [Fact] + public void Sawtooth_Generator_with_Current_Source_and_Reset_Switch_a63497ca56365dda() + { + var result = RunAcceptedExample( + "deepseek:01855_d758dce5288888e1:a63497ca56365dda", + """ + * Sawtooth Generator with Current Source and Reset Switch + I1 10 out DC 100uA + VCC 10 0 DC 10V + C1 out 0 100n + S1 out 0 ctrl 0 swmod + Vctrl ctrl 0 PULSE(0 5 0 10n 10n 10u 1.01m) + .model swmod SW(RON=10 ROFF=100MEG VT=2.5 VH=0.5) + .tran 10u 5m UIC + .meas TRAN Vpeak MAX V(out) FROM=0 TO=5m + .meas TRAN Vmin MIN V(out) FROM=0 TO=5m + .meas TRAN Period TRIG V(out) VAL=0.5 RISE=2 TARG V(out) VAL=0.5 RISE=3 + .meas TRAN AvgV AVG V(out) FROM=2m TO=5m + .meas TRAN Freq PARAM 1/Period + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "Vpeak", 0.9, 1.1); + AssertMeasurementLess(result, "Vmin", 0.1); + AssertMeasurementBetween(result, "Period", 0.0009, 0.0011); + AssertMeasurementBetween(result, "AvgV", 0.4, 0.6); + AssertMeasurementBetween(result, "Freq", 900.0, 1100.0); + } + + // Prompt: Pi attenuator for 50-ohm system with 6 dB attenuation. + [Fact] + public void Pi_topology_resistive_attenuator_6_dB_pad_18c1aa53cfcab0d7() + { + var result = RunAcceptedExample( + "deepseek:00003_92d8fc2086dc14d2:18c1aa53cfcab0d7", + """ + * Pi-topology resistive attenuator - 6 dB pad + V1 in 0 DC 1 AC 1 + R1 in mid 16.7 + R2 mid 0 66.7 + R3 mid out 16.7 + RL out 0 50 + .OP + .AC dec 10 1 1e6 + .TRAN 1u 1m + .MEASURE TRAN vout_dc FIND V(out) AT=1m + .MEASURE AC att_1k FIND V(out) AT=1kHz + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "vout_dc", 0.5, 0.02); + AssertMeasurementNear(result, "att_1k", 0.5, 0.02); + } + + // Prompt: Widlar current source using NPN BJTs with emitter degeneration on Q2 + [Fact] + public void Widlar_BJT_Current_Source_with_DC_Sweep_4146a120f46df593() + { + var result = RunAcceptedExample( + "deepseek:01011_7132ae30bc66fd22:4146a120f46df593", + """ + * Widlar BJT Current Source with DC Sweep + VCC vcc 0 DC 15 + Q1 n1 n1 0 0 NPN + Q2 out n1 n2 0 NPN + R2 n2 0 2k + R1 vcc n1 10k + Vmeas col2 out DC 0 + Rload vcc col2 5k + .model NPN NPN(IS=1e-15 BF=100 VAF=50) + .op + .DC VCC 10 20 0.1 + .meas DC Iref AVG I(R1) + .meas DC Iout AVG I(Vmeas) + .meas DC Iratio PARAM Iout/Iref + .meas DC Iout_at_15 FIND I(Vmeas) AT=15 + .meas DC Iref_at_15 FIND I(R1) AT=15 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementGreater(result, "Iref", 0.001); + AssertMeasurementLess(result, "Iout", 0.0001); + AssertMeasurementBetween(result, "Iratio", 0.01, 0.1); + } + + // Prompt: Sample-and-hold front-end with analog switch, hold capacitor, and unity-gain buffer + [Fact] + public void Sample_and_hold_front_end_with_clocked_switch_1aa211809fa7244a() + { + var result = RunAcceptedExample( + "deepseek:02232_1aa211809fa7244a:1aa211809fa7244a", + """ + * Sample-and-hold front end with clocked switch + VIN in 0 SIN(0 1 1k) + VCLK clk 0 PULSE(0 5 0 10n 10n 10u 20u) + .MODEL swmod SW(RON=10 ROFF=100MEG VT=2.5 VH=0.5) + S1 in s clk 0 swmod + C1 s 0 1n + Ebuf out 0 s 0 1 + Rload out 0 1k + .TRAN 0.1u 100u + .MEAS TRAN vhold FIND V(out) AT=15u + .MEAS TRAN vhold2 FIND V(out) AT=55u + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "vhold", 0.0628, 0.05); + AssertMeasurementNear(result, "vhold2", 0.309, 0.05); + } + + // Prompt: BJT differential pair with active PNP current mirror load and emitter degeneration. + [Fact] + public void BJT_Differential_Pair_with_Active_Current_Mirror_Load_and_Emitter_Degeneration_1b9d102563fcab29() + { + var result = RunAcceptedExample( + "deepseek:00200_b5e8f8e2cade57f2:1b9d102563fcab29", + """ + * BJT Differential Pair with Active Current-Mirror Load and Emitter Degeneration + VCC vcc 0 DC 10 + VEE vee 0 DC -10 + VIN1 in1 0 DC 0 + VIN2 in2 0 DC 0 + I1 tail vee DC 1m + R1 e1 tail 1020 + R2 e2 tail 1000 + Q1 out in1 e1 NPN + Q2 n2 in2 e2 NPN + Q3 n2 n2 e3 PNP + Q4 out n2 e4 PNP + R3 e3 vcc 1000 + R4 e4 vcc 1000 + Rload out 0 100k + .MODEL NPN NPN(IS=1e-15 BF=100 VAF=100) + .MODEL PNP PNP(IS=1e-15 BF=100 VAF=100) + .OP + .DC VIN1 -0.2 0.2 0.001 + .MEAS DC vout_0 FIND V(out) AT=0 + .MEAS DC vout_pos1m FIND V(out) AT=0.001 + .MEAS DC vout_neg1m FIND V(out) AT=-0.001 + .MEAS DC gain PARAM='(vout_pos1m - vout_neg1m)/(0.002)' + .MEAS DC tail_i FIND I(I1) AT=0 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "vout_0", (-5.0), 5.0); + AssertMeasurementLess(result, "gain", (-50.0)); + AssertMeasurementNear(result, "tail_i", 0.001, 1e-05); + } + + // Prompt: Build a transimpedance amplifier using an ideal op-amp with gain 1e6, feedback resistor 100k, and 10pF feedback capacitor. Perform DC operating point and AC analysis, then measure the peak gain and the -3 dB bandwidth. + [Fact] + public void Current_to_Voltage_Converter_with_Behavioral_Op_Amp_8c0e5f92659b8adf() + { + var result = RunAcceptedExample( + "deepseek:01507_44d2cb8e3ec14672:8c0e5f92659b8adf", + """ + * Current-to-Voltage Converter with Behavioral Op-Amp + I1 0 vin DC 0 AC 1 + R1 out vin 100k + C1 out vin 10p + E1 out 0 0 vin 1000000 + Vdd vdd 0 DC 15 + .OP + .AC DEC 10 1 100MEG + .MEAS AC max_gain_db MAX VDB(out) + .MEAS AC gain_at_1Hz FIND VDB(out) AT=1 + .MEAS AC bw WHEN VM(out)=70.71k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "max_gain_db", 100.0, 1.0); + AssertMeasurementNear(result, "gain_at_1Hz", 100.0, 1.0); + AssertMeasurementBetween(result, "bw", 150000.0, 170000.0); + } + + // Prompt: Track-and-hold buffer using a voltage-controlled switch to sample a 1kHz sine input onto a hold capacitor. + [Fact] + public void Track_and_hold_buffer_with_sampling_capacitor_a7fafa710aa4b41b() + { + var result = RunAcceptedExample( + "deepseek:02244_13c278a09c7a5088:a7fafa710aa4b41b", + """ + * Track-and-hold buffer with sampling capacitor + VIN in 0 SIN(0 1 1k) + VS ctrl 0 PULSE(0 5 0 1n 1n 0.24m 1m) + R1 in n1 100 + S1 n1 hold ctrl 0 swmod + Chold hold 0 1nF + Cin hold 0 2pF + Ebuf out 0 hold 0 1.0 + Rload out 0 100k + .model swmod SW(RON=10 ROFF=10MEG VT=2 VH=0.5) + .tran 0.1u 2m + .meas tran v_track_max MAX V(out) FROM=0 TO=0.24m + .meas tran v_hold1 FIND V(out) AT=1m + .meas tran droop PARAM='v_track_max - v_hold1' + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "v_track_max", 0.997, 0.02); + AssertMeasurementNear(result, "v_hold1", 0.925, 0.02); + AssertMeasurementBetween(result, "droop", 0.06, 0.09); + } + + // Prompt: NMOS common-source amplifier with diode-connected PMOS load + [Fact] + public void NMOS_common_source_amplifier_with_diode_connected_load_383c11da2bba6385() + { + var result = RunAcceptedExample( + "deepseek:01204_2cb18e919e1f10a4:383c11da2bba6385", + """ + * NMOS common-source amplifier with diode-connected load + VDD VDD 0 DC 3.3 + VIN in 0 DC 1.5 AC 1 + M1 out in 0 0 nmod W=10u L=0.5u + M2 out out VDD VDD pmod W=10u L=0.5u + CLOAD out 0 1p + .MODEL nmod NMOS (KP=100u VTO=0.7 LAMBDA=0.02) + .MODEL pmod PMOS (KP=50u VTO=-0.7 LAMBDA=0.02) + .OP + .DC VIN 1.5 1.5 0.01 + .AC DEC 10 1 10G + .MEAS DC vout_dc FIND V(out) AT=1.5 + .MEAS AC gain_1k FIND VDB(out) AT=1k + .MEAS AC bw WHEN VDB(out)=0 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "vout_dc", 1.2, 1.8); + AssertMeasurementBetween(result, "gain_1k", 0.0, 10.0); + AssertMeasurementBetween(result, "bw", 100000000.0, 300000000.0); + } + + // Prompt: Zener diode D1 provides a stable reference voltage of ~5.6V at its cathode. + [Fact] + public void Zener_reference_buffered_by_emitter_follower_662a80f52a5f9164() + { + var result = RunAcceptedExample( + "deepseek:00849_3cc395b2f0005eb5:662a80f52a5f9164", + """ + * Zener reference buffered by emitter follower + Vcc vcc 0 DC 10 + R1 vcc zener_c 1k + D1 0 zener_c d_zener + Q1 vcc zener_c out q_npn + Rload out 0 10k + .MODEL d_zener D(IS=1e-12 RS=1 BV=5.6 IBV=5e-3) + .MODEL q_npn NPN(IS=1e-15 BF=100 VAF=50) + .OP + .DC Vcc 7 15 0.1 + .MEAS DC out_at_10 FIND V(out) AT=10 + .MEAS DC out_at_7 FIND V(out) AT=7 + .MEAS DC out_at_15 FIND V(out) AT=15 + .MEAS DC line_reg PARAM='(out_at_15-out_at_7)*1e6/8' + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "out_at_10", 4.7, 5.2); + AssertMeasurementLess(result, "line_reg", 30000.0); + } + + // Prompt: CMOS transmission gate sample-and-hold with NMOS and PMOS switch + [Fact] + public void CMOS_Transmission_Gate_Sample_and_Hold_664c9d86f20cdb38() + { + var result = RunAcceptedExample( + "deepseek:01351_0886c68dcb6bbdc5:664c9d86f20cdb38", + """ + * CMOS Transmission Gate Sample and Hold + VDD vdd 0 DC 5 + VSIG in 0 SIN(2.5 1 1k) + VCTRL ctrl 0 PULSE(0 5 0 1n 1n 1u 2u) + VCTRLB ctrlb 0 PULSE(5 0 0 1n 1n 1u 2u) + Mn out in ctrl 0 nmos W=1u L=0.35u + Mp out in ctrlb vdd pmos W=2u L=0.35u + Ch out 0 100pF + Rbig out 0 1e12 + .MODEL nmos NMOS (VTO=1 KP=100u LAMBDA=0.02) + .MODEL pmos PMOS (VTO=-1 KP=50u LAMBDA=0.02) + .TRAN 0.01u 10u + .MEAS TRAN vhold1 FIND V(out) AT=1.5u + .MEAS TRAN vhold2 FIND V(out) AT=3.5u + .MEAS TRAN vin1 FIND V(in) AT=1u + .MEAS TRAN vin2 FIND V(in) AT=3u + .MEAS TRAN diff1 PARAM='ABS(vhold1 - vin1)' + .MEAS TRAN diff2 PARAM='ABS(vhold2 - vin2)' + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementLess(result, "diff1", 0.2); + AssertMeasurementLess(result, "diff2", 0.2); + AssertMeasurementBetween(result, "vhold1", 1.5, 3.5); + AssertMeasurementBetween(result, "vhold2", 1.5, 3.5); + } + + // Prompt: Design a simple first-order RC low-pass filter using a 1k\u03a9 resistor and a 1\xb5F capacitor. Perform an AC analysis to determine the -3 dB cutoff frequency. + [Fact] + public void First_Order_RC_Low_Pass_Filter_dc2244f52f9359a8() + { + var result = RunAcceptedExample( + "deepseek:00058_a8ffe3b75db60b91:dc2244f52f9359a8", + """ + * First-Order RC Low-Pass Filter + R1 in out 1k + C1 out 0 1u + Vin in 0 AC 1 + .AC DEC 100 1 10k + .MEAS AC gain_dc MAX V(out) + .MEAS AC f3db WHEN VDB(out)=-3 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "gain_dc", 1.0, 0.01); + AssertMeasurementBetween(result, "f3db", 150.0, 170.0); + } + + // Prompt: Class-A emitter follower with single NPN BJT, biased via resistive divider, AC coupled input and output. + [Fact] + public void BJT_Class_A_Audio_Output_Stage_956deebef0dae521() + { + var result = RunAcceptedExample( + "deepseek:00235_aa42c6a53b457e42:956deebef0dae521", + """ + * BJT Class-A Audio Output Stage + VCC VCC 0 DC 12 + VIN IN 0 SIN(0 0.5 1k) AC 1 + CIN IN BASE 10u + R1 VCC BASE 1.8k + R2 BASE 0 5.6k + RE EMITTER 0 91 + COUT EMITTER OUT 1000u + RLOAD OUT 0 8 + Q1 VCC BASE EMITTER npnmod + .MODEL npnmod NPN(IS=1e-14 BF=200 VAF=100) + .OP + .TRAN 1us 5ms + .MEASURE OP Iq FIND I(RE) AT=0 + .MEASURE OP Ve_q FIND V(EMITTER) AT=0 + .MEASURE TRAN Ie_min MIN I(RE) FROM=0 TO=5ms + .MEASURE TRAN Vout_rms RMS V(OUT) FROM=0 TO=5ms + .MEASURE TRAN Vout_peak MAX V(OUT) FROM=0 TO=5ms + .MEASURE TRAN Vout_pp PP V(OUT) FROM=0 TO=5ms + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementGreater(result, "Ie_min", 0.02); + AssertMeasurementNear(result, "Vout_rms", 0.3535, 0.05); + AssertMeasurementGreater(result, "Iq", 0.08); + AssertMeasurementLess(result, "Iq", 0.09); + } + + // Prompt: Design an active peak detector using op-amps, diodes, and a capacitor to capture the peak of a pulse signal and provide a buffered output. + [Fact] + public void Active_Peak_Detector_with_Buffer_04d5b8454fd9c12c() + { + var result = RunAcceptedExample( + "deepseek:00728_7c7cf66d3fd2b6e9:04d5b8454fd9c12c", + """ + * Active Peak Detector with Buffer + VIN in 0 PULSE(0 2 0 1u 1u 1m 2m) + E1 preamp 0 in cap 100000 + D1 preamp cap dmod + C1 cap 0 1u + R1 cap 0 10MEG + E2 out 0 cap 0 1 + .MODEL dmod D(IS=1n RS=1) + .TRAN 1u 5m + .MEAS TRAN peak_out MAX V(out) FROM=0 TO=5m + .MEAS TRAN peak_in MAX V(in) FROM=0 TO=5m + .MEAS TRAN hold_error PARAM='(peak_in - peak_out)/peak_in' + .MEAS TRAN vout_at_4m FIND V(out) AT=4m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "hold_error", 0.0, 0.01); + AssertMeasurementNear(result, "vout_at_4m", 2.0, 0.02); + } + + // Prompt: Non-inverting amplifier with ideal op-amp (gain=100k) and dual \xb115V supplies. + [Fact] + public void Non_Inverting_Op_Amp_Amplifier_with_Input_Bias_Resistor_1b9126d397da20cc() + { + var result = RunAcceptedExample( + "deepseek:01447_9ebaf4836c6702a1:1b9126d397da20cc", + """ + * Non-Inverting Op-Amp Amplifier with Input Bias Resistor + Vplus V+ 0 DC 15 + Vminus V- 0 DC -15 + E1 out 0 n+ n- 100000 + Rf out n- 10k + Rg n- 0 10k + VIN n+ 0 DC 0 AC 1 + Rb n+ 0 100k + .OP + .DC VIN 0 0 1 + .AC DEC 10 1 1e6 + .MEAS DC DC_VOUT FIND V(out) AT=0 + .MEAS AC AC_GAIN FIND VDB(out) AT=1e3 + .MEAS AC AC_GAIN_LIN FIND VM(out) AT=1e3 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "DC_VOUT", 0.0, 0.1); + AssertMeasurementNear(result, "AC_GAIN", 6.02, 0.1); + AssertMeasurementNear(result, "AC_GAIN_LIN", 2.0, 0.05); + } + + // Prompt: MOS current mirror with source degeneration uses source resistors to improve output resistance and reduce current mismatch. + [Fact] + public void MOS_source_degenerated_current_mirror_with_output_current_measurement_helper_b185e0d3143561ce() + { + var result = RunAcceptedExample( + "deepseek:01280_a4ed49ae2b26e323:b185e0d3143561ce", + """ + * MOS source-degenerated current mirror with output current measurement helper + .MODEL nmod NMOS (VTO=1.0 KP=200E-6 LAMBDA=0.02) + VDD vdd 0 DC 5 + Rref vdd d1 10k + M1 d1 d1 s1 0 nmod W=10u L=1u + Rs1 s1 0 500 + Vmeas d2 d2int DC 0 + M2 d2int d1 s2 0 nmod W=10u L=1u + Rs2 s2 0 1k + Vout d2 0 DC 0 + .DC Vout 0 5 0.01 + .MEAS DC Iout FIND I(Vmeas) AT=3 + .MEAS DC Iref FIND I(Rref) AT=3 + .MEAS DC ratio PARAM='Iout/Iref' + .MEAS DC I_high FIND I(Vmeas) AT=3.1 + .MEAS DC I_low FIND I(Vmeas) AT=2.9 + .MEAS DC Rout PARAM='(3.1-2.9)/(I_high - I_low)' + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "Iout", 0.0002425, 2e-05); + AssertMeasurementNear(result, "Iref", 0.0003265, 2e-05); + AssertMeasurementNear(result, "ratio", 0.742, 0.1); + AssertMeasurementGreater(result, "Rout", 200000.0); + } + + // Prompt: Simple RC delay network with R=10k and C=100nF driven by a 5V pulse source. + [Fact] + public void RC_delay_network_driving_high_impedance_load_6c5fe4295887c2c6() + { + var result = RunAcceptedExample( + "deepseek:00035_db209361b4dd95bc:6c5fe4295887c2c6", + """ + * RC delay network driving high impedance load + R1 in out 10k + C1 out 0 100n + VIN in 0 PULSE(0 5 1u 10n 10n 3m 10m) + .TRAN 1u 3m + .MEAS TRAN trise TRIG V(out) VAL=0.5 RISE=1 TARG V(out) VAL=4.5 RISE=1 + .MEAS TRAN tdelay TRIG V(in) VAL=2.5 RISE=1 TARG V(out) VAL=2.5 RISE=1 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "trise", 0.0022, 0.0003); + AssertMeasurementNear(result, "tdelay", 0.00069, 0.0001); + } + + // Prompt: Full-wave bridge rectifier converts 10Vrms 50Hz AC to DC using four diodes. + [Fact] + public void Full_wave_bridge_rectifier_with_filter_capacitor_d1dc9c7a11f8f843() + { + var result = RunAcceptedExample( + "deepseek:00121_8cd8f07ae1b6dd5a:d1dc9c7a11f8f843", + """ + * Full-wave bridge rectifier with filter capacitor + VAC in 0 SIN(0 10 50 0 0 0) + D1 in out Dmod + D2 neg in Dmod + D3 0 out Dmod + D4 neg 0 Dmod + Rload out neg 1k + Cfilter out neg 1000u + .MODEL Dmod D(IS=1e-12 RS=1 CJO=10p) + .TRAN 0.1m 2 + .MEASURE TRAN Vout_avg AVG V(out,neg) FROM=1.5 TO=2 + .MEASURE TRAN Vout_pp PP V(out,neg) FROM=1.5 TO=2 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "Vout_avg", 8.0, 9.0); + AssertMeasurementBetween(result, "Vout_pp", 0.05, 0.15); + } + + // Prompt: Parameterized BJT current mirror using NPN subcircuit + [Fact] + public void Parameterized_BJT_Current_Mirror_with_subcircuit_bdc3ad3432676604() + { + var result = RunAcceptedExample( + "deepseek:02445_16d0db7d8f35e86a:bdc3ad3432676604", + """ + * Parameterized BJT Current Mirror with subcircuit + .PARAM VCC=5 IREF=1m + Vsup VCC 0 DC {VCC} + Iref VCC nb DC {IREF} + Vout out_load 0 DC 2.5 + Vmeas out_load OUT 0V + Xmirror VCC 0 OUT nb CMIRROR + .SUBCKT CMIRROR VCC GND OUT IN + Q1 IN IN GND npn_mod + Q2 OUT IN GND npn_mod + .MODEL npn_mod NPN (IS=1e-14 BF=200 VAF=50) + .ENDS CMIRROR + .OP + .DC Vout 0 5 0.1 + .MEASURE DC Iin_val FIND I(Iref) AT=2.5 + .MEASURE DC Iout_val FIND I(Vmeas) AT=2.5 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementRatioBetween(result, "Iout_val", "Iin_val", 0.95, 1.05); + } + + // Prompt: A 200 Hz sawtooth ramp (0 \u2192 5 V) is generated by a PULSE voltage source with rise time 4.998 ms, fall time 1 \xb5s, pulse width 1 \xb5s, and period 5 ms. + [Fact] + public void Ramp_Comparator_PWM_Generator_98743af5d036a84e() + { + var result = RunAcceptedExample( + "deepseek:01625_cad67fe9e59e0088:98743af5d036a84e", + """ + * Ramp Comparator PWM Generator + Vramp ramp 0 PULSE(0 5 0 4.998m 1u 1u 5m) + Vref ref 0 DC 2.5 + Ecomp out 0 VALUE={LIMIT(1e6*(V(ramp)-V(ref)), 0, 5)} + Rload out 0 1k + .TRAN 0.01u 10m + .MEASURE TRAN period TRIG v(out) VAL=2.5 RISE=1 TARG v(out) VAL=2.5 RISE=2 + .MEASURE TRAN high_time TRIG v(out) VAL=2.5 RISE=1 TARG v(out) VAL=2.5 FALL=1 + .MEASURE TRAN duty PARAM high_time/period + .MEASURE TRAN vout_avg AVG v(out) FROM 0 TO 10m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "period", 0.005, 0.0001); + AssertMeasurementNear(result, "high_time", 0.0025, 0.0002); + AssertMeasurementNear(result, "duty", 0.5, 0.02); + AssertMeasurementBetween(result, "vout_avg", 2.4, 2.6); + } + + // Prompt: Perform an AC analysis on a parallel LC tank with a 50 ohm source resistance. Determine the peak output voltage magnitude. + [Fact] + public void AC_Sweep_of_Parallel_RLC_Tank_e865d606b3a7b770() + { + var result = RunAcceptedExample( + "deepseek:02352_e865d606b3a7b770:e865d606b3a7b770", + """ + * AC Sweep of Parallel RLC Tank + V1 in 0 AC 1 + R1 in out 50 + L1 out 0 10u + C1 out 0 100n + .AC DEC 50 10k 1MEG + .MEAS AC vout_max MAX V(out) + .MEAS AC vout_min MIN V(out) + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementNear(result, "vout_max", 1.0, 0.05); + AssertMeasurementLess(result, "vout_min", 0.1); + } + + // Prompt: Bootstrapped common-emitter amplifier using BJT with bias network R1,R2,R3 and bootstrap capacitor C_BOOT to raise input impedance. + [Fact] + public void Bootstrap_Common_Emitter_Amplifier_c2fec5e60fd561df() + { + var result = RunAcceptedExample( + "deepseek:00912_281dbf49b75cc738:c2fec5e60fd561df", + """ + * Bootstrap Common-Emitter Amplifier + VCC VCC 0 DC 12 + VIN in 0 AC 1 + C_IN in base 1u + R1 VCC bias 110k + R2 bias 0 10k + R3 bias base 10k + C_BOOT emitter bias 100u + R_C VCC collector 1.3k + R_E emitter 0 220 + Q1 collector base emitter NPNN + C_OUT collector out 10u + R_L out 0 10k + .MODEL NPNN NPN(IS=1e-14 BF=200 VAF=100) + .OP + .AC DEC 10 10 100MEG + .MEAS AC gain_at_1k FIND VM(out) AT=1000 + .MEAS AC gain_at_10k FIND VM(out) AT=10000 + .MEAS AC gain_max MAX VM(out) + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "gain_at_1k", 3.0, 6.0); + AssertMeasurementRatioBetween(result, "gain_at_1k", "gain_at_10k", 0.9, 1.1); + } + + // Prompt: Practical differentiator using an ideal op-amp with a series input resistor to limit high-frequency gain. + [Fact] + public void Op_amp_Differentiator_with_Input_Limit_Resistor_c56d6185d38e27ce() + { + var result = RunAcceptedExample( + "deepseek:00350_5907d54627fa350f:c56d6185d38e27ce", + """ + * Op-amp Differentiator with Input Limit Resistor + VIN in 0 DC 0 AC 1 + C1 in n1 0.1uF + R1 n1 inv 100 + R2 inv out 10k + E1 out 0 inv 0 100k + .AC DEC 10 10 100k + .MEAS AC mag_out FIND mag(V(out)) AT=100 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "mag_out", 0.6, 0.65); + } + + // Prompt: Schmitt-trigger RC relaxation oscillator using a high-gain op-amp (E1) with output clamping + [Fact] + public void Schmitt_trigger_RC_relaxation_oscillator_2e0c49cd0a90baae() + { + var result = RunAcceptedExample( + "deepseek:01829_ca5b78fe1c3741d2:2e0c49cd0a90baae", + """ + * Schmitt-trigger RC relaxation oscillator + VDD VDD 0 5 + VSS VSS 0 -5 + E1 out 0 VALUE={LIMIT(1e6 * (V(inp) - V(inn)), -5, 5)} + R1 out inp 10k + R2 inp 0 10k + R3 out inn 100k + C1 inn 0 10nF + .IC V(inn)=0.01 + .TRAN 0.01m 10ms 0 10u + .MEAS TRAN t_period TRIG V(out) VAL=0 RISE=1 TARG V(out) VAL=0 RISE=2 FROM=1ms TO=10ms + .MEAS TRAN freq PARAM 1/t_period + .MEAS TRAN vout_max MAX V(out) FROM 1ms TO 10ms + .MEAS TRAN vout_min MIN V(out) FROM 1ms TO 10ms + .MEAS TRAN vcap_max MAX V(inn) FROM 1ms TO 10ms + .MEAS TRAN vcap_min MIN V(inn) FROM 1ms TO 10ms + .END + """); + + AssertAllMeasurementsSuccessful(result); + var freq = MeasurementValue(result, "freq"); + AssertMeasurementBetween(result, "freq", 400.0, 500.0); + AssertMeasurementGreater(result, "vout_max", 4.5); + AssertMeasurementLess(result, "vout_min", (-4.5)); + AssertMeasurementBetween(result, "vcap_max", 2.0, 3.0); + AssertMeasurementBetween(result, "vcap_min", (-3.0), (-2.0)); + } + + // Prompt: CMOS NOR2 gate with two series PMOS and two parallel NMOS. + [Fact] + public void CMOS_NOR2_gate_transient_response_532b6e4cb82ae7fa() + { + var result = RunAcceptedExample( + "deepseek:00302_0cb1c487da10e296:532b6e4cb82ae7fa", + """ + * CMOS NOR2 gate transient response + VDD VDD 0 DC 3.3 + VIN_A A 0 PULSE(0 3.3 0 0.1n 0.1n 40n 100n) + VIN_B B 0 PULSE(0 3.3 20n 0.1n 0.1n 40n 100n) + M1 net1 A VDD VDD pmos W=8u L=0.25u + M2 Y B net1 net1 pmos W=8u L=0.25u + M3 Y A 0 0 nmos W=4u L=0.25u + M4 Y B 0 0 nmos W=4u L=0.25u + CL Y 0 0.05p + .MODEL nmos NMOS(VTO=0.7 KP=200u LAMBDA=0.02) + .MODEL pmos PMOS(VTO=-0.7 KP=200u LAMBDA=0.02) + .TRAN 0.1n 200n + .MEAS TRAN vmax MAX V(Y) FROM=0 TO=200n + .MEAS TRAN vmin MIN V(Y) FROM=0 TO=200n + .MEAS TRAN tphl TRIG V(A) VAL=1.65 RISE=1 TARG V(Y) VAL=1.65 FALL=1 + .MEAS TRAN tplh TRIG V(B) VAL=1.65 FALL=1 TARG V(Y) VAL=1.65 RISE=1 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementGreater(result, "vmax", 3.0); + AssertMeasurementLess(result, "vmin", 0.3); + AssertMeasurementLess(result, "tphl", 1e-08); + AssertMeasurementLess(result, "tplh", 1e-08); + } + + // Prompt: Design a first-order sigma-delta modulator using an integrator and a comparator. The integrator should be an active RC integrator with an op-amp, and the comparator should use a high-gain amplifier with diode clamping. Include a sample-and-hold driven by a pulse clock to create a discrete-time feedback DAC. Use behavioral E-sources for the op-amps. + [Fact] + public void First_order_sigma_delta_modulator_58f0c51005381b23() + { + var result = RunAcceptedExample( + "deepseek:02229_fd34bd7d9d46ff5a:58f0c51005381b23", + """ + * First-order sigma-delta modulator + VIN in 0 DC 0.3 + R1 in inv 10k + R2 out_dac inv 10k + C1 out_int inv 0.1u + Eint out_int 0 0 inv 100k + Ecomp out_comp_raw 0 out_int 0 1e6 + Vrefp vp 0 DC 1 + Vrefn vn 0 DC -1 + D1 out_comp_raw vp dideal + D2 vn out_comp_raw dideal + .model dideal D(VJ=1e-6) + Vclk clk 0 PULSE(0 5 0 10n 10n 490n 1u) + S1 out_comp_raw hold_node clk 0 SW1 + .model SW1 SW(RON=1 ROFF=1e12 VT=2.5 VH=0.1) + Chold hold_node 0 1p + Ebuf out_buf 0 hold_node 0 1 + Edac out_dac 0 out_buf 0 1 + .TRAN 0.1u 1m + .MEAS TRAN avg_dac AVG V(out_dac) FROM=0.2m TO=1m + .MEAS TRAN avg_in AVG V(in) FROM=0.2m TO=1m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "avg_dac", (-0.4), (-0.2)); + AssertMeasurementNear(result, "avg_in", 0.3, 0.01); + } + + // Prompt: Design a 3rd order Butterworth high-pass LC ladder filter with 50 ohm impedance and 1 kHz cutoff. + [Fact] + public void _3rd_order_Butterworth_High_Pass_LC_Ladder_6581095f3a2d1441() + { + var result = RunAcceptedExample( + "deepseek:00586_6600b204beec1bb6:6581095f3a2d1441", + """ + * 3rd-order Butterworth High-Pass LC Ladder + VIN in 0 AC 1 + Rsource in n1 50 + C1 n1 n2 3.183u + L2 n2 0 3.979m + C3 n2 out 3.183u + Rload out 0 50 + .AC DEC 100 10 100k + .MEAS AC f_3db WHEN VDB(out) = -9.0 + .MEAS AC att100 FIND VDB(out) AT=100 + .MEAS AC gain1k FIND VDB(out) AT=1k + .MEAS AC ripple FIND VDB(out) AT=10k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "f_3db", 950.0, 1050.0); + AssertMeasurementLess(result, "att100", (-30.0)); + AssertMeasurementBetween(result, "gain1k", (-9.5), (-8.5)); + AssertMeasurementBetween(result, "ripple", (-6.5), (-5.5)); + } + + // Prompt: A linear voltage regulator using an NPN pass transistor (Q1) in an emitter-follower configuration. + [Fact] + public void Linear_Voltage_Regulator_with_NPN_Pass_Transistor_and_Zener_Reference_b2dfd4fa885bf0e7() + { + var result = RunAcceptedExample( + "deepseek:02316_a62a4abb3020cb96:b2dfd4fa885bf0e7", + """ + * Linear Voltage Regulator with NPN Pass Transistor and Zener Reference + VIN in 0 DC 12 + R1 in b 470 + Q1 in b out QN + D1 0 b DZ + RL out 0 100 + .MODEL QN NPN(IS=1e-15 BF=100 VAF=50) + .MODEL DZ D(BV=5.6 IBV=1m RS=1) + .OP + .DC VIN 10 15 0.1 + .MEAS DC VOUT FIND V(out) AT=12 + .MEAS DC VOUT_MIN FIND V(out) AT=10 + .MEAS DC VOUT_MAX FIND V(out) AT=15 + .MEAS DC REG_LINE PARAM VOUT_MAX-VOUT_MIN + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "VOUT", 4.7, 5.3); + AssertMeasurementBetween(result, "REG_LINE", 0.0, 0.2); + } + + // Prompt: CMOS two-input NOR gate with 5V supply. + [Fact] + public void CMOS_NOR2_Gate_Transient_Response_1bda726e6408e60c() + { + var result = RunAcceptedExample( + "deepseek:00297_452f8f30210955c5:1bda726e6408e60c", + """ + * CMOS NOR2 Gate Transient Response + VDD VDD 0 5 + VA A 0 PULSE(0 5 10n 0.1n 0.1n 40n 100n) + VB B 0 DC 0 + M1 d1 A VDD VDD pmos W=40u L=2u + M2 OUT_NODE B d1 VDD pmos W=40u L=2u + M3 OUT_NODE A 0 0 nmos W=20u L=2u + M4 OUT_NODE B 0 0 nmos W=20u L=2u + CLOAD OUT_NODE 0 1pF + .MODEL nmos NMOS(LEVEL=1 VTO=1 KP=100u LAMBDA=0.02) + .MODEL pmos PMOS(LEVEL=1 VTO=-1 KP=40u LAMBDA=0.02) + .IC V(OUT_NODE)=5 V(A)=0 V(B)=0 + .TRAN 0.1n 100n UIC + .MEASURE TRAN tphl TRIG V(A) VAL=2.5 RISE=1 TARG V(OUT_NODE) VAL=2.5 FALL=1 + .MEASURE TRAN tplh TRIG V(A) VAL=2.5 FALL=1 TARG V(OUT_NODE) VAL=2.5 RISE=1 + .MEASURE TRAN vout_high FIND V(OUT_NODE) AT=5n + .MEASURE TRAN vout_low FIND V(OUT_NODE) AT=30n + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertMeasurementBetween(result, "tphl", 1e-10, 1e-08); + AssertMeasurementBetween(result, "tplh", 1e-10, 1e-08); + AssertMeasurementGreater(result, "vout_high", 4.5); + AssertMeasurementLess(result, "vout_low", 0.5); + } + + // Prompt: Create a non-inverting op-amp filter with AC analysis to measure gain at different frequencies + [Fact] + public void Non_inverting_op_amp_filter_with_AC_analysis_742a4341aa3151ca() + { + var result = RunAcceptedExample( + "local:00263_b11b208733d880ea:742a4341aa3151ca", + """ + * Non-inverting op-amp filter with AC analysis + VIN in 0 AC 1 + R1 pos in 10k + Rf out pos 10k + C1 out 0 10n + E1 out 0 pos 0 100000 + .AC DEC 100 1 100k + .MEAS AC gain_mag FIND V(out) AT=1 + .MEAS AC gain_10k FIND V(out) AT=10k + .MEAS AC gain_100k FIND V(out) AT=100k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertHasSuccessfulMeasurement(result, null); + } + + // Prompt: Design a first-order RC low-pass filter with -3dB cutoff at 10kHz + [Fact] + public void RC_Low_Pass_Filter_with_AC_Analysis_1e8812e41889774a() + { + var result = RunAcceptedExample( + "local:00230_71dff43e55211471:1e8812e41889774a", + """ + * RC Low-Pass Filter with AC Analysis + R1 in out 1.59k + C1 out 0 1n + VIN in 0 AC 1 + .AC DEC 10 100 1MEG + .MEAS AC dc_gain FIND V(out) AT=100 + .MEAS AC cutoff_gain FIND V(out) AT=10k + .MEAS AC phase_at_10k FIND VP(out) AT=10k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertHasSuccessfulMeasurement(result, null); + } + + // Prompt: Series pass linear regulator with op-amp error amplifier for precise voltage regulation + [Fact] + public void Series_Pass_Linear_Regulator_with_Op_Amp_Error_Amplifier_8fca304b46b2468c() + { + var result = RunAcceptedExample( + "local:00250_cbf7d041c7167707:8fca304b46b2468c", + """ + * Series Pass Linear Regulator with Op-Amp Error Amplifier + VIN in 0 DC 15 + VREF ref 0 DC 2.5 + R1 out fb 10k + R2 fb 0 10k + E1 opout 0 ref fb 100000 + Q1 in opout out qn + RL out 0 100 + .MODEL qn NPN(IS=1e-15 BF=100 VAF=100) + .OP + .DC VIN 10 20 0.1 + .MEAS OP vout FIND V(out) AT=15 + .MEAS DC vout10 FIND V(out) AT=10 + .MEAS DC vout20 FIND V(out) AT=20 + .MEAS DC linereg PARAM='(vout20 - vout10)/10' + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertHasSuccessfulMeasurement(result, null); + } + + // Prompt: Op-amp with input offset and negative feedback resistor network + [Fact] + public void Op_Amp_with_Negative_Feedback_b2454fa0692ee835() + { + var result = RunAcceptedExample( + "local:00165_16879559a101df44:b2454fa0692ee835", + """ + * Op-Amp with Negative Feedback + VIN in 0 DC 0.01 AC 1 + R1 neg 0 10k + Rf out neg 90k + E1 out 0 in neg 100000 + .OP + .AC DEC 10 1 100k + .MEAS AC gain_db FIND VDB(out) AT=1k + .MEAS AC phase FIND VP(out) AT=1k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertHasSuccessfulMeasurement(result, null); + } + + // Prompt: Input limit resistor prevents high-frequency oscillation + [Fact] + public void Op_amp_differentiator_with_input_limit_resistor_for_stability_9ca4cb151a1177b6() + { + var result = RunAcceptedExample( + "local:00050_d3c4b5885866ac1e:9ca4cb151a1177b6", + """ + * Op-amp differentiator with input limit resistor for stability + VIN in 0 SIN(0 1 1k) + Rlim in n1 1k + R1 n1 inv 10k + C1 out inv 0.1u + E1 out 0 n1 inv 100000 + .OP + .AC DEC 10 10 100k + .MEAS AC vm_1k FIND VM(out) AT=1k + .MEAS AC vm_10k FIND VM(out) AT=10k + .MEAS AC vm_100k FIND VM(out) AT=100k + .MEAS AC vp_1k FIND VP(out) AT=1k + .MEAS AC vp_10k FIND VP(out) AT=10k + .TRAN 0.1u 5m + .MEAS TRAN vmax MAX V(out) FROM=1m TO=5m + .MEAS TRAN vmin MIN V(out) FROM=1m TO=5m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertHasSuccessfulMeasurement(result, null); + } + + // Prompt: Op-amp buffer configuration with high gain (100k) for input buffering + [Fact] + public void Op_Amp_Sample_and_Hold_with_Ideal_Switch_374400ccf38301a0() + { + var result = RunAcceptedExample( + "local:00212_3d6363668c92ae6e:374400ccf38301a0", + """ + * Op-Amp Sample-and-Hold with Ideal Switch + VIN in 0 PULSE(0 5 0 1n 1n 1u 2u) + VCTRL ctrl 0 PULSE(0 5 0.5u 1n 1n 1u 2u) + VRESET reset 0 PULSE(0 5 0 1n 1n 10n 2u) + E1 out 0 in inv 100000 + Rf out inv 10k + R1 in inv 10k + S1 out cap ctrl 0 swmod + S2 cap 0 reset 0 swmod + C cap 0 1n + Rleak cap 0 100MEG + .MODEL swmod SW(RON=10 ROFF=100MEG VT=2 VH=0.5) + .TRAN 1n 5u + .MEAS TRAN vout_sample FIND V(out) AT=0.6u + .MEAS TRAN vout_hold FIND V(out) AT=1.5u + .MEAS TRAN vout_reset FIND V(out) AT=0.1u + .MEAS TRAN vmax MAX V(out) FROM=0.5u TO=2u + .MEAS TRAN vmin MIN V(out) FROM=0.5u TO=2u + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertHasSuccessfulMeasurement(result, null); + } + + // Prompt: Design a first-order RC low-pass filter with cutoff frequency around 1.6 kHz, buffered by an op-amp for high input impedance. + [Fact] + public void RC_low_pass_filter_with_op_amp_buffer_c4d9b1d9c180ae12() + { + var result = RunAcceptedExample( + "local:00183_a3201354efa9c6dc:c4d9b1d9c180ae12", + """ + * RC low-pass filter with op-amp buffer + VIN in 0 DC 0 AC 1 + R1 in n1 10k + C1 n1 0 10n + E1 out 0 n1 out 100000 + RL out 0 10k + .AC DEC 100 1 100k + .MEAS AC gain_dc FIND VDB(out) AT=1 + .MEAS AC gain_1k FIND VDB(out) AT=1k + .MEAS AC gain_10k FIND VDB(out) AT=10k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertHasSuccessfulMeasurement(result, null); + } + + // Prompt: Long-tailed pair differential amplifier + [Fact] + public void Long_tailed_pair_with_resistive_collector_loads_52a7fd0b06c2e09b() + { + var result = RunAcceptedExample( + "local:00134_79637cd1f936de9c:52a7fd0b06c2e09b", + """ + * Long-tailed pair with resistive collector loads + VCC vcc 0 DC 10 + I1 tail 0 DC 1m + Q1 v1 in+ tail npn_mod + Q2 v2 in- tail npn_mod + RC1 vcc v1 10k + RC2 vcc v2 10k + RLOAD1 v1 out 10k + VIN in+ in- DC 0 AC 1 + .MODEL npn_mod NPN(IS=1e-15 BF=100 VAF=100) + .OP + .AC DEC 10 1 1MEG + .MEAS OP vout FIND V(out) AT=0 + .MEAS AC gain FIND VM(out) AT=1k + .MEAS OP i_tail FIND I(I1) AT=0 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertHasSuccessfulMeasurement(result, null); + } + + // Prompt: Bandgap reference with PTAT current and VBE subtraction + [Fact] + public void BJT_Bandgap_Reference_Core_56842094d6ef72aa() + { + var result = RunAcceptedExample( + "local:00146_0469a5abee19c7f7:56842094d6ef72aa", + """ + * BJT Bandgap Reference Core + VCC vcc 0 DC 5 + R1 vcc qb 100k + Q1 qb q1e 0 nmod + Q2 q1e q2e 0 nmod + R2 q2e 0 20k + R3 qb q3c 10k + Q3 q3c q3e 0 nmod + R4 q3e 0 10k + R5 q3e out 10k + R6 out q1e 10k + .MODEL nmod NPN(IS=1e-15 BF=100 VAF=100) + .OP + .DC VCC 0 10 0.1 + .MEAS DC vref FIND V(out) AT=5 + .MEAS DC vmin MIN V(out) FROM=2 TO=8 + .MEAS DC vmax MAX V(out) FROM=2 TO=8 + .MEAS DC vref_slope PARAM='(vmax-vmin)/6' + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertHasSuccessfulMeasurement(result, null); + } + + // Prompt: Op-amp subtractor with matched resistor ratios for accurate differential amplification + [Fact] + public void Op_Amp_Subtractor_with_Matched_Resistors_2126b3f3b02f669a() + { + var result = RunAcceptedExample( + "local:00198_5e61572e0660e7a0:2126b3f3b02f669a", + """ + * Op-Amp Subtractor with Matched Resistors + VIN1 in1 0 DC 1 + VIN2 in2 0 DC 2 + R1 in1 neg 10k + R2 out neg 100k + R3 in2 pos 10k + R4 pos 0 100k + E1 out 0 pos neg 100000 + .OP + .AC DEC 10 1 1MEG + .MEAS AC vout_ac FIND V(out) AT=1k + .MEAS AC gain_ac FIND VM(out) AT=1k + .MEAS AC phase_ac FIND VP(out) AT=1k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertHasSuccessfulMeasurement(result, null); + } + + // Prompt: Simple DC-DC buck converter + [Fact] + public void Buck_Converter_Topology_cc0ca91485108307() + { + var result = RunAcceptedExample( + "local:00137_b18f96bda85fd016:cc0ca91485108307", + """ + * Buck Converter Topology + VIN vin 0 DC 12 + VCTRL ctrl 0 PULSE(0 5 0 10n 10n 0.5u 1u) + S1 vin sw ctrl 0 swmod + D1 0 sw dm + L1 sw out 100u + C1 out 0 100u + RLOAD out 0 10 + .MODEL swmod SW(RON=0.1 ROFF=100MEG VT=5 VH=0.5) + .MODEL dm D(IS=1n RS=0.1) + .TRAN 1u 5m + .MEAS TRAN VOUT_AVG AVG V(out) FROM=3m TO=5m + .MEAS TRAN RIPPLE PP V(out) FROM=3m TO=5m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertHasSuccessfulMeasurement(result, null); + } + + // Prompt: PULSE source with negative excursion to test clamp + [Fact] + public void Diode_Clamp_to_Negative_Rail_Transient_Analysis_36324c6777271003() + { + var result = RunAcceptedExample( + "local:00156_ac064360d30feecb:36324c6777271003", + """ + * Diode Clamp to Negative Rail - Transient Analysis + VIN in 0 PULSE(-10 0 0 10n 10n 50u 100u) + R1 in out 1k + D1 out neg dmod + VNEG neg 0 DC -5 + .MODEL dmod D(IS=1n RS=1) + .TRAN 1u 200u + .MEAS TRAN vmax MAX V(out) FROM=10u TO=200u + .MEAS TRAN vmin MIN V(out) FROM=10u TO=200u + .MEAS TRAN vavg AVG V(out) FROM=10u TO=200u + .MEAS TRAN vclamp FIND V(out) AT=50u + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertHasSuccessfulMeasurement(result, null); + } + + // Prompt: Phase splitter with split collector and emitter loads + [Fact] + public void BJT_Phase_Splitter_with_Split_Collector_and_Emitter_Loads_0ef5d26153c1bbd6() + { + var result = RunAcceptedExample( + "local:00133_4bfe7f03e5dd0fc7:0ef5d26153c1bbd6", + """ + * BJT Phase Splitter with Split Collector and Emitter Loads + VCC vcc 0 DC 12 + VIN in 0 DC 0 AC 1 + Cin in base 10u + R1 vcc base 68k + R2 base 0 33k + Q1 vcc base out_q1 0 NPN_MOD + Re out_q1 out 1k + Rc vcc out_q2 10k + Rload2 out_q2 0 10k + .MODEL NPN_MOD NPN(IS=1e-15 BF=100 VAF=50) + .OP + .AC DEC 10 10 100k + .MEAS AC vout_mag FIND VM(out) AT=1k + .MEAS AC vout_q1_mag FIND VM(out_q1) AT=1k + .MEAS AC phase_diff FIND VP(out) - VP(out_q1) AT=1k + .MEAS AC vout_q2_mag FIND VM(out_q2) AT=1k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertHasSuccessfulMeasurement(result, null); + } + + // Prompt: Input sine wave of 10V peak is clipped to approximately +/-0.7V by anti-parallel diodes + [Fact] + public void Symmetric_Diode_Clipper_with_Input_Protection_a9d4cc47af78f0b2() + { + var result = RunAcceptedExample( + "local:00020_3d165ba946a2f3a3:a9d4cc47af78f0b2", + """ + * Symmetric Diode Clipper with Input Protection + VIN in 0 SIN(0 10 1k) + D1 in out dmod + D2 out in dmod + Rload out 0 1k + .MODEL dmod D(IS=1n RS=1) + .TRAN 1u 10m + .MEAS TRAN vmax MAX V(out) FROM=1m TO=10m + .MEAS TRAN vmin MIN V(out) FROM=1m TO=10m + .MEAS TRAN vpp PARAM vmax - vmin + .MEAS TRAN vavg AVG V(out) FROM=1m TO=10m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertHasSuccessfulMeasurement(result, null); + } + + // Prompt: Design a voltage divider to reduce 10V to 5V with 10k and 10k resistors + [Fact] + public void Voltage_Divider_with_Load_Measurement_8f480412a21bdb8e() + { + var result = RunAcceptedExample( + "local:00099_d167b433c4c3135e:8f480412a21bdb8e", + """ + * Voltage Divider with Load Measurement + V1 in 0 DC 10 + R1 in out 10k + R2 out 0 10k + RL out 0 10k + .OP + .DC V1 10 10 1 + .MEAS DC Vout FIND V(out) AT=10 + .MEAS DC I_R1 FIND I(R1) AT=10 + .MEAS DC I_R2 FIND I(R2) AT=10 + .MEAS DC I_RL FIND I(RL) AT=10 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertHasSuccessfulMeasurement(result, null); + } + + // Prompt: Series pass linear regulator with op-amp error amplifier + [Fact] + public void Linear_series_pass_voltage_regulator_with_op_amp_error_amplifier_050107f9c3e7f7b4() + { + var result = RunAcceptedExample( + "local:00228_3621ac4d61fa0ac4:050107f9c3e7f7b4", + """ + * Linear series pass voltage regulator with op-amp error amplifier + VIN in 0 DC 12 + VREF ref 0 DC 2.5 + R1 out fb 10k + R2 fb 0 10k + E1 opout 0 ref fb 100000 + Rbase opout q1_base 100 + Q1 in q1_base out NPN + Rload out 0 100 + Cout out 0 100u + .MODEL NPN NPN(IS=1e-15 BF=100 VAF=100) + .OP + .DC VIN 10 15 0.1 + .MEAS DC vout_nom FIND V(out) AT=12 + .MEAS DC vout_min MIN V(out) FROM=10 TO=15 + .MEAS DC vout_max MAX V(out) FROM=10 TO=15 + .MEAS DC line_reg PARAM=(vout_max - vout_min) + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertHasSuccessfulMeasurement(result, null); + } + + // Prompt: Charge pump voltage doubler using diode steering and pumping capacitors + [Fact] + public void Charge_Pump_Voltage_Doubler_with_Diode_Steering_110cfd71afc10532() + { + var result = RunAcceptedExample( + "local:00308_1ccff1e5a1ca996b:110cfd71afc10532", + """ + * Charge Pump Voltage Doubler with Diode Steering + VIN in 0 DC 5 + VCLK clk 0 PULSE(0 5 0 1n 1n 1u 2u) + D1 in n1 DMOD + D2 n1 out DMOD + C1 n1 0 1u + C2 out 0 1u + Rload out 0 100k + .MODEL DMOD D(IS=1n RS=1) + .TRAN 0.1u 100u + .MEAS TRAN vout_avg AVG V(out) FROM=5u TO=100u + .MEAS TRAN vmax MAX V(out) FROM=5u TO=100u + .MEAS TRAN vmin MIN V(out) FROM=5u TO=100u + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertHasSuccessfulMeasurement(result, null); + } + + // Prompt: AC analysis of parallel LC resonant circuit + [Fact] + public void AC_sweep_of_parallel_LC_resonant_tank_d5a42a27d4361f85() + { + var result = RunAcceptedExample( + "local:00310_8fe59ad928c11d15:d5a42a27d4361f85", + """ + * AC sweep of parallel LC resonant tank + VIN in 0 AC 1 + L1 in 1 100u + C1 1 0 10n + R1 1 0 1 + .AC DEC 10 100 1MEG + .MEAS AC vmax MAX VM(1) + .MEAS AC vmin MIN VM(1) + .MEAS AC v_at_f0 FIND VM(1) AT=159150 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertHasSuccessfulMeasurement(result, null); + } + + // Prompt: Series LC branch creates impedance minimum at resonance + [Fact] + public void RLC_Series_Notch_Filter_1fe828f5801a25aa() + { + var result = RunAcceptedExample( + "local:00013_4abb4897cbb2047f:1fe828f5801a25aa", + """ + * RLC Series Notch Filter + VIN in 0 AC 1 + R1 in out 100 + L1 out mid 10m + C1 mid 0 100n + Rload out 0 1k + .AC DEC 100 10 100k + .MEAS AC vout_notch FIND VDB(out) AT=1000 + .MEAS AC vout_low FIND VDB(out) AT=100 + .MEAS AC vout_high FIND VDB(out) AT=10k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertHasSuccessfulMeasurement(result, null); + } + + // Prompt: Op-amp voltage follower with input resistor for impedance matching + [Fact] + public void Op_amp_voltage_follower_with_input_resistor_cacc5872d17ea035() + { + var result = RunAcceptedExample( + "local:00047_1d081fe90f70e705:cacc5872d17ea035", + """ + * Op-amp voltage follower with input resistor + VIN in 0 DC 1 AC 1 + R1 in buf_in 1k + E1 out 0 buf_in 0 100000 + Rf out buf_in 10k + RL out 0 1k + .AC DEC 10 1 1MEG + .MEAS AC gain_db FIND VDB(out) AT=1k + .MEAS AC phase FIND VP(out) AT=1k + .MEAS AC vout_mag FIND VM(out) AT=1k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertHasSuccessfulMeasurement(result, null); + } + + // Prompt: Current-to-voltage converter for sensor interface + [Fact] + public void Transimpedance_amplifier_for_sensor_interface_5b9e38df8a43793b() + { + var result = RunAcceptedExample( + "local:00203_a8052ed39ef09d80:5b9e38df8a43793b", + """ + * Transimpedance amplifier for sensor interface + .OP + .AC DEC 10 10 100k + I1 in 0 DC 100u AC 1 + Rf out in 10k + E1 out 0 in neg 100000 + Rload out 0 10k + Rneg neg 0 1MEG + Vneg neg 0 DC -15 + Vpos in 0 DC 15 + .MEAS OP vout FIND V(out) AT=0 + .MEAS AC gain FIND VM(out) AT=1k + .MEAS AC gain10 FIND VM(out) AT=10k + .MEAS AC gain100 FIND VM(out) AT=100k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertHasSuccessfulMeasurement(result, null); + } + + // Prompt: Voltage follower with input offset voltage + [Fact] + public void Op_amp_buffer_with_input_offset_voltage_abdb3f918ed8bfb7() + { + var result = RunAcceptedExample( + "local:00055_853cb48f72660556:abdb3f918ed8bfb7", + """ + * Op-amp buffer with input offset voltage + E1 out 0 in+ in- 100000 + VOS in+ 0 DC 10m + Rf out in- 10k + R1 in+ 0 100k + RL out 0 10k + .OP + .AC DEC 10 1 1MEG + .TRAN 1u 10m + .MEAS DC vout_dc FIND V(out) AT=1 + .MEAS AC gain_mag FIND VM(out) AT=1k + .MEAS TRAN vout_max MAX V(out) FROM=1m TO=10m + .MEAS TRAN vout_min MIN V(out) FROM=1m TO=10m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertHasSuccessfulMeasurement(result, null); + } + + // Prompt: Design a BJT current sink with emitter resistor for load regulation + [Fact] + public void BJT_Current_Sink_with_Emitter_Resistor_12d1418f775f10a9() + { + var result = RunAcceptedExample( + "local:00141_334bf60eb66b90db:12d1418f775f10a9", + """ + * BJT Current Sink with Emitter Resistor + VCC vcc 0 DC 12 + VB base 0 DC 5 + Q1 vcc base out qn + RE out 0 1k + .MODEL qn NPN(IS=1e-15 BF=100 VAF=100) + .OP + .DC VB 0 10 0.1 + .MEAS OP Iout FIND I(RE) AT=5 + .MEAS DC Imin MIN I(RE) + .MEAS DC Imax MAX I(RE) + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertHasSuccessfulMeasurement(result, null); + } + + // Prompt: Simple diode clamp circuit that shifts AC input to positive DC level + [Fact] + public void Diode_Clamp_to_Positive_Rail_e19a8cf3579d57c9() + { + var result = RunAcceptedExample( + "local:00102_2f76deb98ac747ce:e19a8cf3579d57c9", + """ + * Diode Clamp to Positive Rail + .MODEL dmod D(IS=1n RS=1) + R1 out 0 10k + D1 in out dmod + VIN in 0 PULSE(0 5 0 1n 1n 1u 2u) + .TRAN 0.1u 5m + .MEAS TRAN vmax MAX V(out) + .MEAS TRAN vmin MIN V(out) + .MEAS TRAN vavg AVG V(out) + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertHasSuccessfulMeasurement(result, null); + } + + // Prompt: Twin-T passive notch filter with R=10k, C1=0.01uF, C2=0.005uF + [Fact] + public void Twin_T_notch_filter_with_ground_reference_2a517c865680a293() + { + var result = RunAcceptedExample( + "local:00014_841c3b889cb97e9c:2a517c865680a293", + """ + * Twin-T notch filter with ground reference + VIN in 0 AC 1 + R1 in n1 10k + R2 n1 out 10k + C1 n1 0 0.01u + C2 in n2 0.005u + C3 n2 out 0.005u + R3 n2 0 10k + .AC DEC 100 10 100k + .MEAS AC vout_low FIND VM(out) AT=100 + .MEAS AC vout_high FIND VM(out) AT=100k + .MEAS AC vout_notch FIND VM(out) AT=1590 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertHasSuccessfulMeasurement(result, null); + } + + // Prompt: Four-diode voltage quadrupler with input AC 10V peak sine + [Fact] + public void Greinacher_voltage_quadrupler_4d744d1231b5f391() + { + var result = RunAcceptedExample( + "local:00120_d37d61f1c639405c:4d744d1231b5f391", + """ + * Greinacher voltage quadrupler + VIN in 0 SIN(0 10 1k) + D1 in n1 dmod + C1 n1 0 10u + D2 n1 n2 dmod + C2 n2 0 10u + D3 n2 in dmod + C3 in n3 10u + D4 n3 n2 dmod + C4 n2 out 10u + Rload out 0 100k + .MODEL dmod D(IS=1n RS=1 BV=100) + .TRAN 1u 10m + .MEAS TRAN vout_avg AVG V(out) FROM=5m TO=10m + .MEAS TRAN vout_ripple PP V(out) FROM=5m TO=10m + .MEAS TRAN vout_max MAX V(out) FROM=5m TO=10m + .MEAS TRAN vout_min MIN V(out) FROM=5m TO=10m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertHasSuccessfulMeasurement(result, null); + } + + // Prompt: Third-order LC high-pass ladder filter with series capacitors and shunt inductor + [Fact] + public void _3rd_order_LC_high_pass_ladder_filter_643e382631963f83() + { + var result = RunAcceptedExample( + "local:00080_5e9c19ad6b8e6630:643e382631963f83", + """ + * 3rd-order LC high-pass ladder filter + VIN in 0 AC 1 + Rsource in n1 50 + C1 n1 n2 10n + L2 n2 0 100u + C3 n2 out 10n + Rload out 0 50 + .AC DEC 100 10 1MEG + .MEAS AC v100 FIND V(out) AT=100 + .MEAS AC v1k FIND V(out) AT=1k + .MEAS AC v10k FIND V(out) AT=10k + .MEAS AC v100k FIND V(out) AT=100k + .MEAS AC gain_100 PARAM v100 + .MEAS AC gain_1k PARAM v1k + .MEAS AC gain_10k PARAM v10k + .MEAS AC gain_100k PARAM v100k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertHasSuccessfulMeasurement(result, null); + } + + // Prompt: Three-section RC phase-shift network for frequency-dependent phase measurement + [Fact] + public void Three_section_RC_phase_shift_network_7f8a86640594a7db() + { + var result = RunAcceptedExample( + "local:00007_a963c45bebbca78d:7f8a86640594a7db", + """ + * Three-section RC phase-shift network + VIN in 0 AC 1 + R1 in n1 10k + C1 n1 0 0.1u + R2 n1 n2 10k + C2 n2 0 0.1u + R3 n2 out 10k + C3 out 0 0.1u + .AC DEC 10 10 100k + .MEAS AC phase_100 FIND VP(out) AT=100 + .MEAS AC phase_1000 FIND VP(out) AT=1000 + .MEAS AC phase_10000 FIND VP(out) AT=10000 + .MEAS AC mag_100 FIND VM(out) AT=100 + .MEAS AC mag_1000 FIND VM(out) AT=1000 + .MEAS AC mag_10000 FIND VM(out) AT=10000 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertHasSuccessfulMeasurement(result, null); + } + + // Prompt: Non-inverting amplifier with behavioral op-amp + [Fact] + public void Non_inverting_amplifier_with_behavioral_op_amp_30e2323830b7ca9e() + { + var result = RunAcceptedExample( + "local:00245_1776ba338f0d1335:30e2323830b7ca9e", + """ + * Non-inverting amplifier with behavioral op-amp + VIN in 0 DC 1 + R1 in nminus 10k + Rf nplus out 90k + E1 out 0 nplus nminus 100000 + Rload out 0 10k + .OP + .MEAS OP VOUT FIND V(out) AT=0 + .MEAS OP VINP FIND V(nplus) AT=0 + .MEAS OP VINM FIND V(nminus) AT=0 + .MEAS OP VDIFF FIND V(nplus)-V(nminus) AT=0 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertHasSuccessfulMeasurement(result, null); + } + + // Prompt: Two-pole passive RC ladder low-pass filter with three RC sections + [Fact] + public void Two_pole_RC_ladder_low_pass_filter_4d52da146bb45955() + { + var result = RunAcceptedExample( + "local:00006_eb35032d4d1dbadd:4d52da146bb45955", + """ + * Two-pole RC ladder low-pass filter + VIN in 0 AC 1 + R1 in n1 10k + C1 n1 0 1n + R2 n1 n2 10k + C2 n2 0 1n + R3 n2 out 10k + .AC DEC 100 100 1MEG + .MEAS AC gain10 FIND VM(out) AT=10 + .MEAS AC gain1k FIND VM(out) AT=1k + .MEAS AC gain100k FIND VM(out) AT=100k + .MEAS AC f3db WHEN VM(out)=0.707 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertHasSuccessfulMeasurement(result, null); + } + + // Prompt: Cascode BJT current mirror with four transistors for high output impedance + [Fact] + public void Cascode_BJT_Current_Mirror_9d4a4b8980e8fccd() + { + var result = RunAcceptedExample( + "local:00139_ff32c5d814b40bf0:9d4a4b8980e8fccd", + """ + * Cascode BJT Current Mirror + VCC vcc 0 DC 10 + IREF vcc ref 1m + R1 ref base1 10k + Q1 out1 base1 0 qn + Q2 vcc out1 base1 qn + Q3 out2 base2 0 qn + Q4 vcc out2 base2 qn + VOUT vcc out 0 + ILOAD out 0 DC 1m + .MODEL qn NPN(IS=1e-15 BF=100 VAF=100) + .OP + .DC ILOAD 1m 10m 0.1m + .MEAS OP vout FIND V(out) AT=1m + .MEAS DC iout FIND I(ILOAD) AT=1m + .MEAS DC vout FIND V(out) AT=1m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertHasSuccessfulMeasurement(result, null); + } + + // Prompt: Op-amp voltage follower with input DC source and load resistor + [Fact] + public void Op_Amp_Voltage_Follower_0b8573719a2f9d0e() + { + var result = RunAcceptedExample( + "local:00262_46cd6a8fd01eb1d6:0b8573719a2f9d0e", + """ + * Op-Amp Voltage Follower + VIN in 0 DC 1 + E1 out 0 in out 100000 + RL out 0 10k + .OP + .DC VIN 0 1 0.01 + .MEAS DC VOUT FIND V(out) AT=1 + .MEAS DC VOUT_MIN MIN V(out) + .MEAS DC VOUT_MAX MAX V(out) + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertHasSuccessfulMeasurement(result, null); + } + + // Prompt: Non-inverting op-amp amplifier with gain of 10 + [Fact] + public void Non_inverting_op_amp_amplifier_76ac431736c0d77a() + { + var result = RunAcceptedExample( + "local:00263_05d96159173acecc:76ac431736c0d77a", + """ + * Non-inverting op-amp amplifier + VIN in 0 DC 0.1 AC 1 + R1 neg 0 1k + R2 out neg 9k + E1 out 0 in neg 100000 + .OP + .AC DEC 10 10 100k + .MEAS AC GAIN_DB FIND VDB(out) AT=1k + .MEAS AC PHASE FIND VP(out) AT=1k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertHasSuccessfulMeasurement(result, null); + } + + // Prompt: Diode peak detector with op-amp buffer + [Fact] + public void Diode_peak_detector_with_op_amp_buffer_c548e7d5ab158324() + { + var result = RunAcceptedExample( + "local:00265_89efde0cb37d2e80:c548e7d5ab158324", + """ + * Diode peak detector with op-amp buffer + VIN in 0 SIN(0 2 1k) + D1 in n1 dmod + C1 n1 out 1u + R1 out 0 100k + E1 out 0 n1 out 100000 + .MODEL dmod D(IS=1n RS=1) + .TRAN 0.01m 10m + .MEAS TRAN VOUT_MAX MAX V(out) FROM=5m TO=10m + .MEAS TRAN VOUT_MIN MIN V(out) FROM=5m TO=10m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertHasSuccessfulMeasurement(result, null); + } + + // Prompt: Howland current pump for load driving + [Fact] + public void Howland_current_pump_85711bfe34e4d181() + { + var result = RunAcceptedExample( + "local:00266_6df1ebdf33bf969d:85711bfe34e4d181", + """ + * Howland current pump + VIN in 0 DC 1 + R1 in pos 1k + R2 pos out 1k + R3 neg 0 1k + R4 out neg 1k + RL out load 100 + E1 out 0 pos neg 100000 + .OP + .DC VIN 0 1 0.01 + .MEAS DC ILOAD FIND I(RL) AT=1 + .MEAS DC VOUT FIND V(out) AT=1 + .MEAS DC VLOAD FIND V(load) AT=1 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertHasSuccessfulMeasurement(result, null); + } + + // Prompt: Voltage divider with load resistor - measure unloaded and loaded voltages + [Fact] + public void Voltage_Divider_with_Load_Measurement_Example_d7bb6cda04bfb1ca() + { + var result = RunAcceptedExample( + "local:00180_3a081dc3f070956c:d7bb6cda04bfb1ca", + """ + * Voltage Divider with Load - Measurement Example + R1 in out 10k + R2 out 0 10k + RL out 0 10k + VIN in 0 DC 10 + .OP + .DC VIN 0 10 1 + .MEAS DC vout_loaded FIND V(out) AT=10 + .MEAS DC vout_unloaded FIND V(out) AT=10 RL=100k + .MEAS DC ratio_loaded PARAM vout_loaded/vout_unloaded + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertHasSuccessfulMeasurement(result, null); + } + + // Prompt: Op-amp voltage follower - unity gain buffer + [Fact] + public void Op_Amp_Voltage_Follower_817ce816fcc481ea() + { + var result = RunAcceptedExample( + "local:00181_4db9373138d14283:817ce816fcc481ea", + """ + * Op-Amp Voltage Follower + VIN in 0 DC 0.5 AC 1 + E1 out 0 in out 100000 + RL out 0 10k + .OP + .AC DEC 10 1 1MEG + .MEAS AC gain_mag FIND VM(out) AT=1k + .MEAS AC phase FIND VP(out) AT=1k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertHasSuccessfulMeasurement(result, null); + } + + // Prompt: RC step response - measure rise time + [Fact] + public void RC_Step_Response_Rise_Time_Measurement_6908994b97641b5c() + { + var result = RunAcceptedExample( + "local:00182_2f094cf84d2fa82f:6908994b97641b5c", + """ + * RC Step Response - Rise Time Measurement + VIN in 0 PULSE(0 5 0 10n 10n 1u 2u) + C1 in out 1u + R1 out 0 1k + .TRAN 0.1u 5m + .MEAS TRAN vout_5u FIND V(out) AT=5u + .MEAS TRAN vout_10u FIND V(out) AT=10u + .MEAS TRAN vout_100u FIND V(out) AT=100u + .MEAS TRAN trise PARAM vout_10u - vout_5u + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertHasSuccessfulMeasurement(result, null); + } + + // Prompt: Emitter follower buffer circuit + [Fact] + public void NPN_Emitter_Follower_dc887da244efbe58() + { + var result = RunAcceptedExample( + "local:00174_1639567e4bfb1c77:dc887da244efbe58", + """ + * NPN Emitter Follower + VIN in 0 DC 5 AC 1 + R1 in base 100k + RE base 0 1k + Q1 in base out NPN + .MODEL NPN NPN(IS=1e-15 BF=100) + .OP + .AC DEC 10 1 100k + .MEAS AC VOUT_MAG FIND VM(out) AT=1k + .MEAS AC PHASE FIND VP(out) AT=1k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertHasSuccessfulMeasurement(result, null); + } + + // Prompt: Bridge diode configuration for full-wave rectification + [Fact] + public void Bridge_rectifier_with_smoothing_capacitor_52bce3d2ad1a21ce() + { + var result = RunAcceptedExample( + "local:00018_0290ab8bfe4c90fa:52bce3d2ad1a21ce", + """ + * Bridge rectifier with smoothing capacitor + D1 in out1 dmod + D2 in out2 dmod + D3 out2 out dmod + D4 out1 out dmod + VIN in 0 SIN(0 10 60) + C1 out 0 100u + RLOAD out 0 1k + .MODEL dmod D(IS=1e-14 N=1 RS=1) + .TRAN 0.1m 5m + .MEAS TRAN vout_avg AVG V(out) FROM=1m TO=5m + .MEAS TRAN vout_max MAX V(out) FROM=1m TO=5m + .MEAS TRAN vout_min MIN V(out) FROM=1m TO=5m + .MEAS TRAN vripple PP V(out) FROM=1m TO=5m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertHasSuccessfulMeasurement(result, null); + } + + // Prompt: JFET amplitude limiter with automatic gain control + [Fact] + public void JFET_Amplitude_Limiter_for_Sine_Wave_Stabilization_b9728e9be4ec23c7() + { + var result = RunAcceptedExample( + "local:00192_e213d81601759bda:b9728e9be4ec23c7", + """ + * JFET Amplitude Limiter for Sine Wave Stabilization + VIN in 0 SIN(0 1 1k) + R1 in gate 100k + C1 gate 0 10n + J1 out gate 0 njfet + R2 out 0 1k + .MODEL njfet NJF(VTO=-2 BETA=1m LAMBDA=0.01) + .OP + .TRAN 1u 10m + .MEAS TRAN vmax MAX V(out) FROM=5m TO=10m + .MEAS TRAN vmin MIN V(out) FROM=5m TO=10m + .MEAS TRAN vpp PARAM vmax - vmin + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertHasSuccessfulMeasurement(result, null); + } + + // Prompt: Design a T-topology resistive pad to provide 6 dB attenuation with 600 ohm impedance matching + [Fact] + public void T_pad_resistive_attenuator_57703cba5a3f84a3() + { + var result = RunAcceptedExample( + "local:00002_98d2a37ac23b7295:57703cba5a3f84a3", + """ + * T-pad resistive attenuator + VIN in 0 DC 1 AC 1 + R1 in n1 62 + R2 n1 out 1070 + R3 n1 0 62 + RL out 0 600 + .OP + .AC DEC 10 10 100k + .MEAS AC vout_mag FIND VM(out) AT=1k + .MEAS AC vout_db FIND VDB(out) AT=1k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertHasSuccessfulMeasurement(result, null); + } + + // Prompt: Quasi-complementary BJT push-pull output stage with diode bias + [Fact] + public void Quasi_Complementary_BJT_Output_Stage_b5323c4bc87f3e64() + { + var result = RunAcceptedExample( + "local:00152_b3e9b3dae122850f:b5323c4bc87f3e64", + """ + * Quasi-Complementary BJT Output Stage + VCC vcc 0 DC 15 + VEE vee 0 DC -15 + VIN in 0 SIN(0 1 1k) + R1 vcc b1 10k + D1 b1 in DMOD + Q1 b1 in e1 NMOD + R2 e1 vee 10k + D2 e1 b2 DMOD + Q2 b2 e1 out PMOD + Q3 b2 e2 out NMOD + R3 e2 vee 10k + .MODEL DMOD D(IS=1n RS=1) + .MODEL NMOD NPN(IS=1e-15 BF=100 VAF=50) + .MODEL PMOD PNP(IS=1e-15 BF=100 VAF=50) + .OP + .TRAN 1u 5m + .MEAS OP vout FIND V(out) AT=0 + .MEAS TRAN vmax MAX V(out) FROM=1m TO=5m + .MEAS TRAN vmin MIN V(out) FROM=1m TO=5m + .MEAS TRAN vpp PARAM vmax - vmin + .MEAS TRAN iq FIND I(R2) AT=0 + .MEAS TRAN ipeak MAX I(R2) FROM=1m TO=5m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertHasSuccessfulMeasurement(result, null); + } + + // Prompt: Create an op-amp voltage follower with input DC 1V and AC 1V, output loaded with 10k resistor + [Fact] + public void Op_Amp_Voltage_Follower_16ad1e324e34c00f() + { + var result = RunAcceptedExample( + "local:00202_b01bcfbf58a9fb4c:16ad1e324e34c00f", + """ + * Op-Amp Voltage Follower + E1 out 0 in out 100000 + Rload out 0 10k + VIN in 0 DC 1 AC 1 + .OP + .AC DEC 10 1 1MEG + .MEAS AC vout_mag FIND VM(out) AT=1k + .MEAS AC vout_db FIND VDB(out) AT=1k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertHasSuccessfulMeasurement(result, null); + } + + // Prompt: Op-amp integrator with R=10k, C=1nF, input sine 1kHz amplitude 1V + [Fact] + public void Op_Amp_Integrator_08c287df167be685() + { + var result = RunAcceptedExample( + "local:00204_fc6471f0ae254bfb:08c287df167be685", + """ + * Op-Amp Integrator + VIN in 0 SIN(0 1 1k) + R1 in inv 10k + C1 out inv 1n + E1 out 0 out inv 100000 + .OP + .TRAN 0.1u 10m + .MEAS TRAN vout_pp PP V(out) FROM=5m TO=10m + .MEAS TRAN vout_avg AVG V(out) FROM=5m TO=10m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertHasSuccessfulMeasurement(result, null); + } + + // Prompt: PMOS common-source amplifier with resistive load and mid-rail gate bias + [Fact] + public void PMOS_common_source_amplifier_with_resistive_load_acb254df98556a45() + { + var result = RunAcceptedExample( + "local:00164_f6068d057fc7d7ea:acb254df98556a45", + """ + * PMOS common-source amplifier with resistive load + VDD vdd 0 DC 5 + VG gate 0 DC 2.5 AC 1 + RD vdd drain 10k + M1 drain gate vdd vdd pmos W=100u L=2u + .MODEL pmos PMOS(VTO=-1 KP=100u LAMBDA=0.02) + .OP + .AC DEC 10 10 1MEG + .MEAS OP vd FIND V(drain) AT=0 + .MEAS AC gain_mag FIND VM(drain) AT=1k + .MEAS AC phase FIND VP(drain) AT=1k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertHasSuccessfulMeasurement(result, null); + } + + // Prompt: Two-transistor BJT current limiting protection circuit + [Fact] + public void Two_Transistor_BJT_Current_Limiter_Protection_Circuit_73d3d0a21b28036e() + { + var result = RunAcceptedExample( + "local:00143_8855b0c4126f2c8b:73d3d0a21b28036e", + """ + * Two-Transistor BJT Current Limiter Protection Circuit + VCC vcc 0 DC 12 + R1 vcc base1 10k + Q1 base1 emitter1 collector1 NPN_MOD + Rload collector1 out 100 + Rsense out 0 1 + Q2 base2 emitter1 collector2 NPN_MOD + R2 collector2 base2 1k + .MODEL NPN_MOD NPN(IS=1e-15 BF=100 VAF=50) + .OP + .DC VCC 0 12 0.1 + .MEAS DC IOUT_6V FIND I(Rload) AT=6 + .MEAS DC IOUT_12V FIND I(Rload) AT=12 + .MEAS DC IOUT_RATIO PARAM IOUT_12V/IOUT_6V + .MEAS DC IOUT_LIMIT PARAM IOUT_12V + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertHasSuccessfulMeasurement(result, null); + } + + // Prompt: Create a voltage divider with two 10k resistors and a 1k load, measure the loaded output voltage + [Fact] + public void Voltage_Divider_with_Load_fbf60c2dc41834cd() + { + var result = RunAcceptedExample( + "local:00291_a868f4ceab261b34:fbf60c2dc41834cd", + """ + * Voltage Divider with Load + VIN in 0 DC 5 + R1 in out 10k + R2 out 0 10k + RL out 0 1k + .OP + .MEAS OP VOUT FIND V(out) AT=0 + .MEAS OP I_R1 FIND I(R1) AT=0 + .MEAS OP I_R2 FIND I(R2) AT=0 + .MEAS OP I_RL FIND I(RL) AT=0 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertHasSuccessfulMeasurement(result, null); + } + + // Prompt: Common-emitter BJT amplifier with current-source load + [Fact] + public void Common_Emitter_Amplifier_with_Active_Current_Source_Load_a9b5abcb008893f1() + { + var result = RunAcceptedExample( + "local:00128_5176e3a49427b6ce:a9b5abcb008893f1", + """ + * Common-Emitter Amplifier with Active Current-Source Load + VCC vcc 0 DC 10 + I1 vcc col 1m + Q1 col base emit qn + RE emit 0 1k + RIN base 0 100k + VIN in 0 DC 5 AC 1 + C1 in base 100n + .MODEL qn NPN(IS=1e-15 BF=100 VAF=100) + .OP + .AC DEC 10 10 1MEG + .MEAS OP vout FIND V(col) AT=0 + .MEAS AC gain FIND VM(col) AT=1k + .MEAS AC phase FIND VP(col) AT=1k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertHasSuccessfulMeasurement(result, null); + } + + // Prompt: Howland current pump with behavioral op-amp for load current control + [Fact] + public void Howland_current_pump_with_behavioral_op_amp_6b552657acb29edc() + { + var result = RunAcceptedExample( + "local:00205_3d2ca5a572ef2d94:6b552657acb29edc", + """ + * Howland current pump with behavioral op-amp + VIN in 0 DC 1 AC 1 + R1 in n1 10k + R2 n1 out 10k + R3 out n2 10k + R4 n2 0 10k + RL out load 1k + E1 out 0 in n2 100000 + .OP + .AC DEC 10 1 100k + .MEAS OP vout FIND V(out) AT=1 + .MEAS OP i_load FIND I(RL) AT=1 + .MEAS AC gain FIND VM(load) AT=1k + .MEAS AC phase FIND VP(load) AT=1k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertHasSuccessfulMeasurement(result, null); + } + + // Prompt: Diode AND gate with pull-up resistor and two pulse inputs + [Fact] + public void Diode_AND_Gate_with_Pull_Up_Resistor_373aae08023de5e2() + { + var result = RunAcceptedExample( + "local:00107_8224f31275de9bdc:373aae08023de5e2", + """ + * Diode AND Gate with Pull-Up Resistor + .MODEL dmod D(IS=1n RS=1) + Vcc vcc 0 DC 5 + R1 vcc out 10k + D1 in1 out dmod + D2 in2 out dmod + VIN1 in1 0 PULSE(0 5 0 1n 1n 1u 2u) + VIN2 in2 0 PULSE(0 5 0 1n 1n 1u 2u) + .TRAN 1n 5u + .MEAS TRAN vout_high FIND V(out) AT=0.5u + .MEAS TRAN vout_low FIND V(out) AT=1.5u + .MEAS TRAN vout_avg AVG V(out) FROM=0 TO=5u + .MEAS TRAN vmax MAX V(out) FROM=0 TO=5u + .MEAS TRAN vmin MIN V(out) FROM=0 TO=5u + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertHasSuccessfulMeasurement(result, null); + } + + // Prompt: Constant-current battery charger with op-amp feedback control + [Fact] + public void Constant_Current_Battery_Charger_with_Op_Amp_Control_5370d14a0393be46() + { + var result = RunAcceptedExample( + "local:00256_dda2182f3dd47900:5370d14a0393be46", + """ + * Constant-Current Battery Charger with Op-Amp Control + Vref ref 0 DC 1.2 + Vbat bat 0 DC 3.7 + R1 out neg 10k + R2 neg em 100 + Q1 em bat 0 qn + E1 out 0 ref neg 100000 + .MODEL qn NPN(IS=1e-15 BF=100 VAF=100) + .OP + .DC Vbat 0 5 0.1 + .MEAS DC Icharge FIND I(R2) AT=3.7 + .MEAS DC Imin FIND I(R2) AT=0 + .MEAS DC Imax FIND I(R2) AT=5 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertHasSuccessfulMeasurement(result, null); + } + + // Prompt: Design a full-wave rectifier power supply with center-tapped transformer and smoothing capacitor + [Fact] + public void Full_wave_center_tapped_rectifier_with_smoothing_capacitor_b31e4ad99a894801() + { + var result = RunAcceptedExample( + "local:00096_e0f7918704e6b16e:b31e4ad99a894801", + """ + * Full-wave center-tapped rectifier with smoothing capacitor + V1 top1 0 SIN(0 17 60) + V2 top2 0 SIN(0 17 60) + D1 top1 out dmod + D2 top2 out dmod + C1 out 0 100u + R1 out 0 1k + .MODEL dmod D(IS=1n RS=1) + .TRAN 10u 100m 0 10u + .MEAS TRAN vout_avg AVG V(out) FROM=50m TO=100m + .MEAS TRAN vout_ripple PP V(out) FROM=50m TO=100m + .MEAS TRAN vout_min MIN V(out) FROM=50m TO=100m + .MEAS TRAN vout_max MAX V(out) FROM=50m TO=100m + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertHasSuccessfulMeasurement(result, null); + } + + // Prompt: Design an inverting amplifier with gain of -10 using 10k and 100k resistors + [Fact] + public void Inverting_op_amp_amplifier_with_bias_compensation_2d318355732731d1() + { + var result = RunAcceptedExample( + "local:00194_2e7df13af6be218d:2d318355732731d1", + """ + * Inverting op-amp amplifier with bias compensation + VIN in 0 AC 1 + R1 in inv 10k + R2 out inv 100k + R3 pos 0 10k + E1 out 0 pos inv 100000 + .OP + .AC DEC 10 1 100k + .MEAS AC gain FIND V(out) AT=1k + .MEAS AC phase FIND VP(out) AT=1k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertHasSuccessfulMeasurement(result, null); + } + + // Prompt: Bridged-T resistive attenuator with 10k, 10k, 10k, 5k resistor values + [Fact] + public void Bridged_T_Resistive_Attenuator_ffe0632d0704a1e2() + { + var result = RunAcceptedExample( + "local:00065_8c26ca7dabbab34f:ffe0632d0704a1e2", + """ + * Bridged-T Resistive Attenuator + VIN in 0 DC 1 AC 1 + R1 in n1 10k + R2 n1 out 10k + R3 n1 0 10k + R4 out 0 5k + .OP + .AC DEC 10 10 100k + .MEAS AC vout_mag FIND VM(out) AT=1k + .MEAS AC vin_mag FIND VM(in) AT=1k + .MEAS AC vout_db FIND VDB(out) AT=1k + .MEAS AC vin_db FIND VDB(in) AT=1k + .MEAS AC attenuation PARAM vout_db - vin_db + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertHasSuccessfulMeasurement(result, null); + } + + // Prompt: Two-op-amp instrumentation amplifier with differential input and high CMRR + [Fact] + public void Two_op_amp_instrumentation_amplifier_465352eca5ed7fc7() + { + var result = RunAcceptedExample( + "local:00199_ec5cd1df6ec01a67:465352eca5ed7fc7", + """ + * Two-op-amp instrumentation amplifier + VCC vcc 0 DC 15 + VEE vee 0 DC -15 + VINP vinp 0 DC 0.005 AC 0.005 + VINN vin 0 DC -0.005 AC -0.005 + R1 out1 0 10k + R2 out2 0 10k + Rtail out1 out2 10k + Rf1 out1 inv1 100k + Rf2 out2 inv2 100k + E1 out1 vinp inv1 100000 + E2 out2 vin inv2 100000 + E3 out inv3 100000 + R3 out1 inv3 10k + R4 inv3 0 10k + R5 out2 noninv3 10k + R6 noninv3 out 10k + .OP + .AC DEC 10 1 100k + .MEAS AC gain FIND VM(out) AT=1k + .MEAS AC vout FIND V(out) AT=1k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertHasSuccessfulMeasurement(result, null); + } + + // Prompt: Design a voltage divider to reduce 10V to 5V with 10k and 10k resistors + [Fact] + public void Loaded_Voltage_Divider_e86ff2363a4baa6a() + { + var result = RunAcceptedExample( + "local:00017_c3c36f24c65a08b0:e86ff2363a4baa6a", + """ + * Loaded Voltage Divider + VIN in 0 DC 10 + R1 in out 10k + R2 out 0 10k + RL out 0 100k + .OP + .DC VIN 10 10 1 + .MEAS DC VOUT FIND V(out) AT=10 + .MEAS DC I_R1 FIND I(R1) AT=10 + .MEAS DC I_R2 FIND I(R2) AT=10 + .MEAS DC I_RL FIND I(RL) AT=10 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertHasSuccessfulMeasurement(result, null); + } + + // Prompt: Resistive gate bias network sets Vg to 5V + [Fact] + public void MOSFET_Common_Source_Amplifier_with_Resistive_Bias_bd8d967400f70ecf() + { + var result = RunAcceptedExample( + "local:00309_7adf609ac31faedb:bd8d967400f70ecf", + """ + * MOSFET Common-Source Amplifier with Resistive Bias + .MODEL nmod NMOS(VTO=1 KP=100u LAMBDA=0.02) + VDD vdd 0 DC 10 + R1 vdd gate 100k + R2 gate 0 100k + R3 vdd drain 10k + R4 source 0 500 + M1 drain gate source 0 nmod + .OP + .MEAS OP vdrain FIND V(drain) AT=0 + .MEAS OP vsource FIND V(source) AT=0 + .MEAS OP vgate FIND V(gate) AT=0 + .MEAS OP idrain FIND I(R3) AT=0 + .MEAS OP vds FIND V(drain)-V(source) AT=0 + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertHasSuccessfulMeasurement(result, null); + } + + // Prompt: First-order RC low-pass filter with R=1k, C=10nF + [Fact] + public void RC_low_pass_filter_547dd402a661ef97() + { + var result = RunAcceptedExample( + "local:00008_042952e6cd27f20d:547dd402a661ef97", + """ + * RC low-pass filter + VIN in 0 AC 1 + R1 in out 1k + C1 out 0 10nF + .AC DEC 10 10 100k + .MEAS AC vout_low FIND VM(out) AT=10 + .MEAS AC vout_high FIND VM(out) AT=100k + .MEAS AC vout_mid FIND VM(out) AT=1.59k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertHasSuccessfulMeasurement(result, null); + } + + // Prompt: Summing amplifier with three weighted input signals + [Fact] + public void _3_input_summing_amplifier_with_weighted_inputs_9786ecee19204917() + { + var result = RunAcceptedExample( + "local:00196_63cda1e691cd4e89:9786ecee19204917", + """ + * 3-input summing amplifier with weighted inputs + V1 in1 0 DC 1 AC 1 + V2 in2 0 DC 2 AC 0 + V3 in3 0 DC 3 AC 0 + R1 in1 sum 10k + R2 in2 sum 20k + R3 in3 sum 30k + Rf out sum 60k + E1 out 0 sum 0 100000 + .OP + .AC DEC 10 1 100k + .MEAS OP vout FIND V(out) AT=0 + .MEAS AC gain FIND VM(out) AT=1k + .MEAS AC phase FIND VP(out) AT=1k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertHasSuccessfulMeasurement(result, null); + } + + // Prompt: Negative impedance converter using op-amp + [Fact] + public void Op_Amp_Negative_Impedance_Converter_aa83e0eea42c234c() + { + var result = RunAcceptedExample( + "local:00207_a2e5afa9d24544b5:aa83e0eea42c234c", + """ + * Op-Amp Negative Impedance Converter + VIN in 0 DC 0 AC 1 + R1 in x 1k + R2 x out 10k + R3 out 0 1k + E1 out 0 x 0 100000 + .AC DEC 10 10 100k + .OP + .MEAS AC zin_mag FIND VM(x) AT=1k + .MEAS AC phase_x FIND VP(x) AT=1k + .MEAS AC vout_mag FIND VM(out) AT=1k + .MEAS AC vout_phase FIND VP(out) AT=1k + .END + """); + + AssertAllMeasurementsSuccessful(result); + AssertHasSuccessfulMeasurement(result, null); + } + +} diff --git a/src/SpiceSharpParser.AIExamples/SpiceSharpParser.AIExamples.csproj b/src/SpiceSharpParser.AIExamples/SpiceSharpParser.AIExamples.csproj new file mode 100644 index 00000000..b8497b70 --- /dev/null +++ b/src/SpiceSharpParser.AIExamples/SpiceSharpParser.AIExamples.csproj @@ -0,0 +1,22 @@ + + + net8.0 + enable + enable + false + + + + + + + runtime; build; native; contentfiles; analyzers; buildtransitive + all + + + + + + + + diff --git a/src/SpiceSharpParser.AIExamples/accepted_examples_fixture.jsonl b/src/SpiceSharpParser.AIExamples/accepted_examples_fixture.jsonl new file mode 100644 index 00000000..b86c2b71 --- /dev/null +++ b/src/SpiceSharpParser.AIExamples/accepted_examples_fixture.jsonl @@ -0,0 +1,948 @@ +{"id":"deepseek:00072_0315b0fd73ad4970:61b0b251cbcac08e","source":"deepseek","example_id":"00072_0315b0fd73ad4970","test_name":"test_test_72_first_order_rc_high_pass_filter_0315b0fd73ad4970","netlist_hash":"61b0b251cbcac08e","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"First-order RC high-pass filter with R=1k\u03a9 and C=1\u00b5F.","pair_ids":["555807566aa8b132","6427828dae95c2bc","5b9561a45db9d3e5"],"prompts":["First-order RC high-pass filter with R=1k\u03a9 and C=1\u00b5F.","AC analysis from 1 Hz to 1 MHz with 10 points per decade.","Measures output voltage magnitude at 10 Hz and 100 kHz."],"measurements":[{"name":"gain_low","key":"gain_low","index":0,"value":0.0039323175928274836,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"gain_high","key":"gain_high","index":0,"value":0.9999974669768251,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:00073_c554c06e947da022:bff314502177a652","source":"deepseek","example_id":"00073_c554c06e947da022","test_name":"test_test_73_first_order_rc_high_pass_filter_c554c06e947da022","netlist_hash":"bff314502177a652","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Design an RC high-pass filter using a 10k resistor and 100nF capacitor. AC analysis from 1 Hz to 1 MHz. Check the output amplitude at 10 Hz and 1 MHz.","pair_ids":["a988a767fa8ed602","d6c2287ae54b8598","2ce8fe35df7101fd"],"prompts":["Design an RC high-pass filter using a 10k resistor and 100nF capacitor. AC analysis from 1 Hz to 1 MHz. Check the output amplitude at 10 Hz and 1 MHz.","Implement a high-pass filter with R=10k and C=100nF, supply with 1V AC. Measure the gain at low frequency (10 Hz) and high frequency (1 MHz) to verify the filter works.","An RC high-pass filter: 10k resistor, 100nF capacitor. AC sweep. Identify that high frequencies pass and low frequencies are blocked."],"measurements":[{"name":"low_gain","key":"low_gain","index":0,"value":0.003932317592827483,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"high_gain","key":"high_gain","index":0,"value":0.9999999746697048,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:00074_b1b4942e2c40bedb:a90b5fc11074fd1f","source":"deepseek","example_id":"00074_b1b4942e2c40bedb","test_name":"test_test_74_first_order_rc_high_pass_filter_b1b4942e2c40bedb","netlist_hash":"a90b5fc11074fd1f","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Construct a high-pass filter with a 100 ohm resistor and 10uF capacitor. Run an AC sweep from 1Hz to 1MHz and measure the output at 1Hz and 1MHz.","pair_ids":["f61184c7bd9ba0ce","5e95a9e44e702a65","dfcf364c7b32bea4"],"prompts":["Construct a high-pass filter with a 100 ohm resistor and 10uF capacitor. Run an AC sweep from 1Hz to 1MHz and measure the output at 1Hz and 1MHz.","Build an RC high-pass: R=100, C=10uF. Input is 1V AC. Simulate and check the magnitude at 1 Hz and 1 MHz.","I want a high-pass filter. Use R=100, C=10uF. AC analysis. Show that 1 Hz is blocked and 1 MHz passes."],"measurements":[{"name":"gain_1MHz","key":"gain_1MHz","index":0,"value":0.9999999746697047,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"gain_1Hz","key":"gain_1Hz","index":0,"value":3.947685912042737e-05,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:00075_206cf2c546556393:450d5c452770b794","source":"deepseek","example_id":"00075_206cf2c546556393","test_name":"test_test_75_first_order_rc_high_pass_filter_206cf2c546556393","netlist_hash":"450d5c452770b794","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Design a high-pass filter with R=1k and C=100nF. Perform an AC sweep from 10Hz to 1MHz (decade, 50 points per decade) and measure the output voltage magnitude at 100Hz and 100kHz.","pair_ids":["d024fbaf388e9dce","6be6b9c9b04d6f15","b40ee7ab49338e7e"],"prompts":["Design a high-pass filter with R=1k and C=100nF. Perform an AC sweep from 10Hz to 1MHz (decade, 50 points per decade) and measure the output voltage magnitude at 100Hz and 100kHz.","Create an RC high-pass circuit: R=1k, C=100nF. AC source 1V. Check that 100 Hz is attenuated below 0.5 and 100 kHz is near unity gain.","Implement a high-pass filter using 1k and 100n. Run AC simulation and verify high-pass behavior at 100 Hz and 100 kHz."],"measurements":[{"name":"vout_100","key":"vout_100","index":0,"value":0.003932317592827484,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"vout_100k","key":"vout_100k","index":0,"value":0.9997467611870348,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:00076_93b80396f9b98f8c:c05aae80b8f512ca","source":"deepseek","example_id":"00076_93b80396f9b98f8c","test_name":"test_test_76_first_order_rc_high_pass_filter_93b80396f9b98f8c","netlist_hash":"c05aae80b8f512ca","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Design an RC high-pass filter with a 10k resistor and 10nF capacitor. Simulate an AC sweep from 10 Hz to 100 kHz (decade 50 points) and measure the output at 1 kHz and 100 kHz.","pair_ids":["ce9f24bd10159998","97d42f34b834f59b","966e6c36a0614a0d"],"prompts":["Design an RC high-pass filter with a 10k resistor and 10nF capacitor. Simulate an AC sweep from 10 Hz to 100 kHz (decade 50 points) and measure the output at 1 kHz and 100 kHz.","Build a high-pass filter: R=10k, C=10nF. AC source 1V. Verify that 1 kHz is attenuated and 100 kHz passes.","Create a first-order high-pass filter using 10k and 10nF. Run AC analysis and check gain at 1kHz and 100kHz."],"measurements":[{"name":"gain_1k","key":"gain_1k","index":0,"value":0.2830431996751022,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"gain_100k","key":"gain_100k","index":0,"value":0.9997467611870349,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:00077_c121d431aaca5189:b872d4dcdf235671","source":"deepseek","example_id":"00077_c121d431aaca5189","test_name":"test_test_77_first_order_rc_high_pass_filter_c121d431aaca5189","netlist_hash":"b872d4dcdf235671","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Design an RC high-pass using R=1k and C=0.1uF. Include a 5V DC offset on the AC source. Run AC sweep from 1Hz to 1MHz (dec 10) and measure output at 100Hz and 1MHz.","pair_ids":["3853c9fb23559a28","edf542e3615633eb","2c5a6c5f963635e9"],"prompts":["Design an RC high-pass using R=1k and C=0.1uF. Include a 5V DC offset on the AC source. Run AC sweep from 1Hz to 1MHz (dec 10) and measure output at 100Hz and 1MHz.","Create a high-pass filter with R=1k, C=0.1uF, DC bias of 5V on the input. Simulate AC and check gain at 100 Hz and 1 MHz.","Build a first-order high-pass filter: 1k, 0.1uF, input with 5V DC and 1V AC. AC analysis to verify attenuation at low frequency and unity at high frequency."],"measurements":[{"name":"g1M","key":"g1M","index":0,"value":0.9999974669768252,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"g100","key":"g100","index":0,"value":0.003932317592827484,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:00078_d1265e58adc2f2d5:6bc8883048ba1b99","source":"deepseek","example_id":"00078_d1265e58adc2f2d5","test_name":"test_test_78_first_order_rc_high_pass_filter_d1265e58adc2f2d5","netlist_hash":"6bc8883048ba1b99","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Design a high-pass filter with R=100k and C=1nF. AC sweep 10Hz-100kHz (dec 20). Measure output at 100Hz and 100kHz.","pair_ids":["1e82756885d3b81e","63fd32159ccfeb09","a6b1741d273d4ed5"],"prompts":["Design a high-pass filter with R=100k and C=1nF. AC sweep 10Hz-100kHz (dec 20). Measure output at 100Hz and 100kHz.","Build an RC high-pass: 100k, 1nF, 1V AC. Check that 100 Hz is attenuated and 100 kHz passes.","Create a high-pass filter using a 100k resistor and 1nF capacitor. Run AC simulation and verify high-pass behavior at low and high frequencies."],"measurements":[{"name":"v100","key":"v100","index":0,"value":0.003932317592827484,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"v100k","key":"v100k","index":0,"value":0.9997467611870348,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:00079_618f899a01cee257:394def56bd61324c","source":"deepseek","example_id":"00079_618f899a01cee257","test_name":"test_test_79_first_order_rc_high_pass_filter_618f899a01cee257","netlist_hash":"394def56bd61324c","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Design an RC high-pass filter with a very low cutoff: R=10k, C=1uF. AC analysis 1 Hz to 100 kHz (dec 10). Measure output at 1 Hz and 1 kHz.","pair_ids":["61f2956d60c5ddb5","de8af1bcf44f778e","78366b88a1570b68"],"prompts":["Design an RC high-pass filter with a very low cutoff: R=10k, C=1uF. AC analysis 1 Hz to 100 kHz (dec 10). Measure output at 1 Hz and 1 kHz.","Build a high-pass filter with R=10k, C=1uF. AC source 1V. Simulate and measure gain at 1 Hz and 1 kHz.","Create a first-order high-pass filter with large time constant using 10k and 1uF. Verify that 1 Hz is attenuated and 1 kHz passes."],"measurements":[{"name":"out_1Hz","key":"out_1Hz","index":0,"value":0.003932317592827482,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"out_1kHz","key":"out_1kHz","index":0,"value":0.9997467611870349,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:02497_800759546cb8c320:d94325acaeeb261a","source":"deepseek","example_id":"02497_800759546cb8c320","test_name":"test_test_2497_rc_low_pass_10k_10nf_800759546cb8c320","netlist_hash":"d94325acaeeb261a","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Defines a reusable RC low-pass filter subcircuit with R=10k and C=10nF.","pair_ids":["f81ed7a398d27381","769aab7845089f02","7387fa118bddcc5e"],"prompts":["Defines a reusable RC low-pass filter subcircuit with R=10k and C=10nF.","Performs AC sweep from 1 Hz to 10 kHz with 100 points per decade.","Measures maximum gain as max_gain and -3 dB frequency as f3dB."],"measurements":[{"name":"f3dB","key":"f3dB","index":0,"value":1591.5497549535796,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 AC"},{"name":"max_gain","key":"max_gain","index":0,"value":0.9999996052159797,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 AC"}]} +{"id":"deepseek:00081_ee30a909de8ca0d9:25922166e7602021","source":"deepseek","example_id":"00081_ee30a909de8ca0d9","test_name":"test_test_81_first_order_rl_lowpass_ee30a909de8ca0d9","netlist_hash":"25922166e7602021","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"RL low-pass filter with 100 mH inductor and 100 \u03a9 resistor","pair_ids":["d26a32d1d5d468fa","f0b67396dba20df9","c779d02b7b4bf824"],"prompts":["RL low-pass filter with 100 mH inductor and 100 \u03a9 resistor","AC analysis from 1 Hz to 10 kHz with 20 points per decade","Measure low-frequency gain, -3 dB cutoff, and gain at 1 kHz"],"measurements":[{"name":"f3db","key":"f3db","index":0,"value":158.77806692581515,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 AC"},{"name":"v_1k","key":"v_1k","index":0,"value":-16.072235265805517,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"v_lf","key":"v_lf","index":0,"value":-0.017111504344580995,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:01123_677531dce86806f1:fb5942b8913780aa","source":"deepseek","example_id":"01123_677531dce86806f1","test_name":"test_test_1123_current_source_677531dce86806f1","netlist_hash":"fb5942b8913780aa","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Simulate a current sink and check its current over a supply voltage sweep. VCC from 5V to 15V, Vbias=2V, RE=1k, RL=1k. Measure I(Rload) at 5V, 10V, and 15V using .DC analysis.","pair_ids":["2e8041263f4ef409","96ecbc494261f798","f2f5fc32a34c8d11"],"prompts":["Simulate a current sink and check its current over a supply voltage sweep. VCC from 5V to 15V, Vbias=2V, RE=1k, RL=1k. Measure I(Rload) at 5V, 10V, and 15V using .DC analysis.","Test the line regulation of a BJT current sink. Vary VCC from 5V to 15V, base=2V, 1k emitter resistor, 1k load. Use a DC sweep and measure current at three VCC values.","Evaluate how constant the current stays when supply changes. VCC sweep 5\u201315V, step 0.1V. Vbias=2V, RE=1k, RL=1k. NPN VA=50. Measure I(RL) at VCC=5,10,15."],"measurements":[{"name":"i_15v","key":"i_15v","index":0,"value":0.0013321078477033553,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 DC"},{"name":"i_10v","key":"i_10v","index":0,"value":0.0013290561704591894,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 DC"},{"name":"i_5v","key":"i_5v","index":0,"value":0.0013256348358189171,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 DC"}]} +{"id":"deepseek:01125_20aeb91bc734c189:5a38b6a82407dae7","source":"deepseek","example_id":"01125_20aeb91bc734c189","test_name":"test_test_1125_current_source_20aeb91bc734c189","netlist_hash":"5a38b6a82407dae7","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Basic BJT current sink with 9V supply, 1.8V base bias, 1.5k\u03a9 emitter resistor, and 2.2k\u03a9 collector load.","pair_ids":["6d28c2487fe83eea","a40968aa5a6a8e11","9b0e4d3709e4dcec"],"prompts":["Basic BJT current sink with 9V supply, 1.8V base bias, 1.5k\u03a9 emitter resistor, and 2.2k\u03a9 collector load.","Uses a .DC analysis with a single point to obtain operating point values via .MEAS statements.","Verifies proper emitter voltage and both emitter and collector currents."],"measurements":[{"name":"i_collector","key":"i_collector","index":0,"value":0.0007628489604860016,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 DC"},{"name":"i_emitter","key":"i_emitter","index":0,"value":0.0007679346146170667,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 DC"},{"name":"v_emitter","key":"v_emitter","index":0,"value":1.1519019219256001,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 DC"}]} +{"id":"deepseek:01126_786aee84a60995b2:5cc6856b81e563fb","source":"deepseek","example_id":"01126_786aee84a60995b2","test_name":"test_test_1126_current_source_786aee84a60995b2","netlist_hash":"5cc6856b81e563fb","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"High Early voltage NPN current sink","pair_ids":["6f8504afa93e74c1","54f54a03e2ed9d1f","2d46fba6e4a15a11"],"prompts":["High Early voltage NPN current sink","Uses VAF=200 to minimize output conductance","Validates I(Rload) equals (2.5-0.7)/2.2k approximately"],"measurements":[{"name":"iout","key":"iout","index":0,"value":0.0008110482700156105,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"}]} +{"id":"deepseek:00348_bf47adadc63d7e19:21ff7cc5d03578ec","source":"deepseek","example_id":"00348_bf47adadc63d7e19","test_name":"test_test_348_shunt_led_reference_bf47adadc63d7e19","netlist_hash":"21ff7cc5d03578ec","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Simple red LED shunt voltage reference.","pair_ids":["a92ce1e36b38daea","f112647c5747b2bb","9a7e5682c65efc02"],"prompts":["Simple red LED shunt voltage reference.","Resistor limits current through LED.","LED forward voltage provides a stable reference."],"measurements":[{"name":"vref","key":"vref","index":0,"value":1.945498507907138,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 DC"}]} +{"id":"deepseek:00349_322c25eddb282eaf:322c25eddb282eaf","source":"deepseek","example_id":"00349_322c25eddb282eaf","test_name":"test_test_349_shunt_led_reference_322c25eddb282eaf","netlist_hash":"322c25eddb282eaf","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Make a 2.2V shunt reference using a green LED and a 1k resistor from a 12V supply.","pair_ids":["1da62ffc7161cb8d","1b6690e5b8442fd7","9da8e2b12b0d26f1"],"prompts":["Make a 2.2V shunt reference using a green LED and a 1k resistor from a 12V supply.","Design an LED voltage reference circuit and measure the diode current at 12V input.","Build a green LED shunt regulator and check the output voltage and LED current."],"measurements":[{"name":"vref","key":"vref","index":0,"value":2.1582996311718747,"value_is_finite":true,"success":true,"measurement_type":"FIND_WHEN","simulation_name":"#1 DC"},{"name":"iled","key":"iled","index":0,"value":0.009842197283637283,"value_is_finite":true,"success":true,"measurement_type":"FIND_WHEN","simulation_name":"#1 DC"}]} +{"id":"deepseek:00350_5c743537d4751002:a4b6d860ef90d05e","source":"deepseek","example_id":"00350_5c743537d4751002","test_name":"test_test_350_shunt_led_reference_5c743537d4751002","netlist_hash":"a4b6d860ef90d05e","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Blue LED shunt reference from a 9V battery","pair_ids":["a93f4aec2ee5b8df","a66c0ef114174c9e","af28615361567214"],"prompts":["Blue LED shunt reference from a 9V battery","Uses a resistor and a blue LED to clamp to LED forward voltage",".MODEL parameters tuned to achieve approximately 3.2V at 26 mA"],"measurements":[{"name":"vref","key":"vref","index":0,"value":3.203446811002561,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 DC"}]} +{"id":"deepseek:00600_cfa3e6ea2014c304:55bdef0f0cee5e49","source":"deepseek","example_id":"00600_cfa3e6ea2014c304","test_name":"test_test_600_transimpedance_basic_cfa3e6ea2014c304","netlist_hash":"55bdef0f0cee5e49","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":2,"representative_prompt":"This is a basic current-to-voltage converter using an ideal op-amp with a 10k feedback resistor.","pair_ids":["bf19b087f3cf0b6f","ab34c780a0d56541"],"prompts":["This is a basic current-to-voltage converter using an ideal op-amp with a 10k feedback resistor.","Input current is AC 1A, and the output voltage magnitude at 1 Hz verifies the transimpedance gain of 10k\u03a9."],"measurements":[{"name":"transimpedance","key":"transimpedance","index":0,"value":10000.10000100001,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"}]} +{"id":"deepseek:02382_b8fd880a52172689:891184e4216e3060","source":"deepseek","example_id":"02382_b8fd880a52172689","test_name":"test_test_2382_diode_peak_detector_b8fd880a52172689","netlist_hash":"891184e4216e3060","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"The diode D1 allows current only when the input voltage exceeds the output voltage, charging capacitor C1.","pair_ids":["5612d9999aee189c","43d73ab49b7d6bc1","136fa7e604e13c91"],"prompts":["The diode D1 allows current only when the input voltage exceeds the output voltage, charging capacitor C1.","Capacitor C1 holds the peak voltage, while resistor R1 provides a slow discharge path leading to a small ripple.","The diode model uses IS=2e-16 to achieve a forward voltage drop of about 0.7 V at typical charging currents."],"measurements":[{"name":"vmax","key":"vmax","index":0,"value":4.443576438615493,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:02383_44ad2a592fe2af1c:79f55501c156bfe0","source":"deepseek","example_id":"02383_44ad2a592fe2af1c","test_name":"test_test_2383_diode_peak_detector_schottky_44ad2a592fe2af1c","netlist_hash":"79f55501c156bfe0","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Schottky diode peak detector with 100 nF capacitor and 10 k\u03a9 bleed resistor","pair_ids":["48a0becb9ed62d27","ccb85e8a43438931","821c107c0ffa7a7b"],"prompts":["Schottky diode peak detector with 100 nF capacitor and 10 k\u03a9 bleed resistor","Driven by a 2 V peak, 10 kHz sine wave","The Schottky diode provides a low forward voltage drop, producing an output peak near 1.7 V with minimal ripple"],"measurements":[{"name":"vmax","key":"vmax","index":0,"value":1.6667087880497289,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:01358_00a4b74d96d59027:f130345a300de73b","source":"deepseek","example_id":"01358_00a4b74d96d59027","test_name":"test_test_1358_mos_source_degenerated_current_mirror_00a4b74d96d59027","netlist_hash":"f130345a300de73b","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Design a source-degenerated NMOS current mirror with a 100 \u00b5A reference current. Use 1 k\u03a9 degeneration resistors. Perform DC analysis sweeping the output voltage from 0 to 5 V and verify the output current in saturation is approximately 100 \u00b5A.","pair_ids":["aefd42ef8631e6f0","c054c55ed741752c","9f4f9fa428e9223b"],"prompts":["Design a source-degenerated NMOS current mirror with a 100 \u00b5A reference current. Use 1 k\u03a9 degeneration resistors. Perform DC analysis sweeping the output voltage from 0 to 5 V and verify the output current in saturation is approximately 100 \u00b5A.","Create a current mirror circuit using NMOS transistors with source degeneration. Set the reference current to 100 \u00b5A and degeneration resistors to 1 k\u03a9. Run DC sweep of the output voltage and measure the output current in the saturation region.","Build an NMOS current mirror with source resistors to improve output resistance. Use a 5 V supply. Set the mirror for a 100 \u00b5A output. DC sweep the output voltage and check the current matching and load regulation."],"measurements":[{"name":"iout_sat","key":"iout_sat","index":0,"value":0.00010186360304275863,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"iout_lin","key":"iout_lin","index":0,"value":9.891099134373162e-05,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"}]} +{"id":"deepseek:01945_d94341e082f9330c:d94341e082f9330c","source":"deepseek","example_id":"01945_d94341e082f9330c","test_name":"test_test_1945_sawtooth_oscillator_d94341e082f9330c","netlist_hash":"d94341e082f9330c","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Design a sawtooth oscillator that uses a constant current source to charge a capacitor and a voltage-controlled switch to reset it periodically. Include a pulse source to drive the switch.","pair_ids":["9511368046e4c71d","5a481c95e751f185","02aabbc55b372d6c"],"prompts":["Design a sawtooth oscillator that uses a constant current source to charge a capacitor and a voltage-controlled switch to reset it periodically. Include a pulse source to drive the switch.","Create a sawtooth waveform generator using a current source charging a capacitor and a switch for reset. Use a PULSE voltage to control the switch and provide the netlist with transient analysis.","Build a SPICE netlist for a sawtooth generator featuring a current source, a capacitor, and a reset switch controlled by a periodic pulse."],"measurements":[{"name":"vmax","key":"vmax","index":0,"value":0.9809468989703616,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 tran"},{"name":"tper","key":"tper","index":0,"value":0.00010000070096245098,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 tran"}]} +{"id":"deepseek:01426_3dc85d7efbef46c4:866397d04ebf3a2a","source":"deepseek","example_id":"01426_3dc85d7efbef46c4","test_name":"test_test_1426_nmos_pass_transistor_level_shifter_3dc85d7efbef46c4","netlist_hash":"866397d04ebf3a2a","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"NMOS pass transistor level shifter converting 0-1.8V logic to 0-5V.","pair_ids":["0e6dedadf49b7cb7","3ae031eaaa878d54","654dbe09d0c625f3","da1e18943620c29d"],"prompts":["NMOS pass transistor level shifter converting 0-1.8V logic to 0-5V.","Gate tied to 1.8V supply, source connected to input, drain pulled up to 5V via 10k resistor.","Bulk connected to source to prevent forward-biased body diode when input is high.","Pulse input now starts low (0V) for 500ns then high (1.8V) for 500ns, period 2\u00b5s."],"measurements":[{"name":"vout_high","key":"vout_high","index":0,"value":4.999999967900001,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 tran"},{"name":"vout_low","key":"vout_low","index":0,"value":0.24244797980833435,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 tran"}]} +{"id":"deepseek:04536_43064b90e1426561:f048dfd674a99e21","source":"deepseek","example_id":"04536_43064b90e1426561","test_name":"test_test_4536_op_amp_voltage_follower_43064b90e1426561","netlist_hash":"f048dfd674a99e21","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Design a unity-gain buffer using an ideal op-amp.","pair_ids":["3f9f86aec050c316","7055e32c5968b380","84b0fba92cd33b33","707e1090a33e8258"],"prompts":["Design a unity-gain buffer using an ideal op-amp.","Create a voltage follower circuit and simulate both DC operating point and AC response.","Make an op-amp voltage follower with an E-source, then measure the output DC voltage and the AC gain at 1kHz.","Implement a buffer amplifier with a high-gain E-source and a load resistor, and verify it works as a follower."],"measurements":[{"name":"VOUT","key":"VOUT","index":0,"value":0,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 OP"},{"name":"Gain","key":"Gain","index":0,"value":-8.685846208858971e-05,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"}]} +{"id":"deepseek:02511_2e07f78706660389:2e07f78706660389","source":"deepseek","example_id":"02511_2e07f78706660389","test_name":"test_test_2511_asymmetric_window_diode_limiter_2e07f78706660389","netlist_hash":"2e07f78706660389","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"Design a diode clipper that limits a sinusoidal signal to an upper level of +3V and a lower level of -2V.","pair_ids":["60a43c92259deb84","9c935e09c3a9f42e","1680838cd3abe804","a56eb67feab9ea45","cbbf3420568bdb9a"],"prompts":["Design a diode clipper that limits a sinusoidal signal to an upper level of +3V and a lower level of -2V.","Create a window limiter with asymmetric thresholds using two diodes and bias voltages.","I need a circuit that clips an AC signal above +3.2V and below -2.2V using 1N4148 diodes.","Build a precision diode limiter with a positive clamp at +3.1V and a negative clamp at -2.1V.","How can I use diodes to restrict a signal to a range from -2V to +3V?"],"measurements":[{"name":"vmin","key":"vmin","index":0,"value":-2.177557253627425,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 TRAN"},{"name":"vmax","key":"vmax","index":0,"value":3.1618935776981014,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:05958_381a488709a78cad:c684f868408bfd81","source":"deepseek","example_id":"05958_381a488709a78cad","test_name":"test_test_5958_nmos_source_follower_linear_regulator_simple_381a488709a78cad","netlist_hash":"c684f868408bfd81","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"NMOS source\u2011follower linear regulator with ideal op\u2011amp feedback","pair_ids":["ac7eb9cc4172a3b7","e417addadfe69597","cbb8a89190324507"],"prompts":["NMOS source\u2011follower linear regulator with ideal op\u2011amp feedback","Output set to 5 V by resistive divider (R1=R2=10k) and 2.5 V reference","Pass transistor M1 correctly wired as source follower (drain=Vin, source=Vout, bulk=Vout)"],"measurements":[{"name":"linereg","key":"linereg","index":0,"value":3.866589395329356e-07,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#2 DC"},{"name":"Vout_8V","key":"Vout_8V","index":0,"value":4.9998254944512155,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"Vout_12V","key":"Vout_12V","index":0,"value":4.999827084480785,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"Vout_10V","key":"Vout_10V","index":0,"value":4.999826311162906,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"}]} +{"id":"deepseek:04538_5bdc53e93e76f1be:e14ad68250c19327","source":"deepseek","example_id":"04538_5bdc53e93e76f1be","test_name":"test_test_4538_op_amp_voltage_follower_5bdc53e93e76f1be","netlist_hash":"e14ad68250c19327","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"High-precision voltage follower using an E-source with open-loop gain of 1e6 and a 47k load resistor.","pair_ids":["006cdc8182a9eda1","0c0c9058ac5fdbb1","812c8ff82df525c4"],"prompts":["High-precision voltage follower using an E-source with open-loop gain of 1e6 and a 47k load resistor.","Unity-gain buffer with near-ideal DC and AC performance.","Designed to demonstrate very low gain error and phase shift."],"measurements":[{"name":"PH10k","key":"PH10k","index":0,"value":0,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"G10k","key":"G10k","index":0,"value":-8.685885294592015e-06,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"VOUT_DC","key":"VOUT_DC","index":0,"value":0.49999950000050003,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 OP"}]} +{"id":"deepseek:05959_dc58d35ba6904148:d45920b1a7db3ad2","source":"deepseek","example_id":"05959_dc58d35ba6904148","test_name":"test_test_5959_nmos_source_follower_regulator_with_depletion_load_dc58d35ba6904148","netlist_hash":"d45920b1a7db3ad2","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"NMOS source-follower linear regulator using enhancement NMOS pass transistor and depletion NMOS constant-current load","pair_ids":["fc3a6db86ee95f00","95df5cf4d6e2334b","6e96fd3ec1baa734","888dd9acf6192f5d"],"prompts":["NMOS source-follower linear regulator using enhancement NMOS pass transistor and depletion NMOS constant-current load","Error amplifier modeled as high-gain E source comparing reference voltage to feedback divider","Corrected pass transistor connection to drain at VIN, source at output with bulk to source","Feedback network sets output to 5V with VREF=2.5V and equal resistors"],"measurements":[{"name":"Vout_9V","key":"Vout_9V","index":0,"value":4.999927242752165,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"linereg","key":"linereg","index":0,"value":7.08969309926033e-08,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#2 DC"},{"name":"Vout_8V","key":"Vout_8V","index":0,"value":4.9999271699925885,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"Vout_10V","key":"Vout_10V","index":0,"value":4.999927313649096,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"}]} +{"id":"deepseek:06963_7e3e06ee6a70fa9d:96bbb39a119a6eed","source":"deepseek","example_id":"06963_7e3e06ee6a70fa9d","test_name":"test_test_6963_continuous_time_1st_order_sigma_delta_modulator_with_square_wave_input_7e3e06ee6a70fa9d","netlist_hash":"96bbb39a119a6eed","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"First-order continuous-time sigma-delta modulator using an ideal op-amp integrator and a smooth hyperbolic tangent comparator/DAC.","pair_ids":["8e1077f3d519237d","dc62cdfe16c75fd7","a1c5fac1999323af"],"prompts":["First-order continuous-time sigma-delta modulator using an ideal op-amp integrator and a smooth hyperbolic tangent comparator/DAC.","Input is a 0\u20130.5V square wave with 50% duty cycle and 100\u03bcs period. The integrator sums the input current and the feedback current, producing a ramp that controls the comparator.","The DAC output voltage is passed through a tanh function to provide smooth switching and avoid convergence issues."],"measurements":[{"name":"vout_avg","key":"vout_avg","index":0,"value":-0.22823749395722895,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 tran"}]} +{"id":"deepseek:02513_719219b9e7844a6b:719219b9e7844a6b","source":"deepseek","example_id":"02513_719219b9e7844a6b","test_name":"test_test_2513_asymmetric_window_diode_limiter_719219b9e7844a6b","netlist_hash":"719219b9e7844a6b","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"Generate a diode limiter that clamps positive peaks at +4.6V and negative peaks at -2.6V.","pair_ids":["056940178cde0b0b","4f981cc7df2aea2b","a2df1a251f356641","66fb3468e83dae5e","c5c8760f33925a74"],"prompts":["Generate a diode limiter that clamps positive peaks at +4.6V and negative peaks at -2.6V.","I need a circuit that restricts a 7V amplitude sine wave to a range of -2.6V to +4.6V.","Create an asymmetric window clipper using two diodes and +4V/-2V bias supplies.","Build a precision signal limiter with upper threshold +4.5V and lower threshold -2.5V.","Design a diode-based voltage clipper for a bipolar input with different clipping levels."],"measurements":[{"name":"vmin","key":"vmin","index":0,"value":-2.690792547949671,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 TRAN"},{"name":"vmax","key":"vmax","index":0,"value":4.670244484249043,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00993_f7b5a3abf8e23d99:7424c16dde1cb60e","source":"deepseek","example_id":"00993_f7b5a3abf8e23d99","test_name":"test_test_993_cmos_inverter_transient_5v_f7b5a3abf8e23d99","netlist_hash":"7424c16dde1cb60e","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"Simulate a CMOS inverter with a 5V supply, 10u/1u NMOS and 20u/1u PMOS, 1pF load, and an input pulse from 0 to 5V. Measure the high-to-low and low-to-high propagation delays.","pair_ids":["4e135fe433a24c0c","2266c36177c08d77","322d926e5dd58b07","c2192e5b20be150b","d9543cce680bc44b"],"prompts":["Simulate a CMOS inverter with a 5V supply, 10u/1u NMOS and 20u/1u PMOS, 1pF load, and an input pulse from 0 to 5V. Measure the high-to-low and low-to-high propagation delays.","Create a SPICE netlist for a standard CMOS inverter. Use a 5V supply, a 0 to 5V pulse input with 100ps rise/fall times, and measure tphl and tplh.","Generate a transient simulation of a CMOS inverter switching at 5V. Include appropriate MOSFET models, a pulse source, and extract propagation delays.","Netlist a CMOS inverter with a 5V rail, size the NMOS at W=10u L=1u and PMOS at W=20u L=1u, drive a 1pF capacitor, and report switching delays.","Produce a 5V CMOS inverter netlist with a 50% duty-cycle pulse input and measure the output transition delays."],"measurements":[{"name":"tphl","key":"tphl","index":0,"value":1.5378608904972597e-10,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 tran"},{"name":"tplh","key":"tplh","index":0,"value":1.5359725242336531e-10,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 tran"}]} +{"id":"deepseek:00994_a96e5566067bdf62:0669d943ab14a751","source":"deepseek","example_id":"00994_a96e5566067bdf62","test_name":"test_test_994_cmos_inverter_transient_3_3v_a96e5566067bdf62","netlist_hash":"0669d943ab14a751","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"Simulate a 3.3V CMOS inverter with 5u/0.5u NMOS and 10u/0.5u PMOS, 0.5pF load, and a 0 to 3.3V pulse input. Measure the propagation delays tphl and tplh.","pair_ids":["9c75121203b98887","2d4add5748032d4e","ce4a7ef70ca3e67d","7658f722cf328715","195d5669a02834b2"],"prompts":["Simulate a 3.3V CMOS inverter with 5u/0.5u NMOS and 10u/0.5u PMOS, 0.5pF load, and a 0 to 3.3V pulse input. Measure the propagation delays tphl and tplh.","Generate a SPICE netlist for a CMOS inverter operating at 3.3V. Use a pulse source with 50ps rise/fall times and measure the 50% delay points.","Create a transient analysis of a low-voltage CMOS inverter. Use W=5u L=0.5u for the NMOS, W=10u L=0.5u for the PMOS, and a 0.5pF load capacitance. Report tphl and tplh.","Netlist a 3.3V CMOS inverter with smaller geometry devices, drive a 0.5pF load, and extract the propagation delays from a pulse response.","Produce a 3.3V CMOS inverter netlist with a 50% duty-cycle input and determine the switching delay metrics."],"measurements":[{"name":"tphl","key":"tphl","index":0,"value":1.0853847364435634e-10,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 tran"},{"name":"tplh","key":"tplh","index":0,"value":1.3542760640508476e-10,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 tran"}]} +{"id":"deepseek:00995_2297ee4ba51eab40:0f5a454dfd9b5a1a","source":"deepseek","example_id":"00995_2297ee4ba51eab40","test_name":"test_test_995_cmos_inverter_transient_1_8v_2297ee4ba51eab40","netlist_hash":"0f5a454dfd9b5a1a","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"Simulate a 1.8V CMOS inverter using an NMOS with W=2u L=0.18u and a PMOS with W=4u L=0.18u, driving a 100fF load. Measure tphl and tplh from a 0\u20131.8V pulse.","pair_ids":["cd897ebca0fbae80","6ead8e49e7fa22e9","8933de1d32990565","50ef96bbc0ff23b8","a3c20c0215181b34"],"prompts":["Simulate a 1.8V CMOS inverter using an NMOS with W=2u L=0.18u and a PMOS with W=4u L=0.18u, driving a 100fF load. Measure tphl and tplh from a 0\u20131.8V pulse.","Generate a 1.8V CMOS inverter SPICE netlist. Use a pulse input with 20ps edges and a 2ns pulse width. Report the propagation delays.","Perform a transient analysis on a deep-submicron CMOS inverter. Set VDD=1.8V, W/L ratios as specified, and load=100fF. Extract the switching delays.","Netlist a low-power 1.8V CMOS inverter with minimum-length devices, a 100fF load, and measure the delay parameters.","Create a 1.8V CMOS inverter simulation with a 50% duty-cycle pulse and compute tphl and tplh."],"measurements":[{"name":"tphl","key":"tphl","index":0,"value":2.599186339659217e-11,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 tran"},{"name":"tplh","key":"tplh","index":0,"value":3.197580053017483e-11,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 tran"}]} +{"id":"deepseek:01108_bed4bbbeab592669:79375b9f0dc9092a","source":"deepseek","example_id":"01108_bed4bbbeab592669","test_name":"test_test_1108_opamp_summing_2_bed4bbbeab592669","netlist_hash":"79375b9f0dc9092a","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"Summing amplifier with three inputs: two DC inputs (0.1V and 0.2V) and one AC-coupled input (0V DC, 1V AC).","pair_ids":["465ef605dbc6c9ed","21ff65dbaaebbbb6","8081c95b257c7507","582c6703faa34052","a7d42ca105e2aa3d"],"prompts":["Summing amplifier with three inputs: two DC inputs (0.1V and 0.2V) and one AC-coupled input (0V DC, 1V AC).","Uses an ideal opamp (E-source) with gain 1e5.","Input resistors: 1k, 2k, 4k; feedback resistor: 8k.","DC output should be -1.6 V.","AC gain from V3 at 1 Hz should be -2 (6.02 dB)."],"measurements":[{"name":"ac_gain","key":"ac_gain","index":0,"value":6.019297127540401,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"vout","key":"vout","index":0,"value":-1.5997600359946007,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"}]} +{"id":"deepseek:01109_93b7d1366d202387:4c899cefd2b2413f","source":"deepseek","example_id":"01109_93b7d1366d202387","test_name":"test_test_1109_opamp_summing_3_93b7d1366d202387","netlist_hash":"4c899cefd2b2413f","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Three-input inverting summing amplifier with ideal op-amp (E1), all resistors 20k, load resistor 10k.","pair_ids":["a6a79a4d5732db5b","9c5f8e66f49adad7","c56edf72cdf9ed13"],"prompts":["Three-input inverting summing amplifier with ideal op-amp (E1), all resistors 20k, load resistor 10k.","DC input voltages: 0.5V (V1), -0.2V (V2), 0.3V (V3). V2 also carries an AC 1V source.","Analysis includes a DC sweep at a single point (V1=0.5V) for .MEAS DC compatibility and an AC decade sweep from 1 Hz to 10 kHz."],"measurements":[{"name":"ac_gain","key":"ac_gain","index":0,"value":-0.0003474286369959242,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"vout","key":"vout","index":0,"value":-0.5999760009599615,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"}]} +{"id":"deepseek:04287_ec26db29cfa37aac:b27a4bc2728e95b6","source":"deepseek","example_id":"04287_ec26db29cfa37aac","test_name":"test_test_4287_1_8v_to_3_3v_nmos_pass_transistor_level_shifter_ec26db29cfa37aac","netlist_hash":"b27a4bc2728e95b6","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Non-inverting level shifter uses an NMOS pass transistor with gate tied to the low-side supply (1.8V). Input signal applied to source, drain connected to high-side supply (3.3V) via a pull-up resistor.","pair_ids":["b1fcfe8b1597510f","3666bc74aada4697","dca99248a0bc7ddc","46f2f7e0ea4dd60f"],"prompts":["Non-inverting level shifter uses an NMOS pass transistor with gate tied to the low-side supply (1.8V). Input signal applied to source, drain connected to high-side supply (3.3V) via a pull-up resistor.","When input is low (0V), VGS = 1.8V > Vt, NMOS turns on, pulling drain (output) low to near 0V.","When input is high (1.8V), VGS = 0V, NMOS is off, and the pull-up resistor pulls output high to VDDH (3.3V), achieving level shifting without inversion.","Original netlist incorrectly connected gate to VDDH (3.3V), causing the transistor to remain on and output to never reach a valid high level. Fixing gate to VDDL restores proper operation."],"measurements":[{"name":"vout_high","key":"vout_high","index":0,"value":3.2999999669,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 tran"},{"name":"vout_rise","key":"vout_rise","index":0,"value":5.0883390609949e-10,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 tran"},{"name":"vout_low","key":"vout_low","index":0,"value":0.15351503146761655,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 tran"}]} +{"id":"deepseek:04507_0f9536a6510c6f15:1354ad7d74f60379","source":"deepseek","example_id":"04507_0f9536a6510c6f15","test_name":"test_test_4507_n_jfet_idss_current_source_0f9536a6510c6f15","netlist_hash":"1354ad7d74f60379","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"N-channel JFET with gate and source tied to ground","pair_ids":["581b4f42d640d65a","f6ca08ad865f8f68","0226f5c0ef31f68e","85e14e94f7b5f89d"],"prompts":["N-channel JFET with gate and source tied to ground","Drain connected to 15V supply through 2.2k\u03a9 load resistor","Operates as a constant current source (Idss) in saturation","Simulated with DC sweep to verify current independence from supply voltage"],"measurements":[{"name":"I12","key":"I12","index":0,"value":0.00400000000321,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 DC"},{"name":"I15","key":"I15","index":0,"value":0.0040000000062100005,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 DC"}]} +{"id":"deepseek:00567_9e11d3ee06eb51f7:9e11d3ee06eb51f7","source":"deepseek","example_id":"00567_9e11d3ee06eb51f7","test_name":"test_test_567_diode_or_3input_9e11d3ee06eb51f7","netlist_hash":"9e11d3ee06eb51f7","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"Design a 3-input diode OR gate using 1N4148 diodes and a 1k pull-down resistor. Simulate with three pulse inputs to verify OR logic.","pair_ids":["ed9accb22483e328","97752bffeae842df","0dc4674419289334","821cea4261b4394b","09905db3af4954ec"],"prompts":["Design a 3-input diode OR gate using 1N4148 diodes and a 1k pull-down resistor. Simulate with three pulse inputs to verify OR logic.","Create a SPICE netlist for a diode-based three-input OR gate with transient analysis. Use PULSE sources with different delays.","Implement a diode-resistor OR gate for three digital inputs. Include a .MODEL for the diodes and run a .TRAN simulation to verify output.","Build a three-input diode OR circuit and measure the high and low output voltages during a transient sweep with overlapping input pulses.","Write a netlist for a diode OR gate with three inputs. Use a 1N4148 model and 1k resistor, and confirm the output goes high when any input is high."],"measurements":[{"name":"vout_high","key":"vout_high","index":0,"value":4.6076877266907745,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"},{"name":"vout_low","key":"vout_low","index":0,"value":-3.7680561509351264e-22,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00568_98a558b20a6256c9:98a558b20a6256c9","source":"deepseek","example_id":"00568_98a558b20a6256c9","test_name":"test_test_568_diode_or_3input_98a558b20a6256c9","netlist_hash":"98a558b20a6256c9","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"Construct a 3-input diode OR gate with a 10k pull-down resistor and a custom diode model. Use 3.3V inputs and verify logic levels.","pair_ids":["99c60efe49106b76","481aa4e7a6ddd23b","bbd681ad54ae64cd","1b0f7c2f37ea5ddb","b2c17828d3be6174"],"prompts":["Construct a 3-input diode OR gate with a 10k pull-down resistor and a custom diode model. Use 3.3V inputs and verify logic levels.","Model a three-input diode OR gate using 3.3V logic levels. Simulate transient response with non-overlapping pulses and measure output high and low.","Create a SPICE deck for a three-input diode OR circuit with a 10k resistor. Inputs are 3.3V PULSE sources. Determine the maximum and minimum output voltages.","Design a diode OR gate with three inputs using a generic diode model (IS=1e-9). Perform a transient simulation and check the output voltage range.","Write a netlist for a 3-input OR gate made of diodes and a pull-down resistor. Use 3.3V supply, measure the output's peak and valley."],"measurements":[{"name":"vout_high","key":"vout_high","index":0,"value":2.972660850780802,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"},{"name":"vout_low","key":"vout_low","index":0,"value":2.923472287920984e-24,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00569_5b2f23eeb66eaefa:5b2f23eeb66eaefa","source":"deepseek","example_id":"00569_5b2f23eeb66eaefa","test_name":"test_test_569_diode_or_3input_5b2f23eeb66eaefa","netlist_hash":"5b2f23eeb66eaefa","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"Simulate a three-input diode OR gate where one input is always low and the other two are pulsed. Measure the output at specific times to confirm correct OR operation.","pair_ids":["02bb968779a7cda3","345bf5247b041b86","cebac4e4f144a9a2","2d3564baecb13cee","6fe6cc7fb76b5e39"],"prompts":["Simulate a three-input diode OR gate where one input is always low and the other two are pulsed. Measure the output at specific times to confirm correct OR operation.","Design a diode OR gate with one DC-grounded input and two pulsed inputs. Use a 1N4148 model and a 1k pull-down. Verify that the output follows the OR logic of the active inputs.","Create a SPICE netlist for a three-input diode OR gate, with IN1 held low, IN2 pulsing from 1us to 2us, and IN3 from 2us to 3us. Measure voltage at 0.5us, 1.5us, 2.5us, and 3.5us.","Build a diode-resistor OR gate with a constant low on one input and pulse trains on the other two. Use transient analysis and .MEAS statements to verify proper high and low output states at key times.","Write a netlist for a three-input diode OR logic gate with mixed DC and pulsed inputs. Confirm the output is low only when all inputs are low and high otherwise."],"measurements":[{"name":"vout_at_1p5u","key":"vout_at_1p5u","index":0,"value":4.573517333921353,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"vout_at_0p5u","key":"vout_at_0p5u","index":0,"value":2.4281677198388068e-126,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"vout_at_3p5u","key":"vout_at_3p5u","index":0,"value":-4.3993546248742035e-115,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"vout_at_2p5u","key":"vout_at_2p5u","index":0,"value":4.57351733392135,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:05953_bdfbe25df3b0d6f9:1904833314613fdf","source":"deepseek","example_id":"05953_bdfbe25df3b0d6f9","test_name":"test_test_5953_nmos_source_follower_regulator_load_bdfbe25df3b0d6f9","netlist_hash":"1904833314613fdf","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"NMOS source-follower linear regulator with op-amp feedback to maintain 1.8 V output.","pair_ids":["538cfe089fa97f1f","7644eb918b806105","e6cc05f7bbaa5435"],"prompts":["NMOS source-follower linear regulator with op-amp feedback to maintain 1.8 V output.","DC sweep of load current from 0.1 A to 1 A to evaluate load regulation.","Measures VOUT at light and full load, and calculates percentage load regulation."],"measurements":[{"name":"LOAD_REG","key":"LOAD_REG","index":0,"value":-0.002638329681647793,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#2 DC"},{"name":"VOUT_MAX","key":"VOUT_MAX","index":0,"value":1.7998899467202136,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"VOUT_MIN","key":"VOUT_MIN","index":0,"value":1.7999374350038124,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"}]} +{"id":"deepseek:05954_0acdb82ff831aaf1:4c94a3978eb355e9","source":"deepseek","example_id":"05954_0acdb82ff831aaf1","test_name":"test_test_5954_nmos_source_follower_regulator_finite_gain_0acdb82ff831aaf1","netlist_hash":"4c94a3978eb355e9","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"5V NMOS source-follower regulator with 2.5V reference and finite op-amp gain of 1000.","pair_ids":["66651a8fde4c2373","96120073eb14c103","1091913332a4445d"],"prompts":["5V NMOS source-follower regulator with 2.5V reference and finite op-amp gain of 1000.","Feedback divider R1/R2 sets VOUT \u2248 5V; op-amp E1 drives NMOS gate, bulk tied to source to avoid parasitic diode.","Fixed bulky connection from VDD to VOUT to prevent forward-biased bulk-source diode (previous 6.22V output caused by diode pull-up)."],"measurements":[{"name":"VOUT_7V","key":"VOUT_7V","index":0,"value":4.987174731581035,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"VOUT_MIN","key":"VOUT_MIN","index":0,"value":4.9871387053844956,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"VGATE_7V","key":"VGATE_7V","index":0,"value":6.412634209445514,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"}]} +{"id":"deepseek:05274_e1a5081f52ed644f:6fb9e334d7567ce0","source":"deepseek","example_id":"05274_e1a5081f52ed644f","test_name":"test_test_5274_sallen_key_chebyshev_low_pass_filter_unity_gain_1db_ripple_1khz_e1a5081f52ed644f","netlist_hash":"6fb9e334d7567ce0","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Design a 4th-order Chebyshev low-pass filter with 1dB passband ripple and 1kHz cutoff frequency (ripple bandwidth).","pair_ids":["97abc0291d764dbd","3a14864cc7213e87","027eb57cb83ea25d","bbb9d797644fadaa"],"prompts":["Design a 4th-order Chebyshev low-pass filter with 1dB passband ripple and 1kHz cutoff frequency (ripple bandwidth).","Use unity-gain Sallen-Key topology with equal resistors (10k\u03a9) and compute capacitor values from Chebyshev pole locations.","Simulate AC analysis from 10Hz to 1MHz.","Measure DC gain at 10Hz, -3dB frequency, and linear magnitude at 10kHz."],"measurements":[{"name":"att_10k","key":"att_10k","index":0,"value":3.8297665446513617e-05,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"f3db","key":"f3db","index":0,"value":1083.1760509228782,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 AC"},{"name":"dc_gain","key":"dc_gain","index":0,"value":1.0000670393372963,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:04288_dcbbf3082a6cf35d:07d7e5af1bb6b4d0","source":"deepseek","example_id":"04288_dcbbf3082a6cf35d","test_name":"test_test_4288_1_5v_to_5v_nmos_pass_transistor_level_shifter_with_load_cap_dcbbf3082a6cf35d","netlist_hash":"07d7e5af1bb6b4d0","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"1.5V to 5V level shifter using an NMOS pass transistor with gate tied to VDDL (1.5V).","pair_ids":["4712222767d4e922","239d3113a70808d7","debe506b4ab7cb12","ff677b2561efa378","2c9f1234f06c46b9"],"prompts":["1.5V to 5V level shifter using an NMOS pass transistor with gate tied to VDDL (1.5V).","When input Vin is low (0V), Vgs=1.5V, NMOS turns on and pulls output low through its low on\u2011resistance.","When input Vin is high (1.5V), Vgs=0, NMOS turns off, and the pull\u2011up resistor R1 charges the 5pF load capacitor to VDDH (5V).","The large W/L ratio (50U/0.5U) ensures output low is <0.2V against the 4.7k\u03a9 pull\u2011up.","Rise time is dominated by the RC constant (4.7k\u03a9 \u00d7 5pF = 23.5ns), giving a measured rise time around 50ns."],"measurements":[{"name":"vout_high","key":"vout_high","index":0,"value":5.000435627819618,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 tran"},{"name":"vout_rise","key":"vout_rise","index":0,"value":3.4783662160068786e-08,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 tran"},{"name":"vout_low","key":"vout_low","index":0,"value":0.047448491943183325,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 tran"}]} +{"id":"deepseek:02088_c512a7ab23886084:dbccbf5289657243","source":"deepseek","example_id":"02088_c512a7ab23886084","test_name":"test_test_2088_passive_rlc_ladder_c512a7ab23886084","netlist_hash":"dbccbf5289657243","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"Third-order Bessel low-pass filter with 50 \u03a9 input and output impedance.","pair_ids":["2eb918bb4d151f10","92e186b14da1dba9","5f72f2803adeb60c","560807ac252dab2d","01a890a43ff4e57d"],"prompts":["Third-order Bessel low-pass filter with 50 \u03a9 input and output impedance.","Utilizes a T-topology ladder: series L1, shunt C1, series L2.","Component values denormalized from standard Bessel prototypes for a 10 MHz cutoff.","Expected -3 dB bandwidth close to 10 MHz and flat group delay in passband.","Double termination introduces a 6 dB insertion loss."],"measurements":[{"name":"bw","key":"bw","index":0,"value":10004587.386224158,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 AC"},{"name":"gainmax","key":"gainmax","index":0,"value":-6.020867553577101,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 AC"}]} +{"id":"deepseek:02090_b307d62fd61c78e9:544e416b409bf92c","source":"deepseek","example_id":"02090_b307d62fd61c78e9","test_name":"test_test_2090_passive_rlc_ladder_b307d62fd61c78e9","netlist_hash":"544e416b409bf92c","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Third-order Bessel low-pass filter in pi-network configuration","pair_ids":["164f78afde72c390","760833e5e2118dfa","2036e159d3c950d5","cbe5df633807a27c"],"prompts":["Third-order Bessel low-pass filter in pi-network configuration","75 ohm source and load terminations","5 MHz cutoff frequency","Provides flat group delay and 6 dB insertion loss"],"measurements":[{"name":"bw","key":"bw","index":0,"value":5227167.504411177,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 AC"},{"name":"gainmax","key":"gainmax","index":0,"value":-6.021408567374152,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 AC"}]} +{"id":"deepseek:04383_9133755148087758:d1425fbd00059d8c","source":"deepseek","example_id":"04383_9133755148087758","test_name":"test_test_4383_cmos_ring_oscillator_with_pulsed_supply_9133755148087758","netlist_hash":"d1425fbd00059d8c","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Create a SPICE netlist for a 3-stage CMOS ring oscillator using a pulsed 5V supply to kickstart oscillation. Include load capacitors and measure the oscillation frequency.","pair_ids":["da9f1118fa419941","9825105a23606f8f","9355748ef91d8135"],"prompts":["Create a SPICE netlist for a 3-stage CMOS ring oscillator using a pulsed 5V supply to kickstart oscillation. Include load capacitors and measure the oscillation frequency.","Design a ring oscillator in CMOS with three inverters. Use a VDD source that pulses from 0 to 5V to initiate operation. Add 0.1pF capacitors on each stage and measure the period.","Simulate a CMOS ring oscillator with a pulsed supply. The circuit should have three inverter stages, each with NMOS and PMOS transistors. Measure the steady-state frequency of the output."],"measurements":[{"name":"t2","key":"t2","index":0,"value":7.350698474976215e-09,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 TRAN"},{"name":"period","key":"period","index":0,"value":2.0000000000329405e-09,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 TRAN"},{"name":"t1","key":"t1","index":0,"value":5.350698474943274e-09,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 TRAN"},{"name":"freq","key":"freq","index":0,"value":499999999.99176484,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:04384_b2765d06a6182966:9016a0e1830569ae","source":"deepseek","example_id":"04384_b2765d06a6182966","test_name":"test_test_4384_cmos_ring_oscillator_with_enable_switch_b2765d06a6182966","netlist_hash":"9016a0e1830569ae","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"3.3V CMOS ring oscillator with three inverters and an NMOS enable switch on the virtual ground","pair_ids":["bd0407048705c8bd","44e376688c5d733a","92d4958a0a07b489"],"prompts":["3.3V CMOS ring oscillator with three inverters and an NMOS enable switch on the virtual ground","Enable signal from a pulsed voltage source turns on at 2ns, allowing oscillation to start","Load capacitors of 0.2pF each slow down the oscillators, target frequency around 300MHz"],"measurements":[{"name":"period","key":"period","index":0,"value":2.4996273223041323e-09,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 TRAN"},{"name":"freq","key":"freq","index":0,"value":400059637.3215387,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:04385_4b93f451d909f969:826f987877fb9b0e","source":"deepseek","example_id":"04385_4b93f451d909f969","test_name":"test_test_4385_cmos_ring_oscillator_with_low_supply_voltage_4b93f451d909f969","netlist_hash":"826f987877fb9b0e","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"3\u2011stage CMOS ring oscillator with small load capacitors (0.05 pF each).","pair_ids":["9bf887f35df63053","95517a5c60270e7a","2d041782eae70dfe","553552112cfa38e8","742c0891d5bbecbe"],"prompts":["3\u2011stage CMOS ring oscillator with small load capacitors (0.05 pF each).","Supply voltage is a 2.5\u202fV pulse with 0.1\u202fns rise time.","Initial conditions on nodes n1, n2, and out break symmetry and kick\u2011start oscillation.","Feedback is provided by a 0\u202fV voltage source (Vfb) connecting output to input.","Transient analysis runs for 20\u202fns with a 2\u202fps time step."],"measurements":[{"name":"t2","key":"t2","index":0,"value":3.3032520209123087e-09,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 TRAN"},{"name":"period","key":"period","index":0,"value":4.667653535625943e-10,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 TRAN"},{"name":"t1","key":"t1","index":0,"value":2.8364866673497144e-09,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 TRAN"},{"name":"freq","key":"freq","index":0,"value":2142404084.552299,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:02385_42bac50607f0c692:4e44e2cfd1cb54e8","source":"deepseek","example_id":"02385_42bac50607f0c692","test_name":"test_test_2385_diode_peak_detector_42bac50607f0c692","netlist_hash":"4e44e2cfd1cb54e8","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"Design a simple diode peak detector with a bleed resistor to capture the envelope of a sine wave.","pair_ids":["52b99988843ae11c","708199ef3f921c7b","b8d5e23a96671dfe","625b621bfe6cb52d","85e15e3ef6e46552"],"prompts":["Design a simple diode peak detector with a bleed resistor to capture the envelope of a sine wave.","Create a circuit that holds the peak of an AC signal using a diode, capacitor, and resistor.","Implement a basic envelope detector for a 1 kHz sine wave, using a 1N4148-like diode.","Build a peak detector with a bleed resistor to slowly discharge the capacitor.","Make a diode peak detector that outputs the maximum voltage of an input sine wave."],"measurements":[{"name":"vout_avg","key":"vout_avg","index":0,"value":1.2642248698439962,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 tran"},{"name":"vout_max","key":"vout_max","index":0,"value":1.6324762499961079,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 tran"}]} +{"id":"deepseek:00235_14c75d5c555ed8e4:e7e91d5c30310ea5","source":"deepseek","example_id":"00235_14c75d5c555ed8e4","test_name":"test_test_235_rl_low_pass_filter_2_14c75d5c555ed8e4","netlist_hash":"e7e91d5c30310ea5","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"RL low-pass filter with series inductor and shunt resistor.","pair_ids":["23e947c8d0552ddb","12dea0efb2b11be5","b3b235f5566029ca"],"prompts":["RL low-pass filter with series inductor and shunt resistor.","R = 470 ohms, L = 100 mH","AC analysis from 10 Hz to 100 kHz"],"measurements":[{"name":"fcut","key":"fcut","index":0,"value":746.2555742274906,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 AC"},{"name":"gain_dc","key":"gain_dc","index":0,"value":-0.0007760854248176723,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:00236_77114b79ca41244f:1938a0bd938c6210","source":"deepseek","example_id":"00236_77114b79ca41244f","test_name":"test_test_236_rl_low_pass_filter_3_77114b79ca41244f","netlist_hash":"1938a0bd938c6210","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"RL low-pass filter with series 1 mH inductor and shunt 10 k\u03a9 resistor.","pair_ids":["0e34bf8786d84191","84fff52d8762482e","b762b833afd8b622"],"prompts":["RL low-pass filter with series 1 mH inductor and shunt 10 k\u03a9 resistor.","AC analysis from 100 Hz to 10 MHz with 100 points per decade.","Measures DC gain and -3 dB cutoff frequency."],"measurements":[{"name":"dc_gain","key":"dc_gain","index":0,"value":-1.7145259244178395e-08,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"cutoff","key":"cutoff","index":0,"value":1587774.9508384373,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 AC"}]} +{"id":"deepseek:02796_61d7ed99796873d2:5227698419eddd77","source":"deepseek","example_id":"02796_61d7ed99796873d2","test_name":"test_test_2796_greinacher_voltage_tripler_61d7ed99796873d2","netlist_hash":"5227698419eddd77","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Greinacher Voltage Tripler using three diodes and three capacitors","pair_ids":["956117e03ef4e16d","2c3a776bc953e418","8bd7a8cdfdc21ba9"],"prompts":["Greinacher Voltage Tripler using three diodes and three capacitors","Input: 10V peak, 1kHz sine wave","Output expected around 3x input peak minus diode drops"],"measurements":[{"name":"vout_min","key":"vout_min","index":0,"value":22.327340695255884,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 TRAN"},{"name":"vout_avg","key":"vout_avg","index":0,"value":31.02253327982953,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 TRAN"},{"name":"vout_max","key":"vout_max","index":0,"value":31.701811139621192,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:02387_6067a139b4f06672:553b2584243e72e4","source":"deepseek","example_id":"02387_6067a139b4f06672","test_name":"test_test_2387_diode_peak_detector_6067a139b4f06672","netlist_hash":"553b2584243e72e4","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Peak detector circuit with diode, capacitor, and resistor.","pair_ids":["13c998df3e066d5a","4559b2767171ad4c","80ce556d9f86cecd","a68228a1caf7697d"],"prompts":["Peak detector circuit with diode, capacitor, and resistor.","Uses 10 kHz sinusoidal input with 2V amplitude.","Diode model has IS=1e-14 A and RS=100 \u03a9 for a forward drop of about 0.5V.","RC time constant (20k\u03a9, 10nF) is 200 \u00b5s, equal to two periods, creating visible ripple."],"measurements":[{"name":"vout_min","key":"vout_min","index":0,"value":0.9023852572461659,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 tran"},{"name":"vout_max","key":"vout_max","index":0,"value":1.6723850871208756,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 tran"}]} +{"id":"deepseek:00459_78855fdd12e8a9ab:8948fd2b6e28c1a8","source":"deepseek","example_id":"00459_78855fdd12e8a9ab","test_name":"test_test_459_symmetric_diode_clipper_78855fdd12e8a9ab","netlist_hash":"8948fd2b6e28c1a8","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Design a symmetric diode clipper that limits a 5V 1kHz sine wave to about \u00b10.7V using two anti-parallel diodes. Simulate for 5ms and measure the peak output voltage.","pair_ids":["1f1f54cb83eacf4f","14f11d8e075634e7","66c0b29cd59a8b29"],"prompts":["Design a symmetric diode clipper that limits a 5V 1kHz sine wave to about \u00b10.7V using two anti-parallel diodes. Simulate for 5ms and measure the peak output voltage.","Create a SPICE netlist of a clipping circuit with a series resistor and two diodes connected back-to-back to ground. Apply a sinusoidal input of 5V amplitude at 1kHz and measure the maximum and minimum output voltages.","Generate a symmetric diode clipper circuit that clips the output voltage symmetrically to ground. Use a transient analysis to verify the clipping levels."],"measurements":[{"name":"vmin","key":"vmin","index":0,"value":-0.695822505900451,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 tran"},{"name":"vmax","key":"vmax","index":0,"value":0.695822505900451,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 tran"}]} +{"id":"deepseek:00460_c209024afb2ae112:91701357195631a1","source":"deepseek","example_id":"00460_c209024afb2ae112","test_name":"test_test_460_symmetric_diode_clipper_c209024afb2ae112","netlist_hash":"91701357195631a1","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Design a diode clipper with a 3V peak 10kHz sine input using a 100-ohm series resistor. The diodes should have a model with IS=1e-13 and N=1.1. Measure the output peaks over the last few cycles.","pair_ids":["8e71563b9dbaa592","1d40cb7e3668c4f6","35e98e66871c3fdc"],"prompts":["Design a diode clipper with a 3V peak 10kHz sine input using a 100-ohm series resistor. The diodes should have a model with IS=1e-13 and N=1.1. Measure the output peaks over the last few cycles.","Create a symmetric clipper where the input is 3V amplitude at 10kHz, and the series resistance is 100 ohms. Include a 1k load to ground. Verify that the output clips to about \u00b10.75V.","Simulate a symmetric diode clipping circuit with a 10kHz input. Use a different diode model to obtain a forward voltage of roughly 0.75V. Measure the maximum and minimum output voltages during steady-state."],"measurements":[{"name":"vmin","key":"vmin","index":0,"value":-0.7511047331659552,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 tran"},{"name":"vmax","key":"vmax","index":0,"value":0.7511047331659546,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 tran"}]} +{"id":"deepseek:00461_6dd54bcb361e6eb1:8f7b1e279597d7c5","source":"deepseek","example_id":"00461_6dd54bcb361e6eb1","test_name":"test_test_461_biased_symmetric_diode_clipper_6dd54bcb361e6eb1","netlist_hash":"8f7b1e279597d7c5","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Design a symmetric diode clipper with external 2V DC biases in series with each diode to shift the clipping levels. The input is a 10V peak 500Hz sine wave. Measure the peak positive and negative output voltages, expecting about \u00b12.7V.","pair_ids":["9aebc1009807cf1b","2adb3b15a2a5963e","984b8d815ec08ca2"],"prompts":["Design a symmetric diode clipper with external 2V DC biases in series with each diode to shift the clipping levels. The input is a 10V peak 500Hz sine wave. Measure the peak positive and negative output voltages, expecting about \u00b12.7V.","Create a clipping circuit where each diode is connected to a 2V DC source, so the output clips at \u00b1(2V + Vf). Apply a 10V peak 500Hz input and verify the clipping levels.","Generate a biased symmetric diode clipper. Use two 2V DC sources and a standard diode model. Simulate for 10ms and measure the output extremes."],"measurements":[{"name":"vmin","key":"vmin","index":0,"value":-2.712059052709034,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 tran"},{"name":"vmax","key":"vmax","index":0,"value":2.7120590527090336,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 tran"}]} +{"id":"deepseek:00810_fea623df9fff7a59:b90f34107725e7d2","source":"deepseek","example_id":"00810_fea623df9fff7a59","test_name":"test_test_810_darlington_buffer_with_resistive_load_fea623df9fff7a59","netlist_hash":"b90f34107725e7d2","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Design a Darlington pair buffer using two NPN transistors with a 12V supply. Apply a 1 kHz sine wave with 6V DC offset and verify the output DC level and AC amplitude.","pair_ids":["039c71beb25ff36b","41b28eb852ad234e","8a8cba7f3f6312b0"],"prompts":["Design a Darlington pair buffer using two NPN transistors with a 12V supply. Apply a 1 kHz sine wave with 6V DC offset and verify the output DC level and AC amplitude.","Create a voltage follower using a Darlington pair biased from a single 12V rail. Use an emitter resistor to ground. Confirm the buffer behavior for a small AC signal.","Simulate a Darlington pair buffer with VCC=12V, input sine of 6V offset and 0.5V amplitude, and 1k load resistor. Measure the output DC voltage and peak-to-peak swing."],"measurements":[{"name":"vout_min","key":"vout_min","index":0,"value":4.257611041487689,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#2 TRAN"},{"name":"vout_dc","key":"vout_dc","index":0,"value":4.751377837790544,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 TRAN"},{"name":"vout_max","key":"vout_max","index":0,"value":5.243538307810925,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#2 TRAN"},{"name":"vout_pp","key":"vout_pp","index":0,"value":0.9859272663232366,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#2 TRAN"}]} +{"id":"deepseek:00811_4f407c701b0dfb85:225ad30643ebb966","source":"deepseek","example_id":"00811_4f407c701b0dfb85","test_name":"test_test_811_darlington_buffer_with_dual_supply_and_base_resistor_4f407c701b0dfb85","netlist_hash":"225ad30643ebb966","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Design a Darlington pair buffer using two NPN transistors with a \u00b110V dual supply. Include a 100\u03a9 base resistor. Apply a 1 kHz sine wave with 0V offset and 1V amplitude, and verify output.","pair_ids":["8bdb8a7852ced898","27da6bb36dcd9f16","09e601690928a8bd"],"prompts":["Design a Darlington pair buffer using two NPN transistors with a \u00b110V dual supply. Include a 100\u03a9 base resistor. Apply a 1 kHz sine wave with 0V offset and 1V amplitude, and verify output.","Create a Darlington voltage follower with a dual-rail supply. Use a resistor from base to input and an emitter resistor to the negative rail. Check that the output follows the input with a voltage shift.","Simulate an NPN Darlington pair buffer with VCC=10V, VEE=-10V, an input sine of 0V DC and 1V amplitude, and a load resistor to VEE. Measure output DC level and peak-to-peak amplitude."],"measurements":[{"name":"vout_min","key":"vout_min","index":0,"value":-2.2698676946943457,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#2 TRAN"},{"name":"vout_dc","key":"vout_dc","index":0,"value":-1.2772075365709343,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 TRAN"},{"name":"vout_max","key":"vout_max","index":0,"value":-0.2882242288114101,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#2 TRAN"},{"name":"vout_pp","key":"vout_pp","index":0,"value":1.9816434658829356,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#2 TRAN"}]} +{"id":"deepseek:00812_d67bcd83712331ac:eea3484446b0cb1f","source":"deepseek","example_id":"00812_d67bcd83712331ac","test_name":"test_test_812_darlington_buffer_with_current_source_load_d67bcd83712331ac","netlist_hash":"eea3484446b0cb1f","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Design a Darlington pair buffer with a 15V supply and a 5mA current source load. Use a 10 kHz sine wave input with 7.5V offset and 0.2V amplitude.","pair_ids":["431a14df506a97ee","b9b0cd10129b8fea","aee79bafbe64197e"],"prompts":["Design a Darlington pair buffer with a 15V supply and a 5mA current source load. Use a 10 kHz sine wave input with 7.5V offset and 0.2V amplitude.","Build a Darlington follower using an ideal current source as the emitter load to improve bias stability. Input is a small 10kHz sine on a 7.5V DC level. Verify output DC and AC response.","Simulate an NPN Darlington buffer with VCC=15V, a 5mA ideal current sink from the output, and an input sine of 7.5V offset and 0.2V amplitude at 10kHz. Measure the output DC level and the amplitude of the output signal."],"measurements":[{"name":"vout_min","key":"vout_min","index":0,"value":6.050438044214526,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#2 TRAN"},{"name":"vout_dc","key":"vout_dc","index":0,"value":6.249821319921203,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 TRAN"},{"name":"vout_max","key":"vout_max","index":0,"value":6.449355733614551,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#2 TRAN"},{"name":"vout_pp","key":"vout_pp","index":0,"value":0.39891768940002503,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#2 TRAN"}]} +{"id":"deepseek:03725_411bdf207918bdc2:a1d3cc6ed8de714b","source":"deepseek","example_id":"03725_411bdf207918bdc2","test_name":"test_test_3725_bjt_monostable_10v_recovery_diode_411bdf207918bdc2","netlist_hash":"a1d3cc6ed8de714b","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Monostable triggered by negative edge on Q2 base via capacitor Ctrig; output taken at Q2 collector.","pair_ids":["d37ab5d18b0456ea","8ffafe159a0f3a28","a911b5eb24f0dd67","4d9577b10f116cad"],"prompts":["Monostable triggered by negative edge on Q2 base via capacitor Ctrig; output taken at Q2 collector.","Recovery diode Drec1 with series resistor Rrec provides fast recharge of timing capacitor C1 after the pulse.","Transistor Q2 normally on, Q1 off; trigger turns Q2 off and Q1 on, producing a positive output pulse of about 0.8 ms.","Timing set by R3 (75k) and C1 (15nF); diode path bypasses high\u2011impedance recharge route."],"measurements":[{"name":"pw","key":"pw","index":0,"value":0.0008312988562135355,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 TRAN"},{"name":"recovery_time","key":"recovery_time","index":0,"value":-1.524133838528511e-06,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:05265_39cc04782639a54c:cfdf12326db2cf40","source":"deepseek","example_id":"05265_39cc04782639a54c","test_name":"test_test_5265_active_filter_39cc04782639a54c","netlist_hash":"cfdf12326db2cf40","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Unity-gain Sallen-Key topology implementing a 2nd-order Chebyshev low-pass filter with 1 dB passband ripple.","pair_ids":["068b17d0ea6b3f1a","b552b0095571a2e5","418726669b46d79a"],"prompts":["Unity-gain Sallen-Key topology implementing a 2nd-order Chebyshev low-pass filter with 1 dB passband ripple.","The passband peaks at approximately 1 dB, and the -3 dB cutoff is set near 1 kHz.","Component values: R1=R2=10 k\u03a9, C1=37.94 nF, C2=10.36 nF. Op-amp modeled as ideal voltage-controlled voltage source with unity gain."],"measurements":[{"name":"att10k","key":"att10k","index":0,"value":-43.791037368099744,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"f3dB","key":"f3dB","index":0,"value":999.4051594751664,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 AC"},{"name":"dcgain","key":"dcgain","index":0,"value":6.117394801477312e-06,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"pkgain","key":"pkgain","index":0,"value":1.0015858956679724,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 AC"},{"name":"mingain","key":"mingain","index":0,"value":-0.293169877502815,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 AC"}]} +{"id":"deepseek:03279_c19a8775fd9872b6:1b7c8afcf22bdb36","source":"deepseek","example_id":"03279_c19a8775fd9872b6","test_name":"test_test_3279_cascode_bjt_mirror_deg_c19a8775fd9872b6","netlist_hash":"1b7c8afcf22bdb36","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Cascode BJT current mirror with emitter degeneration resistors (R1=R2=100 ohms).","pair_ids":["528ba7a1507c2ab8","53e76ccf91bb6fb6","61d14c2c0198ce43","532629812ab32794"],"prompts":["Cascode BJT current mirror with emitter degeneration resistors (R1=R2=100 ohms).","Reference side uses a diode-connected NPN (Q1) with emitter degeneration, fed by a 1mA ideal current source from VCC.","Output side uses an NPN mirror (Q2) with emitter degeneration and a cascode NPN (Q4) biased at 2.5V to increase output resistance.","Output current is measured at VOUT=5V and output resistance is extracted around 5V."],"measurements":[{"name":"Iref","key":"Iref","index":0,"value":0.001,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"Iout_low","key":"Iout_low","index":0,"value":0.0009752974232913048,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"Iout","key":"Iout","index":0,"value":0.0009753151895814105,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"Rout","key":"Rout","index":0,"value":5639194.007001957,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#2 DC"},{"name":"Ratio","key":"Ratio","index":0,"value":0.9753151895814105,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#2 DC"},{"name":"Iout_high","key":"Iout_high","index":0,"value":0.0009753328893525454,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"}]} +{"id":"deepseek:03280_edfaa67e5288239e:8706e48f4546cbf5","source":"deepseek","example_id":"03280_edfaa67e5288239e","test_name":"test_test_3280_cascode_bjt_mirror_selfbias_edfaa67e5288239e","netlist_hash":"8706e48f4546cbf5","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Self-biased cascode BJT current mirror using a diode stack (Q5-Q6) to bias cascode gates Q3 and Q4.","pair_ids":["871e4139de3a8551","5fd956271dfa352c","742d0c28e651f2a9"],"prompts":["Self-biased cascode BJT current mirror using a diode stack (Q5-Q6) to bias cascode gates Q3 and Q4.","Fixed SpiceSharpParser compatibility by inserting a zero-volt source Vmeas to measure output current positively, avoiding unsupported -I(VOUT) syntax.","Circuit provides a current mirror with high output resistance and ~1mA output current from a 1mA reference source."],"measurements":[{"name":"Iref","key":"Iref","index":0,"value":0.001,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"Iout","key":"Iout","index":0,"value":0.0009686306137894271,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"Rout","key":"Rout","index":0,"value":5128592.505554012,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#2 DC"},{"name":"Ratio","key":"Ratio","index":0,"value":0.968630613789427,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#2 DC"},{"name":"I_low","key":"I_low","index":0,"value":0.0009686110784971752,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"I_high","key":"I_high","index":0,"value":0.000968650075551393,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"}]} +{"id":"deepseek:01854_05bdea90308ba364:8e82ddb1d00e7ca9","source":"deepseek","example_id":"01854_05bdea90308ba364","test_name":"test_test_1854_fifth_order_lc_butterworth_low_pass_ladder_50_1mhz_05bdea90308ba364","netlist_hash":"8e82ddb1d00e7ca9","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"5th-order Butterworth low-pass ladder filter with 50\u03a9 terminations, designed for a 3dB cutoff at 1MHz.","pair_ids":["75525ab06c4e692c","34e1d7b28994702e","87e45f51d97d89a4","c5b3b953c3e5ae4a"],"prompts":["5th-order Butterworth low-pass ladder filter with 50\u03a9 terminations, designed for a 3dB cutoff at 1MHz.","The filter uses series inductors L1, L3, L5 and shunt capacitors C2, C4 in a doubly-terminated ladder topology.","AC analysis from 10kHz to 10MHz with 100 points per decade to characterize frequency response.","Measurements capture the DC gain, -3dB bandwidth, and stopband attenuation at 5MHz."],"measurements":[{"name":"f3dB","key":"f3dB","index":0,"value":998564.2409220267,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 AC"},{"name":"att_5M","key":"att_5M","index":0,"value":-75.9144501079228,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"dc_gain","key":"dc_gain","index":0,"value":-6.020599913281338,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:05266_38555590869dde61:3d0c724f91c2f717","source":"deepseek","example_id":"05266_38555590869dde61","test_name":"test_test_5266_active_filter_38555590869dde61","netlist_hash":"3d0c724f91c2f717","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Sallen-Key second-order low-pass filter with gain 2 and 0.5 dB Chebyshev passband ripple","pair_ids":["67f1471b6e11a188","8eec950b92ff167b","a959ab9a29078be8","2ab2d29bf0ab6e2c"],"prompts":["Sallen-Key second-order low-pass filter with gain 2 and 0.5 dB Chebyshev passband ripple","Cutoff frequency (-3 dB) designed for approximately 10 kHz by setting R1=R2=18 k\u2126, C1=1 nF, C2=1.1 nF","DC gain set to 2 (6 dB) using equal resistors Rf = Rin = 10 k\u2126 and an ideal op-amp (E source with gain=100k)","Chebyshev 0.5 dB ripple yields Q \u2248 0.874, giving a natural frequency f0 \u2248 8.4 kHz and \u20133 dB point at f3dB \u2248 f0 \u00d7 1.185 = 10 kHz"],"measurements":[{"name":"f3db","key":"f3db","index":0,"value":9994.904539759427,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 AC"},{"name":"att100k","key":"att100k","index":0,"value":-36.92436715171249,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"dcgain","key":"dcgain","index":0,"value":6.020426239437169,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"maxgain","key":"maxgain","index":0,"value":6.571881948236938,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 AC"}]} +{"id":"deepseek:07539_c561975c8c047148:5a9d729265f9a713","source":"deepseek","example_id":"07539_c561975c8c047148","test_name":"test_test_7539_3_bit_flash_adc_c561975c8c047148","netlist_hash":"5a9d729265f9a713","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"3-bit flash ADC with resistor ladder generating reference voltages at 0.3125V, 0.9375V, 1.5625V, 2.1875V, 2.8125V, 3.4375V, 4.0625V.","pair_ids":["cd7f0adc3c6e12f1","fbc1198eaf7f46c1","caeed2fc61c17a6e","6f571ce637e35adc"],"prompts":["3-bit flash ADC with resistor ladder generating reference voltages at 0.3125V, 0.9375V, 1.5625V, 2.1875V, 2.8125V, 3.4375V, 4.0625V.","Seven ideal comparators implemented with voltage-controlled voltage sources using the unit step function u().","DC sweep from 0 to 5V in 0.01V steps to determine comparator output levels.","Measurements verify each comparator's output is correct at test points below and above its threshold."],"measurements":[{"name":"out2_low","key":"out2_low","index":0,"value":0,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 DC"},{"name":"out5_low","key":"out5_low","index":0,"value":0,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 DC"},{"name":"out7_high","key":"out7_high","index":0,"value":5,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 DC"},{"name":"out3_low","key":"out3_low","index":0,"value":0,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 DC"},{"name":"out3_high","key":"out3_high","index":0,"value":5,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 DC"},{"name":"out2_high","key":"out2_high","index":0,"value":5,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 DC"},{"name":"out1_high","key":"out1_high","index":0,"value":5,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 DC"},{"name":"out1_low","key":"out1_low","index":0,"value":0,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 DC"},{"name":"out7_low","key":"out7_low","index":0,"value":0,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 DC"},{"name":"out6_low","key":"out6_low","index":0,"value":0,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 DC"},{"name":"out4_low","key":"out4_low","index":0,"value":0,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 DC"},{"name":"out6_high","key":"out6_high","index":0,"value":5,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 DC"},{"name":"out5_high","key":"out5_high","index":0,"value":5,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 DC"},{"name":"out4_high","key":"out4_high","index":0,"value":5,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 DC"}]} +{"id":"deepseek:01855_8829e3adaae0b50f:9114bf36cac8cfe0","source":"deepseek","example_id":"01855_8829e3adaae0b50f","test_name":"test_test_1855_fifth_order_lc_butterworth_low_pass_ladder_75_10khz_8829e3adaae0b50f","netlist_hash":"9114bf36cac8cfe0","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Circuit is a 5th-order Butterworth LC low-pass filter.","pair_ids":["4d3b1418131e2e3c","cb4e5ecee89aad9b","8240b666c141f08d"],"prompts":["Circuit is a 5th-order Butterworth LC low-pass filter.","Designed for 75\u03a9 impedance and 10 kHz cutoff using doubly terminated ladder topology.","Uses AC analysis from 100 Hz to 1 MHz to capture frequency response."],"measurements":[{"name":"f3dB","key":"f3dB","index":0,"value":9995.163488664683,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 AC"},{"name":"att_50k","key":"att_50k","index":0,"value":-75.9181251527303,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:07540_ad35c56dd2037069:467636b9477337f3","source":"deepseek","example_id":"07540_ad35c56dd2037069","test_name":"test_test_7540_3_bit_flash_adc_with_offsets_ad35c56dd2037069","netlist_hash":"467636b9477337f3","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"3-bit flash ADC with 7 comparators and intentional input-referred offsets ranging from -5mV to +5mV.","pair_ids":["a6e7119dd8fd107c","a54f61cea55a5acf","f0933cf1633ce720","552c31da41063d16","637c4fc9a6be0c5b"],"prompts":["3-bit flash ADC with 7 comparators and intentional input-referred offsets ranging from -5mV to +5mV.","Resistor ladder (8 equal 2k resistors) provides tap voltages at multiples of 0.625V (1 LSB) from 0.625V to 4.375V.","Offset voltages are reordered to ensure comparator outputs appear in ascending threshold order (out1 lowest, out7 highest).","Differential nonlinearity (DNL) and integral nonlinearity (INL) are measured via DC sweep and .MEAS statements.","With small offsets, DNL and INL remain within \u00b10.02 LSB, demonstrating robustness."],"measurements":[{"name":"Vth6","key":"Vth6","index":0,"value":3.7425,"value_is_finite":true,"success":true,"measurement_type":"FIND_WHEN","simulation_name":"#1 DC"},{"name":"LSB","key":"LSB","index":0,"value":0.625,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 DC"},{"name":"Vth7","key":"Vth7","index":0,"value":4.3774999999999995,"value_is_finite":true,"success":true,"measurement_type":"FIND_WHEN","simulation_name":"#1 DC"},{"name":"DNL6","key":"DNL6","index":0,"value":-0.01599999999999968,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 DC"},{"name":"Vth4","key":"Vth4","index":0,"value":2.4975,"value_is_finite":true,"success":true,"measurement_type":"FIND_WHEN","simulation_name":"#1 DC"},{"name":"DNL3","key":"DNL3","index":0,"value":0.007999999999999785,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 DC"},{"name":"DNL7","key":"DNL7","index":0,"value":0.015999999999998904,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 DC"},{"name":"Vth5","key":"Vth5","index":0,"value":3.1275,"value_is_finite":true,"success":true,"measurement_type":"FIND_WHEN","simulation_name":"#1 DC"},{"name":"DNL4","key":"DNL4","index":0,"value":-0.007999999999999785,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 DC"},{"name":"Vth2","key":"Vth2","index":0,"value":1.2475,"value_is_finite":true,"success":true,"measurement_type":"FIND_WHEN","simulation_name":"#1 DC"},{"name":"DNL1","key":"DNL1","index":0,"value":0.0040000000000000036,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 DC"},{"name":"DNL5","key":"DNL5","index":0,"value":0.007999999999999785,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 DC"},{"name":"Vth3","key":"Vth3","index":0,"value":1.8775,"value_is_finite":true,"success":true,"measurement_type":"FIND_WHEN","simulation_name":"#1 DC"},{"name":"DNL2","key":"DNL2","index":0,"value":-0.007999999999999785,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 DC"},{"name":"Vth1","key":"Vth1","index":0,"value":0.6275,"value_is_finite":true,"success":true,"measurement_type":"FIND_WHEN","simulation_name":"#1 DC"},{"name":"INL6","key":"INL6","index":0,"value":-0.011999999999999744,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 DC"},{"name":"INL3","key":"INL3","index":0,"value":0.003999999999999915,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 DC"},{"name":"INL7","key":"INL7","index":0,"value":0.003999999999999204,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 DC"},{"name":"INL4","key":"INL4","index":0,"value":-0.003999999999999915,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 DC"},{"name":"INL1","key":"INL1","index":0,"value":0.003999999999999915,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 DC"},{"name":"INL5","key":"INL5","index":0,"value":0.003999999999999915,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 DC"},{"name":"INL2","key":"INL2","index":0,"value":-0.003999999999999915,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 DC"},{"name":"DNL8","key":"DNL8","index":0,"value":-0.003999999999999226,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 DC"}]} +{"id":"deepseek:07541_6030d9aa67b9d825:e5919a5956d815ab","source":"deepseek","example_id":"07541_6030d9aa67b9d825","test_name":"test_test_7541_3_bit_flash_adc_with_3_3v_reference_6030d9aa67b9d825","netlist_hash":"e5919a5956d815ab","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"3-bit flash ADC with 3.3V reference voltage, built from an 8-resistor ladder and 7 ideal comparators (E sources).","pair_ids":["8e24b1b13ad3cb75","5041d5cd96d0069c","46c699b527304fde"],"prompts":["3-bit flash ADC with 3.3V reference voltage, built from an 8-resistor ladder and 7 ideal comparators (E sources).","Comparator thresholds are at VREF/8, 2VREF/8, ..., 7VREF/8, corresponding to integer LSB steps.","DC sweep of Vin from 0 to 3.3V; thermometer outputs measured at 0.2V, 1.0V, 2.0V, and 3.0V."],"measurements":[{"name":"out2_3_0","key":"out2_3_0","index":0,"value":3.3,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 DC"},{"name":"out7_3_0","key":"out7_3_0","index":0,"value":3.3,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 DC"},{"name":"out4_3_0","key":"out4_3_0","index":0,"value":3.3,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 DC"},{"name":"out4_0_2","key":"out4_0_2","index":0,"value":0,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 DC"},{"name":"out1_3_0","key":"out1_3_0","index":0,"value":3.3,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 DC"},{"name":"out5_0_2","key":"out5_0_2","index":0,"value":0,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 DC"},{"name":"out6_3_0","key":"out6_3_0","index":0,"value":3.3,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 DC"},{"name":"out2_0_2","key":"out2_0_2","index":0,"value":0,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 DC"},{"name":"out2_1_0","key":"out2_1_0","index":0,"value":0,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 DC"},{"name":"out3_3_0","key":"out3_3_0","index":0,"value":3.3,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 DC"},{"name":"out7_1_0","key":"out7_1_0","index":0,"value":3.3,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 DC"},{"name":"out3_0_2","key":"out3_0_2","index":0,"value":0,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 DC"},{"name":"out2_2_0","key":"out2_2_0","index":0,"value":0,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 DC"},{"name":"out7_2_0","key":"out7_2_0","index":0,"value":3.3,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 DC"},{"name":"out4_1_0","key":"out4_1_0","index":0,"value":0,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 DC"},{"name":"out5_3_0","key":"out5_3_0","index":0,"value":3.3,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 DC"},{"name":"out1_0_2","key":"out1_0_2","index":0,"value":0,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 DC"},{"name":"out1_1_0","key":"out1_1_0","index":0,"value":0,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 DC"},{"name":"out4_2_0","key":"out4_2_0","index":0,"value":3.3,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 DC"},{"name":"out6_0_2","key":"out6_0_2","index":0,"value":0,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 DC"},{"name":"out6_1_0","key":"out6_1_0","index":0,"value":3.3,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 DC"},{"name":"out1_2_0","key":"out1_2_0","index":0,"value":0,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 DC"},{"name":"out7_0_2","key":"out7_0_2","index":0,"value":0,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 DC"},{"name":"out3_1_0","key":"out3_1_0","index":0,"value":0,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 DC"},{"name":"out6_2_0","key":"out6_2_0","index":0,"value":3.3,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 DC"},{"name":"out3_2_0","key":"out3_2_0","index":0,"value":0,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 DC"},{"name":"out5_1_0","key":"out5_1_0","index":0,"value":0,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 DC"},{"name":"out5_2_0","key":"out5_2_0","index":0,"value":3.3,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 DC"}]} +{"id":"deepseek:04272_17fae168a0e32f4c:060745508998a41c","source":"deepseek","example_id":"04272_17fae168a0e32f4c","test_name":"test_test_4272_nmos_level_shifter_1_17fae168a0e32f4c","netlist_hash":"060745508998a41c","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"The NMOS transistor M1 acts as a switch controlled by the input signal VIN.","pair_ids":["31d59d2da03dd6b1","a7935d69ff2e49dd","12b573242a30d974","98f597dd03be10e1","312e584da18450f8"],"prompts":["The NMOS transistor M1 acts as a switch controlled by the input signal VIN.","When VIN is low (0V), M1 is off, and the output is pulled high to 5V through pull-up resistor R1.","When VIN is high (1.8V), M1 turns on, pulling the output low to a level determined by the voltage divider of R1 and the on-resistance of M1.","Increasing M1's W/L ratio ensures sufficient drive strength to pull the output below 0.5V.","The input signal is a 1MHz pulse with 0-1.8V amplitude, and the output swings between approximately 0V and 5V."],"measurements":[{"name":"vout_min","key":"vout_min","index":0,"value":0.06419400648211113,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 tran"},{"name":"vout_max","key":"vout_max","index":0,"value":4.999999949900001,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 tran"}]} +{"id":"deepseek:04275_28864338a148645b:0771e2365daaddd8","source":"deepseek","example_id":"04275_28864338a148645b","test_name":"test_test_4275_nmos_pass_transistor_level_shifter_3v3_to_5v_28864338a148645b","netlist_hash":"0771e2365daaddd8","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Design an NMOS pass transistor level shifter that converts a 0\u20133.3 V digital pulse to a 0\u20135 V output. Gate bias is 3.3 V, pull-up resistor is 15 k\u03a9 to 5 V. Use an NMOS transistor with VTO=1 V. Simulate transient and measure Vout_high, Vout_low, and rising propagation delay.","pair_ids":["1e8c1a1a280f4778","c3285f6d90ab2caa","6d7628c65e74e69c"],"prompts":["Design an NMOS pass transistor level shifter that converts a 0\u20133.3 V digital pulse to a 0\u20135 V output. Gate bias is 3.3 V, pull-up resistor is 15 k\u03a9 to 5 V. Use an NMOS transistor with VTO=1 V. Simulate transient and measure Vout_high, Vout_low, and rising propagation delay.","Use a single NMOS with gate tied to a 3.3 V supply, source driven by a 3.3 V, 50 kHz pulse, and drain pulled up to 5 V via 15 k\u03a9. Run a 100 \u00b5s transient and measure the output high and low average voltages and the delay from input to output.","Create a level shifting circuit: NMOS with W/L=20/1, gate at 3.3 V DC, input pulse 0/3.3 V at 50 kHz, 15 k\u03a9 pull-up to 5 V. Simulate with transient analysis and report Vout_high, Vout_low, and propagation delay."],"measurements":[{"name":"delay","key":"delay","index":0,"value":-4.965649057131567e-10,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 tran"},{"name":"Vout_low","key":"Vout_low","index":0,"value":0.0724515509736719,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 tran"},{"name":"Vout_high","key":"Vout_high","index":0,"value":4.999999924850001,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 tran"}]} +{"id":"deepseek:04276_6017961a9aaf013a:5b3f29af5435427d","source":"deepseek","example_id":"04276_6017961a9aaf013a","test_name":"test_test_4276_nmos_pass_transistor_level_shifter_1v8_to_3v3_6017961a9aaf013a","netlist_hash":"5b3f29af5435427d","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"NMOS pass-transistor level shifter from 0\u20131.8 V to 0\u20133.3 V","pair_ids":["3486d71971dd092b","30a98aa448b41745","30c0751882d9f607","e6fa21dff8cc70a5"],"prompts":["NMOS pass-transistor level shifter from 0\u20131.8 V to 0\u20133.3 V","Gate biased at 1.8 V, drain pulled to 3.3 V via 47 k\u03a9","When input low, NMOS conducts, pulling output low; when input high, NMOS turns off, output rises to 3.3 V","Measurement windows adjusted to sample only steady\u2011state output high and low regions"],"measurements":[{"name":"delay","key":"delay","index":0,"value":-2.9605316405059903e-09,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 tran"},{"name":"Vout_low","key":"Vout_low","index":0,"value":0.562817391525727,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 tran"},{"name":"Vout_high","key":"Vout_high","index":0,"value":3.299999844430007,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 tran"}]} +{"id":"deepseek:04277_73101b61242b8d12:68d1aecfa9dd9f3a","source":"deepseek","example_id":"04277_73101b61242b8d12","test_name":"test_test_4277_nmos_pass_transistor_level_shifter_with_load_cap_73101b61242b8d12","netlist_hash":"68d1aecfa9dd9f3a","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Design an NMOS level shifter with output load capacitor (5 pF) to simulate real loading. Shift 0\u20133.3 V to 0\u20135 V using a 10 k\u03a9 pull-up, gate at 3.3 V, NMOS W=50u L=1u. Apply a 6 \u00b5s period pulse (3 \u00b5s high). Run transient to measure Vout_high, Vout_low, and tdelay.","pair_ids":["7927dd01cdeb3c87","dc9c2474df8bd9fa","6ab1364a68827fe1"],"prompts":["Design an NMOS level shifter with output load capacitor (5 pF) to simulate real loading. Shift 0\u20133.3 V to 0\u20135 V using a 10 k\u03a9 pull-up, gate at 3.3 V, NMOS W=50u L=1u. Apply a 6 \u00b5s period pulse (3 \u00b5s high). Run transient to measure Vout_high, Vout_low, and tdelay.","Create a robust level shifter: NMOS with W=50u, 5 pF load, 10k pull-up to 5 V, gate bias 3.3 V, input 0/3.3 V with 6 \u00b5s period. Measure average output levels and propagation delay.","Use an NMOS with large width (50 \u00b5m) to drive a 5 pF load, shifting a 3.3 V input to 5 V output. Pull-up is 10 k\u03a9 to 5 V. Simulate transient and report high/low output voltages and delay."],"measurements":[{"name":"tdelay","key":"tdelay","index":0,"value":1.2002044997091403e-08,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 tran"},{"name":"Vout_low","key":"Vout_low","index":0,"value":0.0543407435187817,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 tran"},{"name":"Vout_high","key":"Vout_high","index":0,"value":5.000001701772806,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 tran"}]} +{"id":"deepseek:06772_58f4d347cf3cd22c:23729ff7bd6e71b2","source":"deepseek","example_id":"06772_58f4d347cf3cd22c","test_name":"test_test_6772_differential_capacitive_sensor_inamp_58f4d347cf3cd22c","netlist_hash":"23729ff7bd6e71b2","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"AC-excited differential capacitive sensor bridge with 110p/100p sensor mismatch","pair_ids":["1d4b5a1d3a29c49d","ad8f327a46226fef","40483eec44f85f7e","aab29fd7f7544eeb"],"prompts":["AC-excited differential capacitive sensor bridge with 110p/100p sensor mismatch","Reference capacitors of 100p and 110p form a bridge with the sensors","3-opamp instrumentation amplifier provides gain of 21","1V AC excitation at 10kHz, AC analysis measures output magnitude and phase"],"measurements":[{"name":"vout_phase","key":"vout_phase","index":0,"value":7.578806799389333e-05,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"vout_mag","key":"vout_mag","index":0,"value":0.9998100345494741,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:07428_2184d5e9c4a24d92:d12cfabf5ba8b9d5","source":"deepseek","example_id":"07428_2184d5e9c4a24d92","test_name":"test_test_7428_rc_low_pass_subcircuit_2184d5e9c4a24d92","netlist_hash":"d12cfabf5ba8b9d5","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"First-order RC low-pass filter subcircuit with 1k\u03a9 resistor and 159nF capacitor.","pair_ids":["f8114cb91cbc58f2","80f7528a7c324f7b","aa00f20ad3f3fd59"],"prompts":["First-order RC low-pass filter subcircuit with 1k\u03a9 resistor and 159nF capacitor.","AC sweep from 10 Hz to 100 kHz (100 points per decade).","Verifies passband gain (0 dB), cutoff frequency magnitude (-3 dB), and stopband attenuation."],"measurements":[{"name":"vout1k","key":"vout1k","index":0,"value":0.7074510619274477,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"vout10k","key":"vout10k","index":0,"value":0.09959972245011695,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"vout100","key":"vout100","index":0,"value":0.9950467768153527,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:04274_6f80cc427cc28881:f0f593b883462ae6","source":"deepseek","example_id":"04274_6f80cc427cc28881","test_name":"test_test_4274_nmos_level_shifter_3_6f80cc427cc28881","netlist_hash":"f0f593b883462ae6","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"NMOS level shifter circuit converting 0.9V logic to 2.5V using a 2k\u03a9 pull-up","pair_ids":["c5d44832ebdfad8e","568c783310564778","d868655d3d42630c","defb6864cac19a31"],"prompts":["NMOS level shifter circuit converting 0.9V logic to 2.5V using a 2k\u03a9 pull-up","Input pulse at 500kHz with 2ns rise/fall times","NMOS sized to provide low output voltage below 0.2V","Rise time measured from 10% to 90% of output swing"],"measurements":[{"name":"vout_min","key":"vout_min","index":0,"value":0.08198781855440504,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 tran"},{"name":"trise","key":"trise","index":0,"value":4.76801963667832e-09,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 tran"},{"name":"vout_max","key":"vout_max","index":0,"value":2.500327886783763,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 tran"}]} +{"id":"deepseek:07429_48a9f3e3cc6a7898:333ba9bc0781c5ad","source":"deepseek","example_id":"07429_48a9f3e3cc6a7898","test_name":"test_test_7429_rc_low_pass_subcircuit_linear_sweep_48a9f3e3cc6a7898","netlist_hash":"333ba9bc0781c5ad","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"RC low-pass filter with R=10k\u03a9, C=10nF, theoretical cutoff ~1.59 kHz","pair_ids":["8492252e62830110","ef93a32405ba6321","bcc23ba9153ea71a"],"prompts":["RC low-pass filter with R=10k\u03a9, C=10nF, theoretical cutoff ~1.59 kHz","AC linear sweep from 10 Hz to 10 kHz with 10001 points",".MEAS statements compute magnitude at 100 Hz, 1590 Hz, and 10 kHz"],"measurements":[{"name":"vout1590","key":"vout1590","index":0,"value":0.7074510703889608,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"vout10k","key":"vout10k","index":0,"value":0.15717672547758987,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"vout100","key":"vout100","index":0,"value":0.9980318886410834,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:07430_cad9ec15296c1f75:65bfc167654b5684","source":"deepseek","example_id":"07430_cad9ec15296c1f75","test_name":"test_test_7430_rc_low_pass_subcircuit_10khz_cutoff_cad9ec15296c1f75","netlist_hash":"65bfc167654b5684","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"RC low-pass subcircuit with R=1k\u03a9 and C=15.9nF, giving a cutoff frequency of 10 kHz.","pair_ids":["f8729bebae1d3b95","0e3057454d05d1d3","fd5ebf505bac8be1"],"prompts":["RC low-pass subcircuit with R=1k\u03a9 and C=15.9nF, giving a cutoff frequency of 10 kHz.","AC analysis from 100 Hz to 1 MHz with 100 points per decade.","Measurements use VM() to obtain magnitude of V(out) at key frequencies."],"measurements":[{"name":"vout100k","key":"vout100k","index":0,"value":0.09959972245011692,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"vout10k","key":"vout10k","index":0,"value":0.7074510619274477,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"vout100","key":"vout100","index":0,"value":0.9999501010413347,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:02469_b3815e15d33e5fbb:ac7e5df7ef91d760","source":"deepseek","example_id":"02469_b3815e15d33e5fbb","test_name":"test_test_2469_biased_positive_diode_limiter_b3815e15d33e5fbb","netlist_hash":"ac7e5df7ef91d760","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Create a biased positive diode limiter with a 3V bias voltage to clip positive peaks of a 1kHz 5V amplitude sine wave. Use a series 1k resistor and a 10k load.","pair_ids":["47bec064336ad7df","208f3c01af5edde6","f0ddc3348a036889"],"prompts":["Create a biased positive diode limiter with a 3V bias voltage to clip positive peaks of a 1kHz 5V amplitude sine wave. Use a series 1k resistor and a 10k load.","Design a diode clipping circuit that limits the output voltage to about 3.7V when the input exceeds that level. The input is 5V amplitude sine at 1kHz.","Simulate a biased diode limiter with a 3V bias, 1k resistor, and 10k load, measuring maximum and minimum output voltages."],"measurements":[{"name":"max_vout","key":"max_vout","index":0,"value":3.70550300500218,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"},{"name":"min_vout","key":"min_vout","index":0,"value":-4.343673062229354,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:02470_87d35b3e404c17b9:0a00bf32f645595f","source":"deepseek","example_id":"02470_87d35b3e404c17b9","test_name":"test_test_2470_biased_positive_diode_limiter_87d35b3e404c17b9","netlist_hash":"0a00bf32f645595f","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Simulate a biased positive diode limiter with a 5V bias, 2.2k series resistor, and 4.7k load. Input is 8V amplitude at 2kHz.","pair_ids":["358085cdc0fc8c98","7104d28a14d87e6d","16bc09112c083644","42bcf1a6977a1b8b"],"prompts":["Simulate a biased positive diode limiter with a 5V bias, 2.2k series resistor, and 4.7k load. Input is 8V amplitude at 2kHz.","Design a limiter using a diode with a 5V bias to clip signals above about 5.7V. The circuit has a 2.2k resistor and a 4.7k load.","Create a SPICE netlist for a biased diode clipper that limits positive excursions to ~5.7V when driven by an 8V 2kHz sine.","Test a diode clipping circuit with a 5V DC bias, measuring maximum and minimum output voltages."],"measurements":[{"name":"max_vout","key":"max_vout","index":0,"value":5.4327276153005,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"},{"name":"min_vout","key":"min_vout","index":0,"value":-5.443063608329553,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:02471_9454477dd5380a30:a9982771bdef8a71","source":"deepseek","example_id":"02471_9454477dd5380a30","test_name":"test_test_2471_biased_positive_diode_limiter_9454477dd5380a30","netlist_hash":"a9982771bdef8a71","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Create a biased positive diode limiter using a 1.5V bias, 470 ohm resistor, and 1k load. The input is a 4V amplitude 500 Hz sine wave.","pair_ids":["061d2c4bed1c4802","667d5a778906f44b","360f2016addcef39","46d9a337ecece56e"],"prompts":["Create a biased positive diode limiter using a 1.5V bias, 470 ohm resistor, and 1k load. The input is a 4V amplitude 500 Hz sine wave.","Simulate a diode clipper that limits positive voltages to about 2.2V with a 1.5V battery bias and measures output peaks.","Generate SPICE for a biased diode limiter with a small bias voltage, including max/min output measurements.","Design a low-voltage diode limiter with a 1.5V bias, analyzing clipping behavior for a 4V amplitude input."],"measurements":[{"name":"max_vout","key":"max_vout","index":0,"value":2.2191953335662227,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"},{"name":"min_vout","key":"min_vout","index":0,"value":-2.600294080755076,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:01724_eae88d37538d096f:3c52db21fce5cbb9","source":"deepseek","example_id":"01724_eae88d37538d096f","test_name":"test_test_1724_active_rc_allpass_phase_shifter_100hz_eae88d37538d096f","netlist_hash":"3c52db21fce5cbb9","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Active RC all-pass filter designed with a single op-amp.","pair_ids":["2f6dbeda88e6747b","bcd85561e1c6ece1","f861f11c735006cc"],"prompts":["Active RC all-pass filter designed with a single op-amp.","Corner frequency set to 100 Hz using R=15.9k\u03a9 and C=100nF.","Phase measured in radians to avoid expression evaluation issues in SPICE parser."],"measurements":[{"name":"mag_low","key":"mag_low","index":0,"value":-0.0001737160556073316,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"mag_high","key":"mag_high","index":0,"value":-0.0001737160556073316,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"phase_corner","key":"phase_corner","index":0,"value":-1.569822316596343,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"mag_corner","key":"mag_corner","index":0,"value":-0.00017371605560347422,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"phase_low","key":"phase_low","index":0,"value":-0.019979864595144642,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"phase_high","key":"phase_high","index":0,"value":-3.1215738324700433,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:02181_32d37bb789b3ba59:32d37bb789b3ba59","source":"deepseek","example_id":"02181_32d37bb789b3ba59","test_name":"test_test_2181_compensated_10x_probe_standard_9m_1m_32d37bb789b3ba59","netlist_hash":"32d37bb789b3ba59","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Design a compensated 10x oscilloscope probe network with a 9 M\u03a9 tip resistor and 1 M\u03a9 scope input.","pair_ids":["d9f3faeb2fc25758","2a116697856be8dd","aedcd5e449964c48"],"prompts":["Design a compensated 10x oscilloscope probe network with a 9 M\u03a9 tip resistor and 1 M\u03a9 scope input.","Create a probe divider that maintains accurate 10:1 attenuation from DC to high frequencies by capacitor compensation.","Build a passive probe front-end with perfect trimmer adjustment for flat frequency response, simulating AC analysis."],"measurements":[{"name":"flatness_dB","key":"flatness_dB","index":0,"value":-20.000000000001236,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 AC"},{"name":"vout_max_dB","key":"vout_max_dB","index":0,"value":-20.000000000001236,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 AC"},{"name":"atten_high","key":"atten_high","index":0,"value":0.09999909999966992,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"atten_low","key":"atten_low","index":0,"value":0.09999999999857878,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"vout_min_dB","key":"vout_min_dB","index":0,"value":-20.000078173436204,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 AC"}]} +{"id":"deepseek:02182_c7a6b3b77cf21cd6:c7a6b3b77cf21cd6","source":"deepseek","example_id":"02182_c7a6b3b77cf21cd6","test_name":"test_test_2182_compensated_10x_probe_highz_90m_10m_c7a6b3b77cf21cd6","netlist_hash":"c7a6b3b77cf21cd6","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Create a 10x probe network suitable for a high-impedance scope input (10 M\u03a9, 15 pF).","pair_ids":["dee2160f955dc653","6b94efc4b95e9327","40740c036c7c71b7"],"prompts":["Create a 10x probe network suitable for a high-impedance scope input (10 M\u03a9, 15 pF).","Design a probe tip with 90 M\u03a9 and a tiny compensating capacitor to match time constants.","Simulate a high-impedance probe that preserves attenuation flatness from 0.1 Hz to 1 GHz."],"measurements":[{"name":"flatness_dB","key":"flatness_dB","index":0,"value":-19.999843655706297,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 AC"},{"name":"atten_high","key":"atten_high","index":0,"value":0.10000179999639981,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"atten_low","key":"atten_low","index":0,"value":0.1000000000015989,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"vmin_db","key":"vmin_db","index":0,"value":-19.99999999999861,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 AC"},{"name":"vmax_db","key":"vmax_db","index":0,"value":-19.999843655706297,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 AC"}]} +{"id":"deepseek:02183_4e208d76704804dc:4e208d76704804dc","source":"deepseek","example_id":"02183_4e208d76704804dc","test_name":"test_test_2183_compensated_10x_probe_9_9m_1_1m_4e208d76704804dc","netlist_hash":"4e208d76704804dc","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Construct a compensated 10:1 probe using 9.9 M\u03a9 and 1.1 M\u03a9 resistors and a 25 pF scope input capacitance.","pair_ids":["cd6b6914c0f0ae7d","6dec3e852e47eb8a","879d3e417d825882"],"prompts":["Construct a compensated 10:1 probe using 9.9 M\u03a9 and 1.1 M\u03a9 resistors and a 25 pF scope input capacitance.","Adjust the probe capacitor to 2.7778 pF for perfect compensation and verify flatness from 10 Hz to 50 MHz.","Validate an alternative resistor ratio that still yields 10x attenuation with proper compensation."],"measurements":[{"name":"att_low","key":"att_low","index":0,"value":0.10000002087284428,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"att_dB_high","key":"att_dB_high","index":0,"value":-19.999937461875007,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"flat_dB","key":"flat_dB","index":0,"value":6.072512662669283e-05,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 AC"},{"name":"att_high","key":"att_high","index":0,"value":0.10000071999936372,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"att_dB_low","key":"att_dB_low","index":0,"value":-19.999998187001633,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:02415_e639f1397137860d:ba5c23e566737e74","source":"deepseek","example_id":"02415_e639f1397137860d","test_name":"test_test_2415_diode_positive_clamp_5v_e639f1397137860d","netlist_hash":"ba5c23e566737e74","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Simulate a diode clamp circuit that limits the output to a 5V rail using a 1N4148-style diode model.","pair_ids":["171862f41b3a6be9","e2214c8d725a663d","e91807f6d88dc6f3"],"prompts":["Simulate a diode clamp circuit that limits the output to a 5V rail using a 1N4148-style diode model.","Design a positive voltage clamper with a 5V DC supply and a 10V PULSE input.","Create a SPICE netlist to verify the clamping behavior of a diode to a +5V rail."],"measurements":[{"name":"vmin","key":"vmin","index":0,"value":5.009999993124437e-09,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 tran"},{"name":"vmax","key":"vmax","index":0,"value":5.697300683970409,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 tran"},{"name":"vavg","key":"vavg","index":0,"value":2.8524681615429244,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 tran"}]} +{"id":"deepseek:02416_010989c6e89dc813:b8d00e9e6c24c580","source":"deepseek","example_id":"02416_010989c6e89dc813","test_name":"test_test_2416_diode_positive_clamp_3v3_010989c6e89dc813","netlist_hash":"b8d00e9e6c24c580","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Set up a diode clamp with a 3.3V supply and a 5V PULSE input, using a 2.2k series resistor.","pair_ids":["737a7d6fec14fa2e","80309488d56454a0","20b5056bc591dd5b"],"prompts":["Set up a diode clamp with a 3.3V supply and a 5V PULSE input, using a 2.2k series resistor.","Model a low-voltage diode clamper and measure the output at specific time points.","Simulate a silicon diode clamp to 3.3V and confirm the output never exceeds the clamp plus forward voltage."],"measurements":[{"name":"vmin","key":"vmin","index":0,"value":7.26219998259379e-09,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 tran"},{"name":"vout_high","key":"vout_high","index":0,"value":3.9946281327071933,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 tran"},{"name":"vmax","key":"vmax","index":0,"value":3.994635326453127,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 tran"},{"name":"vout_low","key":"vout_low","index":0,"value":7.26219998259379e-09,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 tran"}]} +{"id":"deepseek:02417_b2607f35da8cbc8b:fb6941b7ba333532","source":"deepseek","example_id":"02417_b2607f35da8cbc8b","test_name":"test_test_2417_diode_positive_clamp_10v_b2607f35da8cbc8b","netlist_hash":"fb6941b7ba333532","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Build a diode clamp to a 10V rail with a 10k load resistor, input PULSE from -5V to 15V.","pair_ids":["cd5f17a471404595","60cfa1b279aaeea6","b7eeff2035b8bc64"],"prompts":["Build a diode clamp to a 10V rail with a 10k load resistor, input PULSE from -5V to 15V.","Test a diode positive clamp with a negative-going input and verify the minimum output follows the divided input.","Model a diode clamper circuit with asymmetric input and measure the maximum and minimum output voltages."],"measurements":[{"name":"vmin","key":"vmin","index":0,"value":-4.545454532213356,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 tran"},{"name":"vmax","key":"vmax","index":0,"value":10.674387085416809,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 tran"},{"name":"vout_high_at","key":"vout_high_at","index":0,"value":10.674239586001121,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 tran"},{"name":"vout_low_at","key":"vout_low_at","index":0,"value":-4.545454532213356,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 tran"}]} +{"id":"deepseek:00012_ef0e0e2a1df432f8:317e19e0ee27f9b8","source":"deepseek","example_id":"00012_ef0e0e2a1df432f8","test_name":"test_test_12_voltage_divider_loaded_ef0e0e2a1df432f8","netlist_hash":"317e19e0ee27f9b8","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"5V DC supply with voltage divider R1=1k, R2=2k, and load RL=10k.","pair_ids":["5cacae1de8298a81","cfac2cf32f7a1673","ab1097d4d7cf6cbf"],"prompts":["5V DC supply with voltage divider R1=1k, R2=2k, and load RL=10k.",".DC analysis sweeps source from 5V to 5V in one step, measuring V(out) at 5V.","Output voltage is 5 * (R2||RL) / (R1 + R2||RL) = 3.125V."],"measurements":[{"name":"vout","key":"vout","index":0,"value":3.125,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 DC"}]} +{"id":"deepseek:00013_87eab7ca8d2cdb5d:ce2d48f0854c08bc","source":"deepseek","example_id":"00013_87eab7ca8d2cdb5d","test_name":"test_test_13_voltage_divider_loaded_87eab7ca8d2cdb5d","netlist_hash":"ce2d48f0854c08bc","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":2,"representative_prompt":"A 12 V DC supply, voltage divider with R1=10k and R2=20k, and a 100k load resistor","pair_ids":["b8c44da0cb47c6f8","0b0f2dfe2e8f7bf4"],"prompts":["A 12 V DC supply, voltage divider with R1=10k and R2=20k, and a 100k load resistor","The output voltage is measured using a DC sweep of the supply from 12 V to 12 V to satisfy the measurement syntax"],"measurements":[{"name":"vout","key":"vout","index":0,"value":7.499999999999998,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 DC"}]} +{"id":"deepseek:00014_da125226f7ccfb09:0120dd2df3b2376e","source":"deepseek","example_id":"00014_da125226f7ccfb09","test_name":"test_test_14_voltage_divider_loaded_da125226f7ccfb09","netlist_hash":"0120dd2df3b2376e","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Voltage divider with R1=2.2k, R2=4.7k, and a very light load of 1MEG","pair_ids":["1ac86886d3756df4","9d243911060f6f80","165daf41a377932d"],"prompts":["Voltage divider with R1=2.2k, R2=4.7k, and a very light load of 1MEG","Driven by 9V DC, the output voltage is essentially the unloaded divider value","The 1MEG load causes negligible loading, output ~6.13V"],"measurements":[{"name":"vout","key":"vout","index":0,"value":6.121261761360511,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 DC"}]} +{"id":"deepseek:02196_8c3f5ca230f9810d:608f32a37114b35e","source":"deepseek","example_id":"02196_8c3f5ca230f9810d","test_name":"test_test_2196_pwm_dac_8c3f5ca230f9810d","netlist_hash":"608f32a37114b35e","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"Design a PWM DAC using an RC reconstruction filter.","pair_ids":["fc97430d6375a607","b64273258a653459","d2ba047763a138ca","c5671c99d5b2c954","cc1dd9e5964e701d"],"prompts":["Design a PWM DAC using an RC reconstruction filter.","Create a PWM-based digital-to-analog converter with a lowpass filter.","Simulate a PWM signal filtered by an RC network to extract analog voltage.","Build a simple DAC by averaging a PWM waveform with a first-order RC filter.","Model a PWM-to-analog converter and verify output voltage versus duty cycle."],"measurements":[{"name":"Vout_avg","key":"Vout_avg","index":0,"value":3.000499999959873,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:01039_52762fd638811fb5:4dc0c6047782f48d","source":"deepseek","example_id":"01039_52762fd638811fb5","test_name":"test_test_1039_bjt_zener_current_source_52762fd638811fb5","netlist_hash":"4dc0c6047782f48d","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"BJT current source with Zener diode reference","pair_ids":["447f256c00826fb9","871b1d99a949f530","b127b82add9ff691"],"prompts":["BJT current source with Zener diode reference","The Zener diode (DZ) is reverse-biased (cathode to BASE) to set a stable 5.6V reference","NPN transistor Q1 and emitter resistor RE set the output current"],"measurements":[{"name":"IOUT_RIPPLE","key":"IOUT_RIPPLE","index":0,"value":1.3070019364988788e-05,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#2 DC"},{"name":"IOUT_MAX","key":"IOUT_MAX","index":0,"value":0.0010400631889140187,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#2 DC"},{"name":"IOUT_MIN","key":"IOUT_MIN","index":0,"value":0.00102699316954903,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#2 DC"},{"name":"IOUT_AVG","key":"IOUT_AVG","index":0,"value":0.0010350525262948977,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#2 DC"}]} +{"id":"deepseek:02198_f2047dab44f24da2:6943443fd5b6f401","source":"deepseek","example_id":"02198_f2047dab44f24da2","test_name":"test_test_2198_pwm_dac_with_rc_reconstruction_filter_f2047dab44f24da2","netlist_hash":"6943443fd5b6f401","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"PWM DAC converts digital PWM signal to analog DC using a two-stage RC low-pass filter.","pair_ids":["1eadc77584258450","e2e8432d30db488e","84df192d3f88fc89","63001ae28fd7c411"],"prompts":["PWM DAC converts digital PWM signal to analog DC using a two-stage RC low-pass filter.","The filter removes high-frequency switching components, leaving a smooth DC proportional to duty cycle.","A voltage follower (E1) buffers the filtered output for driving loads.","100 kHz PWM with 50% duty cycle yields 2.5V average output with ripple < 50 mV."],"measurements":[{"name":"Vout_ripple","key":"Vout_ripple","index":0,"value":0.0015444018802583948,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#2 TRAN"},{"name":"Vout_avg","key":"Vout_avg","index":0,"value":2.500499828053774,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#2 TRAN"}]} +{"id":"deepseek:02208_df6dba4267c67da8:b540a07c3c0c6a68","source":"deepseek","example_id":"02208_df6dba4267c67da8","test_name":"test_test_2208_single_slope_adc_df6dba4267c67da8","netlist_hash":"b540a07c3c0c6a68","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Single-slope ADC front-end with PULSE voltage ramp and comparator.","pair_ids":["b34dfa898a8e34df","0150410badab7bf9","b09e3fc3f5a923d5"],"prompts":["Single-slope ADC front-end with PULSE voltage ramp and comparator.","Ramp rises from 0V to 5V in 1ms, comparator triggers when ramp exceeds 2.5V input.","Measure conversion time from ramp start to comparator zero-crossing."],"measurements":[{"name":"ideal_time","key":"ideal_time","index":0,"value":0.0005,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 tran"},{"name":"time_error","key":"time_error","index":0,"value":0,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 tran"},{"name":"trip_time","key":"trip_time","index":0,"value":0.0005,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 tran"}]} +{"id":"deepseek:02039_896cc24988051be7:69fb4815511102eb","source":"deepseek","example_id":"02039_896cc24988051be7","test_name":"test_test_2039_high_side_current_sense_896cc24988051be7","netlist_hash":"69fb4815511102eb","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"High-side current sense amplifier using a difference amplifier with gain 10 to measure voltage across a 0.1\u03a9 shunt resistor on a 12V supply.","pair_ids":["224c0f334fc2c456","19a50e464cfb031f","51a7911eb963f8d0"],"prompts":["High-side current sense amplifier using a difference amplifier with gain 10 to measure voltage across a 0.1\u03a9 shunt resistor on a 12V supply.","The amplifier amplifies the voltage Vsup - V(n1) = Iload * 0.1, producing Vout = Iload (1V/A) plus an offset.","A 500\u00b5V input offset voltage is modeled in series with the op-amp's non-inverting input, resulting in an output offset of 500\u00b5V \u00d7 (1 + 100k/10k) = 5.5mV."],"measurements":[{"name":"vout2","key":"vout2","index":0,"value":2.005368451587856,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 DC"},{"name":"vout0","key":"vout0","index":0,"value":0.005608422914519906,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 DC"}]} +{"id":"deepseek:00580_db7086f25eafbf7e:d646f43f47557d4d","source":"deepseek","example_id":"00580_db7086f25eafbf7e","test_name":"test_test_580_passive_filter_chebyshev_lp_ladder_3rd_db7086f25eafbf7e","netlist_hash":"d646f43f47557d4d","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Design of a third-order Chebyshev low-pass filter with 0.5 dB passband ripple and 1 kHz cutoff using an LC ladder network with 50 ohm terminations.","pair_ids":["0cb88475981836ec","a3a556966971b508","5c23a3d19475732d","1f453e827d6e95c2"],"prompts":["Design of a third-order Chebyshev low-pass filter with 0.5 dB passband ripple and 1 kHz cutoff using an LC ladder network with 50 ohm terminations.","Component values: L1=L2=12.7 mH, C1=3.49 \u00b5F derived from standard Chebyshev prototype tables.","AC analysis performed from 10 Hz to 10 kHz with 100 points per decade.","Measurements: maximum passband gain, -3 dB bandwidth, and stopband attenuation at 2 kHz."],"measurements":[{"name":"f3db","key":"f3db","index":0,"value":1166.0595547186956,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 AC"},{"name":"max_gain","key":"max_gain","index":0,"value":-6.02103296938128,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 AC"},{"name":"att_2k","key":"att_2k","index":0,"value":-25.22885580463213,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:01452_fa3374392ccd4b91:dcf6a5f3663230ad","source":"deepseek","example_id":"01452_fa3374392ccd4b91","test_name":"test_test_1452_op_amp_summing_amplifier_with_weighted_inputs_fa3374392ccd4b91","netlist_hash":"dcf6a5f3663230ad","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Weighted summing amplifier with gains -10, -5, -2.5","pair_ids":["9b937080e1c3addf","22f282a1d4687b59","15ef7e4e4fc40226"],"prompts":["Weighted summing amplifier with gains -10, -5, -2.5","Ideal op-amp modeled as voltage-controlled voltage source (E-source) with high gain","DC operating point and AC analysis performed"],"measurements":[{"name":"vout_ac_mag","key":"vout_ac_mag","index":0,"value":10.001850342313329,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"vout_dc","key":"vout_dc","index":0,"value":-13.002405445007327,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 OP"}]} +{"id":"deepseek:00758_af750028a965e231:b5c32c66ee8ed847","source":"deepseek","example_id":"00758_af750028a965e231","test_name":"test_test_758_biased_negative_diode_limiter_af750028a965e231","netlist_hash":"b5c32c66ee8ed847","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Biased negative diode limiter with a -3V bias and a 1N4148-like diode.","pair_ids":["ae0f5459df69c41b","626293f0fc2a7db5","e79fcc5edd3abcb8"],"prompts":["Biased negative diode limiter with a -3V bias and a 1N4148-like diode.","Input is a 5V amplitude sine wave; output is taken across the load resistor.","Negative peaks are clipped at approximately -3.7V; positive peaks are attenuated by the voltage divider."],"measurements":[{"name":"vmin","key":"vmin","index":0,"value":-3.587069014124396,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 TRAN"},{"name":"vmax","key":"vmax","index":0,"value":4.523783457338863,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00655_40067483ce126604:50b9e53dfdc3e1ab","source":"deepseek","example_id":"00655_40067483ce126604","test_name":"test_test_655_passive_filter_40067483ce126604","netlist_hash":"50b9e53dfdc3e1ab","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"A 5th order Bessel LC ladder low-pass filter terminated with 50-ohm source and load resistors.","pair_ids":["48b99351b2605c4d","3b22e38fcca9ef7d","7c0d55575b89f2e3","89e8ac4d1fc78914"],"prompts":["A 5th order Bessel LC ladder low-pass filter terminated with 50-ohm source and load resistors.","Designed for a 1 kHz cutoff using standard Bessel prototype values after frequency and impedance scaling.","Provides maximally flat group delay in the passband, with a gradual amplitude roll-off.","The passband gain is -6 dB due to equal voltage division between the source and load resistances."],"measurements":[{"name":"f3db","key":"f3db","index":0,"value":1086.4213999980802,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 AC"},{"name":"f6db","key":"f6db","index":0,"value":1177.907953941569,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 AC"},{"name":"gain_passband","key":"gain_passband","index":0,"value":-6.020605883170901,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 AC"}]} +{"id":"deepseek:00064_022241778be18b74:e324d2f540b22500","source":"deepseek","example_id":"00064_022241778be18b74","test_name":"test_test_64_series_rlc_022241778be18b74","netlist_hash":"e324d2f540b22500","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"The circuit is a series RLC bandpass filter with AC excitation.","pair_ids":["5f2c0c8025fff06f","9cb4e863f5a601fa","23b8a81418d423db"],"prompts":["The circuit is a series RLC bandpass filter with AC excitation.","AC analysis sweeps frequency from 10 Hz to 100 kHz to identify resonance.","The resonant frequency is measured by finding the frequency where the output phase is zero."],"measurements":[{"name":"fres","key":"fres","index":0,"value":15918.47821892403,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 AC"}]} +{"id":"deepseek:01899_0bc3787fb9bd86e6:a5bee9035b62fcf7","source":"deepseek","example_id":"01899_0bc3787fb9bd86e6","test_name":"test_test_1899_shunt_regulator_with_op_amp_error_amplifier_0bc3787fb9bd86e6","netlist_hash":"a5bee9035b62fcf7","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"A shunt voltage regulator uses an op\u2011amp error amplifier and a BJT shunt transistor to maintain a stable output.","pair_ids":["8cb3d371385d7282","12176327647cb711","18f15a98bf61eb21"],"prompts":["A shunt voltage regulator uses an op\u2011amp error amplifier and a BJT shunt transistor to maintain a stable output.","The error amplifier compares a divided sample of the output voltage with a 2.5V reference and drives the base of the shunt transistor.","As input voltage increases, the transistor shunts excess current to ground, keeping the output near 5V."],"measurements":[{"name":"VOUT_AT_12V","key":"VOUT_AT_12V","index":0,"value":5.000016517937183,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"VOUT_MAX","key":"VOUT_MAX","index":0,"value":5.000018798280507,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#2 DC"},{"name":"VOUT_MIN","key":"VOUT_MIN","index":0,"value":4.98753113891415,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#2 DC"},{"name":"LINEREG","key":"LINEREG","index":0,"value":1.220032572746281e-06,"value_is_finite":true,"success":true,"measurement_type":"DERIV","simulation_name":"#2 DC"},{"name":"VOUT_12_1","key":"VOUT_12_1","index":0,"value":5.000016638776287,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"VOUT_11_9","key":"VOUT_11_9","index":0,"value":5.000016394769773,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"}]} +{"id":"deepseek:00300_8c2ceb1ab869e8e7:24224b6e70800c11","source":"deepseek","example_id":"00300_8c2ceb1ab869e8e7","test_name":"test_test_300_cmos_nor2_gate_transient_response_8c2ceb1ab869e8e7","netlist_hash":"24224b6e70800c11","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Two-input CMOS NOR gate with PMOS stack and NMOS parallel pull-down.","pair_ids":["39627b58443213d1","ea78b06765c6505d","4d892990c4862950"],"prompts":["Two-input CMOS NOR gate with PMOS stack and NMOS parallel pull-down.","Inputs A and B driven by pulsed sources to cover NOR truth table over 100ns transient simulation.","Output Y measured at key time points to verify correct logic low (<0.5V) or high (>4.5V) levels."],"measurements":[{"name":"v10n","key":"v10n","index":0,"value":2.1210856437455775e-08,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"v80n","key":"v80n","index":0,"value":5.00526505348499,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"v40n","key":"v40n","index":0,"value":5.005265053484993,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"v20n","key":"v20n","index":0,"value":5.825533730259535e-10,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"v60n","key":"v60n","index":0,"value":5.825780646240652e-10,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:01570_2bc979d9b908af90:c98902fff58dbed6","source":"deepseek","example_id":"01570_2bc979d9b908af90","test_name":"test_test_1570_opamp_active_clamp_2bc979d9b908af90","netlist_hash":"c98902fff58dbed6","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Operates as an inverting amplifier with a gain of -1 until clamping occurs.","pair_ids":["1a7f2593ad0df48f","da5a5bdbd2f53e3d","63cd73ec7294ae65","d90aa6560af3a40c"],"prompts":["Operates as an inverting amplifier with a gain of -1 until clamping occurs.","Diodes D1 and D2 with DC offset voltages set the positive and negative clamping thresholds.","When the output exceeds a threshold, the respective diode conducts, reducing the gain and limiting the output swing.","The opamp maintains virtual ground at the inverting input, ensuring precise clipping levels."],"measurements":[{"name":"maxv","key":"maxv","index":0,"value":3.191713439765209,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"},{"name":"minv","key":"minv","index":0,"value":-2.203008795653716,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:01283_4178eb2510933d43:b29171a736398237","source":"deepseek","example_id":"01283_4178eb2510933d43","test_name":"test_test_1283_mos_source_degenerated_current_mirror_4178eb2510933d43","netlist_hash":"b29171a736398237","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"NMOS current mirror with source degeneration resistors (R1=1k, R2=600) to adjust mirror ratio.","pair_ids":["4c32e00084c4b0a3","2c622701c8747327","0912e628b0b84366"],"prompts":["NMOS current mirror with source degeneration resistors (R1=1k, R2=600) to adjust mirror ratio.","Reference current set by Rref=10k and Vdd=5V, output current drawn through Vds2 source.","Transistor width ratio 2:1 (M2 W=20u, M1 W=10u) modified by degeneration to yield ~1.8 mirror ratio."],"measurements":[{"name":"iref","key":"iref","index":0,"value":0.00033836291493734874,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"iout","key":"iout","index":0,"value":0.0006200457465772144,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"ratio","key":"ratio","index":0,"value":1.8324873063941478,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#2 DC"}]} +{"id":"deepseek:01583_6fd0a732ff5764c4:67ff3e459195c160","source":"deepseek","example_id":"01583_6fd0a732ff5764c4","test_name":"test_test_1583_opamp_sample_hold_ideal_switch_6fd0a732ff5764c4","netlist_hash":"67ff3e459195c160","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Design an op-amp sample-and-hold circuit with an ideal switch and E-source buffer. Input is a 1kHz 1V amplitude sine wave. Sample at its positive peak (0.25ms) using a pulse-controlled switch, then observe the held output at 0.3ms and 0.8ms.","pair_ids":["544baa8c8bc47005","be41d80ef90d8301","6ec29c5d70b1372b"],"prompts":["Design an op-amp sample-and-hold circuit with an ideal switch and E-source buffer. Input is a 1kHz 1V amplitude sine wave. Sample at its positive peak (0.25ms) using a pulse-controlled switch, then observe the held output at 0.3ms and 0.8ms.","Create a sample-and-hold using an ideal switch controlled by a PULSE source, a capacitor, and an ideal op-amp voltage follower. The input VIN is a SIN source. Close the switch for 0.25ms to sample, then hold. Measure the output voltage shortly after the switch opens and later to confirm hold.","Implement a monolithic sample-and-hold with E-source op-amp and SW model. Use a 1V 1kHz sine input, sample at 0.25ms, and verify the output holds ~1V by measuring at 0.3ms and 0.8ms."],"measurements":[{"name":"held_late","key":"held_late","index":0,"value":0.9993387898242756,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"held_initial","key":"held_initial","index":0,"value":0.9999367010403171,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00268_67a47c54a3793c49:d1c41698ecd97ad5","source":"deepseek","example_id":"00268_67a47c54a3793c49","test_name":"test_test_268_mosfet_diff_pair_active_load_67a47c54a3793c49","netlist_hash":"d1c41698ecd97ad5","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"The netlist implements a simple NMOS differential pair with an active PMOS current mirror load.","pair_ids":["a5b1b8a09c14e079","28751340ed7cea3e","85ebee5c97ffbb65","a002e84f44855573"],"prompts":["The netlist implements a simple NMOS differential pair with an active PMOS current mirror load.","The tail bias is provided by an ideal 500\u00b5A current source from N001 to ground.","The input common-mode is 2.5V. VIN1 is swept from 0 to 5V at 10mV steps while VIN2 is held at 2.5V.","The DC transfer characteristic is captured via measurements, including small-signal gain and output limits."],"measurements":[{"name":"GAIN","key":"GAIN","index":0,"value":72.14579592222195,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#2 DC"},{"name":"VOUT_MIN","key":"VOUT_MIN","index":0,"value":-0.5862688475562663,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#2 DC"},{"name":"VOUT_MAX","key":"VOUT_MAX","index":0,"value":4.999999997352045,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#2 DC"},{"name":"VOUT2","key":"VOUT2","index":0,"value":4.324030227080643,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"VOUT1","key":"VOUT1","index":0,"value":3.6025722678584233,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"VOUT_QUIESC","key":"VOUT_QUIESC","index":0,"value":3.6025722678584233,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"}]} +{"id":"deepseek:01762_a396dd4d25cf5aaa:e4b2b7599c5cfd0c","source":"deepseek","example_id":"01762_a396dd4d25cf5aaa","test_name":"test_test_1762_wien_bridge_oscillator_diode_amp_ctrl_a396dd4d25cf5aaa","netlist_hash":"e4b2b7599c5cfd0c","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Wien bridge oscillator with behavioral op\u2011amp (E-element) and diode\u2011limited negative feedback.","pair_ids":["446b48c4d6f868de","6c3eb6f4272166ed","a2e4ed65d9c495cf"],"prompts":["Wien bridge oscillator with behavioral op\u2011amp (E-element) and diode\u2011limited negative feedback.","Frequency\u2011selective network uses equal 10 k\u03a9 resistors and 10 nF capacitors, giving a theoretical frequency of \u22481590 Hz.","Diode model IS=1E-17 provides a high forward voltage at nanoscale currents, stabilizing the output amplitude near 1 V peak."],"measurements":[{"name":"Vpeak","key":"Vpeak","index":0,"value":1.0870677433267701,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"},{"name":"period","key":"period","index":0,"value":0.0006314919933601262,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 TRAN"},{"name":"freq","key":"freq","index":0,"value":1583.5513522175754,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00651_7c338735598762a2:1f8c1e045ce9a399","source":"deepseek","example_id":"00651_7c338735598762a2","test_name":"test_test_651_passive_rlc_bessel_ladder_7c338735598762a2","netlist_hash":"1f8c1e045ce9a399","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"5th-order passive LC ladder Bessel lowpass filter with 50 Ohm source and load.","pair_ids":["5bd0585c33c175ba","f3d4fcccf101e4ea","ebd97508df5c7919"],"prompts":["5th-order passive LC ladder Bessel lowpass filter with 50 Ohm source and load.","Designed for -3 dB cutoff near 1 kHz (passband gain -6 dB due to double termination).","AC analysis from 10 Hz to 10 kHz to capture the roll-off and measure -3 dB point."],"measurements":[{"name":"f3dB_expected","key":"f3dB_expected","index":0,"value":1000,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 AC"},{"name":"f3dB","key":"f3dB","index":0,"value":1000.0099367800042,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 AC"},{"name":"passband_gain","key":"passband_gain","index":0,"value":0.4999846452570568,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"f3dB_error","key":"f3dB_error","index":0,"value":9.936780004181856e-06,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 AC"}]} +{"id":"deepseek:01085_1ee0a5edb8a966b0:1ee0a5edb8a966b0","source":"deepseek","example_id":"01085_1ee0a5edb8a966b0","test_name":"test_test_1085_current_source_1ee0a5edb8a966b0","netlist_hash":"1ee0a5edb8a966b0","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Create a BJT current source that is insensitive to beta variations. Use a three-transistor base current compensated mirror. Measure the output current and the reference current, verifying they are nearly equal.","pair_ids":["f243ff40c157705a","87f2e57ef451d06d","e3bcded8d596f97f"],"prompts":["Create a BJT current source that is insensitive to beta variations. Use a three-transistor base current compensated mirror. Measure the output current and the reference current, verifying they are nearly equal.","Design a beta-insensitive bias cell using a compensated current mirror. The circuit should output a current set by a reference resistor. Verify beta insensitivity by comparing output and reference currents.","Build a beta-insensitive current source with a compensated BJT mirror. The output current should closely follow the reference current over a supply voltage sweep from 9V to 15V. Use .MEAS to quantify the match."],"measurements":[{"name":"iref_max","key":"iref_max","index":0,"value":0.0012306485889425134,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#2 DC"},{"name":"iref_nom","key":"iref_nom","index":0,"value":0.000961551975333965,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"iout_max","key":"iout_max","index":0,"value":0.0012304049668726265,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#2 DC"},{"name":"iref_min","key":"iref_min","index":0,"value":0.0006928328609012262,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#2 DC"},{"name":"iout_min","key":"iout_min","index":0,"value":0.0006926957064968769,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#2 DC"},{"name":"iout_nom","key":"iout_nom","index":0,"value":0.0009613616244787374,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"}]} +{"id":"deepseek:00462_4e22a398e5ab1a5d:6efc31937798451e","source":"deepseek","example_id":"00462_4e22a398e5ab1a5d","test_name":"test_test_462_resistive_h_pad_attenuator_4e22a398e5ab1a5d","netlist_hash":"6efc31937798451e","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"10 dB balanced H-pad attenuator with 600 ohm characteristic impedance.","pair_ids":["dd4cc7630f0e77fb","9089507ad5c0f580","d772d3129020fdee","078d83458f981a84"],"prompts":["10 dB balanced H-pad attenuator with 600 ohm characteristic impedance.","Resistor values: series arms 155.848 ohms, shunt arm 421.637 ohms.","Input source 1V AC at in+, with in- grounded to provide DC reference.","Attenuation measured differentially across 600 ohm load."],"measurements":[{"name":"atten_db","key":"atten_db","index":0,"value":-9.999993155947518,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"}]} +{"id":"deepseek:00796_d2f902e0b0800a2e:bd0ddc7c2275cdb8","source":"deepseek","example_id":"00796_d2f902e0b0800a2e","test_name":"test_test_796_diode_ring_modulator_d2f902e0b0800a2e","netlist_hash":"bd0ddc7c2275cdb8","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Diode ring modulator mixing 100 MHz RF with 90 MHz LO to produce 10 MHz IF","pair_ids":["eb399342a9d8a035","49047c4cf0829ede","96ed80d1620ab47a"],"prompts":["Diode ring modulator mixing 100 MHz RF with 90 MHz LO to produce 10 MHz IF","Transformers modeled as voltage-controlled voltage sources with center-tapped secondaries","Conversion loss measured by comparing output peak-to-peak voltage to RF input peak-to-peak"],"measurements":[{"name":"vrf_pp","key":"vrf_pp","index":0,"value":0.19999998138187736,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#1 TRAN"},{"name":"vout_pp","key":"vout_pp","index":0,"value":0.10348216121873195,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:01344_f019f2495d947e41:f019f2495d947e41","source":"deepseek","example_id":"01344_f019f2495d947e41","test_name":"test_test_1344_cmos_transmission_gate_sample_hold_f019f2495d947e41","netlist_hash":"f019f2495d947e41","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Design a CMOS transmission gate sample-and-hold circuit. Use a 5V supply, a 1kHz sinusoidal input, and a 100kHz sampling clock. Measure the tracking error during the on phase and the hold error after the switch opens.","pair_ids":["15a84752cc032dd3","05b357569ccfec98","cb1b897722f6b7c6","401efba98eba9876"],"prompts":["Design a CMOS transmission gate sample-and-hold circuit. Use a 5V supply, a 1kHz sinusoidal input, and a 100kHz sampling clock. Measure the tracking error during the on phase and the hold error after the switch opens.","Create a SPICE netlist for an NMOS-PMOS transmission gate switch used to sample a 1kHz sine wave onto a 100pF capacitor with a 10us period control pulse. Verify the output holds the sampled voltage accurately.","Simulate a CMOS analog switch in a sample-hold configuration. The switch is controlled by complementary 0-5V pulses. Input is a 1kHz sine wave offset to 2.5V. Measure how well the output tracks input when the switch is closed, and how much voltage error develops 2us after the switch opens.","Build a sample-and-hold using a CMOS transmission gate. Provide .MEAS commands to quantify the tracking error at 3us and the hold error at 7us after a 5us sample pulse. Use 5V supply, 100pF hold capacitor, and a 100MEG bleeder resistor."],"measurements":[{"name":"hold_error","key":"hold_error","index":0,"value":0.0011287256842997806,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 tran"},{"name":"vin_at_5u","key":"vin_at_5u","index":0,"value":2.5785268951901896,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 tran"},{"name":"vin_at_3u","key":"vin_at_3u","index":0,"value":2.5471209269308592,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 tran"},{"name":"vhold_at_3u","key":"vhold_at_3u","index":0,"value":2.5465592371855,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 tran"},{"name":"vhold_at_7u","key":"vhold_at_7u","index":0,"value":2.57739816950589,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 tran"},{"name":"tracking_error","key":"tracking_error","index":0,"value":0.0005616897453593062,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 tran"}]} +{"id":"deepseek:00735_8a71948b7277e3ba:4638d1d0a141e5ab","source":"deepseek","example_id":"00735_8a71948b7277e3ba","test_name":"test_test_735_active_peak_detector_with_reset_8a71948b7277e3ba","netlist_hash":"4638d1d0a141e5ab","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"Input sine wave offset 1V, amplitude 1V, 1kHz.","pair_ids":["0bcff7f89a337e1a","4c203743b33ddc3b","0c8cecc7447ed9a3","c1f7352a0a453bd1","878abe33e85af119"],"prompts":["Input sine wave offset 1V, amplitude 1V, 1kHz.","Active peak detector: op\u2011amp feedback after diode eliminates forward drop.","Hold capacitor 1\u00b5F with 1M\u03a9 bleed resistor gives ~1s time constant.","NMOS switch resets the hold capacitor when reset gate is pulsed high.","Output buffer isolates the hold capacitor from measurement."],"measurements":[{"name":"v_start","key":"v_start","index":0,"value":1.9965318492818145,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"droop","key":"droop","index":0,"value":0.001024052394292374,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 TRAN"},{"name":"v_peak","key":"v_peak","index":0,"value":1.9982931357273592,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"},{"name":"reset_time","key":"reset_time","index":0,"value":-0.00430748116294747,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 TRAN"},{"name":"v_end","key":"v_end","index":0,"value":1.9955077968875221,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00046_4861966f8f69f9e8:d24c09961f4d0b41","source":"deepseek","example_id":"00046_4861966f8f69f9e8","test_name":"test_test_46_two_pole_rc_lpf_4861966f8f69f9e8","netlist_hash":"d24c09961f4d0b41","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Two-stage passive RC low-pass filter using R=10k\u03a9, C=10nF.","pair_ids":["47a2cee33219dd46","b686932d539b01b3","60aabecbe6c5479d"],"prompts":["Two-stage passive RC low-pass filter using R=10k\u03a9, C=10nF.","AC analysis from 1 Hz to 100 kHz with 100 points per decade.","Cutoff frequency designed to be approximately 595 Hz."],"measurements":[{"name":"att_10k","key":"att_10k","index":0,"value":-32.63847692333337,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"cutoff_freq","key":"cutoff_freq","index":0,"value":594.2324044210103,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 AC"},{"name":"dc_gain","key":"dc_gain","index":0,"value":-1.2001665338733302e-05,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:02460_f18563a48b499984:398e26a860ef2be5","source":"deepseek","example_id":"02460_f18563a48b499984","test_name":"test_test_2460_dtl_nand_gate_f18563a48b499984","netlist_hash":"398e26a860ef2be5","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"DTL NAND gate transient truth table verification","pair_ids":["352132549b4b6cfa","a0b8826c73be3779","931be9e3752850d9"],"prompts":["DTL NAND gate transient truth table verification","Uses two pulsed inputs to generate all four input combinations: 00, 10, 11, 01","Measures output voltage in each interval to verify NAND logic"],"measurements":[{"name":"vout_high1","key":"vout_high1","index":0,"value":4.999999989811297,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"},{"name":"vout_high2","key":"vout_high2","index":0,"value":4.9999999896362555,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"},{"name":"vout_high3","key":"vout_high3","index":0,"value":4.999999989811297,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"},{"name":"vout_low","key":"vout_low","index":0,"value":0.07912679038415606,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:02364_c370f41c42d0deca:56b81a5a5ae7a9c1","source":"deepseek","example_id":"02364_c370f41c42d0deca","test_name":"test_test_2364_rc_pulse_stretcher_c370f41c42d0deca","netlist_hash":"56b81a5a5ae7a9c1","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Constructs an RC pulse stretcher using a diode, resistor, and capacitor.","pair_ids":["373d1f261bbe4137","4379a95b46581bd4","5d9778f1a4723097"],"prompts":["Constructs an RC pulse stretcher using a diode, resistor, and capacitor.","Applies a 1 \u00b5s, 5V input pulse and observes the capacitor voltage.","Verifies that the output pulse width is significantly stretched compared to the input."],"measurements":[{"name":"out_width","key":"out_width","index":0,"value":8.557137376158995e-05,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 TRAN"},{"name":"in_width","key":"in_width","index":0,"value":1.0099999999999999e-06,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 TRAN"},{"name":"vout_max","key":"vout_max","index":0,"value":4.658686050677827,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:02458_3a43cda12eebc70c:fa9596d0fd3182c1","source":"deepseek","example_id":"02458_3a43cda12eebc70c","test_name":"test_test_2458_dtl_nand_gate_3a43cda12eebc70c","netlist_hash":"fa9596d0fd3182c1","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Two\u2011input DTL NAND gate: inputs via diodes (anodes to common node n1) to transistor base via resistor R2.","pair_ids":["56054c0de57a87dd","71ca960c123d3229","1cfa3fed73d7dc4a"],"prompts":["Two\u2011input DTL NAND gate: inputs via diodes (anodes to common node n1) to transistor base via resistor R2.","Transistor emitter grounded, collector pulled up by R3; transistor turns on only when both inputs are high, pulling output low.","Input pulses generate all four states sequentially; transient analysis measures output at 5\u00b5s, 15\u00b5s, 25\u00b5s, and 35\u00b5s."],"measurements":[{"name":"VOUT10","key":"VOUT10","index":0,"value":4.959474012799928,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"VOUT00","key":"VOUT00","index":0,"value":4.978913360705405,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"VOUT01","key":"VOUT01","index":0,"value":4.9594740127999275,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"VOUT11","key":"VOUT11","index":0,"value":0.08105286589563417,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00850_cf3f6dc872b280e6:e19fd6335aea167e","source":"deepseek","example_id":"00850_cf3f6dc872b280e6","test_name":"test_test_850_zener_reference_emitter_follower_cf3f6dc872b280e6","netlist_hash":"e19fd6335aea167e","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"A Zener diode (5.6 V) is reverse-biased through a resistor, creating a stable reference voltage at the cathode.","pair_ids":["c0efe51d5fed2258","5c307de81af11db8","356035dd8277a389"],"prompts":["A Zener diode (5.6 V) is reverse-biased through a resistor, creating a stable reference voltage at the cathode.","An NPN emitter follower buffers this reference, providing a low-impedance output near 4.9 V.","The initial netlist had the Zener diode oriented incorrectly (anode to positive rail), causing no breakdown and near-zero output; swapped anode to ground to fix."],"measurements":[{"name":"line_reg","key":"line_reg","index":0,"value":0.013424914603152427,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#2 DC"},{"name":"Vout_12V","key":"Vout_12V","index":0,"value":4.925554996266632,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"Vout_10V","key":"Vout_10V","index":0,"value":4.898705167060327,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"}]} +{"id":"deepseek:00773_a5fff70565eef1f0:859c0477e275687a","source":"deepseek","example_id":"00773_a5fff70565eef1f0","test_name":"test_test_773_diode_and_gate_a5fff70565eef1f0","netlist_hash":"859c0477e275687a","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Diode AND gate using two diodes with anodes connected to the output node and cathodes to inputs.","pair_ids":["c7db2f09461d9bb9","d763ad548eba345b","4599054245cb6ed3","6f18b19674a09417"],"prompts":["Diode AND gate using two diodes with anodes connected to the output node and cathodes to inputs.","Pull-up resistor to 5 V supply.","Input pulse sources with 0 V low and 5 V high.","Model with saturation current IS=1e-10 A, N=1."],"measurements":[{"name":"vout_high","key":"vout_high","index":0,"value":5.000000000000001,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"vout_low_in2","key":"vout_low_in2","index":0,"value":0.4560346381058072,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"vout_low_in1","key":"vout_low_in1","index":0,"value":0.4560346381058072,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"vout_both_low","key":"vout_both_low","index":0,"value":0.4382082194106876,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:01329_db772c3e7edb50f3:fbf0a998ce15e591","source":"deepseek","example_id":"01329_db772c3e7edb50f3","test_name":"test_test_1329_mos_diode_connected_transistor_load_db772c3e7edb50f3","netlist_hash":"fbf0a998ce15e591","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Design a diode-connected NMOS load with a 1k resistor from a 5V supply and perform DC analysis, extracting the output voltage and supply current.","pair_ids":["2959214acccbd778","9827dcb7f254c826","8a7ff0898ff525de","b14352426de35fc9"],"prompts":["Design a diode-connected NMOS load with a 1k resistor from a 5V supply and perform DC analysis, extracting the output voltage and supply current.","Create a SPICE netlist for a diode-connected NMOS using a 1k resistor to VDD, run .OP and .DC, and measure the drain voltage at 5V supply.","Simulate a MOS diode-connected transistor as a load with a 1k resistor tied to 5V, perform operating point and DC sweep, and report the resulting bias point.","Produce a measured netlist for a diode-connected NMOS with a resistive load, analyze its DC characteristics, and verify the output voltage is around 3V."],"measurements":[{"name":"Vout","key":"Vout","index":0,"value":2.961761754430054,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"Idd","key":"Idd","index":0,"value":0.002038238245569946,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"}]} +{"id":"deepseek:02010_bd39986d50fe0dc6:330fac13cbddf62a","source":"deepseek","example_id":"02010_bd39986d50fe0dc6","test_name":"test_test_2010_ideal_diode_oring_mux_bd39986d50fe0dc6","netlist_hash":"330fac13cbddf62a","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Ideal-diode ORing power multiplexer with P-channel MOSFETs and comparator controllers.","pair_ids":["fc61122dac698884","c8ca3a16919b77c8","02ec2f8e76941b90","89120639d3aaa81c"],"prompts":["Ideal-diode ORing power multiplexer with P-channel MOSFETs and comparator controllers.","V1=12 V, V2=11.5 V initially; after 1 ms V2 rises to 13 V, causing a supply switchover.","MOSFET body terminals are tied to output to block reverse current through the intrinsic body diode.","Comparator gain of -100 ensures fast gate drive; 1 nF gate-source capacitors improve convergence."],"measurements":[{"name":"Vout","key":"Vout","index":0,"value":12.87851345847274,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 tran"},{"name":"I_V2_after","key":"I_V2_after","index":0,"value":-1.287851345848158,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 tran"},{"name":"I_V1_after","key":"I_V1_after","index":0,"value":8.885578933873506e-13,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 tran"},{"name":"I_V2_before","key":"I_V2_before","index":0,"value":3.92990176151952e-13,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 tran"},{"name":"I_V1_before","key":"I_V1_before","index":0,"value":-1.188298375009549,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 tran"}]} +{"id":"deepseek:02018_fbaf5df2fdfecc58:676acd541f4f1be9","source":"deepseek","example_id":"02018_fbaf5df2fdfecc58","test_name":"test_test_2018_hot_swap_inrush_limiter_fbaf5df2fdfecc58","netlist_hash":"676acd541f4f1be9","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"P-MOSFET M1 passes power with soft-start provided by Cgs (82\u202fnF) and Rg (10\u202fk\u03a9) forming an RC network that slowly pulls the gate low.","pair_ids":["c854985edaa62779","8b11e2d5458f412a","441e5c38f017bccf","18a5a96be99d561f"],"prompts":["P-MOSFET M1 passes power with soft-start provided by Cgs (82\u202fnF) and Rg (10\u202fk\u03a9) forming an RC network that slowly pulls the gate low.","PNP transistor Q1 with sense resistor R1 (0.1\u202f\u03a9) limits inrush current to approximately 6.5\u202fA by pulling the gate high when current exceeds the limit.","100\u202f\u00b5F output capacitor CLOAD and 2\u202f\u03a9 resistive load RLOAD determine steady-state voltage and rise time together with the soft-start.","The input pulse V1 ramps from 0 to 12\u202fV at 1\u202fms, simulating a hot-plug event; simulation runs for 200\u202fms."],"measurements":[{"name":"T_RISE","key":"T_RISE","index":0,"value":0.0014925050598101255,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 tran"},{"name":"VOUT_STEADY","key":"VOUT_STEADY","index":0,"value":11.428576760563109,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 tran"},{"name":"I_INRUSH","key":"I_INRUSH","index":0,"value":6.617225469108234,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 tran"}]} +{"id":"deepseek:00882_cace216472574587:4dafb37adedbfb45","source":"deepseek","example_id":"00882_cace216472574587","test_name":"test_test_882_bootstrapped_diode_charge_pump_cace216472574587","netlist_hash":"4dafb37adedbfb45","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Create a bootstrapped diode charge pump circuit that shifts a 5V supply to a higher DC voltage using a pulsed clock.","pair_ids":["a5adb0fc15abedc5","1a28dd5f9f4ee879","ffc77dd28c2524a8","0e65931451c5a4e1"],"prompts":["Create a bootstrapped diode charge pump circuit that shifts a 5V supply to a higher DC voltage using a pulsed clock.","Design a Dickson charge pump level shifter with two diodes and two capacitors, driven by a 100kHz square wave.","Make a SPICE netlist for a diode-based voltage doubler that uses bootstrapping to generate approximately double the input voltage.","I need a simulation of a charge pump level shifter that takes a 5V input and produces a boosted output using a pulse source."],"measurements":[{"name":"vout_avg","key":"vout_avg","index":0,"value":8.640149669245481,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 tran"}]} +{"id":"deepseek:00777_3d5febbb3dc775a2:781de1d5b22ee77d","source":"deepseek","example_id":"00777_3d5febbb3dc775a2","test_name":"test_test_777_diode_steering_protection_3d5febbb3dc775a2","netlist_hash":"781de1d5b22ee77d","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Diode steering protection network using two diodes to clamp input voltage between VCC and ground.","pair_ids":["e9399ee2e81179a5","01d72c9fb6a6803a","0cc8b86c0110e79c"],"prompts":["Diode steering protection network using two diodes to clamp input voltage between VCC and ground.","Input node is driven by a voltage pulse through a series resistor, diodes steer overvoltage to rails.","Transient analysis verifies clamping behavior."],"measurements":[{"name":"vmin","key":"vmin","index":0,"value":-0.722001397112674,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 tran"},{"name":"vmax","key":"vmax","index":0,"value":5.6971455804582956,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 tran"}]} +{"id":"deepseek:00636_868a0b68dca38048:7f65789aba1bda12","source":"deepseek","example_id":"00636_868a0b68dca38048","test_name":"test_test_636_rc_differentiating_edge_detector_868a0b68dca38048","netlist_hash":"7f65789aba1bda12","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Design a simple RC high-pass filter with a series capacitor and resistor to ground to differentiate a pulse waveform, producing spikes at the edges.","pair_ids":["578c08141b6347fb","2cc85e0096bf9bb7","52c31ab9869aadc3","e8f7d73689dcc7e8"],"prompts":["Design a simple RC high-pass filter with a series capacitor and resistor to ground to differentiate a pulse waveform, producing spikes at the edges.","Create an edge detector using a capacitor and resistor: apply a pulse and measure the output voltage across the resistor.","Build an RC differentiator circuit that converts a square pulse into positive and negative spikes at the rising and falling edges.","Implement a passive differentiator with a capacitor and resistor, where the output responds to changes in the input voltage."],"measurements":[{"name":"v_mid","key":"v_mid","index":0,"value":0.015730695100081914,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 TRAN"},{"name":"v_fall","key":"v_fall","index":0,"value":-4.756109605693584,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 TRAN"},{"name":"v_rise","key":"v_rise","index":0,"value":4.758438486724903,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00444_09c49b2b769d015d:0475e7a39b930dbf","source":"deepseek","example_id":"00444_09c49b2b769d015d","test_name":"test_test_444_kelvin_double_bridge_09c49b2b769d015d","netlist_hash":"0475e7a39b930dbf","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"A Kelvin double bridge circuit eliminates the effect of lead resistance when measuring a small unknown resistor (Rx).","pair_ids":["164a2dbdd27fcee6","4435e9e5101f11db","810dbc39dae92481","d5b25b580294366a"],"prompts":["A Kelvin double bridge circuit eliminates the effect of lead resistance when measuring a small unknown resistor (Rx).","The bridge consists of a standard resistor (Rs = 0.01 \u03a9), a lead resistance (R_lead = 0.001 \u03a9), and the unknown Rx modeled as a voltage-controlled resistor (R = V(ctrl)).","Outer ratio arms (R1, R2) connect across the full supply, and inner ratio arms (R3, R4) connect across the lead, ensuring the balance condition Rx = Rs when R1/R2 = R3/R4.","A DC sweep of Vrx_ctrl varies Rx from 0.001 \u03a9 to 0.1 \u03a9 to locate the zero-crossing of the bridge output voltage V(out)."],"measurements":[{"name":"balRx","key":"balRx","index":0,"value":0.009999999999999988,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 DC"}]} +{"id":"deepseek:01459_45e0fed669667b90:92a3608565fb67d1","source":"deepseek","example_id":"01459_45e0fed669667b90","test_name":"test_test_1459_opamp_averaging_amplifier_45e0fed669667b90","netlist_hash":"92a3608565fb67d1","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Op-amp based averaging amplifier with four inputs","pair_ids":["82552f7ede68feff","18fcf4cfd858e7fa","8bb8a142ce58158a","e72bd45f6c427ad5"],"prompts":["Op-amp based averaging amplifier with four inputs","Uses an ideal op-amp with open-loop gain 100k and negative feedback","Each input is scaled by -Rf/R = -2.5k/10k = -0.25","Output is the negative average of the inputs: -(1+2+3+4)/4 = -2.5V"],"measurements":[{"name":"Vout_ac","key":"Vout_ac","index":0,"value":-0.25000500010000204,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 ac"},{"name":"Vout","key":"Vout","index":0,"value":-2.5000500010000204,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#3 dc"}]} +{"id":"deepseek:00266_b47c5115cd0b8fb7:25fdaa5087425cdb","source":"deepseek","example_id":"00266_b47c5115cd0b8fb7","test_name":"test_test_266_mos_diff_pair_active_load_b47c5115cd0b8fb7","netlist_hash":"25fdaa5087425cdb","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"NMOS differential pair with PMOS active load biassed by 100u tail current.","pair_ids":["ffdee977d6596160","a3c66aac39e3fbd4","7a6d951a81f9eabf","27ff196a0377fbe4"],"prompts":["NMOS differential pair with PMOS active load biassed by 100u tail current.","DC sweep of one input around 0V to find DC transfer curve.","Measures output offset, gain magnitude from slope between -10mV and +10mV, and supply currents.","Transistor sizes: NMOS W=10u L=2u, PMOS W=100u L=2u to set output offset around 3.8V."],"measurements":[{"name":"i_tail","key":"i_tail","index":0,"value":0.0001,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"vout0","key":"vout0","index":0,"value":3.802353082378725,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"vout_neg","key":"vout_neg","index":0,"value":2.5608182562036457,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"i_vss","key":"i_vss","index":0,"value":0.0001,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"vout_pos","key":"vout_pos","index":0,"value":4.819632684724321,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"gain","key":"gain","index":0,"value":112.94072142603378,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#2 DC"},{"name":"i_vdd","key":"i_vdd","index":0,"value":0.00010000002479366557,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"}]} +{"id":"deepseek:01972_5dc3fae6f79274a5:ac6f6fb05dc1eed0","source":"deepseek","example_id":"01972_5dc3fae6f79274a5","test_name":"test_test_1972_sepic_converter_simplified_switching_5dc3fae6f79274a5","netlist_hash":"ac6f6fb05dc1eed0","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"SEPIC converter using voltage-controlled switch and diode.","pair_ids":["4a10cd4d245aa976","50819e51adb3097d","9f7168fe29592ff5"],"prompts":["SEPIC converter using voltage-controlled switch and diode.","Steps up 12V to 18V at 60% duty cycle, switching at 100 kHz.","Output voltage ripple is measured over the last millisecond of simulation."],"measurements":[{"name":"Vout_ripple","key":"Vout_ripple","index":0,"value":0.19862196189752268,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#1 TRAN"},{"name":"Vout_avg","key":"Vout_avg","index":0,"value":17.469369940351456,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00734_12fecf531972fbcb:43bce959de1888b6","source":"deepseek","example_id":"00734_12fecf531972fbcb","test_name":"test_test_734_peak_detector_sample_hold_opamp_buffer_12fecf531972fbcb","netlist_hash":"43bce959de1888b6","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Active peak detector circuit with sample-hold and buffer.","pair_ids":["715d5964e5d3b263","512e0e96d2a327eb","d808c1b855a55263","8d4d500dd531910e"],"prompts":["Active peak detector circuit with sample-hold and buffer.","Uses behavioral E-sources to model op-amps with finite gain.","Diode and capacitor form the peak detector core.","Switch controlled by pulse source implements sample-hold."],"measurements":[{"name":"hold_start_vout","key":"hold_start_vout","index":0,"value":4.9623069073609765,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"droop","key":"droop","index":0,"value":0.2280001928311588,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 TRAN"},{"name":"max_vout","key":"max_vout","index":0,"value":5.004919881566141,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"},{"name":"hold_end_vout","key":"hold_end_vout","index":0,"value":4.734306714529818,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"droop_mv","key":"droop_mv","index":0,"value":228.0001928311588,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:02440_c11b9477188e0ff8:0dbf197535035094","source":"deepseek","example_id":"02440_c11b9477188e0ff8","test_name":"test_test_2440_parameterized_bjt_current_mirror_c11b9477188e0ff8","netlist_hash":"0dbf197535035094","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Make a parameterized BJT current mirror circuit using two NPN transistors.","pair_ids":["4f9020fba915aafb","d31a2a2dfe5d1f5c","ac665fc272c04497"],"prompts":["Make a parameterized BJT current mirror circuit using two NPN transistors.","Design a current mirror with a reference resistor and a supply voltage as parameters.","Create a SPICE netlist for a basic BJT current mirror with adjustable resistor and supply voltage."],"measurements":[{"name":"I_OUT_10","key":"I_OUT_10","index":0,"value":0.0010020444171031152,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"I_REF_10","key":"I_REF_10","index":0,"value":0.0009347158948282144,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"MIRROR_RATIO","key":"MIRROR_RATIO","index":0,"value":1.0720310017700883,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#2 DC"}]} +{"id":"deepseek:01520_a3daa15bbd972b7d:35b72b0a8287d0b8","source":"deepseek","example_id":"01520_a3daa15bbd972b7d","test_name":"test_test_1520_opamp_a3daa15bbd972b7d","netlist_hash":"35b72b0a8287d0b8","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"The Howland current pump uses a single op-amp (gain 100000) with four 5 k\u03a9 resistors and a 500 \u03a9 load.","pair_ids":["63ed10dd44d21c61","9b3306453d4917a7","99ee7203cd5e39de"],"prompts":["The Howland current pump uses a single op-amp (gain 100000) with four 5 k\u03a9 resistors and a 500 \u03a9 load.","The load is connected between the inverting input and ground, forcing the op-amp to supply a constant current proportional to input voltage.","With all resistors equal, the output current is Vin / R (200 \u00b5A per volt) and the load voltage is Vin * (Rload / R) = 0.1 V at Vin=1 V."],"measurements":[{"name":"VOUT_1V","key":"VOUT_1V","index":0,"value":0.10000040000950457,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#3 DC"},{"name":"IOUT_1V","key":"IOUT_1V","index":0,"value":0.00020000080001900914,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#3 DC"},{"name":"MAX_GAIN","key":"MAX_GAIN","index":0,"value":0.10000040000960023,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#2 AC"}]} +{"id":"deepseek:00609_41ba57b27293cae6:a578c8fe77c43b39","source":"deepseek","example_id":"00609_41ba57b27293cae6","test_name":"test_test_609_m_derived_low_pass_41ba57b27293cae6","netlist_hash":"a578c8fe77c43b39","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"An m-derived low-pass filter L-section with a shunt series LC resonant trap to create an attenuation pole at 12.5 kHz.","pair_ids":["27ab3353471d3745","a2647fe61e412512","0bee60e5b647cf22","47bbb8ecd54aeeb1","b3771d18d27003f3"],"prompts":["An m-derived low-pass filter L-section with a shunt series LC resonant trap to create an attenuation pole at 12.5 kHz.","Source and load resistances are both 50 \u03a9, ensuring matched terminations.","Inductor Lm (477.5 \u00b5H) is the m-derived series arm, and Ls (848.5 \u00b5H) with Cs (191 nF) form the series-resonant shunt branch tuned to 12.5 kHz.","AC analysis with 1000 points per decade from 100 Hz to 100 kHz provides high resolution to accurately capture the deep notch.","The f3db measurement detects the -3 dB point relative to the passband gain, while attn_pole checks the notch depth at exactly 12.5 kHz."],"measurements":[{"name":"f3db","key":"f3db","index":0,"value":10473.599116845795,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 AC"},{"name":"attn_pole","key":"attn_pole","index":0,"value":-76.18910067387726,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:01703_508cafa8266d03cd:57df468a4c544563","source":"deepseek","example_id":"01703_508cafa8266d03cd","test_name":"test_test_1703_tow_thomas_biquad_low_pass_filter_508cafa8266d03cd","netlist_hash":"57df468a4c544563","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Tow-Thomas biquad low-pass filter designed for a Butterworth response with a cutoff frequency of 1 kHz and unity DC gain.","pair_ids":["f50f7c39c175d0da","97f8a9ea6fdc28e1","5b67d78cf6f0b78a"],"prompts":["Tow-Thomas biquad low-pass filter designed for a Butterworth response with a cutoff frequency of 1 kHz and unity DC gain.","Uses 1 nF capacitors and standard resistor values to realize the second-order transfer function.","The AC analysis sweeps from 10 Hz to 100 kHz, with measurements capturing the DC gain, gain at 1 kHz, and the -3 dB frequency."],"measurements":[{"name":"f3db","key":"f3db","index":0,"value":998.5664994582803,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 AC"},{"name":"mag1k","key":"mag1k","index":0,"value":-3.0108344500384012,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"dc_gain","key":"dc_gain","index":0,"value":-0.0019037460768824648,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 AC"}]} +{"id":"deepseek:00723_2fcb271ff151c3ec:5a7169383c3e6c41","source":"deepseek","example_id":"00723_2fcb271ff151c3ec","test_name":"test_test_723_precision_fullwave_rectifier_2fcb271ff151c3ec","netlist_hash":"5a7169383c3e6c41","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Design a precision full-wave rectifier circuit using two operational amplifiers that outputs the absolute value of a sinusoidal input signal. Use behavioral opamp models with high gain and include a diode model for the rectifying element.","pair_ids":["4e72590ae36df498","6d2fa18813276c70","96818ea052442eac"],"prompts":["Design a precision full-wave rectifier circuit using two operational amplifiers that outputs the absolute value of a sinusoidal input signal. Use behavioral opamp models with high gain and include a diode model for the rectifying element.","Create an opamp-based absolute value amplifier with unity gain. The circuit should rectify the input sine wave using a diode and a pair of opamps, producing a positive output voltage equal to the absolute value of the input.","Implement a precision absolute value circuit that takes a 1kHz sine wave and outputs the full-wave rectified signal. The design employs ideal opamps and a diode, with transient analysis to verify correct operation."],"measurements":[{"name":"Vmax","key":"Vmax","index":0,"value":0.9999539363925578,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"},{"name":"Vavg","key":"Vavg","index":0,"value":0.6360302078320126,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 TRAN"},{"name":"Vin_max","key":"Vin_max","index":0,"value":0.999999892661015,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"},{"name":"Vmin","key":"Vmin","index":0,"value":-4.651783420434689e-16,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:02195_23f823a4c3bc299d:3bdc36f282d2d4f8","source":"deepseek","example_id":"02195_23f823a4c3bc299d","test_name":"test_test_2195_pwm_dac_rc_filter_23f823a4c3bc299d","netlist_hash":"3bdc36f282d2d4f8","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"PWM signal with 50% duty cycle and 20 kHz frequency","pair_ids":["133258a7b2f0482f","da5c8f9252cd27b2","118fe10332139a16"],"prompts":["PWM signal with 50% duty cycle and 20 kHz frequency","First-order RC low-pass filter with R=5k, C=1u","Transient simulation for 25ms with measurements in the last 5ms"],"measurements":[{"name":"vout_avg","key":"vout_avg","index":0,"value":2.4721165501494973,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 TRAN"},{"name":"vripple","key":"vripple","index":0,"value":0.041296246249746815,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00037_9cf3a84af22b98a0:5eecd5736307f079","source":"deepseek","example_id":"00037_9cf3a84af22b98a0","test_name":"test_test_37_rc_delay_network_with_high_impedance_load_9cf3a84af22b98a0","netlist_hash":"5eecd5736307f079","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"RC delay circuit with R=1k, C=100nF, 5V step input, and a 10M\u03a9 high\u2011impedance load.","pair_ids":["3cfd77163850a1d6","344748cee938f129","8b464b3b1a23d681"],"prompts":["RC delay circuit with R=1k, C=100nF, 5V step input, and a 10M\u03a9 high\u2011impedance load.","Output charges exponentially with time constant \u03c4 = R\u00b7C = 100 \u00b5s (negligible load effect).","Pulse width set to 500 \u00b5s to allow full charging before the simulation ends."],"measurements":[{"name":"tau","key":"tau","index":0,"value":9.999914340344815e-05,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:01229_bf25977f0b3c3ed0:053f781160f26884","source":"deepseek","example_id":"01229_bf25977f0b3c3ed0","test_name":"test_test_1229_nmos_cascode_gain_stage_bf25977f0b3c3ed0","netlist_hash":"053f781160f26884","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"NMOS cascode amplifier with common\u2011source input (M1) and cascode device (M2).","pair_ids":["245f202580b617e8","2b0d7116fc220fb1","4f3432a79ffc22ae","ada4f389c3ea7580","f57a7fd0f1edb6d7"],"prompts":["NMOS cascode amplifier with common\u2011source input (M1) and cascode device (M2).","M1 and M2 are sized W=1u L=1u to set a bias current of about 169 \u00b5A, placing the output near mid\u2011supply (~3.31 V).","The 10 k\u03a9 drain resistor sees the full DC current; AC gain is gm\u22c5RD \u2248 2.6 V/V (8.3 dB).","A single\u2011point DC sweep at VIN=2 V is used to provide a data point for .MEAS DC statements; .OP gives the operating point.","AC analysis sweeps from 1 kHz to 100 MHz to capture the flat low\u2011frequency gain."],"measurements":[{"name":"DC_VOUT","key":"DC_VOUT","index":0,"value":3.2591924800523095,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#3 DC"},{"name":"AC_GAIN","key":"AC_GAIN","index":0,"value":-2.644181837098091,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#2 AC"},{"name":"DC_IDD","key":"DC_IDD","index":0,"value":0.00017408075199476904,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#3 DC"},{"name":"AC_GAIN_DB","key":"AC_GAIN_DB","index":0,"value":8.445826354644824,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#2 AC"}]} +{"id":"deepseek:01816_617489d68d062795:e361f53e5a7978ce","source":"deepseek","example_id":"01816_617489d68d062795","test_name":"test_test_1816_555_style_monostable_timer_using_behavioral_comparators_617489d68d062795","netlist_hash":"e361f53e5a7978ce","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"The netlist implements a 555-style monostable timer using behavioral comparators, an SR latch, a switch, and RC timing.","pair_ids":["2769ef34fc11b25f","e8e73177c1062b95","c02f9a4b5c69e7f4","03256cf15286b3a8"],"prompts":["The netlist implements a 555-style monostable timer using behavioral comparators, an SR latch, a switch, and RC timing.","Trigger is a negative pulse at 5 ms, causing the output to go high and the capacitor to charge through R1.","Output high duration is determined by R1 and C1, giving approximately 11 ms.","Fixed latch wiring by swapping NOR gate connections so set comparator high sets Q high (output high) and reset high resets Q low."],"measurements":[{"name":"vout_min","key":"vout_min","index":0,"value":0,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 TRAN"},{"name":"pulse_width","key":"pulse_width","index":0,"value":0.011277735799990042,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 TRAN"},{"name":"vout_max","key":"vout_max","index":0,"value":5,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00788_bdfce1ff23e78a53:f435acbd185fd886","source":"deepseek","example_id":"00788_bdfce1ff23e78a53","test_name":"test_test_788_bridge_diode_polarity_protector_bdfce1ff23e78a53","netlist_hash":"f435acbd185fd886","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Design a full-wave bridge rectifier to protect a circuit from reverse polarity of a 9V battery.","pair_ids":["4c4e60bc2816a1dc","d620b9d83523865a","609ade2168390a19"],"prompts":["Design a full-wave bridge rectifier to protect a circuit from reverse polarity of a 9V battery.","Create a SPICE netlist for a bridge diode polarity protector with a load resistor and transient analysis with polarity reversal.","Simulate a diode bridge used as a battery reversal protector; apply a 9V source that reverses at 1ms and verify output remains positive."],"measurements":[{"name":"vmin","key":"vmin","index":0,"value":0.52234980177516,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#2 TRAN"},{"name":"vafter","key":"vafter","index":0,"value":7.569953417608133,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#2 TRAN"},{"name":"vbefore","key":"vbefore","index":0,"value":7.569953417608121,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#2 TRAN"}]} +{"id":"deepseek:00318_88a24e113d59630d:6ee0dac36a8c78ec","source":"deepseek","example_id":"00318_88a24e113d59630d","test_name":"test_test_318_non_inverting_opamp_ac_88a24e113d59630d","netlist_hash":"6ee0dac36a8c78ec","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Non-inverting op-amp amplifier with ideal op-amp model (E source) providing gain of 11.","pair_ids":["04cb7f03c642c10d","0e2d7a35ef383869","ef156ef8832b80d4"],"prompts":["Non-inverting op-amp amplifier with ideal op-amp model (E source) providing gain of 11.","Feedback resistors Rf=10k and Rg=1k set the gain to 1+Rf/Rg=11.","AC analysis from 1 Hz to 1 MHz with a 1V AC input, checking output at 1 kHz."],"measurements":[{"name":"gain_1k","key":"gain_1k","index":0,"value":10.998790133085361,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:00573_7f91e732b99f56ed:d4e4e2c94d5f9720","source":"deepseek","example_id":"00573_7f91e732b99f56ed","test_name":"test_test_573_fifth_order_lc_butterworth_7f91e732b99f56ed","netlist_hash":"d4e4e2c94d5f9720","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Passive fifth-order Butterworth low-pass filter implemented as a doubly-terminated LC ladder network.","pair_ids":["a8b8fc5f97df7682","7a470c6fdb01ad8e","a3f0e54d614537ed","611ae256094ee975"],"prompts":["Passive fifth-order Butterworth low-pass filter implemented as a doubly-terminated LC ladder network.","Designed for a 10kHz cutoff frequency with 50 Ohm source and load impedances.","Utilizes standard Butterworth normalized values: L1=491.8uH, C2=0.5151uF, L3=1.5915mH, C4=0.5151uF, L5=491.8uH.","AC analysis is performed from 100Hz to 1MHz with 100 points per decade."],"measurements":[{"name":"f3db","key":"f3db","index":0,"value":9994.086999169944,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 AC"},{"name":"max_gain","key":"max_gain","index":0,"value":-6.020599913282431,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 AC"},{"name":"gain_1k","key":"gain_1k","index":0,"value":-6.020599914220907,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"gain_100k","key":"gain_100k","index":0,"value":-106.02195789709715,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:00802_a86b6bd03ed77ded:7539e731862044e0","source":"deepseek","example_id":"00802_a86b6bd03ed77ded","test_name":"test_test_802_balanced_diode_mixer_a86b6bd03ed77ded","netlist_hash":"7539e731862044e0","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"This balanced diode mixer uses two diodes driven by 1 MHz RF and 10 MHz LO signals.","pair_ids":["2d9bd361f9caf649","e8701edea5f09374","42aa80df1fe93634"],"prompts":["This balanced diode mixer uses two diodes driven by 1 MHz RF and 10 MHz LO signals.","The RF and LO are applied differentially via center-tapped transformer models (voltage-controlled sources).","The IF output is taken from the RF center tap and filtered by a parallel LC tank tuned to the 9 MHz difference frequency."],"measurements":[{"name":"Vif_max","key":"Vif_max","index":0,"value":0.007807059327721999,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 tran"},{"name":"Vif_min","key":"Vif_min","index":0,"value":-0.007574237205071336,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 tran"},{"name":"Vif_avg","key":"Vif_avg","index":0,"value":-3.6928998792763825e-06,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 tran"},{"name":"Vif_pp","key":"Vif_pp","index":0,"value":0.015381296532793335,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#1 tran"}]} +{"id":"deepseek:00009_03820625769fb6e4:24afcb9c1cb353f0","source":"deepseek","example_id":"00009_03820625769fb6e4","test_name":"test_test_9_t_pad_attenuator_03820625769fb6e4","netlist_hash":"24afcb9c1cb353f0","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"T-pad attenuator with 10 dB attenuation","pair_ids":["1cf28ab095998ca8","4275745c7955c5bc","f355e4254c8372f9"],"prompts":["T-pad attenuator with 10 dB attenuation","50 Ohm characteristic impedance","DC and AC analysis"],"measurements":[{"name":"gain_db","key":"gain_db","index":0,"value":-10.00011949838608,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"vout_dc","key":"vout_dc","index":0,"value":0.31622341546101645,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"}]} +{"id":"deepseek:00510_ba187069c5efc141:44118a75d8968998","source":"deepseek","example_id":"00510_ba187069c5efc141","test_name":"test_test_510_lag_compensation_rc_ba187069c5efc141","netlist_hash":"44118a75d8968998","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"A passive RC lag compensation network with series resistor and shunt capacitor.","pair_ids":["3cbbf0f3c1d3c10c","6bb9d04beabfe9af","7a5f4ff0cd964373","d6000de2d9db832e"],"prompts":["A passive RC lag compensation network with series resistor and shunt capacitor.","The circuit forms a first-order low-pass filter, providing increasing phase lag as frequency rises.","At the cutoff frequency (1/(2\u03c0RC) \u2248 1592 Hz), the phase shift is -45\u00b0 and gain is -3 dB.","Used for phase lag compensation in control and amplifier feedback loops."],"measurements":[{"name":"phase_at_fc","key":"phase_at_fc","index":0,"value":-0.7852800198864686,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"phase_at_1k","key":"phase_at_1k","index":0,"value":-0.5609821161086237,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"gain_at_fc","key":"gain_at_fc","index":0,"value":-3.011359953992121,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"gain_at_1k","key":"gain_at_1k","index":0,"value":-1.4450701162052877,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:02338_227224b921e13f48:8894367b4f0458a4","source":"deepseek","example_id":"02338_227224b921e13f48","test_name":"test_test_2338_charge_pump_227224b921e13f48","netlist_hash":"8894367b4f0458a4","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Simple charge pump using pulse source, diodes, and capacitors to generate a boosted DC voltage.","pair_ids":["122e002f9df4f21f","428f1ad8400b2eb0","c7e464ee0274bfa7"],"prompts":["Simple charge pump using pulse source, diodes, and capacitors to generate a boosted DC voltage.","Circuit operates as a half\u2011wave voltage doubler with D1 and D2 steering charge to the output capacitor.","500\u202fkHz switching frequency and 1\u202f\u00b5F flying capacitor deliver about 3.7\u20113.9\u202fV output under 1\u202fk\u03a9 load."],"measurements":[{"name":"tres","key":"tres","index":0,"value":8.827546172616077e-05,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 TRAN"},{"name":"Vripple","key":"Vripple","index":0,"value":0.0003641881823579496,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#1 TRAN"},{"name":"Vout_avg","key":"Vout_avg","index":0,"value":3.652491067232853,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00480_8542d9069a60a680:6b7fc0237e5168e8","source":"deepseek","example_id":"00480_8542d9069a60a680","test_name":"test_test_480_rc_snubber_switching_load_8542d9069a60a680","netlist_hash":"6b7fc0237e5168e8","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Design an RC snubber network placed across the terminals of an inductive load that is switched by a pulse voltage source. Simulate the transient response and verify that the voltage across the switch does not experience excessive negative undershoot.","pair_ids":["bc7ec88da29d024b","6b68ebe7120303a6","078631295a02869a"],"prompts":["Design an RC snubber network placed across the terminals of an inductive load that is switched by a pulse voltage source. Simulate the transient response and verify that the voltage across the switch does not experience excessive negative undershoot.","Create a SPICE circuit with a pulse driving a series RL load through a source resistance. Add an RC snubber across the load to dampen ringing when the pulse turns off. Run a transient analysis and measure the minimum voltage at the switching node to confirm the snubber clamps the voltage.","Model a switching circuit with a 10 V pulse, 100 \u00b5H inductor, and 100 \u03a9 resistor as the load. Include a critical damped RC snubber across the load. Perform a .TRAN simulation and use .MEAS to find the lowest voltage at the node between the source and inductor right after the pulse goes low. Expect the snubber to prevent excessive negative transients."],"measurements":[{"name":"vsw_min","key":"vsw_min","index":0,"value":0,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:01083_15410d7dff37a442:0cd2718e3827e1ca","source":"deepseek","example_id":"01083_15410d7dff37a442","test_name":"test_test_1083_beta_insensitive_bjt_bias_15410d7dff37a442","netlist_hash":"0cd2718e3827e1ca","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Beta\u2011insensitive BJT current mirror with beta\u2011helper transistor Q3.","pair_ids":["c6b2a80f898ee2c2","5c10b5eec399e2d8","df9338db70a39bfb","e35e20c9946b0316"],"prompts":["Beta\u2011insensitive BJT current mirror with beta\u2011helper transistor Q3.","Q3 supplies the base currents of Q1 and Q2, reducing the input current error.","The output current I(V_LOAD) mirrors I(R_REF) with an error proportional to 1/\u03b2\u00b2.","The .OP and .DC analyses are included to measure DC behaviour over VCC sweep."],"measurements":[{"name":"RATIO_5","key":"RATIO_5","index":0,"value":0.9998020302858169,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#2 DC"},{"name":"I_LOAD_5","key":"I_LOAD_5","index":0,"value":0.0010195561898527945,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"I_REF_5","key":"I_REF_5","index":0,"value":0.0010197580710666595,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"}]} +{"id":"deepseek:01417_b3a79b0e2c8d9aff:3c2ce74ea4381d74","source":"deepseek","example_id":"01417_b3a79b0e2c8d9aff","test_name":"test_test_1417_jfet_limiter_for_sine_wave_stabilization_b3a79b0e2c8d9aff","netlist_hash":"3c2ce74ea4381d74","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"JFET common-source amplifier with self-bias, 4.7k drain resistor, and 1k source resistor","pair_ids":["8308a8f869b51a7b","d9ab135f9605d2b8","ccefacbd84cd527c","3831ddba70b4a5e9"],"prompts":["JFET common-source amplifier with self-bias, 4.7k drain resistor, and 1k source resistor","1 kHz, 3 V peak sinusoidal input AC-coupled through a 1 nF capacitor","Source bypass capacitor ensures high AC gain, producing hard clipping against supply rails","Output clips at approximately 15 V (positive) and 1\u20132 V (negative), yielding ~6.9 V peak amplitude"],"measurements":[{"name":"Voutpeak","key":"Voutpeak","index":0,"value":6.658541130707697,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 TRAN"},{"name":"Voutmin","key":"Voutmin","index":0,"value":1.6829176631416987,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 TRAN"},{"name":"Vpp","key":"Vpp","index":0,"value":13.317082261415393,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 TRAN"},{"name":"Voutmax","key":"Voutmax","index":0,"value":14.999999924557091,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00647_03035c32d6a6a962:a116632b9cdc52fa","source":"deepseek","example_id":"00647_03035c32d6a6a962","test_name":"test_test_647_multi_stage_rc_lowpass_filter_03035c32d6a6a962","netlist_hash":"a116632b9cdc52fa","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Two\u2011stage RC low\u2011pass filter for anti\u2011aliasing with symmetrical 1 k\u03a9 resistors and 82 nF capacitors.","pair_ids":["32227d832437b6ce","29a2da144541458b","8ba6c7045c9d01ee"],"prompts":["Two\u2011stage RC low\u2011pass filter for anti\u2011aliasing with symmetrical 1 k\u03a9 resistors and 82 nF capacitors.","AC analysis from 1 Hz to 1 MHz with 10 points per decade.","Provides a gradual roll\u2011off with a -3 dB point near 726 Hz and -4.7 dB at 1 kHz."],"measurements":[{"name":"att_1k","key":"att_1k","index":0,"value":-4.667324973656463,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 ac"},{"name":"f3db","key":"f3db","index":0,"value":724.1892692145002,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 ac"},{"name":"mag_1m","key":"mag_1m","index":0,"value":-108.47986335507561,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 ac"},{"name":"att_100k","key":"att_100k","index":0,"value":-68.49118705538017,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 ac"}]} +{"id":"deepseek:02341_36c48a1fbb51b717:935c2d8626f74a55","source":"deepseek","example_id":"02341_36c48a1fbb51b717","test_name":"test_test_2341_charge_pump_36c48a1fbb51b717","netlist_hash":"935c2d8626f74a55","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"Define a 3 V DC input source.","pair_ids":["61afa08f5e8e5f61","b76d271521cf7d73","2317ca6817f9c8d1","99c06764b195268b","e9109b79a0b2dca0"],"prompts":["Define a 3 V DC input source.","Generate a 5 V, 100 kHz clock using a PULSE source with 10 ns rise/fall times.","Place two diodes (D1, D2) to steer charge from VIN and clock into the flying capacitor Cf.","Connect the flying capacitor Cf (1 \u03bcF) between the cathode of D1 and the clock node.","Add an output capacitor Cout (10 \u03bcF) and load resistor Rload (1 k\u03a9) to hold and deliver the output voltage."],"measurements":[{"name":"Vout_ripple","key":"Vout_ripple","index":0,"value":0.003442881125885755,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#1 tran"},{"name":"Vout_avg","key":"Vout_avg","index":0,"value":6.7549751178248085,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 tran"}]} +{"id":"deepseek:00276_4a65892794bd16c1:cff188b0b8b0b2a0","source":"deepseek","example_id":"00276_4a65892794bd16c1","test_name":"test_test_276_nmos_current_mirror_with_cascode_4a65892794bd16c1","netlist_hash":"cff188b0b8b0b2a0","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"NMOS cascode current mirror with reference and output branches","pair_ids":["948f4316fccb3639","dd508829fc0b94a8","1b65d919ea5c46d1","72a91669745e2310","6c879b1d8b77832e"],"prompts":["NMOS cascode current mirror with reference and output branches","Uses diode-connected M1 to set gate voltage for M1 and M3","Cascode devices M2 and M4 improve output impedance and matching","Resistors Rref and Rload limit currents and set the operating point","Measurements verify currents are equal and VDS of M1 and M3 match"],"measurements":[{"name":"Iref","key":"Iref","index":0,"value":0.00021631661833147278,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 OP"},{"name":"Vds3","key":"Vds3","index":0,"value":1.6471748795309211,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 OP"},{"name":"Vds1","key":"Vds1","index":0,"value":1.6471748795309205,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 OP"},{"name":"Iout","key":"Iout","index":0,"value":0.00021631661833147278,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 OP"},{"name":"mirror_ratio","key":"mirror_ratio","index":0,"value":1,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 OP"}]} +{"id":"deepseek:00264_10fe89a98389258a:c8b7ae1faeafd0df","source":"deepseek","example_id":"00264_10fe89a98389258a","test_name":"test_test_264_mosfet_differential_pair_with_active_load_10fe89a98389258a","netlist_hash":"c8b7ae1faeafd0df","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"CMOS differential amplifier with NMOS input pair and PMOS active current mirror load.","pair_ids":["b7f328900d2780ee","beb3b87b3912570e","033519453b7db70b","aee1964616f56c7c"],"prompts":["CMOS differential amplifier with NMOS input pair and PMOS active current mirror load.","Biased by ideal tail current source I_TAIL of 180uA.","DC sweep of differential input from -0.1V to 0.1V, measuring single-ended output at node 'out'.","Output biased near VDD (around 3.8V) to maximize output swing."],"measurements":[{"name":"VOUT1","key":"VOUT1","index":0,"value":4.259390712067528,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"VOUT0","key":"VOUT0","index":0,"value":3.848841983166494,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"}]} +{"id":"deepseek:01759_f577290ec466d679:296eb07378e99efc","source":"deepseek","example_id":"01759_f577290ec466d679","test_name":"test_test_1759_op_amp_phase_shift_oscillator_f577290ec466d679","netlist_hash":"296eb07378e99efc","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Three identical RC stages (6.8k, 10n) provide 180\u00b0 phase shift at ~956 Hz for oscillation.","pair_ids":["a514e744608d2bbe","33b73144a1242ab3","7939349b09f25c56","5e785b791858c609"],"prompts":["Three identical RC stages (6.8k, 10n) provide 180\u00b0 phase shift at ~956 Hz for oscillation.","Inverting op-amp (gain 100k) with feedback resistor Rf=10M and input resistor Rin=68k ensures loop gain > 29 for robust startup.","Antiparallel diodes with series resistor Rlim=680k limit amplitude by reducing effective feedback resistance, achieving ~1.2 Vpp steady\u2011state.","Simulated for 20 ms with initial condition on node1 to kick\u2011start oscillation; UIC ensures proper transient initialization."],"measurements":[{"name":"maxv","key":"maxv","index":0,"value":0.6662966902069293,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"},{"name":"t2","key":"t2","index":0,"value":0.011509084465928868,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 TRAN"},{"name":"vpp","key":"vpp","index":0,"value":1.3325934236703216,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 TRAN"},{"name":"period","key":"period","index":0,"value":0.001087472167419827,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 TRAN"},{"name":"minv","key":"minv","index":0,"value":-0.6662967334633925,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 TRAN"},{"name":"t1","key":"t1","index":0,"value":0.01042161229850904,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 TRAN"},{"name":"freq","key":"freq","index":0,"value":919.5637644434005,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00403_067c0458c35f0b42:12633ea2a60f0209","source":"deepseek","example_id":"00403_067c0458c35f0b42","test_name":"test_test_403_instrumentation_amplifier_3opamp_067c0458c35f0b42","netlist_hash":"12633ea2a60f0209","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Simulate a three-op-amp instrumentation amplifier with a gain of 21 using behavioral op-amp models with finite bandwidth. Measure the DC output voltage and AC gain at several frequencies.","pair_ids":["26c25436811d6c28","60e39ea8164c1bc2","91b1bdb281e167db"],"prompts":["Simulate a three-op-amp instrumentation amplifier with a gain of 21 using behavioral op-amp models with finite bandwidth. Measure the DC output voltage and AC gain at several frequencies.","Design an instrumentation amplifier that takes differential inputs and provides a single-ended output. Use three op-amps with dominant-pole macromodels. Run DC and AC analyses to characterise the amplifier's performance.","Analyse an instrumentation amplifier built from three simple op-amp subcircuits. Apply a 2.5V common-mode DC with a 1V differential AC signal. Measure the DC offset and verify the AC gain is close to 26.4dB at mid-band and falls at higher frequencies."],"measurements":[{"name":"GAIN_1K","key":"GAIN_1K","index":0,"value":26.07877898255201,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"GAIN_10K","key":"GAIN_10K","index":0,"value":25.906357151237806,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"GAIN_50K","key":"GAIN_50K","index":0,"value":22.999399694623424,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"VOUT_DC","key":"VOUT_DC","index":0,"value":0,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 OP"}]} +{"id":"deepseek:01817_a766f76f5ab0e98e:15fd6279e0a26955","source":"deepseek","example_id":"01817_a766f76f5ab0e98e","test_name":"test_test_1817_555_monostable_a766f76f5ab0e98e","netlist_hash":"15fd6279e0a26955","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"A 555-style monostable multivibrator built from behavioral voltage sources and an RC network.","pair_ids":["723cf231152b2127","4d9a8bed573c7f37","5ade487c3c81fb42","bad9f511e2a024c6","2990efd8e37c0fed"],"prompts":["A 555-style monostable multivibrator built from behavioral voltage sources and an RC network.","Comparator E_TRIG detects when the trigger input falls below 1/3 VCC, producing an active-low set pulse.","Comparator E_THRESH detects when the timing capacitor voltage exceeds 2/3 VCC, producing an active-low reset pulse.","A NAND latch implemented with E_LATCH_Q and E_LATCH_NQ stores the output state and ensures clean switching.","The discharge switch S_DISCH controlled by the latch discharges the capacitor when the output is low."],"measurements":[{"name":"pulse_width","key":"pulse_width","index":0,"value":0.011277736862134586,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00958_da3d65f8f3f87eb0:3733c94530feeba9","source":"deepseek","example_id":"00958_da3d65f8f3f87eb0","test_name":"test_test_958_complementary_emitter_follower_buffer_da3d65f8f3f87eb0","netlist_hash":"3733c94530feeba9","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Design a push-pull bipolar buffer using complementary NPN and PNP transistors.","pair_ids":["8055c4b8628e1ec4","74a3fd9499d91380","e1d61a70d4c168e6"],"prompts":["Design a push-pull bipolar buffer using complementary NPN and PNP transistors.","Create a class AB output stage with diode biasing and verify its unity gain.","Simulate a complementary emitter follower and measure its offset and gain."],"measurements":[{"name":"vout_amp","key":"vout_amp","index":0,"value":0.19621136362366673,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#2 TRAN"},{"name":"vin_amp","key":"vin_amp","index":0,"value":0.19950818382541652,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#2 TRAN"},{"name":"gain","key":"gain","index":0,"value":0.9834752633273693,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#2 TRAN"},{"name":"vout_offset","key":"vout_offset","index":0,"value":-0.00027121080487922607,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#2 TRAN"}]} +{"id":"deepseek:00378_ab39a37de5bb00dc:4737b55976319cf6","source":"deepseek","example_id":"00378_ab39a37de5bb00dc","test_name":"test_test_378_inverting_schmitt_trigger_ab39a37de5bb00dc","netlist_hash":"4737b55976319cf6","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Inverting Schmitt trigger with positive feedback via R1, R2 and a behavioral op-amp (E1) modeled with high gain and output limited to 0\u20135V.","pair_ids":["18ea26b1f8346f7a","f7bc0cd7cd817394","e08703ab82a255fb"],"prompts":["Inverting Schmitt trigger with positive feedback via R1, R2 and a behavioral op-amp (E1) modeled with high gain and output limited to 0\u20135V.","Reference voltage VREF=2.5V sets the center of the hysteresis band; symmetric resistor divider gives \u22481.25V lower and \u22483.75V upper thresholds.","Input is a triangular wave from 0 to 5V over 5ms, allowing both thresholds to be crossed; initial condition forces output high."],"measurements":[{"name":"vth_low","key":"vth_low","index":0,"value":1.200000000000001,"value_is_finite":true,"success":true,"measurement_type":"FIND_WHEN","simulation_name":"#1 tran"},{"name":"vout_high","key":"vout_high","index":0,"value":5,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 tran"},{"name":"vth_high","key":"vth_high","index":0,"value":3.827680000000001,"value_is_finite":true,"success":true,"measurement_type":"FIND_WHEN","simulation_name":"#1 tran"},{"name":"vout_low","key":"vout_low","index":0,"value":0,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 tran"}]} +{"id":"deepseek:01695_7c659c53a69cb44a:65f5fb86253afdd9","source":"deepseek","example_id":"01695_7c659c53a69cb44a","test_name":"test_test_1695_state_variable_active_filter_7c659c53a69cb44a","netlist_hash":"65f5fb86253afdd9","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Second-order state-variable filter with Butterworth response (Q\u22480.707)","pair_ids":["2aac0acc2857c468","23742c5b04d7a553","c4c7176dfd881a7e","9b0a31b9f04267d2"],"prompts":["Second-order state-variable filter with Butterworth response (Q\u22480.707)","Center frequency around 995 Hz set by R=16k\u03a9 and C=10nF","Simultaneous LP, HP, BP outputs using three operational amplifiers (E-elements)","Bandpass peak gain is -3 dB, so its -3 dB bandwidth is measured at -6 dB input level"],"measurements":[{"name":"f_hp_3db","key":"f_hp_3db","index":0,"value":999.3348593151021,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 AC"},{"name":"f_bp_low","key":"f_bp_low","index":0,"value":518.322855461117,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 AC"},{"name":"f_lp_3db","key":"f_lp_3db","index":0,"value":990.0369343160081,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 AC"},{"name":"f_bp_high","key":"f_bp_high","index":0,"value":1913.4571179101554,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 AC"},{"name":"f_center","key":"f_center","index":0,"value":994.7381187951778,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 AC"}]} +{"id":"deepseek:00485_f36cb68a57e59cae:488c5e6c8e02776b","source":"deepseek","example_id":"00485_f36cb68a57e59cae","test_name":"test_test_485_passive_filter_f36cb68a57e59cae","netlist_hash":"488c5e6c8e02776b","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"The snubber uses a 10 uF capacitor and a 100 ohm resistor in series across the inductor.","pair_ids":["9de23812f564d2d7","f7e9399a32d26630","28fb70917eda9bd6"],"prompts":["The snubber uses a 10 uF capacitor and a 100 ohm resistor in series across the inductor.","The load resistance is set to 10 k\u03a9 to reduce steady\u2011state current and initial transient amplitudes.","This heavily overdamps the circuit, eliminating resonant overshoot and keeping voltage spikes within \u00b10.1 V."],"measurements":[{"name":"Vmax","key":"Vmax","index":0,"value":0.0990094597700053,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"},{"name":"Vmin","key":"Vmin","index":0,"value":-0.05866544759919634,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:01892_1f7aa052cbe500a4:09cb79ae61b6741a","source":"deepseek","example_id":"01892_1f7aa052cbe500a4","test_name":"test_test_1892_nmos_source_follower_regulator_1f7aa052cbe500a4","netlist_hash":"09cb79ae61b6741a","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"NMOS source follower linear regulator","pair_ids":["74d4c1768d0c959a","4a0100996646b2a9","0ca66efa13d88921","0cbc7689dda297e7"],"prompts":["NMOS source follower linear regulator","Error amplifier with high gain (1e5) comparing 2.5V reference to feedback divider","Feedback divider R1=3.3k, R2=10k sets nominal output to 3.325V","DC load regulation analysis sweeps load current from 0 to 100mA"],"measurements":[{"name":"vout_0","key":"vout_0","index":0,"value":3.324945543165086,"value_is_finite":true,"success":true,"measurement_type":"FIND_WHEN","simulation_name":"#2 DC"},{"name":"load_reg","key":"load_reg","index":0,"value":0.0005293175469844141,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#2 DC"},{"name":"vout_10m","key":"vout_10m","index":0,"value":3.324940544873243,"value_is_finite":true,"success":true,"measurement_type":"FIND_WHEN","simulation_name":"#2 DC"},{"name":"vout_100m","key":"vout_100m","index":0,"value":3.324927943671355,"value_is_finite":true,"success":true,"measurement_type":"FIND_WHEN","simulation_name":"#2 DC"}]} +{"id":"deepseek:01457_f5cec2afff1f8e82:6ee0e33f89c7290c","source":"deepseek","example_id":"01457_f5cec2afff1f8e82","test_name":"test_test_1457_opamp_averaging_f5cec2afff1f8e82","netlist_hash":"6ee0e33f89c7290c","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"The circuit is an op-amp averaging amplifier with four input resistors (10k) and a feedback resistor (2.5k), giving a gain of -0.25 per input.","pair_ids":["ed8cdbd3e3c428f0","36aaa671a4a31853","0275368c355c71c3","82ab4aba0a6c5074"],"prompts":["The circuit is an op-amp averaging amplifier with four input resistors (10k) and a feedback resistor (2.5k), giving a gain of -0.25 per input.","The op-amp is modeled as a voltage-controlled voltage source with gain 100000.","The DC output for inputs 1V,2V,3V,4V is -2.5V.","At 10kHz, the AC magnitude gain from one input is 0.25."],"measurements":[{"name":"gain_mag","key":"gain_mag","index":0,"value":0.24999500009999798,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"vout_dc","key":"vout_dc","index":0,"value":-2.49995000099998,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"}]} +{"id":"deepseek:00106_4b8d9ea5ee0f9c69:f2983e94d33af0e3","source":"deepseek","example_id":"00106_4b8d9ea5ee0f9c69","test_name":"test_test_106_l_section_matching_4b8d9ea5ee0f9c69","netlist_hash":"f2983e94d33af0e3","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"The L-section matching network uses a series inductor L1 and shunt capacitor C1 to transform 100 ohm to 50 ohm.","pair_ids":["13d0057bd4648021","31d37627ea7ebf22","5173b55bcb55d810"],"prompts":["The L-section matching network uses a series inductor L1 and shunt capacitor C1 to transform 100 ohm to 50 ohm.","At 10 MHz, the network provides conjugate match: input impedance at n1 is 50 Ohm resistor.","AC simulation runs from 1 MHz to 20 MHz with 1000 points to verify matching."],"measurements":[{"name":"vout_dB_vout","key":"vout_dB_vout","index":0,"value":-3.010301352715675,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"vout_dB_n1","key":"vout_dB_n1","index":0,"value":-6.021828172518372,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:00193_a5af7cb2a74d58cd:e821cdfd7812b042","source":"deepseek","example_id":"00193_a5af7cb2a74d58cd","test_name":"test_test_193_bjt_diff_pair_tail_mirror_a5af7cb2a74d58cd","netlist_hash":"e821cdfd7812b042","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"BJT differential amplifier with tail current source implemented using an NPN current mirror (Q3, Q4) and a reference resistor Rref.","pair_ids":["9844c56130cfaba0","979394673bb9b4d3","61bbf0e150f57090","8bae35ca09cf91d3"],"prompts":["BJT differential amplifier with tail current source implemented using an NPN current mirror (Q3, Q4) and a reference resistor Rref.","Tail current set to ~1 mA via 21k\u03a9 reference resistor from +10 V to the diode-connected transistor.","Collector load resistors (5k\u03a9 each) set ~2.5 V drop, placing outputs near 7.5 V at balance.","DC sweep of differential input from -0.2 to +0.2 V is used to extract differential gain near 0 V."],"measurements":[{"name":"Ic1","key":"Ic1","index":0,"value":0.0004864505553732567,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"vout0","key":"vout0","index":0,"value":-2.7752022901950113e-11,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"Ic2","key":"Ic2","index":0,"value":0.0004864505553788071,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"gain","key":"gain","index":0,"value":87.88234588542639,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#2 DC"},{"name":"voutp","key":"voutp","index":0,"value":1.7576469176807759,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"Itail","key":"Itail","index":0,"value":0.0009819456382630302,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"}]} +{"id":"deepseek:02017_739c86520fc5e1dd:0c090d697c62c7c8","source":"deepseek","example_id":"02017_739c86520fc5e1dd","test_name":"test_test_2017_hot_swap_inrush_limiter_with_pmos_739c86520fc5e1dd","netlist_hash":"0c090d697c62c7c8","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"PMOS pass transistor M1 with Miller capacitor C1 (100 nF) from gate to drain provides feedback to limit output voltage slew rate.","pair_ids":["0dfcbdd992fff0bd","d04412c298c5e586","4d187116dcb608cd","0e9c4c2c88138465"],"prompts":["PMOS pass transistor M1 with Miller capacitor C1 (100 nF) from gate to drain provides feedback to limit output voltage slew rate.","When switch S1 closes at 5 ms, gate voltage decays from 12 V toward 4 V through the Rpu-Rss divider, turning on M1 slowly.","The initial condition IC=12 V on C1 ensures the PMOS is off at start-up, preventing a large current spike.","During ramp, the Miller effect holds the gate voltage nearly constant, resulting in a controlled dVout/dt and an inrush current of about 0.46 A, with a rise time around 10 ms."],"measurements":[{"name":"t_rise","key":"t_rise","index":0,"value":0.00664119266432512,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 TRAN"},{"name":"peak_inrush","key":"peak_inrush","index":0,"value":0.6846284837800543,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:01099_e6842fb85b999329:e6842fb85b999329","source":"deepseek","example_id":"01099_e6842fb85b999329","test_name":"test_test_1099_bjt_class_b_push_pull_e6842fb85b999329","netlist_hash":"e6842fb85b999329","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Design a BJT class-B push-pull output stage with NPN and PNP transistors, \u00b115V supplies, and a 1kHz sinusoidal input.","pair_ids":["efcc46ccb17b01a8","7970699d4ae93999","7881e786fed8696e"],"prompts":["Design a BJT class-B push-pull output stage with NPN and PNP transistors, \u00b115V supplies, and a 1kHz sinusoidal input.","Create a basic class-B amplifier using complementary BJTs, measure its output characteristics with SPICE.","Simulate a push-pull output stage with bipolar transistors and evaluate its transient response."],"measurements":[{"name":"vout_min","key":"vout_min","index":0,"value":-4.273065328847235,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#2 TRAN"},{"name":"vout_avg","key":"vout_avg","index":0,"value":-0.0017492961026927044,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#2 TRAN"},{"name":"vout_rms","key":"vout_rms","index":0,"value":2.932151050964399,"value_is_finite":true,"success":true,"measurement_type":"RMS","simulation_name":"#2 TRAN"},{"name":"vout_max","key":"vout_max","index":0,"value":4.307532776820857,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#2 TRAN"}]} +{"id":"deepseek:00038_9ab8f45cc0378225:ffe751ea220f9f92","source":"deepseek","example_id":"00038_9ab8f45cc0378225","test_name":"test_test_38_rc_delay_network_high_z_load_9ab8f45cc0378225","netlist_hash":"ffe751ea220f9f92","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Build an RC delay circuit: a resistor and capacitor in series, with the output across the capacitor. Apply a step voltage and observe the time it takes for the output to reach 50% of the input step.","pair_ids":["a4ac7e5da94aa6ef","5ddb8395d92c8fc2","e198516835193867"],"prompts":["Build an RC delay circuit: a resistor and capacitor in series, with the output across the capacitor. Apply a step voltage and observe the time it takes for the output to reach 50% of the input step.","Create a passive RC low-pass filter with a high-impedance load, and simulate its transient response to a voltage pulse. Measure the delay until the output reaches 2.5V.","Design an RC network driving a very high impedance load. The input is a 0 to 5 V step. Determine the time constant and use SPICE to measure the 50% delay."],"measurements":[{"name":"tdelay","key":"tdelay","index":0,"value":0.0006935476755488938,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:02095_ac5f7ee4299e54f5:5e79acdb9255cd7e","source":"deepseek","example_id":"02095_ac5f7ee4299e54f5","test_name":"test_test_2095_cmos_switching_mixer_ac5f7ee4299e54f5","netlist_hash":"5e79acdb9255cd7e","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Double-balanced CMOS switching mixer with differential LO pulse drive and small-signal differential RF input at 100 MHz, down-converting to 10 MHz.","pair_ids":["f0498caa96514b3d","afcba070155397ce","9f0b495ac59af789"],"prompts":["Double-balanced CMOS switching mixer with differential LO pulse drive and small-signal differential RF input at 100 MHz, down-converting to 10 MHz.","Corrected tail current transistor M0 connection: drain to src_rf, source to ground, eliminating the floating-node issue.","Added optional parameters (ITL4, RELTOL) and a small tail capacitance to aid convergence; increased LO rise/fall times to 1 ns to avoid numerical stiffness."],"measurements":[{"name":"vout_diff_avg","key":"vout_diff_avg","index":0,"value":-1.5457679350869946e-05,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 TRAN"},{"name":"vout_p_avg","key":"vout_p_avg","index":0,"value":2.7952981151602874,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 TRAN"},{"name":"vout_diff_pp","key":"vout_diff_pp","index":0,"value":0.40044366740697157,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00733_9d7dde499fe808db:694cb4ed2c05d02a","source":"deepseek","example_id":"00733_9d7dde499fe808db","test_name":"test_test_733_active_peak_detector_9d7dde499fe808db","netlist_hash":"694cb4ed2c05d02a","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Create a positive peak detector using an ideal op-amp and a diode that holds the maximum input voltage on a capacitor.","pair_ids":["e3f7312dd139f1ad","9ad4b987676cd57d","768fb1f68a9d30a5","ebfd1f31bbfc1c3f"],"prompts":["Create a positive peak detector using an ideal op-amp and a diode that holds the maximum input voltage on a capacitor.","Design an active peak detector circuit with an op-amp buffer that outputs the envelope of a sinusoidal signal.","Implement a leaky peak detector with an op-amp that tracks the maximum of a 1kHz sine wave and slowly decays.","Build a peak envelope detector with an op-amp, diode, capacitor, and discharge resistor, plus a voltage buffer to isolate the load."],"measurements":[{"name":"vfinal","key":"vfinal","index":0,"value":1.8552747396787874,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"droop","key":"droop","index":0,"value":7.235052301542702,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 TRAN"},{"name":"vmax","key":"vmax","index":0,"value":1.9999738971551655,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00329_8c3d1f626962e428:8c3d1f626962e428","source":"deepseek","example_id":"00329_8c3d1f626962e428","test_name":"test_test_329_op_amp_difference_amplifier_8c3d1f626962e428","netlist_hash":"8c3d1f626962e428","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Design a difference amplifier using an ideal op-amp with gain of 10. Use R1=10k and R2=100k. Apply DC inputs V1=0.5V and V2=1V, and AC input to V2 only. Measure the DC output voltage and the AC gain at 1kHz.","pair_ids":["b4342bf9e9438ed0","2f5063c373aaf4d7","9eeb15b62023c610"],"prompts":["Design a difference amplifier using an ideal op-amp with gain of 10. Use R1=10k and R2=100k. Apply DC inputs V1=0.5V and V2=1V, and AC input to V2 only. Measure the DC output voltage and the AC gain at 1kHz.","Create a SPICE netlist for a difference amplifier with a gain of 10, using an E-source op-amp. Include .OP and .AC analyses. Set up the resistors as 10k and 100k. Apply V1=0.5V DC, V2=1V DC with 1V AC. Measure the output magnitude at 1kHz.","I need a measured difference amplifier simulation. Use an ideal op-amp (E source with gain 100k), R1=10k, R2=100k. Inputs: V1=0.5V, V2=1V (DC). For AC, set V2 AC=1, V1 AC=0. Run .OP and .AC from 1Hz to 1MHz. Measure the AC output voltage at 1kHz and ensure gain is about 20dB."],"measurements":[{"name":"VOUT_DB","key":"VOUT_DB","index":0,"value":19.99904460468559,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"VOUT_MAG","key":"VOUT_MAG","index":0,"value":9.99890012098669,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"}]} +{"id":"deepseek:02398_2da23d642de94428:a9653186ebcb1eed","source":"deepseek","example_id":"02398_2da23d642de94428","test_name":"test_test_2398_bjt_translinear_four_quadrant_multiplier_2da23d642de94428","netlist_hash":"a9653186ebcb1eed","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"BJT translinear four-quadrant multiplier based on a Gilbert cell.","pair_ids":["7437e5b59cb8940d","c79f8e3025a102b9","6511cb38e22c0fee","e26ad753397c044a"],"prompts":["BJT translinear four-quadrant multiplier based on a Gilbert cell.","Two differential voltage inputs VX (1kHz, 20mV peak diff) and VY (10kHz, 20mV peak diff) produce a product waveform at the output.","The output contains sum and difference frequencies (9kHz and 11kHz) with amplitude proportional to VX\u00b7VY.","NPN transistors with IS=1e-15 and BF=100; 1mA tail current; 10k\u03a9 load resistors; \u00b110V supplies."],"measurements":[{"name":"vout_avg","key":"vout_avg","index":0,"value":6.968263253137843e-06,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 TRAN"},{"name":"vout_rms","key":"vout_rms","index":0,"value":0.6816657601897022,"value_is_finite":true,"success":true,"measurement_type":"RMS","simulation_name":"#1 TRAN"},{"name":"vout_pp","key":"vout_pp","index":0,"value":2.6140877169091965,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00730_52f92207cdc1f462:52f92207cdc1f462","source":"deepseek","example_id":"00730_52f92207cdc1f462","test_name":"test_test_730_active_peak_detector_52f92207cdc1f462","netlist_hash":"52f92207cdc1f462","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Create a SPICE netlist of an active peak detector circuit. Use a behavioral op-amp (E source) with a diode in the feedback path to charge a capacitor to the peak input voltage. Include a buffer op-amp to read the capacitor voltage. Design a piecewise linear input waveform with multiple peaks and a reset pulse to discharge the holding capacitor. Perform a transient analysis and add .MEAS statements to verify the peak holding and reset behavior.","pair_ids":["cdb17b31d28bedd3","45dd1292546ec96b","9226139d3397a011"],"prompts":["Create a SPICE netlist of an active peak detector circuit. Use a behavioral op-amp (E source) with a diode in the feedback path to charge a capacitor to the peak input voltage. Include a buffer op-amp to read the capacitor voltage. Design a piecewise linear input waveform with multiple peaks and a reset pulse to discharge the holding capacitor. Perform a transient analysis and add .MEAS statements to verify the peak holding and reset behavior.","Simulate an op-amp based peak detector with hold and reset. The circuit should use an E-source for the op-amp, a diode model, a 1\u00b5F holding capacitor, and a voltage-controlled switch for reset. The input is a PWL signal that tests three different peak levels (3V, 4V, 5V). Add .MEAS to measure output voltage at key times. Use a transient simulation.","Design an active peak detector in SPICE. Use ideal op-amp models (VCVS) and a simple diode. Include a switch to short the capacitor during reset. Apply a custom PWL input with varying peaks, hold, then a reset pulse. Run a transient analysis and demonstrate correct operation with measurement statements."],"measurements":[{"name":"max_out","key":"max_out","index":0,"value":4.99989345007142,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"},{"name":"vout_peak1","key":"vout_peak1","index":0,"value":2.9999063120210856,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"vout_peak2","key":"vout_peak2","index":0,"value":3.999886088285625,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"vout_peak3","key":"vout_peak3","index":0,"value":4.999827557170793,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"vout_reset","key":"vout_reset","index":0,"value":-8.166681770258381e-15,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00600_20f422b96d9293a5:d8733617fff10e4f","source":"deepseek","example_id":"00600_20f422b96d9293a5","test_name":"test_test_600_constant_k_lowpass_20f422b96d9293a5","netlist_hash":"d8733617fff10e4f","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Constant-k low-pass image-parameter filter designed with a T-section.","pair_ids":["e7eda21cc0bf7b5a","ee4d985a971bd629","3693d3b214579228"],"prompts":["Constant-k low-pass image-parameter filter designed with a T-section.","Components: total series inductance 10 mH (two 5 mH inductors), shunt capacitance 1 uF, image impedance 100 ohms.","Double-terminated with 100 ohm source and load resistors, giving -6 dB passband insertion loss and sharp roll-off beyond 3183 Hz."],"measurements":[{"name":"f3dB","key":"f3dB","index":0,"value":3182.5429791119473,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 AC"},{"name":"atten_6k","key":"atten_6k","index":0,"value":-22.633543885642418,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:00010_03fe20ff008518d2:769451ceda634792","source":"deepseek","example_id":"00010_03fe20ff008518d2","test_name":"test_test_10_resistive_attenuator_t_topology_03fe20ff008518d2","netlist_hash":"769451ceda634792","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":2,"representative_prompt":"T-pad attenuator designed for 6 dB attenuation with 50 ohm characteristic impedance.","pair_ids":["05244473217e4bb5","94426b414587c5f9"],"prompts":["T-pad attenuator designed for 6 dB attenuation with 50 ohm characteristic impedance.","The circuit includes a 50 ohm load to ensure proper impedance matching and correct attenuation."],"measurements":[{"name":"gain_db","key":"gain_db","index":0,"value":-6.020686771741714,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 AC"},{"name":"vout_mag","key":"vout_mag","index":0,"value":0.49999500004999947,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:00347_4a5fff1cae941f30:55e3d380ca71b08d","source":"deepseek","example_id":"00347_4a5fff1cae941f30","test_name":"test_test_347_opamp_4a5fff1cae941f30","netlist_hash":"55e3d380ca71b08d","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Op-amp differentiator with series input resistor R1 to limit high\u2011frequency gain.","pair_ids":["9bd43159713177c0","6ea79391d6d17443","cb19db2320cc2f05"],"prompts":["Op-amp differentiator with series input resistor R1 to limit high\u2011frequency gain.","Input capacitor C=0.01\u00b5F (adjusted from 0.1\u00b5F) ensures the zero frequency is well above 10kHz, preserving the ideal +20dB/decade slope over the measurement range.","The op-amp is modeled as a VCVS with gain 100k, using \u00b115V supplies to avoid saturation."],"measurements":[{"name":"V10K","key":"V10K","index":0,"value":0.6270906755084071,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"V1K","key":"V1K","index":0,"value":0.06283124365530945,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:00427_2aa5eefe9796f500:c78730346598d2b2","source":"deepseek","example_id":"00427_2aa5eefe9796f500","test_name":"test_test_427_monostable_rc_comparator_2aa5eefe9796f500","netlist_hash":"c78730346598d2b2","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"The circuit is a monostable multivibrator built around an ideal comparator with positive feedback and an RC timing network.","pair_ids":["5ef44b6abf225015","74f98cf11ab44a2b","a943efa6f61edb58"],"prompts":["The circuit is a monostable multivibrator built around an ideal comparator with positive feedback and an RC timing network.","Before triggering, the output is low (0V), and the inverting input is stabilized at 2.5V via the pull-up and output resistor divider.","A positive trigger pulse discharges the timing capacitor, causing the output to go high. The capacitor then charges toward 5V through the 5k\u2126 Th\u00e9venin resistance, and once it exceeds 3.75V, the comparator resets the output low, giving a pulse of about 0.35ms."],"measurements":[{"name":"pulse_width","key":"pulse_width","index":0,"value":0.0003624429999999728,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 TRAN"},{"name":"trig_rise","key":"trig_rise","index":0,"value":0.000200005,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 TRAN"},{"name":"v_cap_low","key":"v_cap_low","index":0,"value":2.4998750062496846,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"vout_max","key":"vout_max","index":0,"value":5,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00059_ade3a492a0b235d0:ca7a19d9d02f73ab","source":"deepseek","example_id":"00059_ade3a492a0b235d0","test_name":"test_test_59_first_order_rc_lpf_ade3a492a0b235d0","netlist_hash":"ca7a19d9d02f73ab","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"First-order RC low-pass filter","pair_ids":["91fe5d856db6df52","0ff690351fea7290","c24d389d4e52386a","92c984c9d22086b0"],"prompts":["First-order RC low-pass filter","Uses 1k resistor and 10n capacitor","AC analysis from 1 Hz to 100 kHz","Measures gain at 1 Hz and at cutoff frequency"],"measurements":[{"name":"gain_fc","key":"gain_fc","index":0,"value":0.7072184003839395,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"dc_gain","key":"dc_gain","index":0,"value":0.999999998026079,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:01720_7329c27d14461c42:4770b76827964b72","source":"deepseek","example_id":"01720_7329c27d14461c42","test_name":"test_test_1720_active_allpass_two_stage_7329c27d14461c42","netlist_hash":"4770b76827964b72","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Two-stage all-pass filter using op-amp VCVC sources with unity gain magnitude","pair_ids":["a3a7ce22e55189b3","4aa6ee23b4425455","dcc84a64eee0a504","307e3391f757079a"],"prompts":["Two-stage all-pass filter using op-amp VCVC sources with unity gain magnitude","Each stage utilizes a series resistor to non-inverting input and capacitor to ground for phase lag","Resistors 10k\u03a9 and capacitors 16nF set the center frequency near 995Hz, achieving -180\u00b0 phase at about 1kHz","Phase shift measured in radians due to SpiceSharpParser output; degrees indicated for reference"],"measurements":[{"name":"phase_at_1kHz","key":"phase_at_1kHz","index":0,"value":3.1310014977674805,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"phase_at_10kHz","key":"phase_at_10kHz","index":0,"value":0.39658277574579187,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"mag_at_1kHz","key":"mag_at_1kHz","index":0,"value":-0.0003474321143590665,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"phase_at_100Hz","key":"phase_at_100Hz","index":0,"value":-0.40077733058185067,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:01412_8cdd4fd22ac3b253:f4a8e9cd0aa9e1c3","source":"deepseek","example_id":"01412_8cdd4fd22ac3b253","test_name":"test_test_1412_jfet_current_source_8cdd4fd22ac3b253","netlist_hash":"f4a8e9cd0aa9e1c3","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Simulate a JFET constant current source using a self-biased configuration with a 1k source resistor. Measure the drain current at a 10 V supply and verify it remains approximately constant as the supply voltage varies.","pair_ids":["40eec1e0c140e02b","c19de99ba4c032be","7650fe9fe2af9f36"],"prompts":["Simulate a JFET constant current source using a self-biased configuration with a 1k source resistor. Measure the drain current at a 10 V supply and verify it remains approximately constant as the supply voltage varies.","Design a current source with an N-channel JFET and a source resistor, and perform a DC sweep of the supply voltage. Measure the current at 10 V and ensure it is within 0.5\u20131.5 mA.","Create a SPICE netlist for a JFET current source using a 1k source resistor, ground the gate, and sweep the drain supply from 0 to 15 V. Use the .MEASURE command to find the current through the source resistor at 10 V."],"measurements":[{"name":"Id","key":"Id","index":0,"value":0.0009999999996633333,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"}]} +{"id":"deepseek:00122_167b2dfa7b4a55ca:7bc45a5313e65890","source":"deepseek","example_id":"00122_167b2dfa7b4a55ca","test_name":"test_test_122_full_wave_bridge_rectifier_with_filter_cap_167b2dfa7b4a55ca","netlist_hash":"7bc45a5313e65890","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Full-wave bridge rectifier converts AC to DC using four diodes","pair_ids":["9185ba77246b0bb4","72d8c4b2f24c4b96","ebef93c50e627aab"],"prompts":["Full-wave bridge rectifier converts AC to DC using four diodes","Filter capacitor smooths the rectified output","SINE source with 10V amplitude at 50Hz"],"measurements":[{"name":"Vripple","key":"Vripple","index":0,"value":0.30917468525186287,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#1 TRAN"},{"name":"Vout_avg","key":"Vout_avg","index":0,"value":8.544132451949181,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00546_a8fcf8299d6596da:a8fcf8299d6596da","source":"deepseek","example_id":"00546_a8fcf8299d6596da","test_name":"test_test_546_parallel_resonant_trap_filter_a8fcf8299d6596da","netlist_hash":"a8fcf8299d6596da","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Design a passive parallel notch filter using a parallel LC circuit in series with a load resistor. Perform an AC analysis and measure the attenuation at three frequencies to verify the notch behavior.","pair_ids":["82b5d6a078ccd33f","95882a542bf863d8","6ac75a8f55cfeb99","57a7196d8784b066"],"prompts":["Design a passive parallel notch filter using a parallel LC circuit in series with a load resistor. Perform an AC analysis and measure the attenuation at three frequencies to verify the notch behavior.","Create a band-stop filter using an inductor and capacitor in parallel, placed between the source and a resistive load. Sweep frequency from 10 Hz to 100 kHz and find the voltage attenuation at 100 Hz, 1 kHz, and 10 kHz. Show that the notch is deepest at 1 kHz.","I need a parallel resonant trap filter with a notch at 1 kHz. Use a 10 mH inductor and a 2.53 uF capacitor, with a parallel loss resistor to limit Q. Drive it with a 1 V AC source and probe the output across the load resistor. Measure the filter's stop-band attenuation.","Simulate a parallel RLC trap filter. The resonant frequency should be around 1 kHz. Include a damping resistor in parallel with the LC to set the notch depth. Using an AC sweep, demonstrate that the output voltage is significantly lower at resonance compared to off-resonance frequencies."],"measurements":[{"name":"vm1k","key":"vm1k","index":0,"value":-20.674571665308232,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"vm10k","key":"vm10k","index":0,"value":-0.00021042347999052088,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"vm100","key":"vm100","index":0,"value":-0.00020991029592331453,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:00334_5e421a4e427a618f:d7316f5471f1189b","source":"deepseek","example_id":"00334_5e421a4e427a618f","test_name":"test_test_334_opamp_difference_amplifier_5e421a4e427a618f","netlist_hash":"d7316f5471f1189b","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"This circuit implements an op-amp difference amplifier using an ideal voltage-controlled voltage source (E) and four resistors.","pair_ids":["9ff0524a0b7e1ba8","67b0ce5ad92c956a","04cf8533e919a69e"],"prompts":["This circuit implements an op-amp difference amplifier using an ideal voltage-controlled voltage source (E) and four resistors.","The resistor values set a differential gain of 10, translating a -0.1V differential input into -1V DC output and providing 20 dB AC gain.","DC analysis sweeps V1 at a single point, and AC analysis measures frequency response from 1 Hz to 1 MHz."],"measurements":[{"name":"ac_gain","key":"ac_gain","index":0,"value":19.999044604685594,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 ac"},{"name":"dc_vout","key":"dc_vout","index":0,"value":-0.9998900121136103,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 dc"}]} +{"id":"deepseek:01443_ef5cdc1009f733b2:64b9a57cc4c65a99","source":"deepseek","example_id":"01443_ef5cdc1009f733b2","test_name":"test_test_1443_non_inverting_opamp_with_input_bias_resistor_ef5cdc1009f733b2","netlist_hash":"64b9a57cc4c65a99","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Make a non-inverting op-amp amplifier with a bias resistor to ground at the non-inverting input.","pair_ids":["3a1ea7e6a61d008c","4aea90d6b27b4ca1","df2d8eb83f6fc416"],"prompts":["Make a non-inverting op-amp amplifier with a bias resistor to ground at the non-inverting input.","Design a positive-gain amplifier using an ideal op-amp, including an input bias resistor for DC stability.","Create a voltage amplifier with gain of about 3, using an E-source op-amp and an input biasing network."],"measurements":[{"name":"gain","key":"gain","index":0,"value":2.970207923465267,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 ac"}]} +{"id":"deepseek:00876_1d45b9fe00740b76:5a7075ad33823b78","source":"deepseek","example_id":"00876_1d45b9fe00740b76","test_name":"test_test_876_diode_charge_pump_inverter_1d45b9fe00740b76","netlist_hash":"5a7075ad33823b78","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Inverting charge pump using two diodes and two capacitors driven by a digital 0-5V, 1MHz clock.","pair_ids":["d54f28ce05eeeca3","ff03098b4b119310","4feda70aff89f0a9"],"prompts":["Inverting charge pump using two diodes and two capacitors driven by a digital 0-5V, 1MHz clock.","During the clock high phase, C1 charges through D1 (anode to A, cathode to ground), storing about 5V minus one diode drop.","During the clock low phase, the voltage across C1 is inverted, pulling node A negative; D2 (anode to out, cathode to A) conducts, transferring charge to C2 and generating a negative output voltage of approximately -3.6V, smoothed by C2."],"measurements":[{"name":"vout_avg","key":"vout_avg","index":0,"value":-3.585497897465832,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 TRAN"},{"name":"vout_pp","key":"vout_pp","index":0,"value":0.000185375004549293,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00756_323607a46b4bf8aa:d89ec70a590bf81d","source":"deepseek","example_id":"00756_323607a46b4bf8aa","test_name":"test_test_756_biased_negative_diode_limiter_323607a46b4bf8aa","netlist_hash":"d89ec70a590bf81d","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"The circuit is a biased negative diode limiter that clips negative excursions of a 5V amplitude sine wave at approximately -2V.","pair_ids":["770ca3723d9c1d2e","a72868e75a87a541","adf2accb2c1ab87a"],"prompts":["The circuit is a biased negative diode limiter that clips negative excursions of a 5V amplitude sine wave at approximately -2V.","When the input voltage drops below the clipping threshold, diode D1 conducts and clamps the output to VBIAS plus the diode forward voltage, preventing the output from going more negative than about -2V.","Above the clipping level, the diode is reverse-biased and the output follows the input through resistor R1."],"measurements":[{"name":"vmin","key":"vmin","index":0,"value":-1.9994108248345792,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:01206_1976f72974eccf5a:78d92d501b3337ab","source":"deepseek","example_id":"01206_1976f72974eccf5a","test_name":"test_test_1206_nmos_common_source_amplifier_with_diode_connected_pmos_load_1976f72974eccf5a","netlist_hash":"78d92d501b3337ab","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"NMOS common-source amplifier with diode-connected PMOS load, biased from a 3.3 V supply.","pair_ids":["0bc3ece9d0494aa3","92c79494b7baf462","b486875383db50cf"],"prompts":["NMOS common-source amplifier with diode-connected PMOS load, biased from a 3.3 V supply.","Input DC bias set to ~0.89 V to center the output at ~1.65 V.","AC analysis shows a mid-band gain around 14 dB, 3 dB bandwidth > 1 MHz, and unity-gain bandwidth > 10 MHz."],"measurements":[{"name":"f3db","key":"f3db","index":0,"value":2433310.6595929493,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#2 ac"},{"name":"ugbw","key":"ugbw","index":0,"value":12263430.36184974,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#2 ac"},{"name":"gain_db_1k","key":"gain_db_1k","index":0,"value":13.821090832939781,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 ac"},{"name":"vout_1p1","key":"vout_1p1","index":0,"value":0.638780702295785,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#3 dc"},{"name":"vout_1p0","key":"vout_1p0","index":0,"value":1.115444849450003,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#3 dc"}]} +{"id":"deepseek:00290_ab28127b550b72be:b5cf8392d79f2e39","source":"deepseek","example_id":"00290_ab28127b550b72be","test_name":"test_test_290_cmos_nand2_ab28127b550b72be","netlist_hash":"b5cf8392d79f2e39","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Netlist implements a CMOS NAND2 gate with NMOS and PMOS transistors using 5V supply.","pair_ids":["d2204279085fa0e9","069a6a5e7341ae01","15ccc6f198f4e86e","c981ce6c4d749294"],"prompts":["Netlist implements a CMOS NAND2 gate with NMOS and PMOS transistors using 5V supply.","Input A is pulsed (0\u20135V), input B is held high at 5V to test A's effect on output Y.","Load capacitor CL=6pF added to slow transitions, bringing propagation delays into nanosecond range.","Transient simulation runs for 20us with 10ns step, and .MEAS statements compute tphl and tplh from A to Y."],"measurements":[{"name":"tplh_A_Y","key":"tplh_A_Y","index":0,"value":2.0514835523813412e-09,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 TRAN"},{"name":"tphl_A_Y","key":"tphl_A_Y","index":0,"value":4.029804439543178e-09,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00565_888d5662d8fa7673:22486b3024c42016","source":"deepseek","example_id":"00565_888d5662d8fa7673","test_name":"test_test_565_third_order_butterworth_lc_ladder_888d5662d8fa7673","netlist_hash":"22486b3024c42016","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Third-order Butterworth low-pass filter using LC ladder network with 50 ohm terminations.","pair_ids":["6e04b687b9fd2a24","d4f7ff84eee1f474","3285b1b3a52c26c0"],"prompts":["Third-order Butterworth low-pass filter using LC ladder network with 50 ohm terminations.","Measurements verify -3 dB cutoff near 1 kHz and stopband roll-off of at least 18 dB/octave.","Uses fixed -9.02 dB threshold for f3db to avoid SpiceSharpParser expression limitation."],"measurements":[{"name":"att_10k","key":"att_10k","index":0,"value":-66.02022936091608,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"f3db","key":"f3db","index":0,"value":999.166577921238,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 AC"},{"name":"maxvdb","key":"maxvdb","index":0,"value":-6.020599913282059,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 AC"},{"name":"att_2k","key":"att_2k","index":0,"value":-24.148741787818203,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:02277_9bcdbdbb0b0c37d1:ef70048d11607a22","source":"deepseek","example_id":"02277_9bcdbdbb0b0c37d1","test_name":"test_test_2277_cds_frontend_9bcdbdbb0b0c37d1","netlist_hash":"ef70048d11607a22","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"CDS frontend with offset cancellation","pair_ids":["4a161c9520ae813b","6cdf6634658f9114","6c7baaee1411683f","5ed60d2731a896e8"],"prompts":["CDS frontend with offset cancellation","Uses switched-capacitor with E, S, .MODEL, C, R, V, PULSE","Measures output during reset and signal phases","Difference measurement cancels offset"],"measurements":[{"name":"vout_sig","key":"vout_sig","index":0,"value":0.6092294962963287,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"vdiff","key":"vdiff","index":0,"value":0.5992294962963284,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 TRAN"},{"name":"vout_clamp","key":"vout_clamp","index":0,"value":0.010000000000000306,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00767_ebf66ca92efdfc3b:b6d2eca260ac52c2","source":"deepseek","example_id":"00767_ebf66ca92efdfc3b","test_name":"test_test_767_window_diode_limiter_asymmetric_ebf66ca92efdfc3b","netlist_hash":"b6d2eca260ac52c2","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"The circuit uses two diodes and two DC reference voltages to create asymmetric clipping thresholds.","pair_ids":["cf711e722c660c0a","c74063decc6f51f6","51f86dcc9a6648e2"],"prompts":["The circuit uses two diodes and two DC reference voltages to create asymmetric clipping thresholds.","Positive clipping is set by VREF_HI plus the forward voltage drop of D1, while negative clipping is set by VREF_LO minus the forward drop of D2.","The 1k series resistor limits current through the diodes, and the load resistor provides a high-impedance output."],"measurements":[{"name":"Vmax","key":"Vmax","index":0,"value":2.7780913020229496,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"},{"name":"Vmin","key":"Vmin","index":0,"value":-2.2235765179066216,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:01122_63b155a287dbb45a:a586f9cb11321475","source":"deepseek","example_id":"01122_63b155a287dbb45a","test_name":"test_test_1122_bjt_single_transistor_phase_shift_oscillator_63b155a287dbb45a","netlist_hash":"a586f9cb11321475","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"BJT single-transistor phase-shift oscillator using 2N3904","pair_ids":["a997e65c2e554098","597ef7a17f5c4a2b","3e6e7e33009a0da7"],"prompts":["BJT single-transistor phase-shift oscillator using 2N3904","RC networks with 10k resistors and 8.2nF capacitors","Initial condition on feedback node to aid startup"],"measurements":[{"name":"vrms","key":"vrms","index":0,"value":3.9665400134234496,"value_is_finite":true,"success":true,"measurement_type":"RMS","simulation_name":"#1 TRAN"},{"name":"vpp","key":"vpp","index":0,"value":5.451922522090189,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#1 TRAN"},{"name":"period","key":"period","index":0,"value":0.000990796137871508,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 TRAN"},{"name":"freq","key":"freq","index":0,"value":1009.2893601182826,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:02089_4d5ee22f90ce529b:917c62c74bfa97e5","source":"deepseek","example_id":"02089_4d5ee22f90ce529b","test_name":"test_test_2089_cmos_switching_mixer_4d5ee22f90ce529b","netlist_hash":"917c62c74bfa97e5","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Design a CMOS switching mixer with a differential local oscillator drive.","pair_ids":["99fe62b27bd5611d","0772daf24019559e","dc3e1417a940ff9b"],"prompts":["Design a CMOS switching mixer with a differential local oscillator drive.","Simulate an active double-balanced mixer built with NMOS transistors and resistive loads.","Provide a SPICE netlist for a Gilbert cell mixer using NMOS devices and a differential LO square wave."],"measurements":[{"name":"vout_avg","key":"vout_avg","index":0,"value":1.8961580735000961e-16,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 TRAN"},{"name":"vout_pp","key":"vout_pp","index":0,"value":1.2929120896429964,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00760_0470a6fa3ba511b0:cd4c4ec7fec8bf60","source":"deepseek","example_id":"00760_0470a6fa3ba511b0","test_name":"test_test_760_window_diode_limiter_asymmetric_0470a6fa3ba511b0","netlist_hash":"cd4c4ec7fec8bf60","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Two clamping diodes with independent DC bias voltages create asymmetric limiting of an input sine wave.","pair_ids":["5586807cf5c366f1","5c42b5e05acfa81b","3df7292e2b7790b3"],"prompts":["Two clamping diodes with independent DC bias voltages create asymmetric limiting of an input sine wave.","For the positive cycle, diode D1 conducts when V(out) exceeds V_pos + Vf, clamping around +3.7V.","For the negative cycle, diode D2 (now correctly oriented) conducts when V(out) drops below V_neg - Vf, clamping around -2.7V."],"measurements":[{"name":"min_out","key":"min_out","index":0,"value":-2.554442914291707,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 TRAN"},{"name":"max_out","key":"max_out","index":0,"value":3.534523369882137,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00764_573f69cb9cec6a88:248c2317dcb93e82","source":"deepseek","example_id":"00764_573f69cb9cec6a88","test_name":"test_test_764_window_diode_limiter_asymmetric_573f69cb9cec6a88","netlist_hash":"248c2317dcb93e82","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Asymmetric window diode limiter using two shunt diodes and DC bias sources.","pair_ids":["1a9d04a10da928e9","5f1a31bb2d601b3e","62b1222112b1d493","f044e8f69338726d"],"prompts":["Asymmetric window diode limiter using two shunt diodes and DC bias sources.","Input is a 1 kHz, 5 V amplitude sine wave; output loaded with 10 k\u03a9 resistor.","Positive peaks clipped to ~2.7 V by D1 and VREFH=2 V; negative peaks clipped to ~-1.7 V by D2 and VREFL=-1 V.","Diode model with IS=1 fA gives a forward voltage drop around 0.7 V at mA currents."],"measurements":[{"name":"VMIN","key":"VMIN","index":0,"value":-1.7466542680259636,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 TRAN"},{"name":"VMAX","key":"VMAX","index":0,"value":2.7342100611286777,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:01190_bb71322faac46ae6:760faf33b1c7718c","source":"deepseek","example_id":"01190_bb71322faac46ae6","test_name":"test_test_1190_nmos_common_gate_amplifier_bb71322faac46ae6","netlist_hash":"760faf33b1c7718c","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Design an NMOS common-gate amplifier. The circuit uses a 12V supply, a 6V gate bias, and the source is biased at 4.5V DC. Use a 10k resistor load and an NMOS model with VTO=0.8V and KP=100\u00b5A/V\u00b2. Run DC and AC analyses, and measure the low-frequency voltage gain.","pair_ids":["5f5943770fddf16b","5ea0889df7c86886","06c334b4d6c7c1cc"],"prompts":["Design an NMOS common-gate amplifier. The circuit uses a 12V supply, a 6V gate bias, and the source is biased at 4.5V DC. Use a 10k resistor load and an NMOS model with VTO=0.8V and KP=100\u00b5A/V\u00b2. Run DC and AC analyses, and measure the low-frequency voltage gain.","Build a common-gate amplifier using an NMOS transistor. Apply a 6V DC to the gate and a 4.5V DC + 1V AC signal to the source. The drain connects to 12V through a 10k resistor. Perform .OP and .AC, and extract the gain at 1 kHz.","Simulate an NMOS common-gate stage. The transistor has W=20\u00b5, L=1\u00b5, and model with VTO=0.8, KP=100\u00b5, LAMBDA=0.02. DC bias: VG=6V, Vs=4.5V, VDD=12V, RD=10k. Run operating point and AC sweep 1-100MHz, and measure magnitude and phase of output at 1 kHz."],"measurements":[{"name":"low_gain_db","key":"low_gain_db","index":0,"value":22.570282646793206,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"phase_1k","key":"phase_1k","index":0,"value":0,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"vgs","key":"vgs","index":0,"value":0,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 OP"},{"name":"id","key":"id","index":0,"value":0,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 OP"},{"name":"low_gain_mag","key":"low_gain_mag","index":0,"value":13.443555125175038,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"vds","key":"vds","index":0,"value":0,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 OP"}]} +{"id":"deepseek:00852_705259da7b0eef0c:2447aa81ce2b4c13","source":"deepseek","example_id":"00852_705259da7b0eef0c","test_name":"test_test_852_zener_reference_buffered_by_emitter_follower_705259da7b0eef0c","netlist_hash":"2447aa81ce2b4c13","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"5.1V Zener diode D1 sets a reference voltage at node zref.","pair_ids":["a38c83628d9cdcd7","4c5435de1eb7bb6c","1457562a00015c61"],"prompts":["5.1V Zener diode D1 sets a reference voltage at node zref.","NPN emitter follower Q1 buffers the Zener voltage, providing a low-impedance output at node out.","Resistors RZ and RE bias the Zener and emitter follower, respectively."],"measurements":[{"name":"VOUT_MAX","key":"VOUT_MAX","index":0,"value":4.4563366933569295,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#2 DC"},{"name":"VOUT_MIN","key":"VOUT_MIN","index":0,"value":4.416232020806864,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#2 DC"},{"name":"LINE_REG","key":"LINE_REG","index":0,"value":0.005729238935723683,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#2 DC"},{"name":"VOUT_NOM","key":"VOUT_NOM","index":0,"value":4.432305117243653,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"}]} +{"id":"deepseek:00160_e075669ba533f610:1e5bbf840c767433","source":"deepseek","example_id":"00160_e075669ba533f610","test_name":"test_test_160_cockcroft_walton_voltage_multiplier_3_stages_e075669ba533f610","netlist_hash":"1e5bbf840c767433","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"3-stage Cockcroft-Walton voltage multiplier with six diodes and six capacitors","pair_ids":["dfb446b569a847a4","caaed1e4e8e2ecad","ac0bc33dd812a3e3","c4fecf6d06602cfa"],"prompts":["3-stage Cockcroft-Walton voltage multiplier with six diodes and six capacitors","Converts a 10V peak, 1kHz AC input to a high-voltage DC output","Output load of 100k\u03a9 provides a steady DC current draw","Transient simulation runs for 10ms with measurements taken from 8ms to 10ms after settling"],"measurements":[{"name":"Vout_max","key":"Vout_max","index":0,"value":57.98812326268947,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"},{"name":"Vout_ripple","key":"Vout_ripple","index":0,"value":0.05590144570039257,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#1 TRAN"},{"name":"Vout_min","key":"Vout_min","index":0,"value":57.93222181698908,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 TRAN"},{"name":"Vout_avg","key":"Vout_avg","index":0,"value":57.959837596467985,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:01487_b6091ba6b9b7f398:ac08a9564ea0f57a","source":"deepseek","example_id":"01487_b6091ba6b9b7f398","test_name":"test_test_1487_instrumentation_amplifier_with_driven_reference_b6091ba6b9b7f398","netlist_hash":"ac08a9564ea0f57a","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Three-op-amp instrumentation amplifier with driven reference node for output offset.","pair_ids":["a158a08ddc3c8e27","581cfc3560713535","6014f8e2549f9403","f34430f1aac83d09"],"prompts":["Three-op-amp instrumentation amplifier with driven reference node for output offset.","First stage (E1, E2, R1, R2, Rg) provides differential gain of 21.","Second stage (E3, R3-R6) subtracts the first-stage outputs and adds VREF, yielding overall gain of 21 and DC shift of VREF.","High open-loop gain (1e9) ensures ideal closed\u2011loop behavior and exact gain values."],"measurements":[{"name":"GainDB","key":"GainDB","index":0,"value":32.46498541350515,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"VOUT_DC","key":"VOUT_DC","index":0,"value":2.499999761581421,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#3 DC"},{"name":"GainMag","key":"GainMag","index":0,"value":41.99999809265137,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"}]} +{"id":"deepseek:01622_9f6aa838d3a0b4b5:312cd727c09c4946","source":"deepseek","example_id":"01622_9f6aa838d3a0b4b5","test_name":"test_test_1622_non_inverting_schmitt_trigger_9f6aa838d3a0b4b5","netlist_hash":"312cd727c09c4946","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Non-inverting Schmitt trigger circuit using an ideal op-amp (E source with gain 100k) and positive feedback resistors (Rin=1k, Rf=10k).","pair_ids":["8be95ec92129c402","d69dd61e6e693483","a1a5b121affe35d1"],"prompts":["Non-inverting Schmitt trigger circuit using an ideal op-amp (E source with gain 100k) and positive feedback resistors (Rin=1k, Rf=10k).","Output clamping is implemented with ideal diodes to \u00b15V supplies, providing well-defined saturation levels.","A small capacitor (1pF) is added from output to ground and CJO parameter in diode model to aid convergence without affecting threshold voltages."],"measurements":[{"name":"vth_rise","key":"vth_rise","index":0,"value":0.5076674264539227,"value_is_finite":true,"success":true,"measurement_type":"FIND_WHEN","simulation_name":"#1 TRAN"},{"name":"vth_fall","key":"vth_fall","index":0,"value":-0.5076674379085016,"value_is_finite":true,"success":true,"measurement_type":"FIND_WHEN","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00092_2290284b3b284ebc:e42f565298acec18","source":"deepseek","example_id":"00092_2290284b3b284ebc","test_name":"test_test_92_twin_t_notch_filter_2290284b3b284ebc","netlist_hash":"e42f565298acec18","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"The twin\u2011T notch filter uses two T\u2011networks (R1\u2011R2\u2011C3 and C1\u2011C2\u2011R3) to create a transmission zero near 1.56 kHz.","pair_ids":["c9eb72187fa7e272","5721fce04daf11a7","4cd5877df54eb15e"],"prompts":["The twin\u2011T notch filter uses two T\u2011networks (R1\u2011R2\u2011C3 and C1\u2011C2\u2011R3) to create a transmission zero near 1.56 kHz.","AC analysis sweeps logarithmically from 10 Hz to 100 kHz with 100 points per decade.","The first .meas captures the minimum output in dB, and the second finds the frequency where the output first crosses -40 dB on the way down (first crossing of -40 dB)."],"measurements":[{"name":"notch_db","key":"notch_db","index":0,"value":-48.61925703529857,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 ac"},{"name":"fnotch","key":"fnotch","index":0,"value":1524.046700405072,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 ac"}]} +{"id":"deepseek:00172_f724f493bd25a8be:152f82866fce2452","source":"deepseek","example_id":"00172_f724f493bd25a8be","test_name":"test_test_172_common_emitter_npn_amplifier_f724f493bd25a8be","netlist_hash":"152f82866fce2452","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Voltage-divider biased common-emitter amplifier","pair_ids":["ae2d1ab837ebea9b","e9c3b0b7ab2018dc","9aade235212324a2"],"prompts":["Voltage-divider biased common-emitter amplifier","Unbypassed emitter resistor for negative feedback and stability","AC analysis at 1kHz to measure mid-band gain magnitude"],"measurements":[{"name":"I_C","key":"I_C","index":0,"value":0.001191114846518417,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#3 DC"},{"name":"V_CE","key":"V_CE","index":0,"value":6.044425767407915,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#3 DC"},{"name":"db_gain","key":"db_gain","index":0,"value":13.480058279211036,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"}]} +{"id":"deepseek:02304_8cc8a3064559a4c2:c02a394feed12a1a","source":"deepseek","example_id":"02304_8cc8a3064559a4c2","test_name":"test_test_2304_rms_to_dc_converter_approximation_with_precision_rectifier_and_filter_8cc8a3064559a4c2","netlist_hash":"c02a394feed12a1a","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Precision full-wave rectifier uses a single op-amp and a diode bridge in negative feedback to eliminate diode drops.","pair_ids":["60008a1f0d150857","0ef2007affa0c4a0","36c069f4aab846b7"],"prompts":["Precision full-wave rectifier uses a single op-amp and a diode bridge in negative feedback to eliminate diode drops.","Input signal is 1 Vpeak, 50 Hz sine wave, resistor R1 converts input to current; op-amp forces rectified current through load resistor Rload.","Load voltage V(p,m) equals |Vin|, then scaled by 1.11 to approximate RMS, low-pass filtered by R2-C2 for a DC output."],"measurements":[{"name":"Vout_avg","key":"Vout_avg","index":0,"value":0.7066269522774031,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 tran"}]} +{"id":"deepseek:01331_3e658d5eb921757a:9c844b613ea69758","source":"deepseek","example_id":"01331_3e658d5eb921757a","test_name":"test_test_1331_mos_diode_load_3e658d5eb921757a","netlist_hash":"9c844b613ea69758","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Simulate the DC characteristics of an NMOS transistor connected as a diode with a resistive load.","pair_ids":["6c9fd34e74a73af4","0919834f5e731050","16eedf25b63cabc9"],"prompts":["Simulate the DC characteristics of an NMOS transistor connected as a diode with a resistive load.","Characterize a diode-connected MOSFET load by sweeping the supply voltage and measuring current.","Analyze the operating point of a diode-connected NMOS transistor in a DC sweep."],"measurements":[{"name":"Vd_at_100uA","key":"Vd_at_100uA","index":0,"value":1.4408164216389843,"value_is_finite":true,"success":true,"measurement_type":"FIND_WHEN","simulation_name":"#2 DC"},{"name":"Id_max","key":"Id_max","index":0,"value":0.0003212406082673482,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#2 DC"}]} +{"id":"deepseek:00415_a80912d6a88d9a8b:3a363d5e372f2b2e","source":"deepseek","example_id":"00415_a80912d6a88d9a8b","test_name":"test_test_415_astable_multivibrator_bjt_a80912d6a88d9a8b","netlist_hash":"3a363d5e372f2b2e","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Classic BJT astable multivibrator with symmetrical 4.7k\u03a9 collector resistors, 47k\u03a9 base resistors, and 22nF coupling capacitors.","pair_ids":["90abfea545e3dd69","85a5c94b67549cd1","00de6073112d03a6"],"prompts":["Classic BJT astable multivibrator with symmetrical 4.7k\u03a9 collector resistors, 47k\u03a9 base resistors, and 22nF coupling capacitors.","Biased with 12V supply, initial conditions force Q1 on and Q2 off to start oscillation.","Transient simulation measures period between two rising edges of V(out) at 6V and computes frequency and amplitude."],"measurements":[{"name":"vpeak_min","key":"vpeak_min","index":0,"value":-0.796434832943719,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 TRAN"},{"name":"t2","key":"t2","index":0,"value":0.0015995034278116047,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 TRAN"},{"name":"period","key":"period","index":0,"value":0.0014645139487799452,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 TRAN"},{"name":"amplitude","key":"amplitude","index":0,"value":11.992613502310709,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 TRAN"},{"name":"t1","key":"t1","index":0,"value":0.00013498947903165955,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 TRAN"},{"name":"freq","key":"freq","index":0,"value":682.8203997873003,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 TRAN"},{"name":"vpeak_max","key":"vpeak_max","index":0,"value":11.992613502310709,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00832_fec1130968d9f08c:29b8b8661f14b82f","source":"deepseek","example_id":"00832_fec1130968d9f08c","test_name":"test_test_832_diode_antilog_converter_with_op_amp_feedback_fec1130968d9f08c","netlist_hash":"29b8b8661f14b82f","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Create an antilogarithmic amplifier using an operational amplifier and a diode, where the output voltage is proportional to the exponential of the input voltage.","pair_ids":["7152bf2ad7c5b4f4","52706fcb38a8c07a","450f4ad31c303aa2"],"prompts":["Create an antilogarithmic amplifier using an operational amplifier and a diode, where the output voltage is proportional to the exponential of the input voltage.","Design a circuit that exponentiates an input voltage: apply the input to a diode whose current is fed into an op-amp's summing junction with a feedback resistor.","Develop a SPICE simulation of an antilog converter using an op-amp behavioral model and a diode, and verify the exponential relationship between input and output."],"measurements":[{"name":"ratio","key":"ratio","index":0,"value":47.554382022653805,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 DC"},{"name":"vout06","key":"vout06","index":0,"value":-11.82543511997911,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 DC"},{"name":"vout05","key":"vout05","index":0,"value":-0.24867182827327558,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 DC"}]} +{"id":"deepseek:00483_b1af76ab3c5af213:c5530e5011348c04","source":"deepseek","example_id":"00483_b1af76ab3c5af213","test_name":"test_test_483_rc_snubber_b1af76ab3c5af213","netlist_hash":"c5530e5011348c04","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"A 12V DC supply is switched by a voltage-controlled switch S1 with a control pulse that turns on at 0s and off at 50\u00b5s.","pair_ids":["8cd2a5d71fe23ed5","8eb18e4aa0bc6044","af5e9b105771a481","bb7293d250ca8773","1cbeaea2d4a01a88"],"prompts":["A 12V DC supply is switched by a voltage-controlled switch S1 with a control pulse that turns on at 0s and off at 50\u00b5s.","The load consists of a 1mH inductor in series with a 100\u03a9 resistor to ground.","An RC snubber (100nF capacitor in series with a 100\u03a9 resistor) is placed across the inductor to damp voltage spikes.","The snubber values provide critical damping (R = \u221a(L/C) = 100\u03a9) to minimize overshoot and undershoot.","Transient analysis shows V(out) rises to ~12V with ~10\u00b5s time constant, and when the switch opens, the negative voltage spike is limited to a small value."],"measurements":[{"name":"t_rise","key":"t_rise","index":0,"value":3.267892189496736e-05,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 TRAN"},{"name":"Vmax","key":"Vmax","index":0,"value":12.019552575588182,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"},{"name":"Vmin","key":"Vmin","index":0,"value":9.949311588819398e-06,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 TRAN"},{"name":"Vundershoot","key":"Vundershoot","index":0,"value":0,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 TRAN"},{"name":"Vovershoot","key":"Vovershoot","index":0,"value":12.019552575588182,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00782_a6e95397a2caa9b1:e748eaf363bc4bc4","source":"deepseek","example_id":"00782_a6e95397a2caa9b1","test_name":"test_test_782_diode_input_protection_clamp_a6e95397a2caa9b1","netlist_hash":"e748eaf363bc4bc4","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Diode clamp circuit protects analog input node from voltages beyond supply rails","pair_ids":["901664b0806ba050","6e400ed4b5a8b7aa","7400345f326e5342"],"prompts":["Diode clamp circuit protects analog input node from voltages beyond supply rails","Series resistor limits current during clamping","Positive overvoltage clamped to VCC + diode drop, negative undervoltage clamped to GND - diode drop"],"measurements":[{"name":"vmin","key":"vmin","index":0,"value":-0.6627560022275746,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 tran"},{"name":"vmax","key":"vmax","index":0,"value":5.662756002227689,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 tran"},{"name":"vavg","key":"vavg","index":0,"value":2.5617777592100293,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 tran"}]} +{"id":"deepseek:00491_3d57b22e9612d64c:05bb29ecb8dc5a9d","source":"deepseek","example_id":"00491_3d57b22e9612d64c","test_name":"test_test_491_series_rc_zobel_3d57b22e9612d64c","netlist_hash":"05bb29ecb8dc5a9d","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"The Zobel network uses Rz = Rload and Cz = L/Rload^2 to flatten the impedance.","pair_ids":["edcb8dda2e52cd43","b117ec31c50c2e0f","4551caa5d3b8ed08"],"prompts":["The Zobel network uses Rz = Rload and Cz = L/Rload^2 to flatten the impedance.","The total admittance becomes 1/Rload, making the source see a constant load of Rload.","AC analysis shows the current drawn from the 1V source is constant 0.125 A across frequency."],"measurements":[{"name":"I_1k","key":"I_1k","index":0,"value":0.1249537243351681,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 ac"},{"name":"I_100k","key":"I_100k","index":0,"value":0.1249997404350198,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 ac"},{"name":"I_10k","key":"I_10k","index":0,"value":0.12497708122758716,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 ac"},{"name":"I_dc","key":"I_dc","index":0,"value":0.124999999938389,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 ac"}]} +{"id":"deepseek:00664_55c5d70bed05465f:124f7284aeb6f714","source":"deepseek","example_id":"00664_55c5d70bed05465f","test_name":"test_test_664_capacitive_impedance_divider_probe_55c5d70bed05465f","netlist_hash":"124f7284aeb6f714","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"10x compensated probe using a single-ended RC divider.","pair_ids":["af5c72a6c4c1f4ee","227814174bcd9a16","2cc20f4a2d7830a7","e03134a2cb1f8852"],"prompts":["10x compensated probe using a single-ended RC divider.","R1=9M and R2=1M set the DC attenuation to 0.1.","C1=10p and C2=90p adjust the capacitive division to match the resistive ratio.","The output is taken at the junction (mid) where R2 and C2 connect to ground."],"measurements":[{"name":"vm_low","key":"vm_low","index":0,"value":0.09999999999999999,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"vm_high","key":"vm_high","index":0,"value":0.09999999999999999,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:02151_ba2a8351b04dd9c1:d1c62868b9e81338","source":"deepseek","example_id":"02151_ba2a8351b04dd9c1","test_name":"test_test_2151_rtd_bridge_inst_amp_ba2a8351b04dd9c1","netlist_hash":"d1c62868b9e81338","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Wheatstone bridge with all resistors 100 \u03a9, balanced at V_TEMP=0 (2.5 V at both midpoints).","pair_ids":["e28fe6d5311cc65f","75a77c62cf4301cd","2ac04d4b96252936","66df78dca8b8866f"],"prompts":["Wheatstone bridge with all resistors 100 \u03a9, balanced at V_TEMP=0 (2.5 V at both midpoints).","V_TEMP swept from \u201310 mV to +10 mV models RTD resistance change; produces differential bridge output of \u20130.5*V_TEMP.","Three-op-amp instrumentation amplifier: first stage (E1, E2) with gain 1+2*Rf/Rg=21, second stage (E3) with gain R12/R11=2, total instrumentation gain = 42, overall gain = 0.5*42 = 21 V/V.","E3 input polarity corrected (non\u2011inverting to NG4) and second\u2011stage resistors set to 20 k\u03a9 for gain of 2, yielding overall linear response."],"measurements":[{"name":"GAIN","key":"GAIN","index":0,"value":20.99496107257437,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#2 DC"},{"name":"OUT_OFFSET","key":"OUT_OFFSET","index":0,"value":5.820766091346741e-11,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"GAIN_ERROR","key":"GAIN_ERROR","index":0,"value":-0.02399489250300186,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#2 DC"},{"name":"GAIN_CALC","key":"GAIN_CALC","index":0,"value":21,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#2 DC"},{"name":"OUT_10MV","key":"OUT_10MV","index":0,"value":0.20994961078395136,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"}]} +{"id":"deepseek:01467_593d2b7b8e294d1f:d9274354c37d2133","source":"deepseek","example_id":"01467_593d2b7b8e294d1f","test_name":"test_test_1467_opamp_subtractor_matched_resistors_593d2b7b8e294d1f","netlist_hash":"d9274354c37d2133","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Unity-gain difference amplifier using an ideal opamp modeled as VCVS with gain 1e5.","pair_ids":["af262934dc326687","a778a99c3472b21d","dc437537105ef716","3aa420b60d2e741e"],"prompts":["Unity-gain difference amplifier using an ideal opamp modeled as VCVS with gain 1e5.","Resistors are matched: R1=R2=R3=R4=10k, giving Vout = V2 - V1.","DC analysis: V1=1.5V, V2=2.5V \u2192 Vout=1.0V.","AC analysis: V1 AC source 1V, V2 AC 0 \u2192 transfer magnitude 1."],"measurements":[{"name":"VOUT_1K","key":"VOUT_1K","index":0,"value":0.9999800003999919,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"VOUT_DC","key":"VOUT_DC","index":0,"value":0.999980000386131,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#3 DC"}]} +{"id":"deepseek:01047_d37def1414fbb5a3:816f51da450b2a74","source":"deepseek","example_id":"01047_d37def1414fbb5a3","test_name":"test_test_1047_two_transistor_bjt_current_limiter_d37def1414fbb5a3","netlist_hash":"816f51da450b2a74","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Two-transistor BJT current limiter using Q1 as pass transistor and Q2 as sense/shunt transistor.","pair_ids":["e803ef363d713200","d8a3a0e5843a330f","9164af6508c1bff7"],"prompts":["Two-transistor BJT current limiter using Q1 as pass transistor and Q2 as sense/shunt transistor.","As Vin rises, Q1 initially drives current through Rs (10 \u03a9) and Rl (20 \u03a9). When the voltage across Rs reaches ~0.7 V, Q2 turns on, diverting base current from Q1 and clamping the output current to about 70 mA.","The load resistor Rl was reduced from 100 \u03a9 to 20 \u03a9 to allow the current limit to be reached within a Vin sweep of 0\u20135 V."],"measurements":[{"name":"Ilim","key":"Ilim","index":0,"value":0.06711637859708437,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#2 DC"}]} +{"id":"deepseek:00955_3f4b6b1dc3372757:ab351227f882a593","source":"deepseek","example_id":"00955_3f4b6b1dc3372757","test_name":"test_test_955_complementary_emitter_follower_buffer_3f4b6b1dc3372757","netlist_hash":"ab351227f882a593","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Complementary push-pull emitter follower with diode-connected transistors Q3 and Q4 providing bias to reduce crossover distortion.","pair_ids":["b764da15df245338","3c2f17ad7bb4a3a9","c29a3a88b940fd28"],"prompts":["Complementary push-pull emitter follower with diode-connected transistors Q3 and Q4 providing bias to reduce crossover distortion.","Operates from \u00b112 V supplies, AC-coupled input via C1, driving a 100 \u03a9 load RL.","Transient simulation from 0 to 5 ms with 1 kHz, 2 V amplitude sine input. Measures DC offset at output and voltage gain."],"measurements":[{"name":"vin_pp","key":"vin_pp","index":0,"value":3.9497564915508923,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#2 TRAN"},{"name":"gain","key":"gain","index":0,"value":0.9598034003970369,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#2 TRAN"},{"name":"vout_dc","key":"vout_dc","index":0,"value":-0.016027916662573978,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#2 TRAN"},{"name":"vout_pp","key":"vout_pp","index":0,"value":3.790989711330817,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#2 TRAN"}]} +{"id":"deepseek:02115_e0154442fdbfbcbe:22cd5d2e942b192d","source":"deepseek","example_id":"02115_e0154442fdbfbcbe","test_name":"test_test_2115_pll_charge_pump_e0154442fdbfbcbe","netlist_hash":"22cd5d2e942b192d","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Charge pump with UP and DOWN current pulses using switches and current sources.","pair_ids":["120e8abfc4e66bb5","a240259e1c3b3f0d","c750715064b3f5f9","14069cb5a2aa0829"],"prompts":["Charge pump with UP and DOWN current pulses using switches and current sources.","UP pulse (0-3V) turns on P-type switch from 10\u03bcs to 10.5\u03bcs; DOWN pulse turns on N-type switch from 10.5\u03bcs to 11\u03bcs.","Passive loop filter: R1=1k, C1=10nF, C2=100pF; initial condition on both Vctrl and Vfilt set to 1.5V to prevent discharge.","Transient simulation from 0 to 50\u03bcs with UIC, measurements taken after 20\u03bcs to capture steady state."],"measurements":[{"name":"v_pp","key":"v_pp","index":0,"value":2.4202861936828413e-14,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#1 TRAN"},{"name":"v_max","key":"v_max","index":0,"value":1.5000000000000406,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"},{"name":"v_min","key":"v_min","index":0,"value":1.5000000000000058,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 TRAN"},{"name":"v_avg","key":"v_avg","index":0,"value":1.5000000000000353,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00579_a89220fca3b42329:2f2d60a842169cd3","source":"deepseek","example_id":"00579_a89220fca3b42329","test_name":"test_test_579_third_order_chebyshev_lp_ladder_a89220fca3b42329","netlist_hash":"2f2d60a842169cd3","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Third-order Chebyshev low-pass filter with 0.5 dB ripple and 1 MHz cutoff, doubly terminated in 50 ohms.","pair_ids":["c0178490a64941ab","e14892c03ee321c5","65dbb95431e6e437","39983ae9249b2dfe"],"prompts":["Third-order Chebyshev low-pass filter with 0.5 dB ripple and 1 MHz cutoff, doubly terminated in 50 ohms.","AC sweep from 10 kHz to 10 MHz to characterize frequency response.","Measures DC gain, passband maximum, -3 dB bandwidth, and stopband attenuation at 3 MHz.","Expected -6 dB gain in passband, -3 dB bandwidth near 1.17 MHz, and >20 dB attenuation at 3 MHz."],"measurements":[{"name":"f3dB","key":"f3dB","index":0,"value":1166190.0749296916,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 AC"},{"name":"passband_max","key":"passband_max","index":0,"value":-6.021032969381283,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 AC"},{"name":"att3meg","key":"att3meg","index":0,"value":-36.79430312391338,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"dc_gain","key":"dc_gain","index":0,"value":-6.021076493639518,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:00142_1360d0e3dd75699f:93c73ad7333ecb91","source":"deepseek","example_id":"00142_1360d0e3dd75699f","test_name":"test_test_142_positive_diode_clamper_with_reference_1360d0e3dd75699f","netlist_hash":"93c73ad7333ecb91","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Positive diode clamper with 2V reference shifts input sine upward.","pair_ids":["8721a2c855833f6d","8517efcac1c8475e","1eca00ab63c03957"],"prompts":["Positive diode clamper with 2V reference shifts input sine upward.","Negative output peaks are clamped to approximately Vref - Vd \u2248 1.3V.","Diode anode connected to reference, cathode to output ensures proper clamping action."],"measurements":[{"name":"vmin","key":"vmin","index":0,"value":1.3234007073076728,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 TRAN"},{"name":"vmax","key":"vmax","index":0,"value":11.316977836228236,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:01569_c8c452ca72408bab:c90b6dfc3fb763d7","source":"deepseek","example_id":"01569_c8c452ca72408bab","test_name":"test_test_1569_op_amp_active_clamp_with_diode_feedback_c8c452ca72408bab","netlist_hash":"c90b6dfc3fb763d7","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Inverting op\u2011amp configuration with a DC offset (Vref = 1.5 V) on the non\u2011inverting input, giving an unclamped output of 3\u202fV \u2013 Vin.","pair_ids":["dffba9fbd41a7142","b1773a766363029e","561fa81538b8e2d0"],"prompts":["Inverting op\u2011amp configuration with a DC offset (Vref = 1.5 V) on the non\u2011inverting input, giving an unclamped output of 3\u202fV \u2013 Vin.","A diode is placed across the feedback resistor (anode to output, cathode to inverting input) to clamp the positive output excursion when the output tries to exceed Vref + Vf.","The E source serves as an ideal op\u2011amp with gain 100\u202f000, and the diode model uses IS=1e\u201114 and RS=10."],"measurements":[{"name":"max_vout","key":"max_vout","index":0,"value":2.147053033229895,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"},{"name":"min_vout","key":"min_vout","index":0,"value":-1.9998978412186261,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:01432_a0351fc48257047e:88d2fd1a80a79748","source":"deepseek","example_id":"01432_a0351fc48257047e","test_name":"test_test_1432_inverting_opamp_with_bias_compensation_a0351fc48257047e","netlist_hash":"88d2fd1a80a79748","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Inverting op-amp amplifier with gain -10 using Rin=1k, Rf=10k.","pair_ids":["9db0b15768a8a551","57c20aae6b50499a","9db2379e823b03ab"],"prompts":["Inverting op-amp amplifier with gain -10 using Rin=1k, Rf=10k.","Bias compensation resistor RCOMP = Rin||Rf = 910 ohms at non-inverting input.","Ideal op-amp with gain 100k and matched input bias currents of 100nA."],"measurements":[{"name":"vout_os","key":"vout_os","index":0,"value":9.998900107888176e-07,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"gain_db","key":"gain_db","index":0,"value":19.999044604685594,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:01274_7216b14abe706f4a:401d2991483a9b39","source":"deepseek","example_id":"01274_7216b14abe706f4a","test_name":"test_test_1274_cmos_differential_pair_degeneration_7216b14abe706f4a","netlist_hash":"401d2991483a9b39","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"CMOS differential pair with source degeneration resistors, biased by a 200uA tail current and a 5V supply.","pair_ids":["a6892a93680b737b","50a1ff1046889a52","dcf23acedbac2138"],"prompts":["CMOS differential pair with source degeneration resistors, biased by a 200uA tail current and a 5V supply.","Transistor sizing W=50u L=1u and Rs=400\u03a9 provide a target single-ended gain of approximately 11dB.","DC, AC, and operating point analyses ensure symmetrical transfer, flat gain, and low offset."],"measurements":[{"name":"vos","key":"vos","index":0,"value":4.899440853023407e-10,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#3 dc"},{"name":"vout_p","key":"vout_p","index":0,"value":3.9999999469227614,"value_is_finite":true,"success":true,"measurement_type":"FIND_WHEN","simulation_name":"#3 dc"},{"name":"gain_hf","key":"gain_hf","index":0,"value":11.169628353594373,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 ac"},{"name":"gain_lf","key":"gain_lf","index":0,"value":11.169628353594373,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 ac"},{"name":"vout_n","key":"vout_n","index":0,"value":3.9999999464328173,"value_is_finite":true,"success":true,"measurement_type":"FIND_WHEN","simulation_name":"#3 dc"}]} +{"id":"deepseek:02178_77d98338d3a153a8:8858c0d450ffc817","source":"deepseek","example_id":"02178_77d98338d3a153a8","test_name":"test_test_2178_r2r_dac_77d98338d3a153a8","netlist_hash":"8858c0d450ffc817","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"3-bit R-2R DAC with op-amp buffer in inverting configuration","pair_ids":["94a80a5e039354bd","ea3973b241269d35","544849eb1b5ab3b6","c7bad67a586d5129"],"prompts":["3-bit R-2R DAC with op-amp buffer in inverting configuration","Fixed digital code 101 applied via E-sources that scale with Vref","Corrected ladder topology with termination 2R at LSB end and MSB directly connected to summing node","Op-amp modeled as ideal high-gain VCVS with output limits"],"measurements":[{"name":"vout_ratio","key":"vout_ratio","index":0,"value":0.5,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#2 DC"},{"name":"vout_half","key":"vout_half","index":0,"value":-1.5624687506249875,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"vout_max","key":"vout_max","index":0,"value":-3.124937501249975,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"}]} +{"id":"deepseek:00568_10938c3397ca38b8:58407c5cf5a60c9c","source":"deepseek","example_id":"00568_10938c3397ca38b8","test_name":"test_test_568_fifth_order_lc_butterworth_low_pass_ladder_10938c3397ca38b8","netlist_hash":"58407c5cf5a60c9c","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Fifth-order Butterworth LC ladder low-pass filter","pair_ids":["aff2036b82876f24","a0eeb65b26469675","c4d1f756aec93409"],"prompts":["Fifth-order Butterworth LC ladder low-pass filter","Designed for 1 kHz cutoff with 50 ohm terminations","Uses series inductors (4.917 mH, 15.92 mH) and shunt capacitors (5.15 \u00b5F)"],"measurements":[{"name":"f3db","key":"f3db","index":0,"value":998.3661716019785,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 AC"},{"name":"maxgain","key":"maxgain","index":0,"value":-6.020599913307075,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 AC"},{"name":"fstop","key":"fstop","index":0,"value":-106.01781115167678,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:00086_5f054a2c01743108:2bc0d19796ff4342","source":"deepseek","example_id":"00086_5f054a2c01743108","test_name":"test_test_86_rlc_bandstop_notch_filter_5f054a2c01743108","netlist_hash":"2bc0d19796ff4342","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Passive RLC band-stop notch filter with center frequency near 1.07 kHz.","pair_ids":["450dacab58c07896","409547d9f481d640","b4b8a1ed8c2c18bb","05815521d27a09f0"],"prompts":["Passive RLC band-stop notch filter with center frequency near 1.07 kHz.","Uses a resistor in series with a series LC tank to ground.","At low and high frequencies, the LC tank presents high impedance, so output is near 0 dB.","At resonance, the series LC impedance is minimal, creating a deep notch."],"measurements":[{"name":"mag_low","key":"mag_low","index":0,"value":-0.08363304552995035,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"mag_notch","key":"mag_notch","index":0,"value":-53.060265647045476,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"mag_high","key":"mag_high","index":0,"value":-0.1111511390874857,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:00386_99f59166998e3e82:2d8b33b6549e9de6","source":"deepseek","example_id":"00386_99f59166998e3e82","test_name":"test_test_386_wien_bridge_oscillator_99f59166998e3e82","netlist_hash":"2d8b33b6549e9de6","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Wien-bridge oscillator circuit using a behavioral op-amp with high gain (100000).","pair_ids":["e9e35b18649235e7","3b87913d411921ab","5bb83e0f7311d42c","ac647a507bda989e"],"prompts":["Wien-bridge oscillator circuit using a behavioral op-amp with high gain (100000).","The frequency-selective network uses 10k resistors and 15.9nF capacitors for a target frequency of 1 kHz.","Amplitude stabilization is achieved with back-to-back diodes across the feedback resistor, limiting the gain.","Transient simulation runs for 30 ms to allow oscillation to stabilize before measuring frequency and amplitude."],"measurements":[{"name":"t10","key":"t10","index":0,"value":0.010109149361987006,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 TRAN"},{"name":"vpp","key":"vpp","index":0,"value":1.9805492690647952,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#1 TRAN"},{"name":"period","key":"period","index":0,"value":0.0010109149361987005,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 TRAN"},{"name":"freq","key":"freq","index":0,"value":989.2029133136133,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:01923_9dc68657b689d05c:9c870e34a2ededf0","source":"deepseek","example_id":"01923_9dc68657b689d05c","test_name":"test_test_1923_constant_current_battery_charger_9dc68657b689d05c","netlist_hash":"9c870e34a2ededf0","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Constant\u2011current battery charger using an op\u2011amp and a PNP transistor.","pair_ids":["aa8602158f30462d","d0755cacdf8102b8","7f20f4c92e839f0e"],"prompts":["Constant\u2011current battery charger using an op\u2011amp and a PNP transistor.","The op\u2011amp drives the PNP base to maintain the sense\u2011resistor voltage equal to the 1V reference, yielding 1A charging current.","Simulated with battery voltage swept from 0\u202fV to 8\u202fV."],"measurements":[{"name":"I_AT_4V","key":"I_AT_4V","index":0,"value":1.0001116623170674,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"I_MAX","key":"I_MAX","index":0,"value":1.0001116623170674,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#2 DC"},{"name":"I_VARIATION","key":"I_VARIATION","index":0,"value":4.656612873077393e-10,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#2 DC"},{"name":"I_MIN","key":"I_MIN","index":0,"value":1.000111661851406,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#2 DC"}]} +{"id":"deepseek:00611_5521940b769479b9:c66de5e672f73226","source":"deepseek","example_id":"00611_5521940b769479b9","test_name":"test_test_611_m_derived_low_pass_filter_5521940b769479b9","netlist_hash":"c66de5e672f73226","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"m-derived low-pass T-section filter with m=0.6, fc=1kHz, R0=600 ohms","pair_ids":["c5e7f2facbd7887d","2ff31a105268b9c5","64996c729d7d7933","ee863c8fc7812cb0"],"prompts":["m-derived low-pass T-section filter with m=0.6, fc=1kHz, R0=600 ohms","Doubly-terminated with 600 ohm source and load","Passband insertion loss is 6 dB due to resistive matching","Pole frequency at 1250 Hz where shunt series LC resonates"],"measurements":[{"name":"f3db","key":"f3db","index":0,"value":915.393309953838,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 AC"},{"name":"outdb_fc","key":"outdb_fc","index":0,"value":-11.79251079351977,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"outdb_pole","key":"outdb_pole","index":0,"value":-46.9136936084635,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:01566_e6e2da8ffb50f112:b159567765b770a0","source":"deepseek","example_id":"01566_e6e2da8ffb50f112","test_name":"test_test_1566_op_amp_capacitance_multiplier_e6e2da8ffb50f112","netlist_hash":"b159567765b770a0","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Design a capacitance multiplier using E-source op-amps that multiplies a 1nF capacitor to an effective 11nF. Use a buffer and an inverting amplifier. Verify with transient and AC analyses.","pair_ids":["e8035dbce48c8b48","ddbb42fb2444591c","4487434c14edac82"],"prompts":["Design a capacitance multiplier using E-source op-amps that multiplies a 1nF capacitor to an effective 11nF. Use a buffer and an inverting amplifier. Verify with transient and AC analyses.","Create a SPICE netlist for a capacitance multiplier circuit with op-amp behavioral models, where the effective capacitance is 11 times a small capacitor. Include measurements for time constant and -3dB frequency.","Generate a measured netlist of an op-amp based capacitance multiplier with a multiplier ratio of 11. Use a voltage follower and an inverter to drive the capacitor. Validate the capacitance multiplication via step response and frequency response."],"measurements":[{"name":"tau_scale","key":"tau_scale","index":0,"value":1.1260769636677716e-05,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#2 TRAN"},{"name":"f3db","key":"f3db","index":0,"value":14434.456737173068,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 AC"}]} +{"id":"deepseek:00960_23cf7283d53fc054:f79a86f7d2a85046","source":"deepseek","example_id":"00960_23cf7283d53fc054","test_name":"test_test_960_totem_pole_bjt_output_buffer_23cf7283d53fc054","netlist_hash":"f79a86f7d2a85046","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Design a totem-pole output buffer using NPN and PNP transistors with diode biasing. Simulate transient response with a 1kHz sine wave.","pair_ids":["2ba6855651a22d20","fca4825b45054985","7c7ff074d0a35214"],"prompts":["Design a totem-pole output buffer using NPN and PNP transistors with diode biasing. Simulate transient response with a 1kHz sine wave.","Create a push-pull BJT buffer with class AB biasing. Use a dual-supply (+15V, -15V) and measure the output voltage swing.","Build a complementary transistor output stage in totem-pole configuration, biased by two diodes. Run DC operating point and transient analysis."],"measurements":[{"name":"min_out","key":"min_out","index":0,"value":-4.971938049777798,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#2 TRAN"},{"name":"max_out","key":"max_out","index":0,"value":4.943043431516214,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#2 TRAN"}]} +{"id":"deepseek:01267_74062254bd6e3e14:5e8acd7328b89726","source":"deepseek","example_id":"01267_74062254bd6e3e14","test_name":"test_test_1267_cmos_diff_pair_current_mirror_load_74062254bd6e3e14","netlist_hash":"5e8acd7328b89726","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"CMOS differential amplifier with PMOS current mirror load, powered by \u00b12.5V supplies.","pair_ids":["a2bd46782405e634","7825e4dd693869d6","67f883cee2eda828","37950b10abbf5304"],"prompts":["CMOS differential amplifier with PMOS current mirror load, powered by \u00b12.5V supplies.","Tail current set to 200\u00b5A via ideal source I1.","DC sweep from -0.1V to 0.1V on vin1; AC analysis from 1 Hz to 1 GHz, 10 points per decade.","Measurements capture DC output at zero input, low-frequency gain, and unity-gain frequency."],"measurements":[{"name":"vout_q","key":"vout_q","index":0,"value":0.07576844226052795,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#3 DC"},{"name":"ugfreq","key":"ugfreq","index":0,"value":12565214.647848327,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#2 AC"},{"name":"ac_gain_db","key":"ac_gain_db","index":0,"value":38.82373962045956,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"}]} +{"id":"deepseek:00062_d7e64165595d01ba:5f992fcccd1b48da","source":"deepseek","example_id":"00062_d7e64165595d01ba","test_name":"test_test_62_first_order_rc_low_pass_filter_d7e64165595d01ba","netlist_hash":"5f992fcccd1b48da","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Simple first-order RC low-pass filter","pair_ids":["ac8222c99ca5e5e3","0ee2b60ff1010a3e","6fb5aaf5963bea1f"],"prompts":["Simple first-order RC low-pass filter","AC analysis from 1 Hz to 1 MHz","Characterizes the filter's frequency response"],"measurements":[{"name":"fc","key":"fc","index":0,"value":158.78002247144133,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 AC"},{"name":"mag_out_at_10kHz","key":"mag_out_at_10kHz","index":0,"value":-35.96469730863285,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:00281_0e04b9e0a251447e:663c2dee83ba8fc4","source":"deepseek","example_id":"00281_0e04b9e0a251447e","test_name":"test_test_281_jfet_common_source_amplifier_0e04b9e0a251447e","netlist_hash":"663c2dee83ba8fc4","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Common-source JFET amplifier with bypassed source resistor for maximum gain","pair_ids":["d4aaeb9ec67402a5","616f6fd25bbc6003","6cb48524b61a5a0a"],"prompts":["Common-source JFET amplifier with bypassed source resistor for maximum gain","Gate biased via 1 M\u03a9 resistor to ground, setting Vgs via source self-bias","Coupling capacitors isolate DC bias while passing AC signals; bypass capacitor increases AC gain by removing source degeneration"],"measurements":[{"name":"max_gain","key":"max_gain","index":0,"value":17.88983108769943,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#2 AC"},{"name":"gain_1k","key":"gain_1k","index":0,"value":17.889478971076695,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"}]} +{"id":"deepseek:00556_206c10f07067fb87:adcee411116d865e","source":"deepseek","example_id":"00556_206c10f07067fb87","test_name":"test_test_556_series_resonant_trap_206c10f07067fb87","netlist_hash":"adcee411116d865e","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Design a passive notch filter using a series LC branch shunting the output to ground. Use AC analysis to show the frequency response with a deep notch near 5 kHz.","pair_ids":["dd25512f424a4f60","16e57debbc22a8e5","6a8a89f7ec16426c"],"prompts":["Design a passive notch filter using a series LC branch shunting the output to ground. Use AC analysis to show the frequency response with a deep notch near 5 kHz.","Create a series resonant trap that attenuates signals around 5 kHz. Plot the AC response from 10 Hz to 100 kHz.","Build a simple LC band-stop filter with a resistor, inductor, and capacitor. Run an AC sweep and measure the gain at several frequencies to verify the notch."],"measurements":[{"name":"Vout_at_5000","key":"Vout_at_5000","index":0,"value":-49.84193613545689,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"Vout_at_500","key":"Vout_at_500","index":0,"value":-0.4166025056346567,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"Vout_at_50k","key":"Vout_at_50k","index":0,"value":-0.42741310063601295,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:00224_ebaf5af04b328c22:21e0473760c4fdb3","source":"deepseek","example_id":"00224_ebaf5af04b328c22","test_name":"test_test_224_bjt_cascode_amplifier_ebaf5af04b328c22","netlist_hash":"21e0473760c4fdb3","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Two\u2011stage BJT cascode amplifier with coupling capacitors CIN and COUT, emitter bypass capacitor CE, and base bypass capacitor C2.","pair_ids":["8c7db198346937c9","228a87901b933cdf","1ca899b8823f2cf7"],"prompts":["Two\u2011stage BJT cascode amplifier with coupling capacitors CIN and COUT, emitter bypass capacitor CE, and base bypass capacitor C2.","Q1 operates as a common\u2011emitter amplifier with emitter degeneration resistor RE bypassed for AC, feeding Q2 in common\u2011base configuration.","The cascode provides high voltage gain while reducing Miller effect, enabling wider bandwidth than a single common\u2011emitter stage."],"measurements":[{"name":"max_gain_db","key":"max_gain_db","index":0,"value":37.49156210936506,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#2 ac"},{"name":"f_low","key":"f_low","index":0,"value":145.92761701022727,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#2 ac"},{"name":"f_high","key":"f_high","index":0,"value":34736323.84647938,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#2 ac"}]} +{"id":"deepseek:01660_8a9491bfda79fc16:3b959b43db628b08","source":"deepseek","example_id":"01660_8a9491bfda79fc16","test_name":"test_test_1660_sallen_key_butterworth_low_pass_filter_8a9491bfda79fc16","netlist_hash":"3b959b43db628b08","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Second-order Butterworth low-pass filter using Sallen-Key topology with equal resistors (10k\u03a9) and capacitors (1nF).","pair_ids":["d1e5d368ecbfebbb","d5fc80859adc80f6","10c5d45269c19263"],"prompts":["Second-order Butterworth low-pass filter using Sallen-Key topology with equal resistors (10k\u03a9) and capacitors (1nF).","Non-inverting gain set to 1.586 via Rf=5.86k\u03a9, Rg=10k\u03a9, providing a passband gain of 4 dB.","AC analysis from 1 Hz to 1 MHz with measurements of passband gain, cutoff frequency, and stopband attenuation."],"measurements":[{"name":"f3db","key":"f3db","index":0,"value":15897.802810284928,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 AC"},{"name":"gain_low","key":"gain_low","index":0,"value":3.9885717561066985,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"gain_100k","key":"gain_100k","index":0,"value":-27.923878308753796,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:00761_c43ec9b2dc4bb747:5286b762b5efb2ae","source":"deepseek","example_id":"00761_c43ec9b2dc4bb747","test_name":"test_test_761_window_diode_limiter_asymmetric_c43ec9b2dc4bb747","netlist_hash":"5286b762b5efb2ae","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":2,"representative_prompt":"Window diode limiter with asymmetric clipping levels.","pair_ids":["3d8c33723ac22d05","24926271ed1cd2ad"],"prompts":["Window diode limiter with asymmetric clipping levels.","Input 1kHz 5V sine wave is limited to approximately +3.7V and -2.7V using two diodes referenced to DC voltages."],"measurements":[{"name":"vmin","key":"vmin","index":0,"value":-2.675745814466126,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 TRAN"},{"name":"vmax","key":"vmax","index":0,"value":3.6550660975744815,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:02239_fc4680923c537154:9dcd80f790405baa","source":"deepseek","example_id":"02239_fc4680923c537154","test_name":"test_test_2239_sample_and_hold_fc4680923c537154","netlist_hash":"9dcd80f790405baa","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"Ideal unity\u2011gain buffer isolates the holding capacitor.","pair_ids":["25a4deadc8e69e65","32c70355da2292d4","120350c2bb74be67","b9850075b4b306c9","eaad7057c99bd77f"],"prompts":["Ideal unity\u2011gain buffer isolates the holding capacitor.","Analog switch S1 controlled by VCLK closes during track phase.","Holding capacitor C1 stores the sampled voltage during hold phase.","Rload provides a finite load; droop is checked to be <10mV.","Measurements confirm tracking accuracy and hold droop."],"measurements":[{"name":"v_in_track","key":"v_in_track","index":0,"value":2.3084054362309017,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 tran"},{"name":"v_hold_start","key":"v_hold_start","index":0,"value":2.587580603761375,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 tran"},{"name":"v_hold_end","key":"v_hold_end","index":0,"value":2.5876293959201857,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 tran"},{"name":"v_track","key":"v_track","index":0,"value":2.308106826805006,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 tran"}]} +{"id":"deepseek:00980_67e85882c4730187:fc486fc098a0d5e5","source":"deepseek","example_id":"00980_67e85882c4730187","test_name":"test_test_980_bjt_differential_pair_with_current_mirror_tail_67e85882c4730187","netlist_hash":"fc486fc098a0d5e5","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Create a BJT differential pair with a current mirror tail and resistive collector loads.","pair_ids":["119d413ec6b5dd48","ca671802c7b1143b","b3a601e556aee430","9c962bd22eb83ba7"],"prompts":["Create a BJT differential pair with a current mirror tail and resistive collector loads.","Generate a netlist for a long-tailed pair using NPN BJTs, a 22k reference resistor, and emitter degeneration to set the tail current.","Design a differential amplifier with resistive loads biased by a BJT current mirror; include both DC operating point and AC small-signal analyses.","Simulate a differential pair where one input is driven by an AC signal and the other is grounded, then measure the single-ended AC gain."],"measurements":[{"name":"singl_gain","key":"singl_gain","index":0,"value":94.82919335275334,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"phase_out","key":"phase_out","index":0,"value":0,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"}]} +{"id":"deepseek:00025_e8061d2316229990:1e4f4159c5555ca2","source":"deepseek","example_id":"00025_e8061d2316229990","test_name":"test_test_25_rc_step_pulse_e8061d2316229990","netlist_hash":"1e4f4159c5555ca2","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Create a first-order RC low-pass filter and measure its step response using a pulse source. Use R=1kOhm, C=1uF, and a 0 to 5V pulse with 1us rise and fall times. Run a transient simulation and measure the rise time and the steady-state output voltage.","pair_ids":["359f127af5ec29d4","4eb4caa81ee71f5e","14dc665242b0f09f"],"prompts":["Create a first-order RC low-pass filter and measure its step response using a pulse source. Use R=1kOhm, C=1uF, and a 0 to 5V pulse with 1us rise and fall times. Run a transient simulation and measure the rise time and the steady-state output voltage.","Simulate an RC circuit's transient response to a pulse input. The source is a 5V pulse with 1us edges, 10ms pulse width, 20ms period. Use a 1k resistor and 1uF capacitor. Measure the output voltage's rise time and its maximum value.","Design an RC lowpass filter excited by a 0-5V step waveform. Determine the rise time and final output level via SPICE .MEASURE statements."],"measurements":[{"name":"trise","key":"trise","index":0,"value":0.002176334185998689,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 TRAN"},{"name":"vout_final","key":"vout_final","index":0,"value":4.999441620985529,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"vout_max","key":"vout_max","index":0,"value":4.999800781691075,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:02361_04f0f7e782bd0280:5a171e176caaae48","source":"deepseek","example_id":"02361_04f0f7e782bd0280","test_name":"test_test_2361_rc_pulse_stretcher_04f0f7e782bd0280","netlist_hash":"5a171e176caaae48","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Create a SPICE netlist for an RC pulse stretcher. Use a diode, capacitor, and resistor. Apply a 5V, 1us input pulse and observe the stretched output via transient analysis. Measure the output pulse width.","pair_ids":["bddb09763e0184fd","7cec28e50dd35a73","44f75e0e5d2e0c30"],"prompts":["Create a SPICE netlist for an RC pulse stretcher. Use a diode, capacitor, and resistor. Apply a 5V, 1us input pulse and observe the stretched output via transient analysis. Measure the output pulse width.","Design a pulse-stretching circuit using a diode connected to an RC network. Simulate the transient response to a short input pulse and measure how long the output stays above 2.5V.","Using a diode and RC components, build a pulse stretcher. Perform a transient simulation with a 1us input pulse and measure the output pulse width."],"measurements":[{"name":"fall_time","key":"fall_time","index":0,"value":6.451451339726665e-05,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 TRAN"},{"name":"pulse_width","key":"pulse_width","index":0,"value":6.45130851343891e-05,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 TRAN"},{"name":"rise_time","key":"rise_time","index":0,"value":1.4282628775475234e-09,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00476_52be5fdb971324e0:b1df2cccccffa2f8","source":"deepseek","example_id":"00476_52be5fdb971324e0","test_name":"test_test_476_potentiometer_volume_control_source_impedance_52be5fdb971324e0","netlist_hash":"b1df2cccccffa2f8","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Design a passive volume control using a 100k potentiometer, driven by a source with 1k output impedance, and loaded by a 10k amplifier input. Simulate AC response.","pair_ids":["d36915b59be474f9","17d18327552092e0","d9edadca02ce69cd"],"prompts":["Design a passive volume control using a 100k potentiometer, driven by a source with 1k output impedance, and loaded by a 10k amplifier input. Simulate AC response.","Create a SPICE netlist for a voltage divider volume control with source impedance. The potentiometer is set to 50% position. Include .OP and .AC analyses.","Model a potentiometer-based volume control with a finite source resistance. The wiper is at the midpoint, total pot resistance is 100k, source resistance is 1k, load is 10k. Run AC analysis and measure output at 1 kHz."],"measurements":[{"name":"vout_mag","key":"vout_mag","index":0,"value":0.14044943820224717,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"vout_db","key":"vout_db","index":0,"value":-17.04959987273713,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"}]} +{"id":"deepseek:02442_0ac28c223f189e4c:c101736ca7d05fd2","source":"deepseek","example_id":"02442_0ac28c223f189e4c","test_name":"test_test_2442_parameterized_bjt_current_mirror_0ac28c223f189e4c","netlist_hash":"c101736ca7d05fd2","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"Parameterized BJT current mirror using NPN transistors Q1 and Q2.","pair_ids":["f56fd928896384cf","df818526ebca4943","e4ec7c45cf9d91ef","6882b621f4392904","0e18f51269eb3659"],"prompts":["Parameterized BJT current mirror using NPN transistors Q1 and Q2.","Reference current Iref set by parameter (default 1 mA) through current source I1.","Output load resistor Rload connects VCC to OUT, defining the output voltage drop.","Simple mirror subcircuit connects both transistor bases to the reference node.","Model uses high Early voltage (VAF=1000) to minimize Early effect, making ratio slightly below 1 due to finite beta (BF=100)."],"measurements":[{"name":"Iref","key":"Iref","index":0,"value":0.001,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 DC"},{"name":"Iout","key":"Iout","index":0,"value":0.0009885851502104918,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 DC"},{"name":"ratio","key":"ratio","index":0,"value":0.9885851502104918,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 DC"}]} +{"id":"deepseek:00036_2bc87b84656b7010:d5dd8e69fb869d46","source":"deepseek","example_id":"00036_2bc87b84656b7010","test_name":"test_test_36_rc_delay_high_z_load_2bc87b84656b7010","netlist_hash":"d5dd8e69fb869d46","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Design an RC delay circuit with a high-impedance load and measure the 50% delay.","pair_ids":["0b74d10234a2bdf2","a7d3f2c1411de9a7","7575dec2d630078f"],"prompts":["Design an RC delay circuit with a high-impedance load and measure the 50% delay.","Create a simple RC lowpass filter loaded by 1M\u03a9, driven by a step, and measure the delay from input to output at 50%.","Implement a passive delay network using a series resistor, shunt capacitor, and a high-value load resistor, then measure the time for output to reach half of the input step."],"measurements":[{"name":"tdelay","key":"tdelay","index":0,"value":6.961338266460413e-06,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00555_dfabfa7cb71ecb97:4cf664da594618bc","source":"deepseek","example_id":"00555_dfabfa7cb71ecb97","test_name":"test_test_555_series_resonant_trap_dfabfa7cb71ecb97","netlist_hash":"4cf664da594618bc","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Passive series resonant trap filter using a shunt LC branch to notch 10 kHz.","pair_ids":["9840352e6013b1ca","3c0af310be7f8645","cd6f03b50df7d124"],"prompts":["Passive series resonant trap filter using a shunt LC branch to notch 10 kHz.","AC simulation from 1 kHz to 100 kHz with fine linear stepping to capture narrow notch.","Measurements confirm deep attenuation at resonance and minimal passband loss."],"measurements":[{"name":"vmax_db","key":"vmax_db","index":0,"value":-0.4240442404106308,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 AC"},{"name":"vmin_db","key":"vmin_db","index":0,"value":-33.406706722450934,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 AC"}]} +{"id":"deepseek:02125_5e9a2feb314590d2:923229e9a2d3bddb","source":"deepseek","example_id":"02125_5e9a2feb314590d2","test_name":"test_test_2125_second_order_pll_loop_filter_5e9a2feb314590d2","netlist_hash":"923229e9a2d3bddb","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"The loop filter exhibits a second-order low-pass response with a zero.","pair_ids":["4362dd6ef7bcef53","74037fa70bf35842","57e2607c39716082"],"prompts":["The loop filter exhibits a second-order low-pass response with a zero.","AC response: -20 dB/dec roll-off at low frequencies, zero ~1.6 kHz, second pole at higher frequencies.","Transient step response: initial voltage rise followed by slow discharge."],"measurements":[{"name":"vout_2ms","key":"vout_2ms","index":0,"value":3.501208997100338,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 TRAN"},{"name":"phase_margin","key":"phase_margin","index":0,"value":-0.6544381406425402,"value_is_finite":true,"success":true,"measurement_type":"FIND_WHEN","simulation_name":"#1 AC"},{"name":"f0dB","key":"f0dB","index":0,"value":2595.7600695908995,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 AC"}]} +{"id":"deepseek:00994_2a43f3505ded73a9:f0af157a8e765a3e","source":"deepseek","example_id":"00994_2a43f3505ded73a9","test_name":"test_test_994_bjt_diffpair_large_signal_transfer_2a43f3505ded73a9","netlist_hash":"f0af157a8e765a3e","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"BJT differential amplifier with an active PNP current mirror load for single-ended output.","pair_ids":["1bc5fd5b87105e41","e94c5fc7c660e341","8b6416b3f7fd931d","75cf8ea01cab0f37","70173b5f28405172"],"prompts":["BJT differential amplifier with an active PNP current mirror load for single-ended output.","Non-inverting input (Vin1) swept from -50mV to +50mV; inverting input grounded.","Ideal 1mA tail current source from common emitters to VEE=-10V.","Output taken at collector of Q2; high gain provides sharp transition and near-rail saturation.","Removed 10k load resistor to allow full positive swing to VCC."],"measurements":[{"name":"vout_at_p50m","key":"vout_at_p50m","index":0,"value":9.97601682538889,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 DC"},{"name":"vout_at_0","key":"vout_at_0","index":0,"value":-0.4193991254942114,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 DC"},{"name":"vout_at_m50m","key":"vout_at_m50m","index":0,"value":-0.6412216917722723,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 DC"}]} +{"id":"deepseek:01514_19ca966dfa38d91c:da8ae39c002ca55a","source":"deepseek","example_id":"01514_19ca966dfa38d91c","test_name":"test_test_1514_opamp_voltage_to_current_grounded_load_19ca966dfa38d91c","netlist_hash":"da8ae39c002ca55a","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Design a voltage-to-current converter with a grounded load using ideal op-amps. Use a sense resistor of 1k and load resistor of 500 ohms. Supply \u00b115V. Show the DC sweep of the load current as the input voltage varies from 0 to 1V.","pair_ids":["28311b25a3420d59","68ab63aa1eb53f87","a92196ffc574e98e"],"prompts":["Design a voltage-to-current converter with a grounded load using ideal op-amps. Use a sense resistor of 1k and load resistor of 500 ohms. Supply \u00b115V. Show the DC sweep of the load current as the input voltage varies from 0 to 1V.","Create an op-amp based V-I converter where the output current is sensed with a resistor and the feedback ensures Iout = Vin/R. Use a 1k sense resistor.","Simulate a grounded-load voltage-controlled current source built with two op-amps, one as error amplifier and one as a unity-gain difference amplifier. Demonstrate that the load current is proportional to input voltage, independent of load resistance."],"measurements":[{"name":"I_LOAD_AT_0_5V","key":"I_LOAD_AT_0_5V","index":0,"value":0.0004999925001126636,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"}]} +{"id":"deepseek:00126_57da15e0570493a9:f65716acdd8a2641","source":"deepseek","example_id":"00126_57da15e0570493a9","test_name":"test_test_126_full_wave_bridge_rectifier_57da15e0570493a9","netlist_hash":"f65716acdd8a2641","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"10V peak 60Hz sinusoidal source drives a full-wave bridge rectifier made of four diodes.","pair_ids":["e91946deda519a67","8312a05a459ba54d","56c71ee5d10202af"],"prompts":["10V peak 60Hz sinusoidal source drives a full-wave bridge rectifier made of four diodes.","A 1000uF filter capacitor and 1k load resistor smooth the rectified output.","Diode model includes realistic junction capacitance and transit time to avoid convergence issues."],"measurements":[{"name":"Vripple_pp","key":"Vripple_pp","index":0,"value":0.05700939199700983,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#1 TRAN"},{"name":"Vout_avg","key":"Vout_avg","index":0,"value":8.329304555771708,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:01404_2a1052ec6323a0cd:1becee42db695349","source":"deepseek","example_id":"01404_2a1052ec6323a0cd","test_name":"test_test_1404_jfet_cascode_amplifier_2a1052ec6323a0cd","netlist_hash":"1becee42db695349","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"JFET cascode amplifier with AC analysis","pair_ids":["d335653ac06e3db9","383960937e3d0c22","489261379fffa9b7"],"prompts":["JFET cascode amplifier with AC analysis","Measures gain and phase at 1 kHz","Phase measured in radians due to SpiceSharp output"],"measurements":[{"name":"gain_db","key":"gain_db","index":0,"value":23.70877840952788,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"phase","key":"phase","index":0,"value":-3.137039233893637,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"}]} +{"id":"deepseek:00676_38e38e6be5f749a7:018d839b204febb2","source":"deepseek","example_id":"00676_38e38e6be5f749a7","test_name":"test_test_676_t_section_lc_impedance_matching_network_38e38e6be5f749a7","netlist_hash":"018d839b204febb2","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"T-section LC impedance matching network converting 50 Ohm source to 100 Ohm load at 100 MHz.","pair_ids":["8c091e0d0439f061","0de602e319b52d17","0e92e4e39e20c668"],"prompts":["T-section LC impedance matching network converting 50 Ohm source to 100 Ohm load at 100 MHz.","Uses two series inductors and one shunt capacitor.","The network is designed for maximum power transfer, yielding output voltage ~0.707 V at resonance."],"measurements":[{"name":"vout_mag","key":"vout_mag","index":0,"value":0.7071067811776688,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"vout_max","key":"vout_max","index":0,"value":0.7071067811776688,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 AC"},{"name":"vin_mag","key":"vin_mag","index":0,"value":0.4999979541417505,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:00718_be8372ab601af21d:97384f9e987fe4b9","source":"deepseek","example_id":"00718_be8372ab601af21d","test_name":"test_test_718_precision_halfwave_rectifier_be8372ab601af21d","netlist_hash":"97384f9e987fe4b9","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Create a precision half-wave rectifier using an ideal op-amp modeled as a voltage-controlled voltage source with gain 100k and a diode. The input is a 1 kHz sine wave with 1 V amplitude. Measure output voltage at positive and negative peaks and compute the average.","pair_ids":["ff00a46ead0494a2","edb0935a18e1aff0","91f7c06a6be740c9"],"prompts":["Create a precision half-wave rectifier using an ideal op-amp modeled as a voltage-controlled voltage source with gain 100k and a diode. The input is a 1 kHz sine wave with 1 V amplitude. Measure output voltage at positive and negative peaks and compute the average.","Design a behavioral op-amp based half-wave rectifier that passes the positive half-cycle accurately and blocks the negative half-cycle. Use a SIN source and include transient analysis with .MEAS statements to characterize rectification performance.","Build a SPICE netlist for a precision signal rectifier using an E-element op-amp and a single diode. Evaluate its time-domain response and verify that the output matches the input for positive excursions and is clamped near zero for negative ones."],"measurements":[{"name":"vout_avg","key":"vout_avg","index":0,"value":0.3083449266246598,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 TRAN"},{"name":"vout_neg_at_1p75ms","key":"vout_neg_at_1p75ms","index":0,"value":-9.509725421173937e-05,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"vout_pos_at_1p25ms","key":"vout_pos_at_1p25ms","index":0,"value":0.9510522023642322,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:02026_c20f8f2f70e494ed:e07d683c07f2620a","source":"deepseek","example_id":"02026_c20f8f2f70e494ed","test_name":"test_test_2026_low_side_current_sense_amplifier_c20f8f2f70e494ed","netlist_hash":"e07d683c07f2620a","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Shunt resistor drops 0.1 V per amp of load current.","pair_ids":["e739c468211b3029","c93661668e5a06ed","585fa199a32bcd1d"],"prompts":["Shunt resistor drops 0.1 V per amp of load current.","Op-amp in non-inverting configuration with gain 5 amplifies the shunt voltage.","Output is 0.5 V per amp, linear from 0 to 10 A load."],"measurements":[{"name":"ZERO_OFFSET","key":"ZERO_OFFSET","index":0,"value":0,"value_is_finite":true,"success":true,"measurement_type":"FIND_WHEN","simulation_name":"#2 DC"},{"name":"VOUT_8A","key":"VOUT_8A","index":0,"value":3.999800010002218,"value_is_finite":true,"success":true,"measurement_type":"FIND_WHEN","simulation_name":"#2 DC"},{"name":"VOUT_2A","key":"VOUT_2A","index":0,"value":0.9999500025005545,"value_is_finite":true,"success":true,"measurement_type":"FIND_WHEN","simulation_name":"#2 DC"},{"name":"GAIN_CALC","key":"GAIN_CALC","index":0,"value":4.999750012502772,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#2 DC"}]} +{"id":"deepseek:01035_59ebb17465d70c85:6849c632a30a4037","source":"deepseek","example_id":"01035_59ebb17465d70c85","test_name":"test_test_1035_bjt_zener_current_source_59ebb17465d70c85","netlist_hash":"6849c632a30a4037","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"A constant current source built around an NPN transistor Q1 and a 5.6 V Zener diode D1.","pair_ids":["5f3158c1688dca96","3b68e6459d496f24","769480e3384cd834","94ab667faf8f17bf"],"prompts":["A constant current source built around an NPN transistor Q1 and a 5.6 V Zener diode D1.","The Zener diode, with cathode connected to node ZK and anode to ground, is reverse-biased and breaks down at 5.6 V when VCC is high enough.","RBIAS supplies the Zener bias current from VCC. RE sets the emitter current to approximately (5.6 V \u2013 Vbe) / 500 \u03a9 \u2248 9.8 mA.","RLOAD and the zero\u2011volt source VMEAS allow DC measurement of the collector current without disturbing the circuit."],"measurements":[{"name":"IC_12V","key":"IC_12V","index":0,"value":0.009827582048320798,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 DC"}]} +{"id":"deepseek:00128_14f2d1443f791754:8d022c0ef5db9200","source":"deepseek","example_id":"00128_14f2d1443f791754","test_name":"test_test_128_zener_regulator_14f2d1443f791754","netlist_hash":"8d022c0ef5db9200","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Zener diode voltage regulator with a 1k\u03a9 series resistor and a 5.6V Zener diode (anode to ground, cathode to output).","pair_ids":["5323b2d21f7c20d1","a230dd5432603bf7","40fabbf0300a0e7d"],"prompts":["Zener diode voltage regulator with a 1k\u03a9 series resistor and a 5.6V Zener diode (anode to ground, cathode to output).","DC input voltage is swept from 0V to 15V to observe regulation.","Output voltage is measured at input voltages of 10V and 12V to verify clamping near Zener breakdown voltage."],"measurements":[{"name":"VOUT2","key":"VOUT2","index":0,"value":5.679292728129965,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"VOUT1","key":"VOUT1","index":0,"value":5.659669004130843,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"}]} +{"id":"deepseek:00001_c76fa19d1422dad1:805b6927bf00bb0f","source":"deepseek","example_id":"00001_c76fa19d1422dad1","test_name":"test_test_1_resistive_attenuator_pad_pi_c76fa19d1422dad1","netlist_hash":"805b6927bf00bb0f","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Pi resistive attenuator pad with 10 dB nominal attenuation.","pair_ids":["48e17a715b84bc38","869ac009b65b0001","0caaeb7d30854af0"],"prompts":["Pi resistive attenuator pad with 10 dB nominal attenuation.","Designed for 50-ohm characteristic impedance.","Uses standard pi topology with two shunt resistors and one series resistor."],"measurements":[{"name":"att_db","key":"att_db","index":0,"value":-16.020404992158575,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"vout_dc","key":"vout_dc","index":0,"value":0.15811743130138964,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"}]} +{"id":"deepseek:00261_1250f71f805a379c:2c8a927a67d1a38c","source":"deepseek","example_id":"00261_1250f71f805a379c","test_name":"test_test_261_nmos_source_follower_1250f71f805a379c","netlist_hash":"2c8a927a67d1a38c","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"NMOS source follower with DC-biased input and resistive load.","pair_ids":["431268eb54ea7821","6550ec9626a12267","b75669248a0a0f53","596c4a25a1fd7839"],"prompts":["NMOS source follower with DC-biased input and resistive load.","DC operating point analysis to find output voltage.","AC analysis to determine small-signal voltage gain.","Model includes body effect (GAMMA=0.5) to illustrate bulk effect."],"measurements":[{"name":"Vout","key":"Vout","index":0,"value":1.5060659236820486,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 OP"},{"name":"gain","key":"gain","index":0,"value":0.8024345587222768,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"}]} +{"id":"deepseek:00604_c87663dd5e972cd7:09b263f4918c1817","source":"deepseek","example_id":"00604_c87663dd5e972cd7","test_name":"test_test_604_constant_k_lp_filter_c87663dd5e972cd7","netlist_hash":"09b263f4918c1817","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":1,"representative_prompt":"Constant-k low-pass T-section filter with 50 ohm characteristic impedance and 100 MHz nominal cutoff, terminated with matched resistors.","pair_ids":["58e6271a1b6c97d0"],"prompts":["Constant-k low-pass T-section filter with 50 ohm characteristic impedance and 100 MHz nominal cutoff, terminated with matched resistors."],"measurements":[{"name":"max_gain","key":"max_gain","index":0,"value":-6.020599913279625,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"att_2fc","key":"att_2fc","index":0,"value":-24.149077644917504,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"fcutoff","key":"fcutoff","index":0,"value":99757339.28243823,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 AC"}]} +{"id":"deepseek:02212_c9fd6cbc158d9185:cfa0ace29cf3e7eb","source":"deepseek","example_id":"02212_c9fd6cbc158d9185","test_name":"test_test_2212_single_slope_adc_comparator_c9fd6cbc158d9185","netlist_hash":"cfa0ace29cf3e7eb","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Single-slope ADC front-end: linear ramp (0\u21923V in 3\u00b5s) generated by a PWL source.","pair_ids":["a64ff27ce6ec1e4c","36a1a73bba271b2e","2b8ffdc32a4b95cb"],"prompts":["Single-slope ADC front-end: linear ramp (0\u21923V in 3\u00b5s) generated by a PWL source.","High-gain E-source compares ramp to fixed 1.5V input; output crosses zero at ramp = input.","Measurement captures exact crossing time for ADC timing characterization."],"measurements":[{"name":"t_cross","key":"t_cross","index":0,"value":1.4999999999999998e-06,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:01444_7369308ecdaf5c7e:6cfd0dd9ef891de3","source":"deepseek","example_id":"01444_7369308ecdaf5c7e","test_name":"test_test_1444_non_inverting_opamp_bias_resistor_7369308ecdaf5c7e","netlist_hash":"6cfd0dd9ef891de3","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Non-inverting amplifier using ideal op-amp (E source with gain 100k)","pair_ids":["f6c6ee9e50951248","a76f960f11fcb5c8","49ed33e736fe117d"],"prompts":["Non-inverting amplifier using ideal op-amp (E source with gain 100k)","Gain set to 3 by feedback resistors R1=10k\u03a9 and Rf=20k\u03a9","Input bias resistor Rb=10k\u03a9 from non-inverting input to ground ensures stable input impedance"],"measurements":[{"name":"DC_VOUT","key":"DC_VOUT","index":0,"value":0.299991000269074,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"AC_GAIN","key":"AC_GAIN","index":0,"value":2.99991000269074,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:02441_accead88a5d1d02c:accead88a5d1d02c","source":"deepseek","example_id":"02441_accead88a5d1d02c","test_name":"test_test_2441_parameterized_bjt_current_mirror_subcircuit_accead88a5d1d02c","netlist_hash":"accead88a5d1d02c","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Create a SPICE netlist for a basic BJT current mirror with a reference current set by a 10k resistor and a 1k load resistor. Sweep the supply voltage from 0 to 10V and measure the reference and output currents at 10V.","pair_ids":["eab89b5a845c094b","ca51f7388a3e22d4","0d24048a45e1ce77","30cd157abcf66309"],"prompts":["Create a SPICE netlist for a basic BJT current mirror with a reference current set by a 10k resistor and a 1k load resistor. Sweep the supply voltage from 0 to 10V and measure the reference and output currents at 10V.","I need a parameterized current mirror using NPN transistors. Include a DC sweep of Vcc and measurements of Iref and Iout. Use model parameters BF=100 and IS=1e-14.","Generate a measured SPICE circuit for a BJT current mirror. The netlist should have a DC analysis sweeping Vcc and two .MEASURE statements for the currents in the reference and output branches.","Please produce a SPICE netlist for a current mirror with adjustable parameters (Vcc, Rref, Rload, BF, IS) and analysis to verify the mirror ratio."],"measurements":[{"name":"Iref","key":"Iref","index":0,"value":0.0009347158948264695,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 DC"},{"name":"Iout","key":"Iout","index":0,"value":0.00091638815733962,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 DC"}]} +{"id":"deepseek:01517_a42750502e4efd17:3c20b2e402aea7ea","source":"deepseek","example_id":"01517_a42750502e4efd17","test_name":"test_test_1517_v_i_converter_grounded_load_a42750502e4efd17","netlist_hash":"3c20b2e402aea7ea","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Voltage-controlled current source for a grounded load using two op\u2011amps modelled as high\u2011gain VCVS (E elements) and precision resistor ratios.","pair_ids":["275ff117bcc7aa29","33ac58037e402e0e","284f431aa44c1040"],"prompts":["Voltage-controlled current source for a grounded load using two op\u2011amps modelled as high\u2011gain VCVS (E elements) and precision resistor ratios.","The first op\u2011amp drives the load via a sense resistor; the second op\u2011amp forces a balanced bridge to make I(R_sense) = V_in / R_sense.","Increasing the bridge resistors to 1\u202fM\u03a9 minimises the error current drawn from the load node, achieving high accuracy."],"measurements":[{"name":"I_LOAD_1","key":"I_LOAD_1","index":0,"value":0.0010004590124166612,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"I_LOAD_05","key":"I_LOAD_05","index":0,"value":0.0005002295062083306,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"}]} +{"id":"deepseek:00007_821bb62af7562186:ab3426678897b9fa","source":"deepseek","example_id":"00007_821bb62af7562186","test_name":"test_test_7_resistive_attenuator_pi_821bb62af7562186","netlist_hash":"ab3426678897b9fa","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Simulate a pi resistive attenuator with 6 dB attenuation and 50 ohm impedance.","pair_ids":["ab2468651e0f7c90","07afb9b5999651fb","5a40448dafd1aa7a"],"prompts":["Simulate a pi resistive attenuator with 6 dB attenuation and 50 ohm impedance.","Create a pi pad attenuator circuit and run AC analysis to verify attenuation.","Design a resistive attenuator in pi configuration for 50 ohm system, measure the output voltage."],"measurements":[{"name":"attenuation","key":"attenuation","index":0,"value":-6.020599913279624,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#2 AC"},{"name":"vin_db","key":"vin_db","index":0,"value":0,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"vout_mag","key":"vout_mag","index":0,"value":0.5,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"vout_db","key":"vout_db","index":0,"value":-6.020599913279624,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"}]} +{"id":"deepseek:02066_fc0799fe2d36e0a3:c0a1af0ff5339da3","source":"deepseek","example_id":"02066_fc0799fe2d36e0a3","test_name":"test_test_2066_mosfet_rf_common_gate_fc0799fe2d36e0a3","netlist_hash":"c0a1af0ff5339da3","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"This is a common-gate MOSFET RF amplifier stage.","pair_ids":["466d4c74fcfbec19","f6cfa5eb8c565070","9b0a0a4fe2bf5739","29a029de89794dae"],"prompts":["This is a common-gate MOSFET RF amplifier stage.","The transistor M1 is biased with a DC gate voltage (VGATE=5V) and source resistor Rss=300\u03a9, setting ID\u224810mA, VGS\u22482V, VDS\u22482V.","The input is AC-coupled via Cin to the source; the output is taken from the drain through Ld and DC-blocking capacitor Cout.","An AC analysis from 1MHz to 1GHz measures the small-signal performance."],"measurements":[{"name":"gain_db","key":"gain_db","index":0,"value":0.19076250123068908,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"gain_mag","key":"gain_mag","index":0,"value":1.02220529217796,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"vgs","key":"vgs","index":0,"value":1.983439966149549,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 OP"},{"name":"phase","key":"phase","index":0,"value":0.007919508363008249,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"ids","key":"ids","index":0,"value":0.010055200112834837,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 OP"},{"name":"vds","key":"vds","index":0,"value":1.983439966149549,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 OP"}]} +{"id":"deepseek:00564_133aa227d508ad31:aa2ac1379a506d51","source":"deepseek","example_id":"00564_133aa227d508ad31","test_name":"test_test_564_third_order_lc_butterworth_lowpass_ladder_133aa227d508ad31","netlist_hash":"aa2ac1379a506d51","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Third-order Butterworth LC low-pass ladder filter with 50 Ohm source and load terminations.","pair_ids":["b3a7a2e581ef0615","ba54cb47a0bd9b95","035e97b1f65d844c","770cb78b363de6d8"],"prompts":["Third-order Butterworth LC low-pass ladder filter with 50 Ohm source and load terminations.","Component values: C1=C3=0.3183 uF, L2=1.5915 mH, delivering a 10 kHz cutoff.","AC analysis from 100 Hz to 100 kHz with 100 points per decade.","Measurements verify the passband gain, cutoff gain, and cutoff frequency."],"measurements":[{"name":"gain_10k","key":"gain_10k","index":0,"value":-9.03049522822598,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"gain_1k","key":"gain_1k","index":0,"value":-6.020604255413026,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"fcutoff","key":"fcutoff","index":0,"value":9976.032066665013,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 AC"},{"name":"gain_dc","key":"gain_dc","index":0,"value":-6.0205999132839665,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:00024_bc9f9f9f99cab555:f64709c93077754b","source":"deepseek","example_id":"00024_bc9f9f9f99cab555","test_name":"test_test_24_rc_step_response_from_pulse_source_bc9f9f9f99cab555","netlist_hash":"f64709c93077754b","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"An RC low-pass filter with R=1k\u03a9, C=1\u00b5F (\u03c4=1ms) is driven by a 0\u20131V pulse of 1ms width and 2ms period.","pair_ids":["7cc67154957e1ba8","18c6661b73ba8bb3","c47d4769ef7cf30c"],"prompts":["An RC low-pass filter with R=1k\u03a9, C=1\u00b5F (\u03c4=1ms) is driven by a 0\u20131V pulse of 1ms width and 2ms period.","The transient analysis runs for 5ms to capture the pulse response.","The rise time to 0.632V is measured, and the output voltage at the end of the pulse (1ms) is recorded as the achieved maximum voltage."],"measurements":[{"name":"t_rise","key":"t_rise","index":0,"value":0.0009996651004816918,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 TRAN"},{"name":"v_final","key":"v_final","index":0,"value":0.6321234004229981,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00996_3bd4c5b9ef171748:3bd4c5b9ef171748","source":"deepseek","example_id":"00996_3bd4c5b9ef171748","test_name":"test_test_996_bjt_diffpair_transfer_3bd4c5b9ef171748","netlist_hash":"3bd4c5b9ef171748","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Simulate the large-signal DC transfer of a basic BJT differential pair biased with a 1mA tail current. Sweep the input voltage from -0.2V to 0.2V and measure the differential output voltage.","pair_ids":["8e5f976339a63546","d4b68ea4db9e6125","7a8f0816b1bfaad3"],"prompts":["Simulate the large-signal DC transfer of a basic BJT differential pair biased with a 1mA tail current. Sweep the input voltage from -0.2V to 0.2V and measure the differential output voltage.","Design a differential amplifier using NPN transistors with a resistive load and ideal current source tail. Perform a DC sweep of one input while the other is grounded, and evaluate the output swing and small-signal gain.","Perform a DC transfer analysis on a BJT differential pair. The circuit uses a tail current source and collector resistors. Measure the differential output at zero input, at \u00b11mV, and the maximum and minimum output voltages. Compute the small-signal gain from the measured values."],"measurements":[{"name":"VOUT_MIN","key":"VOUT_MIN","index":0,"value":-5.441957376647127,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 DC"},{"name":"VOUT_MAX","key":"VOUT_MAX","index":0,"value":5.625907186808604,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 DC"},{"name":"VOUT_ZERO","key":"VOUT_ZERO","index":0,"value":-1.6729673202320328e-14,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 DC"},{"name":"VOUT_P1","key":"VOUT_P1","index":0,"value":-0.17407039268793498,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 DC"},{"name":"GAIN_ABS","key":"GAIN_ABS","index":0,"value":174.07056556899153,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 DC"},{"name":"VOUT_N1","key":"VOUT_N1","index":0,"value":0.17407073845004808,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 DC"}]} +{"id":"deepseek:01477_f0b8defa8a205861:d2b5d2f1deecb1b6","source":"deepseek","example_id":"01477_f0b8defa8a205861","test_name":"test_test_1477_two_op_amp_instrumentation_amplifier_f0b8defa8a205861","netlist_hash":"d2b5d2f1deecb1b6","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"Design a two-op-amp instrumentation amplifier with a differential gain of 21 using 10k feedback resistors and a 1k gain-setting resistor. Measure the differential output voltage gain and phase at 1 kHz.","pair_ids":["120a4d64ddf3d176","de096c4483dceee3","bdf0bd73a29d3c6d","b8e5dcbd6c1a3372","240c38fa88a16dd3"],"prompts":["Design a two-op-amp instrumentation amplifier with a differential gain of 21 using 10k feedback resistors and a 1k gain-setting resistor. Measure the differential output voltage gain and phase at 1 kHz.","Create a SPICE netlist for a classical two-op-amp instrumentation amplifier. Use 10k\u03a9 resistors for feedback and a 1k\u03a9 resistor for Rg. Apply differential AC inputs of \u00b10.5V and run an AC analysis to determine the differential gain at 1 kHz.","I need an instrumentation amplifier with two op-amps and a gain of 21. Use E sources for ideal op-amps, set R1=R2=10k, Rg=1k. Simulate with .AC and .MEAS to find Vdiff magnitude and phase at 1 kHz.","Write a SPICE deck for a differential-input, differential-output instrumentation amplifier utilizing two op-amps. The amplifier should have a differential gain of 21. Perform an AC analysis from 1 Hz to 1 MHz and measure the differential output amplitude and phase at 1 kHz.","Construct a two-op-amp instrumentation amplifier schematic in SPICE. Use behavioral op-amps, resistors, and voltage sources. Set the gain to 21 (R1=R2=10k, Rg=1k). Simulate AC and verify the differential gain and phase shift at 1 kHz using .MEAS statements."],"measurements":[{"name":"gain_mag","key":"gain_mag","index":0,"value":20.995590925900615,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 ac"},{"name":"phase","key":"phase","index":0,"value":0,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 ac"}]} +{"id":"deepseek:02101_4f4d521b9124d1dc:1403b9a1e3557640","source":"deepseek","example_id":"02101_4f4d521b9124d1dc","test_name":"test_test_2101_am_modulator_using_multiplier_approximation_4f4d521b9124d1dc","netlist_hash":"1403b9a1e3557640","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"The circuit uses a voltage-controlled current source (Gmult) to multiply the carrier and modulating signals, approximating a four-quadrant multiplier.","pair_ids":["6e3fe9eb253c4687","44c6bc54e8342bd3","9253820eb665e8ba","de7da995d2dcbe1d"],"prompts":["The circuit uses a voltage-controlled current source (Gmult) to multiply the carrier and modulating signals, approximating a four-quadrant multiplier.","The output voltage across Rload is the product V(carr)*V(mod), producing an AM signal at 100 kHz with a modulation envelope determined by V(mod).","The modulating signal V(mod) has a DC offset of 2 V and an amplitude of 0.5 V, yielding a modulation index m = 0.5/2 = 0.25.","The modulation index is measured by computing (Vmax_mod - Vmin_mod)/(Vmax_mod + Vmin_mod) over one complete cycle of the modulating waveform (0.5 ms to 1.5 ms)."],"measurements":[{"name":"Vmax_mod","key":"Vmax_mod","index":0,"value":2.4999999922622305,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 tran"},{"name":"Vmin_mod","key":"Vmin_mod","index":0,"value":1.5000000077377698,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 tran"},{"name":"mod_index","key":"mod_index","index":0,"value":0.24999999613111518,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 tran"}]} +{"id":"deepseek:00262_ea74a2c369c52d8d:540cf63eeb0ea21c","source":"deepseek","example_id":"00262_ea74a2c369c52d8d","test_name":"test_test_262_nmos_source_follower_ea74a2c369c52d8d","netlist_hash":"540cf63eeb0ea21c","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Design an NMOS source follower buffer with a resistive load. Bias it with a 10V supply and 5V DC input. Measure the AC gain at 1kHz.","pair_ids":["4bb4ec31d19b38cc","f27edd46d49a679e","39f128040657c77d"],"prompts":["Design an NMOS source follower buffer with a resistive load. Bias it with a 10V supply and 5V DC input. Measure the AC gain at 1kHz.","Create a simple NMOS source follower using a single NMOS transistor and a load resistor. Include .OP and .AC analyses. Find the small-signal voltage gain at 1kHz.","Implement a voltage buffer with an NMOS common-drain amplifier. Use a 10k\u03a9 source resistor, 10V supply, and 5V gate bias. Report the low-frequency gain in dB."],"measurements":[{"name":"gain_at_1k","key":"gain_at_1k","index":0,"value":-1.0090400044671348,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"}]} +{"id":"deepseek:01430_b49ea8fc0173cfdd:af690e1a9c41f2bf","source":"deepseek","example_id":"01430_b49ea8fc0173cfdd","test_name":"test_test_1430_op_amp_voltage_follower_using_e_source_b49ea8fc0173cfdd","netlist_hash":"af690e1a9c41f2bf","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Voltage follower using a high-gain VCVS (E-source) with gain 100k.","pair_ids":["9bb23bc267489081","301cd6c5cd9e803d","efdc4b0514272786"],"prompts":["Voltage follower using a high-gain VCVS (E-source) with gain 100k.","DC sweep from -5V to 5V shows output tracking input.","AC analysis shows flat 0 dB gain up to 100 kHz."],"measurements":[{"name":"gain_dB_1k","key":"gain_dB_1k","index":0,"value":-8.685846208858971e-05,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"vout_at_2_5","key":"vout_at_2_5","index":0,"value":2.4999750002499974,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"}]} +{"id":"deepseek:01474_27a0ef59536e15ad:932b8d813ecb7786","source":"deepseek","example_id":"01474_27a0ef59536e15ad","test_name":"test_test_1474_two_opamp_ia_27a0ef59536e15ad","netlist_hash":"932b8d813ecb7786","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Two-op-amp instrumentation amplifier with differential gain of 3, using behavioral op-amps (100k open-loop gain).","pair_ids":["6474ba6e117da48c","4c6a9468da3dea0c","6f082f023665069a"],"prompts":["Two-op-amp instrumentation amplifier with differential gain of 3, using behavioral op-amps (100k open-loop gain).","First stage (E1) is a non-inverting amplifier with gain set by R1 and R2 to exactly 1.5; second stage (E2) is a non-inverting summing stage with gain set by R3 and R4 to exactly 2, achieving overall differential gain of 3.","Resistor values are chosen to exactly compensate for the finite op-amp gain, yielding ideal gain and common-mode rejection."],"measurements":[{"name":"gain_AC","key":"gain_AC","index":0,"value":2.9999999981955625,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"Vout_OP","key":"Vout_OP","index":0,"value":1.4999999995488906,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 OP"}]} +{"id":"deepseek:00151_0ae9f2881b7ffe0f:e24f0312074e9f38","source":"deepseek","example_id":"00151_0ae9f2881b7ffe0f","test_name":"test_test_151_greinacher_voltage_doubler_0ae9f2881b7ffe0f","netlist_hash":"e24f0312074e9f38","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Classic half\u2011wave Greinacher voltage doubler using two 100\u202f\u00b5F capacitors, two diodes (IS=1e\u201112, RS=1), and a 1\u202fk\u03a9 load.","pair_ids":["705e9e702471deeb","f7643f14df7b7124","996562b15597cb6b"],"prompts":["Classic half\u2011wave Greinacher voltage doubler using two 100\u202f\u00b5F capacitors, two diodes (IS=1e\u201112, RS=1), and a 1\u202fk\u03a9 load.","Input is a 1\u202fkHz, 5\u202fV peak sine wave. The circuit delivers a DC output near 2\u00d7Vpeak minus diode drops.","A 10\u202fms transient simulation (10\u202f\u00b5s max step) is run, with measurements taken after 5\u202fms to avoid start\u2011up transients."],"measurements":[{"name":"VoutAvg","key":"VoutAvg","index":0,"value":8.04599281473671,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 TRAN"},{"name":"VoutMax","key":"VoutMax","index":0,"value":8.13468334239488,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"},{"name":"Vripple","key":"Vripple","index":0,"value":0.05972289600721048,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#1 TRAN"},{"name":"VoutMin","key":"VoutMin","index":0,"value":7.775285048700973,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:02451_3718b2d758760bd8:f283c27d59c295e2","source":"deepseek","example_id":"02451_3718b2d758760bd8","test_name":"test_test_2451_capacitive_sensor_charge_amp_3718b2d758760bd8","netlist_hash":"f283c27d59c295e2","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Capacitive sensor modeled as 100 pF (Cs) coupling a voltage step to the inverting input of an ideal op\u2011amp with gain 100k.","pair_ids":["a2b62271308ece1a","39749c1f170034d3","bcd10ab0e11a90da"],"prompts":["Capacitive sensor modeled as 100 pF (Cs) coupling a voltage step to the inverting input of an ideal op\u2011amp with gain 100k.","Feedback network consists of 10 pF (Cf) and 1 G\u03a9 (Rf), giving a mid\u2011band closed\u2011loop gain of \u2013Cs/Cf = \u201310 (20 dB).","AC analysis from 1 Hz to 10 kHz measures the gain at 1 kHz, while a 1\u2011ms\u2011wide pulse starting at 1 ms tests the step response, expected to hold near \u201310 V due to the large Rf\u00b7Cf time constant (10 ms)."],"measurements":[{"name":"gain_db","key":"gain_db","index":0,"value":19.99794488314029,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"vout_step","key":"vout_step","index":0,"value":-9.949052114057652,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 TRAN"}]} +{"id":"deepseek:01374_59758746cdda6165:13f63bb3b0b81564","source":"deepseek","example_id":"01374_59758746cdda6165","test_name":"test_test_1374_cmos_59758746cdda6165","netlist_hash":"13f63bb3b0b81564","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"CMOS dynamic inverter with precharge (PMOS M1) and evaluate (NMOS M2) phases controlled by clock.","pair_ids":["24fbc1c0fd9c0ae5","4fb3f916531f6aa7","a4657f218e231ba1","8cf1064b20324601"],"prompts":["CMOS dynamic inverter with precharge (PMOS M1) and evaluate (NMOS M2) phases controlled by clock.","Includes a keeper transistor (M5) to maintain the precharged state when input is low during evaluation.","Uses an inverter (M3, M4) to drive the keeper gate from the dynamic node.","Simulates a 300ns transient with 100ps resolution to observe precharge at 80ns and evaluation at 30ns."],"measurements":[{"name":"tfall","key":"tfall","index":0,"value":4.909415889717341e-10,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 TRAN"},{"name":"vout_eval","key":"vout_eval","index":0,"value":6.550913365406931e-07,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"vout_pre","key":"vout_pre","index":0,"value":3.3000068420441857,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00481_a565bb1c44bacf0d:4eea5576055bd293","source":"deepseek","example_id":"00481_a565bb1c44bacf0d","test_name":"test_test_481_rc_snubber_switching_load_a565bb1c44bacf0d","netlist_hash":"4eea5576055bd293","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":2,"representative_prompt":"RC snubber across switching inductive load","pair_ids":["32a68d66f2018da2","bcab764b8bc855ea"],"prompts":["RC snubber across switching inductive load","The snubber limits peak switch voltage during turn-off"],"measurements":[{"name":"vpk","key":"vpk","index":0,"value":0,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00624_9ba035ba32c71c51:4f6d10ec4a6bac95","source":"deepseek","example_id":"00624_9ba035ba32c71c51","test_name":"test_test_624_ceramic_resonator_ac_9ba035ba32c71c51","netlist_hash":"4f6d10ec4a6bac95","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Ceramic resonator equivalent circuit: series RLC motional arm (L1, C1, Rloss) with parallel static capacitance C0.","pair_ids":["482fccaee3d7b282","4bfe6a00fba15532","79c7c3022929bec3"],"prompts":["Ceramic resonator equivalent circuit: series RLC motional arm (L1, C1, Rloss) with parallel static capacitance C0.","AC analysis from 100 kHz to 2 MHz sweeps logarithmic with 1000 points per decade.","V(1) is the voltage across the resonator; deep notch at series resonance, peak near 0 dB at parallel resonance."],"measurements":[{"name":"min_vdb","key":"min_vdb","index":0,"value":-40.32239823925166,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 AC"},{"name":"vdb_fs","key":"vdb_fs","index":0,"value":-40.32239823925166,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 AC"},{"name":"vdb_fp","key":"vdb_fp","index":0,"value":-1.4419056491415494e-05,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 AC"},{"name":"max_vdb","key":"max_vdb","index":0,"value":-1.4419056491415494e-05,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 AC"}]} +{"id":"deepseek:00307_8603a2168fb2ae7f:691ec04eae1a409f","source":"deepseek","example_id":"00307_8603a2168fb2ae7f","test_name":"test_test_307_inverting_opamp_e_source_8603a2168fb2ae7f","netlist_hash":"691ec04eae1a409f","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Inverting amplifier implemented with a behavioral E-source having open-loop gain = 100k.","pair_ids":["232081f09d5c6446","20aba5ed44f67728","3cec719ba41b23be"],"prompts":["Inverting amplifier implemented with a behavioral E-source having open-loop gain = 100k.","R1 = 1k\u03a9 input resistor, R2 = 10k\u03a9 feedback resistor set closed-loop gain to -10.","AC analysis from 1 Hz to 1 MHz verifies flat magnitude and phase inversion."],"measurements":[{"name":"gain_mag","key":"gain_mag","index":0,"value":10.00110012101331,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"gain_phase","key":"gain_phase","index":0,"value":3.141592653589793,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:00649_46914270cab9f951:5c6c66395c80b95d","source":"deepseek","example_id":"00649_46914270cab9f951","test_name":"test_test_649_passive_bessel_ladder_46914270cab9f951","netlist_hash":"5c6c66395c80b95d","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Fifth-order Bessel low-pass LC ladder filter with a 200 ohm load (singly terminated) and a 10 kHz cutoff.","pair_ids":["ca4465cd86b39298","ef6f3f299857258c","8dd6ea0353a42a3e","96d1ffc62e884763"],"prompts":["Fifth-order Bessel low-pass LC ladder filter with a 200 ohm load (singly terminated) and a 10 kHz cutoff.","The original doubly-terminated design caused a -6 dB passband loss, so the source resistance was removed to achieve 0 dB passband.","The filter uses series inductors L1, L3, L5 and shunt capacitors C2, C4 in a ladder topology, providing maximally flat group delay.","Before .END, .MEASURE statements capture the output voltage in dB at 1 kHz, 10 kHz, and 100 kHz."],"measurements":[{"name":"vdb_100k","key":"vdb_100k","index":0,"value":-95.19724336293808,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"vdb_10k","key":"vdb_10k","index":0,"value":-2.373830051605887,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"vdb_1k","key":"vdb_1k","index":0,"value":-0.09186257836878549,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:01451_8f4795df6160eb4f:9d6bf17656d316b5","source":"deepseek","example_id":"01451_8f4795df6160eb4f","test_name":"test_test_1451_opamp_summing_amplifier_weighted_8f4795df6160eb4f","netlist_hash":"9d6bf17656d316b5","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Three-input inverting summing amplifier with weighted resistors.","pair_ids":["83bc3e23fb89f02e","0b8b108a79aa7293","29f761272ed25a81","8da8ed3756eb6fc6"],"prompts":["Three-input inverting summing amplifier with weighted resistors.","Inputs: V1=1V (gain -4), V2=2V (gain -2), V3=4V (gain -1) via 1k, 2k, 4k resistors to virtual ground.","Feedback resistor Rf=4k, ideal op\u2011amp modeled by E1 with open\u2011loop gain 100k.","DC output equals -12V; AC output at 1kHz is also -12V amplitude."],"measurements":[{"name":"VOUT_AC","key":"VOUT_AC","index":0,"value":-12.000960076806145,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"VOUT_DC","key":"VOUT_DC","index":0,"value":-12.000960076806143,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"}]} +{"id":"deepseek:02100_c051ab3c0d770b2b:c75fb27a6db0116d","source":"deepseek","example_id":"02100_c051ab3c0d770b2b","test_name":"test_test_2100_am_modulator_using_multiplier_approximation_c051ab3c0d770b2b","netlist_hash":"c75fb27a6db0116d","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"AM modulator using multiplier approximation with a G-source","pair_ids":["ec33941dcba4ff68","5ca4316f0924593c","202e444ae1a59833"],"prompts":["AM modulator using multiplier approximation with a G-source","100 kHz carrier, 1 kHz modulating signal with 0.5 amplitude and 1 V offset","Modulation index directly from modulating signal for accurate measurement"],"measurements":[{"name":"vmin","key":"vmin","index":0,"value":0.5000010977441018,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 TRAN"},{"name":"vmax","key":"vmax","index":0,"value":1.4999998012519546,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"},{"name":"mod_index","key":"mod_index","index":0,"value":0.49999912700530474,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:01180_b6e31f3679ec932c:5c521ad9fd32d343","source":"deepseek","example_id":"01180_b6e31f3679ec932c","test_name":"test_test_1180_bjt_emitter_coupled_logic_differential_switch_b6e31f3679ec932c","netlist_hash":"5c521ad9fd32d343","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Design an emitter-coupled logic (ECL) differential switch using BJTs. Apply a PULSE input and a DC reference voltage. Run DC operating point and transient analysis. Measure output voltages to verify differential switching behavior.","pair_ids":["8c0f23cb22a1de70","26bbee769f8cd2ff","98639304713f02b4","8a9e74412e02b0b5"],"prompts":["Design an emitter-coupled logic (ECL) differential switch using BJTs. Apply a PULSE input and a DC reference voltage. Run DC operating point and transient analysis. Measure output voltages to verify differential switching behavior.","Create a SPICE netlist for a BJT differential pair configured as an ECL gate. Include a current source tail, collector resistors, and a reference voltage. Use a PULSE source for the input. Simulate transient response and measure the high and low output levels to confirm logic functionality.","Build a bipolar differential switch with emitter-coupled logic. Use NPN transistors, a tail current source, and a PULSE input swinging around a DC reference. Run .OP and .TRAN analyses, and add .MEASURE statements to verify that the outputs are complementary and switch correctly.","Develop a differential pair ECL circuit with BJTs. Include a current source biasing, collector resistors, and a reference voltage. Apply a pulse input and measure the output voltages at each collector to ensure proper switching thresholds."],"measurements":[{"name":"vout2_h","key":"vout2_h","index":0,"value":4.999999984803477,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#2 TRAN"},{"name":"vout1_h","key":"vout1_h","index":0,"value":4.009900995689454,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#2 TRAN"},{"name":"vout2_l","key":"vout2_l","index":0,"value":4.009900995679545,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#2 TRAN"},{"name":"vout1_l","key":"vout1_l","index":0,"value":4.999999983803476,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#2 TRAN"}]} +{"id":"deepseek:01265_3daec43da00e08ca:0abd91c362f49548","source":"deepseek","example_id":"01265_3daec43da00e08ca","test_name":"test_test_1265_cmos_diff_pair_current_mirror_load_3daec43da00e08ca","netlist_hash":"0abd91c362f49548","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"CMOS differential pair with NMOS input transistors and PMOS current-mirror active load.","pair_ids":["d10d864392591912","0053d5684417b76f","dabff0269cb2245e","61d32b6e5989acff","447f1b47453d75e5"],"prompts":["CMOS differential pair with NMOS input transistors and PMOS current-mirror active load.","Biased with a 200 \u00b5A tail current source (IBIAS) and 5 V supply.","Common-mode input voltage set to 2.5 V, differential AC input 0.5 V peak per side.","DC transfer characteristic sweeps Vin2 around 2.5 V to extract differential gain.","AC analysis covers 1 Hz to 1 MHz to verify bandwidth and gain flatness."],"measurements":[{"name":"vd1_bias","key":"vd1_bias","index":0,"value":4.200789755452394,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#3 DC"},{"name":"ac_gain","key":"ac_gain","index":0,"value":528.8329620855499,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#2 AC"},{"name":"ac_gain_1k","key":"ac_gain_1k","index":0,"value":528.8329620855499,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"gain_dc","key":"gain_dc","index":0,"value":-528.8327665426223,"value_is_finite":true,"success":true,"measurement_type":"DERIV","simulation_name":"#3 DC"},{"name":"vout_bias","key":"vout_bias","index":0,"value":4.200789755456299,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#3 DC"}]} +{"id":"deepseek:02027_c6fdb9bee311565b:00bac2ad515e41ed","source":"deepseek","example_id":"02027_c6fdb9bee311565b","test_name":"test_test_2027_low_side_current_sense_amplifier_c6fdb9bee311565b","netlist_hash":"00bac2ad515e41ed","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Low-side current-sense amplifier using 0.1\u03a9 shunt resistor, op-amp modeled as voltage-controlled voltage source with gain 100k, and non-inverting feedback network Rf=99k\u03a9, R1=1k\u03a9 for a closed-loop gain of approximately 100.","pair_ids":["a5da522ce006be8b","048efc99b90d93c9","ba78fb73c36c295a"],"prompts":["Low-side current-sense amplifier using 0.1\u03a9 shunt resistor, op-amp modeled as voltage-controlled voltage source with gain 100k, and non-inverting feedback network Rf=99k\u03a9, R1=1k\u03a9 for a closed-loop gain of approximately 100.","DC analysis sweeps load current ILOAD from 0 to 100mA, measuring output voltage and computing transimpedance gain.","The circuit converts current through the shunt into a proportional voltage: Vout = 100 * (ILOAD * 0.1) = 10 * ILOAD."],"measurements":[{"name":"measured_gain","key":"measured_gain","index":0,"value":9.990009990019635,"value_is_finite":true,"success":true,"measurement_type":"DERIV","simulation_name":"#2 DC"},{"name":"vout_at_100m","key":"vout_at_100m","index":0,"value":0.9990009990008275,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"vout_at_0","key":"vout_at_0","index":0,"value":0,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"}]} +{"id":"deepseek:02269_4e41bc75cc28e675:15b6e8ad3fe9f988","source":"deepseek","example_id":"02269_4e41bc75cc28e675","test_name":"test_test_2269_switched_cap_resistor_4e41bc75cc28e675","netlist_hash":"15b6e8ad3fe9f988","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Switched-capacitor equivalent resistor using two non-overlapping clocks.","pair_ids":["efca65863abd1fe8","bc31fc3a0badd26c","66ef359e45bf611a","40484e62abbd695b"],"prompts":["Switched-capacitor equivalent resistor using two non-overlapping clocks.","Clock frequency 10kHz, switching capacitor 1nF, load resistor 100k\u03a9.","Equivalent resistance R_eq = 1/(f*C) = 100k\u03a9, so Vout \u2248 Vin * (Rload/(Req+Rload)) \u2248 0.5V.","Average input current magnitude \u2248 (Vin-Vout)/Req \u2248 5\u00b5A."],"measurements":[{"name":"VOUT_AVG","key":"VOUT_AVG","index":0,"value":0.49717131439254586,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 TRAN"},{"name":"IVIN_AVG","key":"IVIN_AVG","index":0,"value":-4.971715054274165e-06,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:02461_48a85bc8819479eb:095d1d3b94ae067c","source":"deepseek","example_id":"02461_48a85bc8819479eb","test_name":"test_test_2461_dtl_nand_gate_48a85bc8819479eb","netlist_hash":"095d1d3b94ae067c","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Two-input diode-transistor logic NAND gate using dual diodes and an NPN BJT.","pair_ids":["809f86d958496def","c6d83de7aaf5232a","7c9e5f77729fe053"],"prompts":["Two-input diode-transistor logic NAND gate using dual diodes and an NPN BJT.","Single input DC sweep while the other input is high, showing sharp transition.","Transient simulation with one pulsed input to verify timing and levels."],"measurements":[{"name":"VHIGH_TRAN","key":"VHIGH_TRAN","index":0,"value":4.99999984822486,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"VLOW_TRAN","key":"VLOW_TRAN","index":0,"value":0.05019531988750959,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"VOUT_HIGH","key":"VOUT_HIGH","index":0,"value":4.99999984822486,"value_is_finite":true,"success":true,"measurement_type":"FIND_WHEN","simulation_name":"#2 DC"},{"name":"VTH","key":"VTH","index":0,"value":1.546776981829108,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#2 DC"},{"name":"VOUT_LOW","key":"VOUT_LOW","index":0,"value":0.05019531988750936,"value_is_finite":true,"success":true,"measurement_type":"FIND_WHEN","simulation_name":"#2 DC"}]} +{"id":"deepseek:00401_50b575af383c1b03:57e3da4f90f829d7","source":"deepseek","example_id":"00401_50b575af383c1b03","test_name":"test_test_401_instrumentation_amplifier_50b575af383c1b03","netlist_hash":"57e3da4f90f829d7","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Three op-amp instrumentation amplifier using behavioral op-amps with 100k voltage gain.","pair_ids":["03ca17f1af816905","5015578c425e2f8a","9ea8dd52dcd3ca97","46cb88e6307dd451"],"prompts":["Three op-amp instrumentation amplifier using behavioral op-amps with 100k voltage gain.","Input stage consists of two op-amps (E1, E2) with 10k feedback resistors (R1, R2) and a 1k gain resistor (Rgain) between their inverting inputs, setting the differential gain to 21.","Second stage is a difference amplifier (E3) with all 10k resistors (R3\u2013R6), providing unity gain and converting the differential signal to a single-ended output referenced to ground.","The common-mode voltage is 2.5 V, and a 50 mV differential input is applied via VDIFF between in+ and cm."],"measurements":[{"name":"GAIN_DB","key":"GAIN_DB","index":0,"value":26.442388333343963,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"VOUT_DC","key":"VOUT_DC","index":0,"value":1.0497585511184298,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#3 DC"}]} +{"id":"deepseek:00833_0dd7656cc69ae221:9c425417e3a6fe4a","source":"deepseek","example_id":"00833_0dd7656cc69ae221","test_name":"test_test_833_antilog_converter_0dd7656cc69ae221","netlist_hash":"9c425417e3a6fe4a","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Create an antilog converter using an op-amp and a diode. Sweep input from 0 to 0.5V and measure output.","pair_ids":["1e05a2364986f1e4","1b0c9f249c49d2c3","3356ac421e7addc5"],"prompts":["Create an antilog converter using an op-amp and a diode. Sweep input from 0 to 0.5V and measure output.","Design an exponential amplifier with a diode in the input path, using a behavioral op-amp. Provide DC sweep analysis.","Generate a SPICE netlist for a diode exponential converter with DC analysis and measurements at two specific input voltages."],"measurements":[{"name":"Vout_at_0p5","key":"Vout_at_0p5","index":0,"value":-2.4610617790570113,"value_is_finite":true,"success":true,"measurement_type":"FIND_WHEN","simulation_name":"#2 DC"},{"name":"Vout_at_0p3","key":"Vout_at_0p3","index":0,"value":-0.0010899194799985012,"value_is_finite":true,"success":true,"measurement_type":"FIND_WHEN","simulation_name":"#2 DC"}]} +{"id":"deepseek:00572_0f92f60d9dede349:8bbc7ee5353162a2","source":"deepseek","example_id":"00572_0f92f60d9dede349","test_name":"test_test_572_fifth_order_butterworth_lowpass_ladder_0f92f60d9dede349","netlist_hash":"8bbc7ee5353162a2","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Fifth-order Butterworth low-pass filter in an LC ladder topology with 50-ohm terminations.","pair_ids":["49bd0e67124e541d","ab77ca834cb763c5","4be5bc328dc2c8fa"],"prompts":["Fifth-order Butterworth low-pass filter in an LC ladder topology with 50-ohm terminations.","Designed for a 10 kHz cutoff frequency using normalized component values.","AC simulation sweeps from 100 Hz to 1 MHz with 100 points per decade."],"measurements":[{"name":"att100k","key":"att100k","index":0,"value":-106.01854118525243,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"gain1k","key":"gain1k","index":0,"value":-6.020599914416808,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"fcut3dB","key":"fcut3dB","index":0,"value":9985.642409220269,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 AC"}]} +{"id":"deepseek:02358_08a25befa9f0fd78:f2b8f0645e3d6164","source":"deepseek","example_id":"02358_08a25befa9f0fd78","test_name":"test_test_2358_lc_resonant_tank_ac_08a25befa9f0fd78","netlist_hash":"f2b8f0645e3d6164","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Series RLC resonant circuit with L=1mH, C=1uF, R=50\u03a9","pair_ids":["dacecece38e019da","db064d412be872be","21e6fa64e4a6b672"],"prompts":["Series RLC resonant circuit with L=1mH, C=1uF, R=50\u03a9","AC analysis from 100 Hz to 100 kHz with 100 points per decade","Uses VDB(2) to get voltage gain in dB directly"],"measurements":[{"name":"peak_gain_db","key":"peak_gain_db","index":0,"value":-0.0008578550827194547,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 AC"}]} +{"id":"deepseek:00141_2c158474212b1a6c:51aade49a4ca82ab","source":"deepseek","example_id":"00141_2c158474212b1a6c","test_name":"test_test_141_positive_diode_clamper_reference_2c158474212b1a6c","netlist_hash":"51aade49a4ca82ab","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"Input sinusoidal source VIN with 1V amplitude and 1kHz frequency zero offset.","pair_ids":["01930c87dda48e65","078e0021f3190a9e","f717ce02d853833f","b4eefdf4af757b30","3b8637408ea7006b"],"prompts":["Input sinusoidal source VIN with 1V amplitude and 1kHz frequency zero offset.","Coupling capacitor C1 of 1uF connecting input to node n1.","Load resistor RLOAD from n1 to ground (100k\u03a9).","Reference voltage source VREF of 3.3V DC with positive terminal at node vref and negative at ground.","Diode D1 (1N4148-like) with anode at vref and cathode at n1, clamping when V(n1) < V(vref) - Vf."],"measurements":[{"name":"vmin","key":"vmin","index":0,"value":2.6689356902874475,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 TRAN"},{"name":"vmax","key":"vmax","index":0,"value":4.6849664091688865,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"},{"name":"vpp","key":"vpp","index":0,"value":2.016030718881439,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00789_c81214aea8f6b95c:a58efb2899d9ac90","source":"deepseek","example_id":"00789_c81214aea8f6b95c","test_name":"test_test_789_bridge_diode_polarity_protector_c81214aea8f6b95c","netlist_hash":"a58efb2899d9ac90","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Bridge rectifier using four diodes D1-D4 with a 1k\u03a9 load.","pair_ids":["52a95475b9b08c5e","39f3e3846e7539b0","71b6503f788a5d8e","a8347297f6368a9b"],"prompts":["Bridge rectifier using four diodes D1-D4 with a 1k\u03a9 load.","Diode model includes 1\u03a9 series resistance and low saturation current.","Pulse source alternates between +10V and -10V every 4ms with sharp transitions.","Measurements average the differential output voltage V(out_p, out_n) over two steady-state intervals."],"measurements":[{"name":"vout_neg","key":"vout_neg","index":0,"value":8.797939050024473,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#2 TRAN"},{"name":"vout_pos","key":"vout_pos","index":0,"value":8.797939050024477,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#2 TRAN"}]} +{"id":"deepseek:00043_7fc4f0ecf8a48b08:7fc4f0ecf8a48b08","source":"deepseek","example_id":"00043_7fc4f0ecf8a48b08","test_name":"test_test_43_passive_rc_ladder_lowpass_7fc4f0ecf8a48b08","netlist_hash":"7fc4f0ecf8a48b08","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Design a two-stage passive RC low-pass filter with R=10kOhm and C=10nF. Run an AC analysis and measure the gain at 100Hz and 100kHz.","pair_ids":["731d5a101a96a751","06c26c5f15b267fb","e70533acb85011ba","f20bc7951be5f4e2"],"prompts":["Design a two-stage passive RC low-pass filter with R=10kOhm and C=10nF. Run an AC analysis and measure the gain at 100Hz and 100kHz.","Create a netlist for a second-order RC ladder lowpass filter using 10k resistors and 10nF capacitors, with AC sweep from 10Hz to 100kHz, and measure the output magnitude at 100Hz and 100kHz.","Implement a passive lowpass filter consisting of two cascaded RC sections with component values R=10k, C=10nF, excited by an AC source of 1V, and compute the voltage gain at a low frequency (100Hz) and a high frequency (100kHz).","Using 10kOhm resistors and 10nF capacitors, build a two-pole passive RC ladder low-pass filter and analyze its frequency response from 10Hz to 100kHz, then extract the magnitude at 100Hz and 100kHz."],"measurements":[{"name":"gain_low","key":"gain_low","index":0,"value":0.9692518806526654,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"gain_high","key":"gain_high","index":0,"value":-0.000252790552332534,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:01301_a89a27ad6598cdb1:0c0861ddc6b2e2c2","source":"deepseek","example_id":"01301_a89a27ad6598cdb1","test_name":"test_test_1301_wilson_mos_current_mirror_a89a27ad6598cdb1","netlist_hash":"0c0861ddc6b2e2c2","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Create a SPICE netlist for a Wilson current mirror using NMOS transistors, include a DC sweep of the supply voltage and measure the mirroring accuracy.","pair_ids":["94de1bdac47cc71a","9ecc15939fb845ba","34bf95b67e6bd0f1"],"prompts":["Create a SPICE netlist for a Wilson current mirror using NMOS transistors, include a DC sweep of the supply voltage and measure the mirroring accuracy.","Design a Wilson MOS current mirror and perform DC and operating point analyses to verify the output current tracks the reference under varying supply.","Simulate a Wilson current mirror with MOSFETs, sweep the supply voltage, and use .MEAS to extract the mirror ratio."],"measurements":[{"name":"iref","key":"iref","index":0,"value":0.000574375228891629,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"iout","key":"iout","index":0,"value":0.0005743752288916292,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"mirror_ratio","key":"mirror_ratio","index":0,"value":1.0000000000000004,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#2 DC"}]} +{"id":"deepseek:00634_5eb500d1350b342b:5645288459abb42c","source":"deepseek","example_id":"00634_5eb500d1350b342b","test_name":"test_test_634_rc_differentiator_5eb500d1350b342b","netlist_hash":"5645288459abb42c","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"RC differentiator that detects edges of a square wave.","pair_ids":["e8b3515ec618a7c9","0f86204ded2ad9e4","38f3154b00ee3bae"],"prompts":["RC differentiator that detects edges of a square wave.","Output spikes to +5V and -5V.","Time constant RC = 1k\u03a9 * 100pF = 100 ns, much smaller than pulse width 500 ns."],"measurements":[{"name":"neg_peak","key":"neg_peak","index":0,"value":-4.951934306030004,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 TRAN"},{"name":"pos_peak","key":"pos_peak","index":0,"value":4.975082026987382,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:01406_8be7de46c63f37f9:66aaadb9f9259937","source":"deepseek","example_id":"01406_8be7de46c63f37f9","test_name":"test_test_1406_jfet_cascode_amplifier_8be7de46c63f37f9","netlist_hash":"66aaadb9f9259937","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"JFET cascode amplifier using two N-channel JFETs in a cascode configuration to maximize bandwidth.","pair_ids":["1c70fc1e89abd567","2d544064e0f077aa","eff636df91ac66ac","1aa71deea21b4c3d"],"prompts":["JFET cascode amplifier using two N-channel JFETs in a cascode configuration to maximize bandwidth.","Biased with a source resistor R_S1 (bypassed by C_S1 for AC) and a voltage divider (R1, R2) for J2 gate.","The cascode topology reduces Miller effect, extending the high-frequency response into the hundreds of kHz.","Voltage gain set by approximately -gm1 * R_D, adjusted to 18 V/V (25 dB) with R_D = 9.1k."],"measurements":[{"name":"vout_10k","key":"vout_10k","index":0,"value":17.798059656728984,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"vout_100k","key":"vout_100k","index":0,"value":17.798061838562656,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"vout_1k","key":"vout_1k","index":0,"value":17.797841477494625,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"}]} +{"id":"deepseek:01346_b7a4a83ae1bc99ce:ac10d1325e60457e","source":"deepseek","example_id":"01346_b7a4a83ae1bc99ce","test_name":"test_test_1346_cmos_transmission_gate_analog_switch_b7a4a83ae1bc99ce","netlist_hash":"ac10d1325e60457e","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Design a CMOS transmission gate analog switch circuit for sample-and-hold. Use an NMOS and PMOS transistor pair controlled by complementary pulse voltages. Apply a 1kHz 1V sine wave input, and use a 1nF hold capacitor. Perform a transient analysis over 40\u00b5s and measure the output voltage just before the switch turns off and after it holds, to verify minimal hold droop.","pair_ids":["93fdeab8a4587d7b","6707bd69133eaaec","e0cca001c4521551"],"prompts":["Design a CMOS transmission gate analog switch circuit for sample-and-hold. Use an NMOS and PMOS transistor pair controlled by complementary pulse voltages. Apply a 1kHz 1V sine wave input, and use a 1nF hold capacitor. Perform a transient analysis over 40\u00b5s and measure the output voltage just before the switch turns off and after it holds, to verify minimal hold droop.","Create a sample-and-hold circuit using a CMOS transmission gate composed of NMOS and PMOS devices. The control signals are 5V amplitude pulses with 10\u00b5s on-time and 20\u00b5s period. Use a 1V peak sine wave input at 1kHz. Run a transient simulation and measure the output during the sample phase and after the switch opens, then verify that the held voltage matches the sampled voltage.","Simulate a CMOS switch-based sample-and-hold. Use transistor models with VTO=\u00b11V and KP=100-200\u00b5A/V\u00b2. The switch is driven by non-overlapping 5V pulses. Input is a 1kHz sine wave. Include a 1nF hold capacitor. Perform transient analysis and measure the output at the end of the sampling interval and 5\u00b5s later during the hold phase, asserting they are equal."],"measurements":[{"name":"vsample","key":"vsample","index":0,"value":0.055785756571810764,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"vhold","key":"vhold","index":0,"value":0.05579893327244574,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00453_fdf6f96e7a80965f:34c117a183fc8449","source":"deepseek","example_id":"00453_fdf6f96e7a80965f","test_name":"test_test_453_l_pad_attenuator_fdf6f96e7a80965f","netlist_hash":"34c117a183fc8449","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":2,"representative_prompt":"L-pad attenuator with 50-ohm source, 100-ohm series, 200-ohm shunt, and 50-ohm load.","pair_ids":["bfa0be9a038ac06f","7369ee2853995c23"],"prompts":["L-pad attenuator with 50-ohm source, 100-ohm series, 200-ohm shunt, and 50-ohm load.","DC analysis measures output voltage, AC analysis measures attenuation at 1 kHz."],"measurements":[{"name":"out_dc","key":"out_dc","index":0,"value":1.0526315789473686,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#3 DC"},{"name":"attn_db","key":"attn_db","index":0,"value":-13.533872192497329,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"}]} +{"id":"deepseek:01582_ca9507817fb9d1e1:fa0b794fbca2fcde","source":"deepseek","example_id":"01582_ca9507817fb9d1e1","test_name":"test_test_1582_opamp_sample_hold_switch_ca9507817fb9d1e1","netlist_hash":"fa0b794fbca2fcde","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"1 kHz sinusoidal input sampled by a voltage-controlled switch with a 0.9 ms pulse, capturing the waveform at -0.5878 V.","pair_ids":["ceedcf385c4975c8","f6420753bef633b2","280cd3738f1b5dea","fea3d5c16aa10146"],"prompts":["1 kHz sinusoidal input sampled by a voltage-controlled switch with a 0.9 ms pulse, capturing the waveform at -0.5878 V.","Hold capacitor (10 nF) with 10 M\u03a9 leakage resistor causes a predictable droop of approximately 12 mV over 2 ms.","Operational amplifier modeled as an E-source with gain 100k provides high-impedance buffering of the held voltage.","Sub\u20110.1% error achieved by measuring the held output just 50 \u00b5s after the sample phase ends."],"measurements":[{"name":"Verror","key":"Verror","index":0,"value":0.05120036212644633,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 TRAN"},{"name":"Vdroop","key":"Vdroop","index":0,"value":-0.011748985139429902,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 TRAN"},{"name":"Vheld","key":"Vheld","index":0,"value":-0.5875280158736792,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"Vsample","key":"Vsample","index":0,"value":-0.587828986443423,"value_is_finite":true,"success":true,"measurement_type":"FIND_WHEN","simulation_name":"#1 TRAN"},{"name":"Vhold_end","key":"Vhold_end","index":0,"value":-0.5757790307342493,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:02180_50612b0e8020b1c7:14db59749ee0a727","source":"deepseek","example_id":"02180_50612b0e8020b1c7","test_name":"test_test_2180_r_2r_ladder_dac_with_op_amp_buffer_50612b0e8020b1c7","netlist_hash":"14db59749ee0a727","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"4-bit R-2R DAC with an op-amp buffer, using ideal voltage sources to set binary inputs to VREF.","pair_ids":["3037e186c7e9db22","fce347e2a54d5a93","0d03d387484b252a"],"prompts":["4-bit R-2R DAC with an op-amp buffer, using ideal voltage sources to set binary inputs to VREF.","Full-scale output tested via DC sweep of reference voltage from 0 to 5 V.","R-2R ladder termination and resistor values ensure binary weighted output."],"measurements":[{"name":"vout_at2p5","key":"vout_at2p5","index":0,"value":2.3437265627343726,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"vout_full","key":"vout_full","index":0,"value":4.687453125468745,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"vout_at0","key":"vout_at0","index":0,"value":0,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"vout_at5","key":"vout_at5","index":0,"value":4.687453125468745,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"}]} +{"id":"deepseek:00874_701c5343c668ca5f:f8823e3042b5d440","source":"deepseek","example_id":"00874_701c5343c668ca5f","test_name":"test_test_874_diode_charge_pump_inverter_701c5343c668ca5f","netlist_hash":"f8823e3042b5d440","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Diode-based inverting charge pump using two diodes and two capacitors.","pair_ids":["f19d1274c02075e5","a278dcfb12b980c4","687e1a8e81878610"],"prompts":["Diode-based inverting charge pump using two diodes and two capacitors.","Converts a 0-5V pulse input into a negative DC output around -3.7V.","D1 and D2 are oriented to pump negative charge onto the output capacitor during the low phase of the input pulse."],"measurements":[{"name":"Vout_avg","key":"Vout_avg","index":0,"value":-3.2233169165123012,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 tran"}]} +{"id":"deepseek:00435_fef7156cfea9217b:3c6f137e15286605","source":"deepseek","example_id":"00435_fef7156cfea9217b","test_name":"test_test_435_loaded_bridge_sensor_fef7156cfea9217b","netlist_hash":"3c6f137e15286605","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Simulate a Wheatstone bridge strain gauge circuit with a differential output loaded by 1k\u03a9.","pair_ids":["3cd384aaf61dcfd6","b591bfd437c28706","c5bae89087f8a484"],"prompts":["Simulate a Wheatstone bridge strain gauge circuit with a differential output loaded by 1k\u03a9.","Create a SPICE netlist for a resistive bridge sensor with a slight imbalance and a load resistor.","Design a loaded bridge sensor circuit and perform DC analysis to find the output voltage."],"measurements":[{"name":"vout_at_2p5V","key":"vout_at_2p5V","index":0,"value":-0.0005678849692205556,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"vout_at_5V","key":"vout_at_5V","index":0,"value":-0.0011357699384411113,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"}]} +{"id":"deepseek:01419_43b99d292902225f:9bdfa16afdeb8b8e","source":"deepseek","example_id":"01419_43b99d292902225f","test_name":"test_test_1419_jfet_limiter_for_sine_wave_stabilization_43b99d292902225f","netlist_hash":"9bdfa16afdeb8b8e","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Wien bridge oscillator with JFET amplitude stabilization.","pair_ids":["b76dc3bf4402f830","59e00ee64e08b44a","74e97ddb333ec407","f8937321068259bb"],"prompts":["Wien bridge oscillator with JFET amplitude stabilization.","Uses op-amp (VCVS), positive feedback Wien network, negative feedback with JFET as voltage\u2011controlled resistor.","Peak detector (diode, capacitor, resistor) derives negative gate voltage from oscillator output, controlling JFET resistance.","Kickstart sine source injects small 1 kHz signal to initiate oscillation."],"measurements":[{"name":"Vmax","key":"Vmax","index":0,"value":1.6858306712165358,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"},{"name":"Vpp","key":"Vpp","index":0,"value":4.221130915779213,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 TRAN"},{"name":"Vgate_avg","key":"Vgate_avg","index":0,"value":-2.0349183557051567,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 TRAN"},{"name":"Vmin","key":"Vmin","index":0,"value":-2.535300244562677,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00753_324cd09be9687fbe:324cd09be9687fbe","source":"deepseek","example_id":"00753_324cd09be9687fbe","test_name":"test_test_753_biased_negative_diode_limiter_324cd09be9687fbe","netlist_hash":"324cd09be9687fbe","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Design a SPICE netlist for a negative diode limiter with a -2V bias voltage, using a 1kHz 10V amplitude sine input, a series resistor, and a load resistor. Run a transient analysis and measure the minimum and maximum output voltages.","pair_ids":["3c4f4a08fb9ff342","f389a56773a6657b","60feea80246b8e46"],"prompts":["Design a SPICE netlist for a negative diode limiter with a -2V bias voltage, using a 1kHz 10V amplitude sine input, a series resistor, and a load resistor. Run a transient analysis and measure the minimum and maximum output voltages.","Create a transient simulation of a biased diode clipper that clips the negative portion of a sine wave. The bias should be -2V, causing clipping around -2.7V. Use a 1N4148-like diode model.","Generate a SPICE netlist implementing a negative limiter using a diode, DC bias source, and sinusoidal input. The circuit should output a mostly unclipped positive half and a clipped negative half. Include .MEAS statements to capture extreme output values."],"measurements":[{"name":"vmin","key":"vmin","index":0,"value":-2.4159140965130264,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 TRAN"},{"name":"vmax","key":"vmax","index":0,"value":9.026693455922404,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:01411_40d8bbc954412e10:191894ea47f67740","source":"deepseek","example_id":"01411_40d8bbc954412e10","test_name":"test_test_1411_jfet_current_source_40d8bbc954412e10","netlist_hash":"191894ea47f67740","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"N-channel JFET constant current source with gate grounded and 1k\u03a9 source degeneration resistor.","pair_ids":["fe181d2b93484810","3d1d5a115c6c9eea","150fc80dbad095ec"],"prompts":["N-channel JFET constant current source with gate grounded and 1k\u03a9 source degeneration resistor.","DC sweep of drain voltage from 0 to 20 V verifies current constancy around 1 mA.","Measurements taken at V_D=5,10,15 V across the source resistor to avoid sign inversion."],"measurements":[{"name":"I15","key":"I15","index":0,"value":0.0010432112956666908,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"I5","key":"I5","index":0,"value":0.00101300297703833,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"I10","key":"I10","index":0,"value":0.0010284956392453393,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"}]} +{"id":"deepseek:02331_931c38df681e9362:3d7dbc48b67fd53e","source":"deepseek","example_id":"02331_931c38df681e9362","test_name":"test_test_2331_boost_converter_switching_open_loop_931c38df681e9362","netlist_hash":"3d7dbc48b67fd53e","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Open-loop boost converter uses a voltage-controlled switch driven by a 100kHz pulse with 65% duty cycle.","pair_ids":["34781d9e3e393dc2","89a61d93b12b31c0","afb805deaaffb086"],"prompts":["Open-loop boost converter uses a voltage-controlled switch driven by a 100kHz pulse with 65% duty cycle.","Input voltage is 5V, load resistor is 10\u03a9, inductor 100\u00b5H, output capacitor 100\u00b5F with 0.05\u03a9 ESR.","Controller turns switch on for 6.5\u00b5s each 10\u00b5s period, stepping voltage up to approximately 11.7V at the output."],"measurements":[{"name":"Eff","key":"Eff","index":0,"value":234.0618238483942,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 TRAN"},{"name":"Pin_avg","key":"Pin_avg","index":0,"value":5,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 TRAN"},{"name":"Pout_avg","key":"Pout_avg","index":0,"value":11.70309119241971,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 TRAN"},{"name":"Vout_ripple","key":"Vout_ripple","index":0,"value":0.23474638602537112,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#1 TRAN"},{"name":"Vout_avg","key":"Vout_avg","index":0,"value":11.70309119241971,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:01176_22972b90c809ed91:c9993e1ff099491a","source":"deepseek","example_id":"01176_22972b90c809ed91","test_name":"test_test_1176_bjt_emitter_coupled_diff_switch_22972b90c809ed91","netlist_hash":"c9993e1ff099491a","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"High-speed emitter-coupled logic gate using an NPN BJT differential pair.","pair_ids":["4dc727a3262d33f1","a995ff2601008634","43e3b1ba325e4ef4"],"prompts":["High-speed emitter-coupled logic gate using an NPN BJT differential pair.","Tail current sink IEE provides constant current, switched between Q1 and Q2 by input voltage relative to VREF.","Collector resistors RC1 and RC2 define output voltage swing between ~5\u202fV and ~2.8\u202fV."],"measurements":[{"name":"tpd_rise","key":"tpd_rise","index":0,"value":2.0017521954055187e-12,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#2 TRAN"},{"name":"vlow1","key":"vlow1","index":0,"value":2.8217821931565368,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#2 TRAN"},{"name":"vhigh2","key":"vhigh2","index":0,"value":4.999999966567649,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#2 TRAN"},{"name":"vlow2","key":"vlow2","index":0,"value":2.821782193178326,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#2 TRAN"},{"name":"vhigh1","key":"vhigh1","index":0,"value":4.999999968767649,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#2 TRAN"},{"name":"tpd_fall","key":"tpd_fall","index":0,"value":-2.0017521953989012e-12,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#2 TRAN"}]} +{"id":"deepseek:00566_cd333c530083b2ae:88170893d7582aaa","source":"deepseek","example_id":"00566_cd333c530083b2ae","test_name":"test_test_566_passive_filter_third_order_butterworth_lowpass_cd333c530083b2ae","netlist_hash":"88170893d7582aaa","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Simulate a 3rd order LC Butterworth lowpass filter with a cutoff frequency of 10 kHz and 50 \u03a9 terminations. Run an AC analysis and measure the -3 dB cutoff.","pair_ids":["65fb9490df17a1a0","8db72e714096ba61","e8db35e415fb2035"],"prompts":["Simulate a 3rd order LC Butterworth lowpass filter with a cutoff frequency of 10 kHz and 50 \u03a9 terminations. Run an AC analysis and measure the -3 dB cutoff.","Create a SPICE netlist for a passive third-order Butterworth low-pass ladder network. The filter should have a 10 kHz cutoff and use 50 ohm source and load resistors. Provide AC simulation and .MEASURE statements.","Design a lowpass filter with a Butterworth response, 3rd order, using LC components. The characteristic impedance is 50 \u03a9 and the cutoff frequency is 10 kHz. Perform AC analysis and extract the cutoff frequency and attenuation at 100 kHz."],"measurements":[{"name":"atten100k","key":"atten100k","index":0,"value":-65.99522384239097,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"fc","key":"fc","index":0,"value":9985.802984514132,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 AC"},{"name":"dc_gain","key":"dc_gain","index":0,"value":-6.0205999132839425,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:01429_e52a9e0c4223b465:05bb82b12ba4bd24","source":"deepseek","example_id":"01429_e52a9e0c4223b465","test_name":"test_test_1429_opamp_follower_easy_e52a9e0c4223b465","netlist_hash":"05bb82b12ba4bd24","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Simple op-amp voltage follower using a high-gain behavioral E-source.","pair_ids":["ce3281aff99a5c67","71e61d7b4f6548a7","e74b8db4009ee07d"],"prompts":["Simple op-amp voltage follower using a high-gain behavioral E-source.","E-source configured with output at node 'out' and input differential (in, out) with gain 100,000.","DC analysis checks operating point; AC analysis from 1 Hz to 1 MHz validates unity gain and minimal phase shift at 1 kHz."],"measurements":[{"name":"gain_mag","key":"gain_mag","index":0,"value":0.999990000099999,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"phase_deg","key":"phase_deg","index":0,"value":0,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"}]} +{"id":"deepseek:01365_c3b6b4233a18bbbb:c8dd011ca7af6595","source":"deepseek","example_id":"01365_c3b6b4233a18bbbb","test_name":"test_test_1365_cmos_transmission_gate_latch_c3b6b4233a18bbbb","netlist_hash":"c8dd011ca7af6595","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"CMOS transmission-gate latch designed to be non-inverting.","pair_ids":["1c33d448c08aff67","b7d386e7028e8898","e9bb4d86671cae06","a556e3a4924cc124"],"prompts":["CMOS transmission-gate latch designed to be non-inverting.","During CLK high, the transmission gate connects D to the input of a series of two inverters, making Q = D.","During CLK low, the feedback transmission gate closes, holding the previous value.","Fixed original cross-coupled inverter arrangement that caused contention and prevented correct latching."],"measurements":[{"name":"v_q_120n","key":"v_q_120n","index":0,"value":2.311837363760094e-06,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"tpd_dq","key":"tpd_dq","index":0,"value":1.9242875486391417e-11,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 TRAN"},{"name":"v_q_160n","key":"v_q_160n","index":0,"value":1.3360320710560836e-08,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"v_q_60n","key":"v_q_60n","index":0,"value":1.7999999947780572,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"v_q_90n","key":"v_q_90n","index":0,"value":1.7999999899793038,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:01208_8471917abcafff86:f3af31040bbb33b2","source":"deepseek","example_id":"01208_8471917abcafff86","test_name":"test_test_1208_pmos_common_source_resistive_8471917abcafff86","netlist_hash":"f3af31040bbb33b2","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"PMOS common-source amplifier with 2k\u03a9 resistive load.","pair_ids":["ce790fe3b2b55d13","7407b56f2cfee53d","9c31c54d517b27c9"],"prompts":["PMOS common-source amplifier with 2k\u03a9 resistive load.","Biased at VGS = -2.5 V with VDD = 5 V.","Small-signal gain negative with magnitude > 1, phase ~180\u00b0 (\u03c0 rad)."],"measurements":[{"name":"ac_phase","key":"ac_phase","index":0,"value":3.141592653589793,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"ac_gain","key":"ac_gain","index":0,"value":-3.0219088330095194,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"d_vd","key":"d_vd","index":0,"value":2.3684210576872324,"value_is_finite":true,"success":true,"measurement_type":"FIND_WHEN","simulation_name":"#3 DC"},{"name":"d_id","key":"d_id","index":0,"value":0.0011842105288436162,"value_is_finite":true,"success":true,"measurement_type":"FIND_WHEN","simulation_name":"#3 DC"},{"name":"ac_gain_db","key":"ac_gain_db","index":0,"value":9.605627162216779,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"}]} +{"id":"deepseek:01358_49c44ea152940fc5:cbeb4e28d5e42fe3","source":"deepseek","example_id":"01358_49c44ea152940fc5","test_name":"test_test_1358_cmos_inverter_49c44ea152940fc5","netlist_hash":"cbeb4e28d5e42fe3","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"CMOS inverter with PMOS width 20\u00b5m, NMOS width 10\u00b5m, both gate lengths 0.5\u00b5m for increased drive current.","pair_ids":["75b7c178938bfc32","9fd7a472bdf4c507","b8e87fd684aaf86a","238614d2a1f724c9","8b26966c308295a5"],"prompts":["CMOS inverter with PMOS width 20\u00b5m, NMOS width 10\u00b5m, both gate lengths 0.5\u00b5m for increased drive current.","10pF load capacitor at output, power supply VDD=3.3V.","Input pulse: 0 to 3.3V, 1ns rise/fall, 30ns high, 60ns period.","Models: NMOS VTO=0.7 KP=200u, PMOS VTO=-0.7 KP=100u, both LAMBDA=0.02.","Transient simulation 0.1ns step, 100ns stop time; measurements from first output transition."],"measurements":[{"name":"falltime","key":"falltime","index":0,"value":1.153119332971697e-09,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 TRAN"},{"name":"risetime","key":"risetime","index":0,"value":1.2486725787211146e-09,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00067_e5f5e9c5245d22d9:845ad2cf505c6d30","source":"deepseek","example_id":"00067_e5f5e9c5245d22d9","test_name":"test_test_67_series_rlc_e5f5e9c5245d22d9","netlist_hash":"845ad2cf505c6d30","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Series RLC bandpass filter with 10mH inductor, 0.1uF capacitor, and 100\u03a9 resistor.","pair_ids":["5469d6e40260a55c","e6360b612e09422f","234e64a57ae64c85"],"prompts":["Series RLC bandpass filter with 10mH inductor, 0.1uF capacitor, and 100\u03a9 resistor.","AC analysis from 100 Hz to 100 kHz with 100 points per decade to observe voltage peak across resistor.","Fixed .MEAS statement to use phase condition vp(out)=0 instead of referencing previous measurement."],"measurements":[{"name":"max_vout","key":"max_vout","index":0,"value":0.9992979072495243,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 AC"},{"name":"f0","key":"f0","index":0,"value":5033.1976090543085,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 AC"}]} +{"id":"deepseek:01373_322be706d407f3a5:ed64cefb865da8d6","source":"deepseek","example_id":"01373_322be706d407f3a5","test_name":"test_test_1373_cmos_dynamic_precharge_inverter_322be706d407f3a5","netlist_hash":"ed64cefb865da8d6","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"A CMOS dynamic precharge inverter consisting of a PMOS precharge transistor and an NMOS evaluation transistor.","pair_ids":["b979003583662934","a473c6a3c33a25b4","4b8fae347fd92443","dc0dfc16d538b773","fe29f10037c57c75"],"prompts":["A CMOS dynamic precharge inverter consisting of a PMOS precharge transistor and an NMOS evaluation transistor.","When CLK is low, the PMOS precharges the output node to VDD.","When CLK is high and IN is high, the NMOS discharges the output to ground.","Load capacitance is 100fF. NMOS width increased to 50u to ensure fast discharge.","Transient simulation from 0 to 200ns with 0.1ns steps captures precharge and evaluation phases."],"measurements":[{"name":"veval","key":"veval","index":0,"value":0.1333938131870557,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"vprech","key":"vprech","index":0,"value":3.299998694850999,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"vprech2","key":"vprech2","index":0,"value":3.300000180669126,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:02206_200d811a6ef6f3d4:6aeae66620c1ecda","source":"deepseek","example_id":"02206_200d811a6ef6f3d4","test_name":"test_test_2206_flash_adc_ladder_comparator_200d811a6ef6f3d4","netlist_hash":"6aeae66620c1ecda","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Resistive ladder divides reference voltage into 8 equal steps from 0V to 5V.","pair_ids":["47117b273f4af4ea","cc0333b9acd4b0cf","db709f8121ea6cc5","671ac87a650ab8b5"],"prompts":["Resistive ladder divides reference voltage into 8 equal steps from 0V to 5V.","Voltage-controlled switches with pull-up resistors act as comparators, switching when the buffered input exceeds a ladder tap.","DC sweep reveals switching thresholds at N/8 * 5V with equally spaced steps of 0.625V.","Transient simulation exercises dynamic response to a ramped input, showing thermometer code outputs."],"measurements":[{"name":"vth6","key":"vth6","index":0,"value":1.245,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#2 DC"},{"name":"vth7","key":"vth7","index":0,"value":0.625,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#2 DC"},{"name":"vth4","key":"vth4","index":0,"value":2.495,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#2 DC"},{"name":"vth5","key":"vth5","index":0,"value":1.875,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#2 DC"},{"name":"vth2","key":"vth2","index":0,"value":3.745,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#2 DC"},{"name":"vth3","key":"vth3","index":0,"value":3.125,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#2 DC"},{"name":"vth1","key":"vth1","index":0,"value":4.375,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#2 DC"}]} +{"id":"deepseek:02350_a45e9a8edd2561db:6cecb587883e3432","source":"deepseek","example_id":"02350_a45e9a8edd2561db","test_name":"test_test_2350_mosfet_dc_bias_a45e9a8edd2561db","netlist_hash":"6cecb587883e3432","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"MOSFET DC bias circuit using a voltage divider (R3-R4) to set gate voltage at 5V.","pair_ids":["66f3cebad255f843","cae203def12c9a48","9064cf51578ee563"],"prompts":["MOSFET DC bias circuit using a voltage divider (R3-R4) to set gate voltage at 5V.","Source resistor R2 provides negative feedback to stabilize bias point.","Expect M1 in saturation: VGS > VTO (1V) and VDS > VGS-VTO."],"measurements":[{"name":"ID","key":"ID","index":0,"value":0.0001660921227824418,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 DC"},{"name":"VDS","key":"VDS","index":0,"value":8.339078687754338,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 DC"},{"name":"VGS","key":"VGS","index":0,"value":4.999999999999999,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 DC"}]} +{"id":"deepseek:01389_cc61c5cddc660690:d0dcaf4e464969b6","source":"deepseek","example_id":"01389_cc61c5cddc660690","test_name":"test_test_1389_jfet_source_follower_buffer_cc61c5cddc660690","netlist_hash":"d0dcaf4e464969b6","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"N-channel JFET source follower with \u00b115V supplies","pair_ids":["1d18639f47e9e25e","70dac01a050e1a7e","6708a0bee484c96e"],"prompts":["N-channel JFET source follower with \u00b115V supplies","DC coupled input with AC 1V for frequency response","Measures DC drain current, gate-source voltage, and midband gain at 1kHz"],"measurements":[{"name":"VGS_OP","key":"VGS_OP","index":0,"value":-0.7452011646406174,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 OP"},{"name":"ID_JF","key":"ID_JF","index":0,"value":0.0015745201164640617,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 OP"},{"name":"gain_1k","key":"gain_1k","index":0,"value":0.9616799167614131,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"}]} +{"id":"deepseek:00301_045e118a88bb2c3e:77c939233fbacf45","source":"deepseek","example_id":"00301_045e118a88bb2c3e","test_name":"test_test_301_cmos_nor2_tran_045e118a88bb2c3e","netlist_hash":"77c939233fbacf45","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"CMOS 2-input NOR gate with input B tied low, making it function as an inverter.","pair_ids":["5d9fe9f6d7363c24","bf5934b2dfe222b6","17f27137366e1323"],"prompts":["CMOS 2-input NOR gate with input B tied low, making it function as an inverter.","Transient analysis triggered by a pulse on input A to measure propagation delays.","Load capacitance increased to 0.5 pF to ensure delays fall within the measurable range."],"measurements":[{"name":"tphl","key":"tphl","index":0,"value":9.714323626209652e-10,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 TRAN"},{"name":"tplh","key":"tplh","index":0,"value":1.712784141398976e-09,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:02004_2abb4e9469bbfb96:7cbc98f5869d8e9e","source":"deepseek","example_id":"02004_2abb4e9469bbfb96","test_name":"test_test_2004_linear_post_regulator_2abb4e9469bbfb96","netlist_hash":"7cbc98f5869d8e9e","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Switching preregulator (buck converter) steps 12V down to ~4.8V using a fixed 40% duty cycle at 100kHz.","pair_ids":["1a5583f742d3aa9c","483f989945821ea0","e41bbf833d0024cf"],"prompts":["Switching preregulator (buck converter) steps 12V down to ~4.8V using a fixed 40% duty cycle at 100kHz.","Linear post-regulator employs an op-amp (Eamp) and NPN pass transistor (Q1) in an emitter-follower configuration to regulate 3.3V.","Load transient from 50mA to 500mA tests line and load regulation; measurements capture average output and ripple."],"measurements":[{"name":"vout_high","key":"vout_high","index":0,"value":3.3001087233604203,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#2 TRAN"},{"name":"ripple","key":"ripple","index":0,"value":2.406257415543678e-10,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#2 TRAN"},{"name":"vout_low","key":"vout_low","index":0,"value":3.300107093522782,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#2 TRAN"}]} +{"id":"deepseek:00313_137732fb83718300:137732fb83718300","source":"deepseek","example_id":"00313_137732fb83718300","test_name":"test_test_313_non_inverting_amp_137732fb83718300","netlist_hash":"137732fb83718300","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Simulate the AC response of a non-inverting operational amplifier with a gain of 2 (6 dB) using an ideal voltage-controlled voltage source.","pair_ids":["15eb66acc64a6838","d1782380e9b16c90","dd38f13cbf0c726c"],"prompts":["Simulate the AC response of a non-inverting operational amplifier with a gain of 2 (6 dB) using an ideal voltage-controlled voltage source.","Create a SPICE netlist for a non-inverting amplifier that uses an E-source as the op-amp, with Rin=Rf=10k, and measure the mid-band gain.","Design a simple non-inverting amplifier circuit with a behavioral op-amp and verify its gain at 1kHz via AC analysis."],"measurements":[{"name":"vout_db","key":"vout_db","index":0,"value":6.020426197230019,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:01020_083a9167abc5533a:1cccbfcc9f1e16ef","source":"deepseek","example_id":"01020_083a9167abc5533a","test_name":"test_test_1020_cascode_bjt_current_mirror_083a9167abc5533a","netlist_hash":"1cccbfcc9f1e16ef","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Cascode BJT current mirror with 10 V supply, 5 k\u03a9 resistor, and Vbias=1.5 V.","pair_ids":["71dc67d1f4627974","3e851981fb4104e9","ea9a23ee34dccbc5","73afed29c2392e04"],"prompts":["Cascode BJT current mirror with 10 V supply, 5 k\u03a9 resistor, and Vbias=1.5 V.","Transistor model uses IS=5e-16 to achieve target reference current near 1.7 mA with the given bias.","Output current is measured via a zero-volt source Vmeas oriented to give positive sinking current.","DC sweep of output voltage from 0 to 10 V demonstrates high output impedance and constant current."],"measurements":[{"name":"Iref","key":"Iref","index":0,"value":0.0018336322653205333,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"Iout","key":"Iout","index":0,"value":0.0018813173922446746,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"Ratio","key":"Ratio","index":0,"value":1.0260058288818372,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#2 DC"}]} +{"id":"deepseek:02253_3ead5301581d6df6:fe6ed0e90e8ee278","source":"deepseek","example_id":"02253_3ead5301581d6df6","test_name":"test_test_2253_switched_capacitor_integrator_3ead5301581d6df6","netlist_hash":"fe6ed0e90e8ee278","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Uses a parasitic-insensitive non-inverting SC integrator topology with four switches.","pair_ids":["423857e02c644e29","69a6ea93dcb392f4","b10007d7380dc8d5","c9c9251a5dc1e0db"],"prompts":["Uses a parasitic-insensitive non-inverting SC integrator topology with four switches.","Op-amp modeled as a VCVS with gain 100k and large feedback resistor for DC convergence.","Clocks phi1 and phi2 are non-overlapping with 10us period, providing 0.1V step per cycle.","Input DC 1V is sampled by C1=1p and integrated by C2=10p, giving theoretical gain 0.1V per cycle."],"measurements":[{"name":"Vout200","key":"Vout200","index":0,"value":1.9775013236347037,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"Vout100","key":"Vout100","index":0,"value":0.9938181551564665,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:02083_4a99412d17e7ef6f:880d020fa847926b","source":"deepseek","example_id":"02083_4a99412d17e7ef6f","test_name":"test_test_2083_gilbert_cell_mixer_using_bjt_differential_pairs_4a99412d17e7ef6f","netlist_hash":"880d020fa847926b","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Gilbert cell mixer using BJT differential pairs with 1 mA tail current","pair_ids":["36a23fe409ff8fa9","397c1ce651ed7e16","14013b8249ae25a0","4a472201971ff421"],"prompts":["Gilbert cell mixer using BJT differential pairs with 1 mA tail current","RF inputs biased at 2.5 V DC and driven differentially with 0.01 V amplitude, giving 0.04 V peak-to-peak differential","LO inputs driven by 0.3 V amplitude differential sinusoids at 99 MHz","Output differential voltage measured over 1 \u00b5s to 5 \u00b5s to compute conversion gain"],"measurements":[{"name":"gain_db","key":"gain_db","index":0,"value":30.734823273568836,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#2 TRAN"},{"name":"vout_pp","key":"vout_pp","index":0,"value":1.3765790475172524,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#2 TRAN"}]} +{"id":"deepseek:01678_616a07bd51688cb9:31b3e0dca0a11e5c","source":"deepseek","example_id":"01678_616a07bd51688cb9","test_name":"test_test_1678_mfb_highpass_e_opamp_616a07bd51688cb9","netlist_hash":"31b3e0dca0a11e5c","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Second-order multiple-feedback high-pass filter using an ideal opamp (E source with gain -100000).","pair_ids":["f1439e3145f4743e","fbc4181767c1add0","d1a7135d26f71dfb","505e56638ca6bc62"],"prompts":["Second-order multiple-feedback high-pass filter using an ideal opamp (E source with gain -100000).","Component values: C1=10nF, C2=10nF, C5=10nF, R4=7.5k, R3=33k.","AC analysis from 10 Hz to 100 kHz with 100 points/decade.","Measures passband gain at 10 kHz, -3 dB point, and low-frequency gain at 100 Hz."],"measurements":[{"name":"f3db","key":"f3db","index":0,"value":1024.5251557436873,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 AC"},{"name":"low_gain","key":"low_gain","index":0,"value":-40.20373259685113,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"high_gain","key":"high_gain","index":0,"value":-0.0026499871173727256,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:01512_0cc10c2d1d090c46:bbbdfbd51cd24f96","source":"deepseek","example_id":"01512_0cc10c2d1d090c46","test_name":"test_test_1512_opamp_v_to_i_grounded_load_0cc10c2d1d090c46","netlist_hash":"bbbdfbd51cd24f96","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"The circuit is a voltage-to-current converter using an op-amp (modeled by E1) and an NPN transistor in a common-emitter configuration.","pair_ids":["5d52b955d4979d01","fb138c561bba9228","0e159236b878570c","26331a263e6c27b8","9f061c0234958b98"],"prompts":["The circuit is a voltage-to-current converter using an op-amp (modeled by E1) and an NPN transistor in a common-emitter configuration.","The load is connected between VCC and the collector, providing a grounded load.","The op-amp forces the voltage across the sense resistor RS to equal Vin, setting emitter current to Vin/RS.","The transistor's high beta (1e9) ensures collector current nearly equals emitter current, eliminating the previous current error.","RL was reduced to 1k\u03a9 to keep the transistor in the active region for Vin up to 1V, preventing saturation."],"measurements":[{"name":"I_0p5","key":"I_0p5","index":0,"value":0.0004999886362874477,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 dc"},{"name":"I_1p0","key":"I_1p0","index":0,"value":0.0009999834551750765,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 dc"},{"name":"Error_0p5","key":"Error_0p5","index":0,"value":1.136371255232825e-08,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#2 dc"}]} +{"id":"deepseek:00516_ffc6c0a518283d2d:ffc6c0a518283d2d","source":"deepseek","example_id":"00516_ffc6c0a518283d2d","test_name":"test_test_516_lead_lag_compensation_ffc6c0a518283d2d","netlist_hash":"ffc6c0a518283d2d","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Design an active lead-lag compensator using an ideal op-amp with a non-inverting configuration. The circuit should provide phase lead at low frequencies and phase lag at high frequencies. Use an AC source of 1 V amplitude and perform an AC analysis from 1 Hz to 1 MHz.","pair_ids":["a5298b8eb56c8384","3c6a45c7aa40459f","c484675121a9746d","29a0d7e5a481e6a2"],"prompts":["Design an active lead-lag compensator using an ideal op-amp with a non-inverting configuration. The circuit should provide phase lead at low frequencies and phase lag at high frequencies. Use an AC source of 1 V amplitude and perform an AC analysis from 1 Hz to 1 MHz.","Create a compensation network that introduces both lead and lag phase shifts. Use resistors and capacitors with an op-amp modeled as a high-gain VCVS (E-source). Verify that the phase is positive at 50 Hz and 200 Hz, and negative at 2 kHz.","Implement a lead-lag filter using an E-source as an ideal op-amp, with a feedback network consisting of a parallel RC (R2=95k, C2=1nF) from output to inverting input, and a series RC (R1=100k, C1=10nF) from inverting input to ground. AC simulation should reveal phase lead at lower frequencies and phase lag at higher ones.","Build a non-inverting lead-lag network with pole frequencies at 159 Hz and 1.59 kHz, and zero frequencies at 79.6 Hz and 3.18 kHz. Run an AC sweep and use .MEASURE to confirm phase sign changes."],"measurements":[{"name":"phase_200Hz","key":"phase_200Hz","index":0,"value":0.23390903732501148,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"phase_50Hz","key":"phase_50Hz","index":0,"value":0.24110598384143433,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"phase_2kHz","key":"phase_2kHz","index":0,"value":-0.2952023829010933,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:01873_0431d8397475da15:fe1f7543a24bb0af","source":"deepseek","example_id":"01873_0431d8397475da15","test_name":"test_test_1873_series_pass_linear_regulator_opamp_0431d8397475da15","netlist_hash":"fe1f7543a24bb0af","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Create a measured SPICE netlist for a series pass linear voltage regulator that uses an op-amp error amplifier and a BJT pass transistor. Include DC sweep and operating point analyses with measurements of output voltage and line regulation.","pair_ids":["2322fef52d64d827","28a4a5c45840d52a","7a129a9d0b0c5f78"],"prompts":["Create a measured SPICE netlist for a series pass linear voltage regulator that uses an op-amp error amplifier and a BJT pass transistor. Include DC sweep and operating point analyses with measurements of output voltage and line regulation.","Design a 10V linear regulator using an ideal op-amp (E-source) and an NPN transistor. The circuit should have feedback from a resistive divider. Provide the netlist with .DC analysis sweeping the input from 10V to 15V and .MEASURE statements for output voltage at 12V and line regulation.","Generate a SPICE netlist for a regulated power supply with a series pass transistor controlled by an op-amp. Use E source for the op-amp, include .MODEL for the BJT, and measure load regulation characteristics."],"measurements":[{"name":"VOUT_MIN","key":"VOUT_MIN","index":0,"value":9.993247686337218,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#2 DC"},{"name":"VOUT_MAX","key":"VOUT_MAX","index":0,"value":9.999764622654766,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#2 DC"},{"name":"LINE_REG","key":"LINE_REG","index":0,"value":0.0013033872635094923,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#2 DC"},{"name":"VOUT_NOM","key":"VOUT_NOM","index":0,"value":9.999764622596558,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"}]} +{"id":"deepseek:01080_9e2895b972dc26fc:4c0e8363f66aaefe","source":"deepseek","example_id":"01080_9e2895b972dc26fc","test_name":"test_test_1080_bjt_beta_insensitive_bias_cell_9e2895b972dc26fc","netlist_hash":"4c0e8363f66aaefe","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Beta-insensitive current source using an emitter follower (Q2) to buffer the voltage divider from the base current of Q1.","pair_ids":["9bdd63a97cc9016b","c9564c80318d08ed","00ca0a9258f14089"],"prompts":["Beta-insensitive current source using an emitter follower (Q2) to buffer the voltage divider from the base current of Q1.","The output current is set by the voltage at the base of Q1 (which is two VBE drops below the divider voltage) and the emitter resistor RE.","The design aims for 1 mA at VCC=10 V with reduced sensitivity to transistor beta."],"measurements":[{"name":"I_max","key":"I_max","index":0,"value":0.001998382370427959,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#2 DC"},{"name":"I_min","key":"I_min","index":0,"value":6.663411955234967e-05,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#2 DC"},{"name":"I_nominal","key":"I_nominal","index":0,"value":0.0009896127345592892,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"}]} +{"id":"deepseek:00542_1a6a0c449bb6e1ac:098732552dea7e61","source":"deepseek","example_id":"00542_1a6a0c449bb6e1ac","test_name":"test_test_542_damped_parallel_lc_tank_1a6a0c449bb6e1ac","netlist_hash":"098732552dea7e61","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"A voltage source with series resistance drives a parallel LC tank.","pair_ids":["c517ecd3c04f47c2","9ddba1cf3c35b2e1","987fb1d43ea4d3e9","d807b415e719e2f9"],"prompts":["A voltage source with series resistance drives a parallel LC tank.","AC analysis measures the bandpass response.","Resonant frequency, bandwidth, and quality factor are extracted.","The Q factor is expected near 1 due to the source resistance damping."],"measurements":[{"name":"BW","key":"BW","index":0,"value":159203.13200527313,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 AC"},{"name":"V_max","key":"V_max","index":0,"value":0.9999996569395009,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 AC"},{"name":"f_low","key":"f_low","index":0,"value":98349.89371618208,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 AC"},{"name":"f_high","key":"f_high","index":0,"value":257553.0257214552,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 AC"},{"name":"Q","key":"Q","index":0,"value":0.999697643202936,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 AC"},{"name":"f0","key":"f0","index":0,"value":159154.99585619746,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 AC"}]} +{"id":"deepseek:02279_63bef7514e4fb83d:4cd08cbd0f1b3fce","source":"deepseek","example_id":"02279_63bef7514e4fb83d","test_name":"test_test_2279_correlated_double_sampling_frontend_63bef7514e4fb83d","netlist_hash":"4cd08cbd0f1b3fce","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Correlated double sampling (CDS) switched-capacitor amplifier that cancels input DC offset.","pair_ids":["a1dba735dba9eea8","2635037081440705","d52eac61c3fdd6a4","c774a205dcf482b6"],"prompts":["Correlated double sampling (CDS) switched-capacitor amplifier that cancels input DC offset.","During phi1 (reset), C1 samples VIN and C2 is shorted, resetting the op-amp output.","During phi2 (signal), C1 is connected to the virtual ground, causing charge transfer proportional to VIN(phi2)-VIN(phi1).","Timing sets \u0394t=166\u00b5s so the 1kHz sine yields full gain factor, producing 100mV amplitude output."],"measurements":[{"name":"vout_avg","key":"vout_avg","index":0,"value":0.000447927645826669,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 tran"},{"name":"offset_err","key":"offset_err","index":0,"value":0.000447927645826669,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 tran"},{"name":"vout_pp","key":"vout_pp","index":0,"value":0.1285240808304272,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#1 tran"}]} +{"id":"deepseek:02210_9f94c6af01750e4d:2edde5b1053fbfe9","source":"deepseek","example_id":"02210_9f94c6af01750e4d","test_name":"test_test_2210_single_slope_adc_ramp_comparator_9f94c6af01750e4d","netlist_hash":"2edde5b1053fbfe9","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"Single-slope ADC front-end with current-source ramp and comparator.","pair_ids":["569806e3e400dc61","1ca3fb3c726e6401","0038c52c71239480","149d0fc2295aa1c5","f7ca13c6373dade9"],"prompts":["Single-slope ADC front-end with current-source ramp and comparator.","Ramp capacitor C1 charged by constant current I1 (10\u00b5A) giving 1V/\u00b5s slope.","Reset switch S1 shorts ramp to ground when V(control)>3V, controlled by Vreset pulse.","Comparator implemented with behavioral source B_COMP, output switches to 5V when ramp exceeds 1.8V input.","Measurement of conversion time from control falling edge (ramp start) to comparator output rising edge."],"measurements":[{"name":"conv_time","key":"conv_time","index":0,"value":1.807902671165057e-06,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 TRAN"},{"name":"vramp_at_2us","key":"vramp_at_2us","index":0,"value":1.9976171456089558,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00342_7de0d0852be23a4e:4ceab48fb57a0b8d","source":"deepseek","example_id":"00342_7de0d0852be23a4e","test_name":"test_test_342_opamp_integrator_reset_7de0d0852be23a4e","netlist_hash":"4ceab48fb57a0b8d","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Design an op-amp integrator with a reset switch across the capacitor using a behavioral voltage-controlled voltage source as the op-amp.","pair_ids":["03528fe9e264b75a","fac1350a678039c9","3d739876c9f3ec0e","3b97fcdb4d79b91b"],"prompts":["Design an op-amp integrator with a reset switch across the capacitor using a behavioral voltage-controlled voltage source as the op-amp.","Create a SPICE netlist for an integrator using an ideal op-amp and a reset switch to discharge the capacitor.","Simulate an op-amp integrator with a reset switch: the reset is active for 0.5ms, then a step input is applied at 1ms. Measure the output at 1ms and 2ms.","Implement an inverting integrator with a reset switch that shorts the feedback capacitor during the initial 0.5ms. Use a pulse input starting at 1ms and verify the ramp output."],"measurements":[{"name":"vout_1ms","key":"vout_1ms","index":0,"value":0,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"vout_2ms","key":"vout_2ms","index":0,"value":-0.9950012457699773,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00674_551402857b5fb341:51f36a1ff9dfde0d","source":"deepseek","example_id":"00674_551402857b5fb341","test_name":"test_test_674_t_section_lc_impedance_matching_network_551402857b5fb341","netlist_hash":"51f36a1ff9dfde0d","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"T-section LC impedance matching network designed for 50-ohm to 50-ohm match at 1 MHz.","pair_ids":["f657c56dcdfdb4ef","18559e46b893ec18","355df582e4a56a3a","617db77aeab1fbb3"],"prompts":["T-section LC impedance matching network designed for 50-ohm to 50-ohm match at 1 MHz.","Uses equal series inductors (1 \u00b5H) and a shunt capacitor (787.5 pF), satisfying 2*X_L*X_C - X_L^2 = R^2.","AC analysis from 100 kHz to 10 MHz captures frequency response.",".MEAS directives extract max voltages and specific magnitudes at 1 MHz."],"measurements":[{"name":"v_out_at_1meg","key":"v_out_at_1meg","index":0,"value":0.49999999997449757,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"v_at_1meg","key":"v_at_1meg","index":0,"value":0.5000012494443078,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"v_out_max","key":"v_out_max","index":0,"value":0.49999999997449757,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 AC"},{"name":"v_in_max","key":"v_in_max","index":0,"value":0.5805489997492874,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 AC"}]} +{"id":"deepseek:00289_019f78b37715758e:019f78b37715758e","source":"deepseek","example_id":"00289_019f78b37715758e","test_name":"test_test_289_cmos_nand2_transient_019f78b37715758e","netlist_hash":"019f78b37715758e","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Perform a transient simulation of a two-input CMOS NAND gate and measure the propagation delay from input B to the output falling edge.","pair_ids":["c1544d420c9b68dd","dd5f16366269b83c","cd923f665368fcf8"],"prompts":["Perform a transient simulation of a two-input CMOS NAND gate and measure the propagation delay from input B to the output falling edge.","Create a SPICE netlist for a NAND2 gate using NMOS and PMOS transistors, apply pulsed inputs, and run a transient analysis to verify correct logic operation.","Simulate a CMOS NAND gate with a 5V supply, measure the delay when both inputs go high, and check that the output voltage meets logic-level requirements."],"measurements":[{"name":"vout_high","key":"vout_high","index":0,"value":5.140958891235691,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"},{"name":"vout_low","key":"vout_low","index":0,"value":-0.04581149573765863,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 TRAN"},{"name":"tplh_A","key":"tplh_A","index":0,"value":8.966011031749855e-12,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 TRAN"},{"name":"tphl_B","key":"tphl_B","index":0,"value":6.707468345742556e-12,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:02002_ea04abc82d5a2115:0840b1618e309da3","source":"deepseek","example_id":"02002_ea04abc82d5a2115","test_name":"test_test_2002_buck_linear_postreg_ea04abc82d5a2115","netlist_hash":"0840b1618e309da3","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Buck converter preregulator steps down 12V to approximately 5.8V.","pair_ids":["a995455036dd22be","6fc53f013835c6af","e84483c2aa4c95ae"],"prompts":["Buck converter preregulator steps down 12V to approximately 5.8V.","Linear post-regulator provides precise 5V output with low ripple.","Feedback amplifier and NPN pass transistor form a linear regulator from the buck output."],"measurements":[{"name":"vout_avg","key":"vout_avg","index":0,"value":4.9988252071271475,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#2 tran"},{"name":"vout_ripple","key":"vout_ripple","index":0,"value":2.469136006766348e-12,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#2 tran"},{"name":"vmid_avg","key":"vmid_avg","index":0,"value":5.80804496930606,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#2 tran"}]} +{"id":"deepseek:02090_26245fc2f7f62eb9:d1a3aeda7154547e","source":"deepseek","example_id":"02090_26245fc2f7f62eb9","test_name":"test_test_2090_cmos_switching_mixer_with_differential_lo_26245fc2f7f62eb9","netlist_hash":"d1a3aeda7154547e","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"Create a single-balanced CMOS switching mixer. Use NMOS transistors for the switching pair and the transconductor. Apply a differential square-wave LO at 1MHz and an RF sine at 900kHz. Include a differential RC filter at the output and measure the peak-to-peak filtered differential voltage.","pair_ids":["575851bc3152868b","10fc9a7fbbbf83e5","ba89d9da63eea668","5c1fc7a0596cbca1","e60b9ecead61e3ae"],"prompts":["Create a single-balanced CMOS switching mixer. Use NMOS transistors for the switching pair and the transconductor. Apply a differential square-wave LO at 1MHz and an RF sine at 900kHz. Include a differential RC filter at the output and measure the peak-to-peak filtered differential voltage.","Design a mixer circuit with two NMOS switches driven by complementary LO pulses and a common-source RF input transistor. Use a 5V supply. The LO frequency is 1MHz, RF is 900kHz. Load the drains with 1k resistors and add a 500pF differential capacitor. Simulate transient and measure the output differential amplitude.","I need a CMOS switching mixer with differential LO drive. Use an RF transistor with a 1k source degeneration, and a differential pair switching at 1MHz. The RF input is a 900kHz sine with 200mV amplitude and 1.5V DC. Include model cards and measure the peak-to-peak voltage across the differential output after filtering.","Simulate a single-balanced mixer using NMOS transistors. The LO is a 1MHz complementary square wave, the RF is 900kHz sine. Provide a differential capacitive load to filter high frequencies. Run a transient for 200us and report the peak-to-peak differential voltage.","Construct a transistor-level mixer with a differential LO switching pair (1MHz square wave) and an RF transconductor (900kHz sine). Power supply is 5V. Measure the differential output voltage swing after an RC lowpass filter and verify it is non-zero."],"measurements":[{"name":"v_avg_diff","key":"v_avg_diff","index":0,"value":0.0010329145652439302,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 TRAN"},{"name":"v_pp_abs","key":"v_pp_abs","index":0,"value":0.35006087266862007,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#1 TRAN"},{"name":"v_pp_diff","key":"v_pp_diff","index":0,"value":0.5837684303893127,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:02220_9fc454c5e322422c:c039c5659f061254","source":"deepseek","example_id":"02220_9fc454c5e322422c","test_name":"test_test_2220_sar_adc_sample_comparator_9fc454c5e322422c","netlist_hash":"c039c5659f061254","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Design a measured SPICE netlist for a SAR ADC's sample comparator front-end. Use a clocked switch, sampling capacitor, and a high-gain E-source comparator. Include a PULSE input and .MEAS to find the delay from input threshold crossing to output transition.","pair_ids":["3185c9f1639e0b6b","4aec1181ab123169","67a9d68716203bad"],"prompts":["Design a measured SPICE netlist for a SAR ADC's sample comparator front-end. Use a clocked switch, sampling capacitor, and a high-gain E-source comparator. Include a PULSE input and .MEAS to find the delay from input threshold crossing to output transition.","Create a hard-level SPICE simulation of a switched-capacitor sampling comparator typical of successive-approximation ADCs. The circuit should have a behavioral op-amp comparator, a clocked switch, and measure the propagation delay with .MEASURE.","Provide a full netlist for a data converter comparator front end. Use VIN as a fast ramp, a sampling switch with ON resistance 100 ohms, a 10pF hold cap, and an IF-based E-source comparator. Measure the time between V(in) reaching 1V and V(out) reaching 2.5V."],"measurements":[{"name":"tpd","key":"tpd","index":0,"value":2.2870049583300686e-09,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 TRAN"},{"name":"t_in_1v","key":"t_in_1v","index":0,"value":5e-09,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 TRAN"},{"name":"t_clk_rise","key":"t_clk_rise","index":0,"value":5e-10,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 TRAN"},{"name":"t_out_rise","key":"t_out_rise","index":0,"value":7.287004958330069e-09,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:01656_e2aec2e7e6ce45f6:c361aef93ae4b20a","source":"deepseek","example_id":"01656_e2aec2e7e6ce45f6","test_name":"test_test_1656_sallen_key_butterworth_low_pass_filter_e2aec2e7e6ce45f6","netlist_hash":"c361aef93ae4b20a","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"This is a second-order Sallen-Key Butterworth low-pass filter designed for a 1 kHz cutoff.","pair_ids":["e8139d88ae56fce2","633c02cdb60ec542","769b99dd063e845f"],"prompts":["This is a second-order Sallen-Key Butterworth low-pass filter designed for a 1 kHz cutoff.","Identical resistors (10k) and capacitor ratio C1=2*C2 (22n/11n) set Butterworth damping.","The op-amp is modeled as an ideal voltage-controlled voltage source (E1) with unity gain."],"measurements":[{"name":"fc","key":"fc","index":0,"value":1021.856958191669,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 AC"},{"name":"gain_10k","key":"gain_10k","index":0,"value":-39.60397783846267,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"gain_100","key":"gain_100","index":0,"value":-0.0003963827053195029,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"max_gain","key":"max_gain","index":0,"value":-3.9624215600683605e-12,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 AC"},{"name":"dc_gain","key":"dc_gain","index":0,"value":-3.9624215600683605e-12,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:02199_e6434294f80cb683:5202e9dc6ff5596d","source":"deepseek","example_id":"02199_e6434294f80cb683","test_name":"test_test_2199_pwm_dac_rc_e6434294f80cb683","netlist_hash":"5202e9dc6ff5596d","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"PWM DAC using a first-order RC low\u2011pass filter with R=10\u202fk\u03a9 and C=10\u202fnF.","pair_ids":["2e38cf63d10b52d2","0820387045f83680","439128d3098255c0"],"prompts":["PWM DAC using a first-order RC low\u2011pass filter with R=10\u202fk\u03a9 and C=10\u202fnF.","PWM source: 100\u202fkHz, 50% duty cycle, 3.3\u202fV amplitude.","Transient simulation over 6\u202fms with measurements taken after steady\u2011state."],"measurements":[{"name":"vout_avg","key":"vout_avg","index":0,"value":1.6533000000053142,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 tran"},{"name":"vout_ripple","key":"vout_ripple","index":0,"value":0.08238675007528773,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#1 tran"}]} +{"id":"deepseek:00828_8e9c172e2208ea0b:9655093988b00bda","source":"deepseek","example_id":"00828_8e9c172e2208ea0b","test_name":"test_test_828_diode_log_converter_8e9c172e2208ea0b","netlist_hash":"9655093988b00bda","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"Logarithmic amplifier using an op-amp model (E1) and diode feedback","pair_ids":["610cc775c83108ac","67898f0c2ca64cd5","d6a7cabaceac15a2","e84692c068686273","4c2d902f81c6eb75"],"prompts":["Logarithmic amplifier using an op-amp model (E1) and diode feedback","Input voltage is applied through a 10k resistor to the inverting input","Diode D1 (anode at in_n, cathode at out) provides logarithmic I-V characteristic","High-gain VCVS (1e6) approximates ideal op-amp behavior","DC sweep and .MEAS statements verify the output transfer function"],"measurements":[{"name":"out_at_0p1V","key":"out_at_0p1V","index":0,"value":-0.416890906830348,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"out_at_1V","key":"out_at_1V","index":0,"value":-0.47653585772937873,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"out_at_10V","key":"out_at_10V","index":0,"value":-0.5369898717161473,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"}]} +{"id":"deepseek:01894_a07fcea2cf74c777:39fae670913ded5c","source":"deepseek","example_id":"01894_a07fcea2cf74c777","test_name":"test_test_1894_nmos_source_follower_linear_regulator_a07fcea2cf74c777","netlist_hash":"39fae670913ded5c","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"NMOS source follower with resistive feedback divider and behavioral error amplifier.","pair_ids":["11af0e0c1b88b49f","20863d6d85c91104","fd2cbb9935ce9b8c","4e93e382b6d9fd9b","b248a27d8a4e456e"],"prompts":["NMOS source follower with resistive feedback divider and behavioral error amplifier.","Output voltage set to ~3.3V using 1.25V reference and 16.5k/10k divider.","Open-loop gain of error amplifier is 100k (100 dB), providing high line regulation.","Efficiency limited by dropout voltage; about 27.5% at 12V input.","Includes .OP and .DC sweep from 7V to 18V to verify regulation."],"measurements":[{"name":"Vout_nom","key":"Vout_nom","index":0,"value":3.3123546490242006,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"Iout_nom","key":"Iout_nom","index":0,"value":0.06624709298048401,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"Iq_nom","key":"Iq_nom","index":0,"value":-0.06637208749125101,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"efficiency","key":"efficiency","index":0,"value":27.550972443444934,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#2 DC"},{"name":"Pin","key":"Pin","index":0,"value":0.7964650498950121,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#2 DC"},{"name":"Vout_max","key":"Vout_max","index":0,"value":3.3123554956982844,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"line_reg","key":"line_reg","index":0,"value":1.507419669492678e-07,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#2 DC"},{"name":"delta_Vout","key":"delta_Vout","index":0,"value":1.658161636441946e-06,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#2 DC"},{"name":"Pout","key":"Pout","index":0,"value":0.2194338664182447,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#2 DC"},{"name":"Vout_min","key":"Vout_min","index":0,"value":3.312353837536648,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"}]} +{"id":"deepseek:01445_e246dee8292331f0:7efbf9aa58a38057","source":"deepseek","example_id":"01445_e246dee8292331f0","test_name":"test_test_1445_non_inverting_opamp_with_bias_resistor_e246dee8292331f0","netlist_hash":"7efbf9aa58a38057","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Create a non-inverting amplifier using an ideal op-amp with open-loop gain of 1,000,000. Include an input bias resistor of 10k\u03a9 from the non-inverting input to ground. Set the feedback resistors both to 10k\u03a9 for a gain of 2. Apply a 0.1V DC input and a 1V AC input. Run DC and AC analyses, then measure the DC output voltage and the AC output amplitude at 1kHz.","pair_ids":["8c7b4f2401e40845","1676614abd4dd2e5","4f8ee476a72b7e2d"],"prompts":["Create a non-inverting amplifier using an ideal op-amp with open-loop gain of 1,000,000. Include an input bias resistor of 10k\u03a9 from the non-inverting input to ground. Set the feedback resistors both to 10k\u03a9 for a gain of 2. Apply a 0.1V DC input and a 1V AC input. Run DC and AC analyses, then measure the DC output voltage and the AC output amplitude at 1kHz.","Design a non-inverting op-amp circuit with a behavioral voltage-controlled voltage source (E-source). Place a 10k\u03a9 resistor to ground at the positive input for bias. Use a feedback network with two 10k\u03a9 resistors to obtain a voltage gain of 2. Perform a single-point DC sweep at 0.1V input and an AC sweep from 1Hz to 1MHz. Measure V(out) at DC and VM(out) at 1kHz.","Simulate a basic non-inverting amplifier: ideal op-amp with 1e6 gain, Rf=10k, Rg=10k, input bias resistor Rbias=10k. Input source has 0.1V DC and 1V AC. Run .DC and .AC. Use .MEASURE to capture DC output and AC magnitude at 1kHz. Expected DC output 0.2V, AC amplitude 2V."],"measurements":[{"name":"vout_ac_mag","key":"vout_ac_mag","index":0,"value":1.9999960000859573,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"vout_dc","key":"vout_dc","index":0,"value":0.19999959999404382,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"}]} +{"id":"deepseek:01574_0cbaf8762a378432:01405a6b8890e56c","source":"deepseek","example_id":"01574_0cbaf8762a378432","test_name":"test_test_1574_opamp_precision_clamp_hw_rec_0cbaf8762a378432","netlist_hash":"01405a6b8890e56c","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Precision active clamp circuit using op-amp with diode in feedback.","pair_ids":["ad99cad0077f40c8","56008eaf391f3622","4fc9718051e971e3"],"prompts":["Precision active clamp circuit using op-amp with diode in feedback.","Positive input half-cycle: diode off, output clamped to 0V.","Negative input half-cycle: diode conducts, inverting amplifier with unity gain."],"measurements":[{"name":"vout_neg_peak","key":"vout_neg_peak","index":0,"value":1.9859950262782604,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"},{"name":"vout_clamp_max","key":"vout_clamp_max","index":0,"value":8.401170444193356e-06,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:01269_3e5bf44de54381c9:139b3bcc02152426","source":"deepseek","example_id":"01269_3e5bf44de54381c9","test_name":"test_test_1269_cmos_differential_pair_with_current_mirror_load_3e5bf44de54381c9","netlist_hash":"139b3bcc02152426","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"CMOS differential pair with NMOS input devices (W=5u) and PMOS current mirror load (W adjusted to 0.5u to achieve desired output bias).","pair_ids":["e637018918e04cea","9e995cb2e115715f","5b63a0dfedd2b421","43392f3a2213a635"],"prompts":["CMOS differential pair with NMOS input devices (W=5u) and PMOS current mirror load (W adjusted to 0.5u to achieve desired output bias).","Tail current source I1 set to 200uA with supply voltages \u00b15V.","DC sweep of VINP from -0.5V to 0.5V with VINN=0V, and AC differential input of 1V.",".MEAS statements extract VOUT_BALANCED, GAIN_DC, and GAIN_MAX."],"measurements":[{"name":"GAIN_DC","key":"GAIN_DC","index":0,"value":22.7271945286013,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"VOUT_BALANCED","key":"VOUT_BALANCED","index":0,"value":1.8349084506971494,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#3 DC"},{"name":"GAIN_MAX","key":"GAIN_MAX","index":0,"value":22.7271945286013,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#2 AC"}]} +{"id":"deepseek:00836_1be38497d4d84eae:e497a1b67fe27692","source":"deepseek","example_id":"00836_1be38497d4d84eae","test_name":"test_test_836_diode_antilog_converter_1be38497d4d84eae","netlist_hash":"e497a1b67fe27692","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Design a diode-antilog amplifier using an op-amp, then simulate its DC transfer characteristic and verify the exponential relationship.","pair_ids":["adfe5baf86937fca","e16f213750fb6bb1","bc1d402860662056"],"prompts":["Design a diode-antilog amplifier using an op-amp, then simulate its DC transfer characteristic and verify the exponential relationship.","Create a circuit that computes the exponential of an input voltage using a diode in the feedback path of an operational amplifier, and test it with a DC sweep.","Simulate an antilog converter: a diode and op-amp circuit that produces an output voltage proportional to exp(Vin), and check the ratio between two output points matches theory."],"measurements":[{"name":"vout_055","key":"vout_055","index":0,"value":-1.7176991163737385,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"vout_05","key":"vout_05","index":0,"value":-0.24867177877877553,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"ratio_antilog","key":"ratio_antilog","index":0,"value":6.907495192294601,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#2 DC"}]} +{"id":"deepseek:00959_eeb1156eccfe6a13:8c1035ced5f2358d","source":"deepseek","example_id":"00959_eeb1156eccfe6a13","test_name":"test_test_959_complementary_emitter_follower_buffer_eeb1156eccfe6a13","netlist_hash":"8c1035ced5f2358d","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"Design a complementary emitter follower buffer using NPN and PNP BJTs and verify its transfer characteristic.","pair_ids":["7bbf1967842129a9","faf2405ebf4b6109","8d456de69f504c14","8515f43e42efa413","45fffd5595ed9fde"],"prompts":["Design a complementary emitter follower buffer using NPN and PNP BJTs and verify its transfer characteristic.","Simulate a push-pull BJT buffer stage and measure its output amplitude and average level.","Build a basic complementary emitter follower and analyze the crossover distortion in the time domain.","Create a bipolar junction transistor buffer circuit with no biasing and observe the deadband in the output waveform.","Implement a simple class B output stage and quantify the output swing and average value."],"measurements":[{"name":"vout_min","key":"vout_min","index":0,"value":-4.297214005586878,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#2 TRAN"},{"name":"vout_avg","key":"vout_avg","index":0,"value":-0.002930538508944489,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#2 TRAN"},{"name":"vout_max","key":"vout_max","index":0,"value":4.300977834813068,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#2 TRAN"},{"name":"vout_pp","key":"vout_pp","index":0,"value":8.598191840399945,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#2 TRAN"}]} +{"id":"deepseek:01349_ccd707d1fc9fad10:cb3843f8a031e129","source":"deepseek","example_id":"01349_ccd707d1fc9fad10","test_name":"test_test_1349_cmos_transmission_gate_sample_hold_ccd707d1fc9fad10","netlist_hash":"cb3843f8a031e129","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"CMOS transmission gate consisting of NMOS M1 and PMOS M2 passes input signal to hold capacitor CH when control pulse is high.","pair_ids":["20303d52bec10725","709aed177f70f891","dfc90b1f1babd3e0"],"prompts":["CMOS transmission gate consisting of NMOS M1 and PMOS M2 passes input signal to hold capacitor CH when control pulse is high.","Control signals: ctrl (0 to 5V pulse, on for 500ns starting at 1us) and complementary ctrl_bar (5 to 0V).","Output capacitor 100pF holds sampled voltage after switch turns off at 1.5us, with output measured at 2us."],"measurements":[{"name":"vin_samp","key":"vin_samp","index":0,"value":2.0047123192125498,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"hold_error","key":"hold_error","index":0,"value":-0.0001062291922493408,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 TRAN"},{"name":"vout_hold","key":"vout_hold","index":0,"value":2.0046060900203004,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:01286_ed04ca14d3481a82:31a03ac2a3a21a4c","source":"deepseek","example_id":"01286_ed04ca14d3481a82","test_name":"test_test_1286_mos_source_degenerated_current_mirror_ed04ca14d3481a82","netlist_hash":"31a03ac2a3a21a4c","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Design a MOS source-degenerated current mirror with NMOS transistors, include source resistors and measure the output current versus supply voltage.","pair_ids":["13006be75bd50994","09b163eaeef29486","8abafeb16a6a1b71","af1b5a33e3464419"],"prompts":["Design a MOS source-degenerated current mirror with NMOS transistors, include source resistors and measure the output current versus supply voltage.","Create a current mirror using MOSFETs with source degeneration to improve output resistance. Use a diode-connected reference transistor and a matching output transistor with a 2:1 width ratio. Sweep the supply voltage and evaluate the mirror ratio.","Simulate a source-degenerated current mirror in SPICE, with different transistor widths and source resistors. Perform DC analysis to see how the output current tracks the reference current, and include .MEAS statements to quantify accuracy.","Build a NMOS current mirror with resistors in the source leads. Set the reference current via a resistor from VDD to the diode-connected transistor. Then measure the output current and compare it to the expected scaled value."],"measurements":[{"name":"VGATE","key":"VGATE","index":0,"value":1.6381521617141845,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"RATIO","key":"RATIO","index":0,"value":1.7500451375787995,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#2 DC"},{"name":"IREF","key":"IREF","index":0,"value":0.0003361847838285816,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"IOUT","key":"IOUT","index":0,"value":0.000588338546267189,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"}]} +{"id":"deepseek:01348_6ee9dd0a9d12f397:61afe890c44bd47e","source":"deepseek","example_id":"01348_6ee9dd0a9d12f397","test_name":"test_test_1348_cmos_transmission_gate_sample_and_hold_6ee9dd0a9d12f397","netlist_hash":"61afe890c44bd47e","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"CMOS transmission gate sample-and-hold using NMOS and PMOS with complementary gate drive.","pair_ids":["cfff7a039a9c17b5","403aabf63d2d2dd2","48c27d4a3f2076b6","f07d87598567b7d3","87ffb14a2e1d6186"],"prompts":["CMOS transmission gate sample-and-hold using NMOS and PMOS with complementary gate drive.","Input: 1kHz sine wave, 2.5V DC offset, 1V amplitude.","Gate pulse: 10us on-time, 20us period, switching from 0 to 5V (NMOS) and 5 to 0V (PMOS).","Hold capacitor: 10pF with extremely high parallel resistance (1e12 Ohms) to minimize droop.","Transient analysis from 0 to 50us with 0.1us step."],"measurements":[{"name":"hold_error","key":"hold_error","index":0,"value":6.595278626342349e-06,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 tran"},{"name":"vout_at_10u","key":"vout_at_10u","index":0,"value":2.5627770805024572,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 tran"},{"name":"vout_at_15u","key":"vout_at_15u","index":0,"value":2.5627836757810836,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 tran"},{"name":"vout_at_5u","key":"vout_at_5u","index":0,"value":2.5313991215196907,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 tran"}]} +{"id":"deepseek:00418_52140d9a844e43f2:d4f80df9212a5cb8","source":"deepseek","example_id":"00418_52140d9a844e43f2","test_name":"test_test_418_relaxation_oscillator_comparator_52140d9a844e43f2","netlist_hash":"d4f80df9212a5cb8","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"Design a relaxation oscillator using a comparator built from an E-source, resistors, and a capacitor.","pair_ids":["0ed7281c29b3bdd1","256dbbcef5069bc7","88d5591d52790ee6","36d286016a45886b","989560c38ef8b8a8"],"prompts":["Design a relaxation oscillator using a comparator built from an E-source, resistors, and a capacitor.","Create a square-wave oscillator that uses an op-amp comparator with hysteresis and an RC timing network.","Generate a SPICE netlist for a comparator-based relaxation oscillator with .TRAN analysis and measurements.","Build a SPICE circuit for a Schmitt-trigger relaxation oscillator using a behavioral voltage source as a comparator.","Model a free-running multivibrator with a high-gain E-source as comparator, including period and amplitude measurements."],"measurements":[{"name":"vout_avg","key":"vout_avg","index":0,"value":0.037093700953456064,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 tran"},{"name":"period","key":"period","index":0,"value":2.1652180820581722e-05,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 tran"},{"name":"freq","key":"freq","index":0,"value":46184.724221840916,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 tran"},{"name":"vout_pp","key":"vout_pp","index":0,"value":10,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#1 tran"}]} +{"id":"deepseek:00652_29a6c6cca8a44964:2ca8269becc17b1e","source":"deepseek","example_id":"00652_29a6c6cca8a44964","test_name":"test_test_652_passive_filter_29a6c6cca8a44964","netlist_hash":"2ca8269becc17b1e","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Passive 3rd-order Bessel low-pass filter with 50-ohm terminations and 10 kHz cutoff.","pair_ids":["15d756c504d95399","952c9c2a8977bde0","7e2f1132afee664e"],"prompts":["Passive 3rd-order Bessel low-pass filter with 50-ohm terminations and 10 kHz cutoff.","Normalized prototype values (g1=0.3373, g2=0.9705, g3=2.2034) scaled to 50 \u03a9 and 10 kHz.","Frequency response verified at 100 Hz (passband), 10 kHz (cutoff), and 100 kHz (stopband)."],"measurements":[{"name":"gain_cut","key":"gain_cut","index":0,"value":-9.031965043171077,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"gain_low","key":"gain_low","index":0,"value":-6.02086716826024,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"gain_stop","key":"gain_stop","index":0,"value":-57.23567648284131,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:00715_0eb4afa1c5774a2f:897d094c50be1a71","source":"deepseek","example_id":"00715_0eb4afa1c5774a2f","test_name":"test_test_715_precision_half_wave_rectifier_0eb4afa1c5774a2f","netlist_hash":"897d094c50be1a71","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Create a precision half-wave rectifier using an ideal behavioral op-amp with gain 100k and a diode. The input is a 2V peak, 1kHz sine wave. Provide a SPICE netlist with transient analysis.","pair_ids":["37e5915a87b9d103","72dfe354ff3ce1b5","7be8cbac12d8a8b4"],"prompts":["Create a precision half-wave rectifier using an ideal behavioral op-amp with gain 100k and a diode. The input is a 2V peak, 1kHz sine wave. Provide a SPICE netlist with transient analysis.","Design a SPICE netlist for a non-inverting precision half-wave rectifier. Use a voltage-controlled voltage source (E source) as the op-amp, a diode model, and resistors. Perform a transient simulation.","Generate a measured SPICE netlist for a precision rectifier circuit that outputs the positive half of a sinusoidal input. Include a .TRAN analysis and .MEASURE statements to verify the peak, minimum, and average output voltages."],"measurements":[{"name":"maxv","key":"maxv","index":0,"value":1.9858479599161658,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 tran"},{"name":"minv","key":"minv","index":0,"value":-0.001903164464723663,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 tran"},{"name":"avgr","key":"avgr","index":0,"value":0.6157329546093936,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 tran"}]} +{"id":"deepseek:01568_4b2d2e83dcd9259b:641a98065ea39b7f","source":"deepseek","example_id":"01568_4b2d2e83dcd9259b","test_name":"test_test_1568_opamp_active_clamp_diode_feedback_4b2d2e83dcd9259b","netlist_hash":"641a98065ea39b7f","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Create a SPICE netlist for an inverting op-amp active clamp that limits the output to approximately \u00b15 volts. The input is a 2V amplitude 1kHz sine wave, and the circuit uses a diode feedback network with DC reference voltages.","pair_ids":["7471cb1a65c34c58","c2b410b0e6518410","cc3997b623e65fc6"],"prompts":["Create a SPICE netlist for an inverting op-amp active clamp that limits the output to approximately \u00b15 volts. The input is a 2V amplitude 1kHz sine wave, and the circuit uses a diode feedback network with DC reference voltages.","Design an op-amp based active clamp with diode feedback. The op-amp is configured as an inverting amplifier with gain -10, and clamping diodes set thresholds at about 5V and -5V. Simulate transient response for a sinusoidal input.","Generate a measured SPICE netlist of an active precision clamp using an op-amp (modeled as an E-source) and two feedback diodes with DC offset voltages to clamp the output symmetrically at \u00b15V. Include appropriate analyses and measurements."],"measurements":[{"name":"min_out","key":"min_out","index":0,"value":-4.965696079661797,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 TRAN"},{"name":"max_out","key":"max_out","index":0,"value":4.965688023084169,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"},{"name":"max_in","key":"max_in","index":0,"value":1.9999991842155667,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"},{"name":"min_in","key":"min_in","index":0,"value":-1.99953012653404,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00522_2f86b780cef119ff:9c3a5c29dc075ebe","source":"deepseek","example_id":"00522_2f86b780cef119ff","test_name":"test_test_522_opamp_allpass_phase_shifter_2f86b780cef119ff","netlist_hash":"9c3a5c29dc075ebe","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":2,"representative_prompt":"All-pass filter with ideal op-amp (E source), two 10k\u03a9 resistors, and a 10nF capacitor.","pair_ids":["c484ba15d6fc7f74","621ab4df176124ed"],"prompts":["All-pass filter with ideal op-amp (E source), two 10k\u03a9 resistors, and a 10nF capacitor.","AC analysis from 1 Hz to 100 kHz measures constant 0 dB magnitude and phase shifting from 0 to -\u03c0 rad."],"measurements":[{"name":"phase_100k","key":"phase_100k","index":0,"value":-3.1097643521908873,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"phase_1","key":"phase_1","index":0,"value":-0.0012566368960691475,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"mag_1","key":"mag_1","index":0,"value":-1.73717619055726e-05,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"phase_f0","key":"phase_f0","index":0,"value":-1.5702818059335173,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"mag_f0","key":"mag_f0","index":0,"value":-1.7371761905541547e-05,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"mag_100k","key":"mag_100k","index":0,"value":-1.737176190460827e-05,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:00637_f930836b69851fff:4c04ce0ad58911dd","source":"deepseek","example_id":"00637_f930836b69851fff","test_name":"test_test_637_rc_differentiator_f930836b69851fff","netlist_hash":"4c04ce0ad58911dd","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"RC high-pass filter acting as a differentiator for a 1kHz square wave","pair_ids":["cac50c1f910c8933","e143e726639f5b7a","bd1564f53e4f8f5d"],"prompts":["RC high-pass filter acting as a differentiator for a 1kHz square wave","Time constant \u03c4=1\u00b5s produces sharp spikes at edges","Positive spikes reach near +5V, negative spikes near -5V"],"measurements":[{"name":"vmin","key":"vmin","index":0,"value":-4.975081009719972,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 TRAN"},{"name":"vmax","key":"vmax","index":0,"value":4.975083428263982,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:01167_2a4864f294863e04:cf57d769a5840ea1","source":"deepseek","example_id":"01167_2a4864f294863e04","test_name":"test_test_1167_bjt_bistable_multivibrator_latch_2a4864f294863e04","netlist_hash":"cf57d769a5840ea1","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"BJT bistable latch with set/reset inputs using cross-coupled NPN transistors and diode steering.","pair_ids":["bfeca8c564b57b9c","62991bec2c44fde7","5330b5077feed580"],"prompts":["BJT bistable latch with set/reset inputs using cross-coupled NPN transistors and diode steering.","Initial conditions (UIC) and small capacitive loads (10pF) ensure a well-defined power-up state (Q low, ~0.2V) and smooth transitions.","Set pulse at 10\u00b5s forces Q high; reset pulse at 30\u00b5s returns Q low."],"measurements":[{"name":"t_rise","key":"t_rise","index":0,"value":1.0042656071112125e-05,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 TRAN"},{"name":"v_out_40u","key":"v_out_40u","index":0,"value":0.07944909734550441,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"v_out_20u","key":"v_out_20u","index":0,"value":4.614423585403061,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"t_fall","key":"t_fall","index":0,"value":3.003862976193509e-05,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00704_e9ad9b0267e251ca:fe7bc60aced2a65a","source":"deepseek","example_id":"00704_e9ad9b0267e251ca","test_name":"test_test_704_dual_rectifier_supply_e9ad9b0267e251ca","netlist_hash":"fe7bc60aced2a65a","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Design a dual-output power supply that rectifies a 60Hz AC input into both a positive and a negative DC voltage using a center-tapped transformer simulated by two out-of-phase sine sources.","pair_ids":["ac97039a3791ae26","e8806aee7cc8cb25","2cc3b9aa4d7c783b"],"prompts":["Design a dual-output power supply that rectifies a 60Hz AC input into both a positive and a negative DC voltage using a center-tapped transformer simulated by two out-of-phase sine sources.","Create a SPICE netlist for a bipolar full-wave rectifier that generates +9V and -9V outputs from a 10V peak AC supply, including filter capacitors and load resistors.","Simulate a dual-polarity rectifier circuit with a 60Hz sinusoidal input, two diodes, two large filter capacitors, and measure the steady-state output voltages and ripple."],"measurements":[{"name":"vpos_min","key":"vpos_min","index":0,"value":7.669279750755858,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 TRAN"},{"name":"vpos_max","key":"vpos_max","index":0,"value":8.846840241889106,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"},{"name":"vpos_avg","key":"vpos_avg","index":0,"value":8.211408109407198,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 TRAN"},{"name":"vneg_min","key":"vneg_min","index":0,"value":-8.846840332982534,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 TRAN"},{"name":"vneg_avg","key":"vneg_avg","index":0,"value":-8.327336588064258,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 TRAN"},{"name":"vneg_max","key":"vneg_max","index":0,"value":-7.6692796294305605,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00336_247b49a0ed2565bb:aac636b8aa4b025d","source":"deepseek","example_id":"00336_247b49a0ed2565bb","test_name":"test_test_336_op_amp_integrator_with_reset_switch_approximation_247b49a0ed2565bb","netlist_hash":"aac636b8aa4b025d","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Design an op-amp integrator with a reset switch using a behavioral voltage-controlled voltage source. The integrator should have an input resistor of 10k and a feedback capacitor of 0.1uF. Apply a 1V, 1ms pulse and measure the output before and after the reset.","pair_ids":["d232aec8a90b40d0","f5ec534a181fda02","24bab4f847af316f"],"prompts":["Design an op-amp integrator with a reset switch using a behavioral voltage-controlled voltage source. The integrator should have an input resistor of 10k and a feedback capacitor of 0.1uF. Apply a 1V, 1ms pulse and measure the output before and after the reset.","Simulate an operational amplifier integrator with reset using an E-source op-amp model. Use R=10k, C=0.1uF, and a switch across the capacitor controlled by a pulse. Measure the output voltage at 1.4ms and 2.1ms.","Create a SPICE netlist for an op-amp integrator circuit that integrates a 1V, 1ms pulse and then resets the integrator using a switch. Use ideal op-amp and measure the output before and after reset."],"measurements":[{"name":"vout_reset","key":"vout_reset","index":0,"value":-0.0989835372829632,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"vout_int","key":"vout_int","index":0,"value":-1.0009241222073966,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:01464_1919307ebf0103ec:1919307ebf0103ec","source":"deepseek","example_id":"01464_1919307ebf0103ec","test_name":"test_test_1464_op_amp_subtractor_with_matched_resistor_ratios_1919307ebf0103ec","netlist_hash":"1919307ebf0103ec","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Op-amp subtractor with all resistors matched (10 k\u03a9) and op-amp gain 100 k.","pair_ids":["614bebd439f49746","abec220d065f4f07","f73155608b3af920"],"prompts":["Op-amp subtractor with all resistors matched (10 k\u03a9) and op-amp gain 100 k.","For DC, V1 = 1 V, V2 = 2 V \u21d2 Vout = 2 - 1 = 1 V.","For AC, V1 has 0.5 V, V2 has -0.5 V \u21d2 differential input -1 V, Vout = -1 V."],"measurements":[{"name":"gain_db","key":"gain_db","index":0,"value":-0.0001737160556073316,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"vout_ac","key":"vout_ac","index":0,"value":-0.9999800003999919,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"vout_dc","key":"vout_dc","index":0,"value":0.9999800004006829,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#3 DC"}]} +{"id":"deepseek:02007_2558774621244a4d:10f92e68a452642a","source":"deepseek","example_id":"02007_2558774621244a4d","test_name":"test_test_2007_linear_post_regulator_after_switching_preregulator_2558774621244a4d","netlist_hash":"10f92e68a452642a","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Design a linear post-regulator following a buck switching preregulator. Model the buck converter with a switch, diode, inductor and capacitor. Use a NPN pass transistor and an op-amp error amplifier for the linear stage. Simulate transient and DC operating point.","pair_ids":["8ee217594561e265","dfd60f54ca66b0ba","048afbcbb1a7a7c9","db6a21179109acd0"],"prompts":["Design a linear post-regulator following a buck switching preregulator. Model the buck converter with a switch, diode, inductor and capacitor. Use a NPN pass transistor and an op-amp error amplifier for the linear stage. Simulate transient and DC operating point.","Create a SPICE netlist for a power supply consisting of a 12V-to-5V buck preregulator and a 3.3V linear post-regulator using an NPN transistor and op-amp. Include .OP and .TRAN analyses and measure average voltages and ripples.","Simulate a linear post-regulator after a switching converter. The switching stage uses a pulse-width modulated switch, a catch diode, an LC filter. The linear stage uses a pass transistor and an op-amp with resistive feedback. Perform operating point and transient analyses and provide measurements.","Build a circuit with a buck preregulator and a linear post-regulator to achieve a low-ripple output. Use behavioral voltage source as the error amplifier and an NPN transistor. Add .MEASURE statements to evaluate performance."],"measurements":[{"name":"i_load","key":"i_load","index":0,"value":0.32575186151224766,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#2 TRAN"},{"name":"ripple_out","key":"ripple_out","index":0,"value":9.325873406851315e-15,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#2 TRAN"},{"name":"ripple_pre","key":"ripple_pre","index":0,"value":0.16884802998582238,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#2 TRAN"},{"name":"avg_pre","key":"avg_pre","index":0,"value":4.571094302366831,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#2 TRAN"},{"name":"avg_out","key":"avg_out","index":0,"value":3.2575186151219366,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#2 TRAN"}]} +{"id":"deepseek:00871_266ae89d9a9ebae8:322835b749188597","source":"deepseek","example_id":"00871_266ae89d9a9ebae8","test_name":"test_test_871_greinacher_voltage_quadrupler_266ae89d9a9ebae8","netlist_hash":"322835b749188597","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Greinacher voltage quadrupler using four diodes and four capacitors","pair_ids":["2c203febfe094b2a","9029dc5ddbcf8aef","9b8ab40bdcaca524"],"prompts":["Greinacher voltage quadrupler using four diodes and four capacitors","Input: 10V peak, 1kHz sinusoidal voltage source","Output: DC voltage of approximately 38\u201340V with small ripple"],"measurements":[{"name":"VOUT_RIPPLE","key":"VOUT_RIPPLE","index":0,"value":0.035199827218932,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#1 TRAN"},{"name":"VOUT_AVG","key":"VOUT_AVG","index":0,"value":37.48691961235788,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:01435_f84e2fd5de2dfaaf:0b42839ee982e3f1","source":"deepseek","example_id":"01435_f84e2fd5de2dfaaf","test_name":"test_test_1435_inverting_opamp_bias_comp_f84e2fd5de2dfaaf","netlist_hash":"0b42839ee982e3f1","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Inverting op-amp amplifier with voltage gain set to -10 (Rf/Rin = 10k/1k), including an input bias current compensation resistor Rbias = 909 ohms (Rin||Rf) on the non-inverting terminal.","pair_ids":["b859555d222071ba","c20aea5cd2c336c2","2af076d947e72d83"],"prompts":["Inverting op-amp amplifier with voltage gain set to -10 (Rf/Rin = 10k/1k), including an input bias current compensation resistor Rbias = 909 ohms (Rin||Rf) on the non-inverting terminal.","Ideal op-amp modeled with a voltage-controlled voltage source E1 having a gain of 100,000.","DC operating point verifies output offset near 0 V; AC analysis confirms gain magnitude of 10 (20 dB)."],"measurements":[{"name":"gain_lin","key":"gain_lin","index":0,"value":-9.998900120986692,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"gain_db","key":"gain_db","index":0,"value":19.999044604685594,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#2 AC"},{"name":"vout_dc","key":"vout_dc","index":0,"value":0,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#3 DC"}]} +{"id":"deepseek:01355_02f0bd398b039959:5394cbb65a1a4c29","source":"deepseek","example_id":"01355_02f0bd398b039959","test_name":"test_test_1355_cmos_inverter_02f0bd398b039959","netlist_hash":"5394cbb65a1a4c29","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Design a CMOS inverter using a 5V supply with a 1 pF capacitive load. Apply a 0 to 5V pulse input at 10 MHz and measure the output rise and fall times.","pair_ids":["17acf22b6e4cb463","53b91e6f78569a2e","ad3e37a49ff537ca"],"prompts":["Design a CMOS inverter using a 5V supply with a 1 pF capacitive load. Apply a 0 to 5V pulse input at 10 MHz and measure the output rise and fall times.","Create a CMOS inverter with NMOS and PMOS models. Use a 5V power supply, a 1 pF load capacitor, and a pulse input switching between 0 and 5V. Measure the 10% to 90% rise time and 90% to 10% fall time.","Simulate a standard CMOS inverter. Provide a 0\u20135V pulse as input, load the output with 1 pF, and extract the rise and fall delays using .MEAS statements."],"measurements":[{"name":"trise","key":"trise","index":0,"value":1.8296689414778857e-09,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 TRAN"},{"name":"tfall","key":"tfall","index":0,"value":1.8488411794606587e-09,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:01353_f577d51eeb370885:248df222f21aac00","source":"deepseek","example_id":"01353_f577d51eeb370885","test_name":"test_test_1353_cmos_inverter_rise_fall_f577d51eeb370885","netlist_hash":"248df222f21aac00","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Design a standard CMOS inverter with a 1pF capacitive load and measure the output rise and fall times.","pair_ids":["21bea9fb8ad3384a","8f18e4904eaab973","df1598524687da8f","82badbd4035b2c4e"],"prompts":["Design a standard CMOS inverter with a 1pF capacitive load and measure the output rise and fall times.","Create a CMOS inverter using 3.3V supply, input pulse from 0 to 3.3V, 1pF load, and extract the 10%-90% rise and fall times.","Simulate a CMOS inverter driving a 1pF capacitor. The input is a 0-3.3V pulse. Use .MEASURE to find the rise and fall times of the output voltage.","Build a CMOS inverter with W/L=10u/1u for PMOS and 5u/1u for NMOS. Apply a pulsed input and report the rise and fall times of the output."],"measurements":[{"name":"t_rise","key":"t_rise","index":0,"value":1.2261062788676526e-09,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 TRAN"},{"name":"t_fall","key":"t_fall","index":0,"value":1.3049216175915409e-09,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00006_2618ae70ad30e62f:f0538c8b52df5e7b","source":"deepseek","example_id":"00006_2618ae70ad30e62f","test_name":"test_test_6_resistive_pi_attenuator_2618ae70ad30e62f","netlist_hash":"f0538c8b52df5e7b","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Design a resistive pi attenuator for 6 dB attenuation and 50-ohm characteristic impedance.","pair_ids":["a6d9a4c42e1cdfce","63cdeadc3eb85176","3f3f8f01c1f5bb26"],"prompts":["Design a resistive pi attenuator for 6 dB attenuation and 50-ohm characteristic impedance.","Compute shunt resistors as 150 \u03a9 and series resistor as 37.5 \u03a9 using standard pi pad formulas.","Drive the attenuator directly with a 1 V AC source (no source impedance) to achieve Vout = 0.5 V, corresponding to -6 dB voltage attenuation."],"measurements":[{"name":"att_db","key":"att_db","index":0,"value":-6.020599913279624,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"vout_mag","key":"vout_mag","index":0,"value":0.5,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"}]} +{"id":"deepseek:00246_7fecaa8f9595bd93:24be421025227f95","source":"deepseek","example_id":"00246_7fecaa8f9595bd93","test_name":"test_test_246_nmos_common_source_resistive_load_7fecaa8f9595bd93","netlist_hash":"24be421025227f95","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Create a SPICE netlist for an NMOS common-source amplifier with a resistive load, performing DC operating point and AC analysis, and measure the DC drain voltage and mid-band gain.","pair_ids":["5cad6e07df41a869","a4b5d6fde5f44d68","68a912729c4c27ce"],"prompts":["Create a SPICE netlist for an NMOS common-source amplifier with a resistive load, performing DC operating point and AC analysis, and measure the DC drain voltage and mid-band gain.","Design an NMOS common-source amplifier with a resistive load, bias the gate at 1V, and run AC simulation to find the voltage gain at 1 kHz.","Write a SPICE deck for a single-stage NMOS amplifier using a 10k resistive load, with VDD=5V, and measure its small-signal gain in dB."],"measurements":[{"name":"gain_dB","key":"gain_dB","index":0,"value":19.980281653868303,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"Vd_OP","key":"Vd_OP","index":0,"value":2.3809523581814056,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 OP"}]} +{"id":"deepseek:00605_36b0372503fcd201:cca58dff49a7e142","source":"deepseek","example_id":"00605_36b0372503fcd201","test_name":"test_test_605_constant_k_lowpass_filter_36b0372503fcd201","netlist_hash":"cca58dff49a7e142","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Constant-k low-pass filter designed for 50 \u03a9 characteristic impedance and 10 MHz cutoff using two cascaded T-sections.","pair_ids":["a380c58b3031d2ed","02622d3518f3a87a","78a61029e38aaf07"],"prompts":["Constant-k low-pass filter designed for 50 \u03a9 characteristic impedance and 10 MHz cutoff using two cascaded T-sections.","Includes source and load resistors of 50 \u03a9 each, and an AC analysis from 1 kHz to 100 MHz.","Measures -3 dB bandwidth, attenuation at 20 MHz, and impedance matching at 1 kHz."],"measurements":[{"name":"v_1","key":"v_1","index":0,"value":1,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"ratio_match","key":"ratio_match","index":0,"value":0.5000000000251156,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 AC"},{"name":"f3dB","key":"f3dB","index":0,"value":9118816.924056208,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 AC"},{"name":"v_in","key":"v_in","index":0,"value":0.5000000000251156,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"vout_low_db","key":"vout_low_db","index":0,"value":-6.020599913279691,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"vout_20M_db","key":"vout_20M_db","index":0,"value":-46.9782432294607,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"att_2fc","key":"att_2fc","index":0,"value":40.95764331618101,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 AC"}]} +{"id":"deepseek:00578_f5a061bbb3f7cdfa:8399226360644805","source":"deepseek","example_id":"00578_f5a061bbb3f7cdfa","test_name":"test_test_578_third_order_chebyshev_lpf_f5a061bbb3f7cdfa","netlist_hash":"8399226360644805","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Third-order Chebyshev low-pass filter with 1 dB passband ripple","pair_ids":["b75c05ef5a24ec7e","7f4dc118b5c662b0","3c24e8137001a395","f411fb8d4c7a3a0d"],"prompts":["Third-order Chebyshev low-pass filter with 1 dB passband ripple","Cutoff frequency of 1 kHz using a ladder topology","Uses 50 ohm source and load terminations","Elements: L1=16.102 mH, C2=3.164 uF, L3=16.102 mH"],"measurements":[{"name":"max_gain","key":"max_gain","index":0,"value":-6.020610032345857,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 ac"},{"name":"min_pass","key":"min_pass","index":0,"value":-7.020632277826671,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 ac"},{"name":"gain_at_1k","key":"gain_at_1k","index":0,"value":-7.019130649344691,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 ac"}]} +{"id":"deepseek:01289_f24408dd5ce5793d:6171d00cb75c5502","source":"deepseek","example_id":"01289_f24408dd5ce5793d","test_name":"test_test_1289_wide_swing_cascode_current_mirror_f24408dd5ce5793d","netlist_hash":"6171d00cb75c5502","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Wide-swing cascode current mirror using self-biased cascode generator.","pair_ids":["ca90ce7d53a591ff","b8574a687d93159b","9a129a897a1d791a"],"prompts":["Wide-swing cascode current mirror using self-biased cascode generator.","V_SENSE oriented to measure sinking current as positive.","ROUT computed from two-point DC difference with positive currents."],"measurements":[{"name":"ROUT","key":"ROUT","index":0,"value":4107686.6992285363,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#2 DC"},{"name":"IOUT5","key":"IOUT5","index":0,"value":0.0010001992371006137,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"VCOMP","key":"VCOMP","index":0,"value":1.3481093326798848,"value_is_finite":true,"success":true,"measurement_type":"FIND_WHEN","simulation_name":"#2 DC"},{"name":"IOUT51","key":"IOUT51","index":0,"value":0.0010002235817031411,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"}]} +{"id":"deepseek:00639_973c7cf42579dfe8:28fc71d8c8eb7529","source":"deepseek","example_id":"00639_973c7cf42579dfe8","test_name":"test_test_639_rc_differentiator_edge_detector_973c7cf42579dfe8","netlist_hash":"28fc71d8c8eb7529","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Design an RC differentiator circuit that generates voltage spikes at the rising and falling edges of a 5V, 100 kHz square wave. Use a 1 nF capacitor and a 1 k\u03a9 resistor. Run a transient analysis to observe the output and measure the peak voltages.","pair_ids":["b81e33e79764c08a","8f6b5f5f83d0c9f6","ad775406ef56a960"],"prompts":["Design an RC differentiator circuit that generates voltage spikes at the rising and falling edges of a 5V, 100 kHz square wave. Use a 1 nF capacitor and a 1 k\u03a9 resistor. Run a transient analysis to observe the output and measure the peak voltages.","Create a high-pass RC filter with a cutoff frequency around 1.6 kHz to differentiate a pulse signal. Apply a 5V, 10 \u03bcs period pulse with 1 ns edges. Measure the maximum and minimum output voltages.","Implement a passive edge detector using a series capacitor and shunt resistor. The input is a 0-5V square pulse. Find the peak positive and negative spikes across the resistor."],"measurements":[{"name":"pkpk","key":"pkpk","index":0,"value":4.997500372463617,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 TRAN"},{"name":"min_v","key":"min_v","index":0,"value":-4.966043526134277,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 TRAN"},{"name":"max_v","key":"max_v","index":0,"value":4.997500372463617,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00752_9dc98a19943c57ad:3eda6a886d18158e","source":"deepseek","example_id":"00752_9dc98a19943c57ad","test_name":"test_test_752_biased_negative_diode_limiter_9dc98a19943c57ad","netlist_hash":"3eda6a886d18158e","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Design a biased negative diode limiter that clips an input sine wave at approximately -2.7V. Use a 1kHz 5V amplitude sine wave, a 1k resistor, and a diode with a -2V bias voltage.","pair_ids":["6e4a1361a734bf4e","786df6b4a5c50057","9f616cd42cc8895b"],"prompts":["Design a biased negative diode limiter that clips an input sine wave at approximately -2.7V. Use a 1kHz 5V amplitude sine wave, a 1k resistor, and a diode with a -2V bias voltage.","Create a SPICE netlist for a negative diode clipper circuit with a -2V DC bias. Simulate the transient response for a 5V peak sinusoidal input at 1kHz and verify the output voltage limits.","Simulate a biased diode clipping circuit that restricts the negative swing of a sine wave. The diode's cathode should be connected to the output node, with a -2V bias on the anode, and a 1k series resistor from the input. Measure the minimum and maximum output voltages."],"measurements":[{"name":"Vout_max","key":"Vout_max","index":0,"value":4.999857870370058,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"},{"name":"Vout_min","key":"Vout_min","index":0,"value":-2.5610826605267247,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00851_87e8b3029f366404:77d7d5979b8d9055","source":"deepseek","example_id":"00851_87e8b3029f366404","test_name":"test_test_851_zener_reference_buffered_by_emitter_follower_87e8b3029f366404","netlist_hash":"77d7d5979b8d9055","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Zener diode (D1) provides a stable reference voltage of 5.6V when reverse biased through R1.","pair_ids":["2af5c3636cc56d9f","5e9a56b16e020294","8c2222976a6c5f63","d79ac387ebf25ffb"],"prompts":["Zener diode (D1) provides a stable reference voltage of 5.6V when reverse biased through R1.","The NPN transistor (Q1) buffers the Zener voltage, providing output at its emitter with reduced output impedance.","Output voltage is approximately Vzener - Vbe \u2248 5.6V - 0.7V = 4.9V.","Line regulation is measured by varying VCC from 8V to 12V and computing changes in output."],"measurements":[{"name":"VOUT10","key":"VOUT10","index":0,"value":4.945499122946673,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"VOUT8","key":"VOUT8","index":0,"value":4.908466161638783,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"VOUT12","key":"VOUT12","index":0,"value":4.976550891831806,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"}]} +{"id":"deepseek:00045_074f6e47b0d2a6fe:d0d75a376f469ae7","source":"deepseek","example_id":"00045_074f6e47b0d2a6fe","test_name":"test_test_45_two_pole_passive_rc_ladder_lowpass_074f6e47b0d2a6fe","netlist_hash":"d0d75a376f469ae7","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":2,"representative_prompt":"Second-order low-pass filter using two passive RC stages in a ladder configuration.","pair_ids":["df2c814763cdc54a","20d5fab572c125d4"],"prompts":["Second-order low-pass filter using two passive RC stages in a ladder configuration.","The filter provides a -3 dB cutoff near 6 kHz with increasing attenuation at higher frequencies."],"measurements":[{"name":"f3dB","key":"f3dB","index":0,"value":5942.324044210102,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 ac"},{"name":"gain_10k","key":"gain_10k","index":0,"value":-5.9321335848263494,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 ac"},{"name":"gain_100k","key":"gain_100k","index":0,"value":-32.63847692333337,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 ac"}]} +{"id":"deepseek:02201_72040b1b88d0a047:164e99f6647f229f","source":"deepseek","example_id":"02201_72040b1b88d0a047","test_name":"test_test_2201_data_converter_72040b1b88d0a047","netlist_hash":"164e99f6647f229f","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"3-bit flash ADC using a resistor ladder and ideal behavioral comparators (E-sources).","pair_ids":["2deb5ef4d0f9fc86","bca671a708d377bf","4866d333738d3c63","161dbca8bf3e76d4"],"prompts":["3-bit flash ADC using a resistor ladder and ideal behavioral comparators (E-sources).","Resistor string provides 7 equally spaced reference taps at multiples of 5/8 V.","Comparators produce a thermometer code output that steps sequentially as input rises.","DC sweep verifies exact threshold voltages; transient pulse confirms timing relative to linear ramp."],"measurements":[{"name":"t_rise7","key":"t_rise7","index":0,"value":1.2509999999999976e-07,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 TRAN"},{"name":"t_rise6","key":"t_rise6","index":0,"value":2.500999999999995e-07,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 TRAN"},{"name":"v_th1","key":"v_th1","index":0,"value":4.375,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#2 DC"},{"name":"t_rise2","key":"t_rise2","index":0,"value":7.500999999999962e-07,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 TRAN"},{"name":"t_rise1","key":"t_rise1","index":0,"value":8.750999999999923e-07,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 TRAN"},{"name":"t_rise3","key":"t_rise3","index":0,"value":6.251e-07,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 TRAN"},{"name":"v_th6","key":"v_th6","index":0,"value":1.245,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#2 DC"},{"name":"v_th7","key":"v_th7","index":0,"value":0.625,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#2 DC"},{"name":"v_th5","key":"v_th5","index":0,"value":1.875,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#2 DC"},{"name":"v_th4","key":"v_th4","index":0,"value":2.495,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#2 DC"},{"name":"t_rise5","key":"t_rise5","index":0,"value":3.7510000000000235e-07,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 TRAN"},{"name":"t_rise4","key":"t_rise4","index":0,"value":5.001000000000039e-07,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 TRAN"},{"name":"v_th3","key":"v_th3","index":0,"value":3.125,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#2 DC"},{"name":"v_th2","key":"v_th2","index":0,"value":3.745,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#2 DC"}]} +{"id":"deepseek:01461_d5039429a041a95e:f0c915c64b18d50f","source":"deepseek","example_id":"01461_d5039429a041a95e","test_name":"test_test_1461_opamp_averaging_4input_d5039429a041a95e","netlist_hash":"f0c915c64b18d50f","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Inverting summing amplifier with four equal 10k input resistors.","pair_ids":["277df441c37cc26b","3dfbb826f002f34c","45d5f2bc82786bfc","e45bf2d50847f9df"],"prompts":["Inverting summing amplifier with four equal 10k input resistors.","Feedback resistor is 2.5k (1/4 of input resistors), so gain per input is -0.25.","Four DC sources (1V,2V,3V,4V) produce output -0.25*(1+2+3+4) = -2.5V.","AC analysis with V1 having AC 1V yields output magnitude 0.25V at 1kHz."],"measurements":[{"name":"VMAG_1k","key":"VMAG_1k","index":0,"value":0.24999500009999798,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 ac"},{"name":"VOUT_DC","key":"VOUT_DC","index":0,"value":-2.49995000099998,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 dc"}]} +{"id":"deepseek:01470_25da8c2ed85ac6ea:4b22fc8bd0cfb90d","source":"deepseek","example_id":"01470_25da8c2ed85ac6ea","test_name":"test_test_1470_opamp_subtractor_25da8c2ed85ac6ea","netlist_hash":"4b22fc8bd0cfb90d","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"The circuit is a difference amplifier with four 10k resistors and an ideal op-amp (gain 100k).","pair_ids":["bf59e7695fb62a0a","85463be2cdacd1e6","398b69cb81b7164e"],"prompts":["The circuit is a difference amplifier with four 10k resistors and an ideal op-amp (gain 100k).","DC analysis is performed via a single-point DC sweep of V1 to compute the operating point.","AC analysis measures the frequency response, showing a flat gain of -1 (0 dB) for the V1 input."],"measurements":[{"name":"GAIN_DB","key":"GAIN_DB","index":0,"value":-0.0001737160556073316,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"VOUT_DC","key":"VOUT_DC","index":0,"value":0.9999800004006829,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"}]} +{"id":"deepseek:00412_3ebce98e2539369d:1fe71146dd018c95","source":"deepseek","example_id":"00412_3ebce98e2539369d","test_name":"test_test_412_oscillator_3ebce98e2539369d","netlist_hash":"1fe71146dd018c95","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"Classic BJT astable multivibrator powered by a 5V DC source.","pair_ids":["40ce852d3fa45a53","7d6eafcec6e3f8f8","03003dc15244e96d","b5b255999f62a818","4f968bf760ecfd7e"],"prompts":["Classic BJT astable multivibrator powered by a 5V DC source.","Utilizes two NPN transistors with symmetrical collector (1k) and base (10k) resistors.","Cross-couples 1nF capacitors between each collector and the opposite base to generate oscillations.","Transient analysis runs for 200 \u00b5s to capture multiple steady-state cycles.","Measurements taken on later waveform edges to avoid startup transients, ensuring accurate duty cycle."],"measurements":[{"name":"high_time","key":"high_time","index":0,"value":6.778040949000804e-06,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 TRAN"},{"name":"period","key":"period","index":0,"value":1.4896701776522108e-05,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 TRAN"},{"name":"freq","key":"freq","index":0,"value":67128.95344230132,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 TRAN"},{"name":"duty","key":"duty","index":0,"value":0.4550027952954869,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:01648_9ab2ade030d6a578:208a0e2979a446a4","source":"deepseek","example_id":"01648_9ab2ade030d6a578","test_name":"test_test_1648_active_filter_9ab2ade030d6a578","netlist_hash":"208a0e2979a446a4","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"4th-order Sallen-Key Bessel low-pass filter.","pair_ids":["dcce1d2f086a3a23","483357284d04dd6d","a75ddbac00acf63c"],"prompts":["4th-order Sallen-Key Bessel low-pass filter.","Uses two cascaded unity-gain stages with E-source op-amps.","Cutoff frequency approximately 10 kHz, providing flat passband and monotonic roll-off."],"measurements":[{"name":"mag_10kHz","key":"mag_10kHz","index":0,"value":-2.996461056568217,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"mag_1kHz","key":"mag_1kHz","index":0,"value":-0.027790737654846444,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"f3dB","key":"f3dB","index":0,"value":10004.581675303261,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 AC"}]} +{"id":"deepseek:02282_22a8b5ea86d97959:02816b1cd66ee8d9","source":"deepseek","example_id":"02282_22a8b5ea86d97959","test_name":"test_test_2282_bjt_translinear_multiplier_core_22a8b5ea86d97959","netlist_hash":"02816b1cd66ee8d9","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Added DC level shift of 1.5V to x inputs to prevent saturation of lower differential pair.","pair_ids":["38884ac7f01ce251","752461571cd0c354","188a7e4213342f93"],"prompts":["Added DC level shift of 1.5V to x inputs to prevent saturation of lower differential pair.","Kept tail current 4mA and load resistors 1k to achieve the required gain.","Swept voltage Vx_sweep from -10mV to 10mV around the 1.5V common-mode."],"measurements":[{"name":"vout_at_p10m","key":"vout_at_p10m","index":0,"value":0.14296600353601363,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"vout_at_m10m","key":"vout_at_m10m","index":0,"value":-0.14296600353671352,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"}]} +{"id":"deepseek:01347_f896196803485110:763bf95e1c2341b8","source":"deepseek","example_id":"01347_f896196803485110","test_name":"test_test_1347_cmos_transmission_gate_sample_hold_f896196803485110","netlist_hash":"763bf95e1c2341b8","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Design a CMOS transmission gate used as a sample-and-hold circuit with a 1 kHz sine input and a 50% duty cycle control signal at 1 kHz.","pair_ids":["923d252d4472d521","d02d23ad912f4120","6d1065d3306abf02"],"prompts":["Design a CMOS transmission gate used as a sample-and-hold circuit with a 1 kHz sine input and a 50% duty cycle control signal at 1 kHz.","Create an analog switch using complementary MOSFETs to sample a 1 kHz sine wave and hold the value on a capacitor.","Implement a sample-hold circuit using a CMOS transmission gate with a 5V supply, driven by complementary pulse signals."],"measurements":[{"name":"vout_on","key":"vout_on","index":0,"value":2.9959936554507953,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"vout_sample","key":"vout_sample","index":0,"value":2.5104120682384545,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"vin_on","key":"vin_on","index":0,"value":2.99631449392485,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"vout_hold","key":"vout_hold","index":0,"value":2.5041404170040766,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"vin_hold","key":"vin_hold","index":0,"value":2.0025327169716993,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00163_74289d003631f58f:3d1911206a3d7ab3","source":"deepseek","example_id":"00163_74289d003631f58f","test_name":"test_test_163_cockcroft_walton_voltage_multiplier_74289d003631f58f","netlist_hash":"3d1911206a3d7ab3","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Three-stage Cockcroft-Walton voltage multiplier with 50 Hz, 5 V amplitude input.","pair_ids":["82b8739973f2068f","e14e69441b6a4616","93dc9d35603711db"],"prompts":["Three-stage Cockcroft-Walton voltage multiplier with 50 Hz, 5 V amplitude input.","Uses initial capacitor voltages to quickly reach steady-state within short simulation time.","Output load 1.2 M\u03a9 and 10 \u00b5F capacitors yield ~25 V DC with small ripple."],"measurements":[{"name":"Vripple","key":"Vripple","index":0,"value":0.1006169298397026,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#1 TRAN"},{"name":"Vout_avg","key":"Vout_avg","index":0,"value":24.63706036358483,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00642_6db04111bf328f3d:6d061ff3a08be8ac","source":"deepseek","example_id":"00642_6db04111bf328f3d","test_name":"test_test_642_multi_section_rc_lowpass_anti_alias_6db04111bf328f3d","netlist_hash":"6d061ff3a08be8ac","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Three-section RC low-pass filter for audio ADC anti-aliasing, targeting ~1 kHz cutoff","pair_ids":["729c7dc21281764a","74de999e3d439b1a","6c062fff00bc65db"],"prompts":["Three-section RC low-pass filter for audio ADC anti-aliasing, targeting ~1 kHz cutoff","Uses 1.5k\u03a9 resistors and 33nF capacitors to achieve -3dB near 618 Hz, balancing passband and stopband attenuation","Provides >30 dB attenuation at 10 kHz and >60 dB at 100 kHz"],"measurements":[{"name":"att_10k","key":"att_10k","index":0,"value":-33.75490267000997,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"f3db","key":"f3db","index":0,"value":623.2214948617312,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 AC"},{"name":"att_100k","key":"att_100k","index":0,"value":-89.62520007755688,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:02036_95af3608bb3595be:f5a63e4fee843146","source":"deepseek","example_id":"02036_95af3608bb3595be","test_name":"test_test_2036_high_side_current_sense_amplifier_95af3608bb3595be","netlist_hash":"f5a63e4fee843146","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"High-side current-sense amplifier using two ideal op-amp stages.","pair_ids":["50111f2913e50c8e","a5390de1ce538db5","7d0772c4cdc66f27","b4bf8b5d0608293d"],"prompts":["High-side current-sense amplifier using two ideal op-amp stages.","First stage: differential amplifier with gain 10, sensing shunt voltage (0.05\u03a9) between supply (high) and load (hvp).","Second stage: non-inverting amplifier with gain 10 to scale output to ground-referenced voltage.","Total gain of 100 yields 2.4V output at 0.48A load current (0.024V shunt drop)."],"measurements":[{"name":"VOUT_AT24","key":"VOUT_AT24","index":0,"value":2.408329714817228,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 dc"},{"name":"VOUT_AT0","key":"VOUT_AT0","index":0,"value":0,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 dc"},{"name":"ILOAD_MAX","key":"ILOAD_MAX","index":0,"value":0.4795183239414388,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#2 dc"},{"name":"ILOAD_AT24","key":"ILOAD_AT24","index":0,"value":0.4795183239414388,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 dc"},{"name":"VOUT_MAX","key":"VOUT_MAX","index":0,"value":2.408329714817228,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#2 dc"},{"name":"GAIN_EST","key":"GAIN_EST","index":0,"value":100.44787006351586,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#2 dc"}]} +{"id":"deepseek:01109_63381ab2165a18cc:48c892def4104633","source":"deepseek","example_id":"01109_63381ab2165a18cc","test_name":"test_test_1109_bjt_class_ab_diode_bias_63381ab2165a18cc","netlist_hash":"48c892def4104633","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"Class-AB push-pull output stage using NPN and PNP transistors biased by two diodes to reduce crossover distortion.","pair_ids":["f1506881ac2d3d42","4a919abcb1526757","6b5dd42d63aab869","897d668d842f63fc","545bd4529290b600"],"prompts":["Class-AB push-pull output stage using NPN and PNP transistors biased by two diodes to reduce crossover distortion.","Input 1kHz sine wave directly coupled to the common node of the biasing diodes (midpoint).","Emitter degeneration resistors (1\u03a9) improve thermal stability and linearity.","Load resistor of 100\u03a9 connects output to ground.","Quiescent current set by diode forward voltage and base resistor values (10k\u03a9)."],"measurements":[{"name":"Vout_max","key":"Vout_max","index":0,"value":0.943340255420104,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#2 TRAN"},{"name":"Iq_A1","key":"Iq_A1","index":0,"value":0.0018803516084348042,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#2 TRAN"},{"name":"Vout_min","key":"Vout_min","index":0,"value":-0.9426117226812567,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#2 TRAN"}]} +{"id":"deepseek:01876_31102dcc71e1408c:288ee33101a6c19b","source":"deepseek","example_id":"01876_31102dcc71e1408c","test_name":"test_test_1876_series_pass_linear_regulator_opamp_31102dcc71e1408c","netlist_hash":"288ee33101a6c19b","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Series pass linear regulator using NPN pass transistor (Q1) and op-amp error amplifier (E1) with 2.5V reference.","pair_ids":["87868a582afd31fc","760dbd7c4d3c55c7","2cf2a90af394c3f5"],"prompts":["Series pass linear regulator using NPN pass transistor (Q1) and op-amp error amplifier (E1) with 2.5V reference.","Feedback resistors R1 and R2 set Vout = 5V (Gain = 2).","DC sweep input voltage from 10V to 20V to measure line regulation."],"measurements":[{"name":"VOUT_MAX","key":"VOUT_MAX","index":0,"value":4.999873738212045,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#2 DC"},{"name":"VOUT_MIN","key":"VOUT_MIN","index":0,"value":4.99987373809563,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#2 DC"},{"name":"LINEREG","key":"LINEREG","index":0,"value":1.1641532182693482e-11,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#2 DC"},{"name":"VOUT_NOM","key":"VOUT_NOM","index":0,"value":4.999873738124734,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"}]} +{"id":"deepseek:01748_bb41486784df12b7:66072da47e641ae7","source":"deepseek","example_id":"01748_bb41486784df12b7","test_name":"test_test_1748_op_amp_quadrature_oscillator_bb41486784df12b7","netlist_hash":"66072da47e641ae7","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Three op-amp quadrature oscillator topology: two integrators and one inverter.","pair_ids":["b6c88c57ccb8c8d0","87586c992dc24da3","d71c763b8acf20b2","442088ced3b30f56"],"prompts":["Three op-amp quadrature oscillator topology: two integrators and one inverter.","Uses E sources as ideal op-amps with gain 1e6.","Resistors 10k and capacitors 15.915nF give oscillation frequency about 1kHz.","Initial condition on node n1 starts oscillation."],"measurements":[{"name":"t2","key":"t2","index":0,"value":0,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 tran"},{"name":"t_period","key":"t_period","index":0,"value":0.0010315641460204208,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 tran"},{"name":"t1","key":"t1","index":0,"value":0.0002551517196721649,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 tran"},{"name":"vout1_pp","key":"vout1_pp","index":0,"value":0.1997622150983725,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#1 tran"}]} +{"id":"deepseek:00294_4c45e53a339b0cd3:2d44717a6d2d1fa1","source":"deepseek","example_id":"00294_4c45e53a339b0cd3","test_name":"test_test_294_cmos_nand2_transient_4c45e53a339b0cd3","netlist_hash":"2d44717a6d2d1fa1","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Simulate the transient response of a CMOS 2-input NAND gate using NMOS and PMOS models. Apply 5V pulse inputs and measure propagation delays.","pair_ids":["b139c4a0942cffcf","68f6e45bffe7c681","9a0d770d4a85a5ae"],"prompts":["Simulate the transient response of a CMOS 2-input NAND gate using NMOS and PMOS models. Apply 5V pulse inputs and measure propagation delays.","Create a SPICE netlist for a CMOS NAND2 gate with .MODEL statements, run a 200ns transient analysis, and report the output voltage.","Build a CMOS NAND gate with two PMOS in parallel and two NMOS in series. Pulse both inputs simultaneously and measure the delay from 50% input to 50% output."],"measurements":[{"name":"tphl","key":"tphl","index":0,"value":3.5297989306771074e-10,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 TRAN"},{"name":"tplh","key":"tplh","index":0,"value":1.8618831829841764e-10,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00678_db84172d169c09c0:9a45b0e54a17994c","source":"deepseek","example_id":"00678_db84172d169c09c0","test_name":"test_test_678_t_section_lc_impedance_matching_network_db84172d169c09c0","netlist_hash":"9a45b0e54a17994c","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"T-section LC impedance matching network transforming 50 ohms to 200 ohms at 10 MHz.","pair_ids":["3609aae22d4434fa","4e3ece22066a7f88","f736cd84601dea9e"],"prompts":["T-section LC impedance matching network transforming 50 ohms to 200 ohms at 10 MHz.","Series inductors L1 and L2 and shunt capacitor C1 form the matching network.","AC analysis from 5 MHz to 15 MHz verifies proper impedance matching at the design frequency."],"measurements":[{"name":"V_out_mag","key":"V_out_mag","index":0,"value":0.9999999943701194,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"V_in_mag","key":"V_in_mag","index":0,"value":0.5000155350264752,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:02031_d7f12f68d7a76318:e686f4e55f35e266","source":"deepseek","example_id":"02031_d7f12f68d7a76318","test_name":"test_test_2031_low_side_current_sense_amplifier_d7f12f68d7a76318","netlist_hash":"e686f4e55f35e266","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Low-side current sense amplifier using op-amp with gain of 10","pair_ids":["96c1cd5f56110d3e","da1b6c259bbf01b9","9180b7c30487dcf1"],"prompts":["Low-side current sense amplifier using op-amp with gain of 10","Sense resistor 0.1 ohm converts 1A load to 100mV input","Output voltage measured at 1A DC load current"],"measurements":[{"name":"GAIN","key":"GAIN","index":0,"value":0.999900009997873,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"VOUT_1A","key":"VOUT_1A","index":0,"value":0.999900009997873,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"}]} +{"id":"deepseek:02248_7d6043935690096a:7fe24f1e468bdee3","source":"deepseek","example_id":"02248_7d6043935690096a","test_name":"test_test_2248_switched_cap_7d6043935690096a","netlist_hash":"7fe24f1e468bdee3","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Ideal op\u2011amp (E1) with feedback capacitor Cf forms an integrator.","pair_ids":["0b888708ba769148","98e2800ed3944f47","c74705871d03a066","18f53949fe294ddf"],"prompts":["Ideal op\u2011amp (E1) with feedback capacitor Cf forms an integrator.","Switched capacitor Cs alternates between charging to VIN during \u03c61 and discharging into virtual ground during \u03c62.","Non\u2011overlapping clocks \u03c61/\u03c62 ensure break\u2011before\u2011make operation.","Resistor Rleak prevents floating net issues without affecting integration over 6 \u00b5s."],"measurements":[{"name":"STEP12","key":"STEP12","index":0,"value":-0.5007184553260475,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 TRAN"},{"name":"VOUT5","key":"VOUT5","index":0,"value":-2.503334479200995,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"VOUT4","key":"VOUT4","index":0,"value":-2.002771688986945,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"VOUT3","key":"VOUT3","index":0,"value":-1.5021583814346513,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"VOUT2","key":"VOUT2","index":0,"value":-1.0014908083587575,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"VOUT1","key":"VOUT1","index":0,"value":-0.50077235303271,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"STEP45","key":"STEP45","index":0,"value":-0.5005627902140501,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 TRAN"},{"name":"STEP34","key":"STEP34","index":0,"value":-0.5006133075522936,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 TRAN"},{"name":"STEP23","key":"STEP23","index":0,"value":-0.5006675730758938,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:02181_488c6edf456db10a:ecc5bba65b3a5c82","source":"deepseek","example_id":"02181_488c6edf456db10a","test_name":"test_test_2181_r2r_dac_4bit_opamp_488c6edf456db10a","netlist_hash":"ecc5bba65b3a5c82","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"4-bit R-2R DAC with op-amp voltage follower buffer","pair_ids":["cab3eb5de80bb8ab","4e438c0b8d60702d","f12df783d463084d","ba257f94ee1ab412"],"prompts":["4-bit R-2R DAC with op-amp voltage follower buffer","Digital inputs V3 (MSB) to V0 (LSB) are 5V or 0V","Output taken from node n3 (MSB junction) to get correct binary weighting","R=1k, 2R=2k, with 2R termination to ground at LSB end"],"measurements":[{"name":"stepout","key":"stepout","index":0,"value":0.3124968750312497,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#2 DC"},{"name":"maxout","key":"maxout","index":0,"value":4.687453125468745,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#2 DC"},{"name":"minout","key":"minout","index":0,"value":0,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#2 DC"}]} +{"id":"deepseek:00282_595ebbcfc3c92eca:a4398f18d9a0c452","source":"deepseek","example_id":"00282_595ebbcfc3c92eca","test_name":"test_test_282_jfet_common_source_amplifier_595ebbcfc3c92eca","netlist_hash":"a4398f18d9a0c452","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"JFET common-source amplifier with voltage-divider biasing.","pair_ids":["a1a0d2c5ca4ae3c7","4ff9a8e8fa7b2076","db94d94b2f19b1cc"],"prompts":["JFET common-source amplifier with voltage-divider biasing.","Source bypass capacitor CS ensures maximum gain at mid-band.","Coupling capacitors Cin and Cout block DC and set low-frequency response."],"measurements":[{"name":"gain","key":"gain","index":0,"value":16.466212022044417,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"phase","key":"phase","index":0,"value":-3.1400598502584174,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"}]} +{"id":"deepseek:00097_d17588d5eabbbf78:9a2c43ec86839b55","source":"deepseek","example_id":"00097_d17588d5eabbbf78","test_name":"test_test_97_pi_network_matching_d17588d5eabbbf78","netlist_hash":"9a2c43ec86839b55","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Pi-network matching circuit designed for a 50 Ohm source and load at 100 MHz.","pair_ids":["07a3ddc0490734ca","8f13765f6d48344b","95132764a0cf7fb2"],"prompts":["Pi-network matching circuit designed for a 50 Ohm source and load at 100 MHz.","Uses two 31.83 pF capacitors and one 79.58 nH inductor to achieve impedance transformation.","At resonance, the input impedance is 50 Ohms, resulting in voltage division where both input and output voltages are half of the source voltage."],"measurements":[{"name":"gain_db","key":"gain_db","index":0,"value":-6.020599917663927,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"vm_in","key":"vm_in","index":0,"value":0.5000158864930904,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"vm_out","key":"vm_out","index":0,"value":0.4999999997476193,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:02213_32fdba3e75857d31:66f37d5eb166a7dc","source":"deepseek","example_id":"02213_32fdba3e75857d31","test_name":"test_test_2213_single_slope_adc_32fdba3e75857d31","netlist_hash":"66f37d5eb166a7dc","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"This netlist models a single-slope ADC front-end composed of a ramp generator and a comparator.","pair_ids":["dd09ac7277ce7754","24b654f5535f1614","e442e6868ab6aefe","4a0865c6f9bb86cb"],"prompts":["This netlist models a single-slope ADC front-end composed of a ramp generator and a comparator.","The ramp is generated by a constant current source ICHG charging capacitor C1, reset by a pulse-controlled switch.","The comparator is an ideal voltage-controlled voltage source with saturation limits, comparing the input voltage VIN to the ramp voltage.","The .MEAS statement captures the ramp voltage at the moment the comparator output falls through 2.5V, indicating the ramp has exceeded the input. This measured voltage corresponds to the digitized value of the input."],"measurements":[{"name":"vmeas","key":"vmeas","index":0,"value":2.499975,"value_is_finite":true,"success":true,"measurement_type":"FIND_WHEN","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:01602_94beaff161d96bfd:ab0a6bb1c68dfcda","source":"deepseek","example_id":"01602_94beaff161d96bfd","test_name":"test_test_1602_window_comparator_94beaff161d96bfd","netlist_hash":"ab0a6bb1c68dfcda","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Two reference voltages (2 V and 3 V) set the window boundaries.","pair_ids":["a83301a34b605955","3feeb0dd04235322","c5ff0cc7da5c4146"],"prompts":["Two reference voltages (2 V and 3 V) set the window boundaries.","Voltage-controlled sources implement comparators and logical AND to produce 5 V output when input is within the window.","PULSE input sweeps from 1 V to 4 V with 1 ms rise/fall, ensuring the output pulses briefly during each crossing of the window."],"measurements":[{"name":"win_width","key":"win_width","index":0,"value":0.00032,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00487_4f2f23273878254c:dd46c97f2a9c1847","source":"deepseek","example_id":"00487_4f2f23273878254c","test_name":"test_test_487_rc_snubber_4f2f23273878254c","netlist_hash":"dd46c97f2a9c1847","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Pulse source drives a series RL load (10\u03a9, 100\u00b5H) with an RC snubber (100\u03a9, 10nF) in parallel with the inductor.","pair_ids":["02f0fb4ee8ddc099","32534d7f12797555","95c0e9b81c1c1a75"],"prompts":["Pulse source drives a series RL load (10\u03a9, 100\u00b5H) with an RC snubber (100\u03a9, 10nF) in parallel with the inductor.","Snubber limits voltage overshoot and damps ringing when the pulse turns off.","Simulation runs for 200\u00b5s with 0.1\u00b5s steps, using a 100\u00b5s pulse period to allow adequate settling."],"measurements":[{"name":"vmax","key":"vmax","index":0,"value":10.000000000000528,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"},{"name":"v_settle","key":"v_settle","index":0,"value":1.6532580318770914e-19,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:02219_6c100003a5b463df:44a62db68158d9c7","source":"deepseek","example_id":"02219_6c100003a5b463df","test_name":"test_test_2219_sar_adc_sample_comparator_front_end_6c100003a5b463df","netlist_hash":"44a62db68158d9c7","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"A 4\u2011bit SAR ADC front\u2011end with NMOS sample\u2011and\u2011hold (10 pF) and high\u2011gain comparator (gain=1000) for 5\u202fV reference.","pair_ids":["6d279ed666f7a0b8","653f8b160a16bb89","e8e067bf3a2612d1","a7fea6577d542278"],"prompts":["A 4\u2011bit SAR ADC front\u2011end with NMOS sample\u2011and\u2011hold (10 pF) and high\u2011gain comparator (gain=1000) for 5\u202fV reference.","Input 3.2\u202fV is sampled during the first 0.1\u202f\u00b5s clock pulse; the SAR logic then successively approximates the input by toggling the DAC voltage.","Comparator output toggles high, low, high, low as Vin is compared against 2.5\u202fV, 3.75\u202fV, 3.125\u202fV, 3.4375\u202fV.","Final DAC value is 3.125\u202fV, corresponding to binary 1010 (10/16 \u00d7 5\u202fV)."],"measurements":[{"name":"vsample","key":"vsample","index":0,"value":3.165603337093012,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"vout3","key":"vout3","index":0,"value":74.99985093618443,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"vout2","key":"vout2","index":0,"value":-549.9999755858162,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"vout1","key":"vout1","index":0,"value":700.0973750632907,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"vdac_final","key":"vdac_final","index":0,"value":3.125,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"vout4","key":"vout4","index":0,"value":-237.50000409325094,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00575_0926042a6196e63d:28ffc2392b48dc87","source":"deepseek","example_id":"00575_0926042a6196e63d","test_name":"test_test_575_fifth_order_lc_butterworth_lp_0926042a6196e63d","netlist_hash":"28ffc2392b48dc87","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Fifth-order Butterworth low\u2011pass filter using LC ladder topology","pair_ids":["381cdd1d2847955f","f3a8a98e92950d7c","1480cec7254a4df6"],"prompts":["Fifth-order Butterworth low\u2011pass filter using LC ladder topology","Cutoff frequency 1 kHz, source and load impedance 50 \u03a9 each","AC analysis from 1 Hz to 100 kHz with 100 points per decade"],"measurements":[{"name":"phase10k","key":"phase10k","index":0,"value":-1.246634069932802,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 ac"},{"name":"att10k","key":"att10k","index":0,"value":-106.01158935455953,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 ac"},{"name":"f3db","key":"f3db","index":0,"value":998.5114226870513,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 ac"},{"name":"ref_dc","key":"ref_dc","index":0,"value":-6.020599913279777,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 ac"}]} +{"id":"deepseek:01853_4af514b8d32999e3:42b0544bdb784d59","source":"deepseek","example_id":"01853_4af514b8d32999e3","test_name":"test_test_1853_sawtooth_oscillator_4af514b8d32999e3","netlist_hash":"42b0544bdb784d59","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"A constant current source (1 mA) linearly charges a 1 nF capacitor, creating a voltage ramp.","pair_ids":["f9d7f1441ce913fc","78b0407db5977c7d","f38e685579984aa5","945b7786eda63232"],"prompts":["A constant current source (1 mA) linearly charges a 1 nF capacitor, creating a voltage ramp.","A voltage\u2011controlled switch (modeled with RON=10, ROFF=100M, VT=2, VH=0.5) resets the capacitor to near zero when the control pulse is high.","An external PULSE source drives the switch with a 1 \u00b5s on\u2011time and 11 \u00b5s period, resulting in a sawtooth waveform of ~10 V amplitude.","The .IC statement initializes the capacitor voltage to zero to avoid start\u2011up transients."],"measurements":[{"name":"vmin","key":"vmin","index":0,"value":0,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 TRAN"},{"name":"vmax","key":"vmax","index":0,"value":9.997500301542248,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"},{"name":"period","key":"period","index":0,"value":1.09965020350868e-05,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 TRAN"},{"name":"freq","key":"freq","index":0,"value":90938.00890585719,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:02342_04799baff02a4936:b8d02141e175ab55","source":"deepseek","example_id":"02342_04799baff02a4936","test_name":"test_test_2342_charge_pump_04799baff02a4936","netlist_hash":"b8d02141e175ab55","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Classic Greinacher voltage doubler using two diodes and two capacitors.","pair_ids":["de0361a01b32781b","3a49571a6c9a4fb8","08ec00c5f7c514cb","680429f200d7f710"],"prompts":["Classic Greinacher voltage doubler using two diodes and two capacitors.","A square wave with \u00b15V amplitude drives the capacitor-diode ladder.","D1 charges C1 during the negative half-cycle; D2 and C1 pump charge into C2 during the positive half-cycle.","Output capacitor C2 (1 \u03bcF) holds the doubled voltage with a 1 M\u03a9 load."],"measurements":[{"name":"RIPPLE","key":"RIPPLE","index":0,"value":0.021043138950952667,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#1 TRAN"},{"name":"AVG_VOUT","key":"AVG_VOUT","index":0,"value":8.874345832506988,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:01871_f129c059152a92fc:4be940ed52da36b7","source":"deepseek","example_id":"01871_f129c059152a92fc","test_name":"test_test_1871_f2v_charge_pump_f129c059152a92fc","netlist_hash":"4be940ed52da36b7","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Uses voltage-controlled switches S1 and S2 to periodically charge a 1nF flying capacitor Cfly from a 5V reference, then transfer the charge to a 33nF hold capacitor Chold in parallel with a 100k\u03a9 load resistor.","pair_ids":["9f94761af7f90983","bf9897a4ad9b56b2","1cd7cb392cb57b47"],"prompts":["Uses voltage-controlled switches S1 and S2 to periodically charge a 1nF flying capacitor Cfly from a 5V reference, then transfer the charge to a 33nF hold capacitor Chold in parallel with a 100k\u03a9 load resistor.","The non-overlapping 10kHz clock signals for S1 and S2 ensure break-before-make operation, preventing direct short between Vref and Vout.","Output voltage Vout is proportional to input frequency according to Vout \u2248 Vref * Cfly * f * Rload / (1 + Cfly * f * Rload), giving about 2.5V at 10kHz."],"measurements":[{"name":"Vripple","key":"Vripple","index":0,"value":0.0746600340055581,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#1 tran"},{"name":"Vout_avg","key":"Vout_avg","index":0,"value":2.497167033020775,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 tran"}]} +{"id":"deepseek:01987_4435a3a357126c1c:491beb4a9dd60e6e","source":"deepseek","example_id":"01987_4435a3a357126c1c","test_name":"test_test_1987_boost_converter_with_diode_capacitor_snubber_4435a3a357126c1c","netlist_hash":"491beb4a9dd60e6e","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Boost converter stepping 12 V to approximately 24 V with 100 kHz switching.","pair_ids":["b05f91b138f28670","19c4a98b25aaa007","bfa6ca92eddff396"],"prompts":["Boost converter stepping 12 V to approximately 24 V with 100 kHz switching.","Includes a diode-capacitor snubber across the main switch to clamp overvoltage spikes.","Uses ideal switch model and generic diode model."],"measurements":[{"name":"Vout_ripple","key":"Vout_ripple","index":0,"value":0.20296664346908244,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#1 tran"},{"name":"Vout_avg","key":"Vout_avg","index":0,"value":22.863648225771353,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 tran"},{"name":"Iin_avg","key":"Iin_avg","index":0,"value":4.853082028073725,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 tran"}]} +{"id":"deepseek:02167_8f58a0a4863c9e48:f77c4f44d0b1ce80","source":"deepseek","example_id":"02167_8f58a0a4863c9e48","test_name":"test_test_2167_capacitive_sensor_bridge_ac_8f58a0a4863c9e48","netlist_hash":"f77c4f44d0b1ce80","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"Capacitive Wheatstone bridge with AC excitation (10kHz, 1V peak)","pair_ids":["59655bb6d9e8556f","ed4b7368f9e645a1","42e8d413748187cf","d830eadabbea4f89","95caf1ec8a396a7b"],"prompts":["Capacitive Wheatstone bridge with AC excitation (10kHz, 1V peak)","C1, C2, C3 are 100pF; C4 is 101pF to create imbalance","Differential amplifier with gain 10 using ideal op-amp E1 and resistors R1\u2013R4","High-value resistors (10Meg/100Meg) prevent loading of the capacitive bridge","Output voltage and bridge differential voltage are measured at 10kHz via .MEAS"],"measurements":[{"name":"vdiff_mag","key":"vdiff_mag","index":0,"value":0.0024874810540038363,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"vout_ph","key":"vout_ph","index":0,"value":-3.132756567803794,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"vout_mag","key":"vout_mag","index":0,"value":0.02487453692013141,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:00033_dd62652f15547ce6:dd62652f15547ce6","source":"deepseek","example_id":"00033_dd62652f15547ce6","test_name":"test_test_33_rc_delay_high_z_load_dd62652f15547ce6","netlist_hash":"dd62652f15547ce6","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"A simple RC delay line with 1 kOhm and 1 nF, driven by a 5 V pulse source and loaded by a high-impedance node (open circuit). Measure the propagation delay from the input 50% point to the output 50% point.","pair_ids":["a9ef14c9b1385eb8","e2d29ff0c9d77aff","03c63a86fc1e7640"],"prompts":["A simple RC delay line with 1 kOhm and 1 nF, driven by a 5 V pulse source and loaded by a high-impedance node (open circuit). Measure the propagation delay from the input 50% point to the output 50% point.","Low-pass RC filter configured as a delay element for digital signals. The input is a 5 V pulse with 10 ns rise/fall times. Determine the 50% delay.","Passive integrator producing a delayed version of a step input. The output is essentially unloaded. Find the time it takes for the output to reach half the input amplitude after the input step."],"measurements":[{"name":"delay","key":"delay","index":0,"value":7.180962257649621e-07,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00776_4f2d4bad2955f9d8:ddd1df71d999309b","source":"deepseek","example_id":"00776_4f2d4bad2955f9d8","test_name":"test_test_776_diode_steering_input_protection_4f2d4bad2955f9d8","netlist_hash":"ddd1df71d999309b","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"Create a diode-based input protection circuit that limits voltage excursions to safe levels.","pair_ids":["bccea73cd3e36471","67609cd30529d8f1","fe370433c10b112b","7ac6e8a69b8fc7e5","cad6c9bef57da658"],"prompts":["Create a diode-based input protection circuit that limits voltage excursions to safe levels.","Design a clamping circuit using two diodes to steer overvoltage to the supply rails.","I need a protection network for an analog input that prevents voltage from exceeding \u00b15V using diodes.","Build a SPICE simulation for a diode steering network that clamps an input signal swinging \u00b110V to within supply limits.","Simulate a diode clamp with a pulse input and verify that the output is limited to about one diode drop beyond the rails."],"measurements":[{"name":"vmin","key":"vmin","index":0,"value":-5.578871694964869,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 TRAN"},{"name":"vmax","key":"vmax","index":0,"value":5.578871694964868,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00030_0e917fd2bb680fff:c8ff572002936012","source":"deepseek","example_id":"00030_0e917fd2bb680fff","test_name":"test_test_30_rc_pulse_response_0e917fd2bb680fff","netlist_hash":"c8ff572002936012","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"RC low-pass filter with R=10k, C=10nF (tau=100us) driven by a 0-5V pulse after 20us delay.","pair_ids":["e48ce1748fa113be","6614cc8e18710d88","13060ee541d0c686"],"prompts":["RC low-pass filter with R=10k, C=10nF (tau=100us) driven by a 0-5V pulse after 20us delay.","Transient simulation for 1ms with 1us step, capturing the charging and discharging waveform.","Measurements verify initial zero voltage, steady-state near 5V after sufficient settling (at 500us, ~4.96V), and rise time consistent with RC time constant (~220us)."],"measurements":[{"name":"t_rise","key":"t_rise","index":0,"value":0.00021926652861391916,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 tran"},{"name":"v_init","key":"v_init","index":0,"value":0,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 tran"},{"name":"v_steady","key":"v_steady","index":0,"value":4.9593042929044815,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 tran"}]} +{"id":"deepseek:01409_a01cb4b2d7e7d36f:be576fa6347ea79c","source":"deepseek","example_id":"01409_a01cb4b2d7e7d36f","test_name":"test_test_1409_jfet_current_source_a01cb4b2d7e7d36f","netlist_hash":"be576fa6347ea79c","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"N-channel JFET constant-current source with source resistance Rs=200 \u03a9","pair_ids":["08c2a36c29e480d2","4a856685eb275a94","a8c70579854a1107"],"prompts":["N-channel JFET constant-current source with source resistance Rs=200 \u03a9","DC sweep of V_DS from 0 to 20V to observe current saturation","Measurements at 5V and 10V confirm near-constant current"],"measurements":[{"name":"ID5","key":"ID5","index":0,"value":0.0023443556289566426,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"ID10","key":"ID10","index":0,"value":0.0023443556289566426,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"ID_RATIO","key":"ID_RATIO","index":0,"value":1,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#2 DC"}]} +{"id":"deepseek:00322_439736bad3ac53f6:5a14caafd793dad2","source":"deepseek","example_id":"00322_439736bad3ac53f6","test_name":"test_test_322_op_amp_summing_amplifier_with_three_inputs_439736bad3ac53f6","netlist_hash":"5a14caafd793dad2","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Op-amp summing amplifier with three inputs using E1 ideal op-amp (gain 1e5) and resistors R1=10k, R2=20k, R3=30k, feedback Rf=30k.","pair_ids":["22b78ebbf76c35a6","fa008fce00b16050","7117911af44d6ad0"],"prompts":["Op-amp summing amplifier with three inputs using E1 ideal op-amp (gain 1e5) and resistors R1=10k, R2=20k, R3=30k, feedback Rf=30k.","AC analysis from 1 Hz to 1 MHz, measuring low-frequency gain and phase at 1 Hz.","Expected output at non-inverting sum: V_out = -30k*(V1/10k + V2/20k + V3/30k). With AC magnitudes all 1 V, V_out = -5.5 V => 14.8 dB, phase -180\u00b0 = -\u03c0 rad."],"measurements":[{"name":"sum_phase","key":"sum_phase","index":0,"value":-3.141592653589793,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"sum_gain_db","key":"sum_gain_db","index":0,"value":14.80668922540655,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"}]} +{"id":"deepseek:00175_444b9ea5663427ab:93127f24c15a99c8","source":"deepseek","example_id":"00175_444b9ea5663427ab","test_name":"test_test_175_common_emitter_npn_amplifier_444b9ea5663427ab","netlist_hash":"93127f24c15a99c8","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Single-stage common-emitter amplifier with voltage divider bias and emitter degeneration.","pair_ids":["ed8eeccfa8603880","7e160e73d4700791","55ec91807138f3c5"],"prompts":["Single-stage common-emitter amplifier with voltage divider bias and emitter degeneration.","Uses NPN transistor with beta=100 and split emitter resistor (680\u03a9 unbypassed, 330\u03a9 bypassed with 100\u03bcF) to achieve stable DC bias and adjustable AC gain.","Designed for 12V supply, with mid-band voltage gain of approximately 13dB into a 10k\u03a9 load."],"measurements":[{"name":"gain_db","key":"gain_db","index":0,"value":13.068216209774752,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"I_C","key":"I_C","index":0,"value":0.0014568655899133282,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 OP"},{"name":"V_CE","key":"V_CE","index":0,"value":3.6670121238558484,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 OP"}]} +{"id":"deepseek:00770_f03a9e96df22f85e:ec624eea71a68f9c","source":"deepseek","example_id":"00770_f03a9e96df22f85e","test_name":"test_test_770_diode_and_gate_f03a9e96df22f85e","netlist_hash":"ec624eea71a68f9c","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Diode AND gate with two diodes and a pull-up resistor to Vcc (5V).","pair_ids":["b7370ca4778e4b98","d18693b7912166d9","c1ac1af0c8f84159"],"prompts":["Diode AND gate with two diodes and a pull-up resistor to Vcc (5V).","Inputs are 0\u20135V logic pulses. Diodes are oriented with anodes to output and cathodes to inputs.","When both inputs are high (5V), diodes are reverse-biased and output is pulled to Vcc. If any input is low, that diode conducts, pulling output to a diode drop (~0.7V)."],"measurements":[{"name":"vout_11","key":"vout_11","index":0,"value":4.999999999987501,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 TRAN"},{"name":"vout_10","key":"vout_10","index":0,"value":0.6341007535815879,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 TRAN"},{"name":"vout_01","key":"vout_01","index":0,"value":0.6341007535815876,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 TRAN"},{"name":"vout_00","key":"vout_00","index":0,"value":0.6160623144094347,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00737_a5120164a56498ae:598ef13ef5626a58","source":"deepseek","example_id":"00737_a5120164a56498ae","test_name":"test_test_737_diode_peak_detector_a5120164a56498ae","netlist_hash":"598ef13ef5626a58","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"Create a diode peak detector circuit with a bleed resistor.","pair_ids":["43834891f27a68ad","30f222f69a69335d","c5cffdd17d3a78ba","d111b7736c0d5f83","6e89a2e561a55396"],"prompts":["Create a diode peak detector circuit with a bleed resistor.","Simulate a peak detector using a diode, capacitor, and resistor with a sinusoidal input.","Build a simple peak detector netlist that measures the maximum output voltage of a sine wave.","Design a peak detector to capture and hold the peak voltage of an AC signal.","Generate a SPICE simulation for a peak detector with a bleed resistor to observe charging and discharging."],"measurements":[{"name":"steady_output","key":"steady_output","index":0,"value":4.149448261328604,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 TRAN"},{"name":"max_output","key":"max_output","index":0,"value":4.335758270911576,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00011_4ede0ac49dd8b963:15816ac522312ca4","source":"deepseek","example_id":"00011_4ede0ac49dd8b963","test_name":"test_test_11_resistive_t_pad_attenuator_4ede0ac49dd8b963","netlist_hash":"15816ac522312ca4","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Resistive T-pad attenuator with 10 dB attenuation and 50 ohm impedance.","pair_ids":["b7a9c43c659e9dda","726fba2e99330d4e","29a529b148af1045"],"prompts":["Resistive T-pad attenuator with 10 dB attenuation and 50 ohm impedance.","DC operating point simulated with input voltage 5V, output measured across matched 50 ohm load.","AC response verified flat at -10 dB voltage gain."],"measurements":[{"name":"vout_db_f1k","key":"vout_db_f1k","index":0,"value":-10.00011949838608,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"vout_dc","key":"vout_dc","index":0,"value":1.5811170773050822,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"}]} +{"id":"deepseek:00768_c51f0f50a15c37c3:bf396a845f70d94e","source":"deepseek","example_id":"00768_c51f0f50a15c37c3","test_name":"test_test_768_diode_and_gate_c51f0f50a15c37c3","netlist_hash":"bf396a845f70d94e","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Two-input diode AND gate using 1N4148-like diodes (DMOD), a 1k\u03a9 pull-up resistor, and a 5V supply.","pair_ids":["3fffec8d0e595c70","79113eb9395d0442","151074d3c0370835"],"prompts":["Two-input diode AND gate using 1N4148-like diodes (DMOD), a 1k\u03a9 pull-up resistor, and a 5V supply.","Inputs are driven by pulsed voltage sources: VIN1 switches between 0V and 5V at 500kHz, 50% duty cycle; VIN2 is delayed by 0.25\u00b5s.","Transient analysis runs for 2\u00b5s with 10ns steps; measurements are taken at 0.4\u00b5s (both inputs high) and 0.6\u00b5s (VIN1 low, VIN2 high)."],"measurements":[{"name":"Vout_one_low","key":"Vout_one_low","index":0,"value":0.578856041346766,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"Vout_both_high","key":"Vout_both_high","index":0,"value":4.999999999999432,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00606_ec66ef82f9a2cec8:44e68ab8661422ef","source":"deepseek","example_id":"00606_ec66ef82f9a2cec8","test_name":"test_test_606_constant_k_lp_image_filter_ec66ef82f9a2cec8","netlist_hash":"44e68ab8661422ef","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Constant-k low-pass T-section filter designed for 600 ohm image impedance and 1 kHz cutoff.","pair_ids":["f7e23ba8c35c60b5","91a33178210005c5","f3e5d7b7cd1677f7"],"prompts":["Constant-k low-pass T-section filter designed for 600 ohm image impedance and 1 kHz cutoff.","The circuit uses two 0.0955 H inductors and one 0.531 uF capacitor with 600 ohm source and load.","AC analysis from 10 Hz to 10 kHz with measurements to characterize the filter response."],"measurements":[{"name":"f3db","key":"f3db","index":0,"value":998.5452713374646,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 AC"},{"name":"mag_at_fc","key":"mag_at_fc","index":0,"value":-9.039136867693102,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"att_at_3fc","key":"att_at_3fc","index":0,"value":-34.662410612816316,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:00750_48cd8c836c8111e5:4d578068f1b7a322","source":"deepseek","example_id":"00750_48cd8c836c8111e5","test_name":"test_test_750_diode_negative_clamper_to_dc_rail_48cd8c836c8111e5","netlist_hash":"4d578068f1b7a322","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Negative peak clamper shifts the pulse waveform so its negative peak is clamped to approximately -3.7 V (the -3 V reference minus a diode forward drop).","pair_ids":["d50c67df0a40faf4","f0f1b39d07921078","43dfe2723a102412"],"prompts":["Negative peak clamper shifts the pulse waveform so its negative peak is clamped to approximately -3.7 V (the -3 V reference minus a diode forward drop).","Input pulse starts at +5 V to ensure the diode initially conducts and charges the capacitor with the correct polarity.","Transient simulation runs for 20 ms; measurements are taken from 15 ms to 20 ms to capture steady\u2011state behaviour."],"measurements":[{"name":"VOUT_MAX","key":"VOUT_MAX","index":0,"value":6.570506145080538,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"},{"name":"VOUT_MIN","key":"VOUT_MIN","index":0,"value":-3.4622665176476484,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:01679_6aec2d9ebbd14c6d:6aec2d9ebbd14c6d","source":"deepseek","example_id":"01679_6aec2d9ebbd14c6d","test_name":"test_test_1679_multiple_feedback_high_pass_filter_6aec2d9ebbd14c6d","netlist_hash":"6aec2d9ebbd14c6d","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Design a second-order multiple-feedback high-pass filter with a cutoff frequency of 1 kHz using an ideal op-amp and three capacitors.","pair_ids":["c6229b0376c23516","9a8d3b1d66d40459","faf34900a31d25fa"],"prompts":["Design a second-order multiple-feedback high-pass filter with a cutoff frequency of 1 kHz using an ideal op-amp and three capacitors.","Create a SPICE netlist for a high-pass active filter with multiple feedback paths and AC analysis.","Implement a Butterworth high-pass filter using a behavioral op-amp and RC components, and measure its frequency response."],"measurements":[{"name":"f3db","key":"f3db","index":0,"value":1024.5251557436873,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 AC"},{"name":"gain_hf","key":"gain_hf","index":0,"value":-0.00019398237559162064,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"gain_low","key":"gain_low","index":0,"value":-80.20140740555595,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:02194_c9c13afdd7bf8561:ef93c4505a5f80aa","source":"deepseek","example_id":"02194_c9c13afdd7bf8561","test_name":"test_test_2194_pwm_dac_rc_filter_c9c13afdd7bf8561","netlist_hash":"ef93c4505a5f80aa","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Design a simple PWM DAC using an RC lowpass filter. The PWM signal is 5V amplitude, 50% duty cycle at 500kHz. Use R=1k and C=100nF. Simulate the transient response and measure the average output voltage.","pair_ids":["be7214f0dcc1e938","0320bd73a2eab091","4cfaf6efdefac04e"],"prompts":["Design a simple PWM DAC using an RC lowpass filter. The PWM signal is 5V amplitude, 50% duty cycle at 500kHz. Use R=1k and C=100nF. Simulate the transient response and measure the average output voltage.","Create a PWM-to-analog converter with a first-order RC filter. Input is a 5V pulse train with 1\u00b5s pulse width and 2\u00b5s period. Determine the output DC level after filtering.","Simulate a low-pass RC filter driven by a 500kHz PWM source. The filter cutoff should be around 1.6kHz. Measure the steady-state output voltage and verify it equals 2.5V."],"measurements":[{"name":"avg_out","key":"avg_out","index":0,"value":2.5024999999782445,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:02339_ed1d098d0c1f8c50:745778358e4cc49b","source":"deepseek","example_id":"02339_ed1d098d0c1f8c50","test_name":"test_test_2339_simple_charge_pump_ed1d098d0c1f8c50","netlist_hash":"745778358e4cc49b","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Fixed diode D1 orientation to correct charge pump operation.","pair_ids":["ed34f9ccc050292f","e0f8a78ad273fde1","f2e28bc41560a8ba"],"prompts":["Fixed diode D1 orientation to correct charge pump operation.","The voltage doubler now properly charges to approximately 8.5V under load.","Output ripple is minimal due to 100nF output capacitor and 1 MHz clock."],"measurements":[{"name":"vout_avg","key":"vout_avg","index":0,"value":8.633895313077414,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 tran"},{"name":"vout_ripple","key":"vout_ripple","index":0,"value":0.04679479583684376,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#1 tran"}]} +{"id":"deepseek:02462_97d59bd688220a2e:c5a0719d7c544020","source":"deepseek","example_id":"02462_97d59bd688220a2e","test_name":"test_test_2462_dtl_nand_gate_97d59bd688220a2e","netlist_hash":"c5a0719d7c544020","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"DTL NAND gate with three inputs (A, B, C)","pair_ids":["10881b74b0ab7770","37f18b87ac913a23","d1c847b24d41cb34"],"prompts":["DTL NAND gate with three inputs (A, B, C)","Inputs B and C tied to VCC (high), input A pulsed low","Output should go high (~5V) when A is low, low (~0.2V) when all inputs high"],"measurements":[{"name":"vout_high","key":"vout_high","index":0,"value":4.99999999003043,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"vout_low","key":"vout_low","index":0,"value":0.059288787850927616,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:01408_46c5f05ccf1e4e10:e6fbd867f1464b69","source":"deepseek","example_id":"01408_46c5f05ccf1e4e10","test_name":"test_test_1408_jfet_current_source_46c5f05ccf1e4e10","netlist_hash":"e6fbd867f1464b69","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"N-channel JFET constant current source with a source resistor to set the operating point.","pair_ids":["e7992718bf6488ed","20b0fb83cf25008c","7e7efdb202b2cbfb"],"prompts":["N-channel JFET constant current source with a source resistor to set the operating point.","Gate grounded, source resistor provides self-bias voltage.","DC sweep of drain-source voltage to verify constant current region."],"measurements":[{"name":"I_curr","key":"I_curr","index":0,"value":0.0015278640446543077,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#2 DC"}]} +{"id":"deepseek:00670_79be04ef4866bc16:8876419aaf99ebc1","source":"deepseek","example_id":"00670_79be04ef4866bc16","test_name":"test_test_670_capacitive_probe_79be04ef4866bc16","netlist_hash":"8876419aaf99ebc1","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"This circuit models a passive 10:1 oscilloscope probe using a compensated RC divider.","pair_ids":["9e0c858e60794991","e1d91c3c2a9cbee3","00df1019350cf3ef"],"prompts":["This circuit models a passive 10:1 oscilloscope probe using a compensated RC divider.","R1 and R2 set 10:1 DC attenuation, while C1 and C2 are chosen so that the capacitive division ratio matches the resistive ratio for flat frequency response.","AC analysis from 1 Hz to 1 MHz demonstrates that the output remains at 0.1 times the input across the band."],"measurements":[{"name":"v1meg_mag","key":"v1meg_mag","index":0,"value":0.09999100218931935,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"v1k_mag","key":"v1k_mag","index":0,"value":0.09999996461107911,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:00709_f7076258d15c5f2a:32c53e2632ec70b8","source":"deepseek","example_id":"00709_f7076258d15c5f2a","test_name":"test_test_709_dual_polarity_full_wave_rectifier_supply_f7076258d15c5f2a","netlist_hash":"32c53e2632ec70b8","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"Center-tapped transformer secondary modeled as two 12V AC sources with common ground.","pair_ids":["896122d662a90e88","808cc266e34d5b4d","e5dfbba7373308b4","21e5e3b28c811736","1fab3c48882b84ef"],"prompts":["Center-tapped transformer secondary modeled as two 12V AC sources with common ground.","Positive half-cycle rectified by D1 to produce positive DC at node vp.","Negative half-cycle rectified by D2 to produce negative DC at node vn.","Filter capacitors C1 and C2 (1200\u00b5F each) smooth the outputs, reducing ripple.","100\u2126 load resistors R1 and R2 draw current from each rail."],"measurements":[{"name":"avg_vp","key":"avg_vp","index":0,"value":10.794695118264821,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 tran"},{"name":"avg_vn","key":"avg_vn","index":0,"value":-10.794695118266509,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 tran"},{"name":"ripple_vn","key":"ripple_vn","index":0,"value":1.3531990130053586,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#1 tran"},{"name":"ripple_vp","key":"ripple_vp","index":0,"value":1.3531990130087923,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#1 tran"}]} +{"id":"deepseek:00507_68b3d26da95b39eb:668e8ce926b81d86","source":"deepseek","example_id":"00507_68b3d26da95b39eb","test_name":"test_test_507_lag_compensation_rc_68b3d26da95b39eb","netlist_hash":"668e8ce926b81d86","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Passive RC lag compensator with pole at 10 Hz and zero at 100 Hz.","pair_ids":["b8311dc680e3475a","fc5ed07cded04c0a","f84ede31a9a34998"],"prompts":["Passive RC lag compensator with pole at 10 Hz and zero at 100 Hz.","Components: R1=14.3k, R2=1.59k, C1=1uF.","AC analysis from 1 Hz to 1 MHz with 20 points per decade."],"measurements":[{"name":"g100","key":"g100","index":0,"value":-17.023355192911456,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"p10","key":"p10","index":0,"value":-0.6850243323820381,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"p100","key":"p100","index":0,"value":-0.686057664595221,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"g10","key":"g10","index":0,"value":-2.9602131383672945,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"p31p6","key":"p31p6","index":0,"value":-0.9580392227131207,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"g1","key":"g1","index":0,"value":-0.04264266056415622,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:01485_97a34da74875ba4a:d5004974ae2640e2","source":"deepseek","example_id":"01485_97a34da74875ba4a","test_name":"test_test_1485_instrumentation_amplifier_driven_reference_97a34da74875ba4a","netlist_hash":"d5004974ae2640e2","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"The circuit is a three-op-amp instrumentation amplifier with a driven reference node.","pair_ids":["22e83542a8fa8d8a","c946c4062dd26d3e","e771f6d312d5d75b","61a180ead320c222"],"prompts":["The circuit is a three-op-amp instrumentation amplifier with a driven reference node.","The first stage provides a differential gain of 21 using a gain-setting resistor of 1k\u03a9 and feedback resistors of 10k\u03a9.","The second stage is a unity-gain difference amplifier that adds the reference voltage of 1.25V.","A buffer op-amp drives the reference node to ensure low impedance."],"measurements":[{"name":"gain_mag","key":"gain_mag","index":0,"value":20.99517102248501,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"out_dc","key":"out_dc","index":0,"value":1.270957671891665,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 TRAN"}]} +{"id":"deepseek:01425_d2dc4353f292592b:57e693b357199bf1","source":"deepseek","example_id":"01425_d2dc4353f292592b","test_name":"test_test_1425_voltage_follower_e_source_d2dc4353f292592b","netlist_hash":"57e693b357199bf1","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Voltage follower using an ideal op-amp approximated by a behavioral voltage-controlled voltage source (E-source) with high gain (100k).","pair_ids":["6e897b0dce5fffc9","9eb72434f43dc488","1fbb90d8fd305a7e"],"prompts":["Voltage follower using an ideal op-amp approximated by a behavioral voltage-controlled voltage source (E-source) with high gain (100k).","DC analysis via a single-point DC sweep (VIN=0.5 V) verifies that the output voltage is nearly identical to the input.","AC analysis at 1 kHz confirms unity gain (0 dB) and negligible phase shift."],"measurements":[{"name":"vout","key":"vout","index":0,"value":0.4999950000499995,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#3 DC"},{"name":"acmag","key":"acmag","index":0,"value":-8.685846208858971e-05,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"acphase","key":"acphase","index":0,"value":0,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"vdiff","key":"vdiff","index":0,"value":4.999950000472708e-06,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#3 DC"}]} +{"id":"deepseek:01388_b49b31adbc9fd3e4:766c305cb5e8152f","source":"deepseek","example_id":"01388_b49b31adbc9fd3e4","test_name":"test_test_1388_jfet_source_follower_buffer_b49b31adbc9fd3e4","netlist_hash":"766c305cb5e8152f","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"JFET source follower buffer circuit","pair_ids":["d6f49043ce05a1bc","afa362002449ac8a","72c032091b47c46a"],"prompts":["JFET source follower buffer circuit","AC gain measurement at 1kHz","Maximum gain and -3dB bandwidth measurement"],"measurements":[{"name":"gain_db","key":"gain_db","index":0,"value":-0.6950635227524433,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"gain_mag","key":"gain_mag","index":0,"value":0.9230913783084888,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"max_gain","key":"max_gain","index":0,"value":-0.6950218479466095,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#2 AC"},{"name":"f_3db","key":"f_3db","index":0,"value":176974.25516567944,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#2 AC"}]} +{"id":"deepseek:01968_dcfbb95de760a925:9150496dce90e869","source":"deepseek","example_id":"01968_dcfbb95de760a925","test_name":"test_test_1968_sepic_converter_simplified_switching_model_dcfbb95de760a925","netlist_hash":"9150496dce90e869","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"SEPIC converter with ideal switches and diode, 12V input, 100kHz switching, 50% duty cycle.","pair_ids":["94d4b8a3592bf20f","14e8d33fa61117e0","da31a2f261d53351","6bbf6a6ddccbf1bc","4edbd3830d6df125"],"prompts":["SEPIC converter with ideal switches and diode, 12V input, 100kHz switching, 50% duty cycle.","Simplified switching model using voltage-controlled switch (SW) and PULSE gate drive.","Includes averaged output voltage, ripple, input current, input power, output power, and efficiency measurements.","Fixed slow startup by extending simulation to 10 ms and measuring after settling (8\u201310 ms).","Reduced switch on-resistance to 0.01 \u03a9 to minimize conduction losses and bring output voltage within expected range."],"measurements":[{"name":"iin_avg","key":"iin_avg","index":0,"value":-1.123207300138457,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 TRAN"},{"name":"vout_avg","key":"vout_avg","index":0,"value":11.178310119375581,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 TRAN"},{"name":"eff","key":"eff","index":0,"value":0.9315258432812984,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 TRAN"},{"name":"vout_ripple","key":"vout_ripple","index":0,"value":0.08912573590224149,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#1 TRAN"},{"name":"pin","key":"pin","index":0,"value":12,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 TRAN"},{"name":"pout","key":"pout","index":0,"value":11.178310119375581,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:02005_78b6cc8203036d28:c5452f10e5a42a31","source":"deepseek","example_id":"02005_78b6cc8203036d28","test_name":"test_test_2005_linear_post_regulator_78b6cc8203036d28","netlist_hash":"c5452f10e5a42a31","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Linear post-regulator using discrete error amplifier and pass transistor to clean up switching preregulator output.","pair_ids":["713ce98fa53262d3","697c8ee775da417b","e0e3e6dda0ef70cf","7d06856dfa52d39e"],"prompts":["Linear post-regulator using discrete error amplifier and pass transistor to clean up switching preregulator output.","Reference voltage generated by Zener diode D1, amplified by differential pair Q2-Q3 with active load Q4-Q5.","Output voltage set by feedback network R2/R3 to approximately 8 V (5.1 V * (1 + 5.6k/10k)).","Compensation capacitor Ccomp ensures stability; output capacitor C1 reduces ripple."],"measurements":[{"name":"vout_avg","key":"vout_avg","index":0,"value":7.964216342453832,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#2 TRAN"},{"name":"vin_pp","key":"vin_pp","index":0,"value":0.19935865143804676,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#2 TRAN"},{"name":"vout_pp","key":"vout_pp","index":0,"value":6.018647102035146e-05,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#2 TRAN"}]} +{"id":"deepseek:02311_fbd4162e5784ec83:e72856cbd0a26fe2","source":"deepseek","example_id":"02311_fbd4162e5784ec83","test_name":"test_test_2311_rms_to_dc_rectifier_filter_fbd4162e5784ec83","netlist_hash":"e72856cbd0a26fe2","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"The precision full-wave rectifier uses two high-gain voltage\u2011controlled voltage sources (E_hw, E_diff) as op\u2011amps.","pair_ids":["8cec129189eca4e5","1d1c8b69c0ca0299","c571004a4e2aac12","e0d88c1ec138aaea","04a3c522e1620fd1"],"prompts":["The precision full-wave rectifier uses two high-gain voltage\u2011controlled voltage sources (E_hw, E_diff) as op\u2011amps.","The first stage (E_hw, D1, R1) is a precision half\u2011wave rectifier; node n_hw follows the input for positive cycles and is zero otherwise.","The second stage (E_diff, R3, R4) computes 2\u00b7V(n_hw) \u2212 V(in), yielding the absolute value at node out.","An RC low\u2011pass filter (Rf, Cf) extracts the DC average of the rectified signal at node dc.","Extended simulation time and delayed measurement window avoid the filter settling transient."],"measurements":[{"name":"Vdc_avg","key":"Vdc_avg","index":0,"value":0.6254624140291731,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 tran"},{"name":"Vrms_input","key":"Vrms_input","index":0,"value":0.6956501204335327,"value_is_finite":true,"success":true,"measurement_type":"RMS","simulation_name":"#1 tran"},{"name":"ratio_avg2rms","key":"ratio_avg2rms","index":0,"value":0.8991048742137524,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 tran"}]} +{"id":"deepseek:01045_362f0822447f46c8:8c491e4bc4151453","source":"deepseek","example_id":"01045_362f0822447f46c8","test_name":"test_test_1045_two_transistor_bjt_current_limiter_362f0822447f46c8","netlist_hash":"8c491e4bc4151453","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Create a SPICE simulation of a two-transistor BJT current limiter that restricts the load current to approximately 100mA. Use an NPN pass transistor (Q1) with a sense resistor Rsense=7.5\u03a9 and an NPN sense transistor (Q2) that shunts base drive. Supply voltage is 12V. Perform a DC sweep of the output voltage from 0 to 12V and measure the limit current.","pair_ids":["02c1e25dc5432c17","bcff96c6d6081fb6","0510c7e232886acd"],"prompts":["Create a SPICE simulation of a two-transistor BJT current limiter that restricts the load current to approximately 100mA. Use an NPN pass transistor (Q1) with a sense resistor Rsense=7.5\u03a9 and an NPN sense transistor (Q2) that shunts base drive. Supply voltage is 12V. Perform a DC sweep of the output voltage from 0 to 12V and measure the limit current.","Design a current-limiting protection circuit using two BJTs (NPN) and resistors, with a 12V supply. The circuit should limit output current to roughly 100mA. Run an operating-point analysis and a DC sweep of the load voltage. Provide measurements to verify the limiting current is within 85\u2013115mA.","Implement a two-transistor current limiter in SPICE: Q1 NPN pass, Q2 NPN sensing, Rsense=7.5\u03a9, Rbase=1k\u03a9, Vsupply=12V. Sweep Vload from 0 to 12V and measure the maximum load current, the current at 5V load, and Vbe of Q2 at 5V. Check that the limiter holds current near 100mA in the active region."],"measurements":[{"name":"I_at_5V","key":"I_at_5V","index":0,"value":0.09734202831617678,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 dc"},{"name":"Vbe_Q2_at_5V","key":"Vbe_Q2_at_5V","index":0,"value":0.6947325045402879,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 dc"},{"name":"I_limit_max","key":"I_limit_max","index":0,"value":0.10490041113731186,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#2 dc"}]} +{"id":"deepseek:01821_48fa16fb32b123cc:4c7489ee15ac2c77","source":"deepseek","example_id":"01821_48fa16fb32b123cc","test_name":"test_test_1821_555_style_monostable_timer_48fa16fb32b123cc","netlist_hash":"4c7489ee15ac2c77","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"555-style monostable timer using behavioral comparators and SR latch","pair_ids":["a194a323c5b77888","d3f8fb025ba8c40c","b6133f082b5059ac","772aa6a601f7ab4e"],"prompts":["555-style monostable timer using behavioral comparators and SR latch","Voltage divider set to 10k resistors each for 1/3 VCC and 2/3 VCC thresholds","Behavioral SR latch uses multiplication for AND logic","Output pulse width approximately 1.1*R1*C1 = 1.1ms"],"measurements":[{"name":"pulse_width","key":"pulse_width","index":0,"value":0.0011029444599961128,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 TRAN"},{"name":"max_cap","key":"max_cap","index":0,"value":3.2926850294524086,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00209_8a4fc232f3f48023:2fe68fbd7c60af80","source":"deepseek","example_id":"00209_8a4fc232f3f48023","test_name":"test_test_209_bjt_current_mirror_8a4fc232f3f48023","netlist_hash":"2fe68fbd7c60af80","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"BJT current mirror with two NPN transistors.","pair_ids":["96233ff8eb404cb5","a3cf94e8f606a818","4bcc6eeed76d49df"],"prompts":["BJT current mirror with two NPN transistors.","R1 sets the reference current; R2 sets the output load.","The mirror ratio is near unity if both transistors are matched."],"measurements":[{"name":"Io_Iref","key":"Io_Iref","index":0,"value":0.9803921574790118,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 DC"},{"name":"Iref","key":"Iref","index":0,"value":0.0009347158948533383,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 DC"},{"name":"Iout","key":"Iout","index":0,"value":0.0009163881327851894,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 DC"}]} +{"id":"deepseek:02296_652fc5b3c99ae649:9053b5d3891b37fd","source":"deepseek","example_id":"02296_652fc5b3c99ae649","test_name":"test_test_2296_four_quadrant_analog_multiplier_652fc5b3c99ae649","netlist_hash":"9053b5d3891b37fd","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"A four-quadrant analog multiplier using a polynomial voltage-controlled current source.","pair_ids":["1cfc5fef648f98bf","5222253882e46f59","93b8a9051b52889f","65fae10607248073"],"prompts":["A four-quadrant analog multiplier using a polynomial voltage-controlled current source.","Multiplies input voltages Vx and Vy, producing output Vout = 0.1 * Vx * Vy.","For transient test, Vy is set to a constant 1V, Vx is a 2V amplitude sine wave, resulting in a 0.2V amplitude sine wave output.","DC sweep demonstrates linear multiplication with Vy=1V, giving Vout=0.1*Vx."],"measurements":[{"name":"vout_min","key":"vout_min","index":0,"value":-0.19924428468279112,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 TRAN"},{"name":"vout_at_vx1","key":"vout_at_vx1","index":0,"value":0.1,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"vout_max","key":"vout_max","index":0,"value":0.1992442846827911,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00694_0296d0f75b426a10:b71485bf819e1142","source":"deepseek","example_id":"00694_0296d0f75b426a10","test_name":"test_test_694_quarter_wave_transmission_line_equivalent_lc_ladder_0296d0f75b426a10","netlist_hash":"b71485bf819e1142","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Lumped-element LC ladder matching network","pair_ids":["492e3593576dc484","ed4a16cc517f4ac8","135417e4fd8b43aa","81870e2fd3185e31"],"prompts":["Lumped-element LC ladder matching network","T-topology with series inductors and shunt capacitor","Designed to match 50 Ohm source to 200 Ohm load at 1 GHz","AC analysis from 100 MHz to 2 GHz"],"measurements":[{"name":"v_out_mag","key":"v_out_mag","index":0,"value":0.9999990199519087,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"v_in_mag","key":"v_in_mag","index":0,"value":0.5000165495184091,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:00299_cbc09c09c6d23b6b:6d788ad8db83fd33","source":"deepseek","example_id":"00299_cbc09c09c6d23b6b","test_name":"test_test_299_cmos_nor2_cbc09c09c6d23b6b","netlist_hash":"6d788ad8db83fd33","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"Two-input CMOS NOR gate with NMOS pull-down network (parallel) and PMOS pull-up network (series).","pair_ids":["fd769d7636055104","8679fb4d3f0c2669","54c6e755dc383c90","993ed7dfe6572f51","95f40fc180614dec"],"prompts":["Two-input CMOS NOR gate with NMOS pull-down network (parallel) and PMOS pull-up network (series).","Transistor sizes: NMOS W=1u L=0.35u, PMOS W=2u L=0.35u; supply voltage VDD=3.3V.","Input A: pulse with fast rise/fall (0.1 ns) to provide a clean edge; input B: similar but longer high duration.","Output Y loaded with 0.5 pF to ensure measurable propagation delays.","Transient analysis from 0 to 40 ns with 10 ps step captures switching events accurately."],"measurements":[{"name":"tpd_A_FALL","key":"tpd_A_FALL","index":0,"value":2.3480928802054876e-10,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#2 TRAN"},{"name":"tpd_B_FALL","key":"tpd_B_FALL","index":0,"value":2.3480928802054876e-10,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#2 TRAN"},{"name":"vout_avg","key":"vout_avg","index":0,"value":0.7045492577771557,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#2 TRAN"}]} +{"id":"deepseek:01050_d5a399bcdb786da1:b1e937f5dd36cd3d","source":"deepseek","example_id":"01050_d5a399bcdb786da1","test_name":"test_test_1050_foldback_current_limiter_bjt_d5a399bcdb786da1","netlist_hash":"b1e937f5dd36cd3d","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"The circuit is a foldback current limiter using two NPN transistors.","pair_ids":["95bbcb9a10aead5c","e096d276af256aa0","159381ea2fec5cb4","d7ee3de30d56b8c7"],"prompts":["The circuit is a foldback current limiter using two NPN transistors.","Q1 is the pass transistor, Q2 senses output current and voltage to limit.","Resistors R1, R2, R3 form a divider that provides foldback behavior.","When output voltage drops, the limiting current decreases, protecting the pass transistor."],"measurements":[{"name":"I_max","key":"I_max","index":0,"value":0.11580976222993984,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 DC"},{"name":"I_sc","key":"I_sc","index":0,"value":0.06114692420735874,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 DC"},{"name":"ratio","key":"ratio","index":0,"value":0.5279945578849541,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 DC"}]} +{"id":"deepseek:00093_ea190a23e5e96ba5:d5492ab73cc39ddc","source":"deepseek","example_id":"00093_ea190a23e5e96ba5","test_name":"test_test_93_twin_t_notch_ea190a23e5e96ba5","netlist_hash":"d5492ab73cc39ddc","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Twin-T notch filter centered near 1.6 kHz using R=10k\u03a9 and C=10nF/20nF.","pair_ids":["16126c4fabc8da72","0d46dd4b74be0d31","a4b273934839e46b","b7b68357d8af12ff"],"prompts":["Twin-T notch filter centered near 1.6 kHz using R=10k\u03a9 and C=10nF/20nF.","Shunt resistor R3=7.5k\u03a9 intentionally detuned from ideal R/2=5k\u03a9 to achieve a shallow notch depth (~-20 dB) rather than a deep null.","Passband gains: ~0.833 at low frequency (resistive divider with 100k\u03a9 load), ~1.0 at high frequency (capacitive coupling).","AC analysis from 100 Hz to 10 kHz with 100 points/decade."],"measurements":[{"name":"gain_at_f0","key":"gain_at_f0","index":0,"value":0.06955564973881462,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"low_gain","key":"low_gain","index":0,"value":0.8103888691396184,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"high_gain","key":"high_gain","index":0,"value":0.8580511872279869,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"min_gain","key":"min_gain","index":0,"value":0.05448138122567754,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 AC"}]} +{"id":"deepseek:02463_f63c01c1b1adb74c:19fe261848bc77c1","source":"deepseek","example_id":"02463_f63c01c1b1adb74c","test_name":"test_test_2463_dtl_nand_gate_f63c01c1b1adb74c","netlist_hash":"19fe261848bc77c1","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"This is a DTL NAND gate implemented with two input diodes, a level-shifting diode, an NPN transistor, and resistors. Input A is swept from 0 to 5V while input B is held high at 5V.","pair_ids":["4db1fbd815e283b4","3aba198dd02edced","db18a24b09dd4c1d","c7c739eea44e857d"],"prompts":["This is a DTL NAND gate implemented with two input diodes, a level-shifting diode, an NPN transistor, and resistors. Input A is swept from 0 to 5V while input B is held high at 5V.","When input A is low (0V), the corresponding diode conducts, pulling the common node (BASE) low, keeping the transistor off and the output high (~5V).","As input A increases, the common node voltage rises until it forward biases the level-shifting diode and the base-emitter junction, turning on the transistor and pulling the output low.","The .MEAS statements capture the output voltage at VINA=0 (high) and at VINA=3.5V (low)."],"measurements":[{"name":"VOUT_HIGH","key":"VOUT_HIGH","index":0,"value":4.999999989056697,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 DC"},{"name":"VOUT_LOW","key":"VOUT_LOW","index":0,"value":0.08061587797764119,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 DC"}]} +{"id":"deepseek:00644_0898d4113455f3a9:d43a00d3a8380bf8","source":"deepseek","example_id":"00644_0898d4113455f3a9","test_name":"test_test_644_multi_section_rc_lpf_0898d4113455f3a9","netlist_hash":"d43a00d3a8380bf8","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Design a three-stage RC low-pass filter for anti-aliasing with R=1k\u03a9 and C=10nF per stage. Perform an AC analysis to measure the -3 dB bandwidth and the attenuation at 100 kHz.","pair_ids":["93354aaecb583a63","399362d481429ec1","ecf0e0d4cc6bd6f2","c35a784322797b2a"],"prompts":["Design a three-stage RC low-pass filter for anti-aliasing with R=1k\u03a9 and C=10nF per stage. Perform an AC analysis to measure the -3 dB bandwidth and the attenuation at 100 kHz.","Create a multi-section RC low-pass filter intended for anti-alias filtering before an ADC. Use three cascaded RC stages with equal components. Simulate the frequency response and verify that the -3 dB point is around a few kHz and that it attenuates well at 100 kHz.","Build a passive third-order RC low-pass filter. Run an AC sweep from 10 Hz to 100 kHz, and measure the frequency at which the gain drops to -3 dB and the gain at 100 kHz.","Produce a SPICE netlist for a cascaded RC low-pass filter for an anti-aliasing application. Include AC analysis and .MEAS statements to extract the -3 dB frequency and the attenuation at the stopband edge."],"measurements":[{"name":"f3db","key":"f3db","index":0,"value":3084.9543079651294,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 AC"},{"name":"att100k","key":"att100k","index":0,"value":-49.18121792203518,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:00872_74cfe835e715bc2a:dd955af64518b7e9","source":"deepseek","example_id":"00872_74cfe835e715bc2a","test_name":"test_test_872_diode_charge_pump_inverter_74cfe835e715bc2a","netlist_hash":"dd955af64518b7e9","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Diode-based charge pump inverter generating negative voltage from a 5V 50kHz square wave.","pair_ids":["cfa1e729ded61d81","c06439d684e7613e","27c6221178afe2c5"],"prompts":["Diode-based charge pump inverter generating negative voltage from a 5V 50kHz square wave.","Uses flying capacitor C1, clamping diode D1, switching diode D2, output capacitor Cout, and load resistor.","Circuit operates in two phases: C1 charges when clock is low, then dumps charge to output when clock is high, creating a negative output."],"measurements":[{"name":"Vout_max","key":"Vout_max","index":0,"value":-2.984359867187933,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"},{"name":"Vout_ripple","key":"Vout_ripple","index":0,"value":0.46454503565146554,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#1 TRAN"},{"name":"Vout_min","key":"Vout_min","index":0,"value":-3.4489049028393985,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 TRAN"},{"name":"Vout_avg","key":"Vout_avg","index":0,"value":-3.259279007287765,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:02055_597bec09d2bd07cf:27fa3ef4568078b8","source":"deepseek","example_id":"02055_597bec09d2bd07cf","test_name":"test_test_2055_double_tuned_rf_amplifier_597bec09d2bd07cf","netlist_hash":"27fa3ef4568078b8","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Double-tuned RF amplifier using a BJT in common-emitter configuration with capacitive coupling between two LC tanks.","pair_ids":["90927b033111675a","cf5c4dba2b7d273a","ffce26db1ef9e8a1"],"prompts":["Double-tuned RF amplifier using a BJT in common-emitter configuration with capacitive coupling between two LC tanks.","The tanks are tuned to 10 MHz with L=1uH and C=250pF, and coupled via a 25pF capacitor for critical coupling (Q~10).","Emitter resistor bypassed to provide AC ground, biasing set for Ic\u22481mA."],"measurements":[{"name":"gain_10M","key":"gain_10M","index":0,"value":20.862826665138716,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"phase_10M","key":"phase_10M","index":0,"value":-2.510237991266029,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"}]} +{"id":"deepseek:00830_ca59689117370034:b97618ba391bac7a","source":"deepseek","example_id":"00830_ca59689117370034","test_name":"test_test_830_diode_log_converter_ca59689117370034","netlist_hash":"b97618ba391bac7a","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Op-amp log amplifier with diode in feedback: input voltage via resistor to inverting input, diode anode to inverting input and cathode to op-amp output.","pair_ids":["97c81a76e00ba4ed","de29b87b25897798","bf89658ebc0c9e8a"],"prompts":["Op-amp log amplifier with diode in feedback: input voltage via resistor to inverting input, diode anode to inverting input and cathode to op-amp output.","Op-amp modeled as E1 with gain 100000; diode model DMOD with IS=1e-14.","DC sweep from 0.1V to 10V to verify logarithmic transfer function."],"measurements":[{"name":"vout_at_1v","key":"vout_at_1v","index":0,"value":-0.6551930944838568,"value_is_finite":true,"success":true,"measurement_type":"FIND_WHEN","simulation_name":"#2 DC"},{"name":"dec_slope","key":"dec_slope","index":0,"value":-0.060453609993063595,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#2 DC"},{"name":"vout_at_10v","key":"vout_at_10v","index":0,"value":-0.7156467044769204,"value_is_finite":true,"success":true,"measurement_type":"FIND_WHEN","simulation_name":"#2 DC"}]} +{"id":"deepseek:00853_319add54da9e4c07:2f29d1b580fe20e3","source":"deepseek","example_id":"00853_319add54da9e4c07","test_name":"test_test_853_zener_reference_emitter_follower_319add54da9e4c07","netlist_hash":"2f29d1b580fe20e3","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"Zener diode D1 provides a stable 5.1V reference when reverse biased (BV=5.1).","pair_ids":["86e1160f8b97eaa0","cea5ed54140418a7","03ba012d0ec5e089","a56c6c41f81bb76c","ef9d71664828e5ad"],"prompts":["Zener diode D1 provides a stable 5.1V reference when reverse biased (BV=5.1).","Resistor R1 limits current through the Zener from VCC.","NPN transistor Q1 (NPN) acts as an emitter follower, buffering the reference voltage.","Output node 'out' tracks the Zener voltage minus the base-emitter drop (~0.7V).","Emitter resistor R2 and load resistor Rload bias the transistor to maintain conduction."],"measurements":[{"name":"vref","key":"vref","index":0,"value":5.106528942846024,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"line_reg","key":"line_reg","index":0,"value":0.009555062571822592,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#2 DC"},{"name":"vout12","key":"vout12","index":0,"value":4.353330257216483,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"vout","key":"vout","index":0,"value":4.353330257216483,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"vout10","key":"vout10","index":0,"value":4.334220132072838,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"}]} +{"id":"deepseek:00494_99c2cd0c0b517b21:e0ca45a60aa8d55f","source":"deepseek","example_id":"00494_99c2cd0c0b517b21","test_name":"test_test_494_zobel_network_99c2cd0c0b517b21","netlist_hash":"e0ca45a60aa8d55f","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"Design a Zobel network (RC series) to stabilize an inductive load, using a 4-ohm resistor and 1mH inductor for the load.","pair_ids":["72f266e871d03444","8ab496579b64bdf1","520ca55009bf4d53","d984cb50fe02125e","885bac3d2011e92a"],"prompts":["Design a Zobel network (RC series) to stabilize an inductive load, using a 4-ohm resistor and 1mH inductor for the load.","Add a series RC network in parallel with a speaker load (4 ohms, 1mH) to prevent high-frequency impedance rise.","Implement a load stabilizing network comprising a resistor and capacitor in series across an inductive load, and measure voltage flatness across frequency.","Create a passive impedance compensation circuit for a loudspeaker using a Zobel network and verify its frequency response.","Build an AC simulation testbench for a series RC Zobel network that flattens the impedance of a parallel RL load."],"measurements":[{"name":"vmid_100k","key":"vmid_100k","index":0,"value":0.5000000000000001,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"vmid_1k","key":"vmid_1k","index":0,"value":0.4999999999999999,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:01990_0bece25f58095e05:a5e8de5bbae70eac","source":"deepseek","example_id":"01990_0bece25f58095e05","test_name":"test_test_1990_boost_converter_snubber_0bece25f58095e05","netlist_hash":"a5e8de5bbae70eac","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Boost converter with RCD snubber across MOSFET to limit switching voltage spikes.","pair_ids":["d40fdbdd644f617d","64540134dc97cf12","f1d744f28fdd9f20"],"prompts":["Boost converter with RCD snubber across MOSFET to limit switching voltage spikes.","Input voltage: 12V DC, switching frequency: 100kHz, duty cycle: 0.54.","Output voltage target: around 24V into a 10\u03a9 load."],"measurements":[{"name":"Eff","key":"Eff","index":0,"value":0.9092619338580507,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 TRAN"},{"name":"Pin_avg","key":"Pin_avg","index":0,"value":63.985079014235446,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 TRAN"},{"name":"Pout_avg","key":"Pout_avg","index":0,"value":58.179196682543896,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 TRAN"},{"name":"Vsnub_max","key":"Vsnub_max","index":0,"value":25.495382587309123,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"},{"name":"I_L_avg","key":"I_L_avg","index":0,"value":5.332089917852961,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 TRAN"},{"name":"Vout_avg","key":"Vout_avg","index":0,"value":24.120268259880362,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 TRAN"},{"name":"Vds_max","key":"Vds_max","index":0,"value":25.509282580834373,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00135_63e92561ab94c95e:68a21bd26fc2ba7b","source":"deepseek","example_id":"00135_63e92561ab94c95e","test_name":"test_test_135_zener_regulator_series_resistor_63e92561ab94c95e","netlist_hash":"68a21bd26fc2ba7b","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Zener diode voltage regulator circuit with series resistor R1=300\u03a9 and load resistor RLOAD=1k\u03a9.","pair_ids":["a0cdf140ddbade91","f6019e9acf444538","62cee43b72a74069"],"prompts":["Zener diode voltage regulator circuit with series resistor R1=300\u03a9 and load resistor RLOAD=1k\u03a9.","The Zener diode DZ uses model parameters BV=5.1V (breakdown voltage), IBV=1mA (breakdown current), RS=1\u03a9 (series resistance).","DC analysis sweeps VIN from 0 to 10V. Measurements capture the output voltage at VIN=7V and VIN=9V."],"measurements":[{"name":"vout_at_7V","key":"vout_at_7V","index":0,"value":5.106073385410332,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"vout_at_9V","key":"vout_at_9V","index":0,"value":5.160227856234924,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"}]} +{"id":"deepseek:00029_b488ccf43b4c0725:3771b111531f2f3e","source":"deepseek","example_id":"00029_b488ccf43b4c0725","test_name":"test_test_29_rc_pulse_response_b488ccf43b4c0725","netlist_hash":"3771b111531f2f3e","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"RC low-pass filter with R=1k, C=1u, time constant 1ms.","pair_ids":["e7220443dd3bcbcf","0704f4988696884e","83c43aab20ed123e"],"prompts":["RC low-pass filter with R=1k, C=1u, time constant 1ms.","PULSE source provides 1V step with 5ms duration, enabling observation of both charging and discharging.","Transient simulation from 0 to 10ms with 10us steps captures the exponential response."],"measurements":[{"name":"v_1ms","key":"v_1ms","index":0,"value":0.631672792155116,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"trise","key":"trise","index":0,"value":0.0021936942563277723,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 TRAN"},{"name":"tfall","key":"tfall","index":0,"value":0.002192797558439206,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:02152_966b9baa2ee3b5eb:a944a1589089e912","source":"deepseek","example_id":"02152_966b9baa2ee3b5eb","test_name":"test_test_2152_strain_gauge_wheatstone_instrumentation_966b9baa2ee3b5eb","netlist_hash":"a944a1589089e912","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Strain gauge signal conditioning circuit with a Wheatstone bridge powered by 10V DC and a three-op-amp instrumentation amplifier with gain 21.","pair_ids":["e08631798c27974d","7f1e4553f911dd23","91aeb1ed526500f8"],"prompts":["Strain gauge signal conditioning circuit with a Wheatstone bridge powered by 10V DC and a three-op-amp instrumentation amplifier with gain 21.","The strain gauge is placed in the right bridge arm (R3) with nominal 350\u03a9, varying \u00b15\u03a9 via a behavioral resistor controlled by a sweep voltage.","Output is taken from the instrumentation amplifier, which buffers and amplifies the differential bridge voltage."],"measurements":[{"name":"Vout_balance","key":"Vout_balance","index":0,"value":0,"value_is_finite":true,"success":true,"measurement_type":"FIND_WHEN","simulation_name":"#1 DC"},{"name":"Vout_min","key":"Vout_min","index":0,"value":-0.755221979226917,"value_is_finite":true,"success":true,"measurement_type":"FIND_WHEN","simulation_name":"#1 DC"},{"name":"Vout_strain","key":"Vout_strain","index":0,"value":0.7445096106384881,"value_is_finite":true,"success":true,"measurement_type":"FIND_WHEN","simulation_name":"#1 DC"}]} +{"id":"deepseek:00450_146dc9d921715552:7f03780a1382c8dd","source":"deepseek","example_id":"00450_146dc9d921715552","test_name":"test_test_450_resistive_l_pad_attenuator_146dc9d921715552","netlist_hash":"7f03780a1382c8dd","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Design a 10 dB resistive L-pad attenuator for a 50-ohm source and load impedances, and simulate its AC response.","pair_ids":["4fe237db9ede71a8","4ccd5a960c33682b","b8794a468ce693cd"],"prompts":["Design a 10 dB resistive L-pad attenuator for a 50-ohm source and load impedances, and simulate its AC response.","Create an L-pad attenuator with 10 dB insertion loss, matching the 50-ohm source impedance, and measure the attenuation at 1 kHz.","Compute component values for an L-pad attenuator that provides 10 dB attenuation between 50-ohm source and load, and verify with SPICE."],"measurements":[{"name":"atten_db","key":"atten_db","index":0,"value":-10.00040493100743,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"}]} +{"id":"deepseek:00707_e39c4f6dd5bb3899:9b3a7fa0e2c908f0","source":"deepseek","example_id":"00707_e39c4f6dd5bb3899","test_name":"test_test_707_dual_fullwave_rectifier_e39c4f6dd5bb3899","netlist_hash":"9b3a7fa0e2c908f0","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Dual-polarity full-wave rectifier using two diodes and center-tapped transformer secondary","pair_ids":["ae4517f7ac133535","c552ac02d0560361","0b8a42348b6f55e2"],"prompts":["Dual-polarity full-wave rectifier using two diodes and center-tapped transformer secondary","470\u00b5F filter capacitors and 1k\u03a9 loads on each supply","Transient simulation for 300 ms with initial conditions to achieve steady state"],"measurements":[{"name":"vplus_ripple","key":"vplus_ripple","index":0,"value":0.799702431935696,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#1 tran"},{"name":"vminus_ripple","key":"vminus_ripple","index":0,"value":0.7997024319352519,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#1 tran"},{"name":"vminus_avg","key":"vminus_avg","index":0,"value":-16.943759040196174,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 tran"},{"name":"vplus_avg","key":"vplus_avg","index":0,"value":16.943759040196785,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 tran"}]} +{"id":"deepseek:00114_82b0eb5468dfffdd:3528ca09e1bbc1d5","source":"deepseek","example_id":"00114_82b0eb5468dfffdd","test_name":"test_test_114_half_wave_rectifier_82b0eb5468dfffdd","netlist_hash":"3528ca09e1bbc1d5","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Simulate a half-wave rectifier that uses a single diode to convert a 10 V amplitude 60 Hz sine wave into DC, with a 100 uF smoothing capacitor and 1 kOhm load resistor.","pair_ids":["7add2d89550b3663","4719e3e3c5c764ed","e8a99e00d99ed1ba"],"prompts":["Simulate a half-wave rectifier that uses a single diode to convert a 10 V amplitude 60 Hz sine wave into DC, with a 100 uF smoothing capacitor and 1 kOhm load resistor.","Build a basic AC-to-DC converter: place a diode in series with an AC source, add a capacitor in parallel with the load resistor, and observe the output voltage waveform and ripple.","Model a half-wave rectifier with a filter capacitor. The input is a 60 Hz sine wave at 10 V peak, the capacitor is 100 uF, and the load is 1 kOhm. Measure the average output voltage and the ripple."],"measurements":[{"name":"Vavg","key":"Vavg","index":0,"value":9.022257172616138,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 tran"},{"name":"Vripple","key":"Vripple","index":0,"value":2.0088492542062113,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#1 tran"}]} +{"id":"deepseek:01883_a9afb9fa78343e2f:5ff785af6b10b64c","source":"deepseek","example_id":"01883_a9afb9fa78343e2f","test_name":"test_test_1883_pmos_ldo_a9afb9fa78343e2f","netlist_hash":"5ff785af6b10b64c","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"PMOS LDO with 1.8V output and 50mA load","pair_ids":["37fd28fa60835c38","2e1d227a407a9ba9","81eca53b554c9cf2"],"prompts":["PMOS LDO with 1.8V output and 50mA load","Error amplifier modeled with finite gain (1000) and diode clamps for convergence","Measures line regulation and dropout voltage over VIN sweep from 1.6V to 5V"],"measurements":[{"name":"VOUT5","key":"VOUT5","index":0,"value":1.8052716212405358,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"LINEREG","key":"LINEREG","index":0,"value":1.5098888337995637,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#2 DC"},{"name":"VIN_DROP","key":"VIN_DROP","index":0,"value":1.8480103545185431,"value_is_finite":true,"success":true,"measurement_type":"FIND_WHEN","simulation_name":"#2 DC"},{"name":"VOUT33","key":"VOUT33","index":0,"value":1.8027048102230765,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"}]} +{"id":"deepseek:01469_85b3bab85d762c2b:78839c09c80ea95b","source":"deepseek","example_id":"01469_85b3bab85d762c2b","test_name":"test_test_1469_op_amp_subtractor_with_matched_resistors_85b3bab85d762c2b","netlist_hash":"78839c09c80ea95b","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Difference amplifier with op-amp (E-source) and matched resistor ratios","pair_ids":["36d956eda3f69a42","3d1b672409606736","a24eaa3595d579af"],"prompts":["Difference amplifier with op-amp (E-source) and matched resistor ratios","R1=R3=10k\u2126, R2=R4=100k\u2126 for gain of 10","DC inputs 0.1 V and 0.2 V; AC excitation 1 V peak on non-inverting input"],"measurements":[{"name":"gain_ac","key":"gain_ac","index":0,"value":9.99890012098669,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 ac"},{"name":"vout_dc","key":"vout_dc","index":0,"value":0.9998900120990584,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 dc"}]} +{"id":"deepseek:01292_2a684fbe38647e82:5ce9bacd00954c84","source":"deepseek","example_id":"01292_2a684fbe38647e82","test_name":"test_test_1292_wide_swing_cascode_nmos_current_mirror_2a684fbe38647e82","netlist_hash":"5ce9bacd00954c84","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"The circuit is a wide-swing cascode NMOS current mirror using a 5V supply and a 100uA reference current.","pair_ids":["2eab4b9a236acc25","3d128b8840fdf519","597e53991e8d8cdb","fa1a2e82c90f8afc"],"prompts":["The circuit is a wide-swing cascode NMOS current mirror using a 5V supply and a 100uA reference current.","NMOS transistors have VTO=0.7V, KP=100\u00b5A/V\u00b2, LAMBDA=0.02, with W=8\u00b5m and L=1\u00b5m to balance compliance voltage and low-voltage current drop.","Cascode gates are biased at 2V, giving a theoretical compliance voltage of approximately 1.3V (Vcasc-VTO).","At Vout=0.5V, the output current is expected to drop below 95\u00b5A due to insufficient drain-source voltage; above ~1.3V, the mirror should accurately source ~100\u00b5A."],"measurements":[{"name":"I_AT_1V5","key":"I_AT_1V5","index":0,"value":-9.923947616168131e-05,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"I_AT_0V5","key":"I_AT_0V5","index":0,"value":-9.194026911838019e-05,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"I_AT_3V","key":"I_AT_3V","index":0,"value":-9.92533320839801e-05,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"}]} +{"id":"deepseek:00716_e02374a81d585931:a8468b0d43422655","source":"deepseek","example_id":"00716_e02374a81d585931","test_name":"test_test_716_precision_half_wave_rectifier_e02374a81d585931","netlist_hash":"a8468b0d43422655","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Design a precision half-wave rectifier using an op-amp and a diode, with a sine wave input.","pair_ids":["bbea7295fa9577af","9faf9f4acadf3834","0f13514e2b3d2068","831604050e0fa555"],"prompts":["Design a precision half-wave rectifier using an op-amp and a diode, with a sine wave input.","Create a non-inverting precision half-wave rectifier circuit using a behavioral op-amp model and a silicon diode.","Implement a circuit that passes only the positive half-cycles of a sinusoidal input with high precision using an op-amp and a diode.","Build a half-wave rectifier with an ideal op-amp and diode, intended for signal conditioning."],"measurements":[{"name":"Vout_max","key":"Vout_max","index":0,"value":0.9982134428353373,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 tran"},{"name":"Vout_min","key":"Vout_min","index":0,"value":-0.000996560679994169,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 tran"},{"name":"Vout_avg","key":"Vout_avg","index":0,"value":0.321386425851916,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 tran"}]} +{"id":"deepseek:00047_ede8054ed3fe5afa:9c3e477460e909f7","source":"deepseek","example_id":"00047_ede8054ed3fe5afa","test_name":"test_test_47_two_pole_passive_rc_ladder_low_pass_ede8054ed3fe5afa","netlist_hash":"9c3e477460e909f7","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"This circuit is a two-pole passive low-pass filter built with two cascaded RC stages.","pair_ids":["57fc4b67b078553a","7232cee43099d7b2","1e634594f05a59a2","eaa52a4f5399dd9a","48b5be46aade020a"],"prompts":["This circuit is a two-pole passive low-pass filter built with two cascaded RC stages.","The first stage consists of R1=1k\u03a9 and C1=10nF, and the second stage consists of R2=1k\u03a9 and C2=100nF.","The load is unconnected, so the filter is unterminated, leading to a true second-order roll-off with slight interaction between stages.","The AC simulation spans 1 Hz to 1 MHz with 200 points per decade.","Measurements capture passband gain, high-frequency attenuation, and -3 dB bandwidth."],"measurements":[{"name":"gain_hf","key":"gain_hf","index":0,"value":-52.3672856956042,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"bw","key":"bw","index":0,"value":773.6169879361032,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 AC"},{"name":"gain_lf","key":"gain_lf","index":0,"value":-7.218148016170731e-06,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:01819_db0f353ed1e2dda8:1daf9285cad40f05","source":"deepseek","example_id":"01819_db0f353ed1e2dda8","test_name":"test_test_1819_555_monostable_timer_db0f353ed1e2dda8","netlist_hash":"1daf9285cad40f05","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"Monostable 555 timer implemented with behavioral comparators and a switched-capacitor latch.","pair_ids":["5d99d4a49a48932f","c606f5bde943b64c","3ccf8145b272926c","94f8252b307fce1a","59ef43bc42ceab30"],"prompts":["Monostable 555 timer implemented with behavioral comparators and a switched-capacitor latch.","Trigger pulse (VTRIG) goes low at 1ms, triggering the one-shot.","Divider resistors provide 1/3 VCC (1.667V) and 2/3 VCC (3.333V) reference voltages.","Comparator E_TRIG_LOW outputs high when trigger is below 1/3 VCC.","Comparator E_THRES_HIGH outputs high when timing capacitor voltage exceeds 2/3 VCC."],"measurements":[{"name":"out_rise","key":"out_rise","index":0,"value":0.0010761714671759064,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 TRAN"},{"name":"pw","key":"pw","index":0,"value":0.011030827227422105,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 TRAN"},{"name":"trig_fall","key":"trig_fall","index":0,"value":0.0010000005,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 TRAN"},{"name":"out_fall","key":"out_fall","index":0,"value":0.012106998694598012,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00087_48b56524fa727376:c278190d6d382033","source":"deepseek","example_id":"00087_48b56524fa727376","test_name":"test_test_87_rlc_notch_filter_48b56524fa727376","netlist_hash":"c278190d6d382033","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Design a passive RLC notch filter that attenuates a 1 kHz signal by at least 40 dB while passing lower and higher frequencies. Provide a SPICE netlist with AC analysis and measurements.","pair_ids":["88a79eb1b1341d93","2476600601067a34","773e0026f4319455"],"prompts":["Design a passive RLC notch filter that attenuates a 1 kHz signal by at least 40 dB while passing lower and higher frequencies. Provide a SPICE netlist with AC analysis and measurements.","Create an RLC band-stop filter centered at 1 kHz using a parallel LC trap with a damping resistor. Include a voltage source, AC sweep, and .MEAS statements to capture the notch depth and out-of-band gain.","Simulate a notch filter with a resonant frequency of 1 kHz using R, L, and C components. The circuit should be driven by a 1V AC source. Use .MEAS to find the output voltage at 100 Hz, 1 kHz, and 10 kHz, and the minimum output voltage."],"measurements":[{"name":"v_at_high","key":"v_at_high","index":0,"value":0.9999593179222258,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"v_at_res","key":"v_at_res","index":0,"value":0.00990102365087997,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"v_min","key":"v_min","index":0,"value":0.009901023650869756,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 AC"},{"name":"v_at_low","key":"v_at_low","index":0,"value":0.9999593188918847,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:01925_07b32bb8c307b627:07b32bb8c307b627","source":"deepseek","example_id":"01925_07b32bb8c307b627","test_name":"test_test_1925_constant_current_charger_07b32bb8c307b627","netlist_hash":"07b32bb8c307b627","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Design an op-amp controlled constant-current battery charger circuit. The charger should use an NPN transistor and a sense resistor to maintain a fixed charging current regardless of the battery voltage. Provide a SPICE netlist that demonstrates this behavior with a DC sweep of the battery voltage.","pair_ids":["938b347b3891b2f1","fbb3c41545f07590","d7d8e122eb2b3b7b"],"prompts":["Design an op-amp controlled constant-current battery charger circuit. The charger should use an NPN transistor and a sense resistor to maintain a fixed charging current regardless of the battery voltage. Provide a SPICE netlist that demonstrates this behavior with a DC sweep of the battery voltage.","Create a SPICE simulation for a linear battery charger that delivers a constant current to a lithium-ion battery. Use an operational amplifier and an NPN bipolar transistor. Include .OP and .DC analysis to show the current regulation over a battery voltage range.","Generate a netlist for a constant-current source used to charge a battery, employing an op-amp with an emitter resistor to set the current. The circuit should have a high-gain E-source op-amp, a sense resistor, and an NPN pass transistor. Show constant current over battery voltages from 0 to 5V."],"measurements":[{"name":"Icharge_AT_3V7","key":"Icharge_AT_3V7","index":0,"value":1.1998602256298758,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"Icharge_AT_0V","key":"Icharge_AT_0V","index":0,"value":1.199860225628643,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"Icharge_AT_1V5","key":"Icharge_AT_1V5","index":0,"value":1.199860225629898,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"}]} +{"id":"deepseek:00091_1b76b33c190845ec:3051e8138f273a96","source":"deepseek","example_id":"00091_1b76b33c190845ec","test_name":"test_test_91_twin_t_notch_filter_1b76b33c190845ec","netlist_hash":"3051e8138f273a96","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Design a passive twin-T notch filter centered at 1 kHz. Use proper resistor and capacitor values to achieve the notch. Perform an AC analysis from 10 Hz to 100 kHz and measure the output magnitude at the notch frequency.","pair_ids":["596a3276e28b84e2","5b3055dc39be55c4","68b4460ec0d2fd6a"],"prompts":["Design a passive twin-T notch filter centered at 1 kHz. Use proper resistor and capacitor values to achieve the notch. Perform an AC analysis from 10 Hz to 100 kHz and measure the output magnitude at the notch frequency.","Build a twin-T notch filter to suppress a 1 kHz signal. Use R=10k, C\u224815.9nF, with the symmetrical topology. Run AC simulation and report the attenuation in dB at 1 kHz.","Create a twin-T notch filter with a notch frequency of 1 kHz using resistors and capacitors only. Perform AC sweep and measure the output level at 1 kHz to verify the deep notch."],"measurements":[{"name":"vout_dB_at_notch","key":"vout_dB_at_notch","index":0,"value":-134.95352099420185,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:00785_cd2555c7b47b96ed:67056763fda33cb9","source":"deepseek","example_id":"00785_cd2555c7b47b96ed","test_name":"test_test_785_bridge_diode_polarity_protector_cd2555c7b47b96ed","netlist_hash":"67056763fda33cb9","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"Design a bridge rectifier polarity protection circuit using four diodes. The input is a 10V peak 50Hz sine wave. Output should always be positive across a 1k load.","pair_ids":["1c942828a76f9e5f","401c3dc7c8290f9f","c7bab81fa169e633","6ec7af0cc8c910be","04808e012ae61908"],"prompts":["Design a bridge rectifier polarity protection circuit using four diodes. The input is a 10V peak 50Hz sine wave. Output should always be positive across a 1k load.","Create a diode bridge circuit that protects against reverse polarity by rectifying an AC input to DC output.","Simulate a full-wave bridge rectifier used as a polarity protector. Measure the output voltage to ensure it never goes negative.","Build a bridge of four diodes to convert an alternating input into a unidirectional voltage, providing inherent reverse-polarity protection for downstream loads.","Implement a diode-based polarity guard that accepts a bipolar sinusoidal signal and delivers a rectified positive output, verifying its behavior via transient analysis."],"measurements":[{"name":"vout_min","key":"vout_min","index":0,"value":-6.725488729058146e-27,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#2 TRAN"},{"name":"vout_avg","key":"vout_avg","index":0,"value":5.64295248610469,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#2 TRAN"}]} +{"id":"deepseek:00422_cfc7ae16386337ef:cf7314a1b0b9446b","source":"deepseek","example_id":"00422_cfc7ae16386337ef","test_name":"test_test_422_relaxation_oscillator_comparator_cfc7ae16386337ef","netlist_hash":"cf7314a1b0b9446b","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":2,"representative_prompt":"Relaxation oscillator using an E\u2011source comparator with hysteresis defined by a TABLE, generating square and triangular waves.","pair_ids":["4de70acc0a1120ad","b7cf412885deccb6"],"prompts":["Relaxation oscillator using an E\u2011source comparator with hysteresis defined by a TABLE, generating square and triangular waves.","Frequency is determined by R3 and C1; amplitude by the voltage divider R1,R2."],"measurements":[{"name":"duty_cycle","key":"duty_cycle","index":0,"value":0.0010989999999999373,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 TRAN"},{"name":"v_high","key":"v_high","index":0,"value":10,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"},{"name":"period","key":"period","index":0,"value":0.0021980000000000506,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 TRAN"},{"name":"v_cap_min","key":"v_cap_min","index":0,"value":-4.998953134440817,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 TRAN"},{"name":"v_cap_max","key":"v_cap_max","index":0,"value":4.9999673812165195,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"},{"name":"frequency","key":"frequency","index":0,"value":454.95905368515787,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 TRAN"},{"name":"v_low","key":"v_low","index":0,"value":-10,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:01586_6ce05cc8b48558dc:41fbb87ba6575ec6","source":"deepseek","example_id":"01586_6ce05cc8b48558dc","test_name":"test_test_1586_opamp_slew_limiter_6ce05cc8b48558dc","netlist_hash":"41fbb87ba6575ec6","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"This circuit models an op-amp with a slew rate of 1 V/\u00b5s using behavioral sources and a capacitor integrator.","pair_ids":["443c11e5b44a2a4f","bda90e669b699c15","cfc0a38f81d247ab","3ec1fb4472fa3f63"],"prompts":["This circuit models an op-amp with a slew rate of 1 V/\u00b5s using behavioral sources and a capacitor integrator.","The op-amp is configured as an inverting amplifier with a gain of -10.","A square wave input is applied, and the output voltage is measured to determine the slew rate from the time it takes to slew between defined voltage levels.","The slew rate is set by the maximum current (1 mA) of the G1 source and the 1 nF capacitor (I/C = 1 V/\u00b5s)."],"measurements":[{"name":"t_fall_start","key":"t_fall_start","index":0,"value":1.999828346957306e-06,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 TRAN"},{"name":"t_fall_stop","key":"t_fall_stop","index":0,"value":7.999828346957325e-06,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 TRAN"},{"name":"slew_falling","key":"slew_falling","index":0,"value":999999.9999999969,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 TRAN"},{"name":"t_rise_start","key":"t_rise_start","index":0,"value":1.2003171653042678e-05,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 TRAN"},{"name":"t_rise_stop","key":"t_rise_stop","index":0,"value":1.8003171653042664e-05,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 TRAN"},{"name":"slew_rising","key":"slew_rising","index":0,"value":1000000.0000000022,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00889_016d9efbef5585af:6fd3dd19fea6ad96","source":"deepseek","example_id":"00889_016d9efbef5585af","test_name":"test_test_889_fixed_bias_common_emitter_bjt_amplifier_016d9efbef5585af","netlist_hash":"6fd3dd19fea6ad96","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Fixed-bias common-emitter BJT amplifier using a 2N3904-like NPN transistor.","pair_ids":["83e520e23a27aeb6","0f7487fa2578fb5a","09711b06b6d268fd"],"prompts":["Fixed-bias common-emitter BJT amplifier using a 2N3904-like NPN transistor.","DC operating point analysis verifies collector current ~2.4 mA and VCE ~6.7 V.","AC analysis measures mid-band voltage gain magnitude at 1 kHz."],"measurements":[{"name":"vout_mag","key":"vout_mag","index":0,"value":167.05621311866594,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"}]} +{"id":"deepseek:01378_7683ea3bd6c849b7:2c24ede7f425322a","source":"deepseek","example_id":"01378_7683ea3bd6c849b7","test_name":"test_test_1378_cmos_current_starved_ring_oscillator_7683ea3bd6c849b7","netlist_hash":"2c24ede7f425322a","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"CMOS 5-stage current-starved ring oscillator.","pair_ids":["f15b031ab92905e6","112f5309330e02f4","0771fabf721db2ba"],"prompts":["CMOS 5-stage current-starved ring oscillator.","Frequency controlled by Vctrl (2.5V) and bias voltage Vbp from resistor divider.","Bias resistors set to 10k\u03a9 each to give Vbp=2.5V for faster oscillation."],"measurements":[{"name":"period","key":"period","index":0,"value":6.178542133198102e-09,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 TRAN"},{"name":"freq","key":"freq","index":0,"value":161850478.38823843,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00314_ddfb6f57ebeb5099:ddfb6f57ebeb5099","source":"deepseek","example_id":"00314_ddfb6f57ebeb5099","test_name":"test_test_314_non_inverting_op_amp_amplifier_ddfb6f57ebeb5099","netlist_hash":"ddfb6f57ebeb5099","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Design a non-inverting amplifier with a gain of 10. Use an ideal op-amp modeled with a voltage-controlled voltage source.","pair_ids":["bc0f7ad0d0d390ed","1b5846363554b9cb","dd72b24aa806eeba","3027a1b4ba5b42b1"],"prompts":["Design a non-inverting amplifier with a gain of 10. Use an ideal op-amp modeled with a voltage-controlled voltage source.","Create a SPICE netlist for a non-inverting op-amp amplifier. The op-amp should be modeled as an E-source with gain 100k. Set R1=1k\u03a9 and Rf=9k\u03a9 for a gain of 10. Run an AC simulation from 1Hz to 100kHz.","Simulate a non-inverting amplifier circuit using a behavioral op-amp with open-loop gain of 100,000. The feedback network should give a closed-loop gain of 10. Perform an AC analysis and measure the output magnitude and phase.","I need a simple non-inverting amplifier with ideal op-amp. Use an E-source with gain=100k, Rf=9k, R1=1k. Run AC DEC 10 1 100k and measure the gain in dB at 1kHz."],"measurements":[{"name":"gain_db","key":"gain_db","index":0,"value":19.999131454462745,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"phase","key":"phase","index":0,"value":0,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:00340_7e20bf699892eca1:ebcf9a2b3602c8a4","source":"deepseek","example_id":"00340_7e20bf699892eca1","test_name":"test_test_340_opamp_integrator_reset_7e20bf699892eca1","netlist_hash":"ebcf9a2b3602c8a4","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"An inverting op-amp integrator built with an E-source (gain = 1e5) configured for negative feedback.","pair_ids":["8b73858cf75ef29c","dc10f607b175de31","d560e41e2d344b71"],"prompts":["An inverting op-amp integrator built with an E-source (gain = 1e5) configured for negative feedback.","A reset switch (S1) shorts the integration capacitor initially; the switch opens at 1 \u03bcs, allowing integration to proceed.","A 1 V step is applied to the input at 20 \u03bcs; the output ramps at a rate of -10 mV/\u00b5s, reaching about -0.8 V by 100 \u03bcs."],"measurements":[{"name":"vout_at_19u","key":"vout_at_19u","index":0,"value":0,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 tran"},{"name":"vout_at_100u","key":"vout_at_100u","index":0,"value":-0.7999806466037843,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 tran"}]} +{"id":"deepseek:01480_72a4455fedc75021:7f73d964590c9f61","source":"deepseek","example_id":"01480_72a4455fedc75021","test_name":"test_test_1480_instrumentation_amplifier_driven_reference_72a4455fedc75021","netlist_hash":"7f73d964590c9f61","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Three-op-amp instrumentation amplifier with second-stage difference amplifier including a driven reference node (Vref).","pair_ids":["2f9bcda97fa7c430","99e82d685236f5ec","d82dcc0f6695e675"],"prompts":["Three-op-amp instrumentation amplifier with second-stage difference amplifier including a driven reference node (Vref).","First stage sets differential gain using Rg=2k and Rf=10k, giving gain=11. Second stage provides unity difference gain and adds the reference voltage.","Behavioral op-amps modeled with dependent voltage sources (E) with open-loop gain 100k."],"measurements":[{"name":"vref_dc","key":"vref_dc","index":0,"value":2.5,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"vout_mag","key":"vout_mag","index":0,"value":1.0998570161682437,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"vout_dc","key":"vout_dc","index":0,"value":2.4999500009871554,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"}]} +{"id":"deepseek:00757_b530489a82d815e6:a941d21697c4fbf9","source":"deepseek","example_id":"00757_b530489a82d815e6","test_name":"test_test_757_biased_negative_diode_limiter_b530489a82d815e6","netlist_hash":"a941d21697c4fbf9","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"This is a biased negative diode limiter circuit.","pair_ids":["92b46974209c309b","ba83e88189255da6","01cebffcebe1d676","46db2ea1f67e03fd"],"prompts":["This is a biased negative diode limiter circuit.","It uses a 1N4148-like diode with a -2V DC bias to clip the negative half of a 5V peak, 1kHz sine wave.","The positive peaks should pass through unclipped, while negative peaks are limited to about -2.7V.","The circuit includes a resistor to limit current, and the diode's model is tuned to provide the correct forward drop."],"measurements":[{"name":"vmin","key":"vmin","index":0,"value":-2.651066646816763,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 TRAN"},{"name":"vmax","key":"vmax","index":0,"value":4.999855603022268,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00055_855ea3e1463e00ff:eccd863ab67fba20","source":"deepseek","example_id":"00055_855ea3e1463e00ff","test_name":"test_test_55_passive_filter_855ea3e1463e00ff","netlist_hash":"eccd863ab67fba20","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Three-stage high-pass RC ladder with tapered impedance to minimize loading","pair_ids":["1e22a882d5b8b1b8","5b331cb00c14cc78","f9d6e0ab3e26efed"],"prompts":["Three-stage high-pass RC ladder with tapered impedance to minimize loading","Phase shift measurement at the expected 180\u00b0 frequency (919 Hz)","Gain measurement at the same frequency to verify -18 dB nominal"],"measurements":[{"name":"gain_919","key":"gain_919","index":0,"value":-18.69695476704311,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"phase_919","key":"phase_919","index":0,"value":3.099205215499926,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:00292_4ae614176e96d9f2:d68e9f47fa7d43af","source":"deepseek","example_id":"00292_4ae614176e96d9f2","test_name":"test_test_292_cmos_nand2_tran_4ae614176e96d9f2","netlist_hash":"d68e9f47fa7d43af","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Design a two-input CMOS NAND gate and run a transient analysis to observe its switching response.","pair_ids":["bee1a90d4ccfb5a1","6b173638ce893f6b","505407bba9890bcc"],"prompts":["Design a two-input CMOS NAND gate and run a transient analysis to observe its switching response.","Create a NAND2 gate using NMOS and PMOS transistors, then simulate its transient behavior with pulsed inputs.","Build a CMOS NAND2 circuit, apply pulse waveforms to both inputs, and measure propagation delay and output levels."],"measurements":[{"name":"vout_high","key":"vout_high","index":0,"value":4.999999998747501,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 tran"},{"name":"prop_delay","key":"prop_delay","index":0,"value":3.031645518908809e-10,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 tran"},{"name":"vout_low","key":"vout_low","index":0,"value":2.5049999669904232e-08,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 tran"}]} +{"id":"deepseek:02300_268d80d12d016e1f:b164cba17c615afc","source":"deepseek","example_id":"02300_268d80d12d016e1f","test_name":"test_test_2300_four_quadrant_analog_multiplier_268d80d12d016e1f","netlist_hash":"b164cba17c615afc","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Four-quadrant analog multiplier using a behavioral G-source and a resistor.","pair_ids":["991bdf58498313b1","e26ebc44ede67b16","368f2784e74cb4b2"],"prompts":["Four-quadrant analog multiplier using a behavioral G-source and a resistor.","The G-source implements I = 0.001 * V(inx) * V(iny), and the resistor converts current to Vout = Vx*Vy.","Verified with DC sweep and transient analysis showing correct linear multiplication and product waveform."],"measurements":[{"name":"vout_at_1","key":"vout_at_1","index":0,"value":0.5,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"vout_max","key":"vout_max","index":0,"value":0.5,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#2 DC"},{"name":"vout_pp","key":"vout_pp","index":0,"value":1.5584196635159213,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:02107_97146b2c69d7d71d:102144197d901566","source":"deepseek","example_id":"02107_97146b2c69d7d71d","test_name":"test_test_2107_synchronous_am_detector_97146b2c69d7d71d","netlist_hash":"102144197d901566","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Synchronous AM detector using a voltage-controlled switch driven by a 100 kHz pulse, half-wave rectifying the AM signal.","pair_ids":["c66a27707b5180be","12d286718884d6bb","d3c0b37d1460e0b8","cc5ea6055ee10d93"],"prompts":["Synchronous AM detector using a voltage-controlled switch driven by a 100 kHz pulse, half-wave rectifying the AM signal.","The switch control is gated at the carrier frequency, passing only positive half cycles to the RC filter.","A parallel 10 k\u03a9 resistor discharges the 10 nF filter capacitor, forming an envelope detector with time constant 100 \u00b5s.","The AM signal uses 100% modulation index with a 1 kHz tone, producing a detected output of \u22481 V DC + 0.5 V peak sine."],"measurements":[{"name":"vout_avg","key":"vout_avg","index":0,"value":0.5327850160163727,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 tran"},{"name":"vout_rms","key":"vout_rms","index":0,"value":0.5859257329050761,"value_is_finite":true,"success":true,"measurement_type":"RMS","simulation_name":"#1 tran"},{"name":"vout_pp","key":"vout_pp","index":0,"value":1.0763838583113001,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#1 tran"}]} +{"id":"deepseek:02192_83f25f858ed9dd70:e18e405e2b523ce0","source":"deepseek","example_id":"02192_83f25f858ed9dd70","test_name":"test_test_2192_pwm_dac_rc_83f25f858ed9dd70","netlist_hash":"e18e405e2b523ce0","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Design a PWM-based digital-to-analog converter using a simple RC low-pass filter and a unity-gain buffer to reconstruct the analog voltage from a 10kHz PWM signal with 50% duty cycle. Measure the steady-state output voltage and ripple.","pair_ids":["bfe0413612fc1c6d","60a8203b94c55f01","7087a9b61ac5c12b","11c5baa4e856de14"],"prompts":["Design a PWM-based digital-to-analog converter using a simple RC low-pass filter and a unity-gain buffer to reconstruct the analog voltage from a 10kHz PWM signal with 50% duty cycle. Measure the steady-state output voltage and ripple.","Create a circuit that converts a 0-5V pulse-width modulated signal at 10kHz into an analog voltage, using a passive RC filter followed by a voltage follower. Verify the output average and peak-to-peak ripple.","Simulate a PWM DAC consisting of a PULSE source representing a 50% duty cycle waveform, an RC filter with a 10k resistor and 0.1uF capacitor, and an ideal op-amp buffer. Check that the output settles near 2.5V within 5ms.","Implement a 10kHz PWM DAC with an RC low-pass filter (R=10k, C=100nF) and a behavioral voltage follower. Analyze the transient response and confirm the filtered output voltage is about 2.5V with small ripple."],"measurements":[{"name":"vout_avg","key":"vout_avg","index":0,"value":2.4967623310344194,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 TRAN"},{"name":"vout_ripple","key":"vout_ripple","index":0,"value":0.14127893952450554,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00100_fd10baf1e55a39f6:b8afa13d0b50c2ab","source":"deepseek","example_id":"00100_fd10baf1e55a39f6","test_name":"test_test_100_pi_network_match_fd10baf1e55a39f6","netlist_hash":"b8afa13d0b50c2ab","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Pi-network matching circuit for 50 Ohm source to 200 Ohm load at 100 MHz.","pair_ids":["5fdca231a1d137b5","9f359b5e2b8683b4","e96794f3460341ce"],"prompts":["Pi-network matching circuit for 50 Ohm source to 200 Ohm load at 100 MHz.","Uses AC analysis to measure input and output voltages.","Verifies impedance transformation and voltage gain."],"measurements":[{"name":"vin_dB","key":"vin_dB","index":0,"value":-6.019331760309619,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"vout_lin","key":"vout_lin","index":0,"value":0.9999999891614212,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"vin_lin","key":"vin_lin","index":0,"value":0.5000730060824787,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"vout_dB","key":"vout_dB","index":0,"value":-9.414270004737806e-08,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:00042_65ab591429137ac3:7e0e8c0ad0f181da","source":"deepseek","example_id":"00042_65ab591429137ac3","test_name":"test_test_42_two_pole_rc_ladder_low_pass_65ab591429137ac3","netlist_hash":"7e0e8c0ad0f181da","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Two-pole RC ladder low-pass filter with R1=1k, C1=73.58n, R2=10k, C2=3.44n.","pair_ids":["247c1b9a0d6c8faa","4c56f369d931f761","09cf3cbbecc7c041"],"prompts":["Two-pole RC ladder low-pass filter with R1=1k, C1=73.58n, R2=10k, C2=3.44n.","Original specified values (R1=10k, C1=10n, R2=1k, C2=100n) gave excessive loading, resulting in a dominant pole at ~133 Hz and cutoff far below 1 kHz.","By reducing R1, increasing R2, and tailoring capacitors, the dominant pole shifts to ~2 kHz and the second pole to ~5 kHz, yielding a -3 dB point near 1.7 kHz and >20 dB attenuation at 10 kHz."],"measurements":[{"name":"f3dB","key":"f3dB","index":0,"value":1760.273270538915,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 AC"},{"name":"vout_10k","key":"vout_10k","index":0,"value":-21.135315216244678,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:01383_5990bbe91453af78:b918f0f05c4ff04c","source":"deepseek","example_id":"01383_5990bbe91453af78","test_name":"test_test_1383_cmos_current_starved_ring_osc_5990bbe91453af78","netlist_hash":"b918f0f05c4ff04c","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Three-stage current-starved ring oscillator using PMOS and NMOS transistors","pair_ids":["e71c5808a91f040a","0ff6f50acf245ea5","bee5188ef0b19c81"],"prompts":["Three-stage current-starved ring oscillator using PMOS and NMOS transistors","Control voltage Vctrl sets oscillator frequency via a current mirror bias network","Load capacitors (C1-3 = 1 pF) and inverter sizes determine the oscillation period (~50 ns)"],"measurements":[{"name":"vpp","key":"vpp","index":0,"value":4.785820471286921,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#1 TRAN"},{"name":"period","key":"period","index":0,"value":2.9560324308976925e-08,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 TRAN"},{"name":"freq","key":"freq","index":0,"value":33829128.176929995,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:02221_5d6963507e7e813c:c25b123971c9d024","source":"deepseek","example_id":"02221_5d6963507e7e813c","test_name":"test_test_2221_sar_comparator_frontend_5d6963507e7e813c","netlist_hash":"c25b123971c9d024","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Sample-and-hold: switch S1 closes when VSAMPLE pulse is high (0-1\u03bcs), charging CSH to Vin=2.5V; an ideal unity-gain buffer EBUF isolates the hold node.","pair_ids":["dab0bca4b94dd989","79f06dad493c4bce","ee9ffc2e96860359"],"prompts":["Sample-and-hold: switch S1 closes when VSAMPLE pulse is high (0-1\u03bcs), charging CSH to Vin=2.5V; an ideal unity-gain buffer EBUF isolates the hold node.","Comparator: behavioral voltage source ECOMP with gain 1e6, clamped by diodes to 0\u20135V, compares hold voltage against a 10\u03bcs linear DAC ramp (0\u21925V from 2\u03bcs to 12\u03bcs).","Measurements confirm correct holding of 2.5V and that the comparator trip occurs exactly when the ramp crosses 2.5V (~7\u03bcs)."],"measurements":[{"name":"v_dac_cross","key":"v_dac_cross","index":0,"value":2.4999999999999933,"value_is_finite":true,"success":true,"measurement_type":"FIND_WHEN","simulation_name":"#1 TRAN"},{"name":"v_held","key":"v_held","index":0,"value":2.4999999999999956,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"t_cross","key":"t_cross","index":0,"value":6.999999999999987e-06,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00661_aa8cd59828feaf77:aa8cd59828feaf77","source":"deepseek","example_id":"00661_aa8cd59828feaf77","test_name":"test_test_661_resistive_splitter_combiner_aa8cd59828feaf77","netlist_hash":"aa8cd59828feaf77","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"The circuit demonstrates a resistive power splitter and combiner using 50\u2011ohm resistors in a delta configuration.","pair_ids":["3d550e2a66d25ada","9d7b3a09e689ec18","944a9bac889f36b5","adfb1992bf7194d7","1866bd5ce9bff25a"],"prompts":["The circuit demonstrates a resistive power splitter and combiner using 50\u2011ohm resistors in a delta configuration.","For the splitter, a 1 V source with 50\u2011ohm source resistance drives a three\u2011resistor network; each output is loaded with 50 ohms.","For the combiner, two independent 1 V sources with 50\u2011ohm source resistances drive the same network, and the common node is loaded with 50 ohms.","The splitter yields 0.25 V at each output, confirming equal power division and input match (0.5 V at input node).","The combiner sums the two inputs to produce 0.5 V at the output, demonstrating matched operation."],"measurements":[{"name":"vout2_mag","key":"vout2_mag","index":0,"value":0.25,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"vout1_mag","key":"vout1_mag","index":0,"value":0.25,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"vin_mag","key":"vin_mag","index":0,"value":0.5,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"vcomb_mag","key":"vcomb_mag","index":0,"value":0.5000000000000002,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:00878_89092c0f62c5f5ca:4ce3d80afb37c7cf","source":"deepseek","example_id":"00878_89092c0f62c5f5ca","test_name":"test_test_878_diode_charge_pump_inverter_89092c0f62c5f5ca","netlist_hash":"4ce3d80afb37c7cf","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":2,"representative_prompt":"The circuit is a diode charge pump inverter that generates a negative voltage from a positive clock pulse.","pair_ids":["f37580bee2c2db5e","dd550b3159e2fed1"],"prompts":["The circuit is a diode charge pump inverter that generates a negative voltage from a positive clock pulse.","Two capacitors and two diodes form the charge pump, and a resistive load drains current."],"measurements":[{"name":"Vripple","key":"Vripple","index":0,"value":0.018485824735052336,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#1 TRAN"},{"name":"Vout_avg","key":"Vout_avg","index":0,"value":-3.6984307723125616,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00969_fe1b24d174939955:671e757065e9a2f9","source":"deepseek","example_id":"00969_fe1b24d174939955","test_name":"test_test_969_bjt_phase_splitter_fe1b24d174939955","netlist_hash":"671e757065e9a2f9","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Single BJT (NPN) phase splitter with equal collector and emitter resistors","pair_ids":["7360f720516f21fc","81f2e131aa2d6138","a49d371aceb52c64"],"prompts":["Single BJT (NPN) phase splitter with equal collector and emitter resistors","Provides two outputs: from collector (inverted) and emitter (non-inverted)","AC analysis verifies approximately 180-degree phase difference at 1kHz"],"measurements":[{"name":"phase_diff","key":"phase_diff","index":0,"value":180.00000000000017,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#2 AC"},{"name":"phase_e","key":"phase_e","index":0,"value":0.0005250368785371391,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"phase_c","key":"phase_c","index":0,"value":-3.141067616711256,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"}]} +{"id":"deepseek:01867_d96a4297632b1452:0d4864803878836c","source":"deepseek","example_id":"01867_d96a4297632b1452","test_name":"test_test_1867_f_to_v_converter_d96a4297632b1452","netlist_hash":"0d4864803878836c","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Frequency-to-voltage converter using charge pump","pair_ids":["ae2b66170bedf886","2d08f5ef48455a36","3270c25c256476be"],"prompts":["Frequency-to-voltage converter using charge pump","Input is a 1 MHz pulse train with 100 ns pulse width, 5 V amplitude","Output is a filtered DC voltage proportional to the input frequency"],"measurements":[{"name":"vout_min","key":"vout_min","index":0,"value":1.0034334634846427,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 tran"},{"name":"vout_avg","key":"vout_avg","index":0,"value":1.0157013635081602,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 tran"},{"name":"vout_max","key":"vout_max","index":0,"value":1.022104660358793,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 tran"},{"name":"vout_pp","key":"vout_pp","index":0,"value":0.01867119687415042,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 tran"}]} +{"id":"deepseek:01877_82b7dacc9dfe7baa:9a99cdb801195e25","source":"deepseek","example_id":"01877_82b7dacc9dfe7baa","test_name":"test_test_1877_series_linreg_opamp_82b7dacc9dfe7baa","netlist_hash":"9a99cdb801195e25","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Linear regulator using op\u2011amp and NPN pass transistor.","pair_ids":["0beb3ed88890a0f2","2ce8988701247411","aaea0649240b2eca"],"prompts":["Linear regulator using op\u2011amp and NPN pass transistor.","Feedback divider sets output to 5V from 2.5V reference.","DC sweep of input voltage validates regulation and dropout."],"measurements":[{"name":"VOUT_12","key":"VOUT_12","index":0,"value":5.000115292001283,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"VOUT_8","key":"VOUT_8","index":0,"value":5.000115315662697,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"LINE_REG","key":"LINE_REG","index":0,"value":-5.915353540331125e-09,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#2 DC"},{"name":"VOUT_NOM","key":"VOUT_NOM","index":0,"value":5.000115303671919,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"}]} +{"id":"deepseek:00806_6cc7134047efd238:909cdaedf78a6cfe","source":"deepseek","example_id":"00806_6cc7134047efd238","test_name":"test_test_806_balanced_diode_mixer_with_rf_and_lo_drives_6cc7134047efd238","netlist_hash":"909cdaedf78a6cfe","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Double-balanced diode ring mixer with 10MHz RF and 9MHz LO.","pair_ids":["8387489bcbdf16da","55c371f28ef13e5c","72a11b7ebf389935"],"prompts":["Double-balanced diode ring mixer with 10MHz RF and 9MHz LO.","Downconverts to 1MHz IF signal.","Output measured after low-pass filtering to extract IF."],"measurements":[{"name":"if_pp","key":"if_pp","index":0,"value":0.19999954515157495,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00873_1edc5fb121e58918:04943710a9df39e6","source":"deepseek","example_id":"00873_1edc5fb121e58918","test_name":"test_test_873_diode_charge_pump_inverter_1edc5fb121e58918","netlist_hash":"04943710a9df39e6","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Design a negative voltage generator using a charge pump with diodes, a 5V clock, and 10kHz frequency.","pair_ids":["4d0e01018f444491","f4519d99e5917092","778ab21728f6c8a7","e687a0f74c69ff53"],"prompts":["Design a negative voltage generator using a charge pump with diodes, a 5V clock, and 10kHz frequency.","Create a SPICE netlist for a diode-based voltage inverter that produces a negative voltage from a 5V square wave.","Simulate a classic charge pump inverter using two diodes and two capacitors, driving a 1k load.","Provide a measured netlist for a simple inverting charge pump that outputs negative voltage from a positive clock signal."],"measurements":[{"name":"vout_min","key":"vout_min","index":0,"value":-4.043417892915057,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 TRAN"},{"name":"vout_avg","key":"vout_avg","index":0,"value":-4.035850249134446,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 TRAN"},{"name":"vout_max","key":"vout_max","index":0,"value":-4.023246033054476,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00771_d4f4913698f59c55:668f8c28872220cc","source":"deepseek","example_id":"00771_d4f4913698f59c55","test_name":"test_test_771_diode_and_gate_pullup_d4f4913698f59c55","netlist_hash":"668f8c28872220cc","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Diode AND gate with pull-up resistor using two pulse inputs","pair_ids":["6106f4594ea249f0","8d8edef5492a4f9f","ada787e6d2be8383"],"prompts":["Diode AND gate with pull-up resistor using two pulse inputs","Output measured high when both inputs high (3ms to 3.5ms)","Output measured low when B is low and A is high (1ms to 1.5ms)"],"measurements":[{"name":"vout_high","key":"vout_high","index":0,"value":4.999999999999432,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 TRAN"},{"name":"vout_low","key":"vout_low","index":0,"value":0.5788560413467662,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00315_42c1665fe73f722f:e578667e04206126","source":"deepseek","example_id":"00315_42c1665fe73f722f","test_name":"test_test_315_non_inverting_amplifier_42c1665fe73f722f","netlist_hash":"e578667e04206126","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Design a non-inverting amplifier with a voltage gain of 5 using an ideal operational amplifier modeled as a behavioral E-source. Perform an AC sweep from 1 Hz to 100 kHz and report the gain in decibels at 1 kHz.","pair_ids":["0a3a7e2de615c140","f5fbcf6029e307f1","1fc4ceb07e910072"],"prompts":["Design a non-inverting amplifier with a voltage gain of 5 using an ideal operational amplifier modeled as a behavioral E-source. Perform an AC sweep from 1 Hz to 100 kHz and report the gain in decibels at 1 kHz.","Create a SPICE netlist for a non-inverting op-amp configured for a gain of 5. Use an E-source with gain 100k as the op-amp. Run an AC analysis and measure the output voltage gain at 1 kHz.","Simulate a non-inverting amplifier circuit: input AC 1V, feedback resistors 10k\u03a9 and 2.5k\u03a9, op-amp gain 100k. Sweep frequency from 1 Hz to 100 kHz, then extract the gain in dB at 1 kHz."],"measurements":[{"name":"gain_db","key":"gain_db","index":0,"value":13.978965803101374,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:01268_53576df2e3b9cb28:f9d4a46e5b2dd179","source":"deepseek","example_id":"01268_53576df2e3b9cb28","test_name":"test_test_1268_cmos_differential_pair_currentmirror_53576df2e3b9cb28","netlist_hash":"f9d4a46e5b2dd179","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"CMOS differential pair with active current mirror load.","pair_ids":["74626feabf5191f0","4fbb96078bb357d1","d3e992286013fb13","01bca011c674011a"],"prompts":["CMOS differential pair with active current mirror load.","M1/M2 input pair, M3/M4 PMOS mirror, M5 tail sink.","DC sweep of Vinp shows high-gain transition.","Load capacitor C1 introduces dominant pole for AC roll-off."],"measurements":[{"name":"vout_min","key":"vout_min","index":0,"value":1.733507368326028e-08,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#3 DC"},{"name":"phase_at_ugf","key":"phase_at_ugf","index":0,"value":-1.5666972701372193,"value_is_finite":true,"success":true,"measurement_type":"FIND_WHEN","simulation_name":"#2 AC"},{"name":"ugf","key":"ugf","index":0,"value":70599932.29719049,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#2 AC"},{"name":"vout_cm","key":"vout_cm","index":0,"value":4.086463957361275,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#3 DC"},{"name":"gain_1k","key":"gain_1k","index":0,"value":47.802997110890104,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"vout_max","key":"vout_max","index":0,"value":5.00000012125069,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#3 DC"}]} +{"id":"deepseek:00786_18536447b5699504:b92fee7344c1cc46","source":"deepseek","example_id":"00786_18536447b5699504","test_name":"test_test_786_bridge_diode_polarity_protector_18536447b5699504","netlist_hash":"b92fee7344c1cc46","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Bridge diode polarity protector","pair_ids":["6abb52a447156b85","3c45fd3146dd442b","845bfbb73840265a"],"prompts":["Bridge diode polarity protector","Converts input of either polarity to positive output","Uses four diodes in bridge configuration"],"measurements":[{"name":"Vout_test","key":"Vout_test","index":0,"value":4.2923810805282585,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 TRAN"},{"name":"Vout_dc","key":"Vout_dc","index":0,"value":4.292381080527145,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 TRAN"},{"name":"Vout_max","key":"Vout_max","index":0,"value":4.2923810805284655,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#2 TRAN"},{"name":"Vout_min","key":"Vout_min","index":0,"value":0.781214029339036,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#2 TRAN"},{"name":"Vout_avg","key":"Vout_avg","index":0,"value":4.292376893578293,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#2 TRAN"}]} +{"id":"deepseek:01576_0af2bcfd22fbc113:11ac1bea0fe6cfde","source":"deepseek","example_id":"01576_0af2bcfd22fbc113","test_name":"test_test_1576_opamp_sample_hold_0af2bcfd22fbc113","netlist_hash":"11ac1bea0fe6cfde","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Sample-and-hold circuit with op-amp buffers (E sources), ideal switch (S element), and 1uF holding capacitor.","pair_ids":["544c70e926bede69","a312b0f85bcdd9bb","b334167673a0fe34","a4dc1b45089d68d9"],"prompts":["Sample-and-hold circuit with op-amp buffers (E sources), ideal switch (S element), and 1uF holding capacitor.","Input sine wave 2V offset, 1V amplitude at 1kHz; switch closes from 0.2ms to 0.7ms, opens, and holds the voltage.","Ultra-low switch on-resistance (0.1 ohm) minimizes tracking error from RC lag; high parallel resistance (1G) ensures negligible droop.","Output buffer isolates hold node from 10k load; measurements validate sub-mV hold accuracy."],"measurements":[{"name":"v_sampled","key":"v_sampled","index":0,"value":1.0489713524320017,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"v_hold","key":"v_hold","index":0,"value":1.0488419180532815,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"v_diff","key":"v_diff","index":0,"value":-0.00012943437872015018,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:02455_f0f62d9fc3386bde:550d6df0b47e8060","source":"deepseek","example_id":"02455_f0f62d9fc3386bde","test_name":"test_test_2455_capacitive_sensor_charge_amplifier_f0f62d9fc3386bde","netlist_hash":"550d6df0b47e8060","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"Charge amplifier for capacitive sensor interface using behavioral op-amp (gain 100k).","pair_ids":["7dc01825a02b3f20","3b6aea6dae268238","e8ded7cfc9d3247b","e8b053e7029b2d1b","c4979bfed58f7dbb"],"prompts":["Charge amplifier for capacitive sensor interface using behavioral op-amp (gain 100k).","Feedback network: Cf=1nF, Rf=10Meg. Sensor capacitor Cs=100pF.","Reset switch S1 shorts Cf when Vreset=5V, opens at 0V. Vreset pulse (0\u21925V at 1us, back to 0 at 6us) performs reset before step.","Sensor voltage steps from 1V to 2V at 10us. Charge injection from Cs integrates on Cf, causing output change of -(Cs/Cf)*dVsens = -0.1V.","Output initially settles to Vref=1V after reset, then drops to 0.9V after step."],"measurements":[{"name":"delta_v","key":"delta_v","index":0,"value":-0.09986600153570169,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 TRAN"},{"name":"v_final","key":"v_final","index":0,"value":0.9001239984318091,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 TRAN"},{"name":"v_initial","key":"v_initial","index":0,"value":0.9999899999675108,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:01183_f3864687b18fa566:c7336bc87c5ef020","source":"deepseek","example_id":"01183_f3864687b18fa566","test_name":"test_test_1183_bjt_emitter_coupled_logic_differential_switch_f3864687b18fa566","netlist_hash":"c7336bc87c5ef020","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"Differential switch with Q1 input, Q2 reference, 1 mA tail current, 800 \u03a9 collector loads, emitter followers on both collectors.","pair_ids":["200db5e02dd41852","b20755c9e688ac3c","360c7431db6bc0d5","1014db5b51b58ece","66344829ea437ab8"],"prompts":["Differential switch with Q1 input, Q2 reference, 1 mA tail current, 800 \u03a9 collector loads, emitter followers on both collectors.","Corrected OR output from Q2 collector (c2) and NOR output from Q1 collector (c1) to match logic function.","Emitter followers shift outputs down by ~0.7 V, yielding output levels of about -0.7 V (high) and -1.5 V (low).","Transition occurs when VIN crosses approximately -1.3 V (reference voltage).","Propagation delay measured from input rising through -1.25 V to OR output rising through -1.1 V, expected sub\u2011nanosecond due to fast BJT models."],"measurements":[{"name":"v_nor_low_dc","key":"v_nor_low_dc","index":0,"value":-1.5366379816247093,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#3 DC"},{"name":"v_or_low_dc","key":"v_or_low_dc","index":0,"value":-1.536637981747648,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#3 DC"},{"name":"v_nor_high_dc","key":"v_nor_high_dc","index":0,"value":-0.7526791633475804,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#3 DC"},{"name":"t_prop_delay","key":"t_prop_delay","index":0,"value":1.7500651291898696e-10,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#2 TRAN"},{"name":"v_or_low","key":"v_or_low","index":0,"value":-1.5366402694149937,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#2 TRAN"},{"name":"t_in_cross","key":"t_in_cross","index":0,"value":2.05e-09,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#2 TRAN"},{"name":"v_nor_low","key":"v_nor_low","index":0,"value":-1.5366219561187953,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#2 TRAN"},{"name":"v_or_swing","key":"v_or_swing","index":0,"value":0.7839593507220722,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#2 TRAN"},{"name":"v_nor_high","key":"v_nor_high","index":0,"value":-0.7526791633837268,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#2 TRAN"},{"name":"t_out_or_cross","key":"t_out_or_cross","index":0,"value":2.225006512918987e-09,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#2 TRAN"},{"name":"v_nor_swing","key":"v_nor_swing","index":0,"value":0.7839427927350685,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#2 TRAN"},{"name":"v_or_high","key":"v_or_high","index":0,"value":-0.7526809186929214,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#2 TRAN"},{"name":"v_or_high_dc","key":"v_or_high_dc","index":0,"value":-0.7526791621939964,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#3 DC"},{"name":"v_thresh","key":"v_thresh","index":0,"value":-1.2940552515975476,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#3 DC"}]} +{"id":"deepseek:00404_c0382c9dfbda712f:6fab1b094a14bc87","source":"deepseek","example_id":"00404_c0382c9dfbda712f","test_name":"test_test_404_instrumentation_amplifier_c0382c9dfbda712f","netlist_hash":"6fab1b094a14bc87","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"Three op\u2011amp instrumentation amplifier with behavioral voltage\u2011controlled voltage sources (E1, E2, E3) having gain 1e5.","pair_ids":["d4ad3991c18f5b2e","7152061a368920fd","84b11ea33ab7e5fc","d56ecb1ad1cc5031","2ef8ad83760c9501"],"prompts":["Three op\u2011amp instrumentation amplifier with behavioral voltage\u2011controlled voltage sources (E1, E2, E3) having gain 1e5.","First stage: two non\u2011inverting amplifiers with gain 1 + 2\u00d7Rf/Rg = 21, where Rf=10k and Rg=1k.","Second stage: difference amplifier with gain R2/R1 = 10, where R1=R3=10k and R2=R4=100k.","Input common\u2011mode voltage set to 2.5 V via VREF and differential signal of 1 mV created by VINP (2.5005 V) and VINN (2.4995 V).","AC inputs are out of phase (0.5 V each) yielding 1 V differential for AC analysis."],"measurements":[{"name":"op_out","key":"op_out","index":0,"value":2.709657846891787,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#2 DC"},{"name":"ac_gain_db","key":"ac_gain_db","index":0,"value":46.44160665403625,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:00885_0489a67ef0099411:98223f14b28bc8cb","source":"deepseek","example_id":"00885_0489a67ef0099411","test_name":"test_test_885_bootstrapped_diode_charge_pump_level_shifter_0489a67ef0099411","netlist_hash":"98223f14b28bc8cb","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Two-stage Dickson charge pump with diodes D1-D3 and capacitors C1-C2.","pair_ids":["591594cc83bdf5f9","f5bbd6c456593379","8e89e0b5bc41c97e"],"prompts":["Two-stage Dickson charge pump with diodes D1-D3 and capacitors C1-C2.","Driven by two complementary 3.3\u202fV, 1\u202fMHz pulse sources (VIN, VIN2) with 10\u202fns rise/fall.","Output taken across a 100\u202fk\u03a9 load (Rload) and 1\u202fnF filter capacitor (Cload)."],"measurements":[{"name":"Vout_ripple","key":"Vout_ripple","index":0,"value":0.0396869112021383,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#1 tran"},{"name":"Vout_avg","key":"Vout_avg","index":0,"value":7.653526468639131,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 tran"}]} +{"id":"deepseek:01369_90d4b67e9d834f2f:90d4b67e9d834f2f","source":"deepseek","example_id":"01369_90d4b67e9d834f2f","test_name":"test_test_1369_cmos_dynamic_precharge_inverter_90d4b67e9d834f2f","netlist_hash":"90d4b67e9d834f2f","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Create a SPICE netlist for a CMOS dynamic precharge inverter. Use a PMOS precharge transistor clocked by a pulse, an NMOS evaluation transistor driven by a data input, and a load capacitor. Simulate with transient analysis and measure output high and low voltages, propagation delay, and fall time.","pair_ids":["119c08f731bb115a","de42413328068300","714177d7d1e71415"],"prompts":["Create a SPICE netlist for a CMOS dynamic precharge inverter. Use a PMOS precharge transistor clocked by a pulse, an NMOS evaluation transistor driven by a data input, and a load capacitor. Simulate with transient analysis and measure output high and low voltages, propagation delay, and fall time.","Design a dynamic CMOS inverter circuit where the output node is precharged high during the clock low phase and conditionally discharged during evaluation if input is high. Include MOSFET models with typical parameters. Perform transient simulation and extract key timing and voltage metrics.","Write a measured SPICE netlist for a dynamic logic inverter. The circuit should consist of a PMOS precharge device, an NMOS evaluate device, and a 10fF load capacitor. Apply appropriate pulse sources for clock and data. Use .MEASURE to find the output voltage levels and switching delays."],"measurements":[{"name":"tphl","key":"tphl","index":0,"value":9.301716583067611e-12,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 TRAN"},{"name":"voh","key":"voh","index":0,"value":1.7999999987469228,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"tfall","key":"tfall","index":0,"value":1.582209663139379e-10,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 TRAN"},{"name":"vol","key":"vol","index":0,"value":-3.8499008119153e-05,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:02333_3fad16f2a7821ef7:8dcbedb53ddff0c5","source":"deepseek","example_id":"02333_3fad16f2a7821ef7","test_name":"test_test_2333_boost_converter_open_loop_3fad16f2a7821ef7","netlist_hash":"8dcbedb53ddff0c5","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Design an open-loop boost converter circuit using a MOSFET switch, diode, inductor, capacitor, and load resistor. The input voltage is 5V, and the switching frequency is 100 kHz. Use a pulse source to drive the gate with a duty cycle of approximately 58%. Include SPICE .MEAS statements to compute average output voltage, output voltage ripple, input power, and output power, and estimate efficiency. Provide the full netlist.","pair_ids":["a5d5292d947ed5e8","76c8e5dec7ebcb6d","a02f58eef3ac0f1f"],"prompts":["Design an open-loop boost converter circuit using a MOSFET switch, diode, inductor, capacitor, and load resistor. The input voltage is 5V, and the switching frequency is 100 kHz. Use a pulse source to drive the gate with a duty cycle of approximately 58%. Include SPICE .MEAS statements to compute average output voltage, output voltage ripple, input power, and output power, and estimate efficiency. Provide the full netlist.","Create a SPICE netlist for a boost converter without feedback. Use a voltage-controlled MOSFET switch turned on and off by a 100 kHz pulse width modulated signal from a pulse source. The converter should step up a 5V input to around 12V. Include inductor, diode, capacitor, load resistor, and necessary models. Add .TRAN analysis and .MEAS commands to evaluate steady-state performance, including average output, ripple, and efficiency.","I need a measured SPICE netlist for an open-loop switching boost converter. It should have a 5V DC input, a switching MOSFET, a diode, a 50uH inductor, a 100uF output capacitor, and a 10 ohm load. The gate drive is a pulse with 10V amplitude, 58.3% duty cycle, and 100 kHz frequency. Please include .MODEL statements, a transient analysis from 0 to 5 ms, and .MEAS statements to capture average Vout, Vout ripple peak-to-peak, input power, output power, and efficiency. The netlist must end with .END and use ground node 0."],"measurements":[{"name":"Pin","key":"Pin","index":0,"value":5,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 TRAN"},{"name":"Vout_ripple","key":"Vout_ripple","index":0,"value":0.06038996471278679,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#1 TRAN"},{"name":"Pout","key":"Pout","index":0,"value":10.297174104542135,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 TRAN"},{"name":"Vout_avg","key":"Vout_avg","index":0,"value":10.297174104542135,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:01524_9d1304dfee686ffc:15bdb178664055bc","source":"deepseek","example_id":"01524_9d1304dfee686ffc","test_name":"test_test_1524_howland_current_pump_9d1304dfee686ffc","netlist_hash":"15bdb178664055bc","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"The Howland current pump uses a behavioral op-amp with 100k DC gain and a 1 Hz dominant pole, giving a GBW of 100 kHz.","pair_ids":["ee785e624a34cbcf","8f7f310b58d3fbdb","f0f6027f357316de","ffcd913f55796609"],"prompts":["The Howland current pump uses a behavioral op-amp with 100k DC gain and a 1 Hz dominant pole, giving a GBW of 100 kHz.","Resistor ratios set a transconductance of 0.5 mA/V: Iout = Vin * (R2/(R1+R2)) / R3.","Output current is measured via a zero-volt source Vsense; DC sweep confirms linearity.","AC analysis reveals a -3 dB bandwidth near 50 kHz, exceeding the required 10 kHz."],"measurements":[{"name":"Iout_05","key":"Iout_05","index":0,"value":0.000249995000099998,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#3 DC"},{"name":"low_gain","key":"low_gain","index":0,"value":0.0004999899999999953,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"Iout_10","key":"Iout_10","index":0,"value":0.000499990000199996,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#3 DC"},{"name":"bw","key":"bw","index":0,"value":32204.537946470766,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#2 AC"},{"name":"transconductance","key":"transconductance","index":0,"value":0.0004999900001999959,"value_is_finite":true,"success":true,"measurement_type":"DERIV","simulation_name":"#3 DC"},{"name":"Iout_15","key":"Iout_15","index":0,"value":0.0007499850002999942,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#3 DC"}]} +{"id":"deepseek:02193_aa0853dd45f87509:aa0853dd45f87509","source":"deepseek","example_id":"02193_aa0853dd45f87509","test_name":"test_test_2193_pwm_dac_rc_filter_aa0853dd45f87509","netlist_hash":"aa0853dd45f87509","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"Design a PWM DAC using a pulse source and an RC lowpass filter to reconstruct the DC voltage.","pair_ids":["a0a8434805214f77","e0f0c3f87a849460","de739a5554160a56","bb0058760800541f","2e13d08e28b0e6e5"],"prompts":["Design a PWM DAC using a pulse source and an RC lowpass filter to reconstruct the DC voltage.","Create a simple digital-to-analog converter using a PWM signal filtered by a first-order RC network.","Simulate a PWM signal with 50% duty cycle at 1MHz and a 10k\u03a9-10nF RC filter, and verify the output voltage averages to 2.5V.","Construct a PWM DAC from a pulse generator with Vmax=5V, Vmin=0V, and an RC filter, then measure the average output and ripple.","Use a PULSE voltage source at 1MHz with 50% duty cycle and an RC reconstruction filter to produce a DC output, and validate it with .MEASURE statements."],"measurements":[{"name":"Vavg","key":"Vavg","index":0,"value":2.5049886568053408,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 TRAN"},{"name":"Vripple","key":"Vripple","index":0,"value":0.012598638353961356,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00303_2637ac7ff0551536:0db5e5c35798db04","source":"deepseek","example_id":"00303_2637ac7ff0551536","test_name":"test_test_303_cmos_nor2_transient_2637ac7ff0551536","netlist_hash":"0db5e5c35798db04","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":2,"representative_prompt":"CMOS NOR2 gate transient simulation with realistic input slew rates","pair_ids":["1800267c3566a604","52050eed8fb40993"],"prompts":["CMOS NOR2 gate transient simulation with realistic input slew rates","Adjusted input rise/fall times to 1ns to obtain output transition times within the acceptable range"],"measurements":[{"name":"t_rise","key":"t_rise","index":0,"value":3.300905715761115e-10,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 TRAN"},{"name":"t_fall","key":"t_fall","index":0,"value":3.303362188898678e-10,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00316_98af241aef9961d0:f48ab904278f6d1c","source":"deepseek","example_id":"00316_98af241aef9961d0","test_name":"test_test_316_noninverting_opamp_98af241aef9961d0","netlist_hash":"f48ab904278f6d1c","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Design a non-inverting amplifier with a gain of 11 using an ideal op-amp modeled as an E-source.","pair_ids":["4751ceaee10a05ac","8a4296dc333005be","504a885cee864797"],"prompts":["Design a non-inverting amplifier with a gain of 11 using an ideal op-amp modeled as an E-source.","Create a SPICE netlist for an AC analysis of a non-inverting op-amp circuit with a voltage gain of approximately 11.","Simulate a non-inverting amplifier with a behavioral E-source op-amp, Rf=10k, Rg=1k, and measure the voltage gain at 1 kHz."],"measurements":[{"name":"gain_1kHz","key":"gain_1kHz","index":0,"value":10.998790133085361,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:00714_90bfd55fb149007f:cefa10c5e67c9906","source":"deepseek","example_id":"00714_90bfd55fb149007f","test_name":"test_test_714_precision_halfwave_rectifier_90bfd55fb149007f","netlist_hash":"cefa10c5e67c9906","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Design a precision half-wave rectifier using an ideal op-amp and a diode. The input is a 2V amplitude 1kHz sine wave. Use a behavioral E-source with gain 1e5 for the op-amp, and a diode model with IS=1e-14 RS=0.1. Include a load resistor of 10k\u03a9. Run a transient simulation and measure peak output, average output, and minimum output.","pair_ids":["1199b24a82a6ab92","0fe578896feb46e8","ae5dd60b0aeda47b"],"prompts":["Design a precision half-wave rectifier using an ideal op-amp and a diode. The input is a 2V amplitude 1kHz sine wave. Use a behavioral E-source with gain 1e5 for the op-amp, and a diode model with IS=1e-14 RS=0.1. Include a load resistor of 10k\u03a9. Run a transient simulation and measure peak output, average output, and minimum output.","Simulate a precision half-wave rectifier circuit that uses a high-gain op-amp (E source with gain 100k) and a diode to rectify a 2V sine wave at 1kHz. The op-amp is powered by \u00b115V supplies with clamping diodes. Take the output across a 10kOhm load. Perform transient analysis and verify the rectified output has peak around 2V and average around 0.636V.","Create a SPICE model for a non-inverting half-wave precision rectifier. The op-amp is modeled as a voltage-controlled voltage source with gain 1e5, with its output clamped to \u00b115V rails via diodes. The input is a 2V peak sine wave at 1kHz. Use a diode with model parameters IS=1e-14 RS=0.1. The output is at the inverting input node with a 10k\u03a9 resistor to ground. Run transient simulation and measure peak, average, and minimum output voltages."],"measurements":[{"name":"min_out","key":"min_out","index":0,"value":-3.5858096843026165e-07,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 TRAN"},{"name":"peak_out","key":"peak_out","index":0,"value":1.9999718344364563,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"},{"name":"avg_out","key":"avg_out","index":0,"value":0.6366185573492997,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:02103_b284e781def51ee4:e3b3f2fb0c7b6850","source":"deepseek","example_id":"02103_b284e781def51ee4","test_name":"test_test_2103_am_modulator_g_multiplier_b284e781def51ee4","netlist_hash":"e3b3f2fb0c7b6850","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"The circuit uses a voltage-controlled current source (Gout) as a multiplier to modulate a 1 MHz carrier with a 1 kHz modulating tone plus DC offset.","pair_ids":["a3090d1f8223cf36","d1e52c261d6c0992","59e06bb6be94d47a","64f84e3c580855cc"],"prompts":["The circuit uses a voltage-controlled current source (Gout) as a multiplier to modulate a 1 MHz carrier with a 1 kHz modulating tone plus DC offset.","The POLY(2) coefficients are set to produce V(mod)*V(car) with a scaling factor such that the output voltage at rfout has an envelope identical to the modulating signal.","An envelope detector (diode, capacitor, resistor) extracts the modulation envelope, allowing the modulation index to be computed as (Vmax-Vmin)/(Vmax+Vmin).","The diode uses a near-ideal model (N=0.01) to minimize forward voltage drop and ensure accurate envelope extraction."],"measurements":[{"name":"modulation","key":"modulation","index":0,"value":0.9478952007801282,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 TRAN"},{"name":"Vmax_env","key":"Vmax_env","index":0,"value":1.9935447227794945,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"},{"name":"Vmin_env","key":"Vmin_env","index":0,"value":0.053325891184833336,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00152_8b554b7cb6aa0e7e:68c6be99eabdd07a","source":"deepseek","example_id":"00152_8b554b7cb6aa0e7e","test_name":"test_test_152_envelope_detector_8b554b7cb6aa0e7e","netlist_hash":"68c6be99eabdd07a","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"The circuit is an AM envelope detector using a single diode, resistor, and capacitor.","pair_ids":["befd69b2c1d85310","0225832a66479352","de5f8a0756ec73e7"],"prompts":["The circuit is an AM envelope detector using a single diode, resistor, and capacitor.","The AM signal is generated by multiplying a 10 kHz carrier with a 1 kHz modulating tone (with a DC offset to prevent over-modulation).","The diode rectifies the AM signal, and the RC filter smooths out the carrier frequency to recover the modulating envelope."],"measurements":[{"name":"vpp","key":"vpp","index":0,"value":0.2811040717533017,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#1 TRAN"},{"name":"vavg","key":"vavg","index":0,"value":0.31794156530829193,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00672_970c244becfce562:26d9a4f84e6bfb3c","source":"deepseek","example_id":"00672_970c244becfce562","test_name":"test_test_672_t_section_lc_impedance_matching_network_970c244becfce562","netlist_hash":"26d9a4f84e6bfb3c","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"T-section LC impedance matching network designed for 50-ohm to 150-ohm transformation.","pair_ids":["d30bfb5e7fcd3665","5f47a744213f8af3","f4d4447dbd3a33ce"],"prompts":["T-section LC impedance matching network designed for 50-ohm to 150-ohm transformation.","Uses series inductors L1 and L2 with a shunt capacitor C1 in a low-pass configuration.","At 10 MHz, the network presents a 50-ohm input impedance, maximizing power transfer."],"measurements":[{"name":"vout_10meg","key":"vout_10meg","index":0,"value":0.8660235356212834,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"gain_db_10meg","key":"gain_db_10meg","index":0,"value":-1.2494061030350836,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:01519_9e41c67de06c0fbe:2e770d6a38d658fa","source":"deepseek","example_id":"01519_9e41c67de06c0fbe","test_name":"test_test_1519_op_amp_voltage_to_current_converter_with_grounded_load_9e41c67de06c0fbe","netlist_hash":"2e770d6a38d658fa","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"This is a Howland current pump with grounded load.","pair_ids":["e27e18b6fd172a17","0706a0d007b2cb7a","418690067fd46a64","4f04bd5177d3712a"],"prompts":["This is a Howland current pump with grounded load.","Output current is proportional to input voltage with transconductance -100 uA/V.","Offset is zero.","Ideal op-amp with gain 1e12."],"measurements":[{"name":"i_out_pos","key":"i_out_pos","index":0,"value":-0.00010000038146972657,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"i_offset","key":"i_offset","index":0,"value":0,"value_is_finite":true,"success":true,"measurement_type":"FIND_WHEN","simulation_name":"#2 DC"},{"name":"gm","key":"gm","index":0,"value":-0.00010000020265579214,"value_is_finite":true,"success":true,"measurement_type":"DERIV","simulation_name":"#2 DC"},{"name":"i_out_neg","key":"i_out_neg","index":0,"value":0.00010000038146972657,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"}]} +{"id":"deepseek:00741_94a8c4eddefad5fe:899bedf2be216208","source":"deepseek","example_id":"00741_94a8c4eddefad5fe","test_name":"test_test_741_diode_peak_detector_bleed_resistor_94a8c4eddefad5fe","netlist_hash":"899bedf2be216208","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Diode D1 conducts when input voltage exceeds output voltage, charging capacitor C1 to the peak input voltage minus a diode forward drop.","pair_ids":["37213e1b10733fd5","a08e0c4e5448929a","38aafa7977973a93"],"prompts":["Diode D1 conducts when input voltage exceeds output voltage, charging capacitor C1 to the peak input voltage minus a diode forward drop.","Bleed resistor R1 slowly discharges C1, causing a small voltage droop between input peaks, illustrating the hold capability.","The .MEASURE statements capture steady-state peak and minimum output after initial charging, using a FROM time of 2 ms."],"measurements":[{"name":"min_out","key":"min_out","index":0,"value":4.222831469429853,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 TRAN"},{"name":"peak_out","key":"peak_out","index":0,"value":4.591362968715877,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:02134_e063f366009839e2:3d46a858f468b78b","source":"deepseek","example_id":"02134_e063f366009839e2","test_name":"test_test_2134_photodiode_reverse_bias_tia_e063f366009839e2","netlist_hash":"3d46a858f468b78b","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"Photodiode readout circuit with reverse bias","pair_ids":["62190ef5a69bdfe1","7fb0dad1c9b3eb12","06445eee3a40573b","71b274479f9a2bc9","0948f93ac9b786d6"],"prompts":["Photodiode readout circuit with reverse bias","Transimpedance amplifier using ideal op-amp E1 with gain 100k","Feedback resistor Rf = 10 k\u03a9 sets transimpedance gain to 10k","Load resistor RL = 100 k\u03a9 represents subsequent stage","Pulsed photocurrent source IPHOTO simulates light pulse (0 to 10 \u00b5A)"],"measurements":[{"name":"vout_avg","key":"vout_avg","index":0,"value":5.050511098104628,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#2 TRAN"},{"name":"vout_max","key":"vout_max","index":0,"value":5.099949060590006,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#2 TRAN"}]} +{"id":"deepseek:01224_6ff3664a728e0df0:cd468719d4235215","source":"deepseek","example_id":"01224_6ff3664a728e0df0","test_name":"test_test_1224_nmos_cascode_gain_stage_6ff3664a728e0df0","netlist_hash":"cd468719d4235215","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"NMOS cascode amplifier with resistive load and output capacitance.","pair_ids":["26bf91a8f4136f7c","bba2c216b12392a4","f28260a54032eeab"],"prompts":["NMOS cascode amplifier with resistive load and output capacitance.","Biasing: VG1=1.5V, VG2=2.5V, VDD=5V, RD=10k.","Measures AC gain as MAX VDB(out) and bandwidth as the frequency where VDB(out) drops to 11 dB."],"measurements":[{"name":"gain_db","key":"gain_db","index":0,"value":14.11020971249915,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#2 AC"},{"name":"bw","key":"bw","index":0,"value":16287339.502216956,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#2 AC"}]} +{"id":"deepseek:00893_2a66bc2e9167467b:3756fc11d44bfa95","source":"deepseek","example_id":"00893_2a66bc2e9167467b","test_name":"test_test_893_fixed_bias_common_emitter_bjt_amplifier_2a66bc2e9167467b","netlist_hash":"3756fc11d44bfa95","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Fixed-bias common-emitter BJT amplifier with NPN transistor.","pair_ids":["5ff5a84672720d31","187ba6adba577311","ead4fb14b2dac599","a37ffa346358c9fe"],"prompts":["Fixed-bias common-emitter BJT amplifier with NPN transistor.","VCC=12 V, RC=2.2 k\u03a9, RB=680 k\u03a9, RL=10 k\u03a9.","Coupling capacitors Cin=10 \u03bcF, Cout=10 \u03bcF provide AC coupling.","DC operating point and AC voltage gain are measured."],"measurements":[{"name":"gain_dB","key":"gain_dB","index":0,"value":41.95181964263887,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#2 AC"},{"name":"VCE_OP","key":"VCE_OP","index":0,"value":7.810199544548047,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#3 DC"}]} +{"id":"deepseek:01486_2a1d4c0af2e282ec:1987bc782f52c117","source":"deepseek","example_id":"01486_2a1d4c0af2e282ec","test_name":"test_test_1486_instrumentation_amplifier_with_driven_reference_2a1d4c0af2e282ec","netlist_hash":"1987bc782f52c117","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"The instrumentation amplifier has a gain of 21 set by Rf1, Rf2, and Rg (10k, 10k, 1k).","pair_ids":["8804ebccb50ca9a4","0923b556721b53e8","c032c4d0b8171ba8","39135516c481d622"],"prompts":["The instrumentation amplifier has a gain of 21 set by Rf1, Rf2, and Rg (10k, 10k, 1k).","The difference amplifier stage uses equal resistors (R1, Rf3, R3, R4 = 10k) to provide unity gain from the first-stage outputs and add the reference.","The reference node is driven by a unity-gain buffer (X_U4) to prevent loading of the reference source.","A dummy DC sweep of V_ref from 1V to 1V ensures a DC analysis point exists for .MEAS statements."],"measurements":[{"name":"vref_dc","key":"vref_dc","index":0,"value":0.9999990000010001,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"out_1k","key":"out_1k","index":0,"value":20.99951701052487,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"vout_dc","key":"vout_dc","index":0,"value":1.2099921696353704,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"}]} +{"id":"deepseek:02157_260a4dd63e0c14b0:5124222690558934","source":"deepseek","example_id":"02157_260a4dd63e0c14b0","test_name":"test_test_2157_strain_gauge_inamp_260a4dd63e0c14b0","netlist_hash":"5124222690558934","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Full Wheatstone bridge with four strain gauges, two in tension and two in compression.","pair_ids":["84d1886578046ac9","f8cae7343fdfe2cd","be531c691b3c7b49"],"prompts":["Full Wheatstone bridge with four strain gauges, two in tension and two in compression.","Instrumentation amplifier with gain=410 amplifies differential bridge voltage.","Excitation voltage is 5V, gauge factor 2, nominal resistance 350\u03a9."],"measurements":[{"name":"vout_0strain","key":"vout_0strain","index":0,"value":-4.656612873077393e-10,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 DC"},{"name":"vout_maxstrain","key":"vout_maxstrain","index":0,"value":4.099786096252501,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 DC"}]} +{"id":"deepseek:01516_3a1bbeca119795ae:6ba162a32f76ff9f","source":"deepseek","example_id":"01516_3a1bbeca119795ae","test_name":"test_test_1516_opamp_voltage_to_current_3a1bbeca119795ae","netlist_hash":"6ba162a32f76ff9f","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Voltage-to-current converter using an ideal op-amp (voltage follower) and a 10k\u03a9 series resistor.","pair_ids":["684c518c5bd1ef6b","e29080912599afbd","b5c132bff366168a"],"prompts":["Voltage-to-current converter using an ideal op-amp (voltage follower) and a 10k\u03a9 series resistor.","The op-amp is modeled by a voltage-controlled voltage source (E1) with gain=1e5, forcing the voltage at node 'out' to follow node 'in'.","The load current is sensed through RL (100\u03a9) and equals approximately (V(in)-V(load))/Rconv, with V(load) small ~ 10mV at 1V input, giving ~99\u00b5A."],"measurements":[{"name":"current_gain","key":"current_gain","index":0,"value":9.900891090099001e-05,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#2 DC"},{"name":"i_at_0_5","key":"i_at_0_5","index":0,"value":4.9504455450495005e-05,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"i_at_1","key":"i_at_1","index":0,"value":9.900891090099001e-05,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"}]} +{"id":"deepseek:01854_fa0353608adc6185:de04cc7f9ce97ab3","source":"deepseek","example_id":"01854_fa0353608adc6185","test_name":"test_test_1854_sawtooth_generator_current_source_switch_fa0353608adc6185","netlist_hash":"de04cc7f9ce97ab3","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Design a SPICE netlist for a sawtooth waveform generator that uses a constant current source to charge a capacitor and a voltage-controlled switch to discharge it periodically.","pair_ids":["28bd505e3eb6e783","001c016bfc28fdf4","9eedd9e27ed95614"],"prompts":["Design a SPICE netlist for a sawtooth waveform generator that uses a constant current source to charge a capacitor and a voltage-controlled switch to discharge it periodically.","Create a sawtooth oscillator circuit where a capacitor is charged by a 100\u00b5A current source and then quickly reset by a switch controlled by a 100\u00b5s period pulse.","Simulate a sawtooth generator with a current source, capacitor, and reset switch. Use a PULSE voltage source to drive the switch and a .TRAN analysis to observe the waveform."],"measurements":[{"name":"Vpeak","key":"Vpeak","index":0,"value":1.0213032743137356,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"},{"name":"period","key":"period","index":0,"value":0.00010308108080906027,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:01580_3e970399a063b051:32fde824492a11b9","source":"deepseek","example_id":"01580_3e970399a063b051","test_name":"test_test_1580_opamp_sample_hold_3e970399a063b051","netlist_hash":"32fde824492a11b9","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Sample-and-hold circuit using an ideal voltage-controlled switch (S) and a unity-gain buffer (E) to hold the sampled voltage on a capacitor.","pair_ids":["8c535db17c60c05d","b12a1511e73201db","dcabe1533e3c0a42"],"prompts":["Sample-and-hold circuit using an ideal voltage-controlled switch (S) and a unity-gain buffer (E) to hold the sampled voltage on a capacitor.","A sinusoidal input (1kHz) is sampled by a 100us period clock with a 49us pulse width, sampling near the falling edge.","The buffer's gain is set to 1 to avoid output saturation."],"measurements":[{"name":"vout_hold2","key":"vout_hold2","index":0,"value":0.30298695588458135,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 tran"},{"name":"vin_sample","key":"vin_sample","index":0,"value":0.303035264195501,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 tran"},{"name":"vout_hold","key":"vout_hold","index":0,"value":0.3029865990525115,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 tran"}]} +{"id":"deepseek:00309_fcd9ab580c7f7670:21f54cf65dca7784","source":"deepseek","example_id":"00309_fcd9ab580c7f7670","test_name":"test_test_309_inverting_opamp_fcd9ab580c7f7670","netlist_hash":"21f54cf65dca7784","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Design an inverting amplifier with a gain of 10 using an ideal op-amp modeled as a voltage-controlled voltage source.","pair_ids":["bebbbf5cd1ddf099","25382ec58e169837","1063fdeb7052a482","7bfefc9c18f4c830"],"prompts":["Design an inverting amplifier with a gain of 10 using an ideal op-amp modeled as a voltage-controlled voltage source.","Create an AC analysis SPICE netlist for an inverting op-amp amplifier with R1=1k and Rf=10k.","Simulate an op-amp inverting amplifier and measure its gain at 1 kHz.","Generate a SPICE netlist for a simple inverting amplifier using a behavioral E-source."],"measurements":[{"name":"gain_db","key":"gain_db","index":0,"value":19.999044604685594,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"phase","key":"phase","index":0,"value":3.141592653589793,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:02175_8b5663990864e956:67c3cf92e93b5917","source":"deepseek","example_id":"02175_8b5663990864e956","test_name":"test_test_2175_electret_mic_bias_preamp_8b5663990864e956","netlist_hash":"67c3cf92e93b5917","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"AC analysis of electret microphone bias and preamplifier","pair_ids":["e64db441d4ced436","e19478fce5a63671","18d71c230261701b"],"prompts":["AC analysis of electret microphone bias and preamplifier","Measures gain at 1 kHz and output flatness from 20 Hz to 20 kHz","Uses NPN transistor with fixed bias for preamp"],"measurements":[{"name":"vout_20k","key":"vout_20k","index":0,"value":4.105142502581934,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"gain_db","key":"gain_db","index":0,"value":12.266144988794498,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"vout_20","key":"vout_20","index":0,"value":3.682168837401204,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"vout_1k","key":"vout_1k","index":0,"value":4.104944119346623,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"}]} +{"id":"deepseek:00712_1ba2b765defed1b8:48eb46e200ab5789","source":"deepseek","example_id":"00712_1ba2b765defed1b8","test_name":"test_test_712_precision_half_wave_rectifier_1ba2b765defed1b8","netlist_hash":"48eb46e200ab5789","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Design a precision half-wave rectifier using an ideal op-amp and a diode. The input is a 1V 1kHz sine wave. Provide a SPICE netlist with transient analysis and measurements.","pair_ids":["88b6a660cc11e168","a00ccf397fb1b0af","2e6622c6e44fbf89"],"prompts":["Design a precision half-wave rectifier using an ideal op-amp and a diode. The input is a 1V 1kHz sine wave. Provide a SPICE netlist with transient analysis and measurements.","Create a SPICE netlist for a precision half-wave rectifier circuit with a behavioral op-amp model. Use a SIN source, diode, and measure the rectified output peak and negative cycle level.","I need a simulation of a precision half-wave rectifier. Use an op-amp macromodel with high gain, a diode, and resistors. Input is 1V amplitude at 1kHz. Run transient analysis and measure peak output and negative cycle levels."],"measurements":[{"name":"vout_neg","key":"vout_neg","index":0,"value":-0.009900999290435149,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 TRAN"},{"name":"vin_peak","key":"vin_peak","index":0,"value":0.999999994378952,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"},{"name":"vout_peak","key":"vout_peak","index":0,"value":0.9999985178445526,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:01697_dcdcd53491a37111:8275cab277515a48","source":"deepseek","example_id":"01697_dcdcd53491a37111","test_name":"test_test_1697_tow_thomas_biquad_low_pass_filter_dcdcd53491a37111","netlist_hash":"8275cab277515a48","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"This is a Tow-Thomas biquad low-pass filter with Butterworth response (Q=0.707), unity gain, and a 1 kHz cutoff.","pair_ids":["57b1460fe66d05a5","8b7373bfbe9676a4","f8534cd82e36b946"],"prompts":["This is a Tow-Thomas biquad low-pass filter with Butterworth response (Q=0.707), unity gain, and a 1 kHz cutoff.","The circuit uses three voltage-controlled voltage sources (E1, E2, E3) to model ideal op-amps in the integrator and inverter stages.","Resistors and capacitors set the desired frequency response: R1, R3, and C1, C2 determine the cutoff, while R2 and R4 fine-tune the quality factor."],"measurements":[{"name":"f3db","key":"f3db","index":0,"value":1001.6394868531246,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 AC"},{"name":"gain_dc","key":"gain_dc","index":0,"value":0.9999942586543786,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:00953_b05225ffeac57ddf:3a8a40ca33f09ae9","source":"deepseek","example_id":"00953_b05225ffeac57ddf","test_name":"test_test_953_complementary_emitter_follower_buffer_b05225ffeac57ddf","netlist_hash":"3a8a40ca33f09ae9","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"Complementary push-pull emitter follower with NPN and PNP BJTs.","pair_ids":["ae4e54052d91273a","5c7e859b21b75111","8ba9ddadc9dda630","f50da0a4102afac6","c83ca9025cc2c5b9"],"prompts":["Complementary push-pull emitter follower with NPN and PNP BJTs.","Diode string (D1, D2) biases the bases of Q1 and Q2 for reduced crossover distortion.","Resistors R1 and R2 set the bias current through the diodes.","Input signal applied to the midpoint of the diode string (nodeB) to drive both transistors.","Output taken from the common emitters junction across load resistor RL."],"measurements":[{"name":"Vout_DC","key":"Vout_DC","index":0,"value":-2.2859027046969536e-16,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 OP"},{"name":"Vin_pp","key":"Vin_pp","index":0,"value":0.9965015290805577,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#2 TRAN"},{"name":"Vout_pp","key":"Vout_pp","index":0,"value":0.9832430535250362,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#2 TRAN"},{"name":"gain","key":"gain","index":0,"value":0.9866949772091622,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#2 TRAN"}]} +{"id":"deepseek:00508_fb183a4627aa363e:1236827f72f79c5a","source":"deepseek","example_id":"00508_fb183a4627aa363e","test_name":"test_test_508_lag_compensation_rc_fb183a4627aa363e","netlist_hash":"1236827f72f79c5a","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Passive lag compensation network using a series 10k\u03a9 resistor and shunt 10nF capacitor to ground.","pair_ids":["bbc54d0bbe50c6ae","0354ae91e66c7b38","8cd9506d3bdaa229"],"prompts":["Passive lag compensation network using a series 10k\u03a9 resistor and shunt 10nF capacitor to ground.","Forms a first-order low-pass filter with a -3 dB cutoff frequency of approximately 1.59 kHz.","Provides significant attenuation and phase lag above the cutoff, useful for frequency compensation."],"measurements":[{"name":"gain_db","key":"gain_db","index":0,"value":-16.072235265805514,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 ac"},{"name":"phase_rad","key":"phase_rad","index":0,"value":-1.4129651365067377,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 ac"}]} +{"id":"deepseek:01376_bae3209ef144ef32:a1ff97f54e056b90","source":"deepseek","example_id":"01376_bae3209ef144ef32","test_name":"test_test_1376_cmos_current_starved_ring_oscillator_bae3209ef144ef32","netlist_hash":"a1ff97f54e056b90","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"5-stage CMOS current-starved ring oscillator with starved bias currents controlled by VBIASP and VBIASN.","pair_ids":["e699e00563c22b77","c622dd3e9a4ef755","ca8c68555c54d6f9"],"prompts":["5-stage CMOS current-starved ring oscillator with starved bias currents controlled by VBIASP and VBIASN.","Each stage includes a current-starved inverter and a 0.1pF load capacitance.","Output buffered by a CMOS inverter driving a 10k||1pF load."],"measurements":[{"name":"period","key":"period","index":0,"value":4.0122451116486146e-07,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00258_d03a311e6fe3c761:9b2b969f2bd8f371","source":"deepseek","example_id":"00258_d03a311e6fe3c761","test_name":"test_test_258_nmos_source_follower_d03a311e6fe3c761","netlist_hash":"9b2b969f2bd8f371","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"The circuit is an NMOS source follower (common-drain) amplifier.","pair_ids":["a535279daaac2c38","fe279d7fd196d6cb","243c06db22d8d31e","a8197455a6fc9137","2969b9671187f072"],"prompts":["The circuit is an NMOS source follower (common-drain) amplifier.","The transistor M1 has its drain connected to VDD=12 V, gate driven by Vin with a DC bias of 6 V and an AC signal of 1 V.","The source is connected to a 5 k\u03a9 load resistor to ground, and the body is tied to the source to eliminate body effect.","The transistor dimensions (W=62 \u00b5m, L=1 \u00b5m) and the load resistor are chosen to set the operating point at Vout \u2248 4.26 V with Id \u2248 0.85 mA, yielding a small-signal gain of about 0.92.","The .op analysis checks the DC operating point, .ac provides the frequency response with a flat gain, and .dc sweeps Vin to extract the DC transfer characteristic."],"measurements":[{"name":"dc_v6p1","key":"dc_v6p1","index":0,"value":4.398140106386395,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#3 dc"},{"name":"ac_gain_lf","key":"ac_gain_lf","index":0,"value":0.9203116738678798,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#2 ac"},{"name":"ac_gain_1k","key":"ac_gain_1k","index":0,"value":0.9203116738678798,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#2 ac"},{"name":"dc_v5p9","key":"dc_v5p9","index":0,"value":4.214078467228215,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#3 dc"}]} +{"id":"deepseek:00296_e814e1292d26cca5:a03237c67582481c","source":"deepseek","example_id":"00296_e814e1292d26cca5","test_name":"test_test_296_cmos_nor2_transient_e814e1292d26cca5","netlist_hash":"a03237c67582481c","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Two-input CMOS NOR gate transient simulation.","pair_ids":["9e28d973f2bfab27","4973d08ca7ce8d6f","982cae6d83fece1f","460a7a224a090507"],"prompts":["Two-input CMOS NOR gate transient simulation.","PMOS are in series between VDD and output, NMOS in parallel from output to ground.","Input A: PULSE(0 5 2u 1n 1n 4u 10u), Input B: PULSE(0 5 1u 1n 1n 2u 10u) to test all four input combinations.","Measurements verify correct logic levels at stable intervals without input transitions."],"measurements":[{"name":"VOUT_LOW1","key":"VOUT_LOW1","index":0,"value":2.504999995932857e-09,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 TRAN"},{"name":"VOUT_LOW2","key":"VOUT_LOW2","index":0,"value":1.2524999989832143e-09,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 TRAN"},{"name":"VOUT_HIGH1","key":"VOUT_HIGH1","index":0,"value":4.99999998998,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 TRAN"},{"name":"VOUT_HIGH2","key":"VOUT_HIGH2","index":0,"value":4.99999998998,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:02241_6fc2e20b526011bb:e12cd979f7288066","source":"deepseek","example_id":"02241_6fc2e20b526011bb","test_name":"test_test_2241_track_hold_buffer_6fc2e20b526011bb","netlist_hash":"e12cd979f7288066","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Create a SPICE netlist for a track-and-hold amplifier consisting of a voltage-controlled switch, a sampling capacitor, and a unity-gain buffer made from a behavioral op-amp. Apply a 1 kHz sine input and a 50% duty cycle clock pulse. Simulate transient response and measure the output voltage at the end of the first hold period.","pair_ids":["13867d4fed5537b4","44263a6f5c95667f","0546fe06d9fe7426"],"prompts":["Create a SPICE netlist for a track-and-hold amplifier consisting of a voltage-controlled switch, a sampling capacitor, and a unity-gain buffer made from a behavioral op-amp. Apply a 1 kHz sine input and a 50% duty cycle clock pulse. Simulate transient response and measure the output voltage at the end of the first hold period.","Build a sample-and-hold circuit using an ideal switch, a 1 nF capacitor, and an E-source buffer. Use a pulse generator for the clock and a sinusoidal input. Run a transient analysis and verify that the output correctly holds the sampled value.","Design a track-and-hold buffer in SPICE with a switch model (RON=100, ROFF=1MEG) and a high-gain op-amp follower. Input is a 1 kHz, 1 V amplitude sine wave, and the clock is a 20 \u00b5s period pulse with 10 \u00b5s on-time. Measure the held output at 20 \u00b5s and 40 \u00b5s and compare with the input at the sampling moments."],"measurements":[{"name":"vhold_20u","key":"vhold_20u","index":0,"value":0.06257406497049164,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"vhold_40u","key":"vhold_40u","index":0,"value":0.1871664282229833,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"vin_30u","key":"vin_30u","index":0,"value":0.1873812574660123,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"vin_10u","key":"vin_10u","index":0,"value":0.06279050243630191,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:02367_96a2e44171d2755c:96a2e44171d2755c","source":"deepseek","example_id":"02367_96a2e44171d2755c","test_name":"test_test_2367_rc_pulse_stretcher_96a2e44171d2755c","netlist_hash":"96a2e44171d2755c","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"Design a simple RC pulse stretcher using a diode, resistor, and capacitor. Apply a 5V pulse of 1us duration and observe the stretched output. Measure the width of the output pulse above 2.5V.","pair_ids":["54e3d1b4dfeb968f","962012b283b9cd59","b1de1757b5bef550","4d1bf3e5d2efe7fc","490f35db86798743"],"prompts":["Design a simple RC pulse stretcher using a diode, resistor, and capacitor. Apply a 5V pulse of 1us duration and observe the stretched output. Measure the width of the output pulse above 2.5V.","Create a SPICE netlist for a pulse stretching circuit where a short input pulse charges a capacitor through a diode, and the capacitor discharges slowly through a resistor. Simulate and report the stretched pulse width.","Simulate a transient response of an RC pulse stretcher. Use a 1us input pulse, RC time constant of 10us, and measure how long the output stays above the 2.5V threshold.","Implement an analog pulse stretcher with a diode and RC network. Apply a 5V, 1us pulse and determine the output pulse duration via .MEASURE.","Build a pulse stretching circuit using a diode, a 1k resistor, and a 10nF capacitor. Run a transient analysis with a 5V, 1us input pulse and calculate the output pulse width above 2.5V."],"measurements":[{"name":"output_width","key":"output_width","index":0,"value":6.420417938162571e-06,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00002_24c71b9d3247f520:10e81b16c7cda7ce","source":"deepseek","example_id":"00002_24c71b9d3247f520","test_name":"test_test_2_resistive_attenuator_pi_24c71b9d3247f520","netlist_hash":"10e81b16c7cda7ce","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Create a 50-ohm pi-network attenuator that reduces signal level by 6 dB.","pair_ids":["5f34924e846f79fc","dfc559a954b32b8f","809b5722a6dff1fa"],"prompts":["Create a 50-ohm pi-network attenuator that reduces signal level by 6 dB.","Design a resistive 6-dB pi attenuator for impedance-matched 50-ohm systems.","Simulate a passive pi pad with 6 dB attenuation using resistors."],"measurements":[{"name":"vout_db","key":"vout_db","index":0,"value":-12.041199826559247,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"}]} +{"id":"deepseek:01294_e9d6ec21438ff56f:34d804840cfccecd","source":"deepseek","example_id":"01294_e9d6ec21438ff56f","test_name":"test_test_1294_wide_swing_cascode_nmos_current_mirror_e9d6ec21438ff56f","netlist_hash":"34d804840cfccecd","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Wide-swing cascode NMOS current mirror with a 200\u00b5A reference current.","pair_ids":["13840fb0216dcfb1","97f6b36591036abb","3236471c5d5f42fb","1907d8c984b1cef9"],"prompts":["Wide-swing cascode NMOS current mirror with a 200\u00b5A reference current.","Bias circuit uses a 130k resistor and diode-connected MOSFET M5 to generate cascode gate voltage.","Output current measured via 0V voltage source Vsense inserted in the output branch.","DC sweep of VOUT from 0 to 5V characterizes output resistance."],"measurements":[{"name":"VBIAS_VAL","key":"VBIAS_VAL","index":0,"value":2.3854888842690394,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"IOUT_2V","key":"IOUT_2V","index":0,"value":0.00019995885398374838,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"IOUT_5V","key":"IOUT_5V","index":0,"value":0.00019998068726182882,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"IREF_VAL","key":"IREF_VAL","index":0,"value":0.0002,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"}]} +{"id":"deepseek:00631_b83ce21802873824:99d556094b840d29","source":"deepseek","example_id":"00631_b83ce21802873824","test_name":"test_test_631_ceramic_resonator_b83ce21802873824","netlist_hash":"99d556094b840d29","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Ceramic resonator equivalent circuit consisting of a series RLC motional arm (R1, L1, C1) and a parallel capacitor (C0).","pair_ids":["7f08ce69929d8283","f0d3704e83793af5","e0372f076fbcb18e","335d725fe31f8c94"],"prompts":["Ceramic resonator equivalent circuit consisting of a series RLC motional arm (R1, L1, C1) and a parallel capacitor (C0).","The circuit is driven by an AC voltage source V1 with a series resistor Rs.","AC analysis sweeps from 100kHz to 1MHz to capture both series resonance (dip at ~455kHz) and parallel resonance (peak at ~557kHz).","Measurements record the voltage magnitude at node a at these two critical frequencies."],"measurements":[{"name":"mag_at_res","key":"mag_at_res","index":0,"value":0.3860250896084808,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"mag_at_antires","key":"mag_at_antires","index":0,"value":0.9997403389625785,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:01446_245aac30ba28beca:ceb2441823a5d355","source":"deepseek","example_id":"01446_245aac30ba28beca","test_name":"test_test_1446_non_inverting_opamp_with_bias_resistor_245aac30ba28beca","netlist_hash":"ceb2441823a5d355","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Non-inverting amplifier with ideal op-amp (gain 100k) and equal 10k feedback resistors yielding voltage gain of 2.","pair_ids":["0d6512541d07ad3b","b6da89e5ef28ac8c","10539afe7756d15d"],"prompts":["Non-inverting amplifier with ideal op-amp (gain 100k) and equal 10k feedback resistors yielding voltage gain of 2.","Input is AC-coupled via 10uF capacitor, and a 100k bias resistor provides a DC path to ground at the non-inverting input.","DC operating point measurement uses a dummy DC sweep to obtain the output voltage at Vin=0V, while AC analysis measures gain at 1 kHz."],"measurements":[{"name":"gain_lin","key":"gain_lin","index":0,"value":1.9999599754701953,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"gain_dB","key":"gain_dB","index":0,"value":6.020426087215942,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"vout_dc","key":"vout_dc","index":0,"value":0,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"}]} +{"id":"deepseek:00312_1b06fd7b30f1164e:7f47cc267e3cd7c7","source":"deepseek","example_id":"00312_1b06fd7b30f1164e","test_name":"test_test_312_non_inverting_amp_1b06fd7b30f1164e","netlist_hash":"7f47cc267e3cd7c7","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Create a non-inverting operational amplifier using an ideal voltage-controlled voltage source (E-source) with a gain of 100k. Use feedback resistors R1=1k and R2=10k to set a closed-loop gain of 11. Perform AC analysis from 1 Hz to 100 kHz and measure the maximum voltage gain in dB.","pair_ids":["6b617564ed62eae9","a13d9e91552644c1","2f459ae9724ec2cd","5a3c77ef3dc23fd9"],"prompts":["Create a non-inverting operational amplifier using an ideal voltage-controlled voltage source (E-source) with a gain of 100k. Use feedback resistors R1=1k and R2=10k to set a closed-loop gain of 11. Perform AC analysis from 1 Hz to 100 kHz and measure the maximum voltage gain in dB.","Design a basic non-inverting amplifier where the op-amp is modeled as an E-element with high open-loop gain (AOL=1e5). Connect the input signal to the non-inverting terminal and use a 1k/10k resistor divider from output to ground, feeding the junction to the inverting terminal. Run AC simulation and report the peak gain.","Simulate a non-inverting op-amp circuit using a behavioral E-source. Set the input AC signal to 1V. Choose R1=1k and R2=10k for the feedback network. Measure the AC voltage gain at the output in decibels.","I need a SPICE netlist for a non-inverting amplifier with gain of 11. Use an ideal op-amp modeled as a VCVS with gain 100000. The AC analysis should sweep from 1 Hz to 100 kHz, and I want to verify the gain is around 20.8 dB."],"measurements":[{"name":"gain_db","key":"gain_db","index":0,"value":20.826898307850094,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 AC"}]} +{"id":"deepseek:01481_a90754392b99a47d:31b6a98c9e679f17","source":"deepseek","example_id":"01481_a90754392b99a47d","test_name":"test_test_1481_instrumentation_amplifier_with_driven_reference_node_a90754392b99a47d","netlist_hash":"31b6a98c9e679f17","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Three-opamp instrumentation amplifier with a gain of 10 set by Rfb1, Rfb2, and Rg in the first stage, and all 10k resistors in the difference amplifier stage.","pair_ids":["8fa76e4d9bc9c5a7","da7156010c3ec719","4cc71f2842a4e659"],"prompts":["Three-opamp instrumentation amplifier with a gain of 10 set by Rfb1, Rfb2, and Rg in the first stage, and all 10k resistors in the difference amplifier stage.","A 2.5V reference voltage is buffered by an op\u2011amp (E4) to provide a low\u2011impedance drive that is summed into the output via R5.","DC and AC performance are verified: DC output equals the buffered reference when differential input is zero; AC analysis at 1kHz shows a gain of 10 for the 2V peak differential input."],"measurements":[{"name":"mag_1k","key":"mag_1k","index":0,"value":19.999400032043923,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"dc_out","key":"dc_out","index":0,"value":2.4999500009871554,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"}]} +{"id":"deepseek:00031_9856b9add516f72e:9856b9add516f72e","source":"deepseek","example_id":"00031_9856b9add516f72e","test_name":"test_test_31_rc_step_response_9856b9add516f72e","netlist_hash":"9856b9add516f72e","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Design an RC low-pass filter and apply a pulse voltage source. Simulate the step response and measure the rise time to 90% of the final value.","pair_ids":["b27d993061bd26f9","0826c097c0ad96de","b846d6b033b9dbe8"],"prompts":["Design an RC low-pass filter and apply a pulse voltage source. Simulate the step response and measure the rise time to 90% of the final value.","Create a simple RC circuit with a pulse input. Run a transient simulation and measure the time for the capacitor voltage to reach 0.9V.","Simulate an RC step response using a pulse source. The resistor is 10k\u03a9 and capacitor is 1nF. Determine the rise time when the output crosses 0.9V."],"measurements":[{"name":"t_rise","key":"t_rise","index":0,"value":2.2946015688848018e-05,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 TRAN"},{"name":"v_final","key":"v_final","index":0,"value":0.9999268436506844,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00362_d101a90f0ba31bc2:23638a8a882fffcb","source":"deepseek","example_id":"00362_d101a90f0ba31bc2","test_name":"test_test_362_sallen_key_high_pass_filter_with_behavioral_op_amp_d101a90f0ba31bc2","netlist_hash":"23638a8a882fffcb","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Sallen-Key second-order high-pass filter using equal 10k\u03a9 resistors and 10nF capacitors.","pair_ids":["85c90249eeaec9d6","cc4597c044740e4a","bbbf6f5a5a6514c7"],"prompts":["Sallen-Key second-order high-pass filter using equal 10k\u03a9 resistors and 10nF capacitors.","Unity\u2011gain voltage\u2011controlled voltage source models an ideal op\u2011amp with 100000 gain.","AC analysis from 10\u202fHz to 100\u202fkHz measures the -3\u202fdB cutoff and passband gain."],"measurements":[{"name":"fc","key":"fc","index":0,"value":1598.1126198621662,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 AC"},{"name":"maxgain","key":"maxgain","index":0,"value":0.9997267717149678,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 AC"},{"name":"gain_high","key":"gain_high","index":0,"value":0.9997267717149678,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:02346_7de714f0f3c4bb77:511d5458b85479c6","source":"deepseek","example_id":"02346_7de714f0f3c4bb77","test_name":"test_test_2346_mosfet_dc_bias_7de714f0f3c4bb77","netlist_hash":"511d5458b85479c6","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"DC operating point of an NMOS transistor biased via a resistive voltage divider at the gate and source degeneration.","pair_ids":["343f6673a9fcd835","40a1d0759a8b4b0e","de76b4b1852df8f2"],"prompts":["DC operating point of an NMOS transistor biased via a resistive voltage divider at the gate and source degeneration.","Uses a single-point DC sweep and .MEAS statements with AT=5 to capture node voltages and drain current.","Component values chosen to ensure operation in saturation (VDS > VGS - VTO)."],"measurements":[{"name":"vg","key":"vg","index":0,"value":2,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 DC"},{"name":"vd","key":"vd","index":0,"value":4.104515938914431,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 DC"},{"name":"id","key":"id","index":0,"value":8.954840610855693e-05,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 DC"},{"name":"vs","key":"vs","index":0,"value":0.0895484018944926,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 DC"},{"name":"vds","key":"vds","index":0,"value":4.104515938914431,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 DC"}]} +{"id":"deepseek:01540_dc8f39b518a6d508:84917daf20ff6819","source":"deepseek","example_id":"01540_dc8f39b518a6d508","test_name":"test_test_1540_opamp_negative_impedance_converter_dc8f39b518a6d508","netlist_hash":"84917daf20ff6819","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Negative impedance converter using an op-amp and resistors: the circuit presents an input impedance of -1 k\u03a9.","pair_ids":["2cd3572c50ea338a","f1156902c1dd50b5","5142693f6a45f8c4"],"prompts":["Negative impedance converter using an op-amp and resistors: the circuit presents an input impedance of -1 k\u03a9.","A 1 A AC current source is used to inject current into the NIC, allowing direct measurement of impedance as the voltage at node 'in'.","The AC analysis sweeps from 1 Hz to 10 kHz, and measurements at 100 Hz verify the real and imaginary parts."],"measurements":[{"name":"zin_imag","key":"zin_imag","index":0,"value":0,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"zin_real","key":"zin_real","index":0,"value":-1000.040000800016,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"}]} +{"id":"deepseek:00826_763724a8227e248e:6d301093dd58ca41","source":"deepseek","example_id":"00826_763724a8227e248e","test_name":"test_test_826_diode_log_converter_763724a8227e248e","netlist_hash":"6d301093dd58ca41","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Design a logarithmic amplifier that uses an op-amp and a diode in negative feedback. The circuit should produce an output voltage proportional to the logarithm of the input voltage.","pair_ids":["6518196c7a829fd0","1c857c34a943e54a","9cd9f258e605fe27"],"prompts":["Design a logarithmic amplifier that uses an op-amp and a diode in negative feedback. The circuit should produce an output voltage proportional to the logarithm of the input voltage.","Create a SPICE netlist for a log converter where the input voltage is applied through a resistor to the inverting input of an op-amp, with a diode connecting the output back to that input.","Simulate a diode-based log amplifier using an E-source op-amp model. Include DC sweep and measurements to verify logarithmic output."],"measurements":[{"name":"VOUT_AT_1","key":"VOUT_AT_1","index":0,"value":-0.5360853364905125,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"VOUT_DIFF","key":"VOUT_DIFF","index":0,"value":-0.05964541336948187,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#2 DC"},{"name":"VOUT_AT_0P1","key":"VOUT_AT_0P1","index":0,"value":-0.4764399231210306,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"}]} +{"id":"deepseek:00550_f161475a38873662:116ee16cd4c99e77","source":"deepseek","example_id":"00550_f161475a38873662","test_name":"test_test_550_parallel_trap_notch_f161475a38873662","netlist_hash":"116ee16cd4c99e77","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"This is a passive notch filter using a parallel LC tank in series with the signal path, providing attenuation at the resonant frequency of 1 kHz.","pair_ids":["959da8204c1ef60c","69e4b31705ad6bf0","96fd902411add30f"],"prompts":["This is a passive notch filter using a parallel LC tank in series with the signal path, providing attenuation at the resonant frequency of 1 kHz.","The source resistance R1 and load resistance R2 set the Q and depth of the notch; the inductor loss R_loss models real inductor ESR.","The .MEAS statements capture the minimum gain and the gain specifically at 1 kHz to verify notch depth and frequency alignment."],"measurements":[{"name":"db_at_1k","key":"db_at_1k","index":0,"value":-74.61319279518705,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"min_dB","key":"min_dB","index":0,"value":-74.61319279520376,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 AC"}]} +{"id":"deepseek:00130_8b4894972f02c90a:0e1e5ffebd3295a0","source":"deepseek","example_id":"00130_8b4894972f02c90a","test_name":"test_test_130_zener_voltage_regulator_with_series_resistor_8b4894972f02c90a","netlist_hash":"0e1e5ffebd3295a0","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"The Zener diode D1 is connected in reverse breakdown configuration: cathode to output, anode to ground.","pair_ids":["75b6d597e9dd0089","035b00b401590aec","fee6082f1dfcbb38"],"prompts":["The Zener diode D1 is connected in reverse breakdown configuration: cathode to output, anode to ground.","The 1k\u03a9 series resistor R1 limits current from the 12V source to the Zener and load.","The 10k\u03a9 load resistor RL draws minimal current, allowing the Zener to maintain regulation."],"measurements":[{"name":"VOUT_MAX","key":"VOUT_MAX","index":0,"value":5.158975970161972,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"VOUT_MIN","key":"VOUT_MIN","index":0,"value":5.123436894793396,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"VOUT_NOM","key":"VOUT_NOM","index":0,"value":5.150910520733851,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"}]} +{"id":"deepseek:00248_b692b5cd7f4cc74e:f3cfe464ec6d86a8","source":"deepseek","example_id":"00248_b692b5cd7f4cc74e","test_name":"test_test_248_nmos_common_source_amplifier_with_current_source_load_b692b5cd7f4cc74e","netlist_hash":"f3cfe464ec6d86a8","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"NMOS common-source amplifier with current-source load biased in saturation.","pair_ids":["c0b06968ce9e3a14","90379faaab8fae51","76440d47f18a94e7"],"prompts":["NMOS common-source amplifier with current-source load biased in saturation.","Performs DC operating point and AC small-signal analyses.","Measures DC output voltage and the AC voltage gain (magnitude and dB)."],"measurements":[{"name":"max_gain_db","key":"max_gain_db","index":0,"value":48.22607660748116,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#2 AC"},{"name":"gain_v","key":"gain_v","index":0,"value":257.81241697658925,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#2 AC"},{"name":"vout_dc","key":"vout_dc","index":0,"value":1.5624995085938986,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#3 DC"}]} +{"id":"deepseek:02166_5aff8009e9ef3cd0:9f73481f632e1032","source":"deepseek","example_id":"02166_5aff8009e9ef3cd0","test_name":"test_test_2166_capacitive_sensor_bridge_ac_5aff8009e9ef3cd0","netlist_hash":"9f73481f632e1032","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Capacitive bridge with one mismatched capacitor (101p vs 100p) creates a small differential AC signal.","pair_ids":["c374b2421cfdab7e","f41ea70de9db2e86","86fb08393f9998d8","5d07867dc2fa18d3"],"prompts":["Capacitive bridge with one mismatched capacitor (101p vs 100p) creates a small differential AC signal.","Op\u2011amp with gain 1000 amplifies the differential voltage to a measurable level.","Low\u2011pass filter (R=100\u03a9, C=10nF) limits bandwidth to about 159 kHz.","AC simulation from 100 Hz to 1 MHz with .MEAS statements to verify output magnitude/phase at 10 kHz and -3 dB point."],"measurements":[{"name":"f3dB","key":"f3dB","index":0,"value":158731.10243920324,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 AC"},{"name":"vout_phase","key":"vout_phase","index":0,"value":-0.046873794888209766,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"vout_dB_max","key":"vout_dB_max","index":0,"value":7.909309837057226,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 AC"},{"name":"vout_mag","key":"vout_mag","index":0,"value":2.4825100025090787,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:00848_d4ddc41d5f2f1ae8:ef29e73c32051d08","source":"deepseek","example_id":"00848_d4ddc41d5f2f1ae8","test_name":"test_test_848_zener_reference_with_emitter_follower_buffer_d4ddc41d5f2f1ae8","netlist_hash":"ef29e73c32051d08","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Zener diode Dz corrected to anode=0, cathode=z for reverse breakdown operation.","pair_ids":["1e0ed2cef926c469","b2c59a65b6bfea4d","9407fdd3a9d283a2"],"prompts":["Zener diode Dz corrected to anode=0, cathode=z for reverse breakdown operation.","Emitter follower with NPN transistor buffers the Zener reference.","Line regulation measured as change in output over 4V supply variation."],"measurements":[{"name":"Line_reg","key":"Line_reg","index":0,"value":0.007389188144586889,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#2 dc"},{"name":"Vout_nom","key":"Vout_nom","index":0,"value":4.886662345653052,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 dc"},{"name":"Vout_max","key":"Vout_max","index":0,"value":4.898399763887952,"value_is_finite":true,"success":true,"measurement_type":"FIND_WHEN","simulation_name":"#2 dc"},{"name":"Vout_min","key":"Vout_min","index":0,"value":4.868843011309605,"value_is_finite":true,"success":true,"measurement_type":"FIND_WHEN","simulation_name":"#2 dc"}]} +{"id":"deepseek:01870_f33c8a2189b2b272:ebd005c0d00f3697","source":"deepseek","example_id":"01870_f33c8a2189b2b272","test_name":"test_test_1870_freq_to_volt_charge_pump_f33c8a2189b2b272","netlist_hash":"ebd005c0d00f3697","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"DC current source I1 provides 1 mA from VCC to node Y.","pair_ids":["856900f75d118b40","5a310efd09cf077e","2f2b711354c31bb3","2f34b5dc45bd6a9e","10faa6f788cb9963"],"prompts":["DC current source I1 provides 1 mA from VCC to node Y.","Switch S1, controlled by the input pulse train VIN, connects Y to X during the 1 \u00b5s on-time.","When the switch is on, current charges capacitor C1 through the switch's low on-resistance.","During the off-time (9 \u00b5s), C1 discharges through Rdis (10 k\u03a9) while switch is off.","Bypass resistor Rbyp (10 k\u03a9) provides a path for I1 current when the switch is off, preventing Y from floating to high voltages and unintentionally charging C1 through the off-resistance."],"measurements":[{"name":"Vpp","key":"Vpp","index":0,"value":0.08852724009725699,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#1 TRAN"},{"name":"Vavg","key":"Vavg","index":0,"value":0.9033623194481012,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:01110_d73fd4d8e6f17ce2:4a31722f60a6ddd8","source":"deepseek","example_id":"01110_d73fd4d8e6f17ce2","test_name":"test_test_1110_bjt_class_ab_diode_biased_output_stage_d73fd4d8e6f17ce2","netlist_hash":"4a31722f60a6ddd8","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Push-pull BJT class-AB output stage with diode biasing using complementary NPN and PNP transistors.","pair_ids":["d2b1eb19946f4d9a","bfdee24b69510b4d","326fd2c5e6f1187b","843a162f4305505e"],"prompts":["Push-pull BJT class-AB output stage with diode biasing using complementary NPN and PNP transistors.","Diode string D1-D2 provides a DC voltage offset (~\u00b10.7 V) between the transistor bases to set quiescent current and reduce crossover distortion.","Input is a 1V 1kHz sine wave applied to the diode midpoint, output taken from the common emitter resistors.","Corrected base connections: Q1 (NPN) base to top of diode string (nd1), Q2 (PNP) base to bottom (nd3) for proper biasing."],"measurements":[{"name":"GAIN","key":"GAIN","index":0,"value":0.9441870459337904,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#2 tran"},{"name":"IQ_VCC","key":"IQ_VCC","index":0,"value":0.014452536275185042,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#2 tran"},{"name":"VIN_RMS","key":"VIN_RMS","index":0,"value":0.7061685669240987,"value_is_finite":true,"success":true,"measurement_type":"RMS","simulation_name":"#2 tran"},{"name":"VOUT_MIN","key":"VOUT_MIN","index":0,"value":-0.9348197935166207,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#2 tran"},{"name":"VOUT_MAX","key":"VOUT_MAX","index":0,"value":0.9348197935166205,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#2 tran"},{"name":"VOUT_RMS","key":"VOUT_RMS","index":0,"value":0.6667552131353629,"value_is_finite":true,"success":true,"measurement_type":"RMS","simulation_name":"#2 tran"},{"name":"IQ_VEE","key":"IQ_VEE","index":0,"value":0.014451173495105349,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#2 tran"},{"name":"VOUT_DC","key":"VOUT_DC","index":0,"value":0.00015935083338067393,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#2 tran"}]} +{"id":"deepseek:00027_ece5bed924569b6f:ece5bed924569b6f","source":"deepseek","example_id":"00027_ece5bed924569b6f","test_name":"test_test_27_rc_pulse_response_ece5bed924569b6f","netlist_hash":"ece5bed924569b6f","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Simulate a simple RC low-pass filter driven by a pulse voltage source. Measure the rise time and steady-state output voltage.","pair_ids":["264d4e56cdc1de30","a57e5af6d670da32","94bbc2c3f67d5e9f"],"prompts":["Simulate a simple RC low-pass filter driven by a pulse voltage source. Measure the rise time and steady-state output voltage.","Design a testbench for an RC circuit with a 1k resistor and 10nF capacitor. Apply a 0-5V pulse with 10\u00b5s delay and 100\u00b5s width. Plot the transient response and report the 10%-90% rise time.","Create a SPICE netlist for an RC step response. Use a PULSE source for input. Measure the output rise time and verify that the capacitor voltage reaches near 5V after 100\u00b5s."],"measurements":[{"name":"t_rise","key":"t_rise","index":0,"value":2.176145957882063e-05,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 TRAN"},{"name":"v_final","key":"v_final","index":0,"value":4.99945062475658,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:01575_41ac91aff1688af6:0595bc53bd2be720","source":"deepseek","example_id":"01575_41ac91aff1688af6","test_name":"test_test_1575_bilateral_active_clamp_41ac91aff1688af6","netlist_hash":"0595bc53bd2be720","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Precision bilateral active voltage clamp using two op-amp-like E sources.","pair_ids":["6efe299f814bd68d","458e0c984acc2fa6","85690352ee3abd37"],"prompts":["Precision bilateral active voltage clamp using two op-amp-like E sources.","Diodes in the feedback loops compensate forward voltage drops, achieving accurate \u00b13V clamping.","Output resistors add stability and model op-amp output impedance."],"measurements":[{"name":"vmin","key":"vmin","index":0,"value":-2.9999772914164033,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 TRAN"},{"name":"vmax","key":"vmax","index":0,"value":2.9999774979043687,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00938_c88a0d864e92fd3b:d0af5872688ab0ef","source":"deepseek","example_id":"00938_c88a0d864e92fd3b","test_name":"test_test_938_common_base_transimpedance_amplifier_c88a0d864e92fd3b","netlist_hash":"d0af5872688ab0ef","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Common-base BJT transimpedance amplifier converting input current to output voltage","pair_ids":["88308e4db364b197","4d4d8b8aaa4adbd7","76d89527dc77d5d4"],"prompts":["Common-base BJT transimpedance amplifier converting input current to output voltage","DC bias established via voltage divider (R1,R2) from 5V supply and 1mA emitter current source","AC analysis from 100Hz to 10MHz to measure transimpedance gain and bandwidth"],"measurements":[{"name":"phase_1k","key":"phase_1k","index":0,"value":3.1415718325840936,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"tz_gain_db","key":"tz_gain_db","index":0,"value":65.96244668028616,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"vout_10M","key":"vout_10M","index":0,"value":65.82143556604309,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"vout_1k","key":"vout_1k","index":0,"value":65.96244668028616,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"}]} +{"id":"deepseek:01426_43833ee69151de53:60a7f0e199d5b471","source":"deepseek","example_id":"01426_43833ee69151de53","test_name":"test_test_1426_voltage_follower_43833ee69151de53","netlist_hash":"60a7f0e199d5b471","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Non-inverting input (pos) driven by VIN with DC 1V and AC 1V.","pair_ids":["9e4c490bcaec6ada","8b61bea175be46d4","8dcd69060ca50fd0"],"prompts":["Non-inverting input (pos) driven by VIN with DC 1V and AC 1V.","Ideal op-amp modeled as E-source with gain 100k, output connected to inverting input (neg) through a tiny feedback resistor (0.001 ohm), creating a voltage follower.","Rload provides a DC load; operating point and AC analyses are performed."],"measurements":[{"name":"gain_ac","key":"gain_ac","index":0,"value":0.999990000099999,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#2 AC"},{"name":"gain_dc","key":"gain_dc","index":0,"value":0.999990000099999,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"}]} +{"id":"deepseek:00180_7de8014a344cd43f:05e4495e3de3844f","source":"deepseek","example_id":"00180_7de8014a344cd43f","test_name":"test_test_180_common_collector_emitter_follower_7de8014a344cd43f","netlist_hash":"05e4495e3de3844f","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"NPN emitter follower buffer with 10 V supply.","pair_ids":["baa3fbe3bb2c5bcf","813d6026c1d0d052","12a100e865a9d7fa","e398eee1f5fc8251"],"prompts":["NPN emitter follower buffer with 10 V supply.","Biased with voltage divider (R1, R2) and AC-coupled input (C1).","Emitter resistor RE = 1k, load RL = 10k.","The input AC amplitude is 1 V; voltage gain is close to unity."],"measurements":[{"name":"vout_max","key":"vout_max","index":0,"value":0.9907854830973529,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#2 AC"}]} +{"id":"deepseek:02141_d270e762fa2084bd:35b3a9e37c572f3a","source":"deepseek","example_id":"02141_d270e762fa2084bd","test_name":"test_test_2141_thermistor_voltage_divider_linearization_d270e762fa2084bd","netlist_hash":"35b3a9e37c572f3a","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Thermistor voltage divider with parallel linearization resistor.","pair_ids":["fefb3519cd4a1180","d0916e184a8f036e","087200bc59a094e0","4c31baf6af7a8d0e"],"prompts":["Thermistor voltage divider with parallel linearization resistor.","Uses a 10k NTC thermistor (simulated via behavioral resistor) in series with a 10k resistor from 3.3V.","A 3k resistor is placed in parallel with the thermistor to improve linearity.","The temperature span is -20\u00b0C to 70\u00b0C, simulated by sweeping a voltage source (Vtemp) that represents temperature."],"measurements":[{"name":"Vout_neg20","key":"Vout_neg20","index":0,"value":0.6682221995302767,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 DC"},{"name":"Vout_25","key":"Vout_25","index":0,"value":0.61875,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 DC"},{"name":"Vout_70","key":"Vout_70","index":0,"value":0.5828085272833953,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 DC"}]} +{"id":"deepseek:00635_6f1db9b16cdc159e:1813b175c642f37e","source":"deepseek","example_id":"00635_6f1db9b16cdc159e","test_name":"test_test_635_rc_differentiator_6f1db9b16cdc159e","netlist_hash":"1813b175c642f37e","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"High-pass RC differentiator circuit","pair_ids":["43f9bc59b2bf7b95","9ac42e334305cb5a","c2e745043d4361b7","0e45ad9d5ab15066"],"prompts":["High-pass RC differentiator circuit","Uses 10nF capacitor in series and 1k\u03a9 resistor to ground","Input is a 5V pulse train with 100us width, 200us period","Acts as an edge detector producing positive and negative spikes at transitions"],"measurements":[{"name":"t_rise","key":"t_rise","index":0,"value":1.0000900042002146e-05,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 TRAN"},{"name":"vmin","key":"vmin","index":0,"value":-4.999652920967022,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 TRAN"},{"name":"vmax","key":"vmax","index":0,"value":4.999747509012235,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"},{"name":"t_fall","key":"t_fall","index":0,"value":0.00011000190006145697,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00478_3ee6f5aa5a6eb86b:33d831a412ced7a4","source":"deepseek","example_id":"00478_3ee6f5aa5a6eb86b","test_name":"test_test_478_potentiometer_volume_control_source_impedance_3ee6f5aa5a6eb86b","netlist_hash":"33d831a412ced7a4","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Potentiometer-based volume control with source impedance (600 Ohm) and equal 5k Ohm resistors top and bottom.","pair_ids":["0510b8e779de6075","eb43e4b0a12af71b","8bf1c84d9f4698a9"],"prompts":["Potentiometer-based volume control with source impedance (600 Ohm) and equal 5k Ohm resistors top and bottom.","Provides a fixed attenuation of approximately -6.5 dB, independent of frequency.","The circuit is purely resistive, so the frequency response is flat."],"measurements":[{"name":"vout_ac","key":"vout_ac","index":0,"value":0.4716981132075472,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"vout_dc","key":"vout_dc","index":0,"value":0.4716981132075472,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"vout_db","key":"vout_db","index":0,"value":-6.526717218575029,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:02235_5e7b0449dd72871a:1a146c04da233b92","source":"deepseek","example_id":"02235_5e7b0449dd72871a","test_name":"test_test_2235_sample_hold_5e7b0449dd72871a","netlist_hash":"1a146c04da233b92","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Design a sample-and-hold circuit using an analog switch, a hold capacitor, and an output buffer. Apply a pulse input and a clock signal for sampling. Run transient simulation and measure output hold voltages.","pair_ids":["f99858e3218c334f","d7f16f99cbade071","92bf80c692789a07"],"prompts":["Design a sample-and-hold circuit using an analog switch, a hold capacitor, and an output buffer. Apply a pulse input and a clock signal for sampling. Run transient simulation and measure output hold voltages.","Create a SPICE netlist for a sample-and-hold front end with a clocked switch, including a hold capacitor, output buffer, and leakage resistor. Perform transient analysis and measure the held voltages.","Generate a switched-capacitor sample-and-hold circuit with an NMOS switch model (S device) controlled by a pulse clock. Use an E-source buffer to isolate the hold capacitor. Run a transient simulation and measure output levels after each sample."],"measurements":[{"name":"vout_hold2","key":"vout_hold2","index":0,"value":0.00017499633125328155,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"vout_hold1","key":"vout_hold1","index":0,"value":4.9997502624753665,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"vout_hold3","key":"vout_hold3","index":0,"value":1.08681835054986e-13,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:01371_a4e5043b297b0f0d:c573c0e02cd46751","source":"deepseek","example_id":"01371_a4e5043b297b0f0d","test_name":"test_test_1371_cmos_dynamic_precharge_inverter_a4e5043b297b0f0d","netlist_hash":"c573c0e02cd46751","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Design a CMOS dynamic precharge inverter with a PMOS precharge transistor, an NMOS evaluation transistor, and an NMOS foot transistor. Use a 5V supply, and analyze transient response with a clock and input pulse.","pair_ids":["83332f3a587bf550","ac8bd36eee26d5b4","e03f525dbb377b75"],"prompts":["Design a CMOS dynamic precharge inverter with a PMOS precharge transistor, an NMOS evaluation transistor, and an NMOS foot transistor. Use a 5V supply, and analyze transient response with a clock and input pulse.","Create a spice netlist for a footed dynamic inverter circuit. Include MOSFET models, a load capacitor, and pulse sources for clock and input. Simulate the transient behavior and measure precharge output level, evaluation output level, and fall time.","I need a dynamic CMOS inverter that precharges the output high when the clock is low and evaluates when the clock is high. Provide a netlist with VDD=5V, use typical MOSFET models, and measure output voltages and timing."],"measurements":[{"name":"vout_precharge","key":"vout_precharge","index":0,"value":4.99999968004356,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#2 TRAN"},{"name":"vout_evaluate","key":"vout_evaluate","index":0,"value":6.896115869948555e-08,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#2 TRAN"},{"name":"t_fall","key":"t_fall","index":0,"value":1.2504034569002331e-10,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#2 TRAN"}]} +{"id":"deepseek:01223_5baab30883f0f499:c9df94404053867f","source":"deepseek","example_id":"01223_5baab30883f0f499","test_name":"test_test_1223_cmos_common_source_amplifier_with_pmos_current_mirror_load_5baab30883f0f499","netlist_hash":"c9df94404053867f","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Added IBIAS current source to set the diode-connected PMOS bias current, enabling proper current mirror operation.","pair_ids":["04de6d5dfaff342d","33f2972888496e52","6b5adebf0e7c531d"],"prompts":["Added IBIAS current source to set the diode-connected PMOS bias current, enabling proper current mirror operation.","Tuned device sizes and model parameters to achieve a gain of ~14 dB and a bandwidth of ~500 kHz, while maintaining saturation of all transistors.","Used a fixed threshold of 11 dB for f3dB measurement to avoid SpiceSharpParser variable reference issues; this corresponds to a 3 dB drop from the designed 14 dB gain."],"measurements":[{"name":"f3dB","key":"f3dB","index":0,"value":906374.8445015972,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#2 AC"},{"name":"gain_lf","key":"gain_lf","index":0,"value":18.164924296038688,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"gain_max","key":"gain_max","index":0,"value":18.164946707110474,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#2 AC"}]} +{"id":"deepseek:01008_1af007fc05da9497:5a417b3f373b3b2a","source":"deepseek","example_id":"01008_1af007fc05da9497","test_name":"test_test_1008_widlar_bjt_current_source_1af007fc05da9497","netlist_hash":"5a417b3f373b3b2a","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Create a Widlar current source using BJTs with a reference current of about 2mA and an output current of about 0.5mA. Use a 10V supply.","pair_ids":["36f97913cd2a347d","24b6ef20d7eab386","1087dc3a4fcbf2ac","9d82e6acb898bbce"],"prompts":["Create a Widlar current source using BJTs with a reference current of about 2mA and an output current of about 0.5mA. Use a 10V supply.","Design a BJT current mirror with emitter degeneration on the output transistor to achieve a reduced output current compared to the reference. VCC=10V.","Simulate a Widlar current source using NPN transistors with IS=1e-14, BF=100, and VA=100. Set Rref=4.7k and R_E2=75 to measure output current.","Build a Widlar current source that provides a stable current sink of roughly 0.5mA from a 10V supply, using a diode-connected reference transistor and an emitter-degenerated output transistor."],"measurements":[{"name":"Iref","key":"Iref","index":0,"value":0.0019845725215840685,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"Iout","key":"Iout","index":0,"value":0.0004937558896029597,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"Vout","key":"Vout","index":0,"value":7.531220551985202,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"}]} +{"id":"deepseek:00198_7c0c3f90c81e3a46:78618bc6ae9c8b8c","source":"deepseek","example_id":"00198_7c0c3f90c81e3a46","test_name":"test_test_198_bjt_differential_pair_tail_current_source_7c0c3f90c81e3a46","netlist_hash":"78618bc6ae9c8b8c","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"BJT differential pair with an active current mirror tail source using Q3 and Q4","pair_ids":["9a3f7c6a346a142b","2da4b1058933cc78","b09ea598a78c72ce","3e43938c817b9194"],"prompts":["BJT differential pair with an active current mirror tail source using Q3 and Q4","DC voltage transfer characteristic is measured by sweeping VIN1 from -20 mV to +20 mV","The differential pair provides single-ended gain of about 112 V/V with output common-mode near 6.2 V","The complementary outputs (out1 and out2) exhibit inverse voltage swings"],"measurements":[{"name":"VOUTMAX","key":"VOUTMAX","index":0,"value":8.130726341682234,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#2 dc"},{"name":"VOUT0","key":"VOUT0","index":0,"value":6.158206880671372,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 dc"},{"name":"VOUT2MIN","key":"VOUT2MIN","index":0,"value":4.187338436298205,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#2 dc"},{"name":"VOUT2MAX","key":"VOUT2MAX","index":0,"value":8.13042267737869,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#2 dc"},{"name":"VOUTMIN","key":"VOUTMIN","index":0,"value":4.186938730127764,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#2 dc"}]} +{"id":"deepseek:00194_eb5e54ed157a2f02:76cd9bea6f2114dc","source":"deepseek","example_id":"00194_eb5e54ed157a2f02","test_name":"test_test_194_bjt_differential_pair_with_tail_current_source_eb5e54ed157a2f02","netlist_hash":"76cd9bea6f2114dc","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"BJT differential pair with 1mA tail current, 5k\u03a9 load resistors, and 10V supply","pair_ids":["37c30d5090eaa5d0","eba3063b820739fe","c175789d7877c762"],"prompts":["BJT differential pair with 1mA tail current, 5k\u03a9 load resistors, and 10V supply","Sweeps VIN1 from -200mV to +200mV while VIN2 is grounded","Measures collector voltages at VIN1 = \u00b110mV to compute small-signal differential gain"],"measurements":[{"name":"VOUT2_N10","key":"VOUT2_N10","index":0,"value":7.060481299059685,"value_is_finite":true,"success":true,"measurement_type":"FIND_WHEN","simulation_name":"#2 DC"},{"name":"VOUT1_N10","key":"VOUT1_N10","index":0,"value":7.985627593261011,"value_is_finite":true,"success":true,"measurement_type":"FIND_WHEN","simulation_name":"#2 DC"},{"name":"DIFF_GAIN","key":"DIFF_GAIN","index":0,"value":92.51449601907105,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#2 DC"},{"name":"VOUT2_P10","key":"VOUT2_P10","index":0,"value":7.985628385027867,"value_is_finite":true,"success":true,"measurement_type":"FIND_WHEN","simulation_name":"#2 DC"},{"name":"VOUT1_P10","key":"VOUT1_P10","index":0,"value":7.060484758847772,"value_is_finite":true,"success":true,"measurement_type":"FIND_WHEN","simulation_name":"#2 DC"}]} +{"id":"deepseek:00679_48d95e3d2fe0879a:3edb1e1b3135ed40","source":"deepseek","example_id":"00679_48d95e3d2fe0879a","test_name":"test_test_679_t_section_lc_impedance_matching_network_48d95e3d2fe0879a","netlist_hash":"3edb1e1b3135ed40","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"T-section LC impedance matching network designed to match 50 ohm source to 100 ohm load at 10 MHz.","pair_ids":["15f1c7fd9dd5f6b8","55e0cfc819dd7342","0a09aa5b6decf151"],"prompts":["T-section LC impedance matching network designed to match 50 ohm source to 100 ohm load at 10 MHz.","The network uses two series inductors and a shunt capacitor.","At the matching frequency, maximum power is delivered to the load, resulting in an output voltage magnitude of about 0.707 V for a 1 V source with 50 ohm source impedance."],"measurements":[{"name":"vout_mag","key":"vout_mag","index":0,"value":0.7071064448228578,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:00744_eeb51a888afa153c:65ddec7a395afe83","source":"deepseek","example_id":"00744_eeb51a888afa153c","test_name":"test_test_744_diode_clamp_to_negative_rail_eeb51a888afa153c","netlist_hash":"65ddec7a395afe83","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Diode clamp circuit with resistor from input to output and diode from output to -2V rail.","pair_ids":["b13395c782c12786","72631abeaac2d22a","c21d449b02e7f9ce"],"prompts":["Diode clamp circuit with resistor from input to output and diode from output to -2V rail.","For a 0\u20135V pulse input the diode always conducts because the output remains above -1.3V, yielding a constant output near -1.3V.","The diode model uses a very low saturation current to approximate an ideal characteristic; RS=1 provides a small series resistance."],"measurements":[{"name":"vout_min","key":"vout_min","index":0,"value":-1.3360708284419036,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 TRAN"},{"name":"vout_max","key":"vout_max","index":0,"value":-1.2910218244813683,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00477_7ff0bdbe8ffd7c82:8cbc683926b45825","source":"deepseek","example_id":"00477_7ff0bdbe8ffd7c82","test_name":"test_test_477_potentiometer_volume_control_7ff0bdbe8ffd7c82","netlist_hash":"8cbc683926b45825","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Potentiometer volume control circuit with source impedance and capacitive load","pair_ids":["02fcd95eddaec8f4","3001327a541d3f83","b03ebf7f3b8af2d7"],"prompts":["Potentiometer volume control circuit with source impedance and capacitive load","The potentiometer is a 10k\u03a9 linear taper set to 50% position","Includes a 1nF load capacitor causing low-pass roll-off at high frequencies"],"measurements":[{"name":"gain_db","key":"gain_db","index":0,"value":-6.849728696437712,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"vout_dc","key":"vout_dc","index":0,"value":0.4545454545454545,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"}]} +{"id":"deepseek:02424_3b509c91c655d21d:d4716016c9f9e470","source":"deepseek","example_id":"02424_3b509c91c655d21d","test_name":"test_test_2424_varactor_tuned_colpitts_vco_3b509c91c655d21d","netlist_hash":"d4716016c9f9e470","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Design a varactor-tuned Colpitts VCO operating near 10 MHz.","pair_ids":["51e5363775672151","0fea46f858f27bc8","fdeec9f1de712ef1"],"prompts":["Design a varactor-tuned Colpitts VCO operating near 10 MHz.","Create a Colpitts oscillator with a varactor diode for voltage-controlled tuning.","Implement a voltage-controlled oscillator using a Colpitts topology and a varactor."],"measurements":[{"name":"period","key":"period","index":0,"value":9.585738389747301e-08,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 TRAN (Vtune=1)"},{"name":"period","key":"period","index":1,"value":1.2840500813470796e-07,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#2 TRAN (Vtune=2)"},{"name":"period","key":"period","index":2,"value":1.2272661646958437e-07,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#3 TRAN (Vtune=3)"},{"name":"period","key":"period","index":3,"value":9.37234560673567e-08,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#4 TRAN (Vtune=4)"},{"name":"period","key":"period","index":4,"value":1.1197302207162206e-07,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#5 TRAN (Vtune=5)"},{"name":"freq","key":"freq","index":0,"value":10432164.527560843,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 TRAN (Vtune=1)"},{"name":"freq","key":"freq","index":1,"value":7787858.234866614,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#2 TRAN (Vtune=2)"},{"name":"freq","key":"freq","index":2,"value":8148191.718850429,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#3 TRAN (Vtune=3)"},{"name":"freq","key":"freq","index":3,"value":10669687.631678082,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#4 TRAN (Vtune=4)"},{"name":"freq","key":"freq","index":4,"value":8930722.610669231,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#5 TRAN (Vtune=5)"}]} +{"id":"deepseek:01924_68be36e7cc6833ab:98d54505935fa36c","source":"deepseek","example_id":"01924_68be36e7cc6833ab","test_name":"test_test_1924_constant_current_battery_charger_68be36e7cc6833ab","netlist_hash":"98d54505935fa36c","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Op-amp feedback loop regulates current through sense resistor Rsense=1\u03a9 to match Vref=0.1V, yielding 100mA.","pair_ids":["ab6ebe1b7f14f106","4fc32c8a9185e6bd","b8a3214b91602159"],"prompts":["Op-amp feedback loop regulates current through sense resistor Rsense=1\u03a9 to match Vref=0.1V, yielding 100mA.","BJT pass element Q1 operates in active region, with E1 providing high gain to drive base voltage.","DC sweep from 2V to 8V verifies current remains nearly constant."],"measurements":[{"name":"I_AT_2V","key":"I_AT_2V","index":0,"value":0.09997066531420026,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"I_AT_8V","key":"I_AT_8V","index":0,"value":0.09991066606946802,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"I_AT_3V","key":"I_AT_3V","index":0,"value":0.09996066544007179,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"}]} +{"id":"deepseek:00317_2bc0d1fc13d0a2e8:1582045b9a332ab7","source":"deepseek","example_id":"00317_2bc0d1fc13d0a2e8","test_name":"test_test_317_non_inverting_opamp_with_e_source_2bc0d1fc13d0a2e8","netlist_hash":"1582045b9a332ab7","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Non-inverting amplifier with ideal op-amp modeled as voltage-controlled voltage source (E) with gain 100k.","pair_ids":["b864f16235afc864","2f6372bd7f1dc9de","5b3f24aa49e84fc0"],"prompts":["Non-inverting amplifier with ideal op-amp modeled as voltage-controlled voltage source (E) with gain 100k.","Feedback network: R1 (1k) from inverting input to ground, R2 (9k) from output to inverting input, setting gain = 1 + R2/R1 = 10.","AC analysis sweeps from 1 Hz to 1 MHz, measuring output gain at 1 kHz to verify nominal closed-loop gain."],"measurements":[{"name":"gain_lin","key":"gain_lin","index":0,"value":9.99900009999,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"gain_db","key":"gain_db","index":0,"value":19.999131454462745,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:00577_f3538b7b374560ee:b8104863356a8e36","source":"deepseek","example_id":"00577_f3538b7b374560ee","test_name":"test_test_577_third_order_chebyshev_lowpass_ladder_f3538b7b374560ee","netlist_hash":"b8104863356a8e36","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"Third-order Chebyshev low-pass ladder filter with 1 dB passband ripple.","pair_ids":["feb3665e86998e90","fdd29fabecf0a9d2","9aee3f941d06eaa2","072da1a200dccf5d","164a953d5efc295a"],"prompts":["Third-order Chebyshev low-pass ladder filter with 1 dB passband ripple.","Doubly terminated at 50 ohms for proper impedance matching.","Component values designed so that the -3 dB cutoff frequency occurs at 1 kHz.","Uses standard LCL topology with Rs = RL = 50 ohms.","Max gain is -6 dB due to voltage division; ripple causes 1 dB variation in passband."],"measurements":[{"name":"f3db","key":"f3db","index":0,"value":998.9458562340272,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 AC"},{"name":"max_gain","key":"max_gain","index":0,"value":-6.0211186227023195,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 AC"},{"name":"gain_at_1k","key":"gain_at_1k","index":0,"value":-9.0280956323765,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:00270_5298022d8949433c:2f4d00078d2c1025","source":"deepseek","example_id":"00270_5298022d8949433c","test_name":"test_test_270_mosfet_differential_pair_with_active_load_5298022d8949433c","netlist_hash":"2f4d00078d2c1025","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"CMOS differential amplifier with NMOS input pair and PMOS current mirror load.","pair_ids":["36f614b33934982c","c62f0ac10ccc9162","2ea28f0bdf46b202","ab7c70d286d04294","856ecda3120f9747"],"prompts":["CMOS differential amplifier with NMOS input pair and PMOS current mirror load.","Biasing with 100uA tail current from -5V supply.","Input common-mode shifted to -2V to allow output swing down to -3V.","DC sweep of differential input from -100mV to +100mV around common-mode.","Gain measured at \u00b11mV differential input."],"measurements":[{"name":"VOUT_N","key":"VOUT_N","index":0,"value":3.521988262233208,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"GAIN","key":"GAIN","index":0,"value":257.3070525438652,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#2 DC"},{"name":"VOUT_MIN","key":"VOUT_MIN","index":0,"value":-3.1959958490843103,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#2 DC"},{"name":"VOUT_MAX","key":"VOUT_MAX","index":0,"value":4.94292976176539,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#2 DC"},{"name":"VOUT_P","key":"VOUT_P","index":0,"value":4.036602367320938,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"VOUT_0","key":"VOUT_0","index":0,"value":3.7790742773304373,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"}]} +{"id":"deepseek:01101_96c5af211cf676b5:df889d465811b05e","source":"deepseek","example_id":"01101_96c5af211cf676b5","test_name":"test_test_1101_bjt_class_b_push_pull_output_stage_96c5af211cf676b5","netlist_hash":"df889d465811b05e","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Design a class-B BJT push-pull output stage capable of driving a 1k\u03a9 load with \u00b115V supplies. Use a 5V peak 1kHz sine input and measure the output peak voltage and zero-crossing time.","pair_ids":["6fa3fc019af2dda8","9a5e6ae622d00540","846e95a91eda590b"],"prompts":["Design a class-B BJT push-pull output stage capable of driving a 1k\u03a9 load with \u00b115V supplies. Use a 5V peak 1kHz sine input and measure the output peak voltage and zero-crossing time.","Create a SPICE netlist for a complementary NPN/PNP class-B power amplifier stage. Include transistor models, apply a sinusoidal input, and run a transient analysis to measure crossover distortion timing and output amplitude.","Simulate a basic push-pull emitter follower with no bias network. Drive the bases with a 5V sine wave and measure the maximum output voltage and the last time the output crosses zero."],"measurements":[{"name":"vout_min","key":"vout_min","index":0,"value":-4.2623030451108015,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#2 TRAN"},{"name":"vout_peak","key":"vout_peak","index":0,"value":4.262303052612924,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#2 TRAN"},{"name":"crossover_time","key":"crossover_time","index":0,"value":0.004513486656784299,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#2 TRAN"}]} +{"id":"deepseek:01033_d33d197bdf308d17:f2d180244fc7d4b2","source":"deepseek","example_id":"01033_d33d197bdf308d17","test_name":"test_test_1033_bjt_zener_current_source_d33d197bdf308d17","netlist_hash":"f2d180244fc7d4b2","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"A BJT-based constant current source using a Zener diode (5.6V) to provide a stable reference voltage to the transistor base.","pair_ids":["df07c2584e0936e0","06c163424d8fc42a","68977942599f826a"],"prompts":["A BJT-based constant current source using a Zener diode (5.6V) to provide a stable reference voltage to the transistor base.","The Zener is reverse-biased with cathode to base node and anode to ground, clamping the base at ~5.6V for supply voltages above 10V.","Emitter resistor RE converts the stable base voltage minus Vbe into a predictable emitter current, which is mirrored by the collector."],"measurements":[{"name":"I_AVG","key":"I_AVG","index":0,"value":0.0010303301761412581,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#2 dc"},{"name":"I_VAR","key":"I_VAR","index":0,"value":8.492028962823594e-06,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#2 dc"},{"name":"I_MAX","key":"I_MAX","index":0,"value":0.0010339622342382313,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#2 dc"},{"name":"I_MIN","key":"I_MIN","index":0,"value":0.0010254702052754077,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#2 dc"}]} +{"id":"deepseek:02312_a4d34686a0b2a27f:a2eab8939be78ea8","source":"deepseek","example_id":"02312_a4d34686a0b2a27f","test_name":"test_test_2312_linear_voltage_regulator_npn_zener_a4d34686a0b2a27f","netlist_hash":"a2eab8939be78ea8","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"A discrete linear voltage regulator using an NPN transistor as emitter follower and a Zener diode as voltage reference.","pair_ids":["b34bb86764f4b12d","42be9e5e138be81a","59ae8f07f0185ce6","b982d7d41e54f819"],"prompts":["A discrete linear voltage regulator using an NPN transistor as emitter follower and a Zener diode as voltage reference.","The Zener (5.6V) sets the base voltage; the output follows at about 4.8V due to VBE drop.","A 1.2k\u03a9 resistor biases the Zener from the input, and a 500\u03a9 load sinks current.","DC sweep of input from 7V to 15V verifies regulation and dropout."],"measurements":[{"name":"VOUT_MAX","key":"VOUT_MAX","index":0,"value":4.887074129227109,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#2 DC"},{"name":"VOUT_MIN","key":"VOUT_MIN","index":0,"value":4.829732434714935,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#2 DC"},{"name":"VOUT_AT_12","key":"VOUT_AT_12","index":0,"value":4.874529331052373,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"}]} +{"id":"deepseek:00473_73c4ca641ed02087:220fbca710bf9ad8","source":"deepseek","example_id":"00473_73c4ca641ed02087","test_name":"test_test_473_potentiometer_volume_source_impedance_73c4ca641ed02087","netlist_hash":"220fbca710bf9ad8","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Potentiometer-based volume control with a 1k\u03a9 source impedance.","pair_ids":["1285aefd7b4b45ff","c0ee544cb4ae9c35","f05cc295bb3288cc"],"prompts":["Potentiometer-based volume control with a 1k\u03a9 source impedance.","Resistive divider with R1=R2=5k\u03a9 (pot midpoint) and Rsource=1k\u03a9.","DC sweep and AC small-signal analyses performed to verify attenuation."],"measurements":[{"name":"gain_db","key":"gain_db","index":0,"value":-6.848453616444125,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"vout_dc","key":"vout_dc","index":0,"value":0.4545454545454545,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"}]} +{"id":"deepseek:01410_18561c6bf3897065:acb32bd468a3dce7","source":"deepseek","example_id":"01410_18561c6bf3897065","test_name":"test_test_1410_jfet_current_source_18561c6bf3897065","netlist_hash":"acb32bd468a3dce7","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"JFET constant-current source using an NJF transistor with source degeneration","pair_ids":["7ddb9521b66d36bd","fdbf3e1db62ebdf2","9d4864a0e7cfca66"],"prompts":["JFET constant-current source using an NJF transistor with source degeneration","Output current set to approximately 1 mA with a 500 \u03a9 source resistor","JFET model adjusted to VTO=-1 V and BETA=4m to achieve low compliance voltage (~1 V)"],"measurements":[{"name":"I_OUT","key":"I_OUT","index":0,"value":0.0010016605389021574,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#2 DC"},{"name":"I_MAX","key":"I_MAX","index":0,"value":0.001003149535752211,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#2 DC"},{"name":"I_MIN","key":"I_MIN","index":0,"value":0.0010001665865326584,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#2 DC"}]} +{"id":"deepseek:00738_a9b51ee0f1d85631:a03d7b7f46460637","source":"deepseek","example_id":"00738_a9b51ee0f1d85631","test_name":"test_test_738_diode_peak_detector_a9b51ee0f1d85631","netlist_hash":"a03d7b7f46460637","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Design a diode peak detector circuit that captures the peak of a 1kHz sine wave using a capacitor and a bleed resistor, and measure the maximum output voltage.","pair_ids":["ff731676745fc9dc","2ee72b581bdee2e4","3a01bcc2a3672aa4"],"prompts":["Design a diode peak detector circuit that captures the peak of a 1kHz sine wave using a capacitor and a bleed resistor, and measure the maximum output voltage.","Simulate a simple peak detector with a diode, capacitor, and resistor, and report the peak output voltage.","Build a diode-based peak detector for a 2V sine wave at 1kHz, with a 100k\u03a9 bleed resistor and 1\u00b5F capacitor, then find the peak output."],"measurements":[{"name":"vmax","key":"vmax","index":0,"value":1.398891826221058,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00803_e86c1c52c247afb6:0f6a338fbc4e38a6","source":"deepseek","example_id":"00803_e86c1c52c247afb6","test_name":"test_test_803_balanced_diode_mixer_e86c1c52c247afb6","netlist_hash":"0f6a338fbc4e38a6","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Single-balanced diode mixer with LO at 1 MHz and RF at 1.1 MHz","pair_ids":["b76c71d905800f03","92efef853fa1626b","eb4a2a9c30b1b208"],"prompts":["Single-balanced diode mixer with LO at 1 MHz and RF at 1.1 MHz","Active low-pass filter (Sallen-Key, gain 2, cutoff ~159 kHz) extracts the 100 kHz IF","Uses a voltage-controlled voltage source (E_op) as the op-amp in the filter"],"measurements":[{"name":"v_pp_out","key":"v_pp_out","index":0,"value":0.05067003289514105,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00948_d00c0e5c16158534:b4c48d63dcc21e7a","source":"deepseek","example_id":"00948_d00c0e5c16158534","test_name":"test_test_948_bootstrapped_emitter_follower_d00c0e5c16158534","netlist_hash":"b4c48d63dcc21e7a","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Design a high-input-impedance buffer using an NPN emitter follower with a bootstrapped bias divider.","pair_ids":["8c7ad2597b1d16aa","7abffdef3cca4ba7","b0a97ef1d940143b","3f0148358e459910"],"prompts":["Design a high-input-impedance buffer using an NPN emitter follower with a bootstrapped bias divider.","Create a SPICE netlist for a bootstrapped emitter follower to improve input resistance.","Simulate an emitter follower circuit with bootstrapping, including DC operating point and AC response.","Write a measured netlist for a BJT buffer that uses a bootstrap capacitor to increase input impedance."],"measurements":[{"name":"gain_1k","key":"gain_1k","index":0,"value":0.9903652162865217,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"}]} +{"id":"deepseek:01898_06306503ed3fdc6b:ebaa624ba3c0e45e","source":"deepseek","example_id":"01898_06306503ed3fdc6b","test_name":"test_test_1898_shunt_regulator_opamp_06306503ed3fdc6b","netlist_hash":"ebaa624ba3c0e45e","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Shunt voltage regulator using op\u2011amp error amplifier (E source) and power NPN transistor.","pair_ids":["6c386a50c4f24181","6da536cea3513e5b","f857f1504d2306d0"],"prompts":["Shunt voltage regulator using op\u2011amp error amplifier (E source) and power NPN transistor.","Feedback divider R1/R2 sets output to 5V with 2.5V reference.","DC sweep of VIN from 10V to 20V demonstrates line regulation."],"measurements":[{"name":"vout_20","key":"vout_20","index":0,"value":5.000015973586029,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"vout_nom","key":"vout_nom","index":0,"value":5.000015535001052,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"vout_10","key":"vout_10","index":0,"value":5.000015312983988,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"}]} +{"id":"deepseek:01442_055f512e82be98dc:055f512e82be98dc","source":"deepseek","example_id":"01442_055f512e82be98dc","test_name":"test_test_1442_non_inverting_opamp_with_bias_resistor_055f512e82be98dc","netlist_hash":"055f512e82be98dc","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"Design a non-inverting op-amp amplifier with a gain of 3 using an ideal op-amp and include a 10k input bias resistor. Perform DC operating point and AC sweep analyses.","pair_ids":["c341aed1b06fcad7","9b4dcbde8fcae753","25929955094445a8","c3c83476c8a39935","76a333179f42d224"],"prompts":["Design a non-inverting op-amp amplifier with a gain of 3 using an ideal op-amp and include a 10k input bias resistor. Perform DC operating point and AC sweep analyses.","Create a SPICE netlist for a non-inverting amplifier with a 20k feedback resistor and a 10k ground resistor, powered by an ideal op-amp, and include a bias resistor at the non-inverting input.","Simulate a non-inverting amplifier circuit that uses an ideal op-amp with a voltage gain of 100k. Add a 10k resistor from the non-inverting input to ground and set the feedback network for a gain of 3. Include .OP and .AC analyses.","Write a measured SPICE netlist for a non-inverting ampliifer with Rf=20k, R1=10k, Rbias=10k, and an E-source op-amp with gain 100k. Include operating point and AC analysis.","Provide a netlist for a basic non-inverting amplifier with a gain of 3, input bias resistor, and analyses to verify DC and AC behavior."],"measurements":[{"name":"gain_at_1k","key":"gain_at_1k","index":0,"value":2.999910002705292,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"}]} +{"id":"deepseek:01856_98f3817e8cd64379:394585be0d90a144","source":"deepseek","example_id":"01856_98f3817e8cd64379","test_name":"test_test_1856_vco_current_starved_integrator_98f3817e8cd64379","netlist_hash":"394585be0d90a144","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Voltage-controlled oscillator using a current-starved integrator and Schmitt trigger","pair_ids":["955c4d472822cab8","0f21b1567530141b","fefe68db251d78e6"],"prompts":["Voltage-controlled oscillator using a current-starved integrator and Schmitt trigger","A charging current proportional to Vctrl charges a capacitor until it exceeds the upper threshold, then a reset switch rapidly discharges it below the lower threshold","The oscillation frequency is approximately proportional to the control voltage, with 400kHz at Vctrl=1V"],"measurements":[{"name":"t2","key":"t2","index":0,"value":6.7516515211335685e-06,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 tran"},{"name":"period","key":"period","index":0,"value":3.000518805711416e-06,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 tran"},{"name":"t1","key":"t1","index":0,"value":3.7511327154221525e-06,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 tran"},{"name":"freq","key":"freq","index":0,"value":333275.69822142884,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 tran"}]} +{"id":"deepseek:00497_92303d5d327432da:0f15398db50b3151","source":"deepseek","example_id":"00497_92303d5d327432da","test_name":"test_test_497_lead_compensation_rc_92303d5d327432da","netlist_hash":"0f15398db50b3151","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"High\u2011pass RC filter: series capacitor C1 from input to output, shunt resistor R1 from output to ground","pair_ids":["4ab5cca1b0ad5315","af905f66d608ff18","754993c622ea7142"],"prompts":["High\u2011pass RC filter: series capacitor C1 from input to output, shunt resistor R1 from output to ground","Provides phase lead by allowing high\u2011frequency components to pass, output voltage leads input","Corner frequency f_c = 1/(2\u03c0 R1 C1) \u2248 9.95 kHz, chosen to meet \u00b145\u00b0 phase at 10 kHz"],"measurements":[{"name":"gain_10k","key":"gain_10k","index":0,"value":-2.987362341700547,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"phase_100k_rad","key":"phase_100k_rad","index":0,"value":0.09914569393668246,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"gain_100k","key":"gain_100k","index":0,"value":-0.04276070136612641,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"phase_10k_rad","key":"phase_10k_rad","index":0,"value":0.782750374442406,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:01184_fbe519e447031ce6:d10c468dd67c3be3","source":"deepseek","example_id":"01184_fbe519e447031ce6","test_name":"test_test_1184_nmos_common_gate_amplifier_fbe519e447031ce6","netlist_hash":"d10c468dd67c3be3","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Simulate an NMOS common-gate amplifier stage with biasing resistors and bypass capacitor. Perform DC and AC analyses, and measure the small-signal voltage gain.","pair_ids":["25a925558f313c76","389b3243f751d28a","a053516e9ff49f3a","9a441c985702ddd6"],"prompts":["Simulate an NMOS common-gate amplifier stage with biasing resistors and bypass capacitor. Perform DC and AC analyses, and measure the small-signal voltage gain.","Create a SPICE netlist for a common-gate NMOS amplifier. Use a single NMOS transistor, a voltage divider for gate bias, source degeneration, and a drain load. Run an AC sweep from 10 Hz to 1 MHz and measure the peak gain.","Design a common-gate amplifier using an NMOS device. Set the quiescent current to about 0.3 mA, with a supply of 10V. Include DC operating point and AC analysis, then measure the gain at 1 kHz and the maximum gain over frequency.","Build an NMOS common-gate amplifier with resistive gate biasing and source resistance. Perform an AC analysis and extract the amplifier's midband gain using .MEASURE statements."],"measurements":[{"name":"max_gain","key":"max_gain","index":0,"value":3.3398566845274624,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#2 AC"},{"name":"gain_at_1k","key":"gain_at_1k","index":0,"value":3.339854819349842,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"}]} +{"id":"deepseek:02108_dd968e77b285c414:70ae36670bf790c7","source":"deepseek","example_id":"02108_dd968e77b285c414","test_name":"test_test_2108_sync_am_detector_switching_dd968e77b285c414","netlist_hash":"70ae36670bf790c7","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"AM signal generated by multiplying a 1 MHz carrier with a DC-shifted 10 kHz modulation tone (modulation index 0.8).","pair_ids":["b20885ddf95594da","78717888025acf8a","88bcd0e5845b56df","cd4a5ea45904244e"],"prompts":["AM signal generated by multiplying a 1 MHz carrier with a DC-shifted 10 kHz modulation tone (modulation index 0.8).","A PULSE source at 1 MHz with 50% duty cycle drives a voltage-controlled switch (S1) to act as a full-wave synchronous detector.","The switched signal is low-pass filtered by R1=100\u03a9 and C1=100nF to recover the envelope, with Rload=1MEG ensuring minimal voltage division.","Switch model uses sharp threshold (VH=0), low RON=1\u03a9, and transient analysis uses 1 ns maximum step for accurate switching edges."],"measurements":[{"name":"Vmax","key":"Vmax","index":0,"value":0.9564277023731356,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"},{"name":"Vpp","key":"Vpp","index":0,"value":0.9564277023731356,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 TRAN"},{"name":"Vmod_ampl","key":"Vmod_ampl","index":0,"value":0.4782138511865678,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 TRAN"},{"name":"Vdc","key":"Vdc","index":0,"value":0.6363432284796786,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 TRAN"},{"name":"Vmin","key":"Vmin","index":0,"value":0.31967301168025813,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00518_f49e509707d0f5b4:f4aa195b780943b5","source":"deepseek","example_id":"00518_f49e509707d0f5b4","test_name":"test_test_518_lead_lag_compensation_f49e509707d0f5b4","netlist_hash":"f4aa195b780943b5","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Design a passive lead-lag compensation network using only resistors and capacitors. Use an AC analysis to measure the phase shift at two frequencies, one where phase lead is dominant and one where phase lag is dominant. Include measurement commands to capture the phase at 2.2 kHz and 31.6 kHz.","pair_ids":["7751c78c1b596057","cd5808c9e62592c4","a87be0504f52ea04"],"prompts":["Design a passive lead-lag compensation network using only resistors and capacitors. Use an AC analysis to measure the phase shift at two frequencies, one where phase lead is dominant and one where phase lag is dominant. Include measurement commands to capture the phase at 2.2 kHz and 31.6 kHz.","Create a SPICE netlist for a lead-lag compensator built from RC components. Perform an AC sweep and verify that the circuit exhibits positive phase shift at 2.2 kHz and negative phase shift at 31.6 kHz.","Generate a passive compensation network that provides both phase lead and phase lag. Use a voltage source with AC=1, and simulate from 100 Hz to 1 MHz. Measure the output phase at 2.2 kHz (should be positive) and at 31.6 kHz (should be negative). Ensure the netlist includes .MEAS statements and .AC analysis."],"measurements":[{"name":"gain_lag","key":"gain_lag","index":0,"value":0.2130164396475177,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"gain_lead","key":"gain_lead","index":0,"value":0.37054498532409613,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"phase_lead","key":"phase_lead","index":0,"value":0.5170397218590986,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"phase_lag","key":"phase_lag","index":0,"value":-0.814756351830835,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:00012_4ed8bba44d69f0c4:6e09a283545d9391","source":"deepseek","example_id":"00012_4ed8bba44d69f0c4","test_name":"test_test_12_resistive_t_pad_attenuator_4ed8bba44d69f0c4","netlist_hash":"6e09a283545d9391","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"T-pad attenuator with 10 dB attenuation designed for a 50-ohm system.","pair_ids":["623ffb5259d0438d","bbaf9cdd161b93a3","2e61548d4d17e245"],"prompts":["T-pad attenuator with 10 dB attenuation designed for a 50-ohm system.","Resistor values calculated using standard T-pad formulas: R1=R3=25.98\u03a9, R2=35.14\u03a9.","Simulated DC operating point and AC response up to 1 kHz."],"measurements":[{"name":"vout","key":"vout","index":0,"value":0.3161871934720823,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"gain","key":"gain","index":0,"value":0.3161871934720823,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:01482_48e8d09d7e1df237:b9ce3f04ade30b08","source":"deepseek","example_id":"01482_48e8d09d7e1df237","test_name":"test_test_1482_instrumentation_amplifier_driven_ref_48e8d09d7e1df237","netlist_hash":"b9ce3f04ade30b08","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Standard three-op-amp instrumentation amplifier with unity-gain difference stage and buffered reference.","pair_ids":["2bdf92edb083613c","9494b8217ef8f8d9","db44fa4344e49b45","21ca5e4deb76bb5a"],"prompts":["Standard three-op-amp instrumentation amplifier with unity-gain difference stage and buffered reference.","Input buffers provide gain of 21 through 1k\u03a9 Rg and 10k\u03a9 feedback resistors.","Reference voltage is applied through a unity-gain buffer to the non-inverting resistor network of the difference amplifier.","All op-amps are modeled as behavioral voltage-controlled voltage sources with open-loop gain of 100k."],"measurements":[{"name":"gain_10hz_db","key":"gain_10hz_db","index":0,"value":26.442388333294964,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"Vout_op","key":"Vout_op","index":0,"value":4.599467103224015,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 OP"}]} +{"id":"deepseek:01503_e7ec67c7b028afd4:0b6bf8bb11fdf8cf","source":"deepseek","example_id":"01503_e7ec67c7b028afd4","test_name":"test_test_1503_opamp_charge_amplifier_piezo_e7ec67c7b028afd4","netlist_hash":"0b6bf8bb11fdf8cf","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Charge amplifier using an E-source op-amp with 100k gain, 10M\u03a9 feedback resistor, 1nF feedback capacitor, and 2nF piezo capacitance.","pair_ids":["5400f9936a862673","6a84b0c7fb718933","295e96c4dae26f4d"],"prompts":["Charge amplifier using an E-source op-amp with 100k gain, 10M\u03a9 feedback resistor, 1nF feedback capacitor, and 2nF piezo capacitance.","Transient response to a 1nC current pulse should produce -1V output peak.","AC analysis shows transimpedance gain rolling off from 10M\u03a9 to ~1.6k\u03a9 due to feedback capacitor."],"measurements":[{"name":"gain_hf","key":"gain_hf","index":0,"value":1591.501665712581,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"gain_lf","key":"gain_lf","index":0,"value":9980218.457936278,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"Vout_min","key":"Vout_min","index":0,"value":-0.9516002037883516,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#3 TRAN"}]} +{"id":"deepseek:00701_8827dbc16fd572df:19b53e3eb6609042","source":"deepseek","example_id":"00701_8827dbc16fd572df","test_name":"test_test_701_full_wave_center_tapped_rectifier_8827dbc16fd572df","netlist_hash":"19b53e3eb6609042","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Full-wave center-tapped rectifier using two 12 V amplitude 50 Hz sinusoidal sources with 180\u00b0 phase difference to model a center-tapped transformer.","pair_ids":["f202042104d1307a","2a0914d0426a1614","fc94328455678e32"],"prompts":["Full-wave center-tapped rectifier using two 12 V amplitude 50 Hz sinusoidal sources with 180\u00b0 phase difference to model a center-tapped transformer.","Two diodes (DMOD with IS=2e-14, N=1) provide rectification, and a 470 \u00b5F capacitor smooths the output to a 1 k\u03a9 load.","Transient simulation runs to 2 s for steady\u2011state, and post\u20111.5 s window yields average ~11.2 V and ripple ~0.25 V."],"measurements":[{"name":"Vripple_pp","key":"Vripple_pp","index":0,"value":0.18019541367795888,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#1 TRAN"},{"name":"Vout_avg","key":"Vout_avg","index":0,"value":10.882852783923031,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:01087_c680220223ceed34:b0c1b13da8e25052","source":"deepseek","example_id":"01087_c680220223ceed34","test_name":"test_test_1087_current_source_c680220223ceed34","netlist_hash":"b0c1b13da8e25052","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"Design a beta-insensitive BJT current source that uses an emitter follower to buffer the base drive.","pair_ids":["deb1f83b594cf0b4","fbc398e3b73d1a30","c0238ea03a098667","5ed75251b9453498","b9a14f173843c01f"],"prompts":["Design a beta-insensitive BJT current source that uses an emitter follower to buffer the base drive.","Create a SPICE netlist for a biasing circuit that provides a stable current despite transistor beta variations, using two NPNs and resistors.","Generate a measured netlist for a beta-compensated current source using an emitter follower and a current-setting transistor.","Simulate a BJT bias cell that minimizes the effect of current gain on the output current, with DC sweep and operating point analysis.","Provide a SPICE circuit for a beta-independent current source, including measurement of output current and sensitivity."],"measurements":[{"name":"Iload_at12","key":"Iload_at12","index":0,"value":0.004711928389704227,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"Iout_at12","key":"Iout_at12","index":0,"value":0.0047420728127995524,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"}]} +{"id":"deepseek:00034_cac0aeee53573db8:dfb919d8a915863e","source":"deepseek","example_id":"00034_cac0aeee53573db8","test_name":"test_test_34_rc_delay_network_driving_high_impedance_load_cac0aeee53573db8","netlist_hash":"dfb919d8a915863e","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"RC low-pass filter with R=10k\u03a9 and C=1\u00b5F","pair_ids":["05382649bcc63dea","afa0519b2675d799","5f4fb18c0cd29ba1"],"prompts":["RC low-pass filter with R=10k\u03a9 and C=1\u00b5F","Driving a 100M\u03a9 high-impedance load to minimize loading effects","Measures delay between input crossing 0.5V and output crossing 0.5V"],"measurements":[{"name":"delay","key":"delay","index":0,"value":0.006936524412641388,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00133_083d5f2d8e7bab5c:554a9404b9a6144e","source":"deepseek","example_id":"00133_083d5f2d8e7bab5c","test_name":"test_test_133_zener_regulator_series_resistor_083d5f2d8e7bab5c","netlist_hash":"554a9404b9a6144e","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"6.2V Zener diode voltage regulator using a 1k series resistor and a 10k load resistor.","pair_ids":["20280b608a54b181","234077645273f15e","6ca91ebc5b20d5d7"],"prompts":["6.2V Zener diode voltage regulator using a 1k series resistor and a 10k load resistor.","DC analysis sweeps input voltage from 0 to 20V.","The Zener diode is reverse-biased (anode to ground, cathode to output) for voltage regulation."],"measurements":[{"name":"Vout_12V","key":"Vout_12V","index":0,"value":6.188245043547791,"value_is_finite":true,"success":true,"measurement_type":"FIND_WHEN","simulation_name":"#2 DC"}]} +{"id":"deepseek:00702_6b61f7f455adfefa:abcc6ad92ac84e40","source":"deepseek","example_id":"00702_6b61f7f455adfefa","test_name":"test_test_702_full_wave_center_tapped_rectifier_6b61f7f455adfefa","netlist_hash":"abcc6ad92ac84e40","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Design a full-wave center-tapped rectifier using two diodes and a smoothing capacitor. The input is 50 Hz AC with 12V peak per half, load is 100 ohms. Simulate the transient response and measure output voltage average and ripple peak-to-peak.","pair_ids":["88f41916fdf29c58","5fa4b73b10c419cd","7e64caf22412531f"],"prompts":["Design a full-wave center-tapped rectifier using two diodes and a smoothing capacitor. The input is 50 Hz AC with 12V peak per half, load is 100 ohms. Simulate the transient response and measure output voltage average and ripple peak-to-peak.","Create a SPICE netlist for a center-tapped full-wave rectifier with a 2200uF filter capacitor, 100 ohm load, and 12V peak AC input. Perform transient analysis, and compute the output DC average and ripple.","Simulate a power supply circuit: full-wave rectifier using a center-tapped transformer (modeled as anti-phase sinusoidal sources), two diodes, and a smoothing capacitor. Analyze the output voltage ripple and average DC level over the last 20ms of a 100ms run."],"measurements":[{"name":"Vout_avg","key":"Vout_avg","index":0,"value":11.290910113445905,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 TRAN"},{"name":"Vripple","key":"Vripple","index":0,"value":0.6837201674403293,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:01431_b76453fde29e0d75:0d3f207935ee00f8","source":"deepseek","example_id":"01431_b76453fde29e0d75","test_name":"test_test_1431_opamp_voltage_follower_b76453fde29e0d75","netlist_hash":"0d3f207935ee00f8","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"DC sweep from 0 to 1 V to extract operating point at 1 V input","pair_ids":["d77010df54d3d192","c859361037d4c336","3cffebb6a6ba9cf3"],"prompts":["DC sweep from 0 to 1 V to extract operating point at 1 V input","AC analysis from 1 Hz to 1 MHz to verify flat unity-gain response","Ideal op-amp modeled with E-source (gain=100k) forcing output to track non-inverting input"],"measurements":[{"name":"dc_out","key":"dc_out","index":0,"value":0.999990000099999,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 dc"},{"name":"ac_gain_db","key":"ac_gain_db","index":0,"value":-8.685846208858971e-05,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 ac"}]} +{"id":"deepseek:01672_0afaffdd9f961fd1:1e939fa43c4ce416","source":"deepseek","example_id":"01672_0afaffdd9f961fd1","test_name":"test_test_1672_mfb_highpass_0afaffdd9f961fd1","netlist_hash":"1e939fa43c4ce416","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Second-order multiple-feedback high-pass filter with Butterworth response.","pair_ids":["108695ca208bfee2","542822a7aac94853","b434d7430232dbd0","e644ac7e09b3d5d6"],"prompts":["Second-order multiple-feedback high-pass filter with Butterworth response.","Uses ideal op-amp (E1) with high gain 100k.","Filter designed for -3 dB cutoff near 11.25 kHz, passband gain 0 dB.","Components: C1=C3=10nF, C2=2.2nF, R1=910\u03a9, R2=10k\u03a9."],"measurements":[{"name":"low_gain","key":"low_gain","index":0,"value":-82.04362393427425,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"fc","key":"fc","index":0,"value":11373.489863895702,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 AC"},{"name":"passband_gain","key":"passband_gain","index":0,"value":-0.002988467878144016,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:02289_23c2dbc4f573a070:1b75b4e46ce13bf1","source":"deepseek","example_id":"02289_23c2dbc4f573a070","test_name":"test_test_2289_bjt_gilbert_gain_cell_as_variable_transconductance_amplifier_23c2dbc4f573a070","netlist_hash":"1b75b4e46ce13bf1","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"BJT Gilbert gain cell as variable transconductance amplifier.","pair_ids":["ba082573517bfee3","379d97e182eb72cc","e6b9cf3c9254ba43","7958fb622b385932"],"prompts":["BJT Gilbert gain cell as variable transconductance amplifier.","Differential input with amplitude 10mV, common-mode voltage set to 2.5V via VCM source.","Control voltage VCTRL=0.8V, VREF=1.0V to steer tail current and set high gain.","Tail current 2mA, load resistors 1k\u03a9, supply 10V."],"measurements":[{"name":"vout_min","key":"vout_min","index":0,"value":-0.3521960985904897,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#2 TRAN"},{"name":"vout_max","key":"vout_max","index":0,"value":0.35219698830513835,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#2 TRAN"},{"name":"vout_pp","key":"vout_pp","index":0,"value":0.7043930868956281,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#2 TRAN"}]} +{"id":"deepseek:01009_086d83f6d347b3c2:875d2f99a64ba55a","source":"deepseek","example_id":"01009_086d83f6d347b3c2","test_name":"test_test_1009_widlar_bjt_current_source_086d83f6d347b3c2","netlist_hash":"875d2f99a64ba55a","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Widlar BJT current source with emitter degeneration","pair_ids":["13c13b5f683439b9","d931e58f4bdb0aab","937fc438ce6d9f5f","dfec425ed6a64fac"],"prompts":["Widlar BJT current source with emitter degeneration","Reference current set by 10k\u03a9 resistor from 15V supply","Output current target around 133\u00b5A with 470\u03a9 emitter resistor","Output resistance boosted by emitter degeneration and Early effect"],"measurements":[{"name":"ROUT","key":"ROUT","index":0,"value":2713635.724399945,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#2 DC"},{"name":"I2","key":"I2","index":0,"value":0.0001332128326793336,"value_is_finite":true,"success":true,"measurement_type":"FIND_WHEN","simulation_name":"#2 DC"},{"name":"I1","key":"I1","index":0,"value":0.00013313913081942598,"value_is_finite":true,"success":true,"measurement_type":"FIND_WHEN","simulation_name":"#2 DC"},{"name":"IREF","key":"IREF","index":0,"value":0.0014335771885296525,"value_is_finite":true,"success":true,"measurement_type":"FIND_WHEN","simulation_name":"#2 DC"},{"name":"IOUT","key":"IOUT","index":0,"value":0.00013317599762071198,"value_is_finite":true,"success":true,"measurement_type":"FIND_WHEN","simulation_name":"#2 DC"}]} +{"id":"deepseek:00361_8a4e369064b2bcfb:6b779c036a233c45","source":"deepseek","example_id":"00361_8a4e369064b2bcfb","test_name":"test_test_361_opamp_filter_8a4e369064b2bcfb","netlist_hash":"6b779c036a233c45","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"Second-order Sallen-Key high-pass filter with Butterworth response.","pair_ids":["b90a8a42317e3f66","d0e7c5df0419ff0c","a8626f1e5486b05e","cba891df83d04c67","8269c98bb1793668"],"prompts":["Second-order Sallen-Key high-pass filter with Butterworth response.","Cutoff frequency of approximately 1 kHz.","Uses an ideal op-amp (E-source) with open-loop gain of 100,000.","Passband gain of about 4 dB (1.586) set by Rf and Rg.","Equal capacitors and resistors for Butterworth alignment."],"measurements":[{"name":"f3dB","key":"f3dB","index":0,"value":1004.9593907895262,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#2 AC"},{"name":"gain_10k","key":"gain_10k","index":0,"value":4.00551311948256,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"gain_100k","key":"gain_100k","index":0,"value":4.005926090787094,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"maxgain","key":"maxgain","index":0,"value":4.005926210767717,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#2 AC"}]} +{"id":"deepseek:01123_312479989d7d4ba2:e30fe37fafc54aba","source":"deepseek","example_id":"01123_312479989d7d4ba2","test_name":"test_test_1123_bjt_single_transistor_phase_shift_oscillator_312479989d7d4ba2","netlist_hash":"e30fe37fafc54aba","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Design a BJT-based phase-shift oscillator with a 12V supply and oscillating around 1 kHz. Use a generic NPN transistor model and include required passive components. Provide a transient simulation showing the oscillation.","pair_ids":["71d717a4c5abe3c4","92dd9f2c5ec60c8a","2c277ccb858e21df","d293822db36b83e1"],"prompts":["Design a BJT-based phase-shift oscillator with a 12V supply and oscillating around 1 kHz. Use a generic NPN transistor model and include required passive components. Provide a transient simulation showing the oscillation.","Create a SPICE netlist for a single-BJT phase-shift oscillator. The oscillator should produce a sine wave at approximately 1 kHz. Use a standard NPN transistor model, resistors, capacitors, and a 12 V DC supply. Run a transient analysis and include measurements for frequency and amplitude.","I need a phase-shift oscillator using one NPN BJT. Set the supply to 12 V, and design the RC network for an oscillation frequency near 1 kHz. Provide the full netlist with .TRAN analysis and .MEAS commands to verify frequency and peak-to-peak voltage.","Generate a SPICE simulation for a transistor phase-shift oscillator. The circuit should use a single BJT, three RC stages, and appropriate biasing. Simulate for 10 ms and measure the oscillation frequency and amplitude."],"measurements":[{"name":"vmin","key":"vmin","index":0,"value":0.13669580439976925,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 TRAN"},{"name":"vmax","key":"vmax","index":0,"value":11.739158521099682,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"},{"name":"vpp","key":"vpp","index":0,"value":11.602462716699913,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 TRAN"},{"name":"period","key":"period","index":0,"value":0.000970749578526628,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 TRAN"},{"name":"freq","key":"freq","index":0,"value":1030.13178900141,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00866_b8471fd9dbb79723:c74833de3118f7fc","source":"deepseek","example_id":"00866_b8471fd9dbb79723","test_name":"test_test_866_greinacher_voltage_quadrupler_b8471fd9dbb79723","netlist_hash":"c74833de3118f7fc","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Two-stage Greinacher voltage quadrupler with four diodes and four 100uF capacitors.","pair_ids":["6e3e3f3c07db1187","00b2b84f3620afad","f016b7d6f2776a08"],"prompts":["Two-stage Greinacher voltage quadrupler with four diodes and four 100uF capacitors.","Input is 10V peak 50Hz sine wave; load is 100k\u03a9 resistor.","Diode model uses IS=1e-9 and RS=0.1 for reduced forward voltage."],"measurements":[{"name":"vout_avg","key":"vout_avg","index":0,"value":38.316049212712514,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 tran"},{"name":"vout_ripple","key":"vout_ripple","index":0,"value":0.06896908897035559,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#1 tran"}]} +{"id":"deepseek:00283_6fe740a42b75bc70:58b79ae4295f10e5","source":"deepseek","example_id":"00283_6fe740a42b75bc70","test_name":"test_test_283_jfet_common_source_amplifier_6fe740a42b75bc70","netlist_hash":"58b79ae4295f10e5","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Create a SPICE netlist for a JFET common-source amplifier with self-bias. Use a 12V supply, N-channel JFET model, and measure the gain at low, mid, and high frequencies.","pair_ids":["1451361ab069b8ef","6daeca1ddea0f023","f205a6b1298cd362","4c76b63507cef43d"],"prompts":["Create a SPICE netlist for a JFET common-source amplifier with self-bias. Use a 12V supply, N-channel JFET model, and measure the gain at low, mid, and high frequencies.","Design a common-source JFET amplifier using an N-JFET. Set up DC biasing with a source resistor and AC coupling capacitors. Run .OP and .AC analyses and measure the midband gain.","Simulate a JFET common-source amplifier with VDD=12V, source bypass capacitor, and input/output coupling capacitors. Perform AC analysis from 10Hz to 1MHz and measure voltage gain in dB at 10kHz.","Give me a SPICE circuit of a JFET common-source amplifier stage. Include a voltage source for VDD, resistors for biasing, capacitors for coupling, and a JFET model. Use .OP and .AC, and extract the gain at 10Hz, 10kHz, and 1MHz."],"measurements":[{"name":"low_gain","key":"low_gain","index":0,"value":-10.453847174328262,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"high_gain","key":"high_gain","index":0,"value":19.469887473475758,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"mid_gain","key":"mid_gain","index":0,"value":19.468869714430962,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"}]} +{"id":"deepseek:00398_739944c002f4855d:765928324892f673","source":"deepseek","example_id":"00398_739944c002f4855d","test_name":"test_test_398_triangle_wave_generator_with_integrator_and_schmitt_trigger_739944c002f4855d","netlist_hash":"765928324892f673","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Triangle-wave generator built from an integrator and a Schmitt trigger.","pair_ids":["0b2f8ac649e4a32f","eeffc0ec924d1dd8","3f25fb97eea8602c","b76e080d40198d11"],"prompts":["Triangle-wave generator built from an integrator and a Schmitt trigger.","The integrator uses a high-gain voltage-controlled voltage source (E_int) to approach ideal op-amp behavior, with feedback capacitor Cint and input resistor Rint.","The Schmitt trigger uses a comparator (E_sch with a sharp TABLe) and positive feedback resistors Rin and Rf to establish hysteresis thresholds at \u00b17.5 V.","Oscillation frequency is set by the integrator time constant Rint*Cint and the hysteresis window, theoretically f = 1/(2*Rint*Cint) \u2248 500 Hz."],"measurements":[{"name":"v_tri_pp","key":"v_tri_pp","index":0,"value":14.98498508207254,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#1 TRAN"},{"name":"t2","key":"t2","index":0,"value":0.01215852399999752,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 TRAN"},{"name":"period","key":"period","index":0,"value":0.0019999999999985307,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 TRAN"},{"name":"t1","key":"t1","index":0,"value":0.010158523999998989,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:02214_99bc35ebcd966ec9:78bd3bbf539407a8","source":"deepseek","example_id":"02214_99bc35ebcd966ec9","test_name":"test_test_2214_single_slope_adc_front_end_99bc35ebcd966ec9","netlist_hash":"78bd3bbf539407a8","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Comparators are modeled with an ideal switch: when ramp > VIN, the switch closes, pulling the comparator output low.","pair_ids":["2ab3579394a86dbb","8d171b5f3984b72a","04c39b8c8a0ce2ca"],"prompts":["Comparators are modeled with an ideal switch: when ramp > VIN, the switch closes, pulling the comparator output low.","Ramp is a 0 to 5 V linear sweep with 99 us rise time; a VCVS buffers it to drive the switch and a small 1 pF capacitive load.","At VIN = 1.5 V, the comparator is expected to trip near 29.7 us; the measured ramp voltage at that time should match 1.5 V within tolerance."],"measurements":[{"name":"t_trigger","key":"t_trigger","index":0,"value":2.9524450000045013e-05,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 TRAN"},{"name":"v_ramp_at_trigger","key":"v_ramp_at_trigger","index":0,"value":1.4911338383861117,"value_is_finite":true,"success":true,"measurement_type":"FIND_WHEN","simulation_name":"#1 TRAN"},{"name":"error","key":"error","index":0,"value":0.008866161613888313,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:01042_0f29ae047c84dd75:a89deff576aa1393","source":"deepseek","example_id":"01042_0f29ae047c84dd75","test_name":"test_test_1042_two_transistor_bjt_current_limiter_0f29ae047c84dd75","netlist_hash":"a89deff576aa1393","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Design a current limiter using two BJTs that caps the output current at around 70mA.","pair_ids":["80b4f9a94c3c3195","e95745906fd7c31e","31153c41c6a14a57","aeeaf430bd80165b"],"prompts":["Design a current limiter using two BJTs that caps the output current at around 70mA.","Create a SPICE netlist for a two-transistor current limiting circuit with NPN BJTs.","Generate a measured simulation of a BJT current limiter that protects a load from overcurrent.","Simulate a simple current limit circuit using a sense resistor and two NPN transistors."],"measurements":[{"name":"I_LIM","key":"I_LIM","index":0,"value":0.06287095068718031,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"}]} +{"id":"deepseek:02225_bcd0ef77cae3dfa4:55bad168afb9cebe","source":"deepseek","example_id":"02225_bcd0ef77cae3dfa4","test_name":"test_test_2225_first_order_sigma_delta_modulator_bcd0ef77cae3dfa4","netlist_hash":"55bad168afb9cebe","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"First-order sigma-delta modulator with ideal op-amp integrator and smooth comparator.","pair_ids":["5641c21962bc67a6","f147ecb7ba7cab08","7ed14b6e06c931e1"],"prompts":["First-order sigma-delta modulator with ideal op-amp integrator and smooth comparator.","Input voltage toggles between -0.5V and 0.5V; the output bit stream average should match the input voltage.","Measurements verify that the average output tracks the input during two distinct intervals."],"measurements":[{"name":"avg_low","key":"avg_low","index":0,"value":-0.4999999979932526,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 TRAN"},{"name":"avg_high","key":"avg_high","index":0,"value":0.4999999979932526,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00489_b4238d823ea66b5b:517ca38892fb7fae","source":"deepseek","example_id":"00489_b4238d823ea66b5b","test_name":"test_test_489_series_rc_zobel_network_for_load_stabilization_b4238d823ea66b5b","netlist_hash":"517ca38892fb7fae","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Series RC Zobel network from output to ground stabilizes the amplifier load.","pair_ids":["7a4d76438c7703d1","dca8cb486ec70f59","e090770430dd1dd3"],"prompts":["Series RC Zobel network from output to ground stabilizes the amplifier load.","At low frequencies, the capacitor is open, so gain is set by the resistive divider: Vout/Vin = Rload/(Rload+Rs) = 100/110 \u2248 0.909.","The -3 dB frequency is determined by the Zobel RC and the source/load resistances."],"measurements":[{"name":"f_3db","key":"f_3db","index":0,"value":1061937.675633842,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 ac"},{"name":"vout_low","key":"vout_low","index":0,"value":0.9090909090902863,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 ac"}]} +{"id":"deepseek:00482_2b19779314e99e5c:a8fb5d9c75a326c1","source":"deepseek","example_id":"00482_2b19779314e99e5c","test_name":"test_test_482_rc_snubber_switching_load_2b19779314e99e5c","netlist_hash":"a8fb5d9c75a326c1","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"RC snubber circuit placed across a voltage-controlled switch to suppress inductive voltage spikes.","pair_ids":["7086e84ed0488efc","edabc6d4c3061fd5","8d62e2024af03bc8"],"prompts":["RC snubber circuit placed across a voltage-controlled switch to suppress inductive voltage spikes.","The switch opens at 60 \u00b5s, causing the load inductor to produce a transient overvoltage.","The snubber resistor and capacitor values are selected to limit the peak switch-node voltage to below 18 V."],"measurements":[{"name":"Vmax","key":"Vmax","index":0,"value":11.99880053107548,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"},{"name":"Vmin","key":"Vmin","index":0,"value":-0.07974696851300056,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:01356_7cb94a9dc232578e:e2f567b7b7794eb4","source":"deepseek","example_id":"01356_7cb94a9dc232578e","test_name":"test_test_1356_cmos_inverter_rf_7cb94a9dc232578e","netlist_hash":"e2f567b7b7794eb4","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"CMOS inverter with NMOS and PMOS transistors driving a 10pF capacitive load.","pair_ids":["61b7f6e550cad7a1","5388a40467ba8aae","89e07a5c6d926657"],"prompts":["CMOS inverter with NMOS and PMOS transistors driving a 10pF capacitive load.","Supply voltage is 5V, input is a pulse with extended high time to allow full output transitions.","Rise and fall times of the output voltage are measured using .MEASURE triggers."],"measurements":[{"name":"t_rise","key":"t_rise","index":0,"value":3.563566800245771e-08,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 TRAN"},{"name":"t_fall","key":"t_fall","index":0,"value":3.560850874403975e-08,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00179_cda039a73f2dc132:d6dc859cd53a8559","source":"deepseek","example_id":"00179_cda039a73f2dc132","test_name":"test_test_179_common_collector_emitter_follower_npn_buffer_cda039a73f2dc132","netlist_hash":"d6dc859cd53a8559","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Common-collector emitter follower NPN buffer with voltage divider bias (R1=7.5k, R2=10k, RE=1k), transistor modeled with BF=100.","pair_ids":["4823a00eea8ac2ce","ea21ea11fef51d16","2226d248b25b1a86"],"prompts":["Common-collector emitter follower NPN buffer with voltage divider bias (R1=7.5k, R2=10k, RE=1k), transistor modeled with BF=100.","AC analysis from 10 Hz to 1 MHz with 10 points per decade to evaluate gain flatness.","Measures AC voltage gain at 100 Hz, 1 kHz, and the maximum gain across the band to verify near-unity buffering."],"measurements":[{"name":"gain_100","key":"gain_100","index":0,"value":0.9928722728041156,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"gain_1k","key":"gain_1k","index":0,"value":0.9943447535101377,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"gain_max","key":"gain_max","index":0,"value":0.9943596493191006,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#2 AC"}]} +{"id":"deepseek:00400_3e585a59f481029b:7996d48186a9a191","source":"deepseek","example_id":"00400_3e585a59f481029b","test_name":"test_test_400_instrumentation_amplifier_3e585a59f481029b","netlist_hash":"7996d48186a9a191","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Instrumentation amplifier built from three behavioral op-amp models (E-sources).","pair_ids":["4d8773f7b5dc16f0","30c0e1b0b2e0a2a9","5cd75bf7df737322","820c8fe7c95ac222"],"prompts":["Instrumentation amplifier built from three behavioral op-amp models (E-sources).","Differential first stage with gain-setting resistor Rg provides high input impedance and gain of 21.","Difference amplifier stage with unity gain converts differential output to single-ended output with corrected polarity.","Capacitor C1 across the feedback of the output op-amp introduces a dominant pole, setting the -3dB bandwidth near 159Hz."],"measurements":[{"name":"gain_1Hz","key":"gain_1Hz","index":0,"value":20.99562230775142,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"gain_159","key":"gain_159","index":0,"value":15.309960967021263,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"}]} +{"id":"deepseek:00790_38fb077b95cf3f76:b7978755f0d86f88","source":"deepseek","example_id":"00790_38fb077b95cf3f76","test_name":"test_test_790_bridge_diode_polarity_protector_38fb077b95cf3f76","netlist_hash":"b7978755f0d86f88","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Bridge diode polarity protector using four diodes in a full-wave bridge configuration.","pair_ids":["34dbff2b173aa638","af783052cbe2b733","b04bf6b1862149fc"],"prompts":["Bridge diode polarity protector using four diodes in a full-wave bridge configuration.","Input voltage source can be connected either way; output is always positive.","Test verifies that output remains positive and within expected range for both polarities."],"measurements":[{"name":"i_d1","key":"i_d1","index":0,"value":0.010783441592969715,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"vout_neg","key":"vout_neg","index":0,"value":10.783441580578708,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"vout_pos","key":"vout_pos","index":0,"value":10.783441580578714,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00825_9d6ee28b6ef4c8aa:3a75b442f07d32a1","source":"deepseek","example_id":"00825_9d6ee28b6ef4c8aa","test_name":"test_test_825_diode_log_converter_9d6ee28b6ef4c8aa","netlist_hash":"3a75b442f07d32a1","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Logarithmic amplifier using an ideal op\u2011amp (E source with gain 100\u202f000) and a diode in the feedback path.","pair_ids":["e285c33dc004ea08","4514d5a654509ed5","2289a6f01ca48e7f"],"prompts":["Logarithmic amplifier using an ideal op\u2011amp (E source with gain 100\u202f000) and a diode in the feedback path.","Input voltage (0.1\u202fV to 10\u202fV) is converted to a current through R1 (1\u202fk\u03a9) and forced through the diode, yielding an output voltage proportional to the natural log of the input.","Diode model uses IS=1e-12 and RS=0 to match the ideal Vout = \u2013Vt\u202fln(Vin/(Is\u202fR)) with Vt\u224826\u202fmV."],"measurements":[{"name":"VOUT_AT_1V","key":"VOUT_AT_1V","index":0,"value":-0.5359853380524462,"value_is_finite":true,"success":true,"measurement_type":"FIND_WHEN","simulation_name":"#2 DC"},{"name":"VOUT_AT_10V","key":"VOUT_AT_10V","index":0,"value":-0.5955389293567032,"value_is_finite":true,"success":true,"measurement_type":"FIND_WHEN","simulation_name":"#2 DC"}]} +{"id":"deepseek:00346_3ab2cebab373a948:d7606062d7b55a75","source":"deepseek","example_id":"00346_3ab2cebab373a948","test_name":"test_test_346_opamp_differentiator_with_limit_resistor_3ab2cebab373a948","netlist_hash":"d7606062d7b55a75","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Op-amp differentiator with a series 1 k\u03a9 resistor at the input to limit high-frequency gain.","pair_ids":["33d6fa4f64403613","94a6b6e94471b1ab","534d53749f264b14","65345efd06ac4205"],"prompts":["Op-amp differentiator with a series 1 k\u03a9 resistor at the input to limit high-frequency gain.","Uses a 1 \u00b5F input capacitor, 1 k\u03a9 series resistor, and 10 k\u03a9 feedback resistor.","Ideal op-amp modeled with gain 100k and an output inversion stage to achieve a noninverting overall transfer function.","AC analysis from 10 Hz to 1 kHz, with measurements taken at exactly 50 Hz."],"measurements":[{"name":"gain_db","key":"gain_db","index":0,"value":9.531460938727816,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"mag_50","key":"mag_50","index":0,"value":2.996940478209362,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"phase","key":"phase","index":0,"value":1.2663837962564848,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:02132_bb0bb2d36f5e52bc:749bd49139808a2c","source":"deepseek","example_id":"02132_bb0bb2d36f5e52bc","test_name":"test_test_2132_photodiode_reverse_bias_tia_bb0bb2d36f5e52bc","netlist_hash":"749bd49139808a2c","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Photodiode D1 is reverse\u2011biased (anode at virtual ground node pd, cathode at 5 V bias).","pair_ids":["86eeedd95d689b19","d5ec8bf3bae7540c","aefd364e25c6044a","155816b047e30e94"],"prompts":["Photodiode D1 is reverse\u2011biased (anode at virtual ground node pd, cathode at 5 V bias).","Photocurrent is simulated by a pulse current source Iph that ramps from 0 to 10 \u00b5A.","The op\u2011amp (Eop) acts as a transimpedance amplifier with feedback resistor Rf = 10 k\u03a9.","Dark output is near 0 V; illuminated output equals \u2013Iph \u00b7 Rf = \u20130.1 V."],"measurements":[{"name":"vout_lit","key":"vout_lit","index":0,"value":-0.09999696473461242,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 TRAN"},{"name":"vout_dark","key":"vout_dark","index":0,"value":-5.999939678825752e-08,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 TRAN"}]} +{"id":"deepseek:02418_5962e5c92701d8dd:42ecea4e02fb464b","source":"deepseek","example_id":"02418_5962e5c92701d8dd","test_name":"test_test_2418_mosfet_common_gate_lna_5962e5c92701d8dd","netlist_hash":"42ecea4e02fb464b","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Common-gate low-noise amplifier using NMOS with W=100u, L=1u.","pair_ids":["ee6d0b888f90e542","2a30ceef2d183aa7","e75f3ac978f5a5db","df6cb657751437c3"],"prompts":["Common-gate low-noise amplifier using NMOS with W=100u, L=1u.","Biased with 1 mA DC current sink at source and gate divider from 3V supply.","Input coupled via 1uF capacitor to source; output taken at drain with 1.6k load resistor.","AC analysis from 10 kHz to 10 GHz measures voltage gain at 10 MHz."],"measurements":[{"name":"gain_at_10M","key":"gain_at_10M","index":0,"value":19.892316138109948,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"}]} +{"id":"deepseek:00746_ccbce8f13609dada:c45bb7b890d922a4","source":"deepseek","example_id":"00746_ccbce8f13609dada","test_name":"test_test_746_diode_clamp_neg_rail_ccbce8f13609dada","netlist_hash":"c45bb7b890d922a4","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"1kHz, \u00b110V square wave input through 1k\u03a9 resistor","pair_ids":["23c73c4f2c2de00a","2165e69373f54049","58a7e1571b67b3d4"],"prompts":["1kHz, \u00b110V square wave input through 1k\u03a9 resistor","Diode anode to -4.3V reference, cathode to output for negative clamping","Clamp voltage chosen to compensate diode forward drop (~0.7V) for ~-5V output floor"],"measurements":[{"name":"vmin_out","key":"vmin_out","index":0,"value":-4.942533989100036,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 TRAN"},{"name":"vmax_out","key":"vmax_out","index":0,"value":9.9999999856,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00805_75707730af03f6f1:e6f2c81f161f02c9","source":"deepseek","example_id":"00805_75707730af03f6f1","test_name":"test_test_805_balanced_diode_mixer_75707730af03f6f1","netlist_hash":"e6f2c81f161f02c9","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Balanced diode ring mixer with LO at 100MHz (0.5V amplitude each source, giving 1V differential) and RF at 10MHz (0.05V each, 0.1V differential).","pair_ids":["a49bfa18d28434ba","bad61ff299da7452","8c987273b1f7fb62"],"prompts":["Balanced diode ring mixer with LO at 100MHz (0.5V amplitude each source, giving 1V differential) and RF at 10MHz (0.05V each, 0.1V differential).","Four diodes arranged in a ring, with the IF output taken from the center tap of the RF input through a 50-ohm resistor.","Diodes modeled with IS=1e-9, N=1, and RS=10 to achieve adequate switching and realistic current limiting."],"measurements":[{"name":"IF_dc","key":"IF_dc","index":0,"value":-0.0001646094310467999,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 TRAN"},{"name":"IF_vpp","key":"IF_vpp","index":0,"value":0.07807731566590326,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:01471_84de30d26fa32d94:9a19967c7a42b292","source":"deepseek","example_id":"01471_84de30d26fa32d94","test_name":"test_test_1471_opamp_subtractor_84de30d26fa32d94","netlist_hash":"9a19967c7a42b292","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Difference amplifier using an ideal op-amp (E source) with gain 100k and four 10k resistors.","pair_ids":["f738a286b1f7646c","8e62af25131f2996","772766791ef756a4"],"prompts":["Difference amplifier using an ideal op-amp (E source) with gain 100k and four 10k resistors.","DC analysis verifies output equals difference of input DC voltages (3V-2V=1V).","AC analysis verifies gain of 0dB at 1kHz with AC input applied to one terminal."],"measurements":[{"name":"gain_at_1k","key":"gain_at_1k","index":0,"value":-0.0001737160556073316,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"vout_dc","key":"vout_dc","index":0,"value":0.9999800004006829,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 OP"}]} +{"id":"deepseek:00158_7147681a6adf246f:f0df661bab302053","source":"deepseek","example_id":"00158_7147681a6adf246f","test_name":"test_test_158_envelope_detector_for_am_demodulation_7147681a6adf246f","netlist_hash":"f0df661bab302053","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"The input is a 100kHz carrier with 20% amplitude modulation at 1kHz, offset by 0.2V to ensure diode conduction.","pair_ids":["266c0922317f8552","ccd930d7c071e7c0","dafb72f575851e1d","ba7d4ceb782c0dd4"],"prompts":["The input is a 100kHz carrier with 20% amplitude modulation at 1kHz, offset by 0.2V to ensure diode conduction.","The diode rectifies the signal, and the parallel RC network (R=50k, C=10n) filters the high-frequency carrier.","The time constant (0.5ms) is chosen to track the 1kHz envelope while smoothing the carrier, resulting in a demodulated signal with moderate ripple.","Measurements verify that the output envelope follows the modulation with acceptable ripple and a DC level within the expected range."],"measurements":[{"name":"VAVG","key":"VAVG","index":0,"value":0.5159441240968042,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 TRAN"},{"name":"VP2P","key":"VP2P","index":0,"value":0.45786130428466965,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 TRAN"},{"name":"VMIN","key":"VMIN","index":0,"value":0.42924519143985795,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 TRAN"},{"name":"VMAX","key":"VMAX","index":0,"value":0.8871064957245276,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:02467_3d0cf386fc8a72aa:9b7b06d950509ffa","source":"deepseek","example_id":"02467_3d0cf386fc8a72aa","test_name":"test_test_2467_tow_thomas_biquad_band_stop_filter_3d0cf386fc8a72aa","netlist_hash":"9b7b06d950509ffa","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Design a Tow-Thomas biquad band-stop filter with a notch at 1 kHz and Q=10.","pair_ids":["315ce1b1b735987b","928fe8c5db8f1d19","4192e508b2112a1e","c133e11a462be6e3"],"prompts":["Design a Tow-Thomas biquad band-stop filter with a notch at 1 kHz and Q=10.","Create a notch filter using a Tow-Thomas biquad topology, centering at 1 kHz with Q factor 10.","Build a band-stop filter around 1 kHz with a Tow-Thomas biquad, and verify notch depth and bandwidth.","Simulate a Tow-Thomas biquad band-stop filter that attenuates 1 kHz signals deeply, and measure its -3dB bandwidth."],"measurements":[{"name":"f_upper","key":"f_upper","index":0,"value":1054.4113402742198,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 AC"},{"name":"notch_min","key":"notch_min","index":0,"value":-34.39592011270267,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 AC"},{"name":"f_lower","key":"f_lower","index":0,"value":950.839428070233,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 AC"}]} +{"id":"deepseek:01380_ad9322af41996b97:2b5dad213afc04ac","source":"deepseek","example_id":"01380_ad9322af41996b97","test_name":"test_test_1380_cmos_current_starved_vco_ad9322af41996b97","netlist_hash":"2b5dad213afc04ac","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"Three-stage CMOS current-starved ring oscillator with tail NMOS transistors controlled by VCTRL to vary oscillation frequency.","pair_ids":["da99c075a2cba3bb","593a00fca2e7249e","34b91f1b0601b17a","c20bc79049e53170","960414babe965301"],"prompts":["Three-stage CMOS current-starved ring oscillator with tail NMOS transistors controlled by VCTRL to vary oscillation frequency.","Each inverter stage consists of a PMOS pull-up and NMOS pull-down with drain currents limited by a tail NMOS transistor between the NMOS source and ground.","Load capacitors at each output node determine the delay; increasing capacitance reduces frequency.","Initial conditions set out1 and out3 low, out2 high to force a startup transient.","The repair increased load capacitors from 1pF to 1.5pF and added a high-value resistor R1 to ground to satisfy the required R element without affecting behavior."],"measurements":[{"name":"period","key":"period","index":0,"value":6.127673167839172e-08,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 TRAN"},{"name":"freq","key":"freq","index":0,"value":16319408.24207885,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:01466_f30dfab147dd0c9c:68e9fc81bfcf67c2","source":"deepseek","example_id":"01466_f30dfab147dd0c9c","test_name":"test_test_1466_opamp_subtractor_f30dfab147dd0c9c","netlist_hash":"68e9fc81bfcf67c2","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Difference amplifier with op-amp modeled as VCVS (gain 100k) and four resistors to achieve nominal gain of 10.","pair_ids":["94309174a159a9f7","68cdd82499bcf92d","60ed366993420087"],"prompts":["Difference amplifier with op-amp modeled as VCVS (gain 100k) and four resistors to achieve nominal gain of 10.","DC sources: VIN1=0.2V, VIN2=0.3V; AC source on VIN1 only.","Performs .OP and .AC DEC 10 1 100k, then measures DC output and AC magnitude at 1kHz."],"measurements":[{"name":"VOUT_MAG","key":"VOUT_MAG","index":0,"value":9.998900120986692,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"VOUT_DC","key":"VOUT_DC","index":0,"value":0.9998900120917824,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 OP"}]} +{"id":"deepseek:02449_96d638f2349482e2:cb2b70ad3d00ea17","source":"deepseek","example_id":"02449_96d638f2349482e2","test_name":"test_test_2449_capacitive_sensor_charge_amplifier_96d638f2349482e2","netlist_hash":"cb2b70ad3d00ea17","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Charge amplifier for capacitive sensor with ideal op-amp (E-source gain=100k).","pair_ids":["679cf6a26f17f5f1","84110ff29bea9e84","4ec42fa52b3232e8"],"prompts":["Charge amplifier for capacitive sensor with ideal op-amp (E-source gain=100k).","Feedback capacitor 1pF, feedback resistor 1M\u03a9 for DC bias, sensor capacitance 10pF.","Input 0.1V step at 10\u03bcs; rise time set to 1ns to capture ideal -1V peak despite 1\u03bcs feedback time constant."],"measurements":[{"name":"vout_min","key":"vout_min","index":0,"value":-0.9993852982728338,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 TRAN"},{"name":"vout_expected","key":"vout_expected","index":0,"value":-1,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:02028_4b2226037e5ac783:5005fc894dda1682","source":"deepseek","example_id":"02028_4b2226037e5ac783","test_name":"test_test_2028_low_side_current_sense_amplifier_4b2226037e5ac783","netlist_hash":"5005fc894dda1682","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Design a low-side current-sense amplifier front end with a non-inverting op-amp to measure load current through a 0.1 ohm sense resistor and provide a 50x gain.","pair_ids":["f4c13b0b9257229c","83438b62c9267c3f","5ac63315993bd616"],"prompts":["Design a low-side current-sense amplifier front end with a non-inverting op-amp to measure load current through a 0.1 ohm sense resistor and provide a 50x gain.","Create a netlist for a current-sense amplifier stage that converts a 0 to 1A load current to a 0 to 5V output using a low-side sense resistor and a behavioral op-amp.","Provide a SPICE circuit for a low-side current monitor based on an E-source op-amp with feedback resistors, sweeping the load supply to vary current."],"measurements":[{"name":"Vsense_1A","key":"Vsense_1A","index":0,"value":0.09999999999999999,"value_is_finite":true,"success":true,"measurement_type":"FIND_WHEN","simulation_name":"#2 DC"},{"name":"Vout_1A","key":"Vout_1A","index":0,"value":4.9975012493778195,"value_is_finite":true,"success":true,"measurement_type":"FIND_WHEN","simulation_name":"#2 DC"}]} +{"id":"deepseek:02291_906407f6616c312b:a64b45af9cb54619","source":"deepseek","example_id":"02291_906407f6616c312b","test_name":"test_test_2291_bjt_gilbert_vga_906407f6616c312b","netlist_hash":"a64b45af9cb54619","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"The circuit is a BJT Gilbert cell with stepped tail current to demonstrate variable-gain operation.","pair_ids":["c70453aca1e087fc","51acb27b84e1dcd2","7edf6481166c51bf"],"prompts":["The circuit is a BJT Gilbert cell with stepped tail current to demonstrate variable-gain operation.","A sinusoidal differential input (0.1V amplitude) is applied to the lower differential pair, while a fixed DC control voltage (0.1V) steers the upper cross-coupled pairs.","As tail current increases from 0.5mA to 1mA, the transconductance and hence differential output amplitude increase."],"measurements":[{"name":"Vout_pp","key":"Vout_pp","index":0,"value":1.9851540855597705e-08,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#3 TRAN (IT=0.0005)"},{"name":"Vout_pp","key":"Vout_pp","index":1,"value":2.8092472348362207e-08,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#4 TRAN (IT=0.001)"}]} +{"id":"deepseek:00973_4fdc2dcd91f8782f:92a1201e89c735c5","source":"deepseek","example_id":"00973_4fdc2dcd91f8782f","test_name":"test_test_973_bjt_phase_splitter_4fdc2dcd91f8782f","netlist_hash":"92a1201e89c735c5","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"Design a BJT phase splitter with equal 10k collector and emitter resistors","pair_ids":["d7a65748dd7a9836","76a001882316373b","981223368e218818","d3335736b863ea5b","efb1c5960006a76c"],"prompts":["Design a BJT phase splitter with equal 10k collector and emitter resistors","Use voltage-divider bias (R1=100k, R2=27k) from a 12V supply","Input AC signal through 1\u00b5F coupling capacitor","Run .OP and .AC analyses to measure DC bias, AC gain, and phase","Verify collector DC voltage is higher than emitter, gains near 1, and phase difference near 180\u00b0"],"measurements":[{"name":"out_e_gain","key":"out_e_gain","index":0,"value":0.9857566156858771,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#2 AC"},{"name":"out_c_gain","key":"out_c_gain","index":0,"value":0.9767134203948256,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#2 AC"},{"name":"phase_e","key":"phase_e","index":0,"value":0.0076299558101791945,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"out_e_dc","key":"out_e_dc","index":0,"value":1.9078965857298344,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 OP"},{"name":"out_c_dc","key":"out_c_dc","index":0,"value":10.108524602222268,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 OP"},{"name":"phase_c","key":"phase_c","index":0,"value":-3.1339626977796144,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"}]} +{"id":"deepseek:00495_63b6086cd4e8db8b:90826ba0584971a2","source":"deepseek","example_id":"00495_63b6086cd4e8db8b","test_name":"test_test_495_series_rc_zobel_stabilization_63b6086cd4e8db8b","netlist_hash":"90826ba0584971a2","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Design a series RC Zobel network to stabilize an op-amp driving a capacitive load. Simulate the frequency response and verify that gain peaking is below 3dB.","pair_ids":["ca46d17a8830b30d","ac7fcd4aa7d7ddb1","cc9b89a613619596"],"prompts":["Design a series RC Zobel network to stabilize an op-amp driving a capacitive load. Simulate the frequency response and verify that gain peaking is below 3dB.","Create a SPICE netlist for a non-inverting amplifier with a capacitive load, and include a Zobel network to improve phase margin. Measure the peak gain ratio.","Simulate an op-amp circuit with output impedance driving a capacitive load, and stabilize it using a series RC network. Ensure the closed-loop gain remains flat."],"measurements":[{"name":"peak_ratio","key":"peak_ratio","index":0,"value":1,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 AC"},{"name":"max_gain","key":"max_gain","index":0,"value":9.004533783509006,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 AC"},{"name":"dc_gain","key":"dc_gain","index":0,"value":9.004533783509006,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:00713_9c1e9a8c2d67a3f9:c6bf3aa60ffd7e2a","source":"deepseek","example_id":"00713_9c1e9a8c2d67a3f9","test_name":"test_test_713_precision_halfwave_rectifier_eamp_9c1e9a8c2d67a3f9","netlist_hash":"c6bf3aa60ffd7e2a","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Non-inverting precision half-wave rectifier (super diode) using a high-gain behavioral op-amp (E-source) to eliminate diode forward drop.","pair_ids":["49675c24968491fd","00584d573627f4b3","3e913ac88e228477"],"prompts":["Non-inverting precision half-wave rectifier (super diode) using a high-gain behavioral op-amp (E-source) to eliminate diode forward drop.","The op-amp output connects to the diode anode; the diode cathode and inverting input share the output node, forcing Vout \u2248 Vin when Vin > 0.","For Vin < 0, the op-amp output saturates negative, diode is reverse biased, and the output is pulled near 0 V through the load resistor."],"measurements":[{"name":"vout_min","key":"vout_min","index":0,"value":-0.16017907009274193,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 tran"},{"name":"vout_avg","key":"vout_avg","index":0,"value":0.3115635113967812,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 tran"},{"name":"vout_max","key":"vout_max","index":0,"value":0.995965599504258,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 tran"}]} +{"id":"deepseek:01428_62a2781512e31e08:b87b441d42d498c1","source":"deepseek","example_id":"01428_62a2781512e31e08","test_name":"test_test_1428_eamp_follower_62a2781512e31e08","netlist_hash":"b87b441d42d498c1","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Voltage follower built with ideal VCVS (E source) and load resistor.","pair_ids":["351fb96659d12cc2","93020fe9067e0b08","bd04b371e8ce1b5f"],"prompts":["Voltage follower built with ideal VCVS (E source) and load resistor.","DC analysis confirms output equals input (unity gain).","AC analysis measures gain at two frequencies to verify flat response."],"measurements":[{"name":"GAIN_10K","key":"GAIN_10K","index":0,"value":-8.685846208858971e-05,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"GAIN_LOW","key":"GAIN_LOW","index":0,"value":-8.685846208858971e-05,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"VOUT_DC","key":"VOUT_DC","index":0,"value":0.999990000099999,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"}]} +{"id":"deepseek:02131_5867599be3f8d80a:c912a9a042cf708f","source":"deepseek","example_id":"02131_5867599be3f8d80a","test_name":"test_test_2131_photodiode_reverse_bias_5867599be3f8d80a","netlist_hash":"c912a9a042cf708f","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"Photodiode (D1) is reverse biased with VBIAS=5 V.","pair_ids":["95fcc1a518c6b9f2","eac33cf39e58439c","7ff8e0788f05707a","7d538390a9760368","876a8d860828b162"],"prompts":["Photodiode (D1) is reverse biased with VBIAS=5 V.","Photocurrent is modeled as a current pulse IPHOTO from cathode (vbias) to anode (pd), producing a negative output step.","The transimpedance amplifier uses an ideal op\u2011amp (E1, gain=100k) with feedback resistor R1=1 M\u03a9 and compensation capacitor C1=1 pF.","The output voltage V(out) = \u2013Iphoto \u00d7 R1, yielding about \u20131 V for a 1 \u00b5A pulse.","The rise time is set mainly by R1\u00b7C1 \u2248 1 \u00b5s, targeting ~2.2 \u00b5s (10\u201390%)."],"measurements":[{"name":"VOUT_OFF","key":"VOUT_OFF","index":0,"value":-0.0001171678465755452,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 TRAN"},{"name":"T_RISE_END","key":"T_RISE_END","index":0,"value":2.296902958310226e-06,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#2 TRAN"},{"name":"T_RISE_START","key":"T_RISE_START","index":0,"value":1.0635582482792071e-07,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#2 TRAN"},{"name":"VOUT_ON","key":"VOUT_ON","index":0,"value":-0.9998849124294288,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 TRAN"},{"name":"TRISE","key":"TRISE","index":0,"value":2.296902958310226e-06,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#2 TRAN"},{"name":"VOUT_DC","key":"VOUT_DC","index":0,"value":-5.999939814415963e-06,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 TRAN"}]} +{"id":"deepseek:00831_3496adae84ecdf8f:b84409a73892f7ab","source":"deepseek","example_id":"00831_3496adae84ecdf8f","test_name":"test_test_831_diode_log_converter_3496adae84ecdf8f","netlist_hash":"b84409a73892f7ab","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Logarithmic amplifier using ideal op-amp (VCVS) and diode in feedback.","pair_ids":["c3b03e6b08bff05f","d4df74452d4f8c0d","572083453f5a733e"],"prompts":["Logarithmic amplifier using ideal op-amp (VCVS) and diode in feedback.","Input voltage swept from 0.1V to 10V with R1=10k\u2126, diode IS=1e-14, N=1.05.","Output voltage is proportional to -ln(Vin/Is/R1), decreasing about -0.060V per decade."],"measurements":[{"name":"delta1","key":"delta1","index":0,"value":-0.06253273690229366,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 DC"},{"name":"vout_1","key":"vout_1","index":0,"value":-0.625321950381075,"value_is_finite":true,"success":true,"measurement_type":"FIND_WHEN","simulation_name":"#1 DC"},{"name":"vout_10","key":"vout_10","index":0,"value":-0.6878536699274413,"value_is_finite":true,"success":true,"measurement_type":"FIND_WHEN","simulation_name":"#1 DC"},{"name":"vout_01","key":"vout_01","index":0,"value":-0.5627892134787813,"value_is_finite":true,"success":true,"measurement_type":"FIND_WHEN","simulation_name":"#1 DC"},{"name":"delta2","key":"delta2","index":0,"value":-0.06253171954636638,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 DC"}]} +{"id":"deepseek:00456_8539a65a13178612:af5a5a09cdd56c9f","source":"deepseek","example_id":"00456_8539a65a13178612","test_name":"test_test_456_resistive_h_pad_attenuator_8539a65a13178612","netlist_hash":"af5a5a09cdd56c9f","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"H-pad attenuator with 6 dB voltage attenuation and 600 ohm characteristic impedance.","pair_ids":["222dc63b916cd3fe","bc13edf9819eb067","2e0cb2c68e1a3bde"],"prompts":["H-pad attenuator with 6 dB voltage attenuation and 600 ohm characteristic impedance.","Balanced differential topology using series resistors (225 ohm) and shunt resistors (1800 ohm).","Loaded with a 600 ohm resistor across the differential output."],"measurements":[{"name":"Vin_dB","key":"Vin_dB","index":0,"value":0,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"attenuation","key":"attenuation","index":0,"value":-6.020599913279625,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#2 AC"},{"name":"Vout_dB","key":"Vout_dB","index":0,"value":-6.020599913279625,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"}]} +{"id":"deepseek:00902_398229005449a8ac:44c5fa4c3f5b1562","source":"deepseek","example_id":"00902_398229005449a8ac","test_name":"test_test_902_collector_feedback_ce_amplifier_398229005449a8ac","netlist_hash":"44c5fa4c3f5b1562","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Collector-feedback biased common-emitter amplifier with emitter degeneration.","pair_ids":["cc4b3f4a4653bd01","47a4d404ee088957","66f3e07c3bde161f"],"prompts":["Collector-feedback biased common-emitter amplifier with emitter degeneration.","DC operating point simulated to confirm active\u2011region biasing with collector voltage near 6.6\u202fV.","AC sweep from 10\u202fHz to 100\u202fkHz measures midband gain around 9.7\u202fV/V (19.7\u202fdB)."],"measurements":[{"name":"gain_db","key":"gain_db","index":0,"value":18.77515246143354,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"vc","key":"vc","index":0,"value":6.4396008465207615,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 OP"},{"name":"vout_mag","key":"vout_mag","index":0,"value":8.684756034188522,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"}]} +{"id":"deepseek:01850_d3eb221435d5467f:c0e0e96fbafc0d38","source":"deepseek","example_id":"01850_d3eb221435d5467f","test_name":"test_test_1850_sawtooth_generator_d3eb221435d5467f","netlist_hash":"c0e0e96fbafc0d38","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"A constant 1 mA current source charges a 1 \u00b5F capacitor linearly, producing a ramp voltage of 1 V/ms.","pair_ids":["0ee428436713f4b9","fa95d5af6ee45d32","8a40e873afdaf372"],"prompts":["A constant 1 mA current source charges a 1 \u00b5F capacitor linearly, producing a ramp voltage of 1 V/ms.","Every 5 ms, a voltage\u2011controlled switch (controlled by a 5 V, 1 \u00b5s pulse) shunts the capacitor to ground, quickly resetting the voltage to near zero.","The resulting output waveform is a 200 Hz sawtooth with an amplitude of approximately 5 V."],"measurements":[{"name":"vpeak","key":"vpeak","index":0,"value":4.999125498366713,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 tran"},{"name":"period","key":"period","index":0,"value":0.004999848039589117,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 tran"},{"name":"trise","key":"trise","index":0,"value":0.004000100002967696,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 tran"},{"name":"freq","key":"freq","index":0,"value":200.00607860117665,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 tran"}]} +{"id":"deepseek:00124_a02c9e1b3e2573b7:0d36060b8fd7323d","source":"deepseek","example_id":"00124_a02c9e1b3e2573b7","test_name":"test_test_124_full_wave_bridge_rectifier_with_filter_cap_a02c9e1b3e2573b7","netlist_hash":"0d36060b8fd7323d","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Full-wave bridge rectifier with 14 V peak, 60 Hz AC input.","pair_ids":["8885109ca12eaea2","b9f8e5763c3e7d3f","8b77ec6145b368e0","5d84d198216e9850"],"prompts":["Full-wave bridge rectifier with 14 V peak, 60 Hz AC input.","Filter capacitor 100 \u00b5F and load resistor 1 k\u03a9 produce ~12 V average output.","Diode model DMOD with IS=1e-14, RS=1, BV=1000 for realistic forward drop.","Transient simulation runs 100 ms, measurements taken from 50 to 100 ms after settling."],"measurements":[{"name":"vout_min","key":"vout_min","index":0,"value":11.29182676602166,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 TRAN"},{"name":"vout_avg","key":"vout_avg","index":0,"value":12.137419070006965,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 TRAN"},{"name":"vout_ripple","key":"vout_ripple","index":0,"value":1.3714942698619357,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#1 TRAN"},{"name":"vout_max","key":"vout_max","index":0,"value":12.663321035883596,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00039_42147cdf1198ee36:8eddfd3da12c47fd","source":"deepseek","example_id":"00039_42147cdf1198ee36","test_name":"test_test_39_rc_delay_network_42147cdf1198ee36","netlist_hash":"8eddfd3da12c47fd","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Design a passive RC delay network with a high impedance load.","pair_ids":["13ebc875c2f5affb","dbfbdecca5695b55","e122feb3ee00798d"],"prompts":["Design a passive RC delay network with a high impedance load.","Create a simple RC low-pass filter that delays a pulse signal, using a large load resistor.","Simulate a resistor-capacitor delay circuit where the load resistance is very high, and measure the delay time."],"measurements":[{"name":"delay","key":"delay","index":0,"value":0.0007122963940828954,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 tran"},{"name":"vout_max","key":"vout_max","index":0,"value":4.920892723432907,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 tran"}]} +{"id":"deepseek:00763_b227f0f1eb8d9c30:ea4878db9b89679d","source":"deepseek","example_id":"00763_b227f0f1eb8d9c30","test_name":"test_test_763_window_diode_limiter_asymmetric_b227f0f1eb8d9c30","netlist_hash":"ea4878db9b89679d","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Asymmetric window diode clipper using two diodes and DC bias voltages.","pair_ids":["c2608ed9356a954a","24d95ce270b5257c","ad58600988dd3445"],"prompts":["Asymmetric window diode clipper using two diodes and DC bias voltages.","D1 (anode out, cathode posclamp) limits positive peaks; D2 (anode negclamp, cathode out) limits negative peaks.","Simulate 1kHz 5V amplitude sine input and use .MEAS to capture output extremes."],"measurements":[{"name":"out_min","key":"out_min","index":0,"value":-2.9999025864281053,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 TRAN"},{"name":"out_max","key":"out_max","index":0,"value":0.999835749313039,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00742_d769bae25ebd3509:c3e5a47a8dc18abe","source":"deepseek","example_id":"00742_d769bae25ebd3509","test_name":"test_test_742_diode_peak_detector_d769bae25ebd3509","netlist_hash":"c3e5a47a8dc18abe","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Diode peak detector rectifies sinusoidal input to a DC voltage with ripple.","pair_ids":["9eb918f9a60dbc22","41f9eb7a1ee2692f","7f28946cfd1ab831"],"prompts":["Diode peak detector rectifies sinusoidal input to a DC voltage with ripple.","Capacitor charges through diode to peak input minus diode drop, then slowly discharges through bleed resistor.","Simulation runs 10ms transient to observe charging and steady-state ripple."],"measurements":[{"name":"Vpeak","key":"Vpeak","index":0,"value":4.826915052756003,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"},{"name":"Vmin","key":"Vmin","index":0,"value":4.477140069604663,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00783_25696ed44f0d1ff5:a7be1ab6b50760c8","source":"deepseek","example_id":"00783_25696ed44f0d1ff5","test_name":"test_test_783_diode_steering_input_protection_25696ed44f0d1ff5","netlist_hash":"a7be1ab6b50760c8","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"Increased input pulse amplitude to \u00b110V to exceed the 5V supply and engage clamping.","pair_ids":["0bf9a3c9255da684","a136758790b7baa3","c8adeb3ce645289e","0bae2a0ce028b11d","9fc16122aa6ebcd2"],"prompts":["Increased input pulse amplitude to \u00b110V to exceed the 5V supply and engage clamping.","Used two diodes: one to VCC (5V) to clamp positive overvoltage, and one to GND to clamp negative transients.","Added 1k series resistor to limit current through the diodes.","Included a 10k load resistor representing the ADC input impedance.","Measured max and min of V(out) over 5\u00b5s to verify clamping levels."],"measurements":[{"name":"vmin","key":"vmin","index":0,"value":-0.7719249092319964,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 TRAN"},{"name":"vmax","key":"vmax","index":0,"value":5.748350033979037,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:01352_e7d88d7f1dc62586:f2718ae19a3afd56","source":"deepseek","example_id":"01352_e7d88d7f1dc62586","test_name":"test_test_1352_cmos_inverter_rise_fall_e7d88d7f1dc62586","netlist_hash":"f2718ae19a3afd56","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Basic CMOS inverter with PMOS (W=5u, L=1u) and NMOS (W=2u, L=1u) for balanced drive.","pair_ids":["c8f50ccee39b12b3","ddb02ee94dc256f5","9105acefcb556ebf","d7938f0d83072037"],"prompts":["Basic CMOS inverter with PMOS (W=5u, L=1u) and NMOS (W=2u, L=1u) for balanced drive.","1 pF capacitive load connected to output.","PULSE source provides 0\u20135V input with 1 ns rise/fall, 50 ns pulse width, 100 ns period.",".TRAN analysis for 200 ns with 0.1 ns resolution; all .MEAS statements capture critical timing metrics."],"measurements":[{"name":"t_rise","key":"t_rise","index":0,"value":3.4856819016923636e-09,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 TRAN"},{"name":"t_phl","key":"t_phl","index":0,"value":1.5378608858600377e-09,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 TRAN"},{"name":"t_plh","key":"t_plh","index":0,"value":1.5359721710658466e-09,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 TRAN"},{"name":"t_fall","key":"t_fall","index":0,"value":3.230720057460336e-09,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:01874_e8a5c9d50df75333:e8679998ee0b17dc","source":"deepseek","example_id":"01874_e8a5c9d50df75333","test_name":"test_test_1874_series_regulator_opamp_e8a5c9d50df75333","netlist_hash":"e8679998ee0b17dc","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Series pass linear regulator with op-amp error amplifier","pair_ids":["a1a19fb7cc78e3fd","49674cff78d6c353","37f19fb0ca1c9e43"],"prompts":["Series pass linear regulator with op-amp error amplifier","Output voltage is regulated to 10V for input >10.7V","Dropout occurs for low input voltages demonstrating line regulation"],"measurements":[{"name":"VOUT_12V","key":"VOUT_12V","index":0,"value":9.97639466261262,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"VOUT_8V","key":"VOUT_8V","index":0,"value":7.99635623379968,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"}]} +{"id":"deepseek:01212_c330dfc45581f09f:bbec58e8ac056159","source":"deepseek","example_id":"01212_c330dfc45581f09f","test_name":"test_test_1212_pmos_common_source_amplifier_c330dfc45581f09f","netlist_hash":"bbec58e8ac056159","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Construct PMOS CS amplifier with VDD=24 V, VIN=16 V, RL=5 k\u03a9, PMOS W/L=100u/100u model.","pair_ids":["c070d6ee300985a2","4f6ee284d45f3e5e","c5188b6f26b62db4","987f5dbdeabfd271"],"prompts":["Construct PMOS CS amplifier with VDD=24 V, VIN=16 V, RL=5 k\u03a9, PMOS W/L=100u/100u model.","Perform DC sweep of VIN from 15 V to 17 V and measure operating point parameters using .MEAS DC.","Run AC analysis from 1 Hz to 100 MHz and measure V(OUT) at 1 kHz.","Assert DC drain current ~2.45 mA, VGS and VDS negative, and gain between -4 and -3 V/V."],"measurements":[{"name":"I_DC","key":"I_DC","index":0,"value":0.0029124498067853405,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#3 DC"},{"name":"VDS_DC","key":"VDS_DC","index":0,"value":-9.437750966073299,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#3 DC"},{"name":"AVG","key":"AVG","index":0,"value":-3.3418815670005797,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"VGS_DC","key":"VGS_DC","index":0,"value":-8,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#3 DC"}]} +{"id":"deepseek:00998_8c655751585286af:f65723bd20e573c1","source":"deepseek","example_id":"00998_8c655751585286af","test_name":"test_test_998_bjt_differential_pair_large_signal_transfer_8c655751585286af","netlist_hash":"f65723bd20e573c1","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"DC sweep of differential pair with emitter degeneration","pair_ids":["c9f44977c7675624","ea13c3b63e81a61e","312673da34f5d5b7"],"prompts":["DC sweep of differential pair with emitter degeneration","Measures derivative of output voltage to compute small-signal gain","Sigmoidal transfer characteristic extends linear range"],"measurements":[{"name":"gain","key":"gain","index":0,"value":-16.386771847144193,"value_is_finite":true,"success":true,"measurement_type":"DERIV","simulation_name":"#1 DC"}]} +{"id":"deepseek:02288_d840ab5e43c2b411:9a2477c59929eb2b","source":"deepseek","example_id":"02288_d840ab5e43c2b411","test_name":"test_test_2288_gilbert_cell_variable_transconductance_amplifier_d840ab5e43c2b411","netlist_hash":"9a2477c59929eb2b","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Simulate a variable-gain amplifier using a BJT Gilbert cell. Apply a 1 kHz, 10 mV peak differential sine wave to the signal input and a 100 mV DC differential control voltage. Measure the differential output amplitude.","pair_ids":["df36d8d84d05d00b","43b199cd2e0497e7","d875ed3c9d6bf7f0"],"prompts":["Simulate a variable-gain amplifier using a BJT Gilbert cell. Apply a 1 kHz, 10 mV peak differential sine wave to the signal input and a 100 mV DC differential control voltage. Measure the differential output amplitude.","Design a transconductance amplifier based on the Gilbert multiplier with NPN bipolar transistors. Use \u00b110 V supplies, a 1 mA tail current, and 2 k\u03a9 load resistors. Perform a transient analysis and report the peak-to-peak output voltage for a given input and control.","Construct a VGA circuit using six BJTs in a Gilbert cell configuration. Set the control voltage to 100 mV differential and apply a small-signal sine wave at the lower differential pair. Run an operating point and transient simulation, then measure the gain."],"measurements":[{"name":"Vin_pp","key":"Vin_pp","index":0,"value":0.019999977260435814,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#2 TRAN"},{"name":"Vout_pp","key":"Vout_pp","index":0,"value":0.7176133654014087,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#2 TRAN"}]} +{"id":"deepseek:01281_210c6975e782eb77:a99541a525666226","source":"deepseek","example_id":"01281_210c6975e782eb77","test_name":"test_test_1281_mos_source_degenerated_current_mirror_210c6975e782eb77","netlist_hash":"a99541a525666226","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"NMOS current mirror with source degeneration resistors to increase output resistance.","pair_ids":["c86649ea2a380712","783204d79829e906","90d1a595083cd989"],"prompts":["NMOS current mirror with source degeneration resistors to increase output resistance.","The reference current is set to 100 \u00b5A by a DC current source, and transistor widths are scaled 2:1 to obtain approximately 200 \u00b5A output.","DC sweep of VOUT from 2.45 V to 2.55 V extracts Iout at two points, and output resistance is computed from \u0394V/\u0394I."],"measurements":[{"name":"Rout_calc","key":"Rout_calc","index":0,"value":1162296.109970366,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#2 DC"},{"name":"Iout_at2p5","key":"Iout_at2p5","index":0,"value":0.0002011126815078546,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"Iout_at2p6","key":"Iout_at2p6","index":0,"value":0.00020112128516738183,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"}]} +{"id":"deepseek:02234_6af77d0d2228362c:29b73f9c53e087cf","source":"deepseek","example_id":"02234_6af77d0d2228362c","test_name":"test_test_2234_sample_and_hold_clocked_switch_6af77d0d2228362c","netlist_hash":"29b73f9c53e087cf","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Basic sample-and-hold with ideal voltage-controlled switch and 500 kHz clock","pair_ids":["c6314a6a85f62221","fb2024de98ba80bd","ca20c46d04d30f5e"],"prompts":["Basic sample-and-hold with ideal voltage-controlled switch and 500 kHz clock","1 nF hold capacitor and 100 M\u03a9 load resistor for slow discharge","Measures holding accuracy by comparing tracked and held values"],"measurements":[{"name":"vin_sample","key":"vin_sample","index":0,"value":0.030782740621667373,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"vout_hold","key":"vout_hold","index":0,"value":0.03135946189719353,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"vdiff","key":"vdiff","index":0,"value":0.0005767212755261597,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00183_893dd49579e41683:f1fca991022e10a5","source":"deepseek","example_id":"00183_893dd49579e41683","test_name":"test_test_183_common_collector_npn_emitter_follower_buffer_893dd49579e41683","netlist_hash":"f1fca991022e10a5","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Common-collector NPN BJT emitter follower","pair_ids":["bcb8bb302fbb6b1e","a844f5e1e187a287","308c17b34e098ab8"],"prompts":["Common-collector NPN BJT emitter follower","DC operating point and AC small-signal analyses","Measure voltage gain at 1kHz"],"measurements":[{"name":"gain","key":"gain","index":0,"value":0.9904606616718749,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"}]} +{"id":"deepseek:00243_970e32e2d2a553e0:580c2008870f1255","source":"deepseek","example_id":"00243_970e32e2d2a553e0","test_name":"test_test_243_nmos_common_source_amplifier_970e32e2d2a553e0","netlist_hash":"580c2008870f1255","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"NMOS common-source amplifier with voltage divider biasing.","pair_ids":["f515ccbebeaecc3a","362923479e143e33","53c74f5a6c7767e4"],"prompts":["NMOS common-source amplifier with voltage divider biasing.","Uses coupling capacitors and a resistive load to measure small-signal voltage gain.","AC analysis extracts gain and phase at 1 kHz, confirming inverting operation."],"measurements":[{"name":"phase_1kHz","key":"phase_1kHz","index":0,"value":-3.1409081855755128,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"gain_1kHz","key":"gain_1kHz","index":0,"value":11.983323868279165,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"}]} +{"id":"deepseek:01494_a22a1ba0423a70d1:398810e1d4093910","source":"deepseek","example_id":"01494_a22a1ba0423a70d1","test_name":"test_test_1494_opamp_transimpedance_amplifier_photodiode_a22a1ba0423a70d1","netlist_hash":"398810e1d4093910","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Transimpedance amplifier converts photodiode current into voltage.","pair_ids":["b66f1a2542818284","51fc8822dd8d0f95","20861bdb35e134ae"],"prompts":["Transimpedance amplifier converts photodiode current into voltage.","Feedback resistor of 10k\u03a9 and 1pF compensation capacitor set gain and bandwidth.","DC analysis verifies zero output for zero input current."],"measurements":[{"name":"gain_mag","key":"gain_mag","index":0,"value":0.009999899981260978,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"vout_dc","key":"vout_dc","index":0,"value":0,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"}]} +{"id":"deepseek:00384_f620ead8baef0656:7c837210d798d8ce","source":"deepseek","example_id":"00384_f620ead8baef0656","test_name":"test_test_384_wien_bridge_oscillator_f620ead8baef0656","netlist_hash":"7c837210d798d8ce","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"Set up Wien bridge oscillator with behavioral op-amp and passive components.","pair_ids":["3a08f7276c9730fa","e061075b7b093534","5f898fc67e094d48","da5a16d766065d07","4a5cfddf76f8740a"],"prompts":["Set up Wien bridge oscillator with behavioral op-amp and passive components.","Apply initial condition to start oscillation.","Run transient simulation for 50ms.","Measure frequency from 10 zero crossings after 30ms.","Measure peak-to-peak amplitude after steady state."],"measurements":[{"name":"vmin","key":"vmin","index":0,"value":-15,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 TRAN"},{"name":"vmax","key":"vmax","index":0,"value":15,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"},{"name":"t2","key":"t2","index":0,"value":0.036823930209478245,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 TRAN"},{"name":"vpp","key":"vpp","index":0,"value":30,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 TRAN"},{"name":"t1","key":"t1","index":0,"value":0.030423957410075968,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 TRAN"},{"name":"freq","key":"freq","index":0,"value":1562.5066407991524,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:01382_e4154b5eb5cf11db:85051e627487b5e0","source":"deepseek","example_id":"01382_e4154b5eb5cf11db","test_name":"test_test_1382_cmos_current_starved_ring_oscillator_e4154b5eb5cf11db","netlist_hash":"85051e627487b5e0","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Create a netlist for a 3-stage CMOS current-starved ring oscillator. The circuit should use separate PMOS and NMOS current sources per inverter, driven by bias voltages Vnbias and Vpbias. Include load resistor Rload and 10pF capacitors on each output node. Run a transient simulation and measure the oscillation period and frequency.","pair_ids":["c00adc07f4184615","717a29111cc8d1f4","b6ede1783912d2b3"],"prompts":["Create a netlist for a 3-stage CMOS current-starved ring oscillator. The circuit should use separate PMOS and NMOS current sources per inverter, driven by bias voltages Vnbias and Vpbias. Include load resistor Rload and 10pF capacitors on each output node. Run a transient simulation and measure the oscillation period and frequency.","Design a voltage-controlled oscillator (VCO) based on a current-starved ring topology with three inverters. Use NMOS and PMOS transistors with level=1 models. The control voltages are Vnbias=2V and Vpbias=3V. Attach 10pF capacitors at each stage output. Perform .tran up to 200us and extract the oscillation frequency.","Simulate a tunable ring oscillator where the bias currents are set by two DC voltages (Vnbias, Vpbias). The netlist should include three current-starved inverters, a 100k load resistor on the final output, and 10pF capacitors on all nodes. Use .tran and .MEAS to find the frequency of oscillation."],"measurements":[{"name":"vmin","key":"vmin","index":0,"value":0.027137892727967645,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 TRAN"},{"name":"vmax","key":"vmax","index":0,"value":4.835908003410043,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"},{"name":"tper","key":"tper","index":0,"value":5.988309453107434e-07,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 TRAN"},{"name":"freq","key":"freq","index":0,"value":1669920.3804190236,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:01462_086a499e75a0c9ef:5331b8063a4c09be","source":"deepseek","example_id":"01462_086a499e75a0c9ef","test_name":"test_test_1462_opamp_averaging_amplifier_086a499e75a0c9ef","netlist_hash":"5331b8063a4c09be","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Four-input averaging amplifier using an ideal op-amp with finite gain of 100k.","pair_ids":["3656fb04e280ae31","2246eabbf4fd3894","340c90376ed35b76","c3f25934f745eee5"],"prompts":["Four-input averaging amplifier using an ideal op-amp with finite gain of 100k.","Resistors R1-R4 set input weighting; Rf sets output scaling to produce negative average.","Supply voltages \u00b115V are defined but not connected to the ideal source.","DC operating point and AC sweep are simulated."],"measurements":[{"name":"vout_ac","key":"vout_ac","index":0,"value":0.999980000399992,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"vout_dc","key":"vout_dc","index":0,"value":-2.49995000099998,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 OP"}]} +{"id":"deepseek:00425_142c84fad9ba6fc2:fed1274fdc1f03be","source":"deepseek","example_id":"00425_142c84fad9ba6fc2","test_name":"test_test_425_monostable_rc_comparator_142c84fad9ba6fc2","netlist_hash":"fed1274fdc1f03be","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Monostable multivibrator using a voltage-controlled switch as comparator with positive feedback and an RC timing network.","pair_ids":["5c340b5015b6aba2","f322f1a9e2666b93","c2367766c9ccfc7a"],"prompts":["Monostable multivibrator using a voltage-controlled switch as comparator with positive feedback and an RC timing network.","Output is normally low, triggered by a positive pulse applied to the non\u2011inverting input via a diode.","Timing capacitor charges through a resistor from the output, switching the comparator when the inverting input exceeds the positive feedback threshold."],"measurements":[{"name":"vout_high","key":"vout_high","index":0,"value":4.994908126972552,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"},{"name":"pw","key":"pw","index":0,"value":0.02796381568818564,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00351_9210d65b7f451cdc:cfaf391e5020254d","source":"deepseek","example_id":"00351_9210d65b7f451cdc","test_name":"test_test_351_op_amp_differentiator_with_input_limit_resistor_9210d65b7f451cdc","netlist_hash":"cfaf391e5020254d","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Practical differentiator using op-amp with input resistor to limit high-frequency noise gain.","pair_ids":["b51c26dcb177b2fd","3b84cf9930125c06","41c3bc48f41a24c6","fbd34efbc71968d2"],"prompts":["Practical differentiator using op-amp with input resistor to limit high-frequency noise gain.","Pole frequency fp = 1/(2\u03c0\u00b7R_limit\u00b7C) \u2248 1.59 kHz.","Below fp gain rises at +20 dB/dec; above fp gain limited to Rf/R_limit = 10 (20 dB).","Finite op-amp DC gain of 100k has negligible effect."],"measurements":[{"name":"mag_1k","key":"mag_1k","index":0,"value":14.51819454142056,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"mag_10k","key":"mag_10k","index":0,"value":19.89042816073863,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"}]} +{"id":"deepseek:02185_5fdc9294df8ad097:26e1f7a6a52d0c99","source":"deepseek","example_id":"02185_5fdc9294df8ad097","test_name":"test_test_2185_binary_weighted_resistor_dac_inverting_5fdc9294df8ad097","netlist_hash":"26e1f7a6a52d0c99","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Design a 4-bit digital-to-analog converter using binary-weighted resistors and an ideal op-amp in inverting summing configuration. The digital code is fixed at 1010 (MSB=1, LSB=0). Sweep the reference voltage Vref and measure the output.","pair_ids":["24bfea87a50f4504","35df853b38de3a3d","b9e25b539f2377dc"],"prompts":["Design a 4-bit digital-to-analog converter using binary-weighted resistors and an ideal op-amp in inverting summing configuration. The digital code is fixed at 1010 (MSB=1, LSB=0). Sweep the reference voltage Vref and measure the output.","Build a 4-bit DAC with resistor values 1k, 2k, 4k, 8k connected to an op-amp summer. Use behavioral E-source for the op-amp. Set high bits to Vref and low bits to 0, run a DC sweep of Vref from 0 to 5V.","Implement a weighted-resistor DAC with four digital inputs. The bits are represented by voltage sources equal to Vref (logic 1) or 0 (logic 0). Provide a DC analysis sweeping Vref and verify the output voltage for Vref=5V."],"measurements":[{"name":"vout_half","key":"vout_half","index":0,"value":-3.1249101588329333,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"vout_max","key":"vout_max","index":0,"value":-6.249820317665867,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"}]} +{"id":"deepseek:00924_2a4ad80a6a5c603c:0da8bceac8940c53","source":"deepseek","example_id":"00924_2a4ad80a6a5c603c","test_name":"test_test_924_common_emitter_amplifier_with_collector_to_base_feedback_2a4ad80a6a5c603c","netlist_hash":"0da8bceac8940c53","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Common-emitter amplifier with collector-to-base feedback for bias stabilization.","pair_ids":["e207b9900077989c","157389469d6b9bd2","1d9e49a9ab439db2"],"prompts":["Common-emitter amplifier with collector-to-base feedback for bias stabilization.","DC operating point analysis to determine Q-point.","AC analysis from 1kHz to 10MHz to evaluate gain and bandwidth performance."],"measurements":[{"name":"lf_gain","key":"lf_gain","index":0,"value":33.75054527183223,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"vc","key":"vc","index":0,"value":3.8639660187450033,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 OP"},{"name":"bw","key":"bw","index":0,"value":1739755.8538246222,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#2 AC"},{"name":"ic_supply","key":"ic_supply","index":0,"value":-0.0036981972642068173,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 OP"},{"name":"gain_max","key":"gain_max","index":0,"value":33.75114266402877,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#2 AC"}]} +{"id":"deepseek:02019_4de53419b149d3e7:96d4f6c3bc1faea1","source":"deepseek","example_id":"02019_4de53419b149d3e7","test_name":"test_test_2019_hot_swap_inrush_limiter_4de53419b149d3e7","netlist_hash":"96d4f6c3bc1faea1","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Hot-swap inrush limiter using N-MOSFET with gate RC network","pair_ids":["a523162c85796126","257989ed8ca379fe","9bc996ce2d860ecd"],"prompts":["Hot-swap inrush limiter using N-MOSFET with gate RC network","Increased Rg from 100k to 200k to reduce peak inrush current below 2A","Limits inrush to <2A while charging 100uF to 12V within 2.5ms"],"measurements":[{"name":"t_rise","key":"t_rise","index":0,"value":0,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 TRAN"},{"name":"Iinrush","key":"Iinrush","index":0,"value":1.5476512510167098,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"},{"name":"Vout_final","key":"Vout_final","index":0,"value":12,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:02013_d68d4af8f994b69b:d5f20ad8d28a18be","source":"deepseek","example_id":"02013_d68d4af8f994b69b","test_name":"test_test_2013_ideal_diode_oring_power_mux_d68d4af8f994b69b","netlist_hash":"d5f20ad8d28a18be","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Power ORing circuit emulates ideal diodes using N-channel MOSFETs with high\u2011gain feedback amplifiers.","pair_ids":["8a77af429117600f","4b8bea4a08c7e420","85cc9bbdadb9e1c7"],"prompts":["Power ORing circuit emulates ideal diodes using N-channel MOSFETs with high\u2011gain feedback amplifiers.","Amplifiers drive the MOSFET gates to minimize voltage drop when the respective input exceeds the output.","Reverse current blocking is inherent because the MOSFET body diode is oriented correctly and the gate drive only activates in the forward direction."],"measurements":[{"name":"vout1p5","key":"vout1p5","index":0,"value":4.999928051089203,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 TRAN"},{"name":"vout0p5","key":"vout0p5","index":0,"value":4.49993325805185,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 TRAN"},{"name":"i_v2_1p5","key":"i_v2_1p5","index":0,"value":-4.51e-12,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 TRAN"}]} +{"id":"deepseek:01518_64d5e9053d9960f9:3a872ef93a662758","source":"deepseek","example_id":"01518_64d5e9053d9960f9","test_name":"test_test_1518_opamp_v_to_i_grounded_load_64d5e9053d9960f9","netlist_hash":"3a872ef93a662758","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"The circuit is a voltage-to-current converter using an ideal op\u2011amp, four equal 1k resistors, and a grounded load.","pair_ids":["21ba8edfe5be8741","03f3e28c027bb6ff","f3868180f64924ee"],"prompts":["The circuit is a voltage-to-current converter using an ideal op\u2011amp, four equal 1k resistors, and a grounded load.","The input voltage sweeps from 0 to 2 V and is applied directly to the non\u2011inverting op\u2011amp input.","The load current is measured through a zero\u2011volt source Vsense and is proportional to the input voltage."],"measurements":[{"name":"I_LOAD_MIN","key":"I_LOAD_MIN","index":0,"value":0,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#2 DC"},{"name":"I_LOAD_AT1V","key":"I_LOAD_AT1V","index":0,"value":0.0009999800004152348,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"VOUT_AT1V","key":"VOUT_AT1V","index":0,"value":1.9999600008013658,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"I_LOAD_MAX","key":"I_LOAD_MAX","index":0,"value":0.0019999600008304697,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#2 DC"}]} +{"id":"deepseek:02218_25c8c5ba5f8e02b0:abc0ca65a3b18a1c","source":"deepseek","example_id":"02218_25c8c5ba5f8e02b0","test_name":"test_test_2218_sar_adc_sample_comparator_front_end_25c8c5ba5f8e02b0","netlist_hash":"abc0ca65a3b18a1c","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"The sample-and-hold uses a MOS switch (S1) controlled by a clock pulse (V_clk). During the high phase, the input (V_in) charges C_hold through R1 and the switch on\u2011resistance.","pair_ids":["1d8d738217c8241e","21dc6d6e90601001","266458c6762a1ca0","03bc5bd1edf0e0ac","025597fcc12e5183"],"prompts":["The sample-and-hold uses a MOS switch (S1) controlled by a clock pulse (V_clk). During the high phase, the input (V_in) charges C_hold through R1 and the switch on\u2011resistance.","A unity\u2011gain buffer (E_buf) isolates the held voltage from the comparator input.","The comparator (B_comp) is a behavioral voltage source that outputs +5\u202fV when the held voltage exceeds the DAC level, and \u20115\u202fV when it is less.","The DAC voltage (V_dac) steps through successive approximation levels (2.5\u202fV, 3.75\u202fV, 4.375\u202fV, 4.0625\u202fV) at 200\u202fns, 300\u202fns, 400\u202fns and 500\u202fns.","Measurement points at 160\u202fns confirm the hold capacitor is charged to ~4\u202fV, and at 200/300/400/500\u202fns the comparator output reflects the correct bit decisions."],"measurements":[{"name":"comp_bit0","key":"comp_bit0","index":0,"value":-5,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"comp_bit1","key":"comp_bit1","index":0,"value":-5,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"comp_bit2","key":"comp_bit2","index":0,"value":5,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"vhold","key":"vhold","index":0,"value":4.000000273991589,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"comp_msb","key":"comp_msb","index":0,"value":5,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:02087_7f703aa58d379834:ec67b12cf422cb0c","source":"deepseek","example_id":"02087_7f703aa58d379834","test_name":"test_test_2087_gilbert_cell_mixer_bjt_7f703aa58d379834","netlist_hash":"ec67b12cf422cb0c","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"Double-balanced Gilbert cell mixer using NPN BJTs","pair_ids":["3bc58fce86ba1c71","ea85d47de4b45abc","66a51ebe9ccf75ac","e0b738a9351bdbaf","c8a02cfdae6ac154"],"prompts":["Double-balanced Gilbert cell mixer using NPN BJTs","RF input: 10 MHz sinusoid, 100 mV amplitude single-ended, differential drive","LO input: 11 MHz sinusoid, 20 mV amplitude single-ended, differential drive","5 V supply, 2 mA tail current, 2 k\u03a9 load resistors, 1.2 k\u03a9 emitter degeneration","Mixer produces a 1 MHz IF output with reduced conversion gain via increased emitter degeneration"],"measurements":[{"name":"Vrf_pp","key":"Vrf_pp","index":0,"value":0.39858015663223956,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#2 TRAN"},{"name":"Vout_pp","key":"Vout_pp","index":0,"value":0.06723593388582572,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#2 TRAN"},{"name":"Vlo_pp","key":"Vlo_pp","index":0,"value":0.05546353603529397,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#2 TRAN"}]} +{"id":"deepseek:00592_41bed9523a06b060:4ff3af69372bd902","source":"deepseek","example_id":"00592_41bed9523a06b060","test_name":"test_test_592_lc_band_pass_ladder_filter_41bed9523a06b060","netlist_hash":"4ff3af69372bd902","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"LC band-pass ladder filter synthesized from 3rd-order Butterworth low-pass prototype.","pair_ids":["7cd6c1e9a77221d8","eacf72969382026a","ffc64b32c53d1f1b","78ba18b21ae5cc42","f94f583e363ae0d1"],"prompts":["LC band-pass ladder filter synthesized from 3rd-order Butterworth low-pass prototype.","Center frequency 10 kHz, bandwidth 1 kHz, 50-ohm terminations.","Series arms: L1, C1 and L3, C3; shunt arm: parallel L2, C2.","AC analysis with 200 points/decade from 100 Hz to 100 kHz.","Measurements of gain, bandwidth edges, and stopband rejection."],"measurements":[{"name":"stop_100k","key":"stop_100k","index":0,"value":-125.7586136038396,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"stop_1k","key":"stop_1k","index":0,"value":-125.75842753076549,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"bw_lower","key":"bw_lower","index":0,"value":9517.786983980955,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 AC"},{"name":"bw_upper","key":"bw_upper","index":0,"value":10506.74723554712,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 AC"},{"name":"max_gain","key":"max_gain","index":0,"value":-6.02060053047585,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 AC"}]} +{"id":"deepseek:00711_a74a077df06d70d6:a74a077df06d70d6","source":"deepseek","example_id":"00711_a74a077df06d70d6","test_name":"test_test_711_dual_polarity_fullwave_rectifier_a74a077df06d70d6","netlist_hash":"a74a077df06d70d6","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Design a dual-polarity full-wave rectifier using a center-tapped transformer, four diodes, and filter capacitors.","pair_ids":["0ef50ec72d67082b","9a8cb14da26983a6","c10f1e67bb40f7c4"],"prompts":["Design a dual-polarity full-wave rectifier using a center-tapped transformer, four diodes, and filter capacitors.","Create a SPICE netlist for a split supply that produces positive and negative DC voltages from a 12V peak AC input.","Simulate a full-wave rectified dual output power supply with 470uF capacitors and 1k load resistors, using 1N4148 diodes."],"measurements":[{"name":"v_pos_avg","key":"v_pos_avg","index":0,"value":11.2020939685545,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 TRAN"},{"name":"v_pos_ripple","key":"v_pos_ripple","index":0,"value":0.55212669140092,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#1 TRAN"},{"name":"v_neg_ripple","key":"v_neg_ripple","index":0,"value":0.5521266914008915,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#1 TRAN"},{"name":"v_neg_avg","key":"v_neg_avg","index":0,"value":-11.202093968554552,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00291_610ae57d6930f2a5:2d07cb3fc4910cea","source":"deepseek","example_id":"00291_610ae57d6930f2a5","test_name":"test_test_291_cmos_nand2_transient_610ae57d6930f2a5","netlist_hash":"2d07cb3fc4910cea","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"A CMOS NAND2 gate with NMOS pull-down series and PMOS pull-up parallel.","pair_ids":["91f6e0065dfd7579","03588df6aa97e72b","bc3ae493213030c5","439c6518f361fa5f"],"prompts":["A CMOS NAND2 gate with NMOS pull-down series and PMOS pull-up parallel.","Input B is held high (5V), input A is pulsed (0-5V, 10us period, 5us pulse).","Transient simulation runs for 20us with 1ns step.","Measurements capture propagation delay (tphl), rise time (trise), fall time (tfall), and static low output voltage."],"measurements":[{"name":"tphl","key":"tphl","index":0,"value":8.210241319265421e-10,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 TRAN"},{"name":"trise","key":"trise","index":0,"value":8.94964641368488e-10,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 TRAN"},{"name":"tfall","key":"tfall","index":0,"value":1.6143413698405917e-09,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 TRAN"},{"name":"vout_low","key":"vout_low","index":0,"value":5.533434055727305e-08,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:02268_6c6872edf9a5d4f1:033e8fd22cb1edb4","source":"deepseek","example_id":"02268_6c6872edf9a5d4f1","test_name":"test_test_2268_switched_cap_resistor_6c6872edf9a5d4f1","netlist_hash":"033e8fd22cb1edb4","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Switched-capacitor equivalent resistor using two non-overlapping clocks, capacitor C1, and ideal switches.","pair_ids":["9859d926ff190b49","f279ce3a7fc34214","a32ffba0d6c74d4c"],"prompts":["Switched-capacitor equivalent resistor using two non-overlapping clocks, capacitor C1, and ideal switches.","The average current drawn from the 1V source is approximately 10uA, giving an effective resistance of 100kOhm.","Measurement of negative average current avoids the unsupported '-I(VIN)' syntax by using '-1/I_in' in the R_eq calculation."],"measurements":[{"name":"I_in","key":"I_in","index":0,"value":-1.0009515741736229e-05,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 TRAN"},{"name":"R_eq","key":"R_eq","index":0,"value":99904.933045896,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00278_dea37df8268c1144:7e57a2ab4004c8e4","source":"deepseek","example_id":"00278_dea37df8268c1144","test_name":"test_test_278_nmos_cascode_current_mirror_dea37df8268c1144","netlist_hash":"7e57a2ab4004c8e4","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"NMOS cascode current mirror with reference branch set by a resistor.","pair_ids":["6125d64547b3acdc","7d016dad23a314a8","2b6357b4a471c74b"],"prompts":["NMOS cascode current mirror with reference branch set by a resistor.","Output current measured via zero-volt source Vmeas to get correct sign.","DC sweep of VOUT from 0 to 5V verifies mirror ratio and output resistance."],"measurements":[{"name":"Iref","key":"Iref","index":0,"value":0.0003581957203641581,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#2 DC"},{"name":"Iout_at_5v","key":"Iout_at_5v","index":0,"value":0.00036692690982825966,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"rout","key":"rout","index":0,"value":39267153.16647384,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#2 DC"},{"name":"mirror_ratio","key":"mirror_ratio","index":0,"value":1.024233277550726,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#2 DC"},{"name":"Iout_at_3v","key":"Iout_at_3v","index":0,"value":0.00036687597667322495,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"}]} +{"id":"deepseek:01350_08e3825a4af33ca8:f2ddf79bced15362","source":"deepseek","example_id":"01350_08e3825a4af33ca8","test_name":"test_test_1350_cmos_transmission_gate_s_h_08e3825a4af33ca8","netlist_hash":"f2ddf79bced15362","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"Design a CMOS transmission gate sample-and-hold circuit that captures a 500 kHz sinusoid under control of a 1 MHz clock, and measure the held output voltage and droop.","pair_ids":["d53dc86238cd7d40","70fedf133d5d76c8","abb2ac30cb571690","6000dc84ac226845","dcd1105861a16340"],"prompts":["Design a CMOS transmission gate sample-and-hold circuit that captures a 500 kHz sinusoid under control of a 1 MHz clock, and measure the held output voltage and droop.","Create a SPICE netlist for a sample-and-hold using a CMOS switch, a 100 pF hold capacitor, and a unity\u2011gain buffer. Drive the switch with complementary PULSE sources and perform a transient analysis to verify sampling performance.","Implement a basic analog sample-and-hold with NMOS/PMOS transmission gate, capture the sampled value at 1.5 \u00b5s, and compute the percentage droop after a 0.5 \u00b5s hold interval.","Build a CMOS analog switch that samples an input signal and holds it on a capacitor; include .MEAS statements to extract the sampled voltage and the hold\u2011end voltage, then calculate droop.","Simulate a transmission gate sample-and-hold with a high\u2011frequency input; verify that the output closely follows the input during the on phase and that droop during hold is negligible."],"measurements":[{"name":"droop","key":"droop","index":0,"value":0.0319244305353693,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 TRAN"},{"name":"v_sampled","key":"v_sampled","index":0,"value":1.5109489600783859,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"v_hold_end","key":"v_hold_end","index":0,"value":1.5104665982272008,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:01610_6d9758482bb4a056:7c8addc490dffead","source":"deepseek","example_id":"01610_6d9758482bb4a056","test_name":"test_test_1610_op_amp_zero_crossing_detector_6d9758482bb4a056","netlist_hash":"7c8addc490dffead","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":1,"representative_prompt":"The op-amp amplifies the input sine with high gain, and the diode clamping network limits the output to approximately \u00b15.6V, creating a square wave that changes at the zero crossings of the input signal.","pair_ids":["caab520f5e0c9f7d"],"prompts":["The op-amp amplifies the input sine with high gain, and the diode clamping network limits the output to approximately \u00b15.6V, creating a square wave that changes at the zero crossings of the input signal."],"measurements":[{"name":"t_rise","key":"t_rise","index":0,"value":3.979271506391498e-08,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 TRAN"},{"name":"high_time","key":"high_time","index":0,"value":0.0004999184255899834,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 TRAN"},{"name":"t_fall","key":"t_fall","index":0,"value":0.0004999582183050473,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00460_f582287ad47cc833:7dfcc186f7bbfa25","source":"deepseek","example_id":"00460_f582287ad47cc833","test_name":"test_test_460_balanced_h_pad_attenuator_f582287ad47cc833","netlist_hash":"7dfcc186f7bbfa25","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Design a SPICE netlist for a resistive H-pad attenuator intended for balanced 600-ohm lines. It should provide 10 dB attenuation. Include AC analysis and measure the voltage gain and input impedance at 1 kHz.","pair_ids":["31df6a9d1c71becb","11fa3800a7eb6d31","02692b1be13aa47c"],"prompts":["Design a SPICE netlist for a resistive H-pad attenuator intended for balanced 600-ohm lines. It should provide 10 dB attenuation. Include AC analysis and measure the voltage gain and input impedance at 1 kHz.","Create a balanced resistive attenuator using resistors only. Use an H-pad topology with characteristic impedance 600 ohms and loss 10 dB. Simulate with AC from 10 Hz to 100 kHz, and measure the attenuation and input impedance at 1 kHz.","Generate a measured netlist for an H-pad attenuator for balanced audio lines. The design should match 600 ohms and attenuate by 10 dB. Use AC simulation and provide .MEAS statements to verify performance at 1 kHz."],"measurements":[{"name":"v_src","key":"v_src","index":0,"value":2,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"v_out","key":"v_out","index":0,"value":0.3162090876393717,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"i_in","key":"i_in","index":0,"value":0.0016659673100747315,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"v_in","key":"v_in","index":0,"value":1.0004196139551613,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"atten_db","key":"atten_db","index":0,"value":-10.004157013815204,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#2 AC"},{"name":"zin","key":"zin","index":0,"value":600.503748125937,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#2 AC"},{"name":"overall_atten_db","key":"overall_atten_db","index":0,"value":-16.02111297106365,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#2 AC"}]} +{"id":"deepseek:01097_a10b4d9fb47ea69a:c4b6ee05d6878be3","source":"deepseek","example_id":"01097_a10b4d9fb47ea69a","test_name":"test_test_1097_bjt_class_b_push_pull_a10b4d9fb47ea69a","netlist_hash":"c4b6ee05d6878be3","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"Class-B BJT push-pull output stage with dual +/-10V supplies.","pair_ids":["e07009e1caa0221c","331b7112ece95fdf","37b7a36b571d6b43","fb2ea3d1e325447f","02d88be2bf945c2f"],"prompts":["Class-B BJT push-pull output stage with dual +/-10V supplies.","Input: 2V peak 1kHz sine, applied directly to bases.","Output: emitter follower with crossover distortion, swing limited to ~2.6Vpp due to Vbe drops.","Load: 1k resistor to ground.","Transient analysis ran for 5ms with measurements from 1ms to 5ms."],"measurements":[{"name":"Vout_pp","key":"Vout_pp","index":0,"value":2.6791303287771298,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#2 TRAN"},{"name":"Vout_avg","key":"Vout_avg","index":0,"value":4.5363952388622266e-17,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#2 TRAN"}]} +{"id":"deepseek:00877_08e7a8d60377a01e:6631dbfbe6d071c7","source":"deepseek","example_id":"00877_08e7a8d60377a01e","test_name":"test_test_877_diode_charge_pump_inverter_08e7a8d60377a01e","netlist_hash":"6631dbfbe6d071c7","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Design a circuit that generates a negative voltage from a 0-5V square wave clock using only diodes and capacitors. Use a charge pump topology.","pair_ids":["b314fd30e7499e22","852cc72a67e59631","bd89850758a2bfd0"],"prompts":["Design a circuit that generates a negative voltage from a 0-5V square wave clock using only diodes and capacitors. Use a charge pump topology.","Create a SPICE netlist for a diode-based negative voltage charge pump. The circuit should convert a 100kHz, 5V peak square wave into a stable negative output voltage.","Implement a charge pump inverter using two diodes and two capacitors. The input is a 5V pulsed source, and the output should be a negative DC voltage. Include a 1k load resistor."],"measurements":[{"name":"VOUT_RIPPLE","key":"VOUT_RIPPLE","index":0,"value":0.019062192891113217,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#1 TRAN"},{"name":"VOUT_AVG","key":"VOUT_AVG","index":0,"value":-3.80184088759708,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00328_4885957562a24eb1:073a62c9d648bfb2","source":"deepseek","example_id":"00328_4885957562a24eb1","test_name":"test_test_328_op_amp_difference_amplifier_4885957562a24eb1","netlist_hash":"073a62c9d648bfb2","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Difference amplifier using ideal op-amp E1 with gain 1e5","pair_ids":["e950569fc2c9e5e5","5070afd1e9eaf0a3","9f37b0352938dc27","5892eca3503757d0"],"prompts":["Difference amplifier using ideal op-amp E1 with gain 1e5","Resistors: R1=R3=10k, R2=R4=20k, yielding differential gain of 2","DC analysis: V2=1V, V1=0V to verify output = 2V","AC analysis: V1 AC=1, V2 AC=0, verify gain = 6.02 dB at 1 kHz"],"measurements":[{"name":"gain_1k","key":"gain_1k","index":0,"value":6.020339340499055,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"output_dc","key":"output_dc","index":0,"value":1.9999400017841253,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 OP"}]} +{"id":"deepseek:00348_703662b36b0b6947:291ae7dd146ea089","source":"deepseek","example_id":"00348_703662b36b0b6947","test_name":"test_test_348_op_amp_differentiator_with_input_limit_resistor_703662b36b0b6947","netlist_hash":"291ae7dd146ea089","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Design an op-amp differentiator with a series resistor at the input to limit high-frequency gain.","pair_ids":["3755acd7068df2a1","043ecf77dd5580a4","e8b5a515194a57de"],"prompts":["Design an op-amp differentiator with a series resistor at the input to limit high-frequency gain.","Provide a SPICE netlist for a practical differentiator circuit using an ideal op-amp and a high-frequency roll-off resistor.","Create an AC analysis circuit that demonstrates a band-limited differentiator with a single-pole response."],"measurements":[{"name":"gain1k","key":"gain1k","index":0,"value":14.518194541420561,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"gain10","key":"gain10","index":0,"value":-24.036660974795275,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"gain10k","key":"gain10k","index":0,"value":19.890428160738633,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"gain100","key":"gain100","index":0,"value":-4.053604411347312,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"}]} +{"id":"deepseek:00814_d47c7818d4418fdc:fcfe21d5b9890d58","source":"deepseek","example_id":"00814_d47c7818d4418fdc","test_name":"test_test_814_diode_frequency_doubler_d47c7818d4418fdc","netlist_hash":"fcfe21d5b9890d58","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Design a diode frequency doubler that takes a 5MHz sinusoidal input and produces a 10MHz output using a parallel LC tank tuned to the second harmonic. Include both transient and AC analyses, and add measurement statements to verify proper operation.","pair_ids":["d6cabf4ba36556f0","4d768e7cde55f44f","002b0749b51ec26a"],"prompts":["Design a diode frequency doubler that takes a 5MHz sinusoidal input and produces a 10MHz output using a parallel LC tank tuned to the second harmonic. Include both transient and AC analyses, and add measurement statements to verify proper operation.","Create a SPICE netlist for a frequency doubler using a half-wave rectifier followed by an LC tank resonant at twice the input frequency. The input is a 5MHz sine with 0.7V DC offset and 1.5V amplitude. Simulate transient and AC response and measure the output voltage.","Generate a measured netlist for an RF frequency doubler based on a diode and a tuned load. The circuit should accept a 5MHz sine wave and output a dominant 10MHz component through a parallel LC resonator. Perform transient analysis to observe the doubling effect and AC analysis to verify the tank resonance. Include .MEAS statements to quantify the output."],"measurements":[{"name":"vout_rms","key":"vout_rms","index":0,"value":0.6907269153855236,"value_is_finite":true,"success":true,"measurement_type":"RMS","simulation_name":"#3 TRAN"},{"name":"vout_max","key":"vout_max","index":0,"value":0.707013777096526,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#2 AC"}]} +{"id":"deepseek:02035_475ba533f0cf5067:ab7ef8676e1edf1d","source":"deepseek","example_id":"02035_475ba533f0cf5067","test_name":"test_test_2035_high_side_current_sense_amp_475ba533f0cf5067","netlist_hash":"ab7ef8676e1edf1d","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Design a high-side current sense amplifier using an op-amp and a shunt resistor to sense current from a 12V supply to a 10 ohm load. The amplifier should have a gain of 50 and output a ground-referenced voltage proportional to load current.","pair_ids":["fed4bffd288e31fb","2aefb6a708103569","7da77688bb167145"],"prompts":["Design a high-side current sense amplifier using an op-amp and a shunt resistor to sense current from a 12V supply to a 10 ohm load. The amplifier should have a gain of 50 and output a ground-referenced voltage proportional to load current.","Create a differential amplifier circuit that senses the voltage drop across a 0.1 ohm high-side shunt resistor and amplifies it by 50. Use a feedback capacitor for stability. Show SPICE netlist with .OP and .DC analyses.","Develop a front end for monitoring current in a 12V load. The circuit uses a 0.1 ohm sense resistor at the high side, and an op-amp configured as a differential amplifier with gain 50. Provide measurements of output voltage at 6V supply."],"measurements":[{"name":"vsens","key":"vsens","index":0,"value":0.059411709409912916,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"vout","key":"vout","index":0,"value":2.969071244238876,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"}]} +{"id":"deepseek:01675_dff514736a14ef9a:1895df6456edff50","source":"deepseek","example_id":"01675_dff514736a14ef9a","test_name":"test_test_1675_mfb_highpass_dff514736a14ef9a","netlist_hash":"1895df6456edff50","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"Second-order MFB Butterworth high-pass filter with nominal cutoff 1kHz","pair_ids":["0a6b359d06ab4f85","ebf1eb82ea0faa8c","2f77d61580d0e5a9","8c4b72f253ed66dd","7ec7516125aa9fe7"],"prompts":["Second-order MFB Butterworth high-pass filter with nominal cutoff 1kHz","Uses ideal op-amp modeled as an E-source (gain 100k)","Component values from Butterworth design procedure (C1=C2=C3=10nF, R1=7.5k, R2=33.2k)","AC analysis from 1Hz to 1MHz with 100 points per decade","Measurements confirm passband gain, cutoff frequency, and stopband roll-off"],"measurements":[{"name":"passband_gain","key":"passband_gain","index":0,"value":-0.0020882812634838072,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"stopband_gain","key":"stopband_gain","index":0,"value":-40.1507435707037,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"fcutoff","key":"fcutoff","index":0,"value":1018.3812469609788,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 AC"}]} +{"id":"deepseek:01163_dde083394c497dbc:ceb0e051ce3e7b02","source":"deepseek","example_id":"01163_dde083394c497dbc","test_name":"test_test_1163_bjt_bistable_latch_dde083394c497dbc","netlist_hash":"ceb0e051ce3e7b02","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"A bistable latch made from two NPN transistors cross-coupled with resistors and capacitors for pulse triggering.","pair_ids":["7e998c3f608809af","037747ebc7c38341","3bdf8d7f4d0c830b"],"prompts":["A bistable latch made from two NPN transistors cross-coupled with resistors and capacitors for pulse triggering.","Vset and Vreset provide negative pulses to toggle state via coupling capacitors.","Output V(out) is low when set, high when reset, holding between pulses."],"measurements":[{"name":"vout_reset","key":"vout_reset","index":0,"value":4.607189920963134,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"vout_set","key":"vout_set","index":0,"value":0.07266739056451098,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00293_984083c2130beb7c:2ffad10b86c6e09e","source":"deepseek","example_id":"00293_984083c2130beb7c","test_name":"test_test_293_cmos_nand2_984083c2130beb7c","netlist_hash":"2ffad10b86c6e09e","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"CMOS NAND2 gate with two PMOS in parallel to VDD and two NMOS in series to ground.","pair_ids":["24294a007ab9be04","2a79829c9912df3a","1f5ed0a0a644311b"],"prompts":["CMOS NAND2 gate with two PMOS in parallel to VDD and two NMOS in series to ground.","Transient simulation with PULSE sources on inputs A and B, 1pF load capacitor added to the output node.","Measurements capture the propagation delay and output high/low levels to verify correct NAND operation."],"measurements":[{"name":"vout_high","key":"vout_high","index":0,"value":4.999999998755507,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"vout_low","key":"vout_low","index":0,"value":0.00041215042198792834,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"td","key":"td","index":0,"value":1.3062410429145588e-09,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00341_6e695202065b3f32:307b480605e42657","source":"deepseek","example_id":"00341_6e695202065b3f32","test_name":"test_test_341_opamp_integrator_reset_6e695202065b3f32","netlist_hash":"307b480605e42657","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"This circuit implements an op-amp integrator with an ideal op-amp model.","pair_ids":["655851a3fdc2ded2","21b619e45593fc36","e148ef16459dd73b"],"prompts":["This circuit implements an op-amp integrator with an ideal op-amp model.","A reset switch across the capacitor is controlled by a pulse source, shorting the capacitor during the first 1 ms to set initial output to zero.","After reset, the input square wave causes the output to ramp linearly: negative slope for positive input, positive slope for negative input, and zero slope for zero input."],"measurements":[{"name":"Vout6ms","key":"Vout6ms","index":0,"value":-1.4999466760083249,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"Vout4ms","key":"Vout4ms","index":0,"value":-1.4999768777402072,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"Vout2ms","key":"Vout2ms","index":0,"value":-0.49999707723006004,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"Vout8ms","key":"Vout8ms","index":0,"value":-0.4999268105586641,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"slope6ms","key":"slope6ms","index":0,"value":500.0107003485391,"value_is_finite":true,"success":true,"measurement_type":"DERIV","simulation_name":"#1 TRAN"},{"name":"slope2ms","key":"slope2ms","index":0,"value":-499.9948148640311,"value_is_finite":true,"success":true,"measurement_type":"DERIV","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00875_0505d4a8eba64bc1:880cb5848a8ba990","source":"deepseek","example_id":"00875_0505d4a8eba64bc1","test_name":"test_test_875_diode_charge_pump_inverter_0505d4a8eba64bc1","netlist_hash":"880cb5848a8ba990","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Diode-based negative charge pump inverting 5V clock to negative output","pair_ids":["fde227e5bafceda8","c8209be749a06136","4a46f8c12b6b5b67"],"prompts":["Diode-based negative charge pump inverting 5V clock to negative output","Uses two Schottky-like diodes and two capacitors","Steady-state output around -3.8V with small ripple"],"measurements":[{"name":"vout_min","key":"vout_min","index":0,"value":-3.751811837925115,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 tran"},{"name":"vout_avg","key":"vout_avg","index":0,"value":-3.7381206791320936,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 tran"},{"name":"vout_ripple","key":"vout_ripple","index":0,"value":0.030963017929848125,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#1 tran"},{"name":"vout_max","key":"vout_max","index":0,"value":-3.720848819995267,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 tran"}]} +{"id":"deepseek:00512_7b6851689f8ebf81:ac5f1c72a82fe37c","source":"deepseek","example_id":"00512_7b6851689f8ebf81","test_name":"test_test_512_lead_lag_compensation_7b6851689f8ebf81","netlist_hash":"ac5f1c72a82fe37c","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"Passive lead-lag compensation network with separate lead and lag stages and an ideal buffer.","pair_ids":["1632dc4a1b660ec4","91b59f37adc1d926","b9e50da80be6112a","3ddf60912ebe1eea","77b0700ae623c379"],"prompts":["Passive lead-lag compensation network with separate lead and lag stages and an ideal buffer.","Lead stage: R1 in parallel with C1 from input to output, R2 from output to ground.","Lag stage: R3 in series from buffer output to output, R4 + C2 in shunt to ground.","The buffer is an ideal voltage-controlled voltage source (E1) with unity gain.","AC analysis from 10 Hz to 100 kHz with 100 points per decade."],"measurements":[{"name":"phase_1k","key":"phase_1k","index":0,"value":0.14673570665335403,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"gain_10k","key":"gain_10k","index":0,"value":-5.299324247403079,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"phase_10k","key":"phase_10k","index":0,"value":0.4590195490209394,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"min_phase","key":"min_phase","index":0,"value":-0.132888566388688,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 AC"},{"name":"max_phase","key":"max_phase","index":0,"value":0.48834608352938585,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 AC"},{"name":"gain_1k","key":"gain_1k","index":0,"value":-11.026061093397983,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:02363_0fd42d2817afe1cf:7d1fd90d8ac4b7b3","source":"deepseek","example_id":"02363_0fd42d2817afe1cf","test_name":"test_test_2363_rc_pulse_stretcher_0fd42d2817afe1cf","netlist_hash":"7d1fd90d8ac4b7b3","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"circuit stretches a short input pulse by charging a capacitor through a diode and discharging it slowly through a resistor","pair_ids":["29ee91a098022c10","2d564309f85ef9ed","ceaf112833f1451f"],"prompts":["circuit stretches a short input pulse by charging a capacitor through a diode and discharging it slowly through a resistor","the diode isolates the slow RC network from the fast input driver","the output pulse width is determined by the RC time constant"],"measurements":[{"name":"t_fall_in","key":"t_fall_in","index":0,"value":1.0149999999999998e-06,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 TRAN"},{"name":"t_rise_in","key":"t_rise_in","index":0,"value":5e-09,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 TRAN"},{"name":"t_rise_out","key":"t_rise_out","index":0,"value":7.752835146391907e-09,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 TRAN"},{"name":"t_fall_out","key":"t_fall_out","index":0,"value":5.6687068275329503e-05,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 TRAN"},{"name":"pw_in","key":"pw_in","index":0,"value":1.0149999999999998e-06,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 TRAN"},{"name":"pw_out","key":"pw_out","index":0,"value":5.6687068275329503e-05,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 TRAN"},{"name":"stretch_ratio","key":"stretch_ratio","index":0,"value":55.84932835007834,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:01686_642c9ee3591cdd73:729c3016dba80916","source":"deepseek","example_id":"01686_642c9ee3591cdd73","test_name":"test_test_1686_multiple_feedback_notch_filter_q_enhanced_twin_t_642c9ee3591cdd73","netlist_hash":"729c3016dba80916","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Active twin\u2011T notch filter using a behavioral op\u2011amp as voltage follower.","pair_ids":["2f2106026bd83dc7","678416f87c52e4a5","75e47c911a90f0c9"],"prompts":["Active twin\u2011T notch filter using a behavioral op\u2011amp as voltage follower.","Q enhanced to ~10 by positive feedback from output to the common node of the T via R5,R6.","Very low Thevenin impedance (\u22481\u202f\u03a9) at the feedback node ensures deep, stable notch."],"measurements":[{"name":"gain_10khz","key":"gain_10khz","index":0,"value":-0.0005334276296784862,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"gain_100hz","key":"gain_100hz","index":0,"value":-0.0005337264052433982,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"notch_att","key":"notch_att","index":0,"value":-45.89428795970172,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:01413_c8a04301fb9667eb:9ccdfb7c3187b940","source":"deepseek","example_id":"01413_c8a04301fb9667eb","test_name":"test_test_1413_jfet_current_source_c8a04301fb9667eb","netlist_hash":"9ccdfb7c3187b940","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"JFET constant current source with source degenerated resistor","pair_ids":["0c164f12edc76e9c","c971a2ecea8e5863","db111d27eec80342","a7cabb8e6acc8567"],"prompts":["JFET constant current source with source degenerated resistor","Gate grounded to set VGS fixed by source resistor drop","Sweeps VDD from 5V to 15V to evaluate current regulation","Current measured through load resistor RL with 2k\u03a9 drop"],"measurements":[{"name":"I_AVG","key":"I_AVG","index":0,"value":0.0010221266625876945,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#2 DC"},{"name":"I_MAX","key":"I_MAX","index":0,"value":0.0010371960500810964,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#2 DC"},{"name":"I_MIN","key":"I_MIN","index":0,"value":0.0010065296580344426,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#2 DC"}]} +{"id":"deepseek:00288_576e325f0514a942:0632fcb204975120","source":"deepseek","example_id":"00288_576e325f0514a942","test_name":"test_test_288_cmos_nand2_tran_576e325f0514a942","netlist_hash":"0632fcb204975120","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"CMOS NAND2 gate with 3.3V supply using simple MOSFET models.","pair_ids":["7d9f5e44a8d420de","82254bfe807d9c58","a4d4be3de43cdd95","470692b5c769a976"],"prompts":["CMOS NAND2 gate with 3.3V supply using simple MOSFET models.","Inputs A and B driven by PULSE sources to generate all four input combinations.","NMOS W/L=4u/0.35u, PMOS W/L=4u/0.35u, VTO=\u00b11V, KP=100u (NMOS) and 50u (PMOS).","Transient simulation from 0 to 80ns with measurements at 10n, 25n, 40n, and 55n."],"measurements":[{"name":"v_high","key":"v_high","index":0,"value":3.2999999939664395,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 tran"},{"name":"v_mid1","key":"v_mid1","index":0,"value":3.299999997481522,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 tran"},{"name":"v_mid2","key":"v_mid2","index":0,"value":3.2999999987407604,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 tran"},{"name":"v_low","key":"v_low","index":0,"value":5.036956511364559e-09,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 tran"}]} +{"id":"deepseek:01013_6c992f684a856294:efd99c3307eeca91","source":"deepseek","example_id":"01013_6c992f684a856294","test_name":"test_test_1013_widlar_bjt_current_source_6c992f684a856294","netlist_hash":"efd99c3307eeca91","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Widlar current source using two NPN BJTs and emitter degeneration resistor R2","pair_ids":["6a1e54bdc24ea700","3da2864801a7518e","899538d029e38360","ed45584c0d493d93"],"prompts":["Widlar current source using two NPN BJTs and emitter degeneration resistor R2","Reference current set by VCC, Rref, and Q1's Vbe; output current reduced by R2","Vbe reference and transistor matching produce small output current","Output current is approximately (Vt/R2)*ln(IREF/IOUT), around 10 \u00b5A"],"measurements":[{"name":"RATIO","key":"RATIO","index":0,"value":94.10398442836896,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#2 DC"},{"name":"IREF","key":"IREF","index":0,"value":0.0009249042582132267,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"IOUT","key":"IOUT","index":0,"value":9.828534507136144e-06,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"}]} +{"id":"deepseek:00171_d5ab383dc7201d82:89c046624d0c2de5","source":"deepseek","example_id":"00171_d5ab383dc7201d82","test_name":"test_test_171_common_emitter_npn_degeneration_d5ab383dc7201d82","netlist_hash":"89c046624d0c2de5","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"Common-emitter amplifier using NPN transistor with voltage-divider bias.","pair_ids":["8db2687204048ccf","b6f059aceb3fe8b9","cf8aeb5c4668f2b5","0462af8889328485","e9f91f5e8896d6f5"],"prompts":["Common-emitter amplifier using NPN transistor with voltage-divider bias.","Emitter degeneration provided by RE1=82\u03a9 (unbypassed) and RE2=1.3k\u03a9 (bypassed by CE).","DC operating point set to Vc~7.8V, Ve~1.6V for linear operation with VCC=15V.","AC gain determined by -(Rc||RL)/(re+RE1) \u2248 -36 V/V (31 dB) with 82\u03a9 unbypassed emitter resistance.","Frequency response measurements ensure midband flatness and proper roll-off at low frequencies."],"measurements":[{"name":"vc_at_15","key":"vc_at_15","index":0,"value":8.693716875038712,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#3 DC"},{"name":"ve_at_15","key":"ve_at_15","index":0,"value":1.4197477506696226,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#3 DC"},{"name":"gain_db_at_1k","key":"gain_db_at_1k","index":0,"value":30.857102541021206,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"gain_at_1k","key":"gain_at_1k","index":0,"value":34.902386787521635,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"}]} +{"id":"deepseek:00772_c53695dba2845ad5:089b39ee2c6c9b24","source":"deepseek","example_id":"00772_c53695dba2845ad5","test_name":"test_test_772_diode_and_gate_pullup_c53695dba2845ad5","netlist_hash":"089b39ee2c6c9b24","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Diode AND gate with pull-up resistor R1 (1k) to VCC (5V DC).","pair_ids":["9b616d26e433b1ba","20eb153de8ac7a3c","f3cd9ea305b48f51"],"prompts":["Diode AND gate with pull-up resistor R1 (1k) to VCC (5V DC).","Inputs A and B driven by PULSE sources with periods 5\u00b5s; VA toggles at 1\u00b5s, VB at 2\u00b5s.","Diodes D1 and D2 have anodes connected to the output and cathodes to the inputs, implementing AND logic."],"measurements":[{"name":"vout_high","key":"vout_high","index":0,"value":4.999999999999432,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"vout_low","key":"vout_low","index":0,"value":0.578856041346766,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:02174_2ed446751dce156b:1b323305ab450b53","source":"deepseek","example_id":"02174_2ed446751dce156b","test_name":"test_test_2174_electret_preamp_2ed446751dce156b","netlist_hash":"1b323305ab450b53","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Electret microphone biased via 2.2k pull-up to 5V supply.","pair_ids":["d176e8ba27e43004","e58c692ec7ec16e2","45617235925b424f","3544b383984f446c"],"prompts":["Electret microphone biased via 2.2k pull-up to 5V supply.","AC coupled to a common-emitter amplifier with voltage-divider bias.","Emitter bypass capacitor improves gain.","Output AC coupled to a 10k load."],"measurements":[{"name":"vc","key":"vc","index":0,"value":4.023750200290891,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#3 DC"},{"name":"ve","key":"ve","index":0,"value":0.9810171603721868,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#3 DC"},{"name":"vb","key":"vb","index":0,"value":1.6348842622461681,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#3 DC"},{"name":"gain_mid","key":"gain_mid","index":0,"value":30.61177987407916,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"}]} +{"id":"deepseek:02051_8cd94bfcbd2f71b1:ff6abc62a5030f31","source":"deepseek","example_id":"02051_8cd94bfcbd2f71b1","test_name":"test_test_2051_double_tuned_rf_amp_8cd94bfcbd2f71b1","netlist_hash":"ff6abc62a5030f31","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Two-stage common-emitter BJT amplifier with capacitive interstage coupling between two parallel LC tanks.","pair_ids":["8cc042ad1137c734","f40909bdf19ed6d8","ab360f856b18357a"],"prompts":["Two-stage common-emitter BJT amplifier with capacitive interstage coupling between two parallel LC tanks.","Double-tuned bandpass response centered at 10 MHz using identical tank components.","Biasing set for ~5V Vce on each transistor, AC coupled input and output."],"measurements":[{"name":"f_low","key":"f_low","index":0,"value":8450056.190645345,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#2 AC"},{"name":"f_high","key":"f_high","index":0,"value":10957348.074851023,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#2 AC"},{"name":"gain10m","key":"gain10m","index":0,"value":25.328352104880484,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"}]} +{"id":"deepseek:00732_921c15cce7fd142d:0643eeedb5104724","source":"deepseek","example_id":"00732_921c15cce7fd142d","test_name":"test_test_732_active_peak_detector_with_reset_921c15cce7fd142d","netlist_hash":"0643eeedb5104724","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Open\u2011loop peak detector with E1 (gain 100k) and diode D1 charges hold capacitor C1.","pair_ids":["61448bee706a5dfc","5d9226724f365890","b47e92f1eaff89f6","682a90c0469e2bfa"],"prompts":["Open\u2011loop peak detector with E1 (gain 100k) and diode D1 charges hold capacitor C1.","E2 buffers V(hold) to output; load resistor R1 (10 k\u03a9) provides finite droop.","Switch S1 (RON=10 \u03a9) resets hold to ground; S2 disconnects op\u2011amp from diode during reset to prevent fight.","Reset pulse VRESET (0\u21925 V at 5 ms) drives S1 ON and VRESET_N (5\u21920 V) simultaneously turns S2 OFF for 100 \u00b5s."],"measurements":[{"name":"max_post_reset","key":"max_post_reset","index":0,"value":4.9999341229052705,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"},{"name":"v_reset_discharge","key":"v_reset_discharge","index":0,"value":0.03261490172858469,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"max_pre_reset","key":"max_pre_reset","index":0,"value":4.999939741223563,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"},{"name":"v_at_6m","key":"v_at_6m","index":0,"value":4.639808779850894,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:01522_47364d558c2854a9:6fac57312e13554a","source":"deepseek","example_id":"01522_47364d558c2854a9","test_name":"test_test_1522_howland_current_pump_47364d558c2854a9","netlist_hash":"6fac57312e13554a","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Howland current pump using an ideal op\u2011amp (E source) with matched 1.1 k\u03a9 resistors sets output current \u2248 Vin/R1.","pair_ids":["dcb9ddafc1a72319","03f6252fbc52e575","6665f5bf2a148042"],"prompts":["Howland current pump using an ideal op\u2011amp (E source) with matched 1.1 k\u03a9 resistors sets output current \u2248 Vin/R1.","Positive feedback via R3 and R4 makes output current virtually independent of load resistance.","DC sweep of Vctrl varies Rload from 100 \u03a9 to 1 k\u03a9, while AC analysis checks frequency behaviour at 1 kHz."],"measurements":[{"name":"AC_GAIN","key":"AC_GAIN","index":0,"value":0.0009091123972013258,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 ac"},{"name":"I_1000","key":"I_1000","index":0,"value":0.0009091421516242584,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 dc"},{"name":"I_100","key":"I_100","index":0,"value":0.0009091123972013258,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 dc"},{"name":"I_500","key":"I_500","index":0,"value":0.0009091256211558335,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 dc"}]} +{"id":"deepseek:00140_86b77d9539c58885:982d9a483d1b1c81","source":"deepseek","example_id":"00140_86b77d9539c58885","test_name":"test_test_140_positive_diode_clamper_with_reference_86b77d9539c58885","netlist_hash":"982d9a483d1b1c81","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Positive diode clamper with a 3V DC reference in series with the diode.","pair_ids":["643f9d4d4bd90388","177de71844661b6b","6ab73491f56a6745"],"prompts":["Positive diode clamper with a 3V DC reference in series with the diode.","Input is a 1kHz, 5V amplitude sine wave; load is 100k\u03a9.","Simulation runs for 1 second to ensure steady-state, measurements taken after 0.5s."],"measurements":[{"name":"MAX_OUT","key":"MAX_OUT","index":0,"value":12.30960629924917,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"},{"name":"MIN_OUT","key":"MIN_OUT","index":0,"value":2.3207006188682175,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00907_ac2813bb1dbd3064:d0831a22f9a2d149","source":"deepseek","example_id":"00907_ac2813bb1dbd3064","test_name":"test_test_907_self_biased_ce_amp_ac2813bb1dbd3064","netlist_hash":"d0831a22f9a2d149","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Self-biased common-emitter amplifier using an NPN BJT with a voltage-divider bias network (R1, R2).","pair_ids":["164a33f7b64ea958","6ca2b7166481f829","284a4b4785e8a5e2"],"prompts":["Self-biased common-emitter amplifier using an NPN BJT with a voltage-divider bias network (R1, R2).","The emitter resistor is split into an unbypassed RE1 and a bypassed RE2 (via CE) to set moderate AC gain while stabilizing DC operating point.","Coupling capacitors CIN and COUT block DC from source and load while passing AC signals."],"measurements":[{"name":"gain_db","key":"gain_db","index":0,"value":17.657391097690144,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"Vc_dc","key":"Vc_dc","index":0,"value":4.292145688871503,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#3 DC"},{"name":"gain_linear","key":"gain_linear","index":0,"value":7.636063915663367,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"}]} +{"id":"deepseek:02209_0338dc0c2b573b42:b66ff781d0d0464c","source":"deepseek","example_id":"02209_0338dc0c2b573b42","test_name":"test_test_2209_single_slope_adc_0338dc0c2b573b42","netlist_hash":"b66ff781d0d0464c","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"A 10\u00b5A current source charges a 1nF capacitor to generate a linear ramp. A voltage-controlled switch resets the ramp periodically with a 1.67kHz pulse.","pair_ids":["c5563e722785c5e8","25a74a42749d3357","cd4794444f3cf40d"],"prompts":["A 10\u00b5A current source charges a 1nF capacitor to generate a linear ramp. A voltage-controlled switch resets the ramp periodically with a 1.67kHz pulse.","A high-gain op-amp (gain 1e6) acts as a comparator, comparing the ramp voltage with a 2.5V DC input. The output swings sharply when the ramp exceeds the input.","Measurements capture the conversion time (when the comparator output crosses 2.5V) and the corresponding ramp voltage to validate single-slope ADC operation."],"measurements":[{"name":"trig_time","key":"trig_time","index":0,"value":0.0002531968587199884,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 TRAN"},{"name":"ramp_at_trig","key":"ramp_at_trig","index":0,"value":2.5000025,"value_is_finite":true,"success":true,"measurement_type":"FIND_WHEN","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00479_5bfb82bfbf1e881f:ad0a5e9698c1b50d","source":"deepseek","example_id":"00479_5bfb82bfbf1e881f","test_name":"test_test_479_potentiometer_volume_control_5bfb82bfbf1e881f","netlist_hash":"ad0a5e9698c1b50d","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Passive potentiometer volume control with source impedance.","pair_ids":["22016c4ccf45f362","08eb0d7583b0748c","259b455d2d2f932c"],"prompts":["Passive potentiometer volume control with source impedance.","Models a 10k potentiometer set at midpoint as two 5k resistors, with 1k source impedance.","AC analysis verifies attenuation of about -6.85 dB due to the voltage divider."],"measurements":[{"name":"atten_db","key":"atten_db","index":0,"value":-6.848453616444125,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"vout","key":"vout","index":0,"value":0.4545454545454545,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"}]} +{"id":"deepseek:00155_cb801a608c03f638:ff23a9f92cfa4779","source":"deepseek","example_id":"00155_cb801a608c03f638","test_name":"test_test_155_envelope_detector_am_cb801a608c03f638","netlist_hash":"ff23a9f92cfa4779","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"Design an envelope detector circuit for AM demodulation using a series diode, a parallel capacitor, and a load resistor.","pair_ids":["88c7315d6ed0e972","633be61e5053f539","ba59b3bcc0aa5702","40c96e57ca240131","9bc9ef7b9c63fa67"],"prompts":["Design an envelope detector circuit for AM demodulation using a series diode, a parallel capacitor, and a load resistor.","Create a simple AM demodulator with a diode detector and measure the demodulated output amplitude.","Simulate an envelope detector for amplitude-modulated signals and verify the output follows the modulation envelope.","Build a diode-based AM envelope detector and perform transient analysis to check recovery of the modulation signal.","Set up an AM demodulation testbench with a diode peak detector and measure the demodulated peak-to-peak voltage."],"measurements":[{"name":"Vmax","key":"Vmax","index":0,"value":0.8712178384680267,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"},{"name":"Vdemod","key":"Vdemod","index":0,"value":0.8712178384680267,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 TRAN"},{"name":"Vmin","key":"Vmin","index":0,"value":0.005841915714937716,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00781_6df37d5c08d2c32e:e4249b99a3243f10","source":"deepseek","example_id":"00781_6df37d5c08d2c32e","test_name":"test_test_781_diode_input_protection_6df37d5c08d2c32e","netlist_hash":"e4249b99a3243f10","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Design a diode clamp circuit to protect an analog input from voltages outside 0-5V. Show the transient response to a pulse swinging from -2V to 7V.","pair_ids":["a70ab501b5068602","bab2b307b648c055","7d23675107b8d9db"],"prompts":["Design a diode clamp circuit to protect an analog input from voltages outside 0-5V. Show the transient response to a pulse swinging from -2V to 7V.","Create a SPICE netlist for an input protection network using two steering diodes to VCC and GND, with a series resistor and a PULSE source for transient analysis.","Simulate overvoltage protection with diodes: generate a measured transient testbench that clamps an input signal to safe levels within one diode drop of the rails."],"measurements":[{"name":"vmin","key":"vmin","index":0,"value":-0.6639341923435592,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 tran"},{"name":"vmax","key":"vmax","index":0,"value":5.663924210586617,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 tran"}]} +{"id":"deepseek:01291_ae05af9749117f4a:7b329f260d1f60ab","source":"deepseek","example_id":"01291_ae05af9749117f4a","test_name":"test_test_1291_wide_swing_cascode_nmos_current_mirror_ae05af9749117f4a","netlist_hash":"7b329f260d1f60ab","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Wide-swing cascode NMOS current mirror with 100\u00b5A reference current.","pair_ids":["34459495cbb55932","f5971cdda2d1835b","5f2206523882cc06"],"prompts":["Wide-swing cascode NMOS current mirror with 100\u00b5A reference current.","Uses NMOS model with VTO=0.7, KP=100u, LAMBDA=0.02.","Output current measured as i(v1) with V1 swept from 0 to 5V."],"measurements":[{"name":"iout_1","key":"iout_1","index":0,"value":-9.942807399162504e-05,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"iout_2p5","key":"iout_2p5","index":0,"value":-0.00010000180162089527,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"iout_5","key":"iout_5","index":0,"value":-0.00010002190299215354,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"iout_max","key":"iout_max","index":0,"value":-0.00010002190299215354,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#2 DC"}]} +{"id":"deepseek:02233_b248fcb93d7a9a46:affaa78bd2d18de8","source":"deepseek","example_id":"02233_b248fcb93d7a9a46","test_name":"test_test_2233_sample_and_hold_b248fcb93d7a9a46","netlist_hash":"affaa78bd2d18de8","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Sample-and-hold circuit with DC input, clocked switch, hold capacitor, and unity-gain buffer.","pair_ids":["fa7d58df815c76b0","66db32dc86a5681e","87bb16b86ed73e92"],"prompts":["Sample-and-hold circuit with DC input, clocked switch, hold capacitor, and unity-gain buffer.","The switch uses low on-resistance (1 ohm) and very high off-resistance (1e12 ohm) to minimize droop.","During clock high, the output follows the input; during clock low, the output holds the last sampled value."],"measurements":[{"name":"v_sampled","key":"v_sampled","index":0,"value":0.9999999999999984,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"v_held","key":"v_held","index":0,"value":0.9999999999999986,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:02091_9d9c63de8d6f0ee7:8fe593874b645d06","source":"deepseek","example_id":"02091_9d9c63de8d6f0ee7","test_name":"test_test_2091_cmos_double_balanced_switching_mixer_9d9c63de8d6f0ee7","netlist_hash":"8fe593874b645d06","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"CMOS double-balanced switching mixer with differential LO drive.","pair_ids":["668b0a3a97b20a1f","ec8af750e50211e0","4e30fd53e0e73771"],"prompts":["CMOS double-balanced switching mixer with differential LO drive.","Uses NMOS transistors, VDD=5 V, 1 GHz LO square waves, 1.01 GHz RF sinusoidal input (0.05 V amplitude, differential).","Added a 0.5 pF differential capacitor to filter high-frequency mixing products and ensure IF measurement accuracy."],"measurements":[{"name":"if_pp","key":"if_pp","index":0,"value":0.5762759323284721,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00112_9c118e20536da72b:e46d030ce14738fa","source":"deepseek","example_id":"00112_9c118e20536da72b","test_name":"test_test_112_half_wave_rectifier_9c118e20536da72b","netlist_hash":"e46d030ce14738fa","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"Design a half-wave rectifier circuit using a 1N4148 diode, 10uF smoothing capacitor, and 1k load resistor. Supply a 10V peak 1kHz sine wave. Simulate transient response and measure ripple and average output voltage.","pair_ids":["f687de263949b99d","7599a638578b75b9","a3bc3088cf492fb5","c90abb4390d08e15","6380a8fd5cc7132e"],"prompts":["Design a half-wave rectifier circuit using a 1N4148 diode, 10uF smoothing capacitor, and 1k load resistor. Supply a 10V peak 1kHz sine wave. Simulate transient response and measure ripple and average output voltage.","Create a SPICE netlist for a half-wave rectifier with a sinusoidal input of 10V amplitude at 1kHz, a diode, a 10uF capacitor, and a 1kOhm resistor. Run a transient analysis and calculate the average output voltage and peak-to-peak ripple.","I need a half-wave rectifier simulation: 10V peak 1kHz sine source, D1N4148, C=10uF, R=1k. Measure average output and ripple voltage after steady state.","Simulate a simple half-wave rectifier with resistive load and a filter capacitor. Use VIN=SIN(0 10 1k), D1N4148, 10uF, 1k. Run TRAN and measure Vout_avg and Vripple.","Please generate a SPICE netlist for a half-wave rectifier circuit: 10Vpeak, 1kHz sine source, ideal diode, smoothing capacitor 10uF, load 1k. Transient analysis, get average output voltage and ripple voltage."],"measurements":[{"name":"Vripple","key":"Vripple","index":0,"value":1.3995356452466865,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#1 TRAN"},{"name":"Vout_avg","key":"Vout_avg","index":0,"value":9.443878618117848,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:01950_2fde03c323794b08:8e51174a16764c9e","source":"deepseek","example_id":"01950_2fde03c323794b08","test_name":"test_test_1950_inverting_buck_boost_open_loop_2fde03c323794b08","netlist_hash":"8e51174a16764c9e","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Open-loop inverting buck-boost converter with 12 V input, 50 kHz switching frequency, 50% duty cycle, 100 uH inductor, diode, 100 uF output capacitor, and 10 ohm load.","pair_ids":["5463c5e6eb8801c8","26ff30843e067840","6fb36f3275e424bc"],"prompts":["Open-loop inverting buck-boost converter with 12 V input, 50 kHz switching frequency, 50% duty cycle, 100 uH inductor, diode, 100 uF output capacitor, and 10 ohm load.","Simulation extended to 20 ms to allow output voltage to settle; measurements taken from 10 ms to 20 ms for steady-state values.","Corrected input power measurement sign to ensure positive power and valid efficiency calculation."],"measurements":[{"name":"avg_out_power","key":"avg_out_power","index":0,"value":12.642084343086315,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 TRAN"},{"name":"efficiency","key":"efficiency","index":0,"value":0.9351127510311623,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 TRAN"},{"name":"avg_in_power","key":"avg_in_power","index":0,"value":13.519315536170057,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 TRAN"},{"name":"Vout_ripple","key":"Vout_ripple","index":0,"value":0.11241758558849035,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#1 TRAN"},{"name":"Vout_avg","key":"Vout_avg","index":0,"value":-11.2436470131434,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00682_363a09b529bbbe6d:7f11b24f228ef23a","source":"deepseek","example_id":"00682_363a09b529bbbe6d","test_name":"test_test_682_band_pass_l_match_impedance_transformer_363a09b529bbbe6d","netlist_hash":"7f11b24f228ef23a","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Bandpass L-match impedance transformer converting a 50 \u03a9 source to a 25 \u03a9 load at 10 MHz.","pair_ids":["3abdbbcfaed152d9","0978c47b5e9725ef","f28031d067df177d"],"prompts":["Bandpass L-match impedance transformer converting a 50 \u03a9 source to a 25 \u03a9 load at 10 MHz.","Cascades a low-pass section (shunt capacitor, series inductor) and a high-pass section (shunt inductor, series capacitor) to achieve both impedance matching and bandpass filtering.","The design uses an intermediate impedance of 35.4 \u03a9 and quality factor Q=0.6436 for both sections, ensuring a symmetric bandpass response."],"measurements":[{"name":"vout_db_max","key":"vout_db_max","index":0,"value":-9.030899893600289,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 AC"},{"name":"vout_db_10meg","key":"vout_db_10meg","index":0,"value":-9.030899893600289,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:02335_0c33f4bf874ecbc5:4029708957c14121","source":"deepseek","example_id":"02335_0c33f4bf874ecbc5","test_name":"test_test_2335_boost_converter_open_loop_0c33f4bf874ecbc5","netlist_hash":"4029708957c14121","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Open-loop boost converter with NMOS switch driven by 100kHz PWM.","pair_ids":["6f26672fc9c24010","cd8781b242a2a4fb","f9b9f94de571e4b6"],"prompts":["Open-loop boost converter with NMOS switch driven by 100kHz PWM.","Measures steady-state average output voltage and ripple.","Uses large output capacitance to minimize ripple."],"measurements":[{"name":"Vout_ripple","key":"Vout_ripple","index":0,"value":0.35074208618982183,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#1 TRAN"},{"name":"Vout_avg","key":"Vout_avg","index":0,"value":9.281679656069745,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00044_246f62bfcc4a5a97:099b98472db6e18e","source":"deepseek","example_id":"00044_246f62bfcc4a5a97","test_name":"test_test_44_two_pole_rc_ladder_lp_246f62bfcc4a5a97","netlist_hash":"099b98472db6e18e","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Two-pole passive RC ladder low-pass filter","pair_ids":["3f472d16e28077ee","c0601ff1b01fd2ee","f23d940bf39aa630"],"prompts":["Two-pole passive RC ladder low-pass filter","Uses two cascaded RC stages with resistor values 2.2k and 4.7k, capacitors 10nF and 1nF","AC analysis sweeps from 10 Hz to 1 MHz to characterize frequency response"],"measurements":[{"name":"f3db","key":"f3db","index":0,"value":6252.263350188126,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 ac"},{"name":"g_100k","key":"g_100k","index":0,"value":-32.822627821596086,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 ac"},{"name":"g0","key":"g0","index":0,"value":-1.077423951767958e-05,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 ac"}]} +{"id":"deepseek:00780_216a6ed8de8c3eb2:071673a6b8391023","source":"deepseek","example_id":"00780_216a6ed8de8c3eb2","test_name":"test_test_780_diode_steering_input_protection_216a6ed8de8c3eb2","netlist_hash":"071673a6b8391023","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"A diode steering network clamps the protected node PROT to safe voltage levels.","pair_ids":["dfd8f131288908e7","83a55894449987f7","9184604396f672d9","3436191a70e615ae"],"prompts":["A diode steering network clamps the protected node PROT to safe voltage levels.","D1 connects PROT to VDD (3.3V), clamping positive overvoltages to about 4V.","D2 connects PROT to ground, clamping negative pulses to about -0.7V.","An input pulse swings from -10V to +10V to test both clamping directions."],"measurements":[{"name":"Vmax","key":"Vmax","index":0,"value":4.007731350610575,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"},{"name":"Vmin","key":"Vmin","index":0,"value":-0.7220013971190491,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:02191_b60aede5d95184d3:a3fe55a1708ca1dd","source":"deepseek","example_id":"02191_b60aede5d95184d3","test_name":"test_test_2191_binary_weighted_resistor_dac_b60aede5d95184d3","netlist_hash":"a3fe55a1708ca1dd","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"4-bit binary-weighted resistor DAC using ideal op-amp and voltage-controlled switches.","pair_ids":["5b2a590cbe2bb3c3","c2f04f3d46f34602","6625ee21539dc4c8","b3e639b32a88f002"],"prompts":["4-bit binary-weighted resistor DAC using ideal op-amp and voltage-controlled switches.","Pulse sources with staggered delays generate a 16\u2011step binary staircase from code 0 to 15.","Measurements capture output at code 0, code 1, and full-scale code 15, plus max/min range.","Resistor assignment: b0/LSB=80k, b1=40k, b2=20k, b3/MSB=10k; Rf=5.33k gives approx -5V full-scale."],"measurements":[{"name":"vout_min","key":"vout_min","index":0,"value":-4.993238790754045,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 TRAN"},{"name":"vout_1","key":"vout_1","index":0,"value":-0.3338791163413027,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"vout_0","key":"vout_0","index":0,"value":-0.0010655898182000457,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"vout_15","key":"vout_15","index":0,"value":-4.993238790754045,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"vout_max","key":"vout_max","index":0,"value":-0.0010655898182000457,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:02322_b984fd72ffc313fe:030a9b0cb737a3c8","source":"deepseek","example_id":"02322_b984fd72ffc313fe","test_name":"test_test_2322_buck_converter_open_loop_b984fd72ffc313fe","netlist_hash":"030a9b0cb737a3c8","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Buck converter with 24V input, 220uH inductor, 100uF capacitor, 20 Ohm load, switching at 50kHz.","pair_ids":["31b54a825b58ad77","e43665524a2f13b8","8d53331561d71320","4968e97c7b528da6"],"prompts":["Buck converter with 24V input, 220uH inductor, 100uF capacitor, 20 Ohm load, switching at 50kHz.","PWM gate drive with 0-10V pulse at 30% duty cycle controls an ideal switch.","Freewheeling diode (Dideal) correctly oriented with anode to ground and cathode to switch node.","Simulation runs 10ms; measurements taken after settling (5ms to 10ms) for accurate steady-state values."],"measurements":[{"name":"Vout_ripple","key":"Vout_ripple","index":0,"value":0.06224096591885697,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#1 TRAN"},{"name":"I_L_avg","key":"I_L_avg","index":0,"value":0.334461346701673,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 TRAN"},{"name":"Vout_avg","key":"Vout_avg","index":0,"value":6.700545090672274,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00125_956a77a92ac20b48:c24220d95798cc66","source":"deepseek","example_id":"00125_956a77a92ac20b48","test_name":"test_test_125_full_wave_bridge_rectifier_with_filter_cap_956a77a92ac20b48","netlist_hash":"c24220d95798cc66","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Create a full-wave bridge rectifier using four diodes, driven by a 10V peak 50Hz sinusoidal source. Include a 100\u00b5F filter capacitor across a 1k\u03a9 load. Simulate the transient response to observe the steady-state output voltage and measure its average and ripple.","pair_ids":["2f1cad8465f7a4fc","89292038bed0c047","b13a064d92fed6c1"],"prompts":["Create a full-wave bridge rectifier using four diodes, driven by a 10V peak 50Hz sinusoidal source. Include a 100\u00b5F filter capacitor across a 1k\u03a9 load. Simulate the transient response to observe the steady-state output voltage and measure its average and ripple.","Design a diode full-wave rectifier with a filtering capacitor. The input is a 10V amplitude 50Hz sine wave. Use a 1k\u03a9 load resistor and a 100\u00b5F smoothing capacitor. Run a transient analysis and extract the average output voltage and ripple voltage.","Build a bridge rectifier circuit with four diodes, a 100\u00b5F filter capacitor, and a 1k\u03a9 load, powered by a sinusoidal source of 10V peak at 50Hz. Perform a transient simulation and quantify the DC output and ripple."],"measurements":[{"name":"Vripple","key":"Vripple","index":0,"value":0.5507763619603452,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#1 TRAN"},{"name":"Vout_avg","key":"Vout_avg","index":0,"value":8.968357762425137,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00178_ea044aa802252630:ea044aa802252630","source":"deepseek","example_id":"00178_ea044aa802252630","test_name":"test_test_178_common_collector_emitter_follower_ea044aa802252630","netlist_hash":"ea044aa802252630","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Common-collector NPN BJT amplifier with resistive divider biasing and AC-coupled input.","pair_ids":["fba33df3a43cfb76","0841d3bf4a9bbf63","e88fc037213835c0"],"prompts":["Common-collector NPN BJT amplifier with resistive divider biasing and AC-coupled input.","The emitter resistor provides DC bias and sets quiescent current; the load resistor models a typical AC load.","The circuit provides high input impedance, low output impedance, and a voltage gain close to 1."],"measurements":[{"name":"gain_db","key":"gain_db","index":0,"value":-0.09834664890765342,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#2 AC"},{"name":"gain","key":"gain","index":0,"value":0.9887412827381318,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#2 AC"}]} +{"id":"deepseek:01437_32c965b59903b451:e02f251311bcf361","source":"deepseek","example_id":"01437_32c965b59903b451","test_name":"test_test_1437_inverting_opamp_bias_compensation_32c965b59903b451","netlist_hash":"e02f251311bcf361","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Inverting amplifier with R1=1k\u03a9 and Rf=10k\u03a9 for a nominal gain of -10.","pair_ids":["cdd5742fa5a23bb0","8dc45db5704e8def","1a7235340bc8d940"],"prompts":["Inverting amplifier with R1=1k\u03a9 and Rf=10k\u03a9 for a nominal gain of -10.","Bias compensation resistor Rcomp = R1||Rf is placed at the non-inverting input to null DC offset.","Ideal voltage-controlled voltage source (E1) with high open-loop gain models the op-amp."],"measurements":[{"name":"gain_mag","key":"gain_mag","index":0,"value":9.999999890000002,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"Vout_offset","key":"Vout_offset","index":0,"value":1.1641532182693481e-10,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"}]} +{"id":"deepseek:00005_a4d3f5a49f9a85d7:a4d3f5a49f9a85d7","source":"deepseek","example_id":"00005_a4d3f5a49f9a85d7","test_name":"test_test_5_resistive_pi_attenuator_pad_a4d3f5a49f9a85d7","netlist_hash":"a4d3f5a49f9a85d7","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Design a resistive attenuator using a pi topology that provides about 6 dB of voltage loss. Use only resistors and a voltage source. Include .OP and .AC analyses, and measure the attenuation in dB at 1 kHz.","pair_ids":["713a89ed0d28c954","1ea14633b66540eb","644e9180c93f2b72","15c1096f944cb63d"],"prompts":["Design a resistive attenuator using a pi topology that provides about 6 dB of voltage loss. Use only resistors and a voltage source. Include .OP and .AC analyses, and measure the attenuation in dB at 1 kHz.","Create a SPICE netlist for a pi\u2011pad attenuator with shunt input resistor 1k, series resistor 50, and shunt output resistor 50. Run an operating\u2011point and an AC sweep, then report the voltage attenuation in dB at 1 kHz.","Implement a three\u2011resistor pi network: R1=1k from input to ground, R2=50 from input to output, R3=50 from output to ground. Apply a 1 V DC source with 1 V AC and verify the 6 dB attenuation at 1 kHz.","Make a passive pi\u2011topology attenuator that cuts the signal by half. Use a DC+AC source, run .OP and .AC, and measure V(out), V(in) and the resulting dB loss at 1 kHz."],"measurements":[{"name":"attenuation_db","key":"attenuation_db","index":0,"value":-6.020599913279624,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#2 AC"},{"name":"vin","key":"vin","index":0,"value":1,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"vout","key":"vout","index":0,"value":0.5,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"}]} +{"id":"deepseek:00559_0321f9735d0e939a:499a713d96ea267d","source":"deepseek","example_id":"00559_0321f9735d0e939a","test_name":"test_test_559_series_resonant_trap_filter_0321f9735d0e939a","netlist_hash":"499a713d96ea267d","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Series resonant trap filter using a shunt LC branch to notch out 5 kHz.","pair_ids":["16026b2be9ac30de","aa643a6e6c4676a4","6bb3ebcca747fb3d"],"prompts":["Series resonant trap filter using a shunt LC branch to notch out 5 kHz.","R1=1k\u03a9 sets the series source resistance, L=10mH and C=100nF give resonance near 5.03 kHz.","Output is taken across the LC branch that shorts to ground at resonance, creating a deep notch."],"measurements":[{"name":"notch_db","key":"notch_db","index":0,"value":-51.53303540475275,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 AC"},{"name":"notch_freq","key":"notch_freq","index":0,"value":4930.9048395346435,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 AC"}]} +{"id":"deepseek:00104_6d1e8e65882bdcf0:6d1e8e65882bdcf0","source":"deepseek","example_id":"00104_6d1e8e65882bdcf0","test_name":"test_test_104_l_section_matching_network_6d1e8e65882bdcf0","netlist_hash":"6d1e8e65882bdcf0","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"Create an L-section matching network to match a 50 Ohm source to a 200 Ohm load at 100 MHz using a low-pass topology.","pair_ids":["9bb4e655df0adf74","08b77c870dcd8b61","be86c2f613fb99db","d944a4b4adf4e4eb","5385add45bceee44"],"prompts":["Create an L-section matching network to match a 50 Ohm source to a 200 Ohm load at 100 MHz using a low-pass topology.","Design a low-pass L-match that converts 50 \u03a9 to 200 \u03a9 at 100 MHz, with series inductor and shunt capacitor.","Simulate the frequency response of an L-network impedance matching circuit and verify that the voltage at the load is maximized at the design frequency.","Implement an L-section matching network in SPICE: source resistance 50 \u03a9, load 200 \u03a9, center frequency 100 MHz.","Build an AC simulation of an L-match network and use .MEASURE statements to confirm the output voltage is at the expected matched level."],"measurements":[{"name":"vout_db","key":"vout_db","index":0,"value":-1.4496176967748742e-05,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"vout_max","key":"vout_max","index":0,"value":-1.449617696637987e-05,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 AC"}]} +{"id":"deepseek:00641_6dd9aab43e98aace:a9e28fc708157f98","source":"deepseek","example_id":"00641_6dd9aab43e98aace","test_name":"test_test_641_multi_section_rc_lowpass_anti_alias_6dd9aab43e98aace","netlist_hash":"a9e28fc708157f98","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Two-stage passive RC low-pass filter formed by cascading R1-C1 and R2-C2 sections.","pair_ids":["43b8e47c21fb3d96","057bffb6e5dd02ba","e689fb4c4c23d590"],"prompts":["Two-stage passive RC low-pass filter formed by cascading R1-C1 and R2-C2 sections.","Designed for anti-aliasing before an ADC, providing second-order roll-off.","Component values (1k\u03a9, 100nF; 2k\u03a9, 47nF) set the -3 dB cutoff near 780 Hz."],"measurements":[{"name":"f3db","key":"f3db","index":0,"value":780.2970700256145,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 AC"},{"name":"gain_at_10k","key":"gain_at_10k","index":0,"value":-31.856004924628987,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"vout_max_db","key":"vout_max_db","index":0,"value":-6.734824533921941e-06,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 AC"}]} +{"id":"deepseek:01367_d74cd0ecb7df43e1:34eb5273095d96e9","source":"deepseek","example_id":"01367_d74cd0ecb7df43e1","test_name":"test_test_1367_cmos_transmission_gate_latch_d74cd0ecb7df43e1","netlist_hash":"34eb5273095d96e9","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"CMOS transmission-gate D-latch with clocked pass gates and feedback inverters.","pair_ids":["66af18289ad9b66e","650fd574fdd80765","2e5db3ffdc9fa5e8"],"prompts":["CMOS transmission-gate D-latch with clocked pass gates and feedback inverters.","Transient simulation measures propagation delays from clock edges to output Q.","Hold voltages verify data retention when clock is low."],"measurements":[{"name":"t_rise","key":"t_rise","index":0,"value":6.571665508919421e-11,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 TRAN"},{"name":"vhold_min","key":"vhold_min","index":0,"value":4.999999984049124,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 TRAN"},{"name":"vhold","key":"vhold","index":0,"value":5.000001548486325,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"},{"name":"t_fall","key":"t_fall","index":0,"value":6.123999944795298e-11,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:02081_25880d7b9569f946:6043f923ab23953c","source":"deepseek","example_id":"02081_25880d7b9569f946","test_name":"test_test_2081_gilbert_mixer_bjt_25880d7b9569f946","netlist_hash":"6043f923ab23953c","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Design a Gilbert cell mixer using NPN BJTs for RF downconversion from 100.1 MHz to 100 kHz IF.","pair_ids":["a51e7be9c53d90be","b8cb707ac8b0a106","3d910a7a6b32750b"],"prompts":["Design a Gilbert cell mixer using NPN BJTs for RF downconversion from 100.1 MHz to 100 kHz IF.","Implement a double-balanced mixer with a tail current source, RF differential pair, and LO switching quad.","Set up a transient simulation to observe the mixing product and verify operation."],"measurements":[{"name":"vrms","key":"vrms","index":0,"value":0.3131797554492723,"value_is_finite":true,"success":true,"measurement_type":"RMS","simulation_name":"#2 TRAN"},{"name":"vpp","key":"vpp","index":0,"value":0.7904304447209167,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#2 TRAN"}]} +{"id":"deepseek:00633_c82c686d65459113:492f2d235c2115f7","source":"deepseek","example_id":"00633_c82c686d65459113","test_name":"test_test_633_rc_differentiator_edge_detector_c82c686d65459113","netlist_hash":"492f2d235c2115f7","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":2,"representative_prompt":"An RC high-pass filter with R=10k\u03a9 and C=10pF, \u03c4=100ns, differentiates a 0-5V pulse with 1ns rise/fall times, generating positive and negative spikes.","pair_ids":["b9797119c973f5b8","0d24f26dbcbfa5b1"],"prompts":["An RC high-pass filter with R=10k\u03a9 and C=10pF, \u03c4=100ns, differentiates a 0-5V pulse with 1ns rise/fall times, generating positive and negative spikes.","Output spikes reach \u22484.8V at 1ns, then decay with \u03c4=100ns, staying well below 5V absolute max."],"measurements":[{"name":"vmin","key":"vmin","index":0,"value":-4.974859493995135,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 tran"},{"name":"vmax","key":"vmax","index":0,"value":4.975083128991342,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 tran"}]} +{"id":"deepseek:01478_332702fd7a8c2cd5:c66cb8c532d89e5a","source":"deepseek","example_id":"01478_332702fd7a8c2cd5","test_name":"test_test_1478_two_opamp_instrumentation_amplifier_332702fd7a8c2cd5","netlist_hash":"c66cb8c532d89e5a","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Two-op-amp instrumentation amplifier using voltage-controlled voltage sources as op-amps with finite open-loop gain of 100000.","pair_ids":["73a68d59434d5aa5","5cc6fd448d279efb","a7e426a897bebeec","189343b3a5b9005c"],"prompts":["Two-op-amp instrumentation amplifier using voltage-controlled voltage sources as op-amps with finite open-loop gain of 100000.","Input offset voltages modeled as series voltage sources on each input (1mV on negative, 0.5mV on positive).","Gain resistor values set to R1=9k, R2=1k, R3=1k, R4=9k yielding differential gain of approximately 10 V/V.","Ac analysis shows flat gain of 10 over wide frequency range due to ideal op-amp models without bandwidth limitation."],"measurements":[{"name":"VGAIN","key":"VGAIN","index":0,"value":9.999000099989999,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"VOUT_DC","key":"VOUT_DC","index":0,"value":0.004999611148690519,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"}]} +{"id":"deepseek:01359_8fda4d90543d1b19:8fda4d90543d1b19","source":"deepseek","example_id":"01359_8fda4d90543d1b19","test_name":"test_test_1359_cmos_inverter_with_capacitive_load_8fda4d90543d1b19","netlist_hash":"8fda4d90543d1b19","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"Standard CMOS inverter built with NMOS and PMOS transistors driving a 1 pF capacitive load.","pair_ids":["580ebf777beb1b5e","cc4e122f5b08ec15","1c6450ed9a632041","f2168748ae31f6cb","45032dc5cbf7c011"],"prompts":["Standard CMOS inverter built with NMOS and PMOS transistors driving a 1 pF capacitive load.","Input is a pulse from 0 to 3.3 V with 1 ns rise/fall times, 10 ns pulse width, 20 ns period.","Transient simulation runs for 50 ns to capture the output switching behavior.","Rise and fall times are measured using SPICE .measure commands at the 10% and 90% voltage levels.","The test verifies that both measurements are present, successful, and within an expected physical range."],"measurements":[{"name":"trise","key":"trise","index":0,"value":2.0723002266314322e-09,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 tran"},{"name":"tfall","key":"tfall","index":0,"value":2.0938756244059173e-09,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 tran"}]} +{"id":"deepseek:02093_ec56a80c0e5a3306:eabeba854b7e4c3f","source":"deepseek","example_id":"02093_ec56a80c0e5a3306","test_name":"test_test_2093_cmos_gilbert_mixer_differential_lo_ec56a80c0e5a3306","netlist_hash":"eabeba854b7e4c3f","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Double-balanced CMOS Gilbert cell mixer with differential square-wave LO and differential sinusoidal RF.","pair_ids":["0248cf582a6e9e96","b64200438a25910c","f5798500a34d955c"],"prompts":["Double-balanced CMOS Gilbert cell mixer with differential square-wave LO and differential sinusoidal RF.","LO=900 MHz, RF=1 GHz, downconverts to IF=100 MHz.","Load resistors changed to 600 \u03a9 to reduce IF output swing."],"measurements":[{"name":"VRFPP","key":"VRFPP","index":0,"value":0.1999004437171168,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#1 TRAN"},{"name":"CONV_GAIN","key":"CONV_GAIN","index":0,"value":8.669853342247745,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 TRAN"},{"name":"VIFPP","key":"VIFPP","index":0,"value":0.5423834450050498,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00338_33f675d452ab9241:5525f67ff487a142","source":"deepseek","example_id":"00338_33f675d452ab9241","test_name":"test_test_338_op_amp_integrator_with_reset_33f675d452ab9241","netlist_hash":"5525f67ff487a142","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Design an op-amp integrator with a reset switch that periodically discharges the feedback capacitor. Use a behavioral op-amp, a voltage-controlled switch, and measure the output voltage during integration and after reset.","pair_ids":["71f552daecad741b","f7d8357d2fce6bcd","dfa9a8b0391900a9"],"prompts":["Design an op-amp integrator with a reset switch that periodically discharges the feedback capacitor. Use a behavioral op-amp, a voltage-controlled switch, and measure the output voltage during integration and after reset.","Create a SPICE netlist for an integrator circuit using an ideal op-amp, a resistor, a capacitor, and a switch to reset. Include a transient simulation and measurements of the ramp and reset behavior.","Implement an active integrator with reset capability. The circuit should integrate a constant input voltage and produce a linear ramp, then be reset by a switch across the capacitor. Measure the output at key time points."],"measurements":[{"name":"Vpeak","key":"Vpeak","index":0,"value":-1.9000193020610219,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"Vreset","key":"Vreset","index":0,"value":-0.0009999711249336274,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"Vmid","key":"Vmid","index":0,"value":-1.0001718419170986,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00136_6448688ba26246f2:002426f6de81c938","source":"deepseek","example_id":"00136_6448688ba26246f2","test_name":"test_test_136_positive_diode_clamper_with_reference_6448688ba26246f2","netlist_hash":"002426f6de81c938","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Design a positive diode clamper that shifts a 5V peak sine wave upward by a 2V DC reference voltage. The circuit uses a diode, capacitor, resistor, and reference source.","pair_ids":["3fc30ba4cc7199ed","73bdb8eeeb991cc1","783f3544ee4615fb"],"prompts":["Design a positive diode clamper that shifts a 5V peak sine wave upward by a 2V DC reference voltage. The circuit uses a diode, capacitor, resistor, and reference source.","Create a clamping circuit with a 1uF capacitor, 10kOhm load resistor, diode, and 2V DC reference to add a positive DC offset to a 1kHz, 5V amplitude sinusoidal input.","Build a positive peak clamper with a reference voltage of 2V. The diode clamps the negative peaks to approximately 2V minus the diode forward voltage drop."],"measurements":[{"name":"vout_min","key":"vout_min","index":0,"value":1.279081436331295,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 TRAN"},{"name":"vout_avg","key":"vout_avg","index":0,"value":6.067543177084678,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 TRAN"},{"name":"vout_max","key":"vout_max","index":0,"value":11.038313834347106,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00740_49c6ff2561ebf6d5:49c6ff2561ebf6d5","source":"deepseek","example_id":"00740_49c6ff2561ebf6d5","test_name":"test_test_740_diode_peak_detector_with_bleed_resistor_49c6ff2561ebf6d5","netlist_hash":"49c6ff2561ebf6d5","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Design a simple diode peak detector circuit with a bleed resistor.","pair_ids":["36f95b915a628228","6ff1d7f7d40b2b50","65bca4633d3e8dba"],"prompts":["Design a simple diode peak detector circuit with a bleed resistor.","Create a peak detector using a diode, capacitor, and resistor with a sinusoidal input.","I need a SPICE netlist for a basic peak detector that holds the peak value of a 2V sine wave."],"measurements":[{"name":"vout_avg","key":"vout_avg","index":0,"value":1.417770171469654,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:01199_b310caa5041d63c3:bd13371a9e5aa5f1","source":"deepseek","example_id":"01199_b310caa5041d63c3","test_name":"test_test_1199_nmos_cs_degen_b310caa5041d63c3","netlist_hash":"bd13371a9e5aa5f1","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"NMOS common-source amplifier with source degeneration resistor RS=200 Ohm.","pair_ids":["658889ac7b0034f1","4c473fce7e4d84aa","32a02e4a7e857565"],"prompts":["NMOS common-source amplifier with source degeneration resistor RS=200 Ohm.","Biasing network: R1/R2 voltage divider sets gate DC voltage; coupling capacitor C1 blocks DC from input.","AC analysis measures mid-band gain at 1kHz; DC operating point verified via .DC sweep."],"measurements":[{"name":"vgs","key":"vgs","index":0,"value":2.5,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#3 DC"},{"name":"id","key":"id","index":0,"value":0.0009180775211847734,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#3 DC"},{"name":"gain","key":"gain","index":0,"value":6.518805643993107,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"}]} +{"id":"deepseek:02245_23c104517e8f7ef9:45293f10e65fa773","source":"deepseek","example_id":"02245_23c104517e8f7ef9","test_name":"test_test_2245_track_and_hold_buffer_with_sampling_capacitor_23c104517e8f7ef9","netlist_hash":"45293f10e65fa773","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"A track-and-hold buffer using an ideal op-amp voltage follower, a voltage-controlled switch, and a 1 nF sampling capacitor with a 1 M\u03a9 leakage resistor.","pair_ids":["1b062f2c7f3763cc","d1ea22e0e6599a78","df76216f62c8a49e"],"prompts":["A track-and-hold buffer using an ideal op-amp voltage follower, a voltage-controlled switch, and a 1 nF sampling capacitor with a 1 M\u03a9 leakage resistor.","The switch closes during the clock high (first 500 \u00b5s), allowing the capacitor to charge to the input voltage through the buffer.","When the switch opens, the capacitor voltage is held and buffered to the output; the leakage resistor causes a gradual discharge (droop)."],"measurements":[{"name":"droop","key":"droop","index":0,"value":0.6668839615600077,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 TRAN"},{"name":"v_hold_final","key":"v_hold_final","index":0,"value":1.5957866106458003,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"v_track","key":"v_track","index":0,"value":2.4996869897848684,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"v_hold_init","key":"v_hold_init","index":0,"value":2.262670572205808,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:01851_4207597971b5ee07:d9fc5d81f2d22d44","source":"deepseek","example_id":"01851_4207597971b5ee07","test_name":"test_test_1851_sawtooth_generator_4207597971b5ee07","netlist_hash":"d9fc5d81f2d22d44","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Constant 5mA current source charges 1nF capacitor, producing a linear ramp.","pair_ids":["0a72cfbd88c5dc6a","567a7e3bd8afed76","14b8f732a1ab4c6e","abd59994bbc2ce00"],"prompts":["Constant 5mA current source charges 1nF capacitor, producing a linear ramp.","Voltage\u2011controlled switch (S1) with model `swmod` resets the capacitor when gate pulse reaches 2.5V.","Pulse source `Vreset` drives the switch; delay 1us, rise/fall 1ns, pulse width trimmed to 108.8ns for a 4.5V peak after discharge offset.","Simulation runs 10us with data saved from 2us; fast sampling (TMAX=1ns) ensures precise timing."],"measurements":[{"name":"vmax","key":"vmax","index":0,"value":4.582340526968887,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 tran"},{"name":"period","key":"period","index":0,"value":1.0000002846967184e-06,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 tran"},{"name":"freq","key":"freq","index":0,"value":999999.7153033627,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 tran"}]} +{"id":"deepseek:00119_fbf6f7d326cd2df7:13aabe1818bb9395","source":"deepseek","example_id":"00119_fbf6f7d326cd2df7","test_name":"test_test_119_half_wave_rectifier_fbf6f7d326cd2df7","netlist_hash":"13aabe1818bb9395","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Half-wave rectifier with smoothing capacitor converts AC to DC.","pair_ids":["b9aabb8f618a002b","3968676ae70e8a38","a3b9331efcd130f8","9512d8d43e60db6b"],"prompts":["Half-wave rectifier with smoothing capacitor converts AC to DC.","Diode 1N4148-like model with IS=1e-12 and RS=1.","Filter capacitor 82uF and load resistor 1k.","Output average around 8.3V with ripple around 1.5V under 10V 60Hz input."],"measurements":[{"name":"Vpp","key":"Vpp","index":0,"value":1.175210199901768,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#1 TRAN"},{"name":"Vavg","key":"Vavg","index":0,"value":8.721175851311429,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:02179_02fc6ea716fff71a:f176a728f1c7db7c","source":"deepseek","example_id":"02179_02fc6ea716fff71a","test_name":"test_test_2179_r2r_dac_02fc6ea716fff71a","netlist_hash":"f176a728f1c7db7c","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":1,"representative_prompt":"4\u2011bit R\u20112R ladder DAC with ideal voltage\u2011follower op\u2011amp buffer. The R\u20112R network uses 1k\u03a9 (R) and 2k\u03a9 (2R) resistors. Digital inputs are represented by voltage sources: b3 and b1 track VREF (code '1'), b2 and b0 are 0V (code '0'). The ladder is terminated with a 2k\u03a9 resistor to ground at the LSB end. The op\u2011amp buffer (E1) forces V(out) \u2248 V(n3), providing low output impedance. A DC sweep of VREF from 0 to 5V in 0.1V steps verifies the transfer characteristic V(out) = 0.625\u00b7VREF for input code 1010.","pair_ids":["6f18485276c47373"],"prompts":["4\u2011bit R\u20112R ladder DAC with ideal voltage\u2011follower op\u2011amp buffer. The R\u20112R network uses 1k\u03a9 (R) and 2k\u03a9 (2R) resistors. Digital inputs are represented by voltage sources: b3 and b1 track VREF (code '1'), b2 and b0 are 0V (code '0'). The ladder is terminated with a 2k\u03a9 resistor to ground at the LSB end. The op\u2011amp buffer (E1) forces V(out) \u2248 V(n3), providing low output impedance. A DC sweep of VREF from 0 to 5V in 0.1V steps verifies the transfer characteristic V(out) = 0.625\u00b7VREF for input code 1010."],"measurements":[{"name":"vout_at_2_5v","key":"vout_at_2_5v","index":0,"value":1.5624843751562485,"value_is_finite":true,"success":true,"measurement_type":"FIND_WHEN","simulation_name":"#2 DC"},{"name":"vref_for_half","key":"vref_for_half","index":0,"value":2.500025,"value_is_finite":true,"success":true,"measurement_type":"FIND_WHEN","simulation_name":"#2 DC"},{"name":"vout_at_5v","key":"vout_at_5v","index":0,"value":3.124968750312497,"value_is_finite":true,"success":true,"measurement_type":"FIND_WHEN","simulation_name":"#2 DC"}]} +{"id":"deepseek:00326_b2cc5d299954d341:2a209b274da68264","source":"deepseek","example_id":"00326_b2cc5d299954d341","test_name":"test_test_326_opamp_summing_three_inputs_b2cc5d299954d341","netlist_hash":"2a209b274da68264","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Inverting summing amplifier with three input voltages.","pair_ids":["5a7f8ed48cc77e49","86db06e438b86784","f71c49ece425295a"],"prompts":["Inverting summing amplifier with three input voltages.","All resistors are 10 k\u03a9 for unity gain on each input (Rf=R1=R2=R3).","Op-amp modeled with a high-gain voltage-controlled voltage source (E) of 100,000."],"measurements":[{"name":"OP_OUT","key":"OP_OUT","index":0,"value":-0.5999760009599615,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"SUM_GAIN","key":"SUM_GAIN","index":0,"value":2.999880004799808,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:00015_aaf07f1729a27024:0ac640f2f0257f05","source":"deepseek","example_id":"00015_aaf07f1729a27024","test_name":"test_test_15_t_attenuator_10db_75ohm_aaf07f1729a27024","netlist_hash":"0ac640f2f0257f05","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":2,"representative_prompt":"T-pad attenuator providing 10 dB loss in a 75 ohm impedance system, simulated with AC analysis.","pair_ids":["eb7ad540a5f497cc","0d1d9e695b2dc40c"],"prompts":["T-pad attenuator providing 10 dB loss in a 75 ohm impedance system, simulated with AC analysis.","Measurement checks V(out) at 1 kHz under 1 V AC drive, expected to be ~0.3162 V (i.e., -10 dB)."],"measurements":[{"name":"vout_1k","key":"vout_1k","index":0,"value":0.3168834526179368,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"}]} +{"id":"deepseek:00755_60d2e09a534b0724:c3f748cd81a55786","source":"deepseek","example_id":"00755_60d2e09a534b0724","test_name":"test_test_755_biased_negative_diode_limiter_60d2e09a534b0724","netlist_hash":"c3f748cd81a55786","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Design a biased negative diode limiter that clips negative peaks of a 1kHz sine wave at around -2.7V.","pair_ids":["39b333e77bcd45f9","e3f0f1fd75a98fab","68ac0c798d89af2d","f855bb64f4bc569b"],"prompts":["Design a biased negative diode limiter that clips negative peaks of a 1kHz sine wave at around -2.7V.","Create a clipping circuit using a diode and a -2V bias source to limit the negative portion of an input signal to -2.7V.","Implement a negative clipper with a series resistor and a parallel diode and bias supply to clip a 5V amplitude sine wave.","Use a D model and a DC bias to create a negative limiter for a 5V peak sine wave at 1 kHz."],"measurements":[{"name":"Vmax","key":"Vmax","index":0,"value":4.926927629741365,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"},{"name":"Vmin","key":"Vmin","index":0,"value":-2.678848831805783,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00324_7364e61b059dfe18:a5d74cbf63b151ae","source":"deepseek","example_id":"00324_7364e61b059dfe18","test_name":"test_test_324_opamp_summing_three_inputs_7364e61b059dfe18","netlist_hash":"a5d74cbf63b151ae","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"The circuit is an inverting summing amplifier with three DC inputs (0V, 0.5V, -0.2V) each connected through a 1k\u03a9 resistor to the inverting input of an ideal opamp with gain 100,000 and 1k\u03a9 feedback.","pair_ids":["d9c227705eb833e6","08e4b6230330b1f5","75640762889d3dcb"],"prompts":["The circuit is an inverting summing amplifier with three DC inputs (0V, 0.5V, -0.2V) each connected through a 1k\u03a9 resistor to the inverting input of an ideal opamp with gain 100,000 and 1k\u03a9 feedback.","The opamp is modeled as a voltage-controlled voltage source (E1) with a gain of 100k, providing near-ideal behavior.","DC analysis is performed by sweeping a dummy source to enable .MEASURE DC, while AC analysis uses 1V amplitude on all inputs."],"measurements":[{"name":"VOUT_1K","key":"VOUT_1K","index":0,"value":2.9998800047998078,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"VOUT_DC","key":"VOUT_DC","index":0,"value":-0.2999880004799808,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"}]} +{"id":"deepseek:00894_a69b709d70ed94a7:45b07aa935bf026b","source":"deepseek","example_id":"00894_a69b709d70ed94a7","test_name":"test_test_894_fixed_bias_common_emitter_bjt_amplifier_a69b709d70ed94a7","netlist_hash":"45b07aa935bf026b","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Fixed-bias common-emitter amplifier with NPN transistor, 12V supply, 500k base resistor, and 2k collector resistor.","pair_ids":["83e0942ea3b762ac","8b643634d7ec3986","c0b358d4f50461fd"],"prompts":["Fixed-bias common-emitter amplifier with NPN transistor, 12V supply, 500k base resistor, and 2k collector resistor.","DC operating point and AC analysis from 10Hz to 1MHz, with input and output 10\u00b5F coupling capacitors and 10k load.","Measures VCE, collector current, and mid-band voltage gain at 1kHz, verifying typical BJT biasing and amplification."],"measurements":[{"name":"vce","key":"vce","index":0,"value":7.176085008957432,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#3 DC"},{"name":"ic","key":"ic","index":0,"value":0.0024119574955212843,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#3 DC"},{"name":"gain_db_1k","key":"gain_db_1k","index":0,"value":43.505606549654956,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"}]} +{"id":"deepseek:01666_a8b03576961cac47:1a115e20156a3f21","source":"deepseek","example_id":"01666_a8b03576961cac47","test_name":"test_test_1666_multiple_feedback_low_pass_filter_a8b03576961cac47","netlist_hash":"1a115e20156a3f21","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Second-order multiple-feedback low-pass filter with Butterworth response.","pair_ids":["cccfc1b86d7852d8","d048cf413d04c930","906e5d89d4a21b17"],"prompts":["Second-order multiple-feedback low-pass filter with Butterworth response.","Uses an ideal op-amp with gain 100k, unity DC gain, and -3 dB frequency at 1 kHz.","Component values: R1=R2=112.54k, R3=56.27k, C1=4nF, C2=1nF."],"measurements":[{"name":"f3dB","key":"f3dB","index":0,"value":998.5984269978334,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 AC"},{"name":"dc_gain_db","key":"dc_gain_db","index":0,"value":-0.00017371632052495687,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:01106_86c81d98df1fd5c4:43084bfb53753454","source":"deepseek","example_id":"01106_86c81d98df1fd5c4","test_name":"test_test_1106_bjt_class_ab_diode_bias_86c81d98df1fd5c4","netlist_hash":"43084bfb53753454","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Class-AB push-pull amplifier using complementary BJTs with diode biasing and op-amp feedback.","pair_ids":["7b513bb161072b3c","6228a95c5c052515","2243f78b64599cfb"],"prompts":["Class-AB push-pull amplifier using complementary BJTs with diode biasing and op-amp feedback.","Output RMS voltage near 7.1 V when driven with a 1 V peak sine wave, indicating low crossover distortion.","Average supply current below 10 mA, confirming efficient class-AB operation."],"measurements":[{"name":"Icc_avg","key":"Icc_avg","index":0,"value":-0.002522476311742281,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#2 TRAN"},{"name":"Vout_rms","key":"Vout_rms","index":0,"value":7.070282266286412,"value_is_finite":true,"success":true,"measurement_type":"RMS","simulation_name":"#2 TRAN"}]} +{"id":"deepseek:00349_77f9f83faa5cde40:0f679010bd41414e","source":"deepseek","example_id":"00349_77f9f83faa5cde40","test_name":"test_test_349_opamp_differentiator_limit_resistor_77f9f83faa5cde40","netlist_hash":"0f679010bd41414e","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"This circuit is an op-amp differentiator with an input series resistor to limit high-frequency gain.","pair_ids":["53a44b3562392052","5f80c213edbf6f34","c6475d02b1943c62","2410c77a19d02333","ea8003a61971fcae"],"prompts":["This circuit is an op-amp differentiator with an input series resistor to limit high-frequency gain.","The capacitor (100nF) and input resistor (1k\u03a9) form a high-pass filter that determines differentiation up to the corner frequency (approx. 1.6 kHz).","The feedback resistor (100k\u03a9) sets the gain at high frequencies to Rf/Rlimit = 100 = 40 dB.","The ideal op-amp (E1) has a voltage gain of 100,000.","AC analysis is performed from 10 Hz to 1 MHz with 10 points per decade."],"measurements":[{"name":"diff_slope","key":"diff_slope","index":0,"value":19.983093741210926,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 AC"},{"name":"gain_100","key":"gain_100","index":0,"value":15.946606861222588,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"gain_100k","key":"gain_100k","index":0,"value":40.00767503735748,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"gain_10","key":"gain_10","index":0,"value":-4.036486879988339,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:02006_713ba184287c2b9c:0a7f237a705eef53","source":"deepseek","example_id":"02006_713ba184287c2b9c","test_name":"test_test_2006_switching_prereg_linear_postreg_713ba184287c2b9c","netlist_hash":"0a7f237a705eef53","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"Design a power supply with a buck switching preregulator followed by a linear post-regulator to provide a clean 3.3V output from a 12V input.","pair_ids":["1904f2c85343f3cd","a05cd935f3f52b77","27ad7a0dda5cda31","e5a8c297d380b2eb","ecead8beb4e21df5"],"prompts":["Design a power supply with a buck switching preregulator followed by a linear post-regulator to provide a clean 3.3V output from a 12V input.","Implement a SPICE netlist for a two-stage regulator consisting of a buck converter with ideal switch and diode, and an NPN pass-transistor linear regulator with an op-amp error amplifier.","Create a simulation to measure the average output voltage and ripple of a linear post-regulator after a switching preregulator under a 10\u03a9 load.","Model a buck converter feeding a series-pass linear regulator using a behavioral op-amp and an NPN transistor.","Simulate the steady-state performance of a power supply that first steps down 12V with a switching stage and then further regulates to 3.3V with a low-dropout-like linear stage."],"measurements":[{"name":"vout_avg","key":"vout_avg","index":0,"value":3.324905745674138,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#2 TRAN"},{"name":"vout_ripple","key":"vout_ripple","index":0,"value":3.3340379411939125e-05,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#2 TRAN"}]} +{"id":"deepseek:02351_b1fc8c0c9449e0bf:42c1128537cd367d","source":"deepseek","example_id":"02351_b1fc8c0c9449e0bf","test_name":"test_test_2351_nmos_dc_bias_b1fc8c0c9449e0bf","netlist_hash":"42c1128537cd367d","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"NMOS common-source amplifier with resistive load","pair_ids":["dff58a5fdbedf6c2","7c7d514804599d9e","3b38864c4f0640cb"],"prompts":["NMOS common-source amplifier with resistive load","DC operating point analysis using voltage sweep","Checks if transistor is in saturation region"],"measurements":[{"name":"ID","key":"ID","index":0,"value":0.0003255813970486299,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 DC"},{"name":"VDS","key":"VDS","index":0,"value":1.7441860295137013,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 DC"}]} +{"id":"deepseek:00762_92b688ffb7e3f36d:379b87f58ad17c4f","source":"deepseek","example_id":"00762_92b688ffb7e3f36d","test_name":"test_test_762_window_diode_limiter_asymmetric_92b688ffb7e3f36d","netlist_hash":"379b87f58ad17c4f","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"A window limiter using two diodes and DC reference voltages to asymmetrically clamp a 5V amplitude sine wave.","pair_ids":["774e255743b410cb","904f7b16decc0815","be979d13b42a54e1"],"prompts":["A window limiter using two diodes and DC reference voltages to asymmetrically clamp a 5V amplitude sine wave.","Positive clamping uses V_POS=1.4V with diode drop to ~2.0V; negative clamping uses V_NEG=-0.4V with diode drop to ~-1.0V.","In the pass-through region, the output follows the input linearly."],"measurements":[{"name":"vmin","key":"vmin","index":0,"value":-0.9755881099821317,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 TRAN"},{"name":"vmax","key":"vmax","index":0,"value":1.961444772337827,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"},{"name":"vpp","key":"vpp","index":0,"value":2.9370328823199587,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00607_86bf39e55ac7f176:b47029c0cee239f4","source":"deepseek","example_id":"00607_86bf39e55ac7f176","test_name":"test_test_607_constant_k_lowpass_3section_86bf39e55ac7f176","netlist_hash":"b47029c0cee239f4","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Three-section constant-k low-pass filter designed for 50 Ohm image impedance and 1 MHz cutoff.","pair_ids":["8c505986d45dfe73","313acc8fe18106f0","9efa4beec86629c7","bd50e303e8df12a2"],"prompts":["Three-section constant-k low-pass filter designed for 50 Ohm image impedance and 1 MHz cutoff.","Uses standard L/\u03c0, C/\u03c0 formulas for element values (L \u2248 15.9155 \u00b5H, C \u2248 6.3662 nF per section).","AC simulation from 10 kHz to 100 MHz with 100 points per decade.",".MEAS statements extract -3 dB cutoff (relative to matched -9 dB level) and attenuation at 2 MHz."],"measurements":[{"name":"f3dB","key":"f3dB","index":0,"value":872457.5343319909,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 AC"},{"name":"att_2MHz","key":"att_2MHz","index":0,"value":-58.442798761327914,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:00337_15509f4ba580ede2:a3e1df93a815e074","source":"deepseek","example_id":"00337_15509f4ba580ede2","test_name":"test_test_337_opamp_integrator_reset_15509f4ba580ede2","netlist_hash":"a3e1df93a815e074","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Adjusted VIN PULSE parameters (TD=0.5m, PW=0.5m, PER=1m) so the square wave starts high for the first half\u2011cycle.","pair_ids":["18e0a04f8167f4f0","45da5b6f28efc148","442b77932757207d"],"prompts":["Adjusted VIN PULSE parameters (TD=0.5m, PW=0.5m, PER=1m) so the square wave starts high for the first half\u2011cycle.","Added a 1\u202fM\u03a9 feedback resistor in parallel with the integration capacitor to provide a DC path and prevent integrator drift.","Reset pulse at 1.5\u202fms discharges the capacitor through a low\u2011resistance switch, returning the output to ~0\u202fV."],"measurements":[{"name":"after_reset","key":"after_reset","index":0,"value":0.000999964163890016,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"int_min","key":"int_min","index":0,"value":-0.49881964364647113,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:02217_dd3f9caa45c536ae:a24d4b76d098b7ee","source":"deepseek","example_id":"02217_dd3f9caa45c536ae","test_name":"test_test_2217_successive_approximation_adc_comparator_dd3f9caa45c536ae","netlist_hash":"a24d4b76d098b7ee","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Sample-and-hold front-end for SAR ADC","pair_ids":["6646c82a4d6fe544","36501c71d3bc6762","604ca1fd7dcc03bc"],"prompts":["Sample-and-hold front-end for SAR ADC","Comparator with E-gain op-amp performing binary search on 0.6V input","Full scale 1V, 4-bit successive approximation"],"measurements":[{"name":"vout_250n","key":"vout_250n","index":0,"value":5,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"vout_550n","key":"vout_550n","index":0,"value":5,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"vout_450n","key":"vout_450n","index":0,"value":0,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"vout_350n","key":"vout_350n","index":0,"value":0,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00775_4dfc68ca699a2f8e:a5f1bf766ff4ba5e","source":"deepseek","example_id":"00775_4dfc68ca699a2f8e","test_name":"test_test_775_diode_and_gate_4dfc68ca699a2f8e","netlist_hash":"a5f1bf766ff4ba5e","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Two diodes with anodes connected to the output and cathodes to the inputs form a wired-AND function.","pair_ids":["63461269ee57af83","d6052a2f67b39069","043b40fcfb7da686"],"prompts":["Two diodes with anodes connected to the output and cathodes to the inputs form a wired-AND function.","A 1k\u03a9 pull-up resistor from Vcc (5V) to output holds the output high when no diode conducts.","Input pulses are timed to allow measurement of all logic states: both high, one low, both low."],"measurements":[{"name":"vout_high","key":"vout_high","index":0,"value":5.000000000003945,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 TRAN"},{"name":"vout_low2","key":"vout_low2","index":0,"value":0.5577410055145737,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 TRAN"},{"name":"vout_low1","key":"vout_low1","index":0,"value":0.5766594149963036,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:01698_f60ebf1332ff686d:c3feef0209fe7c21","source":"deepseek","example_id":"01698_f60ebf1332ff686d","test_name":"test_test_1698_active_filter_f60ebf1332ff686d","netlist_hash":"c3feef0209fe7c21","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Tow-Thomas biquad low-pass filter using three op-amps modeled as voltage-controlled voltage sources with gain 100,000.","pair_ids":["9df2e3333a449118","c00a8347a495fc21","7e8e20ce81a5c208","b0db0ce76a347602"],"prompts":["Tow-Thomas biquad low-pass filter using three op-amps modeled as voltage-controlled voltage sources with gain 100,000.","The filter is designed for a center frequency of approximately 1.6 kHz and a Q of 1, achieving a -3 dB corner near 2 kHz.","All resistors are 10 k\u03a9 and capacitors are 10 nF, yielding a natural frequency of about 1.59 kHz.","The damping resistor RD sets Q=1, and the input and feedback resistors provide unity DC gain."],"measurements":[{"name":"f3db","key":"f3db","index":0,"value":2023.1773704504483,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 AC"},{"name":"Gdc","key":"Gdc","index":0,"value":8.45949496054273e-05,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"Gstop","key":"Gstop","index":0,"value":-31.818440336299798,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:01930_288e0618554b694e:6a095dba9953f304","source":"deepseek","example_id":"01930_288e0618554b694e","test_name":"test_test_1930_buck_current_mode_288e0618554b694e","netlist_hash":"6a095dba9953f304","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"Design a 12V-to-5V current-mode buck converter switching at 100kHz.","pair_ids":["1640433cf5e7f025","17f462faa0c96f1d","12408b85f4db70f9","d23b0c39cc426c38","6c100b2786c66794"],"prompts":["Design a 12V-to-5V current-mode buck converter switching at 100kHz.","Control loop includes error amplifier (gain=1000, output clamped 0\u20132V), comparator, and SR latch built with switches.","Current sensing via a zero-voltage source and a current-controlled voltage source (H_sense).","Power stage: P\u2011MOSFET switch (modeled as voltage-controlled switch), freewheeling diode, LC filter, and 5\u03a9 load.","Initial conditions and UIC directive used to skip DC operating point convergence."],"measurements":[{"name":"period","key":"period","index":0,"value":1e-05,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 TRAN"},{"name":"ripple","key":"ripple","index":0,"value":0.03397944653080387,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#1 TRAN"},{"name":"freq","key":"freq","index":0,"value":99999.99999999999,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 TRAN"},{"name":"avg_out","key":"avg_out","index":0,"value":4.996567582868566,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:01661_8623ebfd7db4940d:2ec7c9ed719c649a","source":"deepseek","example_id":"01661_8623ebfd7db4940d","test_name":"test_test_1661_sallen_key_butterworth_lp_8623ebfd7db4940d","netlist_hash":"2ec7c9ed719c649a","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Design a second-order Butterworth low-pass filter using a Sallen-Key topology with unity gain. Provide a measured SPICE netlist with AC analysis and appropriate measurements.","pair_ids":["24a8db272e3b62fd","f9221c457dfc0dbf","3c93f0d6e2918a39"],"prompts":["Design a second-order Butterworth low-pass filter using a Sallen-Key topology with unity gain. Provide a measured SPICE netlist with AC analysis and appropriate measurements.","Create a SPICE netlist for a Sallen-Key Butterworth low-pass filter with a cutoff around 1 kHz, using ideal op-amp and passive components.","Generate a measured SPICE circuit for an active low-pass filter with Butterworth response and unity gain, including measurements for -3dB frequency and DC gain."],"measurements":[{"name":"f3db","key":"f3db","index":0,"value":994.6758304946846,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 AC"},{"name":"gain_10k","key":"gain_10k","index":0,"value":-40.07144820611368,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"gain_lf","key":"gain_lf","index":0,"value":-8.685864164526656e-05,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:00387_1f13796ffb5b91e9:89d73d19f97843d3","source":"deepseek","example_id":"00387_1f13796ffb5b91e9","test_name":"test_test_387_wien_bridge_oscillator_1f13796ffb5b91e9","netlist_hash":"89d73d19f97843d3","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"Wien-bridge oscillator uses a behavioral op-amp (E source) with high gain.","pair_ids":["0b819661a8ad6675","089b34088d634d7a","9d87059b83cbee36","8d610fbe59df8f7c","8e1265beb2372346"],"prompts":["Wien-bridge oscillator uses a behavioral op-amp (E source) with high gain.","Positive feedback network: R=10k, C=10n, yielding nominal frequency f=1/(2*pi*R*C)=1.59kHz.","Negative feedback resistors: Rf=22k, Rg=10k set gain to 3.2, slightly above required 3, initiating oscillation.","Anti-parallel diodes across Rf limit amplitude when voltage exceeds diode forward drop, stabilizing output.","Transient simulation runs 10ms, measurements taken after initial transient settle (6ms to 10ms)."],"measurements":[{"name":"vpp","key":"vpp","index":0,"value":1.1940824240373331,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#1 TRAN"},{"name":"period","key":"period","index":0,"value":0.0006336958482555366,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00717_f2fb5456300c3ba4:5034eb3d2d6fcd31","source":"deepseek","example_id":"00717_f2fb5456300c3ba4","test_name":"test_test_717_precision_half_wave_rectifier_f2fb5456300c3ba4","netlist_hash":"5034eb3d2d6fcd31","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"Non-inverting precision half-wave rectifier using a behavioral op-amp with gain 100 000 and \u00b115 V limits.","pair_ids":["403946be3e929561","dbe2f2f5850707cf","49aa1c0c4b0feb65","1d9ab6567b1e9fa8","ee01a1d2794e94f5"],"prompts":["Non-inverting precision half-wave rectifier using a behavioral op-amp with gain 100 000 and \u00b115 V limits.","Input 1 kHz 1 V amplitude sine applied to non-inverting input; feedback network R1=1k to ground, R2=9k from output to inverting input sets gain = 10.","Diode D1 (1N4148) conducts only during positive half-cycles, placing the output inside the feedback loop for precision rectification.","During negative half-cycles, op-amp saturates at \u201315 V, diode is reverse biased, and output is held at 0 V by R1 and R2.","Transient simulation over 5 ms captures 5 full sine cycles; .MEAS statements verify peak, average, midpoint, and minimum output."],"measurements":[{"name":"vout_at_2ms","key":"vout_at_2ms","index":0,"value":0.0014995470680872918,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"vout_min","key":"vout_min","index":0,"value":-0.01391283959586292,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 TRAN"},{"name":"vout_avg","key":"vout_avg","index":0,"value":3.163995493179311,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 TRAN"},{"name":"vout_max","key":"vout_max","index":0,"value":9.993806868194952,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:01354_8377694ffdf67409:8377694ffdf67409","source":"deepseek","example_id":"01354_8377694ffdf67409","test_name":"test_test_1354_cmos_inverter_8377694ffdf67409","netlist_hash":"8377694ffdf67409","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"Design a CMOS inverter with a capacitive load and measure the output rise and fall times.","pair_ids":["ee3238a228144a3d","7d9c767f76630cf0","41e9b25ce8d0a6b1","a7689ca7e6fb0782","214e993a96d41dda"],"prompts":["Design a CMOS inverter with a capacitive load and measure the output rise and fall times.","Create a basic CMOS inverter simulation to extract switching delays.","Simulate a standard CMOS inverter with a 100 fF load capacitor and report the rise time, fall time, and propagation delays.","Build a schematic for a CMOS inverter cell, apply a pulse input, and determine the transient response metrics.","Analyze a CMOS inverter's dynamic behavior by measuring rise/fall times and propagation delays."],"measurements":[{"name":"TPLH","key":"TPLH","index":0,"value":2.8930667487086044e-10,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 TRAN"},{"name":"TFALL","key":"TFALL","index":0,"value":2.1903517798969503e-10,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 TRAN"},{"name":"TPHL","key":"TPHL","index":0,"value":2.9525845238457745e-10,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 TRAN"},{"name":"TRISE","key":"TRISE","index":0,"value":2.0852673818886515e-10,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00298_8852c2b9b226d5ce:c4df63ee1ad99b4f","source":"deepseek","example_id":"00298_8852c2b9b226d5ce","test_name":"test_test_298_cmos_nor2_8852c2b9b226d5ce","netlist_hash":"c4df63ee1ad99b4f","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Simulate a CMOS 2-input NOR gate using 0.5\u00b5m MOSFET models with 3.3V supply, and measure the high-to-low propagation delay.","pair_ids":["77cd0591fe05df89","3fecde463f9eaafc","80441b63a63eb9c7"],"prompts":["Simulate a CMOS 2-input NOR gate using 0.5\u00b5m MOSFET models with 3.3V supply, and measure the high-to-low propagation delay.","Create a transient simulation of a standard CMOS NOR2 gate. Apply pulse inputs to both inputs and measure the output delay when input A goes high while B is low.","Design a CMOS NOR2 gate netlist with NMOS and PMOS transistors, run a TRAN analysis, and quantify the fall time delay from input A to output Y."],"measurements":[{"name":"vout_high","key":"vout_high","index":0,"value":3.299999993634616,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"tphl_A","key":"tphl_A","index":0,"value":-2.305939977035681e-13,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 TRAN"},{"name":"vout_low","key":"vout_low","index":0,"value":6.365384611463867e-10,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:01107_4bf524ba95262d17:6d8eea61f3af3338","source":"deepseek","example_id":"01107_4bf524ba95262d17","test_name":"test_test_1107_bjt_class_ab_output_diode_bias_4bf524ba95262d17","netlist_hash":"6d8eea61f3af3338","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"Class-AB push-pull output stage with NPN Q1 and PNP Q2 driven by \u00b115 V supplies.","pair_ids":["6f525a46141fe994","caf99567fff656ac","748189992111daeb","e7a6173a2b2f2c8f","c0dbeabd93bd7086"],"prompts":["Class-AB push-pull output stage with NPN Q1 and PNP Q2 driven by \u00b115 V supplies.","Biasing provided by diode string D1\u2011D2 with a small series resistor R3 to set quiescent current.","Input is a 1 kHz sine wave with 0.7 V DC offset and 0.5 V amplitude.","Output drives a 1 k\u03a9 load resistor to ground.","Quiescent current is reduced to a few mA by minimizing R3 (1 \u03a9), keeping the bias spread near two diode drops."],"measurements":[{"name":"vout_min","key":"vout_min","index":0,"value":-0.4565430730890207,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#2 TRAN"},{"name":"iq1","key":"iq1","index":0,"value":0.0015733564987600547,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 OP"},{"name":"vout_dc","key":"vout_dc","index":0,"value":0.03343602748804686,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 OP"},{"name":"vout_max","key":"vout_max","index":0,"value":0.5237785157522319,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#2 TRAN"},{"name":"vout_pp","key":"vout_pp","index":0,"value":0.9803215888412526,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#2 TRAN"}]} +{"id":"deepseek:02012_559a013d09156158:d1ad77ca91626de3","source":"deepseek","example_id":"02012_559a013d09156158","test_name":"test_test_2012_ideal_diode_oring_power_mux_mosfet_559a013d09156158","netlist_hash":"d1ad77ca91626de3","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"Connect two PMOS with drain to input, source to output, body to source.","pair_ids":["fc7cea8052c561a7","79c447e64df745fe","5fe955c3d0bab024","cb72ddd99756a9b8","ecc3e307bfdea314"],"prompts":["Connect two PMOS with drain to input, source to output, body to source.","Use controlled sources E to drive gates: if input voltage is higher than the other, set gate to 0V to turn on; else set gate to V(out) to turn off.","At DC with V1=5V, V2=5.5V, M2 on, M1 off, output near 5.5V.","When V2 pulses down to 4V, V1 becomes higher, so M1 turns on and M2 off, output near 5V.","Reverse current through idle MOSFET negligible due to body diode orientation."],"measurements":[{"name":"vout_min","key":"vout_min","index":0,"value":4.834280150226073,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#2 TRAN"},{"name":"vout_init","key":"vout_init","index":0,"value":5.343835071545669,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 TRAN"},{"name":"i_v2_low","key":"i_v2_low","index":0,"value":8.442801502260733e-13,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 TRAN"},{"name":"i_v2_at0","key":"i_v2_at0","index":0,"value":-0.5343835071549243,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 TRAN"},{"name":"i_v1_at0","key":"i_v1_at0","index":0,"value":3.5383507154566995e-13,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 TRAN"}]} +{"id":"deepseek:00779_2aee08272d28a456:465056fdfd0c91c2","source":"deepseek","example_id":"00779_2aee08272d28a456","test_name":"test_test_779_diode_steering_input_protection_2aee08272d28a456","netlist_hash":"465056fdfd0c91c2","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Design a diode steering network to protect an analog input from overvoltage. Use two diodes to clamp the input node between 5V and ground, with a series current-limiting resistor.","pair_ids":["03f386982f97f251","fca03dab8bdbcc7b","5c9d8fde57fe0869"],"prompts":["Design a diode steering network to protect an analog input from overvoltage. Use two diodes to clamp the input node between 5V and ground, with a series current-limiting resistor.","Create a transient simulation of a diode clamp circuit that limits the voltage at a sensitive input node when driven by a pulse source exceeding the supply rails.","Implement a simple input protection circuit using a resistor and two schottky-like diodes to 5V and 0V; verify the clamped peak voltages during a -2V to 10V input pulse."],"measurements":[{"name":"vclamp_min","key":"vclamp_min","index":0,"value":-0.6736497544554259,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 TRAN"},{"name":"vclamp_max","key":"vclamp_max","index":0,"value":5.7259960115961785,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:01103_bd926db3f3a4f3ae:db4834633e292c12","source":"deepseek","example_id":"01103_bd926db3f3a4f3ae","test_name":"test_test_1103_bjt_class_b_push_pull_output_stage_bd926db3f3a4f3ae","netlist_hash":"db4834633e292c12","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Design a class-B push-pull output stage using complementary NPN and PNP BJTs, driven by a sinusoidal input, and simulate the transient response to observe crossover distortion.","pair_ids":["3cae8c11d6bc8324","cdc53e6618c56cbd","6b6ea4a865f38fa8"],"prompts":["Design a class-B push-pull output stage using complementary NPN and PNP BJTs, driven by a sinusoidal input, and simulate the transient response to observe crossover distortion.","Create a SPICE netlist for a basic BJT push-pull amplifier without bias, with 1 kHz sine input, and measure the output voltage swing and voltage gain.","Generate a complementary NPN/PNP class-B power output stage, run operating point and transient analyses, and quantify the maximum/minimum output voltages and the RMS voltage gain."],"measurements":[{"name":"vin_rms","key":"vin_rms","index":0,"value":7.071166808861772,"value_is_finite":true,"success":true,"measurement_type":"RMS","simulation_name":"#2 TRAN"},{"name":"min_out","key":"min_out","index":0,"value":-9.228126477743222,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#2 TRAN"},{"name":"max_out","key":"max_out","index":0,"value":9.228126477743222,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#2 TRAN"},{"name":"vout_rms","key":"vout_rms","index":0,"value":6.391215282351288,"value_is_finite":true,"success":true,"measurement_type":"RMS","simulation_name":"#2 TRAN"},{"name":"gain_ratio","key":"gain_ratio","index":0,"value":0.9038416791895857,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#2 TRAN"}]} +{"id":"deepseek:01366_d869f9576551172d:4ab0fa930bab5fad","source":"deepseek","example_id":"01366_d869f9576551172d","test_name":"test_test_1366_cmos_tg_latch_d869f9576551172d","netlist_hash":"4ab0fa930bab5fad","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"The circuit is a positive-level-sensitive D-latch built with CMOS transmission gates and standard inverters.","pair_ids":["e5030bbcd06fe5e8","72a74eb7fbc177a5","298a37de9635e997"],"prompts":["The circuit is a positive-level-sensitive D-latch built with CMOS transmission gates and standard inverters.","When clk=high, the input transmission gate is on, feedback transmission gate is off, making the latch transparent: Q follows D.","When clk=low, the input transmission gate turns off and the feedback transmission gate turns on, holding the previous state regardless of D changes."],"measurements":[{"name":"v_q_4n","key":"v_q_4n","index":0,"value":3.3000174447755413,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"v_q_9n","key":"v_q_9n","index":0,"value":3.2999999947135064,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"v_q_14n","key":"v_q_14n","index":0,"value":2.911977430898422e-07,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00061_337079027fb4941e:584bf3c7307746bb","source":"deepseek","example_id":"00061_337079027fb4941e","test_name":"test_test_61_first_order_rc_low_pass_filter_337079027fb4941e","netlist_hash":"584bf3c7307746bb","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Basic RC low\u2011pass filter: 1k\u03a9 resistor and 1\u00b5F capacitor.","pair_ids":["b0e1f62c04e2beea","ad03f1d46adf12b0","149f2ff5dd97db41"],"prompts":["Basic RC low\u2011pass filter: 1k\u03a9 resistor and 1\u00b5F capacitor.","AC analysis from 1 Hz to 10 kHz with 10 points per decade.","Measurements capture the DC gain and the -3 dB cutoff frequency."],"measurements":[{"name":"cutoff_freq","key":"cutoff_freq","index":0,"value":158.78002247144133,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 ac"},{"name":"dc_gain","key":"dc_gain","index":0,"value":-0.00017144920495022439,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 ac"}]} +{"id":"deepseek:02146_da70fb3db0422e93:560ad56545fb8a0b","source":"deepseek","example_id":"02146_da70fb3db0422e93","test_name":"test_test_2146_rtd_bridge_inst_amp_da70fb3db0422e93","netlist_hash":"560ad56545fb8a0b","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Wheatstone bridge with PT100 RTD in one leg, powered by 5 V.","pair_ids":["1a71635f4ddfa0d3","03e0f2f7649ee009","6a671a50cac06b77"],"prompts":["Wheatstone bridge with PT100 RTD in one leg, powered by 5 V.","Three\u2011op\u2011amp instrumentation amplifier with gain \u2248 12.5, converting bridge differential voltage to single\u2011ended output.","DC sweep of temperature from 0\u00b0C to 100\u00b0C using a behavioral resistor controlled by swept voltage Vtemp."],"measurements":[{"name":"VOUT_DIFF","key":"VOUT_DIFF","index":0,"value":5.043817900063004,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#2 DC"},{"name":"VOUT0","key":"VOUT0","index":0,"value":2.9103830456733704e-11,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"VOUT100","key":"VOUT100","index":0,"value":5.043817900063004,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"}]} +{"id":"deepseek:00280_3eae93507a1badfc:e551c8b2ee6f270d","source":"deepseek","example_id":"00280_3eae93507a1badfc","test_name":"test_test_280_jfet_common_source_3eae93507a1badfc","netlist_hash":"e551c8b2ee6f270d","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Common-source JFET amplifier with source bypass capacitor increases gain.","pair_ids":["7b8ff33a48703564","27fb3ce83997f957","46759aa6aca34632","8d187254a6a510ac"],"prompts":["Common-source JFET amplifier with source bypass capacitor increases gain.","Gate bias is 0 V DC through Rg, source self-biases via Rs.","At 1 kHz, C3 bypasses Rs, raising gain to about 20.","Model parameters VTO and BETA adjusted to set Id\u22481 mA and gm\u22482.4 mS."],"measurements":[{"name":"gain_db","key":"gain_db","index":0,"value":26.253079566703907,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"vd","key":"vd","index":0,"value":4.8886556657617835,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#3 DC"},{"name":"vgs","key":"vgs","index":0,"value":-1.0111285077257894,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#3 DC"},{"name":"id","key":"id","index":0,"value":0.0010111344334238217,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#3 DC"},{"name":"vs","key":"vs","index":0,"value":1.0111344275040433,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#3 DC"}]} +{"id":"deepseek:00751_e05a27b2e7405992:43a3c01a999d78cd","source":"deepseek","example_id":"00751_e05a27b2e7405992","test_name":"test_test_751_diode_clamp_to_negative_rail_e05a27b2e7405992","netlist_hash":"43a3c01a999d78cd","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"The circuit is a diode clamp using a negative supply rail as the clamping reference.","pair_ids":["2cd3b06c0897a3a7","31c5136fb088d981","f0e02b6ec531528f","edd9dca2ea3c8c15"],"prompts":["The circuit is a diode clamp using a negative supply rail as the clamping reference.","C1 AC-couples the PULSE source; D1 and R1 to VNEG set the DC bias.","R1 from clamp to VNEG provides a DC path to the negative rail, enabling the capacitor to charge to the required offset.","Simulate for 20 ms and measure from 10 ms to 20 ms to capture steady-state behavior."],"measurements":[{"name":"vmin","key":"vmin","index":0,"value":-5.626352748952935,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 TRAN"},{"name":"vmax","key":"vmax","index":0,"value":-3.5545248288945377,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"},{"name":"vavg","key":"vavg","index":0,"value":-4.586975733053075,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00063_50372b7aea0a01e4:e4b1c713a0623351","source":"deepseek","example_id":"00063_50372b7aea0a01e4","test_name":"test_test_63_rc_low_pass_filter_50372b7aea0a01e4","netlist_hash":"e4b1c713a0623351","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"First-order passive RC low-pass filter with R=1k and C=1uF","pair_ids":["22505a201465171d","f5989c74267375be","3527c503269e7b1c"],"prompts":["First-order passive RC low-pass filter with R=1k and C=1uF","AC sweep from 1 Hz to 100 kHz with 10 points per decade","Measure DC gain and -3 dB cutoff frequency"],"measurements":[{"name":"f3db","key":"f3db","index":0,"value":159.14972249738332,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 AC"},{"name":"gain_dc","key":"gain_dc","index":0,"value":-0.00017144920495022439,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 AC"}]} +{"id":"deepseek:01903_d72cffe958e5849c:0beb6de35faf0b09","source":"deepseek","example_id":"01903_d72cffe958e5849c","test_name":"test_test_1903_shunt_regulator_opamp_d72cffe958e5849c","netlist_hash":"0beb6de35faf0b09","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"Shunt voltage regulator using an op-amp as error amplifier.","pair_ids":["4dd4dad46f81f117","c907cf5f3893b636","93f96e993ef619a6","22ac578dbbbdc147","38de2ab0d61f10c5"],"prompts":["Shunt voltage regulator using an op-amp as error amplifier.","Op-amp compares feedback voltage FB to 2.5V reference and drives NPN transistor Q1.","Q1 shunts excess current from OUT to ground to maintain FB = VREF.","At sufficient input voltage, Vout regulated to 7.5V (VREF * (R1+R2)/R2).","Dropout occurs when input voltage is too low to supply load current through RS."],"measurements":[{"name":"vout_at_vin8","key":"vout_at_vin8","index":0,"value":6.662964523475709,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"vout_at_vin10","key":"vout_at_vin10","index":0,"value":7.500036615063436,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"vout_at_vin12","key":"vout_at_vin12","index":0,"value":7.500065585249104,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"}]} +{"id":"deepseek:00470_160d3c8275eff75e:84b042964682ece3","source":"deepseek","example_id":"00470_160d3c8275eff75e","test_name":"test_test_470_bridged_t_resistive_attenuator_160d3c8275eff75e","netlist_hash":"84b042964682ece3","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Bridged-T attenuator provides 6 dB loss in a 50 ohm system.","pair_ids":["044d301b1a3ebea5","28ea500a59e315d7","8c897f7fc24cfd8b"],"prompts":["Bridged-T attenuator provides 6 dB loss in a 50 ohm system.","All resistors (R1, R2, R3, R4) are 50 ohms for a 6 dB bridged-T configuration.","AC analysis from 100 Hz to 100 kHz measures flat attenuation across the audio band."],"measurements":[{"name":"attenuation_db","key":"attenuation_db","index":0,"value":-6.0205999132796215,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#2 AC"},{"name":"Vout_mag","key":"Vout_mag","index":0,"value":0.2500000000000001,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#2 AC"},{"name":"Vin_mag","key":"Vin_mag","index":0,"value":0.5000000000000001,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#2 AC"}]} +{"id":"deepseek:00040_010f89b647c29701:8a732a225861934f","source":"deepseek","example_id":"00040_010f89b647c29701","test_name":"test_test_40_two_pole_passive_rc_ladder_lowpass_010f89b647c29701","netlist_hash":"8a732a225861934f","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Two-pole passive RC ladder low-pass filter","pair_ids":["4973a59fa43b14c3","3f3e471f9d00c642","7b55f0b8e0596d2c"],"prompts":["Two-pole passive RC ladder low-pass filter","Uses 1k\u03a9 resistors and 100nF capacitors","The -3dB cutoff frequency is around 600 Hz due to loading between stages"],"measurements":[{"name":"f3dB","key":"f3dB","index":0,"value":594.2324044210102,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 AC"},{"name":"gain_lf","key":"gain_lf","index":0,"value":-1.2001665336804643e-05,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:00632_d8bfb714e5497e1e:d8bfb714e5497e1e","source":"deepseek","example_id":"00632_d8bfb714e5497e1e","test_name":"test_test_632_rc_differentiator_edge_detector_d8bfb714e5497e1e","netlist_hash":"d8bfb714e5497e1e","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Design an RC differentiator circuit to detect edges of a 10 kHz square wave.","pair_ids":["aea19d66a8340785","8b0f43a7d9915354","56a07a039eaeb0d5"],"prompts":["Design an RC differentiator circuit to detect edges of a 10 kHz square wave.","Create a passive edge detector using a capacitor and resistor for a pulse input.","Implement a high-pass filter that outputs spikes at the transitions of a square wave."],"measurements":[{"name":"vmin","key":"vmin","index":0,"value":-4.974840503111176,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 TRAN"},{"name":"vmax","key":"vmax","index":0,"value":4.975082026987382,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:01766_4b337647227de71a:fe4569602bc89385","source":"deepseek","example_id":"01766_4b337647227de71a","test_name":"test_test_1766_op_amp_wien_bridge_oscillator_with_diode_amplitude_control_4b337647227de71a","netlist_hash":"fe4569602bc89385","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Wien bridge oscillator with op-amp (E1) and diode amplitude control.","pair_ids":["6eb3461f7155199f","1f56aea7f94d19e3","844bf0440f222427"],"prompts":["Wien bridge oscillator with op-amp (E1) and diode amplitude control.","Diode limiter adjusts gain to stabilize amplitude around 1-2V peak.","Frequency set by R1,R2,C1,C2 to approximately 1 kHz."],"measurements":[{"name":"t2","key":"t2","index":0,"value":0.008964404865534278,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 TRAN"},{"name":"vpp","key":"vpp","index":0,"value":1.2079795929676038,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#1 TRAN"},{"name":"t1","key":"t1","index":0,"value":0.003946302019381502,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 TRAN"},{"name":"frequency","key":"frequency","index":0,"value":996.3924920019016,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:02080_eb5c9eb7fac93178:9afb70a7897b87ab","source":"deepseek","example_id":"02080_eb5c9eb7fac93178","test_name":"test_test_2080_gilbert_cell_mixer_eb5c9eb7fac93178","netlist_hash":"9afb70a7897b87ab","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Design a Gilbert cell mixer using BJT differential pairs and measure conversion gain.","pair_ids":["99efa3e31f56ddba","c1add9125d84e7ba","df54d5ddc167574b"],"prompts":["Design a Gilbert cell mixer using BJT differential pairs and measure conversion gain.","Create a SPICE netlist for a Gilbert mixer with NPN transistors and pair of sine wave sources for RF and LO.","Simulate a BJT Gilbert cell mixer that down-converts 11MHz RF to 1MHz IF using a 10MHz LO, and verify the conversion gain."],"measurements":[{"name":"vin_rms","key":"vin_rms","index":0,"value":0.014136435427200916,"value_is_finite":true,"success":true,"measurement_type":"RMS","simulation_name":"#2 TRAN"},{"name":"vout_rms","key":"vout_rms","index":0,"value":0.42144857197382113,"value_is_finite":true,"success":true,"measurement_type":"RMS","simulation_name":"#2 TRAN"},{"name":"gain","key":"gain","index":0,"value":29.812930858289924,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#2 TRAN"}]} +{"id":"deepseek:01152_6c2e31f372079be6:5849b0d28af231d8","source":"deepseek","example_id":"01152_6c2e31f372079be6","test_name":"test_test_1152_bjt_schmitt_trigger_discrete_pair_6c2e31f372079be6","netlist_hash":"5849b0d28af231d8","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"BJT Schmitt trigger built with two NPN transistors.","pair_ids":["127a5eb8fb1e22be","716324b738368fb2","e5881607abe172f7","74732f99908fb0de"],"prompts":["BJT Schmitt trigger built with two NPN transistors.","The input is a triangle wave from 0 to 5V and back.","The output switches high when the input exceeds the upper threshold (~2.0V), and low when the input falls below the lower threshold (~1.8V).","Hysteresis is measured as V_IH - V_IL."],"measurements":[{"name":"V_IL","key":"V_IL","index":0,"value":1.8332357278061178,"value_is_finite":true,"success":true,"measurement_type":"FIND_WHEN","simulation_name":"#1 TRAN"},{"name":"V_IH","key":"V_IH","index":0,"value":1.8552405387181374,"value_is_finite":true,"success":true,"measurement_type":"FIND_WHEN","simulation_name":"#1 TRAN"},{"name":"hysteresis","key":"hysteresis","index":0,"value":1.8552405387181374,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:01246_b92498756a98a30f:0bd11db9d0e59354","source":"deepseek","example_id":"01246_b92498756a98a30f","test_name":"test_test_1246_cmos_telescopic_cascode_amplifier_b92498756a98a30f","netlist_hash":"0bd11db9d0e59354","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"CMOS telescopic cascode amplifier with NMOS input pair, NMOS cascode devices, and PMOS cascode current mirror load.","pair_ids":["5b0057c78d48a792","21233515a0c320db","1ab0c3bf6fe55ee8","bb85439cc39ada43","9daedda9738e6c74"],"prompts":["CMOS telescopic cascode amplifier with NMOS input pair, NMOS cascode devices, and PMOS cascode current mirror load.","Operates with \u00b12.5V supplies and a tail current of 500 \u00b5A.","All transistors scaled to W=50U L=0.5U for proper biasing in saturation.","Provides high gain (>20 dB) with a unity-gain frequency in the megahertz range.","Small load capacitance of 1 pF ensures bandwidth >1 kHz to keep low-frequency gain flat."],"measurements":[{"name":"vds1_dc","key":"vds1_dc","index":0,"value":1.0197471660706867,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#3 DC"},{"name":"max_gain","key":"max_gain","index":0,"value":72.80751567952134,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#2 AC"},{"name":"ugfreq","key":"ugfreq","index":0,"value":359945829.3162941,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#2 AC"},{"name":"gain_at_1k","key":"gain_at_1k","index":0,"value":72.80686746830794,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"vout_dc","key":"vout_dc","index":0,"value":1.2017868947810229,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#3 DC"}]} +{"id":"deepseek:00105_5f314cc44ea4e6b0:5f314cc44ea4e6b0","source":"deepseek","example_id":"00105_5f314cc44ea4e6b0","test_name":"test_test_105_l_section_matching_network_5f314cc44ea4e6b0","netlist_hash":"5f314cc44ea4e6b0","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Design an L-section matching network to transform a 200 ohm load to a 50 ohm source at 1 MHz. Use SPICE with AC analysis and measure output voltage.","pair_ids":["c905772df94906e6","92254c4145d5919a","0821b9ebf74737fb"],"prompts":["Design an L-section matching network to transform a 200 ohm load to a 50 ohm source at 1 MHz. Use SPICE with AC analysis and measure output voltage.","Generate an SPICE netlist for an LC matching network operating at 1 MHz, matching 200 ohms to 50 ohms, and verify the output amplitude.","Create a measured SPICE circuit for an L-match that converts 200 ohms to 50 ohms, using a 1 MHz source, and confirm the output is around 1V peak."],"measurements":[{"name":"vout_at_1MHz","key":"vout_at_1MHz","index":0,"value":0.9999995307432178,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"max_vout","key":"max_vout","index":0,"value":0.9999995307432179,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 AC"}]} +{"id":"deepseek:00778_8e5748e4e94aef52:e596e87637906c64","source":"deepseek","example_id":"00778_8e5748e4e94aef52","test_name":"test_test_778_diode_steering_input_protection_8e5748e4e94aef52","netlist_hash":"e596e87637906c64","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Create a diode steering network to protect an input pin from overvoltage. Use two diodes clamping to +5V and -5V supplies, with a 1k\u03a9 series resistor. Apply a pulse input that swings from -10V to +10V. Run a transient simulation and measure the maximum and minimum output voltages.","pair_ids":["6236cc6aa2221fce","c6bacc536aca8024","49d5d427d36f1bca"],"prompts":["Create a diode steering network to protect an input pin from overvoltage. Use two diodes clamping to +5V and -5V supplies, with a 1k\u03a9 series resistor. Apply a pulse input that swings from -10V to +10V. Run a transient simulation and measure the maximum and minimum output voltages.","Design an input protection circuit that limits the voltage at the output node to approximately \u00b15.7V. Use a pulse source with 10V amplitude, 1\u03bcs rise/fall times, and a 2ms period. Include a 1k\u03a9 resistor and diodes connected to +5V and -5V rails. Measure the peak output voltages.","Simulate a diode clamping circuit for ESD protection. The input is a 20Vpp pulse at 500Hz. The diodes should steer excess current to the power supplies. Use a 1k\u03a9 input resistor. Measure the output voltage range over a 5ms transient."],"measurements":[{"name":"max_vout","key":"max_vout","index":0,"value":5.697145580423512,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"},{"name":"min_vout","key":"min_vout","index":0,"value":-5.697145580423513,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:02382_ea72184615d913c7:58ecc7504e9edd4e","source":"deepseek","example_id":"02382_ea72184615d913c7","test_name":"test_test_2382_param_res_div_ea72184615d913c7","netlist_hash":"58ecc7504e9edd4e","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"This circuit is a parameterized resistor voltage divider.","pair_ids":["64ddd536517341e6","60bb8b722b5ce95d","a82135e72f2ffb9f"],"prompts":["This circuit is a parameterized resistor voltage divider.","It uses .PARAM to define component values.","The output voltage is measured via .MEAS OP."],"measurements":[{"name":"vout","key":"vout","index":0,"value":6.666666666666666,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 OP"}]} +{"id":"deepseek:00032_7819beca88b32e0d:7819beca88b32e0d","source":"deepseek","example_id":"00032_7819beca88b32e0d","test_name":"test_test_32_rc_delay_high_z_7819beca88b32e0d","netlist_hash":"7819beca88b32e0d","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"Design an RC delay network with R=1k\u03a9 and C=1\u00b5F, driven by a voltage pulse source, and connected to a high-impedance load. Simulate the transient response and measure the time to reach 63% of the input voltage.","pair_ids":["b697cf91044e9e79","4d0b53809a812199","3bb4e8155f57f4d4","d0af8f893efd11c7","2c1f182945b3be7e"],"prompts":["Design an RC delay network with R=1k\u03a9 and C=1\u00b5F, driven by a voltage pulse source, and connected to a high-impedance load. Simulate the transient response and measure the time to reach 63% of the input voltage.","Build a passive RC low-pass filter with a time constant of 1ms. Use a step input from 0 to 5V. Measure the delay until the output reaches 3.15V.","Create a simple RC circuit that delays a step signal. The driving source is a 5V pulse, and the load has an impedance of 1M\u03a9. Run a transient analysis to determine the 63% rise time.","Simulate an RC delay line: a 1k\u03a9 resistor and 1\u00b5F capacitor to ground. The input is a 0-5V pulse. Measure the time at which Vout crosses 3.15V.","Produce an RC delay element with 1k\u03a9 and 1\u00b5F, followed by a 1M\u03a9 load. Use a transient simulation to find the propagation delay from the input step to the output reaching 63% of its final value."],"measurements":[{"name":"delay_time","key":"delay_time","index":0,"value":0.000995959464846316,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:02453_6ab2d2aeaa4a7317:ee85b3320e713ee1","source":"deepseek","example_id":"02453_6ab2d2aeaa4a7317","test_name":"test_test_2453_capacitive_sensor_charge_amplifier_6ab2d2aeaa4a7317","netlist_hash":"ee85b3320e713ee1","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"The reset switch across the feedback capacitor is closed from ~1 \u00b5s to 11 \u00b5s, forcing the output to approximately Vref = 1.25 V.","pair_ids":["cf5353870781d1b2","9294e12733896147","f3aa8c8580705c39"],"prompts":["The reset switch across the feedback capacitor is closed from ~1 \u00b5s to 11 \u00b5s, forcing the output to approximately Vref = 1.25 V.","After the switch opens, the sensor capacitor Cs is driven from 0 V to 1 V at 12 \u00b5s, causing the output to step down by (Cs/Cf) = 0.1 V to ~1.15 V.","The 100 M\u03a9 feedback resistor slowly returns the output to Vref, but its time constant (0.1 s) is negligible over the 50 \u00b5s simulation."],"measurements":[{"name":"vout_reset","key":"vout_reset","index":0,"value":1.2499875001230976,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"delta_v","key":"delta_v","index":0,"value":-0.0999839011928998,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 TRAN"},{"name":"vout_final","key":"vout_final","index":0,"value":1.1500035989301978,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:01852_c8772737ed2c1363:c202770e8cbb2626","source":"deepseek","example_id":"01852_c8772737ed2c1363","test_name":"test_test_1852_sawtooth_generator_current_switch_c8772737ed2c1363","netlist_hash":"c202770e8cbb2626","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Design a sawtooth generator using a current source, capacitor, and switch with a pulse reset.","pair_ids":["61e34d1e40c47c1a","40c264c91ac148f3","fe163d2ea8fc5be1","ccdcd0c02ff29560"],"prompts":["Design a sawtooth generator using a current source, capacitor, and switch with a pulse reset.","Create an oscillator that produces a sawtooth waveform by charging a capacitor with a constant current and periodically resetting it with a switch.","Build a circuit that generates a linear ramp voltage reset by a voltage-controlled switch, yielding a sawtooth output.","Develop a simple sawtooth oscillator where a current source charges a capacitor and a switch controlled by a pulse discharges it."],"measurements":[{"name":"vmin","key":"vmin","index":0,"value":0,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 TRAN"},{"name":"ampl","key":"ampl","index":0,"value":4.899804956180525,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 TRAN"},{"name":"vmax","key":"vmax","index":0,"value":4.899804956180525,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"},{"name":"period","key":"period","index":0,"value":4.999999999687416e-05,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 TRAN"},{"name":"freq","key":"freq","index":0,"value":20000.000001250337,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:01135_0b046dc1cc4faecb:a1d65adf63d127a0","source":"deepseek","example_id":"01135_0b046dc1cc4faecb","test_name":"test_test_1135_bjt_colpitts_oscillator_0b046dc1cc4faecb","netlist_hash":"a1d65adf63d127a0","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"BJT Colpitts oscillator biased from 12V supply","pair_ids":["0e75b96aa581d5e6","9f88060b86837a22","f65f9958513f12c0"],"prompts":["BJT Colpitts oscillator biased from 12V supply","Uses 10uH inductor and 100pF capacitors in the tank circuit","Oscillates around 7.12 MHz with stable sinusoidal output"],"measurements":[{"name":"Tperiod","key":"Tperiod","index":0,"value":1.413698777744159e-07,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 TRAN"},{"name":"Vpp","key":"Vpp","index":0,"value":24.781788590303144,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#1 TRAN"},{"name":"t2","key":"t2","index":0,"value":7.236825179867524e-05,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 TRAN"},{"name":"t1","key":"t1","index":0,"value":7.222688192090082e-05,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 TRAN"},{"name":"fosc","key":"fosc","index":0,"value":7073642.672279178,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:01861_c7661d58f5140ed0:7805d7562e8c5039","source":"deepseek","example_id":"01861_c7661d58f5140ed0","test_name":"test_test_1861_voltage_controlled_oscillator_current_starved_integrator_c7661d58f5140ed0","netlist_hash":"7805d7562e8c5039","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Current-starved integrator VCO using E-source op-amp and comparator","pair_ids":["76079d0314181c44","55b3da73b75b8f41","e5b4dfec3e920f9c","1334511a1466b145"],"prompts":["Current-starved integrator VCO using E-source op-amp and comparator","Control voltage Vctrl varies the charging current via a multiplier","Schmitt trigger comparator with positive feedback sets thresholds","Output frequency is proportional to Vctrl, approximately f = 1000*Vctrl"],"measurements":[{"name":"period","key":"period","index":0,"value":0.0006693082634549126,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 TRAN (vctrl_val=1)"},{"name":"period","key":"period","index":1,"value":0.0003455079323928615,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#2 TRAN (vctrl_val=2)"},{"name":"period","key":"period","index":2,"value":0.0002497473676372284,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#3 TRAN (vctrl_val=3)"},{"name":"period","key":"period","index":3,"value":0.00017275625067981576,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#4 TRAN (vctrl_val=4)"},{"name":"period","key":"period","index":4,"value":0.00015868654869902134,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#5 TRAN (vctrl_val=5)"},{"name":"freq","key":"freq","index":0,"value":1494.0798651402938,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 TRAN (vctrl_val=1)"},{"name":"freq","key":"freq","index":1,"value":2894.2895553059116,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#2 TRAN (vctrl_val=2)"},{"name":"freq","key":"freq","index":2,"value":4004.0462066152954,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#3 TRAN (vctrl_val=3)"},{"name":"freq","key":"freq","index":3,"value":5788.502563958668,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#4 TRAN (vctrl_val=4)"},{"name":"freq","key":"freq","index":4,"value":6301.731357814623,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#5 TRAN (vctrl_val=5)"}]} +{"id":"deepseek:00748_6baccd66e8211ab9:01936165b3167f5a","source":"deepseek","example_id":"00748_6baccd66e8211ab9","test_name":"test_test_748_diode_clamp_to_negative_rail_6baccd66e8211ab9","netlist_hash":"01936165b3167f5a","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Design a negative voltage clamper using a diode that clamps the positive peak to -4.3V.","pair_ids":["d801f33fd302f2e7","31988af93eba6aa8","904bd4e9e5e7ab86","ebc5f0f377dd3cd1"],"prompts":["Design a negative voltage clamper using a diode that clamps the positive peak to -4.3V.","Create a SPICE netlist for a diode clamping circuit that shifts an AC signal down so its maximum is around -4.3V.","Simulate a diode clamper with a -5V rail. Input is a 1V 1kHz sine wave. Measure the output voltage extrema.","Build a negative clamper using a 1N4148-like diode, a capacitor, and a resistor. Use a -5V supply for clamping."],"measurements":[{"name":"vmin","key":"vmin","index":0,"value":-6.295327015867395,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 TRAN"},{"name":"vmax","key":"vmax","index":0,"value":-4.371739804420977,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00591_b9c6d25e35bfe1d6:185c095213684bd8","source":"deepseek","example_id":"00591_b9c6d25e35bfe1d6","test_name":"test_test_591_lc_highpass_ladder_b9c6d25e35bfe1d6","netlist_hash":"185c095213684bd8","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"5th-order Chebyshev high-pass LC ladder with 0.5 dB passband ripple.","pair_ids":["46ee967d172fe23d","46cbed150573d782","c4b44a13efb7704d"],"prompts":["5th-order Chebyshev high-pass LC ladder with 0.5 dB passband ripple.","Component values scaled by 0.75 from the standard 1 kHz prototype to raise the -3 dB point above 1 kHz.","Source and load impedances are 50 ohms; AC analysis from 10 Hz to 100 kHz."],"measurements":[{"name":"f3db","key":"f3db","index":0,"value":1258.836952558176,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 AC"},{"name":"att100Hz","key":"att100Hz","index":0,"value":-127.37718491593961,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"att10kHz","key":"att10kHz","index":0,"value":-0.19899062264961492,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:01613_b6d59398316b850c:fa7cca35daa47f0a","source":"deepseek","example_id":"01613_b6d59398316b850c","test_name":"test_test_1613_op_amp_zero_crossing_detector_b6d59398316b850c","netlist_hash":"fa7cca35daa47f0a","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Zero-crossing detector using ideal op-amp (E source) with clamping diodes.","pair_ids":["7641cc45137b1f54","0921fce742d4d658","b8fd854adf1de1f9"],"prompts":["Zero-crossing detector using ideal op-amp (E source) with clamping diodes.","Converts 1kHz sine wave to square wave with amplitude \u2248\u00b15.7V.","Output transitions at input zero crossings with negligible delay."],"measurements":[{"name":"delay","key":"delay","index":0,"value":0,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 tran"},{"name":"t_rise2","key":"t_rise2","index":0,"value":0.0010000099448108576,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 tran"},{"name":"t_rise1","key":"t_rise1","index":0,"value":0,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 tran"},{"name":"Vout_low","key":"Vout_low","index":0,"value":0.0005000451625966953,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 tran"},{"name":"Vout_max","key":"Vout_max","index":0,"value":5.89331580980882,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 tran"},{"name":"period","key":"period","index":0,"value":0.0010000099448108576,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 tran"},{"name":"t_in0","key":"t_in0","index":0,"value":0,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 tran"},{"name":"Vout_high","key":"Vout_high","index":0,"value":7.163154472541592e-09,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 tran"},{"name":"Vout_min","key":"Vout_min","index":0,"value":-5.89331580980882,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 tran"},{"name":"t_out0","key":"t_out0","index":0,"value":0,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 tran"},{"name":"Vout_avg","key":"Vout_avg","index":0,"value":3.9373262713753086e-05,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 tran"}]} +{"id":"deepseek:02223_c05853bab52e46ff:f6bf021245fc7f03","source":"deepseek","example_id":"02223_c05853bab52e46ff","test_name":"test_test_2223_sar_adc_front_end_with_sample_hold_and_comparator_c05853bab52e46ff","netlist_hash":"f6bf021245fc7f03","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"4-bit SAR ADC front-end with sample-and-hold and comparator using ideal voltage-controlled switches.","pair_ids":["a936f3b71761dd78","f3bab3c25cd2d88e","7ec4d402892a0d32","a7cecb4c0c676d9f","403e348ee9f9425e"],"prompts":["4-bit SAR ADC front-end with sample-and-hold and comparator using ideal voltage-controlled switches.","Input voltage is 1.2 V; reference is 2.5 V; R-2R ladder sets binary-weighted DAC levels.","SAR logic emulated by sequentially applied bit-trial pulses b3\u2013b0, which control switch states.","Comparator modeled as a simple voltage-controlled voltage source with ternary threshold.","Sample switch controlled by 1 MHz clock; 10 pF holding capacitor stores sampled value."],"measurements":[{"name":"comp4","key":"comp4","index":0,"value":5,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 tran"},{"name":"comp3","key":"comp3","index":0,"value":5,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 tran"},{"name":"comp2","key":"comp2","index":0,"value":5,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 tran"},{"name":"comp1","key":"comp1","index":0,"value":0,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 tran"},{"name":"samp_out","key":"samp_out","index":0,"value":1.199999999999996,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 tran"}]} +{"id":"deepseek:02109_f53aafa8c1afccb4:f6f1c122300092c4","source":"deepseek","example_id":"02109_f53aafa8c1afccb4","test_name":"test_test_2109_synchronous_am_switching_demodulator_f53aafa8c1afccb4","netlist_hash":"f6f1c122300092c4","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Synchronous AM detector using two switches driven by complementary 1MHz square waves to perform full-wave rectification.","pair_ids":["9b1a697a8457b111","6a69206d4dca7e2f","c2437e3c8520d2e2","57ae0622c44704bc"],"prompts":["Synchronous AM detector using two switches driven by complementary 1MHz square waves to perform full-wave rectification.","Input AM signal: carrier 1MHz, modulation 10kHz, modulation index 0.5, scaled by 1.05 to ensure correct DC level.","Low-pass filter (1k\u03a9, 1.5nF) removes carrier harmonics; high-pass filter (1nF, 100k\u03a9) removes DC offset.","Fine time step (0.01\u00b5s) ensures accurate simulation of switching behavior and measurement averages."],"measurements":[{"name":"vout_rms","key":"vout_rms","index":0,"value":0.2284115046958758,"value_is_finite":true,"success":true,"measurement_type":"RMS","simulation_name":"#1 TRAN"},{"name":"vout_dc","key":"vout_dc","index":0,"value":0.6615443133491555,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 TRAN"},{"name":"vout_pp","key":"vout_pp","index":0,"value":0.6902432928840061,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:02381_a8c13823d83dc721:7951a85c6199c6f5","source":"deepseek","example_id":"02381_a8c13823d83dc721","test_name":"test_test_2381_parameterized_resistor_divider_a8c13823d83dc721","netlist_hash":"7951a85c6199c6f5","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"A 5V DC supply powers a voltage divider formed by R1 (10k\u03a9) and R2 (30k\u03a9).","pair_ids":["b0c72610f140fcaf","88033d200968048b","afccb07282b0b6d3","7978d805a3560083"],"prompts":["A 5V DC supply powers a voltage divider formed by R1 (10k\u03a9) and R2 (30k\u03a9).","The top resistor R1 is connected between the supply and the output node, and the bottom resistor R2 connects the output to ground.","Parameters Vs, R1, and R2 are defined with .PARAM to allow easy value modifications.","A single-point DC sweep of V1 (from 5V to 5V in one step) serves as an operating point analysis, enabling .MEAS DC with AT=5 to capture the steady-state output voltage."],"measurements":[{"name":"vout","key":"vout","index":0,"value":3.75,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 DC"}]} +{"id":"deepseek:01031_015c4efef4d4b220:3a40f3adf7b22675","source":"deepseek","example_id":"01031_015c4efef4d4b220","test_name":"test_test_1031_wilson_mirror_degen_015c4efef4d4b220","netlist_hash":"3a40f3adf7b22675","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Improved Wilson current mirror using NPN BJTs with emitter degeneration resistors.","pair_ids":["01aaaa2b25c5c331","876f795d03e5ef64","2dd2f10526f20bd1"],"prompts":["Improved Wilson current mirror using NPN BJTs with emitter degeneration resistors.","Provides high output impedance and good mirroring accuracy.","Designed for 1 mA output current over a wide output voltage range."],"measurements":[{"name":"iout_at8","key":"iout_at8","index":0,"value":-0.0002773272819829877,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"iref","key":"iref","index":0,"value":0.0009988784817719107,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"iout_at5","key":"iout_at5","index":0,"value":-0.000266778214294604,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"}]} +{"id":"deepseek:00233_25f541e6091bea14:e3bbd91d23228208","source":"deepseek","example_id":"00233_25f541e6091bea14","test_name":"test_test_233_bjt_class_a_audio_output_25f541e6091bea14","netlist_hash":"e3bbd91d23228208","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"Single-ended class-A audio output stage using one NPN BJT in emitter-follower configuration","pair_ids":["a18e3d7a519557f7","543f3877ae427e2e","bbc41bf5fa3214d5","f726225372c561a9","172333bd20ab5a4c"],"prompts":["Single-ended class-A audio output stage using one NPN BJT in emitter-follower configuration","Resistive divider R1-R2 biases the base for mid-supply emitter voltage (~6 V)","Input sine with 2 V amplitude is AC-coupled via C1; output is capacitor-coupled to 8 ohm load","Emitter resistor RE=15 ohms sets quiescent current ~0.4 A, ensuring sufficient drive capability","Quiescent Vce ~6.3 V allows large voltage swing without saturation"],"measurements":[{"name":"vce_q","key":"vce_q","index":0,"value":6.454883401025512,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 TRAN"},{"name":"vce_min","key":"vce_min","index":0,"value":4.530455474939199,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#2 TRAN"},{"name":"vout_max","key":"vout_max","index":0,"value":1.9213776044641975,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#2 TRAN"}]} +{"id":"deepseek:02456_8b8db5d41ba1d291:fc06dcac68702893","source":"deepseek","example_id":"02456_8b8db5d41ba1d291","test_name":"test_test_2456_dtl_nand_gate_8b8db5d41ba1d291","netlist_hash":"fc06dcac68702893","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"Create a SPICE netlist of a DTL NAND gate using two input diodes, a series diode, and an NPN BJT. Include a DC sweep from 0 to 5V on one input while keeping the other at 5V, and measure output voltage at both extremes.","pair_ids":["28743f66547b6dba","a987fd02a76c92e3","338416c72986931a","279b3d33d008c719","d21f3c173e4dd913"],"prompts":["Create a SPICE netlist of a DTL NAND gate using two input diodes, a series diode, and an NPN BJT. Include a DC sweep from 0 to 5V on one input while keeping the other at 5V, and measure output voltage at both extremes.","Simulate a diode-transistor logic NAND gate with a 5V supply. Use a .DC analysis to verify the NAND truth table for both inputs high and one input low.","Design a simple DTL NAND gate circuit. Use behavioral models for diodes and BJT. Sweep one input voltage from 0 to 5V with the other input tied high, and record the output when the swept input is 0V and 5V.","Provide a measured SPICE netlist for a DTL NAND gate. Include a DC analysis that sweeps one input and measures the output low and output high voltages, with the other input fixed at logic high.","Generate a DTL NAND gate simulation netlist. It should have two input diodes, a level-shifting diode, one NPN transistor, and resistors. Perform a DC sweep and include .MEAS statements to extract the output voltage for both logic states."],"measurements":[{"name":"vout_high","key":"vout_high","index":0,"value":4.999999988416026,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 DC"},{"name":"vout_low","key":"vout_low","index":0,"value":0.05830898320253116,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 DC"}]} +{"id":"deepseek:00265_c3ba933f0a5a360b:d5fedca0d4a04750","source":"deepseek","example_id":"00265_c3ba933f0a5a360b","test_name":"test_test_265_mosfet_differential_pair_with_active_load_c3ba933f0a5a360b","netlist_hash":"d5fedca0d4a04750","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"The NMOS differential pair with PMOS current mirror load amplifies the difference between inp and inn.","pair_ids":["580bc5fd1824954d","68a4d159d3fb1df2","ac9e39c986314ff9"],"prompts":["The NMOS differential pair with PMOS current mirror load amplifies the difference between inp and inn.","The tail current is set by an NMOS current mirror with a reference resistor to VDD, providing about 100\u03bcA.","With zero input, the output is around 2.5V, and the small-signal gain is approximately 180V/V."],"measurements":[{"name":"GAIN","key":"GAIN","index":0,"value":177.15585845769849,"value_is_finite":true,"success":true,"measurement_type":"DERIV","simulation_name":"#2 DC"},{"name":"VOUT_MIN","key":"VOUT_MIN","index":0,"value":-1.5057645568516447,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#2 DC"},{"name":"VOUT_MAX","key":"VOUT_MAX","index":0,"value":4.374072347251207,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#2 DC"},{"name":"VOUT_OFFSET","key":"VOUT_OFFSET","index":0,"value":2.339406946355709,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"}]} +{"id":"deepseek:00475_e18530141105b3b5:2e91138b8dd5cb8c","source":"deepseek","example_id":"00475_e18530141105b3b5","test_name":"test_test_475_potentiometer_volume_control_e18530141105b3b5","netlist_hash":"2e91138b8dd5cb8c","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Design a passive volume control using a potentiometer and a source resistance.","pair_ids":["142a5bce7474f408","79769a397b3a83d9","290a593f48eda3ec"],"prompts":["Design a passive volume control using a potentiometer and a source resistance.","Simulate a potentiometer-based attenuator with a source impedance of 1k ohm.","Model a voltage divider volume control with a 10k potentiometer and a 1k source resistor."],"measurements":[{"name":"vout_mag","key":"vout_mag","index":0,"value":0.4545454545454545,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"}]} +{"id":"deepseek:00837_d67f93ff1bb2ba11:54f814cda3444019","source":"deepseek","example_id":"00837_d67f93ff1bb2ba11","test_name":"test_test_837_diode_antilog_d67f93ff1bb2ba11","netlist_hash":"54f814cda3444019","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Ideal op\u2011amp (E1) configured as an inverting amplifier with diode D1 in the input and feedback resistor Rf.","pair_ids":["c4b602811e402236","83849b97694b70d3","1765e629243ca8d6"],"prompts":["Ideal op\u2011amp (E1) configured as an inverting amplifier with diode D1 in the input and feedback resistor Rf.","The diode model DMOD has Is=1e-14 A and N=1, giving exponential I\u2011V behavior.","DC sweep of Vin from 0 to 0.7 V verifies exponential output growth, measured at key points."],"measurements":[{"name":"inv_vt","key":"inv_vt","index":0,"value":38.66251000707172,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 DC"},{"name":"vout0","key":"vout0","index":0,"value":1.758539266311534e-41,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 DC"},{"name":"ratio","key":"ratio","index":0,"value":47.762986603683736,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 DC"},{"name":"vout7","key":"vout7","index":0,"value":-12.424352430277485,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 DC"},{"name":"vout06","key":"vout06","index":0,"value":-0.26132537367920683,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 DC"},{"name":"vout05","key":"vout05","index":0,"value":-0.005471294662697078,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 DC"}]} +{"id":"deepseek:01333_90ea96cf48fe0549:e0a25326ffc32c53","source":"deepseek","example_id":"01333_90ea96cf48fe0549","test_name":"test_test_1333_mos_diode_connected_load_90ea96cf48fe0549","netlist_hash":"e0a25326ffc32c53","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Diode-connected NMOS with 1 k\u03a9 pull-up resistor demonstrates nonlinear load line","pair_ids":["b1f3425bbe7ca73e","20d9b6a3ca3d2dde","2ac58c130676bb37"],"prompts":["Diode-connected NMOS with 1 k\u03a9 pull-up resistor demonstrates nonlinear load line","Output follows supply until near threshold, then rises more slowly as MOSFET conducts","DC sweep captures turn-on knee and saturation-like behavior"],"measurements":[{"name":"ID5","key":"ID5","index":0,"value":0.0007026557317646454,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"VOUT3","key":"VOUT3","index":0,"value":2.773177461482197,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"VDD_AT_VOUT2_5","key":"VDD_AT_VOUT2_5","index":0,"value":2.67018280731388,"value_is_finite":true,"success":true,"measurement_type":"FIND_WHEN","simulation_name":"#2 DC"}]} +{"id":"deepseek:02450_655ceb27844e0f24:5e474068cd399118","source":"deepseek","example_id":"02450_655ceb27844e0f24","test_name":"test_test_2450_capacitive_sensor_interface_with_charge_amplifier_655ceb27844e0f24","netlist_hash":"5e474068cd399118","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Three charge amplifier circuits with different sensor capacitors C_sens (10pF, 15pF, 20pF) and fixed reference capacitor 10pF.","pair_ids":["3e7739dfa2ac86e8","ac768d98935ae7c9","ac57df062fb065f4"],"prompts":["Three charge amplifier circuits with different sensor capacitors C_sens (10pF, 15pF, 20pF) and fixed reference capacitor 10pF.","Each circuit driven by complementary square-wave excitation at pos and neg nodes.","Output amplitude measured from 150us to 190us to avoid startup transients."],"measurements":[{"name":"Vout_pp_3","key":"Vout_pp_3","index":0,"value":5.285810026517703,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#1 tran"},{"name":"Vout_pp_1","key":"Vout_pp_1","index":0,"value":6.930959636257757e-14,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#1 tran"},{"name":"Vout_pp_2","key":"Vout_pp_2","index":0,"value":2.6428917633415696,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#1 tran"}]} +{"id":"deepseek:00319_8e6e75ea1970c3ee:8e6e75ea1970c3ee","source":"deepseek","example_id":"00319_8e6e75ea1970c3ee","test_name":"test_test_319_non_inverting_amplifier_with_behavioral_e_source_8e6e75ea1970c3ee","netlist_hash":"8e6e75ea1970c3ee","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Design a non-inverting amplifier with a gain of 2 using an ideal op-amp.","pair_ids":["71ae48ae2c7f987c","2fcf15775a4116a9","e041a1494a513f95","70703a934fd4bbe8"],"prompts":["Design a non-inverting amplifier with a gain of 2 using an ideal op-amp.","Create a SPICE netlist for an AC analysis of a non-inverting op-amp with a feedback network.","Simulate a behavioral op-amp (E-source) configured as a non-inverting amplifier with 10k resistors.","I need a simple non-inverting amplifier circuit with AC gain measurement."],"measurements":[{"name":"gain_db","key":"gain_db","index":0,"value":6.020426197230019,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 AC"},{"name":"gain_mag","key":"gain_mag","index":0,"value":1.9999600008013658,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 AC"}]} +{"id":"deepseek:02406_7a83341e1e07d44e:a1f50add20c77a93","source":"deepseek","example_id":"02406_7a83341e1e07d44e","test_name":"test_test_2406_switched_capacitor_comparator_with_mosfet_switches_7a83341e1e07d44e","netlist_hash":"a1f50add20c77a93","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Switched-capacitor comparator with NMOS switch transistors and an ideal op-amp (G=1e6).","pair_ids":["cbcfe342b5226349","bee489646f86d51e","f82c4339c5a5ec05","bd8b6d9b3c018f72"],"prompts":["Switched-capacitor comparator with NMOS switch transistors and an ideal op-amp (G=1e6).","Auto-zero phase during phi1: the capacitor is charged to Vref offset, and the op-amp is in unity-gain forcing X=Vcm.","Comparison phase during phi2: the input is connected to the capacitor top plate, transferring the voltage difference to X, which is compared to Vcm.","Clamping diodes limit the output swing to approximately 0\u20135 V."],"measurements":[{"name":"vout_meas","key":"vout_meas","index":0,"value":-1.001754125571731,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"vin_thres","key":"vin_thres","index":0,"value":2.500736608116097,"value_is_finite":true,"success":true,"measurement_type":"FIND_WHEN","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00199_5cc2fb3493c60ddd:032521c1beafde58","source":"deepseek","example_id":"00199_5cc2fb3493c60ddd","test_name":"test_test_199_bjt_diff_pair_tail_curr_5cc2fb3493c60ddd","netlist_hash":"032521c1beafde58","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"BJT differential pair with a 2 mA tail current source and 5 k\u03a9 collector loads.","pair_ids":["f4e78bfea398437a","b426408580c07050","86a110ebb156294e"],"prompts":["BJT differential pair with a 2 mA tail current source and 5 k\u03a9 collector loads.","DC sweep of the differential input voltage from -0.2 V to +0.2 V with 1 mV steps.","Measures zero balance, full\u2011scale limits, and small\u2011signal gain to verify transfer characteristics."],"measurements":[{"name":"vmin","key":"vmin","index":0,"value":-9.892122248507642,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#2 DC"},{"name":"vmax","key":"vmax","index":0,"value":9.892161485764976,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#2 DC"},{"name":"vdiff0","key":"vdiff0","index":0,"value":8.15356671068912e-11,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"vdiff_minus10m","key":"vdiff_minus10m","index":0,"value":1.872931534977145,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"vdiff_plus10m","key":"vdiff_plus10m","index":0,"value":-1.872930825459016,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"}]} +{"id":"deepseek:00089_74ec599743082b7a:95cc5866123e3034","source":"deepseek","example_id":"00089_74ec599743082b7a","test_name":"test_test_89_twin_t_notch_filter_74ec599743082b7a","netlist_hash":"95cc5866123e3034","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Passive twin-T notch filter designed to reject a specific frequency (1.592 kHz) using only resistors and capacitors.","pair_ids":["03b2f1ee581f5faa","4bbf01bb8b883fcc","b9d14a5633a1bef0"],"prompts":["Passive twin-T notch filter designed to reject a specific frequency (1.592 kHz) using only resistors and capacitors.","Uses a balanced twin-T network to create a deep notch at the target frequency.","The frequency response is analyzed via AC simulation from 10 Hz to 10 kHz."],"measurements":[{"name":"pass_db","key":"pass_db","index":0,"value":-0.26805755688316574,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"notch_db","key":"notch_db","index":0,"value":-51.0614155162299,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:01215_10548fb6addba853:a87ad717f363009b","source":"deepseek","example_id":"01215_10548fb6addba853","test_name":"test_test_1215_pmos_cs_amp_resistive_10548fb6addba853","netlist_hash":"a87ad717f363009b","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"PMOS common-source amplifier with a 10k\u03a9 resistive load and 12V supply.","pair_ids":["1992e90dd4bdea92","c5c5844752384d63","5ed7e053c3968254"],"prompts":["PMOS common-source amplifier with a 10k\u03a9 resistive load and 12V supply.","Transistor biased with gate voltage of 9.6V to achieve ~0.5mA drain current.","AC analysis performed with input signal applied at gate via VGG AC source."],"measurements":[{"name":"gain_db","key":"gain_db","index":0,"value":17.177586310860733,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#2 AC"},{"name":"gain_lf","key":"gain_lf","index":0,"value":-7.225689837289929,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"}]} +{"id":"deepseek:00890_25cf07c879aa89f0:4438777eafb94d2f","source":"deepseek","example_id":"00890_25cf07c879aa89f0","test_name":"test_test_890_fixed_bias_common_emitter_bjt_amplifier_25cf07c879aa89f0","netlist_hash":"4438777eafb94d2f","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Fixed-bias common-emitter NPN BJT amplifier with 12V supply, 1M base resistor, and 4.7k collector resistor.","pair_ids":["99812bc6b511d2de","7bd58f28e5ae2f4f","f150e5bc1b588446"],"prompts":["Fixed-bias common-emitter NPN BJT amplifier with 12V supply, 1M base resistor, and 4.7k collector resistor.","DC operating point analysis gives VCE \u2248 6.7V and IC \u2248 1.13mA.","AC analysis shows a mid-band voltage gain around 200 V/V at 1kHz."],"measurements":[{"name":"max_gain","key":"max_gain","index":0,"value":205.0189705006705,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#2 AC"},{"name":"gain_1k","key":"gain_1k","index":0,"value":204.52441799189765,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"Icq","key":"Icq","index":0,"value":0.0011282231861603428,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#3 DC"},{"name":"Vceq","key":"Vceq","index":0,"value":6.697351025046389,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#3 DC"}]} +{"id":"deepseek:00492_b9d37a1d49d39dde:b9d37a1d49d39dde","source":"deepseek","example_id":"00492_b9d37a1d49d39dde","test_name":"test_test_492_zobel_load_stabilization_b9d37a1d49d39dde","netlist_hash":"b9d37a1d49d39dde","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Create a SPICE netlist for a Zobel network used in load stabilization, with a series RC across a resistive load, driven by a source with 10k output resistance. Run AC analysis and measure voltage at 1 Hz, 1.6 kHz, and 100 kHz.","pair_ids":["038776d4867dfcd9","4d8a7e39d27c1f1c","65b0b0597040c68a","f0ad3f15be686198"],"prompts":["Create a SPICE netlist for a Zobel network used in load stabilization, with a series RC across a resistive load, driven by a source with 10k output resistance. Run AC analysis and measure voltage at 1 Hz, 1.6 kHz, and 100 kHz.","Simulate a Zobel impedance stabilization circuit: a 100-ohm resistor in series with 100 nF capacitor placed across a 1k load, driven by a voltage source with 10k output impedance. Perform AC sweep from 1 Hz to 1 MHz and measure the output voltage drop at high frequency.","Design a series RC Zobel network for a 1k ohm load, using Rz=100R and Cz=100nF, with a 10k source resistance. Run an AC simulation and verify that the gain drops by about 3 dB around 1.6 kHz and by over 10 dB at 100 kHz.","I need an AC analysis of a passive Zobel network for load stabilization. The network consists of a 100 \u03a9 resistor and 100 nF capacitor in series, placed across a 1 k\u03a9 load. The source has 10 k\u03a9 output impedance. Measure the output voltage at low, mid, and high frequencies."],"measurements":[{"name":"v_db_at_1","key":"v_db_at_1","index":0,"value":-20.827855431859675,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"v_db_at_1k6","key":"v_db_at_1k6","index":0,"value":-23.857220485548005,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"v_db_at_100k","key":"v_db_at_100k","index":0,"value":-40.79890189152241,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:00305_f64b131655836535:398fb16b4d6421bd","source":"deepseek","example_id":"00305_f64b131655836535","test_name":"test_test_305_inverting_opamp_ac_f64b131655836535","netlist_hash":"398fb16b4d6421bd","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Inverting amplifier using ideal op-amp (E source) with gain -10.","pair_ids":["d5a2f86edfc8b36d","187f983f743bc07a","6809fe67a923c65d"],"prompts":["Inverting amplifier using ideal op-amp (E source) with gain -10.","R1=1k, R2=10k, E1 gain=100000, input AC=1V.","Measures real part of output voltage at 1kHz, expecting -10V."],"measurements":[{"name":"gain","key":"gain","index":0,"value":-10.00110012101331,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:02187_3f3e9bdb139c7d10:3386e99ebb1cc883","source":"deepseek","example_id":"02187_3f3e9bdb139c7d10","test_name":"test_test_2187_binary_weighted_dac_3f3e9bdb139c7d10","netlist_hash":"3386e99ebb1cc883","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"4-bit binary-weighted inverting DAC using ideal op-amp","pair_ids":["bf4e4f7f5e897243","ef829018aa1c5ea4","3dbd3e12fc566d87"],"prompts":["4-bit binary-weighted inverting DAC using ideal op-amp","Resistors weighted by 10k/20k/40k/80k for bits 3-0","DC sweep over all 16 input combinations from 0V to 5V"],"measurements":[{"name":"vout_min","key":"vout_min","index":0,"value":-9.375269538999246,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 DC"},{"name":"vout_max","key":"vout_max","index":0,"value":0,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 DC"}]} +{"id":"deepseek:02224_ccafecf9d3f363a2:93ca3c929fc8e6e8","source":"deepseek","example_id":"02224_ccafecf9d3f363a2","test_name":"test_test_2224_sigma_delta_modulator_first_order_ccafecf9d3f363a2","netlist_hash":"93ca3c929fc8e6e8","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"First-order sigma-delta modulator with 1kHz sine input, 1MHz clock, op-amp integrator, switched capacitor sample-and-hold, and comparator.","pair_ids":["0a66fbd271741e35","3b92b62a4cd6efb8","eb972c22b27fa914"],"prompts":["First-order sigma-delta modulator with 1kHz sine input, 1MHz clock, op-amp integrator, switched capacitor sample-and-hold, and comparator.","Feedback via matched 10k resistors ensures pulse-density modulation.","Low-pass filter (1k\u03a9, 200nF) recovers input signal with approximately 0.22V RMS."],"measurements":[{"name":"VIN_RMS","key":"VIN_RMS","index":0,"value":0.35605896906607554,"value_is_finite":true,"success":true,"measurement_type":"RMS","simulation_name":"#1 TRAN"},{"name":"VOUT_RMS","key":"VOUT_RMS","index":0,"value":0.28060003258473154,"value_is_finite":true,"success":true,"measurement_type":"RMS","simulation_name":"#1 TRAN"},{"name":"VOUT_AVG","key":"VOUT_AVG","index":0,"value":-0.0036837481131850986,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:01264_434a015653034688:806609f3ceae49a9","source":"deepseek","example_id":"01264_434a015653034688","test_name":"test_test_1264_cmos_differential_pair_with_current_mirror_load_434a015653034688","netlist_hash":"806609f3ceae49a9","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"CMOS differential pair with NMOS input transistors and PMOS active current mirror load","pair_ids":["e502f8e2e89a6570","62aa2ef5d6fa5073","1bc2790e95faeaa1","1f283e42e2a84549"],"prompts":["CMOS differential pair with NMOS input transistors and PMOS active current mirror load","Biased by a 100\u00b5A DC tail current source, symmetrical \u00b15V supplies, 1pF capacitive load","Includes .OP, .DC sweep of VIP from -0.5V to 0.5V, and .AC sweep from 1Hz to 1GHz","Uses .MEASURE statements to capture DC output range and AC gain metrics"],"measurements":[{"name":"vout_min","key":"vout_min","index":0,"value":-0.8859436561045833,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#3 DC"},{"name":"gain_mag","key":"gain_mag","index":0,"value":30.92211673576166,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#2 AC"},{"name":"gain_1k","key":"gain_1k","index":0,"value":29.80538146185356,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"gain_nom","key":"gain_nom","index":0,"value":30.92211673576166,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"vout_max","key":"vout_max","index":0,"value":4.993230498272941,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#3 DC"}]} +{"id":"deepseek:00835_2811379e83059295:35085aff9ccb05c1","source":"deepseek","example_id":"00835_2811379e83059295","test_name":"test_test_835_diode_antilog_converter_2811379e83059295","netlist_hash":"35085aff9ccb05c1","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Design a SPICE netlist for a diode antilog converter using an op-amp. Sweep the input voltage from 0 to 0.7V and measure the output at 0V, 0.3V, and 0.6V.","pair_ids":["1c0ecf831a12de07","495dd4761ffc8867","7eb64fbc478b6036"],"prompts":["Design a SPICE netlist for a diode antilog converter using an op-amp. Sweep the input voltage from 0 to 0.7V and measure the output at 0V, 0.3V, and 0.6V.","Create an exponential amplifier circuit with a behavioral op-amp and a diode. Include DC analysis and measurements to verify the antilog function.","Generate a measured SPICE netlist for an op-amp based antilog converter using a diode model. The circuit should use an E-source op-amp, a feedback resistor, and perform a DC sweep. Include .MEAS statements to capture the output voltage at key input levels."],"measurements":[{"name":"Vout0","key":"Vout0","index":0,"value":2.8774461377030186e-42,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"Vout03","key":"Vout03","index":0,"value":-0.00010902214374571864,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"Vout06","key":"Vout06","index":0,"value":-11.771977216530487,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"}]} +{"id":"deepseek:00759_9a96ea223099158f:ade921711aaf8286","source":"deepseek","example_id":"00759_9a96ea223099158f","test_name":"test_test_759_biased_negative_diode_limiter_9a96ea223099158f","netlist_hash":"ade921711aaf8286","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"Input: 10V amplitude 1kHz sine wave at node in.","pair_ids":["cbfcae7d2dc5e6e7","44994bf9a41f48c3","f948164caeaf90e9","a210554ab77fb379","9533b2cf68cd6bc9"],"prompts":["Input: 10V amplitude 1kHz sine wave at node in.","Series 100\u03a9 resistor R1 from in to out.","10k\u03a9 load resistor RLOAD from out to ground.","Shunt diode D1 with cathode at out, anode at node neg, which is held at -5V by VBIAS.","When V(out) drops below -5V minus diode forward drop (~0.7V), diode conducts, clamping output to about -5.7V."],"measurements":[{"name":"vout_min","key":"vout_min","index":0,"value":-5.785721988488821,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 TRAN"},{"name":"vout_max","key":"vout_max","index":0,"value":9.461466089254232,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00645_4f009c9cfdab33a4:65d0043b0f1b146f","source":"deepseek","example_id":"00645_4f009c9cfdab33a4","test_name":"test_test_645_multi_section_rc_lowpass_anti_alias_filter_4f009c9cfdab33a4","netlist_hash":"65d0043b0f1b146f","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Three-stage passive RC low-pass filter for anti-aliasing","pair_ids":["8384d3aea6c81553","f10588ade6ec30dc","ca4992dd479b1520"],"prompts":["Three-stage passive RC low-pass filter for anti-aliasing","Uses identical RC sections (R=1k, C=1.5nF) with a 50-ohm source resistance","AC analysis from 100 Hz to 1 MHz with 100 points per decade"],"measurements":[{"name":"f3db","key":"f3db","index":0,"value":19963.544266681776,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 AC"},{"name":"atten_100k","key":"atten_100k","index":0,"value":0.1637385103192467,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:02237_81d29a84b0d7bc97:79d908504f6cb7f8","source":"deepseek","example_id":"02237_81d29a84b0d7bc97","test_name":"test_test_2237_sample_hold_frontend_81d29a84b0d7bc97","netlist_hash":"79d908504f6cb7f8","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"Sample-and-hold circuit with analog switch S1 controlled by 1MHz clock VCLK.","pair_ids":["cb2b72d9380981cb","aa977ecb03e7d78d","bfa37fe85e29ffdb","c6f87fc157cdec27","33f618d96dc0c8bd"],"prompts":["Sample-and-hold circuit with analog switch S1 controlled by 1MHz clock VCLK.","Input VIN is 10kHz sine wave with 1V amplitude. R1 (0.1\u03a9) models series resistance.","Capacitor CH (1nF) holds sampled voltage; buffer E1 (gain 100k in follower configuration) provides high-impedance output.","Switch model swmod has RON=1\u03a9 for fast charging (\u03c4 \u2248 1.1ns) and ROFF=100M\u03a9 for low droop.","Transient analysis from 0 to 3\u00b5s captures complete sample (0\u20130.5\u00b5s) and hold (0.5\u20131\u00b5s) phases."],"measurements":[{"name":"hold_error","key":"hold_error","index":0,"value":0.0010924651584601347,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 TRAN"},{"name":"vin_sample","key":"vin_sample","index":0,"value":0.03141073095212492,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"vout_sample","key":"vout_sample","index":0,"value":0.02506073337672208,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"vout_hold","key":"vout_hold","index":0,"value":0.03250319611058505,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"vin_sample_at_0_4","key":"vin_sample_at_0_4","index":0,"value":0.0251300775331128,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00562_813ff97781f316c8:813ff97781f316c8","source":"deepseek","example_id":"00562_813ff97781f316c8","test_name":"test_test_562_passive_filter_813ff97781f316c8","netlist_hash":"813ff97781f316c8","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Third-order Butterworth low-pass filter implemented as a doubly-terminated LC ladder network.","pair_ids":["ec0e8ea54aa6f5d5","529739cbb683ff35","71e84a7530af3ee5","1bf051953ebf1595"],"prompts":["Third-order Butterworth low-pass filter implemented as a doubly-terminated LC ladder network.","Cutoff frequency of 10 kHz, source and load resistances of 1 k\u03a9.","Passband gain is -6 dB due to voltage division between equal source and load resistors.","At cutoff, the response is -3 dB relative to passband, yielding total attenuation of -9 dB."],"measurements":[{"name":"att_10k","key":"att_10k","index":0,"value":-9.03049522822598,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"f3dB","key":"f3dB","index":0,"value":9976.032066665013,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 AC"},{"name":"gain_dc","key":"gain_dc","index":0,"value":-6.0205999132839665,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:01865_4b69cedf9434e6d7:0f626e01bdc35179","source":"deepseek","example_id":"01865_4b69cedf9434e6d7","test_name":"test_test_1865_frequency_to_voltage_charge_pump_4b69cedf9434e6d7","netlist_hash":"0f626e01bdc35179","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Frequency-to-voltage converter using a switched-capacitor charge pump.","pair_ids":["dda60bdeb990327f","4668ed5513ce2577","43d8922b8c7771b8"],"prompts":["Frequency-to-voltage converter using a switched-capacitor charge pump.","Input clock 0-5V at 100kHz, output voltage proportional to frequency.","Uses two switches, a flying capacitor, a holding capacitor, and load resistor to convert frequency to DC voltage."],"measurements":[{"name":"Vripple","key":"Vripple","index":0,"value":0.044876499165568906,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#1 TRAN"},{"name":"Vout_avg","key":"Vout_avg","index":0,"value":0.45454540233821866,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:01372_1444ccd03b08b57c:c6ac0fba848f5406","source":"deepseek","example_id":"01372_1444ccd03b08b57c","test_name":"test_test_1372_cmos_dynamic_precharge_inverter_1444ccd03b08b57c","netlist_hash":"c6ac0fba848f5406","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Dynamic precharge-evaluate inverter stage with weak keeper PMOS to maintain precharged state.","pair_ids":["6ce70364a605e806","55264a5aa8b13b2c","9cce568919b1fce4"],"prompts":["Dynamic precharge-evaluate inverter stage with weak keeper PMOS to maintain precharged state.","Precharge occurs when CLK is low; evaluation happens when CLK is high.","NMOS width reduced to slow discharge, achieving a propagation delay around 2.7ns."],"measurements":[{"name":"vout_min","key":"vout_min","index":0,"value":0.20898382555552775,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 TRAN"},{"name":"tphl","key":"tphl","index":0,"value":2.847398798541613e-09,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 TRAN"},{"name":"tw_out_low","key":"tw_out_low","index":0,"value":1.2880861746443426e-08,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00703_9c368a45cd008fc8:5121f9d7d2509921","source":"deepseek","example_id":"00703_9c368a45cd008fc8","test_name":"test_test_703_full_wave_center_tapped_rectifier_with_smoothing_capacitor_9c368a45cd008fc8","netlist_hash":"5121f9d7d2509921","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Full-wave center-tapped rectifier using two diodes and a center-tapped transformer simulated with two out-of-phase sinusoidal sources.","pair_ids":["23eda6dd198d5d41","720bf1c0c9487359","a4ab2d07f5778e9c"],"prompts":["Full-wave center-tapped rectifier using two diodes and a center-tapped transformer simulated with two out-of-phase sinusoidal sources.","A smoothing capacitor of 100uF reduces the ripple, and a 1k load resistor draws current.","Transient analysis runs for 100ms with measurements taken after 30ms to allow steady-state."],"measurements":[{"name":"max_vout","key":"max_vout","index":0,"value":11.358114042765916,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"},{"name":"min_vout","key":"min_vout","index":0,"value":9.77984085546484,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 TRAN"},{"name":"ripple","key":"ripple","index":0,"value":1.5782731873010754,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#1 TRAN"},{"name":"avg_vout","key":"avg_vout","index":0,"value":10.558801312524155,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:02016_510cf538d8190f32:cf577412f237c08b","source":"deepseek","example_id":"02016_510cf538d8190f32","test_name":"test_test_2016_hot_swap_inrush_limiter_pmos_510cf538d8190f32","netlist_hash":"cf577412f237c08b","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"PMOS hot-swap inrush limiter with soft-start gate RC network","pair_ids":["d82eea9d0e32c396","7e236324ec672ddb","55c95bff7416c6e5","b5b921e1001d22cc"],"prompts":["PMOS hot-swap inrush limiter with soft-start gate RC network","Input 12V pulse, 22\u03a9 load, 50\u00b5F output capacitance","PMOS gate charged via capacitor CG from input, discharged through RG to ground","Measure inrush current, output rise time, and steady-state current"],"measurements":[{"name":"t90","key":"t90","index":0,"value":0.0039009379297741766,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 TRAN"},{"name":"t10","key":"t10","index":0,"value":0.0018265362616750253,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 TRAN"},{"name":"i_steady","key":"i_steady","index":0,"value":0.5166937300490474,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 TRAN"},{"name":"inrush_max","key":"inrush_max","index":0,"value":-1.075718270538189e-30,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"},{"name":"rise","key":"rise","index":0,"value":0.0020744016680991515,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:02302_cb549ad4cba0d1d9:89853ad0ac94ce28","source":"deepseek","example_id":"02302_cb549ad4cba0d1d9","test_name":"test_test_2302_four_quadrant_analog_multiplier_cb549ad4cba0d1d9","netlist_hash":"89853ad0ac94ce28","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Four-quadrant analog multiplier using polynomial voltage-controlled current sources.","pair_ids":["ef1df97cfce9df78","73b3cfa262ded06f","912ceeab80129d65","76aac9caffb383e4"],"prompts":["Four-quadrant analog multiplier using polynomial voltage-controlled current sources.","DC analysis sweeps both inputs to characterize the multiplication surface.","Transient analysis applies a 1 kHz carrier shifted by 90\u00b0 and a 500 Hz modulation, producing a double-sideband suppressed-carrier signal.","Output is taken differentially across 1 k\u03a9 loads, with gain set by G coefficients and load resistors."],"measurements":[{"name":"vout_rms","key":"vout_rms","index":0,"value":0.19998281230913,"value_is_finite":true,"success":true,"measurement_type":"RMS","simulation_name":"#1 TRAN"},{"name":"vout_peak","key":"vout_peak","index":0,"value":0.39643079375921036,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"},{"name":"mult_out_max","key":"mult_out_max","index":0,"value":0.8,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#2 DC"}]} +{"id":"deepseek:02084_343357294fd1971d:8c1cf2be28537204","source":"deepseek","example_id":"02084_343357294fd1971d","test_name":"test_test_2084_gilbert_cell_mixer_343357294fd1971d","netlist_hash":"8c1cf2be28537204","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Gilbert cell mixer using six NPN BJTs, 1 mA tail current.","pair_ids":["23826f973de30ea0","08fa9d4695ab3456","a971d603300fee1f","68f7afe98402df79"],"prompts":["Gilbert cell mixer using six NPN BJTs, 1 mA tail current.","RF inputs: 101 MHz, 10 mV amplitude; LO inputs: 100 MHz, 200 mV amplitude.","Differential IF output filtered with a 10 pF capacitor.","Transient simulation from 5 \u00b5s to 15 \u00b5s with 0.1 ns steps, measuring peak-to-peak and average voltages."],"measurements":[{"name":"vmin","key":"vmin","index":0,"value":-0.30016294576258407,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#2 TRAN"},{"name":"vpp_diff","key":"vpp_diff","index":0,"value":0.5948872072672975,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#2 TRAN"},{"name":"vmax","key":"vmax","index":0,"value":0.2947242615047134,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#2 TRAN"},{"name":"vdc","key":"vdc","index":0,"value":-0.00012845961884869103,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#2 TRAN"}]} +{"id":"deepseek:02197_2d8e934641e90bb9:7faca0023026bd31","source":"deepseek","example_id":"02197_2d8e934641e90bb9","test_name":"test_test_2197_pwm_dac_with_rc_reconstruction_filter_2d8e934641e90bb9","netlist_hash":"7faca0023026bd31","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Simple PWM DAC using a pulse voltage source and a single-pole RC low\u2011pass filter.","pair_ids":["9e50d61412eef688","aafc2db613dce880","1f9d190695adbde8","d1982a84f7f6fca6"],"prompts":["Simple PWM DAC using a pulse voltage source and a single-pole RC low\u2011pass filter.","PWM frequency is 100 kHz (10 \u00b5s period), 50% duty cycle, 5V amplitude.","RC time constant is 1 ms (10 k\u03a9, 100 nF), significantly larger than the PWM period, averaging the signal to a steady DC level.","Transient simulation runs for 10 ms to capture settling; measurements taken from 5 ms to 10 ms."],"measurements":[{"name":"vout_avg","key":"vout_avg","index":0,"value":2.497161425564259,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 tran"},{"name":"vout_ripple","key":"vout_ripple","index":0,"value":0.029190803675757326,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#1 tran"}]} +{"id":"deepseek:01818_8e708dd260bf420d:9103a7d630e2596b","source":"deepseek","example_id":"01818_8e708dd260bf420d","test_name":"test_test_1818_555_monostable_timer_8e708dd260bf420d","netlist_hash":"9103a7d630e2596b","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Design a 555-style monostable timer using two comparators and an RS latch built from behavioral sources.","pair_ids":["316985a816caf009","8af8de03908e7318","1eb3dcf58b7e1c01"],"prompts":["Design a 555-style monostable timer using two comparators and an RS latch built from behavioral sources.","Model a monostable multivibrator that implements the functionality of a 555 timer, triggering on a falling edge and outputting a fixed-width pulse.","Create a SPICE netlist for a one-shot timer using E-source comparators, a capacitor-based latch, and switches to mimic a 555 monostable circuit."],"measurements":[{"name":"t_rise","key":"t_rise","index":0,"value":0.0010007142441260473,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 TRAN"},{"name":"pulse_width","key":"pulse_width","index":0,"value":0.01197633117754046,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 TRAN"},{"name":"vth_final","key":"vth_final","index":0,"value":0.00499498973041877,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"vth_max","key":"vth_max","index":0,"value":3.333300731396302,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"},{"name":"t_fall","key":"t_fall","index":0,"value":0.01197633117754046,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:01659_8e2da2c174f1f90a:dd0fea88d641c95c","source":"deepseek","example_id":"01659_8e2da2c174f1f90a","test_name":"test_test_1659_sallen_key_butterworth_low_pass_filter_unity_gain_8e2da2c174f1f90a","netlist_hash":"dd0fea88d641c95c","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Unity-gain Sallen-Key low-pass filter with second-order Butterworth response.","pair_ids":["1cfe1c992c138253","144b5eca902a34d8","459402fcd43b7d10","328ca41da1d37b53"],"prompts":["Unity-gain Sallen-Key low-pass filter with second-order Butterworth response.","Designed with equal resistors (10k) and capacitor ratio 2:1 (C1=20nF, C2=10nF).","Cutoff frequency theoretically around 1125 Hz. AC analysis from 1 Hz to 100 kHz.","Measurements: -3 dB cutoff, passband gain at low frequency, and roll-off at high frequency."],"measurements":[{"name":"f3dB","key":"f3dB","index":0,"value":1124.0165484442516,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 AC"},{"name":"atten_10fc","key":"atten_10fc","index":0,"value":-39.99395105846181,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"pass_gain","key":"pass_gain","index":0,"value":-0.0005224007479790757,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:00766_a4b960f8548d2c8f:7278591a9947a311","source":"deepseek","example_id":"00766_a4b960f8548d2c8f","test_name":"test_test_766_window_diode_limiter_asymmetric_a4b960f8548d2c8f","netlist_hash":"7278591a9947a311","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Asymmetric window diode limiter with two diodes and two DC sources, clipping a 1kHz 5V amplitude sine wave.","pair_ids":["7a022801a392f26d","97ebf3b0b4f1b50f","511e868b015747b4"],"prompts":["Asymmetric window diode limiter with two diodes and two DC sources, clipping a 1kHz 5V amplitude sine wave.","Positive clipping threshold set by V2 plus diode forward drop, negative clipping by V3 minus diode forward drop.","Uses SPICE .MEAS statements to verify maximum and minimum output voltages."],"measurements":[{"name":"max_vout","key":"max_vout","index":0,"value":2.1846855041068474,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"},{"name":"min_vout","key":"min_vout","index":0,"value":-1.8875775449506336,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00267_10b20a2685d07b99:90205372d7f0ec4a","source":"deepseek","example_id":"00267_10b20a2685d07b99","test_name":"test_test_267_mosfet_differential_pair_with_active_load_10b20a2685d07b99","netlist_hash":"90205372d7f0ec4a","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"NMOS differential pair with PMOS current mirror active load, biased by 100 \u00b5A ideal sink to -5 V.","pair_ids":["d08e7862bdd1073d","48fe82b9d4dc9343","fe3b3ae09e37ded1"],"prompts":["NMOS differential pair with PMOS current mirror active load, biased by 100 \u00b5A ideal sink to -5 V.","DC sweep of differential input from -0.5 V to +0.5 V measures output voltage at zero, gain via derivative, and saturation extremes.","Corrected bulk connections of NMOS devices to VSS to prevent forward biasing and ensure proper operation."],"measurements":[{"name":"vout_sat_pos","key":"vout_sat_pos","index":0,"value":4.999999977296733,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"vout_sat_neg","key":"vout_sat_neg","index":0,"value":-1.723376214188102,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"gain","key":"gain","index":0,"value":139.6650600462348,"value_is_finite":true,"success":true,"measurement_type":"DERIV","simulation_name":"#2 DC"},{"name":"vout_at_0","key":"vout_at_0","index":0,"value":3.687841684353998,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"}]} +{"id":"deepseek:01606_5b027420094b7a27:308f76574127d0d2","source":"deepseek","example_id":"01606_5b027420094b7a27","test_name":"test_test_1606_op_amp_window_comparator_5b027420094b7a27","netlist_hash":"308f76574127d0d2","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Window comparator using two high-gain E sources with open\u2011collector\u2011like diode pull\u2011downs.","pair_ids":["1cb1aa27d668816d","86479b4c57f48152","b9829d55b5c7ffaa"],"prompts":["Window comparator using two high-gain E sources with open\u2011collector\u2011like diode pull\u2011downs.","Output is driven high by Rpu when both comparators are off, i.e., when vin > 2V and vin < 3V.","When vin < 2V, E_LOW pulls out low; when vin > 3V, E_HIGH pulls out low, so out stays low outside the window."],"measurements":[{"name":"vth_low","key":"vth_low","index":0,"value":2.024727860398396,"value_is_finite":true,"success":true,"measurement_type":"FIND_WHEN","simulation_name":"#1 TRAN"},{"name":"vth_high","key":"vth_high","index":0,"value":2.9357088596087997,"value_is_finite":true,"success":true,"measurement_type":"FIND_WHEN","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:01473_2765601399313100:6152e9a63ff5986a","source":"deepseek","example_id":"01473_2765601399313100","test_name":"test_test_1473_two_op_amp_instrumentation_amplifier_2765601399313100","netlist_hash":"6152e9a63ff5986a","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Two-op-amp instrumentation amplifier with finite\u2011bandwidth op\u2011amp macromodels.","pair_ids":["8c618d1030eba1b3","03c4fef60637fc7b","bbeeae4328201fcd","54d064d6f553e87e"],"prompts":["Two-op-amp instrumentation amplifier with finite\u2011bandwidth op\u2011amp macromodels.","Each op\u2011amp has open\u2011loop gain 100k and a dominant pole at 10 Hz (via R1\u2011C1).","Differential gain is set by Rg=1k and Rf=10k to approximately 21.","AC analysis verifies gain and phase at 1 kHz, while DC check confirms zero offset."],"measurements":[{"name":"phase_1k","key":"phase_1k","index":0,"value":-0.02097165649405811,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"out_diff_quiescent","key":"out_diff_quiescent","index":0,"value":-5.820766091346741e-11,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"gain_lf","key":"gain_lf","index":0,"value":20.995170186988048,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"gain_1k","key":"gain_1k","index":0,"value":20.98593857018342,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:01751_3ed92b8c26773384:c54ea6fecb6c6ae9","source":"deepseek","example_id":"01751_3ed92b8c26773384","test_name":"test_test_1751_opamp_quadrature_oscillator_3ed92b8c26773384","netlist_hash":"c54ea6fecb6c6ae9","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Quadrature oscillator using two op-amp integrators and an inverting stage.","pair_ids":["b63596e9fea50500","74d38f94e6c53e9b","8c9a4ef0878bec70","c135b93fc770210a"],"prompts":["Quadrature oscillator using two op-amp integrators and an inverting stage.","Amplitude limited by back-to-back diodes across the first integrator capacitor.","RC values chosen to produce approximately 159 Hz oscillation frequency.","Outputs out1 and out2 are 90 degrees out of phase."],"measurements":[{"name":"ta","key":"ta","index":0,"value":0.004711673841888097,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 TRAN"},{"name":"phase_diff","key":"phase_diff","index":0,"value":89.95404249459256,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 TRAN"},{"name":"freq1","key":"freq1","index":0,"value":159.151362647274,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 TRAN"},{"name":"t2","key":"t2","index":0,"value":0.0031416443045567243,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 TRAN"},{"name":"t1","key":"t1","index":0,"value":0.004711673841888097,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 TRAN"},{"name":"delta_t","key":"delta_t","index":0,"value":0.0015700295373313727,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 TRAN"},{"name":"period1","key":"period1","index":0,"value":0.0062833266606475285,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 TRAN"},{"name":"tb","key":"tb","index":0,"value":0.010995000502535626,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00028_e0469a3acfa27569:4a79f903a993d12b","source":"deepseek","example_id":"00028_e0469a3acfa27569","test_name":"test_test_28_rc_pulse_step_response_e0469a3acfa27569","netlist_hash":"4a79f903a993d12b","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Simulate an RC low-pass filter with a 1 kHz square wave input. Include measurements of the output rise time to 63% and 90% of the input pulse.","pair_ids":["fc9f3edfee2b6945","264ecae4ec4f7216","3ec3e01811d9d84e"],"prompts":["Simulate an RC low-pass filter with a 1 kHz square wave input. Include measurements of the output rise time to 63% and 90% of the input pulse.","Design a simple passive RC filter and measure its step response to a pulse, reporting the time to 63% and 90% of final value.","Determine the time constant of an RC circuit by simulating the step response and measuring when the output reaches 63% and 90% of the input step."],"measurements":[{"name":"v_out_max","key":"v_out_max","index":0,"value":0.9930221140018576,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"},{"name":"t_rise90","key":"t_rise90","index":0,"value":0.0022957184753048796,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 TRAN"},{"name":"t_rise63","key":"t_rise63","index":0,"value":0.0010016291045872405,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:02190_65fa0d3231d2ce54:6813df3c11fb0886","source":"deepseek","example_id":"02190_65fa0d3231d2ce54","test_name":"test_test_2190_binary_weighted_dac_65fa0d3231d2ce54","netlist_hash":"6813df3c11fb0886","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":2,"representative_prompt":"3-bit binary-weighted DAC with ideal op-amp (E1 gain=1e5) and Rf=500\u03a9, R=1k/2k/4k. All bits tied to Vref for full-scale code 111.","pair_ids":["62855e71535815f9","e2492dc5809eab0e"],"prompts":["3-bit binary-weighted DAC with ideal op-amp (E1 gain=1e5) and Rf=500\u03a9, R=1k/2k/4k. All bits tied to Vref for full-scale code 111.","Inverting summing amplifier configuration: Vout = -Rf * (Vref/R2 + Vref/R1 + Vref/R0) = -0.875*Vref, providing linear output from 0V to -4.375V as Vref sweeps 0-5V."],"measurements":[{"name":"Vout_max","key":"Vout_max","index":0,"value":-4.374917970288058,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"Vout_min","key":"Vout_min","index":0,"value":0,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"}]} +{"id":"deepseek:01159_484e19fd2b35a0c5:71ea5c9b3af66d6d","source":"deepseek","example_id":"01159_484e19fd2b35a0c5","test_name":"test_test_1159_bjt_schmitt_trigger_484e19fd2b35a0c5","netlist_hash":"71ea5c9b3af66d6d","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Design a BJT-based Schmitt trigger using discrete transistors. Use a differential pair with common emitter resistor. Include pulse input and measure hysteresis.","pair_ids":["e8231dd6eae71152","c7f0c12a79d0cc33","5d4eefc25d7ce7f3"],"prompts":["Design a BJT-based Schmitt trigger using discrete transistors. Use a differential pair with common emitter resistor. Include pulse input and measure hysteresis.","Create a transistor-level comparator with hysteresis using two NPN transistors. Simulate transient response with a slow input ramp and extract high and low threshold voltages.","Implement an inverting Schmitt trigger with NPN BJTs. The circuit should have positive feedback via common emitter resistor. Apply a pulse input and measure the switching thresholds."],"measurements":[{"name":"Vth_rise","key":"Vth_rise","index":0,"value":2.4861504777840415,"value_is_finite":true,"success":true,"measurement_type":"FIND_WHEN","simulation_name":"#1 TRAN"},{"name":"Vth_fall","key":"Vth_fall","index":0,"value":2.4737358046864317,"value_is_finite":true,"success":true,"measurement_type":"FIND_WHEN","simulation_name":"#1 TRAN"},{"name":"hysteresis","key":"hysteresis","index":0,"value":2.4861504777840415,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00553_735067f5563eac13:00e403e6e64f14fe","source":"deepseek","example_id":"00553_735067f5563eac13","test_name":"test_test_553_series_resonant_trap_filter_735067f5563eac13","netlist_hash":"00e403e6e64f14fe","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Series resonant trap filter using an RLC shunt branch to create a deep notch at the series resonance frequency.","pair_ids":["082f2176e002c7f1","ca5ec7991b18d60a","036a9067ea715bc3"],"prompts":["Series resonant trap filter using an RLC shunt branch to create a deep notch at the series resonance frequency.","At resonance, the L1 and C1 impedance cancel, leaving only R1=10\u03a9 in the shunt path, forming a voltage divider with Rs=50\u03a9 and Rload=1k\u03a9.","The notch depth is approximately -15.6 dB, and the resonance frequency is near 5.03 kHz."],"measurements":[{"name":"notch_dB","key":"notch_dB","index":0,"value":-15.632149178761344,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 ac"}]} +{"id":"deepseek:01848_d1ca9982c5e87de7:f131cf28a23b70da","source":"deepseek","example_id":"01848_d1ca9982c5e87de7","test_name":"test_test_1848_sawtooth_oscillator_current_source_switch_d1ca9982c5e87de7","netlist_hash":"f131cf28a23b70da","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"Sawtooth oscillator using a 1mA current source to linearly charge a 1nF capacitor.","pair_ids":["eff507a3de6a7478","96d0af36bc9d81ac","946000429e474292","016811565d7c16dd","1db140cffb89f7ef"],"prompts":["Sawtooth oscillator using a 1mA current source to linearly charge a 1nF capacitor.","A voltage-controlled switch (S1) resets the capacitor when control voltage exceeds 2.5V, discharging it through 10\u03a9.","Switch control is a 0\u20135V pulse with 2\u00b5s period, 1\u00b5s width, and 10ns rise/fall times.","Initial condition V(out)=0 and UIC transient analysis avoid unrealistic DC operating point.","Expected output: sawtooth waveform from ~10mV to ~0.99V at 500kHz."],"measurements":[{"name":"vmin","key":"vmin","index":0,"value":0.009998750047216091,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 tran"},{"name":"vmax","key":"vmax","index":0,"value":0.9979502269626563,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 tran"},{"name":"tper","key":"tper","index":0,"value":1.9964998615198344e-06,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 tran"},{"name":"freq","key":"freq","index":0,"value":500876.5686759179,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 tran"}]} +{"id":"deepseek:02119_f2e17924867a7b05:6ba35e546db99108","source":"deepseek","example_id":"02119_f2e17924867a7b05","test_name":"test_test_2119_pll_charge_pump_passive_filter_f2e17924867a7b05","netlist_hash":"6ba35e546db99108","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Charge pump PLL front-end with a switched current source and passive loop filter.","pair_ids":["304f222e7d084e4a","379c558ba232d2c3","5fda12574ae15c0a"],"prompts":["Charge pump PLL front-end with a switched current source and passive loop filter.","UP pulses of 100 ns width at 1 MHz toggle a switch and a pulsed current source simultaneously, injecting 90 \u03bcA into the filter.","The loop filter consists of a 1 nF capacitor directly on Vctrl and a 1 nF capacitor in series with 100 k\u03a9, providing filtered averaging."],"measurements":[{"name":"vctrl_avg","key":"vctrl_avg","index":0,"value":0.13031756866081431,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 tran"},{"name":"vctrl_pp","key":"vctrl_pp","index":0,"value":0.00893862679550822,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#1 tran"},{"name":"vctrl_final","key":"vctrl_final","index":0,"value":0.16511515269415777,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 tran"}]} +{"id":"deepseek:00256_526c5d2497f3c639:947dfe9b05526459","source":"deepseek","example_id":"00256_526c5d2497f3c639","test_name":"test_test_256_nmos_source_follower_526c5d2497f3c639","netlist_hash":"947dfe9b05526459","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Design an NMOS source follower buffer with a 10k\u03a9 source resistor and a 12V supply. Bias the gate at 6V DC and add a 1V AC signal for frequency response measurement from 1Hz to 10MHz.","pair_ids":["1142a5102cdd81e2","4cce9b345e57afed","1ca3162e93df1acf"],"prompts":["Design an NMOS source follower buffer with a 10k\u03a9 source resistor and a 12V supply. Bias the gate at 6V DC and add a 1V AC signal for frequency response measurement from 1Hz to 10MHz.","Implement a MOSFET voltage buffer using an NMOS transistor. Use a resistive load at the source, set VDD=12V, and apply a DC+AC input. Characterize the DC output level and AC gain magnitude via SPICE analysis.","Create an NMOS source follower circuit. The transistor has VTO=1V, KP=100\u00b5A/V\u00b2, LAMBDA=0.02, W=100\u00b5m, L=10\u00b5m. Add a 10k resistor from source to ground, connect drain to 12V, and feed the gate with a DC 6V plus AC 1V. Simulate operating point and AC response, then measure DC output and AC gain."],"measurements":[{"name":"vout_ac","key":"vout_ac","index":0,"value":0.9014385811358384,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"vout_dc","key":"vout_dc","index":0,"value":4.152723691711863,"value_is_finite":true,"success":true,"measurement_type":"FIND_WHEN","simulation_name":"#3 DC"}]} +{"id":"deepseek:01895_737ee3c56b912d7b:2c1ee9a26accaf53","source":"deepseek","example_id":"01895_737ee3c56b912d7b","test_name":"test_test_1895_nmos_source_follower_linear_regulator_737ee3c56b912d7b","netlist_hash":"2c1ee9a26accaf53","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"NMOS source-follower regulator with op-amp feedback","pair_ids":["1ab0ae520b11ac02","94d04add521ab072","6e3f5f777be86c9b"],"prompts":["NMOS source-follower regulator with op-amp feedback","Resistive divider sets output to 2x reference (5V)","Line regulation measured over 10-15V supply sweep"],"measurements":[{"name":"vout_min","key":"vout_min","index":0,"value":4.999818213458639,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#2 DC"},{"name":"line_reg","key":"line_reg","index":0,"value":5.261041224002838e-07,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#2 DC"},{"name":"vout_nom","key":"vout_nom","index":0,"value":4.999819307151483,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"vout_max","key":"vout_max","index":0,"value":4.999820843979251,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#2 DC"}]} +{"id":"deepseek:02105_4295b59307ac872b:68ebfe1166bbe42e","source":"deepseek","example_id":"02105_4295b59307ac872b","test_name":"test_test_2105_synchronous_am_detector_switching_4295b59307ac872b","netlist_hash":"68ebfe1166bbe42e","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"AM signal is generated by multiplying the modulating signal (1 V DC + 0.5 Vpk 1 kHz sine) with a 1 MHz sine carrier.","pair_ids":["33e86f155c5f749c","d33d9a9444f6cfe9","adaf33b8a8137ecc","f750b8b79f4cf45e","335a8027353f3673"],"prompts":["AM signal is generated by multiplying the modulating signal (1 V DC + 0.5 Vpk 1 kHz sine) with a 1 MHz sine carrier.","A narrow sampling pulse, aligned with the positive peaks of the carrier, controls a voltage\u2011controlled switch (SW model), creating a sample\u2011and\u2011hold of the AM signal.","The sampling pulse is a 5 V, 50 ns wide pulse occurring at 0.25 \u00b5s each 1 \u00b5s period, coinciding with the carrier maximum.","A small 100 pF capacitor quickly charges during the sampling window (time constant \u2248 1 ns) and is buffered by an ideal unity\u2011gain amplifier (E source).","The buffered sampled voltage is then low\u2011pass filtered by a 10 k\u2126 resistor and 1 nF capacitor (cutoff \u2248 15.9 kHz) to recover the clean modulating envelope."],"measurements":[{"name":"V_max","key":"V_max","index":0,"value":1.426660539019936,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 tran"},{"name":"V_min","key":"V_min","index":0,"value":0.47672477804039043,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 tran"},{"name":"V_avg","key":"V_avg","index":0,"value":0.9516554514136277,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 tran"},{"name":"V_pp","key":"V_pp","index":0,"value":0.9499357609795456,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#1 tran"}]} +{"id":"deepseek:00147_4de939ee39133a73:c28c9c1bcc240e3e","source":"deepseek","example_id":"00147_4de939ee39133a73","test_name":"test_test_147_greinacher_voltage_doubler_4de939ee39133a73","netlist_hash":"c28c9c1bcc240e3e","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"The Greinacher circuit uses two diodes and two capacitors to double the peak input voltage.","pair_ids":["405fea8d23685242","780f990daf03afb3","1cdf79dd34380333"],"prompts":["The Greinacher circuit uses two diodes and two capacitors to double the peak input voltage.","During negative half-cycles, D2 clamps the junction node, charging C1; during positive half-cycles, D1 conducts, stacking C1's voltage on top of input to charge C2.","With a 10 V amplitude 50 Hz input, the output is around 18-19 V DC with small ripple due to the 100 uF capacitors and 10 kOhm load."],"measurements":[{"name":"vout_end","key":"vout_end","index":0,"value":18.185805944633763,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 tran"},{"name":"vin_ampl","key":"vin_ampl","index":0,"value":19.999997798883605,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#1 tran"},{"name":"vout_avg","key":"vout_avg","index":0,"value":18.28945391590613,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 tran"},{"name":"vout_ripple","key":"vout_ripple","index":0,"value":0.33578772865883977,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#1 tran"}]} +{"id":"deepseek:00065_fc1dff9ee6b628b4:fc1dff9ee6b628b4","source":"deepseek","example_id":"00065_fc1dff9ee6b628b4","test_name":"test_test_65_series_rlc_fc1dff9ee6b628b4","netlist_hash":"fc1dff9ee6b628b4","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Series RLC circuit with AC voltage source.","pair_ids":["0b347181120329bc","593a43380759dcec","4661033776b37681"],"prompts":["Series RLC circuit with AC voltage source.","AC analysis over frequency range 100 Hz to 100 kHz with 100 points per decade.","The measurement captures the maximum voltage magnitude across resistor R1, which should occur at resonance near 5.03 kHz."],"measurements":[{"name":"max_mag","key":"max_mag","index":0,"value":0.9960645879601132,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 AC"}]} +{"id":"deepseek:01499_56a19a3fa5aecd11:6e0c93bef2ee1b96","source":"deepseek","example_id":"01499_56a19a3fa5aecd11","test_name":"test_test_1499_charge_amplifier_piezo_56a19a3fa5aecd11","netlist_hash":"6e0c93bef2ee1b96","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"Charge amplifier for piezoelectric sensor with capacitive feedback.","pair_ids":["da599aa33e588d48","7fdcba07aea26e70","ddea8cded4706c51","e877905ebfbe48c9","b61b1197557b8ce6"],"prompts":["Charge amplifier for piezoelectric sensor with capacitive feedback.","Piezo modelled as current source with parallel capacitance and leakage resistance.","High\u2011gain op\u2011amp (E1, gain=100k) with feedback network Rf||Cf sets transimpedance.","Frequency response shows roll\u2011off at ~1.6 Hz (1/(2\u03c0RfCf)) and flat region above.","Transient at 1 kHz verifies charge integration: Vout \u2248 Iin\u00b7(1/j\u03c9Cf)."],"measurements":[{"name":"gain_10k","key":"gain_10k","index":0,"value":15915.175804065095,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"iin_pp","key":"iin_pp","index":0,"value":1.9486736717879548e-05,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#2 TRAN"},{"name":"gain_1k","key":"gain_1k","index":0,"value":159151.55845273536,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"dc_gain","key":"dc_gain","index":0,"value":99792248.61876689,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"vout_pp","key":"vout_pp","index":0,"value":3.080734284711077,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#2 TRAN"}]} +{"id":"deepseek:00099_88462446fdede956:ee36f5d6f7986e4c","source":"deepseek","example_id":"00099_88462446fdede956","test_name":"test_test_99_pi_matching_88462446fdede956","netlist_hash":"ee36f5d6f7986e4c","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Pi-network matching circuit designed for a center frequency of 1 MHz, using two shunt capacitors and one series inductor.","pair_ids":["9000cb107f516494","1f6775816943c735","870c6dc3918757a6"],"prompts":["Pi-network matching circuit designed for a center frequency of 1 MHz, using two shunt capacitors and one series inductor.","Component values calculated analytically to achieve Z_in = 50\u202f\u03a9 with C1=3.429\u202fnF, L=14.15\u202f\u00b5H, and C2=2.2\u202fnF.","Simulation verifies the impedance match through an AC analysis over a 500\u202fkHz to 2\u202fMHz span."],"measurements":[{"name":"V_in_dB","key":"V_in_dB","index":0,"value":-6.020437781425545,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"V_out_mag","key":"V_out_mag","index":0,"value":0.9997608772311959,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"V_in_mag","key":"V_in_mag","index":0,"value":0.5001241047308599,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"V_out_dB","key":"V_out_dB","index":0,"value":-0.0020789943683732644,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:01375_d3219e80aacaa788:b32fe468389f0657","source":"deepseek","example_id":"01375_d3219e80aacaa788","test_name":"test_test_1375_cmos_dynamic_precharge_inverter_d3219e80aacaa788","netlist_hash":"b32fe468389f0657","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Dynamic precharge inverter with PMOS precharge, NMOS evaluation, and pass transistor to prevent static DC path.","pair_ids":["8b3d83c48826e46a","b7e003efd9c2d37d","c7c41798c5f189c0","e7d377267fade66d"],"prompts":["Dynamic precharge inverter with PMOS precharge, NMOS evaluation, and pass transistor to prevent static DC path.","Clock low precharges output to Vdd; clock high enables evaluation: output discharges to GND if input is high, otherwise stays high.","Corrected measurement edge indices to account for initial DC state where output starts at Vdd, thus only one rising and one falling edge occur.","Simulation uses 1.8V supply, 100fF load, and transient analysis from 0 to 100ns with 1ps step."],"measurements":[{"name":"tfall_out","key":"tfall_out","index":0,"value":2.488991823111053e-10,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 TRAN"},{"name":"t_precharge_time","key":"t_precharge_time","index":0,"value":3.5627395303935653e-10,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 TRAN"},{"name":"trise_out","key":"trise_out","index":0,"value":1.4859380722747713e-10,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 TRAN"},{"name":"t_rise_pre","key":"t_rise_pre","index":0,"value":2.1610991199040025e-10,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 TRAN"},{"name":"t_phl_eval","key":"t_phl_eval","index":0,"value":2.5659660907926083e-10,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00196_4902454c0df7b751:26a5806047a0d908","source":"deepseek","example_id":"00196_4902454c0df7b751","test_name":"test_test_196_bjt_diff_pair_active_load_4902454c0df7b751","netlist_hash":"26a5806047a0d908","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"This is a BJT differential pair with an active current mirror load (PNP transistors) and a tail current source formed by an NPN current mirror.","pair_ids":["ed2d082b4c7c962b","6bbc9e4d0eb6bdd1","e8dfef92535a4b4b","0dec223fa447f83d","93dd23e6a324ca77"],"prompts":["This is a BJT differential pair with an active current mirror load (PNP transistors) and a tail current source formed by an NPN current mirror.","The differential pair consists of NPN transistors Q1 and Q2, with tail current supplied by a current mirror (Q5, Q6).","The active load is a PNP current mirror (Q3, Q4) that provides high output resistance and converts differential input to single-ended output.","The output is taken from the collector of Q2 (and Q4), with no resistive load to achieve high gain.","DC analysis includes operating point and a DC sweep of VIN1 from -50mV to 50mV to measure gain and output swing."],"measurements":[{"name":"vout_min","key":"vout_min","index":0,"value":-0.582570408855271,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#2 DC"},{"name":"v_out_op","key":"v_out_op","index":0,"value":10.056127755600755,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"i_tail","key":"i_tail","index":0,"value":0.00011558271458475151,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"gain","key":"gain","index":0,"value":1353.2265954854654,"value_is_finite":true,"success":true,"measurement_type":"DERIV","simulation_name":"#2 DC"},{"name":"vout_max","key":"vout_max","index":0,"value":11.975804095809572,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#2 DC"}]} +{"id":"deepseek:00839_5829effb14e9ce35:d79b1dacad786e9d","source":"deepseek","example_id":"00839_5829effb14e9ce35","test_name":"test_test_839_diode_antilog_converter_with_op_amp_feedback_5829effb14e9ce35","netlist_hash":"d79b1dacad786e9d","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Design a diode-based antilogarithmic amplifier using an op-amp and measure its exponential output characteristics.","pair_ids":["35edcc020a6c2cf0","119f6dedf3d6e397","ffa2fac95d0327b9","886922e5a5f3ad1b"],"prompts":["Design a diode-based antilogarithmic amplifier using an op-amp and measure its exponential output characteristics.","Create an antilog converter circuit with an operational amplifier and a diode in the input path, then perform a DC sweep to verify the exponential relationship.","Simulate an exponential amplifier where the output voltage is proportional to the exponential of the input voltage, utilizing a diode and op-amp, and measure the output ratio for a 100mV input step.","Build a nonlinear amplifier that produces an output voltage equal to the negative exponent of the input voltage, using a diode as the nonlinear element and an op-amp for feedback."],"measurements":[{"name":"VOUT06","key":"VOUT06","index":0,"value":-11.77197721653049,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"VOUT05","key":"VOUT05","index":0,"value":-0.24864792517249357,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"RATIO","key":"RATIO","index":0,"value":47.34395916782318,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#2 DC"}]} +{"id":"deepseek:02266_c1b6b935f68661ef:5f39d110dd56ea6b","source":"deepseek","example_id":"02266_c1b6b935f68661ef","test_name":"test_test_2266_switched_cap_resistor_c1b6b935f68661ef","netlist_hash":"5f39d110dd56ea6b","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Switched-capacitor resistor equivalent using two switches and a capacitor.","pair_ids":["45709ff851db4a47","670efccbb26c2f3e","9eb6bfa0f0c28b93"],"prompts":["Switched-capacitor resistor equivalent using two switches and a capacitor.","Non-overlapping clocks create an effective resistance of 1/(f*C) = 100 k\u03a9.","Current measurement uses a zero-volt source VM to avoid negative sign issues."],"measurements":[{"name":"iavg","key":"iavg","index":0,"value":1.0010634512956363e-05,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 TRAN"},{"name":"R_eq","key":"R_eq","index":0,"value":99893.7678431612,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00638_9635f6c94447f228:93c1d309f25fed22","source":"deepseek","example_id":"00638_9635f6c94447f228","test_name":"test_test_638_rc_differentiating_edge_detector_9635f6c94447f228","netlist_hash":"93c1d309f25fed22","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"Simulate a simple RC high-pass filter used as an edge detector for a square wave.","pair_ids":["9e6a8ac57520d466","93d5b42d448ef16c","a4e8fa0dea7c2c29","13a0dbfa8d1b0887","324382cf78e00574"],"prompts":["Simulate a simple RC high-pass filter used as an edge detector for a square wave.","Design a passive differentiator circuit to generate short pulses at each transition of a digital signal.","Create an RC differentiator with time constant much smaller than the pulse width to output spikes at edges.","Build an edge-detector using a capacitor and resistor, driven by a 1V pulse train.","Verify that an RC differentiator produces positive and negative spikes at the rising and falling edges."],"measurements":[{"name":"vmin","key":"vmin","index":0,"value":-0.9512510506367657,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 TRAN"},{"name":"vmax","key":"vmax","index":0,"value":0.951727848135748,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:01427_0d7d49130494b69d:d2b076ef39e3dee6","source":"deepseek","example_id":"01427_0d7d49130494b69d","test_name":"test_test_1427_opamp_voltage_follower_0d7d49130494b69d","netlist_hash":"d2b076ef39e3dee6","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Op-amp voltage follower using E-source with gain 100k","pair_ids":["4e0e838b05f555ab","a305507293ad42b2","959182a8f201dd32"],"prompts":["Op-amp voltage follower using E-source with gain 100k","AC analysis from 1 Hz to 1 MHz","Measures maximum gain to verify near 0 dB and unity magnitude"],"measurements":[{"name":"ac_gain_mag","key":"ac_gain_mag","index":0,"value":0.999990000099999,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#2 ac"},{"name":"ac_gain_db","key":"ac_gain_db","index":0,"value":-8.685846208858971e-05,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#2 ac"}]} +{"id":"deepseek:00138_6b08108b1b4342b8:6b08108b1b4342b8","source":"deepseek","example_id":"00138_6b08108b1b4342b8","test_name":"test_test_138_positive_diode_clamper_ref_6b08108b1b4342b8","netlist_hash":"6b08108b1b4342b8","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Design a positive diode clamper circuit that shifts a sinusoidal input signal upward by a 3V reference. The input is a 1 kHz sine wave with 5V amplitude. Use a 1N4148-like diode, a 1uF capacitor, and a 100k load resistor. Run a transient simulation and measure the minimum and maximum output voltages.","pair_ids":["3d16282bbd2a998c","40cc520fb8f5d0b1","ad152cadbe03d620"],"prompts":["Design a positive diode clamper circuit that shifts a sinusoidal input signal upward by a 3V reference. The input is a 1 kHz sine wave with 5V amplitude. Use a 1N4148-like diode, a 1uF capacitor, and a 100k load resistor. Run a transient simulation and measure the minimum and maximum output voltages.","Create a spice netlist for a positive clamper with a DC reference. The input is a 10V peak sine wave at 500 Hz. The reference voltage is 2.5V. Use a capacitor of 0.5uF and a resistor of 47k. Measure the output voltage extremes.","Simulate a diode clamper that shifts an AC signal upward so its negative peak is at +2V. Input: sine wave, 6V amplitude, 2kHz. Use a standard diode model, C=2.2uF, R=10k. Measure the output DC average and the positive peak."],"measurements":[{"name":"vmin","key":"vmin","index":0,"value":2.352197479816816,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 TRAN"},{"name":"vmax","key":"vmax","index":0,"value":12.396879399461348,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"},{"name":"vavg","key":"vavg","index":0,"value":7.3365912156038995,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:02159_cedc9232b69d166f:552865f88460219b","source":"deepseek","example_id":"02159_cedc9232b69d166f","test_name":"test_test_2159_straingaugewheatstonebridgewithamplifier_cedc9232b69d166f","netlist_hash":"552865f88460219b","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Wheatstone bridge powered by 5V with three 120 ohm resistors and one strain gauge modeled as behavioral resistor swept via DC source.","pair_ids":["039c48d511cd832e","e83049cdf6abe765","850c760625631329"],"prompts":["Wheatstone bridge powered by 5V with three 120 ohm resistors and one strain gauge modeled as behavioral resistor swept via DC source.","Instrumentation amplifier built from three E-element op-amps: gain of first stage is 1 + 2*49.5k/1k = 100, second stage difference amp with gain 1.","DC sweep of V_RSWEEP from 119 to 121 V simulates resistance variation, with .MEAS at 120 and 120.1 to verify gain and balance."],"measurements":[{"name":"delta","key":"delta","index":0,"value":0.10402134314063005,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#2 DC"},{"name":"vout_strained","key":"vout_strained","index":0,"value":0.10402134314063005,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"vout_balanced","key":"vout_balanced","index":0,"value":2.9103830456733704e-11,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"}]} +{"id":"deepseek:01368_ac78800d8f798712:8760b4a549b3934f","source":"deepseek","example_id":"01368_ac78800d8f798712","test_name":"test_test_1368_cmos_dynamic_precharge_inverter_ac78800d8f798712","netlist_hash":"8760b4a549b3934f","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"Dynamic precharge CMOS inverter with precharge PMOS (M1) and evaluation NMOS stack (M2, M3).","pair_ids":["6645f1d9722ac778","99f642ae1c779abb","a52002a8c46b4e2a","380c1c990eee7a53","e861b674d7e448ff"],"prompts":["Dynamic precharge CMOS inverter with precharge PMOS (M1) and evaluation NMOS stack (M2, M3).","Clock-driven precharge and evaluation phases; output precharged to VDD when clock is low.","During evaluation (clock high, input high), output discharges to near ground through M2 and M3.","Load capacitor C1 ensures realistic transient behavior.","Measurements sample precharge voltage at 4ns and evaluation voltage at 7ns after proper clock and input setup."],"measurements":[{"name":"vout_high","key":"vout_high","index":0,"value":3.299999998886057,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"vout_low","key":"vout_low","index":0,"value":-4.61146104897044e-08,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00311_ca17c4d3afb77636:0a25e2c4d444fcf5","source":"deepseek","example_id":"00311_ca17c4d3afb77636","test_name":"test_test_311_inverting_amplifier_ca17c4d3afb77636","netlist_hash":"0a25e2c4d444fcf5","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"Design an inverting op-amp amplifier with a gain of -10 using a behavioral op-amp. Use an AC analysis to verify the gain.","pair_ids":["8eda8a53661a64a6","2980b0a0ca8a2a78","1c672a3f4ab91fbf","58ae80de3badc090","a2ab1b0d7119f6b8"],"prompts":["Design an inverting op-amp amplifier with a gain of -10 using a behavioral op-amp. Use an AC analysis to verify the gain.","Simulate an inverting amplifier circuit with ideal op-amp, running AC sweep. Check that the gain at 1 kHz is 20 dB.","Create a SPICE netlist for an inverting amplifier using an E-source op-amp model. Set R1=1k, R2=10k, and perform AC analysis from 1 Hz to 100 kHz. Measure gain at 1 kHz.","Build an inverting op-amp amplifier with a voltage gain of -10. The circuit should use a behavioral op-amp with gain 100k. Measure the frequency response.","Test an inverting op-amp amplifier: use an E-source with gain 1e5, input resistance 1k, feedback resistance 10k. Run AC and check dB magnitude at 1 kHz."],"measurements":[{"name":"gain_db","key":"gain_db","index":0,"value":19.999044604685594,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"phase","key":"phase","index":0,"value":3.141592653589793,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:02380_8dde128836d532cf:2a3b5402e3b53c4c","source":"deepseek","example_id":"02380_8dde128836d532cf","test_name":"test_test_2380_param_divider_8dde128836d532cf","netlist_hash":"2a3b5402e3b53c4c","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Parameterized resistor divider with configurable total resistance and tap ratio","pair_ids":["d0686836381543f1","3e2e80e5f698aa80","aa741004d7daf088"],"prompts":["Parameterized resistor divider with configurable total resistance and tap ratio","Input voltage is 10V DC, divider ratio set to 0.5 via RATIO parameter","DC sweep of input voltage from 10V to 10V enables MEAS AT syntax"],"measurements":[{"name":"VOUT","key":"VOUT","index":0,"value":5,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"}]} +{"id":"deepseek:00295_5b5661faf7a8d7d8:c44550d8924335f5","source":"deepseek","example_id":"00295_5b5661faf7a8d7d8","test_name":"test_test_295_cmos_nand2_transient_5b5661faf7a8d7d8","netlist_hash":"c44550d8924335f5","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Create a SPICE netlist for a two-input CMOS NAND gate and simulate its transient response to pulse inputs.","pair_ids":["bf7b208727cf058e","11c850d8dead8d45","b21fd5f125637a87"],"prompts":["Create a SPICE netlist for a two-input CMOS NAND gate and simulate its transient response to pulse inputs.","Design a standard CMOS NAND2 gate, apply pulse waveforms to both inputs, and measure propagation delay.","Write a SPICE circuit for a CMOS NAND gate that produces a low output only when both inputs are high, and verify its timing via transient analysis."],"measurements":[{"name":"max_Y","key":"max_Y","index":0,"value":5.000012857720176,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"},{"name":"min_Y","key":"min_Y","index":0,"value":-4.508266319886663e-09,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 TRAN"},{"name":"tfall_Y","key":"tfall_Y","index":0,"value":1.4562907978878213e-07,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 TRAN"},{"name":"tpd_BY","key":"tpd_BY","index":0,"value":6.430594511057955e-08,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:01901_52ee69dff328112a:c83c3896b09e4413","source":"deepseek","example_id":"01901_52ee69dff328112a","test_name":"test_test_1901_shunt_regulator_opamp_52ee69dff328112a","netlist_hash":"c83c3896b09e4413","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Shunt voltage regulator using an op-amp error amplifier and NPN transistor.","pair_ids":["292dc089370d110b","2049e43b429ca175","40003f8d431676ad"],"prompts":["Shunt voltage regulator using an op-amp error amplifier and NPN transistor.","VREF (5V) and resistive divider (R1=R2=10k) set VOUT = 10V.","Op-amp drives Q1 base to sink excess current through RS, maintaining regulation."],"measurements":[{"name":"VOUT_12","key":"VOUT_12","index":0,"value":10.000015459954739,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"IQ1_20","key":"IQ1_20","index":0,"value":0.08949981624126926,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"VOUT_20","key":"VOUT_20","index":0,"value":10.000016629695892,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"}]} +{"id":"deepseek:02407_7470eb812a95e871:f099ff4d59dd9082","source":"deepseek","example_id":"02407_7470eb812a95e871","test_name":"test_test_2407_switched_capacitor_comparator_with_mosfet_switches_7470eb812a95e871","netlist_hash":"f099ff4d59dd9082","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Switched-capacitor comparator with MOSFET switches","pair_ids":["c136c8a735647819","c51c070067b05d0f","d4376b9c2310ef6c"],"prompts":["Switched-capacitor comparator with MOSFET switches","Non-overlapping clocks shifted to sample input after it crosses 2.5V reference","Output toggles near 5.5\u00b5s with high-gain op-amp and clamping"],"measurements":[{"name":"vin_cross","key":"vin_cross","index":0,"value":2.7663723803596496,"value_is_finite":true,"success":true,"measurement_type":"FIND_WHEN","simulation_name":"#1 TRAN"},{"name":"t_cross","key":"t_cross","index":0,"value":5.5327447607193e-06,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:02130_358af66d19f242a8:2909ed5065020093","source":"deepseek","example_id":"02130_358af66d19f242a8","test_name":"test_test_2130_photodiode_reverse_bias_tia_358af66d19f242a8","netlist_hash":"2909ed5065020093","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"Reverse-biased photodiode (D1) with 5V bias (Vbias) connected to a transimpedance amplifier.","pair_ids":["749315ecb85131fa","8c82c36c3b05307a","70bdb39970f5851f","81d0b43f94a0a1c4","4a0dcb44e5972fef"],"prompts":["Reverse-biased photodiode (D1) with 5V bias (Vbias) connected to a transimpedance amplifier.","I1 provides photocurrent of 50\u00b5A (DC) stepping to 100\u00b5A at 1\u00b5s.","Feedback resistor Rf=10k\u03a9 sets transimpedance gain.","Ideal op-amp (Eop) with open-loop gain 100k forces virtual ground at inv.","Output voltage V(out) = I_photo * Rf (0.5V for 50\u00b5A, 1.0V for 100\u00b5A)."],"measurements":[{"name":"Vout_tran","key":"Vout_tran","index":0,"value":0.9999899401008242,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 TRAN"},{"name":"Vout_DC","key":"Vout_DC","index":0,"value":0.4999949400505033,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 TRAN"},{"name":"Vout_OP","key":"Vout_OP","index":0,"value":0.4999949400505033,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 TRAN"}]} +{"id":"deepseek:02290_91503117d627c38d:9e58887f7e5bf0f5","source":"deepseek","example_id":"02290_91503117d627c38d","test_name":"test_test_2290_bjt_gilbert_gain_cell_as_variable_transconductance_amplifier_91503117d627c38d","netlist_hash":"9e58887f7e5bf0f5","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Design a BJT Gilbert gain cell that acts as a variable transconductance amplifier. Use a 1mA tail current, 2k load resistors, and a control voltage of 50mV to set the gain. Show the transient response for a 10mV 1kHz differential input.","pair_ids":["c67aa6bff2b1ea23","44f9330e5910b2a8","6c096ed281d077e5","f4423fe7871bc645"],"prompts":["Design a BJT Gilbert gain cell that acts as a variable transconductance amplifier. Use a 1mA tail current, 2k load resistors, and a control voltage of 50mV to set the gain. Show the transient response for a 10mV 1kHz differential input.","Create a Gilbert cell amplifier with variable gain controlled by a differential voltage. Simulate with a 1kHz 10mV sine input and measure the output amplitude to calculate gain.","I need a translinear variable gain amplifier based on the Gilbert cell. Use four NPN BJTs in the upper quad and a differential pair for input. Bias with \u00b15V supplies and show the output differential voltage waveform.","Build a measured netlist for a Gilbert multiplier used as a VGA. Set the control voltage to 50mV and measure the peak-to-peak output and gain over a 2ms transient analysis."],"measurements":[{"name":"vin_pp","key":"vin_pp","index":0,"value":0.019960171455750242,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#2 TRAN"},{"name":"gain","key":"gain","index":0,"value":28.25022002766126,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#2 TRAN"},{"name":"vout_pp","key":"vout_pp","index":0,"value":0.5638792354147881,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#2 TRAN"}]} +{"id":"deepseek:00132_073610f5412dac26:d4943cf698518a1a","source":"deepseek","example_id":"00132_073610f5412dac26","test_name":"test_test_132_zener_voltage_regulator_073610f5412dac26","netlist_hash":"d4943cf698518a1a","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"A Zener diode shunt regulator with series resistor and load resistor","pair_ids":["5fbab16b36a58f98","806e64ccc592edd5","92a9085f1afd52d7"],"prompts":["A Zener diode shunt regulator with series resistor and load resistor","Measures output voltage and line regulation by DC sweep of input voltage","Line regulation is computed as V(out) at 12V minus V(out) at 8V"],"measurements":[{"name":"Vout_nom","key":"Vout_nom","index":0,"value":5.086469646840689,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 DC"},{"name":"Vout12","key":"Vout12","index":0,"value":5.121456490672792,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 DC"},{"name":"line_reg","key":"line_reg","index":0,"value":0.09634145638141511,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 DC"},{"name":"Vout8","key":"Vout8","index":0,"value":5.025115034291377,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 DC"}]} +{"id":"deepseek:00743_14f7fa215e0f90c8:d2ba702ab327b61b","source":"deepseek","example_id":"00743_14f7fa215e0f90c8","test_name":"test_test_743_diode_peak_detector_with_bleed_resistor_14f7fa215e0f90c8","netlist_hash":"d2ba702ab327b61b","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"1 kHz 2 V zero-offset sine input","pair_ids":["1fb59947f51e9e0d","d0f31ef9ba7f1933","c0a150832c53ca4f","8084e4d6ae2d0a16"],"prompts":["1 kHz 2 V zero-offset sine input","Diode with IS=1e-12 and RS=1 \u03a9 for near-ideal behavior","1 \u00b5F capacitor and 100 k\u03a9 bleed resistor for slow discharge","Measurements start at 2 ms to exclude initial transient"],"measurements":[{"name":"vout_min","key":"vout_min","index":0,"value":1.4792374366748482,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 TRAN"},{"name":"vout_avg","key":"vout_avg","index":0,"value":1.499852996790327,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 TRAN"},{"name":"vout_max","key":"vout_max","index":0,"value":1.5208535248678314,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:02247_36b1329a22253737:d954903bca1f299b","source":"deepseek","example_id":"02247_36b1329a22253737","test_name":"test_test_2247_track_and_hold_buffer_36b1329a22253737","netlist_hash":"d954903bca1f299b","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Design a track-and-hold circuit using a sampling capacitor and an op-amp buffer.","pair_ids":["9e5282f1a776b3be","85824b0f14e24551","d4149d0081fe7077"],"prompts":["Design a track-and-hold circuit using a sampling capacitor and an op-amp buffer.","Create a SPICE netlist for a switched-capacitor track-and-hold with a clocked switch.","Simulate a sample-and-hold circuit that tracks an analog input with a capacitor and measures droop."],"measurements":[{"name":"v_inp_track","key":"v_inp_track","index":0,"value":0.5153913685724956,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"v_droop","key":"v_droop","index":0,"value":0.0021499676610344798,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 TRAN"},{"name":"v_track","key":"v_track","index":0,"value":0.5150207312682229,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"v_track_err","key":"v_track_err","index":0,"value":0.0003706373042726696,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 TRAN"},{"name":"v_hold","key":"v_hold","index":0,"value":0.5128707636071884,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00354_4152e73ed68f4844:7a5646b67cdb9ac1","source":"deepseek","example_id":"00354_4152e73ed68f4844","test_name":"test_test_354_sallen_key_lowpass_4152e73ed68f4844","netlist_hash":"7a5646b67cdb9ac1","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Sallen-Key second-order low-pass filter","pair_ids":["767c27845f6d997a","5abb5a5bf1db8346","6ff83b0c25282666","cc962ef212ebb17e"],"prompts":["Sallen-Key second-order low-pass filter","Butterworth response with Q=0.707","Unity-gain Sallen-Key topology","Designed for cutoff ~1.59 kHz"],"measurements":[{"name":"att_10k","key":"att_10k","index":0,"value":-31.92744978307815,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"max_gain","key":"max_gain","index":0,"value":-8.685853132702986e-05,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 AC"},{"name":"dc_gain","key":"dc_gain","index":0,"value":0.999989605423052,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"fcut3db","key":"fcut3db","index":0,"value":1589.8205349970035,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 AC"}]} +{"id":"deepseek:00113_034eaeba772ac26c:034eaeba772ac26c","source":"deepseek","example_id":"00113_034eaeba772ac26c","test_name":"test_test_113_half_wave_rectifier_034eaeba772ac26c","netlist_hash":"034eaeba772ac26c","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Design a half-wave rectifier circuit with an AC input, a diode, a smoothing capacitor, and a resistive load. Simulate transient response to verify output voltage and ripple.","pair_ids":["71a431ff00c9c92f","2193b65d0b5e66be","ed69c01bf3f101f0"],"prompts":["Design a half-wave rectifier circuit with an AC input, a diode, a smoothing capacitor, and a resistive load. Simulate transient response to verify output voltage and ripple.","Build a half-wave rectifier: AC source (10Vpp, 60Hz), diode, capacitor filter, 1k load. Measure average output and ripple.","Create a SPICE netlist for a half-wave rectifier with filter capacitor, run transient analysis, and measure DC average and ripple voltage."],"measurements":[{"name":"vout_avg","key":"vout_avg","index":0,"value":9.092497631517015,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 TRAN"},{"name":"vout_pp","key":"vout_pp","index":0,"value":0.3018334992306464,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00098_3d4accaaffd8cb38:3d4accaaffd8cb38","source":"deepseek","example_id":"00098_3d4accaaffd8cb38","test_name":"test_test_98_pi_match_3d4accaaffd8cb38","netlist_hash":"3d4accaaffd8cb38","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Design a Pi-network impedance matching circuit at 1 MHz to match a 50 ohm source to a 200 ohm load.","pair_ids":["58e75b1816c45a2e","d0967a52eef461da","3ebf8941041473ff"],"prompts":["Design a Pi-network impedance matching circuit at 1 MHz to match a 50 ohm source to a 200 ohm load.","Create a low-pass Pi matching network using L and C for 50 to 200 ohm transformation at 1 MHz.","Implement an AC analysis for a Pi impedance matching network operating at 1 MHz frequency."],"measurements":[{"name":"v_in_mag","key":"v_in_mag","index":0,"value":0.4999844738936117,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:01138_245d57ded31501bb:792fb1eafb7ed64b","source":"deepseek","example_id":"01138_245d57ded31501bb","test_name":"test_test_1138_bjt_hartley_oscillator_245d57ded31501bb","netlist_hash":"792fb1eafb7ed64b","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"The oscillator uses a common-emitter NPN transistor with tapped inductor providing 180\u00b0 phase shift.","pair_ids":["f27a1780bc2e0717","54f7ed1a910938f2","93652e1bc427dce8","38d6fdaee99b1121","0b83c17bd0ac0c0d"],"prompts":["The oscillator uses a common-emitter NPN transistor with tapped inductor providing 180\u00b0 phase shift.","VCC is connected to the tap, collector to one end of L1, base to the other end of L2 via C2.","Tank circuit formed by L1, L2 (mutually coupled, k=0.95), and C1 across the series combination.","Resonant frequency ~116 kHz with L1=10uH, L2=90uH, C1=12nF, total series-aiding inductance 157uH.","Transient analysis with UIC and initial conditions to start oscillation."],"measurements":[{"name":"t_per","key":"t_per","index":0,"value":0.00018219654158035703,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 TRAN"},{"name":"vpp","key":"vpp","index":0,"value":5.315126892701912,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#1 TRAN"},{"name":"freq","key":"freq","index":0,"value":109771.56770661908,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00957_5583227f914c87ea:d26222eca68254f7","source":"deepseek","example_id":"00957_5583227f914c87ea","test_name":"test_test_957_complementary_emitter_follower_buffer_5583227f914c87ea","netlist_hash":"d26222eca68254f7","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Complementary (NPN/PNP) emitter follower buffer with diode biasing.","pair_ids":["d22437c71c79ae72","6ae24dc17dc2b9e0","195679e62897a2f0"],"prompts":["Complementary (NPN/PNP) emitter follower buffer with diode biasing.","Uses matched diode and transistor saturation currents to achieve low crossover distortion.","Operates with \u00b112\u202fV supplies and a 1\u202fV, 1\u202fkHz sinusoidal input."],"measurements":[{"name":"gain","key":"gain","index":0,"value":0.9830928588097118,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#2 TRAN"},{"name":"vout_pp","key":"vout_pp","index":0,"value":1.9661857176194235,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#2 TRAN"}]} +{"id":"deepseek:00736_18410ee46ab3ffff:5fb6a294af340d0e","source":"deepseek","example_id":"00736_18410ee46ab3ffff","test_name":"test_test_736_diode_peak_detector_18410ee46ab3ffff","netlist_hash":"5fb6a294af340d0e","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Design a diode peak detector with a bleed resistor to extract the envelope of a sinusoidal signal.","pair_ids":["b8cde26a89e01831","bebcd11e1ef2b93b","b0ef497d4c1dbf22","f3c2a51ef18ab8f1"],"prompts":["Design a diode peak detector with a bleed resistor to extract the envelope of a sinusoidal signal.","Create a simple peak-follower circuit using a diode, capacitor, and resistor that discharges between peaks.","Implement an AM demodulator front-end with a half-wave rectifier, storage capacitor, and load resistor.","Build a circuit that tracks the peak of a sine wave and slowly bleeds the stored voltage."],"measurements":[{"name":"vout_min","key":"vout_min","index":0,"value":4.147132390797432,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 TRAN"},{"name":"vout_max","key":"vout_max","index":0,"value":4.22837185687035,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:01357_573a809d6f3c03b5:3cc2268d9da67cf8","source":"deepseek","example_id":"01357_573a809d6f3c03b5","test_name":"test_test_1357_cmos_inverter_with_capacitive_load_573a809d6f3c03b5","netlist_hash":"3cc2268d9da67cf8","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Simulate a CMOS inverter with a 1pF capacitive load. Measure rise and fall times of the output when driven by a 0-5V pulse.","pair_ids":["32588d94dc5b6eb5","3c817cbd2cbf161b","eba5ac9b3557c502"],"prompts":["Simulate a CMOS inverter with a 1pF capacitive load. Measure rise and fall times of the output when driven by a 0-5V pulse.","Design a CMOS inverter using NMOS and PMOS transistors, apply a pulse input, and measure the output's rise and fall times with a 1pF load.","Model a CMOS inverter with a capacitive load. Use transient analysis to determine the 10%-90% rise and 90%-10% fall times of the output voltage."],"measurements":[{"name":"trise","key":"trise","index":0,"value":1.8367488174335836e-09,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 TRAN"},{"name":"tfall","key":"tfall","index":0,"value":1.9361470494867903e-09,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00509_05ab16d7fc41afb6:05ab16d7fc41afb6","source":"deepseek","example_id":"00509_05ab16d7fc41afb6","test_name":"test_test_509_lag_compensation_rc_05ab16d7fc41afb6","netlist_hash":"05ab16d7fc41afb6","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Passive RC low-pass filter acting as a lag compensator.","pair_ids":["7de45aa4e44d2e23","800cd141cb50adbe","0cb2c0e2c6215c5a"],"prompts":["Passive RC low-pass filter acting as a lag compensator.","AC analysis from 1 Hz to 100 kHz with 10 points per decade.","Measurements verify gain, cutoff frequency, and phase characteristics."],"measurements":[{"name":"phase_at_100k","key":"phase_at_100k","index":0,"value":-1.5692047787077896,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"phase_at_fcutoff","key":"phase_at_fcutoff","index":0,"value":-0.784111500284059,"value_is_finite":true,"success":true,"measurement_type":"FIND_WHEN","simulation_name":"#1 AC"},{"name":"fcutoff","key":"fcutoff","index":0,"value":158.78002247144133,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 AC"},{"name":"dc_gain","key":"dc_gain","index":0,"value":-0.00017144920495022439,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:01468_df31f326c6a4b884:686e3584fb8e13de","source":"deepseek","example_id":"01468_df31f326c6a4b884","test_name":"test_test_1468_opamp_subtractor_df31f326c6a4b884","netlist_hash":"686e3584fb8e13de","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Unity-gain subtractor using an ideal opamp (gain=100k) and four 10 k\u03a9 resistors.","pair_ids":["6acbcf286da796a4","99bb863177ca9643","3a3f797b0fe3997b"],"prompts":["Unity-gain subtractor using an ideal opamp (gain=100k) and four 10 k\u03a9 resistors.","V1 has DC 1.5 V and AC 0.1 V; V2 has DC 2.0 V and AC 0.15 V.","Output DC is expected to be V2 - V1 = 0.5 V; AC magnitude is 0.05 V."],"measurements":[{"name":"vout_ac","key":"vout_ac","index":0,"value":0.04999900001999959,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"vout_dc","key":"vout_dc","index":0,"value":0.49999000020034146,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 OP"}]} +{"id":"deepseek:00722_3a99da14b312ff87:d4b4b80ac54103f6","source":"deepseek","example_id":"00722_3a99da14b312ff87","test_name":"test_test_722_precision_full_wave_rectifier_3a99da14b312ff87","netlist_hash":"d4b4b80ac54103f6","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Precision full-wave absolute-value rectifier using two op\u2011amps (E sources with gain 100k) and a Schottky diode.","pair_ids":["b43a27391b1d56ca","7cd4ba6223f3c4f3","c2927cc4884e355f","2b19b3bef3d1f352"],"prompts":["Precision full-wave absolute-value rectifier using two op\u2011amps (E sources with gain 100k) and a Schottky diode.","First op\u2011amp (E_U1) and diode D1 produce a half\u2011wave rectified positive signal at node vpos; pull\u2011down resistor R_PULL holds vpos at 0 when the diode is off.","Second op\u2011amp (E_U2) sums the input (via R1) and the half\u2011wave signal (vpos) to generate Vout = 2\u00b7V(vpos) \u2013 Vin = |Vin|.","A near\u2011ideal Schottky diode model (IS=1e\u201112, Rs=0.1) eliminates reverse\u2011leakage offset and ensures accurate full\u2011wave rectification."],"measurements":[{"name":"V_MIN","key":"V_MIN","index":0,"value":-0.06751354077914584,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 TRAN"},{"name":"V_AVG","key":"V_AVG","index":0,"value":0.9571715846215835,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 TRAN"},{"name":"V_MAX","key":"V_MAX","index":0,"value":1.4995145381835755,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"},{"name":"V_IN_MAX","key":"V_IN_MAX","index":0,"value":1.4995843553614852,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:02216_427a27fe55c06abb:db21374203ddef1e","source":"deepseek","example_id":"02216_427a27fe55c06abb","test_name":"test_test_2216_sar_sample_comparator_427a27fe55c06abb","netlist_hash":"db21374203ddef1e","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"Sample-and-hold front end with 10pF hold capacitor and unity-gain buffer (E-source).","pair_ids":["20f3db0f9e86ad70","fa19ff5ff1a300ec","994d3c5b727950e9","2e6dab8a5f41a7a8","1db1aff5bc8e0230"],"prompts":["Sample-and-hold front end with 10pF hold capacitor and unity-gain buffer (E-source).","Voltage-controlled switch (S1) samples 2.3V DC input via PULSE control signal at start of conversion.","Comparator implemented by behavioral E-source comparing buffered hold voltage to a stepped reference.","Reference generated by summing two PULSE sources to produce 0\u21922.5V step at 5\u00b5s and 2.5\u21921.25V step at 10\u00b5s.","Transient analysis from 0 to 20\u00b5s captures hold voltage and comparator output timing."],"measurements":[{"name":"high_pulse_width","key":"high_pulse_width","index":0,"value":4.971859999999974e-06,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 TRAN"},{"name":"t_cross2","key":"t_cross2","index":0,"value":9.801e-06,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 TRAN"},{"name":"t_cross1","key":"t_cross1","index":0,"value":4.829140000000026e-06,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 TRAN"},{"name":"out_at_12u","key":"out_at_12u","index":0,"value":0,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"out_at_7u","key":"out_at_7u","index":0,"value":5,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"v_hold_at_5u","key":"v_hold_at_5u","index":0,"value":2.293124660069749,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00754_73c751b68f861323:8a905037ac23bb6b","source":"deepseek","example_id":"00754_73c751b68f861323","test_name":"test_test_754_biased_negative_diode_limiter_73c751b68f861323","netlist_hash":"8a905037ac23bb6b","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"The circuit is a biased negative diode clipper that limits the negative voltage swing using a diode with a DC bias source.","pair_ids":["74dcbbc677562cfb","a209e2a039dfada4","e904e5092cc241b8"],"prompts":["The circuit is a biased negative diode clipper that limits the negative voltage swing using a diode with a DC bias source.","During negative input half\u2011cycles, the diode becomes forward biased when the output falls below the bias voltage minus the diode drop, clamping the output to about -3.7V.","Positive half\u2011cycles are essentially unaffected because the diode is reverse biased, allowing the output to follow the input through the resistive divider."],"measurements":[{"name":"vout_min","key":"vout_min","index":0,"value":-3.7123946937979664,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 TRAN"},{"name":"vout_max","key":"vout_max","index":0,"value":4.545447504259743,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:01855_d758dce5288888e1:a63497ca56365dda","source":"deepseek","example_id":"01855_d758dce5288888e1","test_name":"test_test_1855_sawtooth_oscillator_d758dce5288888e1","netlist_hash":"a63497ca56365dda","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Design a sawtooth waveform generator using a constant current source, a capacitor, and a voltage-controlled switch reset. The switch should be driven by a periodic pulse. Provide a SPICE netlist with transient analysis and measure the peak voltage, minimum voltage, period, average voltage, and frequency of the output.","pair_ids":["e20931c3aa577737","f53a549c360db208","19e7df96dc96bef4"],"prompts":["Design a sawtooth waveform generator using a constant current source, a capacitor, and a voltage-controlled switch reset. The switch should be driven by a periodic pulse. Provide a SPICE netlist with transient analysis and measure the peak voltage, minimum voltage, period, average voltage, and frequency of the output.","Create an oscillator that produces a linear ramp reset periodically by a switch. Use a current source to charge a capacitor and a pulse-controlled switch to discharge it. Simulate the transient response and extract performance metrics like amplitude, period, and average voltage.","Generate a sawtooth oscillator circuit in SPICE: a capacitor is charged by a constant current, and a switch shorts it to ground under control of a pulse generator. Run a transient analysis and measure the key characteristics: peak, minimum, period, average output, and frequency."],"measurements":[{"name":"Vpeak","key":"Vpeak","index":0,"value":1.000963767367594,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 tran"},{"name":"Period","key":"Period","index":0,"value":0.0010099999993818988,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 tran"},{"name":"Freq","key":"Freq","index":0,"value":990.0990105069122,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 tran"},{"name":"AvgV","key":"AvgV","index":0,"value":0.48900298305398937,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 tran"},{"name":"Vmin","key":"Vmin","index":0,"value":0,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 tran"}]} +{"id":"deepseek:00003_92d8fc2086dc14d2:18c1aa53cfcab0d7","source":"deepseek","example_id":"00003_92d8fc2086dc14d2","test_name":"test_test_3_pi_resistive_attenuator_92d8fc2086dc14d2","netlist_hash":"18c1aa53cfcab0d7","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Pi attenuator for 50-ohm system with 6 dB attenuation.","pair_ids":["3e3bf08c65b5aeec","72d2ed57d2def8a7","a4ba71c7c8bbca9d"],"prompts":["Pi attenuator for 50-ohm system with 6 dB attenuation.","Series resistors 16.7 ohms, shunt resistor 66.7 ohms.","DC and AC output voltages should be close to 0.5 V."],"measurements":[{"name":"att_1k","key":"att_1k","index":0,"value":0.4995004995004995,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"vout_dc","key":"vout_dc","index":0,"value":0.4995004995004995,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#3 TRAN"}]} +{"id":"deepseek:01011_7132ae30bc66fd22:4146a120f46df593","source":"deepseek","example_id":"01011_7132ae30bc66fd22","test_name":"test_test_1011_widlar_bjt_current_source_7132ae30bc66fd22","netlist_hash":"4146a120f46df593","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Widlar current source using NPN BJTs with emitter degeneration on Q2","pair_ids":["6376a40dffb6054a","71753d7f823e82ec","9f1f89d6070be3b6","2fff020fadaff06d"],"prompts":["Widlar current source using NPN BJTs with emitter degeneration on Q2","Reference current set by R1 (10k) from 15V supply yields ~1.4 mA","Output current reduced by 2k emitter resistor to ~50 \u00b5A","DC sweep from 10V to 20V shows minimal output variation"],"measurements":[{"name":"Iratio","key":"Iratio","index":0,"value":0.03269167089781487,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#2 DC"},{"name":"Iref","key":"Iref","index":0,"value":0.001427694847135921,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#2 DC"},{"name":"Iout","key":"Iout","index":0,"value":4.667373008507364e-05,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#2 DC"},{"name":"Iref_at_15","key":"Iref_at_15","index":0,"value":0.0014276401867064337,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"Iout_at_15","key":"Iout_at_15","index":0,"value":4.688106603093129e-05,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"}]} +{"id":"deepseek:02232_1aa211809fa7244a:1aa211809fa7244a","source":"deepseek","example_id":"02232_1aa211809fa7244a","test_name":"test_test_2232_samphold_frontend_clk_1aa211809fa7244a","netlist_hash":"1aa211809fa7244a","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Sample-and-hold front-end with analog switch, hold capacitor, and unity-gain buffer","pair_ids":["af051a98c97caf3d","016343e42cd3c37a","abec8c223eba2996","3ce66d72178e3d52"],"prompts":["Sample-and-hold front-end with analog switch, hold capacitor, and unity-gain buffer","Input: 1kHz 1V amplitude sine wave; Clock: 50kHz, 50% duty cycle","Switch ON during clock high (10\u00b5s), capacitor tracks input, then holds value","Output buffer isolates hold capacitor from load"],"measurements":[{"name":"vhold2","key":"vhold2","index":0,"value":0.30903974002466794,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"vhold","key":"vhold","index":0,"value":0.0628226533652652,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00200_b5e8f8e2cade57f2:1b9d102563fcab29","source":"deepseek","example_id":"00200_b5e8f8e2cade57f2","test_name":"test_test_200_bjt_b5e8f8e2cade57f2","netlist_hash":"1b9d102563fcab29","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"BJT differential pair with active PNP current mirror load and emitter degeneration.","pair_ids":["ad143ffda4e5fc22","0ce143cfb3c4fea8","ed3283c44238043f","99cfc893843e4bf3"],"prompts":["BJT differential pair with active PNP current mirror load and emitter degeneration.","Input NPN pair with R1=1020 \u03a9 and R2=1000 \u03a9 degeneration to compensate mirror base currents.","PNP mirror uses 1 k\u03a9 emitter degeneration for improved matching and output impedance.","Output loaded with 100 k\u03a9 to set common-mode near 0 V without excessive gain loss."],"measurements":[{"name":"vout_neg1m","key":"vout_neg1m","index":0,"value":0.5328162741825507,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"vout_pos1m","key":"vout_pos1m","index":0,"value":0.358263483936753,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"vout_0","key":"vout_0","index":0,"value":0.44554030577273807,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"gain","key":"gain","index":0,"value":-87.27639512289886,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#2 DC"},{"name":"tail_i","key":"tail_i","index":0,"value":0.001,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"}]} +{"id":"deepseek:01507_44d2cb8e3ec14672:8c0e5f92659b8adf","source":"deepseek","example_id":"01507_44d2cb8e3ec14672","test_name":"test_test_1507_opamp_transimpedance_44d2cb8e3ec14672","netlist_hash":"8c0e5f92659b8adf","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Build a transimpedance amplifier using an ideal op-amp with gain 1e6, feedback resistor 100k, and 10pF feedback capacitor. Perform DC operating point and AC analysis, then measure the peak gain and the -3 dB bandwidth.","pair_ids":["4c8c3d633b62d477","e6237903b7fa9fe1","9fe5f45aa40fa6df"],"prompts":["Build a transimpedance amplifier using an ideal op-amp with gain 1e6, feedback resistor 100k, and 10pF feedback capacitor. Perform DC operating point and AC analysis, then measure the peak gain and the -3 dB bandwidth.","Model a current-to-voltage converter stage. The input is an AC current source of amplitude 1. The op-amp is behavioral E-source E1. Use .AC to sweep from 1 Hz to 100 MHz and extract the -3 dB frequency where the output magnitude drops to 70.71 k\u03a9.","Create a SPICE netlist for a transimpedance amplifier with components E, R, I, V. Use Rf=100k and Cf=10p. Add .OP and .AC directives. Measure the gain at 1 Hz and the bandwidth when V(out) falls to 70.71k."],"measurements":[{"name":"bw","key":"bw","index":0,"value":159206.8168254257,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#2 AC"},{"name":"max_gain_db","key":"max_gain_db","index":0,"value":99.99999131394326,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#2 AC"},{"name":"gain_at_1Hz","key":"gain_at_1Hz","index":0,"value":99.99999131394326,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"}]} +{"id":"deepseek:02244_13c278a09c7a5088:a7fafa710aa4b41b","source":"deepseek","example_id":"02244_13c278a09c7a5088","test_name":"test_test_2244_track_hold_buffer_sampling_cap_13c278a09c7a5088","netlist_hash":"a7fafa710aa4b41b","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Track-and-hold buffer using a voltage-controlled switch to sample a 1kHz sine input onto a hold capacitor.","pair_ids":["9a38852bb09b0b48","dea5c2015f823e1a","979c3ae8176d7cf3","4864ea29898ed0b6"],"prompts":["Track-and-hold buffer using a voltage-controlled switch to sample a 1kHz sine input onto a hold capacitor.","During the track phase (0-0.24ms), the switch is on, and the unity-gain E-source buffers the capacitor voltage with minimal loading.","When the pulse goes low, the switch opens, and the hold capacitor slowly discharges through the 10M\u03a9 off-resistance, causing a predictable droop.","Measurements capture the peak tracked voltage, the held voltage at 1ms, and the droop between them."],"measurements":[{"name":"v_hold1","key":"v_hold1","index":0,"value":0.909997705753999,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 tran"},{"name":"v_track_max","key":"v_track_max","index":0,"value":0.9806911586498946,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 tran"},{"name":"droop","key":"droop","index":0,"value":0.07069345289589568,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 tran"}]} +{"id":"deepseek:01204_2cb18e919e1f10a4:383c11da2bba6385","source":"deepseek","example_id":"01204_2cb18e919e1f10a4","test_name":"test_test_1204_nmos_cs_amplifier_with_diode_connected_pmos_load_2cb18e919e1f10a4","netlist_hash":"383c11da2bba6385","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"NMOS common-source amplifier with diode-connected PMOS load","pair_ids":["b91de4adee0b780b","a638a83323190e80","e8d54ab153e88e5e"],"prompts":["NMOS common-source amplifier with diode-connected PMOS load","DC operating point and transfer curve with VIN swept at 1.5 V","AC analysis from 1 Hz to 10 GHz with 10 points per decade"],"measurements":[{"name":"bw","key":"bw","index":0,"value":180475197.63203698,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#2 AC"},{"name":"gain_1k","key":"gain_1k","index":0,"value":2.7928814379494744,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"vout_dc","key":"vout_dc","index":0,"value":1.472510327539028,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#3 DC"}]} +{"id":"deepseek:00849_3cc395b2f0005eb5:662a80f52a5f9164","source":"deepseek","example_id":"00849_3cc395b2f0005eb5","test_name":"test_test_849_zener_reference_with_emitter_follower_buffer_3cc395b2f0005eb5","netlist_hash":"662a80f52a5f9164","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Zener diode D1 provides a stable reference voltage of ~5.6V at its cathode.","pair_ids":["af967081b1faf856","15f0ae71f93047f7","9b200a5ddde1aed5"],"prompts":["Zener diode D1 provides a stable reference voltage of ~5.6V at its cathode.","NPN emitter follower Q1 buffers the reference, providing a low-impedance output at the emitter.","Load resistor Rload (10k) draws a small current, ensuring the transistor operates in active region."],"measurements":[{"name":"out_at_10","key":"out_at_10","index":0,"value":4.907231419805181,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"out_at_15","key":"out_at_15","index":0,"value":4.933895079736657,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"line_reg","key":"line_reg","index":0,"value":7499.578445352428,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#2 DC"},{"name":"out_at_7","key":"out_at_7","index":0,"value":4.8738984521738375,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"}]} +{"id":"deepseek:01351_0886c68dcb6bbdc5:664c9d86f20cdb38","source":"deepseek","example_id":"01351_0886c68dcb6bbdc5","test_name":"test_test_1351_cmos_transmission_gate_sample_hold_0886c68dcb6bbdc5","netlist_hash":"664c9d86f20cdb38","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"CMOS transmission gate sample-and-hold with NMOS and PMOS switch","pair_ids":["46d5320a338d5846","5064f93e907d319d","ce8865410dbb3454","b00c25d410e3eecb","04b2ed8ef6c2772c"],"prompts":["CMOS transmission gate sample-and-hold with NMOS and PMOS switch","Complementary clock drives both transistors for low on-resistance","Input is 2.5V offset 1V amplitude 1kHz sine wave","Clock period 2us, 1us high, 1us low","Hold capacitor 100pF with 1e12 ohm bleed resistor"],"measurements":[{"name":"vhold2","key":"vhold2","index":0,"value":2.3360427955591114,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"diff2","key":"diff2","index":0,"value":0.18280564412994016,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 TRAN"},{"name":"diff1","key":"diff1","index":0,"value":0.04060033959712683,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 TRAN"},{"name":"vhold1","key":"vhold1","index":0,"value":2.46568280435222,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"vin2","key":"vin2","index":0,"value":2.5188484396890516,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"vin1","key":"vin1","index":0,"value":2.506283143949347,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00058_a8ffe3b75db60b91:dc2244f52f9359a8","source":"deepseek","example_id":"00058_a8ffe3b75db60b91","test_name":"test_test_58_first_order_rc_lpf_a8ffe3b75db60b91","netlist_hash":"dc2244f52f9359a8","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Design a simple first-order RC low-pass filter using a 1k\u03a9 resistor and a 1\u00b5F capacitor. Perform an AC analysis to determine the -3 dB cutoff frequency.","pair_ids":["4cee225cfef7235b","b6b356dbc45c4927","e90b5be0b98fa921"],"prompts":["Design a simple first-order RC low-pass filter using a 1k\u03a9 resistor and a 1\u00b5F capacitor. Perform an AC analysis to determine the -3 dB cutoff frequency.","I need a passive low-pass filter with a cutoff frequency around 160 Hz. Use R=1k, C=1\u00b5F, and simulate the AC response to verify.","Create a SPICE netlist for a basic RC low-pass filter. Include a 1k resistor and 1\u00b5F capacitor, and measure the DC gain and -3dB frequency from an AC sweep."],"measurements":[{"name":"f3db","key":"f3db","index":0,"value":158.7774950838437,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 AC"},{"name":"gain_dc","key":"gain_dc","index":0,"value":0.9999605231408795,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 AC"}]} +{"id":"deepseek:00235_aa42c6a53b457e42:956deebef0dae521","source":"deepseek","example_id":"00235_aa42c6a53b457e42","test_name":"test_test_235_bjt_aa42c6a53b457e42","netlist_hash":"956deebef0dae521","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Class-A emitter follower with single NPN BJT, biased via resistive divider, AC coupled input and output.","pair_ids":["3269878c3241a5b3","78365e28c0a13590","e3af5c697db5264f"],"prompts":["Class-A emitter follower with single NPN BJT, biased via resistive divider, AC coupled input and output.","Operating point ensures transistor never cuts off; output follows input with nearly unity gain.","Measurements verify quiescent conditions and dynamic behavior to confirm class-A operation."],"measurements":[{"name":"Vout_peak","key":"Vout_peak","index":0,"value":0.4707068804322523,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#2 TRAN"},{"name":"Vout_pp","key":"Vout_pp","index":0,"value":0.9469490625702113,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#2 TRAN"},{"name":"Ve_q","key":"Ve_q","index":0,"value":7.753886617237467,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 OP"},{"name":"Iq","key":"Iq","index":0,"value":0.08520754524436777,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 OP"},{"name":"Vout_rms","key":"Vout_rms","index":0,"value":0.33557185564813097,"value_is_finite":true,"success":true,"measurement_type":"RMS","simulation_name":"#2 TRAN"},{"name":"Ie_min","key":"Ie_min","index":0,"value":0.08004938465207762,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#2 TRAN"}]} +{"id":"deepseek:00728_7c7cf66d3fd2b6e9:04d5b8454fd9c12c","source":"deepseek","example_id":"00728_7c7cf66d3fd2b6e9","test_name":"test_test_728_active_peak_detector_7c7cf66d3fd2b6e9","netlist_hash":"04d5b8454fd9c12c","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Design an active peak detector using op-amps, diodes, and a capacitor to capture the peak of a pulse signal and provide a buffered output.","pair_ids":["b55fbfbced7a453b","35a2be51595ba84c","a712bb571ea097c8"],"prompts":["Design an active peak detector using op-amps, diodes, and a capacitor to capture the peak of a pulse signal and provide a buffered output.","Create a precision peak detector circuit with a sample-and-hold function, utilizing a behavioral op-amp, a diode, a storage capacitor, and a unity-gain buffer to read the held voltage.","Simulate a peak detector that takes a 2V amplitude pulse input, charges a capacitor through a diode driven by an op-amp, and buffers the capacitor voltage to the output. Include analysis to verify the hold accuracy."],"measurements":[{"name":"peak_out","key":"peak_out","index":0,"value":1.9999977870165255,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"},{"name":"hold_error","key":"hold_error","index":0,"value":1.1064917372349825e-06,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 TRAN"},{"name":"peak_in","key":"peak_in","index":0,"value":2,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"},{"name":"vout_at_4m","key":"vout_at_4m","index":0,"value":1.9995781719432248,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:01447_9ebaf4836c6702a1:1b9126d397da20cc","source":"deepseek","example_id":"01447_9ebaf4836c6702a1","test_name":"test_test_1447_non_inverting_opamp_amp_bias_resistor_9ebaf4836c6702a1","netlist_hash":"1b9126d397da20cc","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Non-inverting amplifier with ideal op-amp (gain=100k) and dual \u00b115V supplies.","pair_ids":["15f8957be0c464f9","ceafd69f736ebd37","be136c9298d7a3e5"],"prompts":["Non-inverting amplifier with ideal op-amp (gain=100k) and dual \u00b115V supplies.","Feedback resistors Rf=Rg=10k set gain of 2 (6.02 dB).","Input bias resistor Rb=100k to ground for DC path."],"measurements":[{"name":"DC_VOUT","key":"DC_VOUT","index":0,"value":0,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#3 DC"},{"name":"AC_GAIN","key":"AC_GAIN","index":0,"value":6.020426197230019,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"AC_GAIN_LIN","key":"AC_GAIN_LIN","index":0,"value":1.9999600008013658,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"}]} +{"id":"deepseek:01280_a4ed49ae2b26e323:b185e0d3143561ce","source":"deepseek","example_id":"01280_a4ed49ae2b26e323","test_name":"test_test_1280_source_degenerated_current_mirror_a4ed49ae2b26e323","netlist_hash":"b185e0d3143561ce","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"MOS current mirror with source degeneration uses source resistors to improve output resistance and reduce current mismatch.","pair_ids":["c275cb69a3d4f75b","c7d61f65c7717131","0c1dec374c405312","e3f936eb27b7cad8"],"prompts":["MOS current mirror with source degeneration uses source resistors to improve output resistance and reduce current mismatch.","Reference current is set by a 10k resistor from supply to diode-connected transistor M1 with 500\u03a9 source resistor.","Output transistor M2 has 1k\u03a9 source resistor, and output current is measured via a 0V voltage source (Vmeas) at Vout=3V.","Output resistance is calculated from the change in output current when Vout varies around 3V."],"measurements":[{"name":"Iref","key":"Iref","index":0,"value":0.0003272989614267098,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 DC"},{"name":"Iout","key":"Iout","index":0,"value":0.0002450670828964886,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 DC"},{"name":"Rout","key":"Rout","index":0,"value":435192.6597633569,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 DC"},{"name":"I_low","key":"I_low","index":0,"value":0.00024483710855510363,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 DC"},{"name":"ratio","key":"ratio","index":0,"value":0.7487560664055607,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 DC"},{"name":"I_high","key":"I_high","index":0,"value":0.0002452966751298449,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 DC"}]} +{"id":"deepseek:00035_db209361b4dd95bc:6c5fe4295887c2c6","source":"deepseek","example_id":"00035_db209361b4dd95bc","test_name":"test_test_35_rc_delay_high_z_load_db209361b4dd95bc","netlist_hash":"6c5fe4295887c2c6","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"Simple RC delay network with R=10k and C=100nF driven by a 5V pulse source.","pair_ids":["9c288d1191f56431","af43c63aa3625b16","39700b801d340095","0ce7b7b2b66e3140","2749edde7631aa29"],"prompts":["Simple RC delay network with R=10k and C=100nF driven by a 5V pulse source.","The output drives a high-impedance load, acting as a low-pass filter.","The transient simulation runs for 3ms with a time step of 1us.","Fixed the pulse parameters: set the on-time to 3ms so the output can reach 4.5V on the first rising edge, enabling the rise time measurement.","Rise time and propagation delay are measured using .MEAS statements."],"measurements":[{"name":"tdelay","key":"tdelay","index":0,"value":0.0006934034326613891,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 TRAN"},{"name":"trise","key":"trise","index":0,"value":0.002196532734655162,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00121_8cd8f07ae1b6dd5a:d1dc9c7a11f8f843","source":"deepseek","example_id":"00121_8cd8f07ae1b6dd5a","test_name":"test_test_121_full_wave_bridge_rectifier_with_filter_capacitor_8cd8f07ae1b6dd5a","netlist_hash":"d1dc9c7a11f8f843","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Full-wave bridge rectifier converts 10Vrms 50Hz AC to DC using four diodes.","pair_ids":["a15601b48d081631","c26ca8782a5bb888","99f1245d622c80bc"],"prompts":["Full-wave bridge rectifier converts 10Vrms 50Hz AC to DC using four diodes.","Filter capacitor of 1000\u00b5F reduces ripple to approximately 90mV under 1k\u03a9 load.","After initial transient (1.5s), output stabilizes around 8.5V DC."],"measurements":[{"name":"Vout_pp","key":"Vout_pp","index":0,"value":0.14179898463570773,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#1 TRAN"},{"name":"Vout_avg","key":"Vout_avg","index":0,"value":8.441187414587162,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:02445_16d0db7d8f35e86a:bdc3ad3432676604","source":"deepseek","example_id":"02445_16d0db7d8f35e86a","test_name":"test_test_2445_parameterized_bjt_current_mirror_subcircuit_16d0db7d8f35e86a","netlist_hash":"bdc3ad3432676604","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Parameterized BJT current mirror using NPN subcircuit","pair_ids":["57de896b6d65c721","f71a824d703de1c9","88e24e4f7388186a"],"prompts":["Parameterized BJT current mirror using NPN subcircuit","Reference current set by ideal current source Iref","Output current measured via 0 V source Vmeas for sign consistency"],"measurements":[{"name":"Iout_val","key":"Iout_val","index":0,"value":0.001026636797110174,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"Iin_val","key":"Iin_val","index":0,"value":0.001,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"}]} +{"id":"deepseek:01625_cad67fe9e59e0088:98743af5d036a84e","source":"deepseek","example_id":"01625_cad67fe9e59e0088","test_name":"test_test_1625_ramp_comparator_pwm_generator_cad67fe9e59e0088","netlist_hash":"98743af5d036a84e","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"A 200\u202fHz sawtooth ramp (0\u202f\u2192\u202f5\u202fV) is generated by a PULSE voltage source with rise time 4.998\u202fms, fall time 1\u202f\u00b5s, pulse width 1\u202f\u00b5s, and period 5\u202fms.","pair_ids":["740386854433ba7b","b5a6cbb4e8f3f906","f90e388e7cd2e765","013da467641adbd5"],"prompts":["A 200\u202fHz sawtooth ramp (0\u202f\u2192\u202f5\u202fV) is generated by a PULSE voltage source with rise time 4.998\u202fms, fall time 1\u202f\u00b5s, pulse width 1\u202f\u00b5s, and period 5\u202fms.","A 2.5\u202fV DC reference is compared with the ramp using a high\u2011gain E\u2011source with limit to 0\u20115\u202fV, producing a PWM output.","The 1\u202fk\u03a9 load resistor provides a finite load for the comparator output.","Transient analysis runs for 10\u202fms with a 10\u202fns step, and measurements extract period, high time, duty cycle, and average voltage."],"measurements":[{"name":"high_time","key":"high_time","index":0,"value":0.0024896847999999992,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 TRAN"},{"name":"vout_avg","key":"vout_avg","index":0,"value":2.463502399901442,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 TRAN"},{"name":"period","key":"period","index":0,"value":0.005052364800000031,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 TRAN"},{"name":"duty","key":"duty","index":0,"value":0.4927761352466045,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:02352_e865d606b3a7b770:e865d606b3a7b770","source":"deepseek","example_id":"02352_e865d606b3a7b770","test_name":"test_test_2352_lc_resonant_tank_ac_e865d606b3a7b770","netlist_hash":"e865d606b3a7b770","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Perform an AC analysis on a parallel LC tank with a 50 ohm source resistance. Determine the peak output voltage magnitude.","pair_ids":["380275c0fa62a41b","d6484cc2f5e9430b","3ba947cba5682f69"],"prompts":["Perform an AC analysis on a parallel LC tank with a 50 ohm source resistance. Determine the peak output voltage magnitude.","Simulate the frequency response of an LC resonant circuit driven by an AC source through a 50 ohm resistor. Find the max and min output voltage.","Run an AC sweep of an RLC parallel tank. Measure the maximum and minimum voltage across the parallel combination."],"measurements":[{"name":"vout_min","key":"vout_min","index":0,"value":0.00015914259891147697,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 AC"},{"name":"vout_max","key":"vout_max","index":0,"value":0.9982466146824995,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 AC"}]} +{"id":"deepseek:00912_281dbf49b75cc738:c2fec5e60fd561df","source":"deepseek","example_id":"00912_281dbf49b75cc738","test_name":"test_test_912_bootstrap_common_emitter_amplifier_281dbf49b75cc738","netlist_hash":"c2fec5e60fd561df","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Bootstrapped common-emitter amplifier using BJT with bias network R1,R2,R3 and bootstrap capacitor C_BOOT to raise input impedance.","pair_ids":["29f8638d2536e858","ef63b7fa593757b0","b7a0dd86ee8c7e5c"],"prompts":["Bootstrapped common-emitter amplifier using BJT with bias network R1,R2,R3 and bootstrap capacitor C_BOOT to raise input impedance.","The amplifier is DC biased at about 5V collector, AC coupled with C_IN and C_OUT.","AC analysis is performed to measure gain; .MEAS commands now use VM() to get magnitude, ensuring positive values for assertions."],"measurements":[{"name":"gain_at_10k","key":"gain_at_10k","index":0,"value":4.796922955264181,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"gain_max","key":"gain_max","index":0,"value":4.7969234099132905,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#2 AC"},{"name":"gain_at_1k","key":"gain_at_1k","index":0,"value":4.79687794553158,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"}]} +{"id":"deepseek:00350_5907d54627fa350f:c56d6185d38e27ce","source":"deepseek","example_id":"00350_5907d54627fa350f","test_name":"test_test_350_opamp_differentiator_with_input_limit_resistor_5907d54627fa350f","netlist_hash":"c56d6185d38e27ce","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Practical differentiator using an ideal op-amp with a series input resistor to limit high-frequency gain.","pair_ids":["c54f4211ac3ebb48","5ea00caef33c0a7b","fc6cd9a3b9a657e7","77ea5386ff9d5943"],"prompts":["Practical differentiator using an ideal op-amp with a series input resistor to limit high-frequency gain.","At low frequencies, the circuit approximates a differentiator with gain ~ -j\u03c9R2C1.","The series resistor R1 introduces a pole at f_p = 1/(2\u03c0 R1 C1) \u2248 15.9 kHz, above which the gain becomes flat.","AC analysis verifies the differentiator behavior by checking the output magnitude at 100 Hz."],"measurements":[{"name":"mag_out","key":"mag_out","index":0,"value":0.628312436490263,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:01829_ca5b78fe1c3741d2:2e0c49cd0a90baae","source":"deepseek","example_id":"01829_ca5b78fe1c3741d2","test_name":"test_test_1829_schmitt_trigger_rc_relaxation_oscillator_ca5b78fe1c3741d2","netlist_hash":"2e0c49cd0a90baae","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"Schmitt-trigger RC relaxation oscillator using a high-gain op-amp (E1) with output clamping","pair_ids":["ec75ada6f3e4154e","a85f485f3a771f49","0387c2be15b3d9ce","4b74a5e1f868050e","70d02ac63190ca28"],"prompts":["Schmitt-trigger RC relaxation oscillator using a high-gain op-amp (E1) with output clamping","Positive feedback via R1,R2 sets hysteresis thresholds at \u00b1\u03b2\u00b7Vsat = \u00b12.5 V","Negative feedback via R3,C1 produces triangular charge/discharge waveform at inn","Output square wave at out swings between approximately \u00b15 V","Oscillation frequency governed by R3\u00b7C1 and feedback divider ratio"],"measurements":[{"name":"vout_min","key":"vout_min","index":0,"value":-5,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 TRAN"},{"name":"t_period","key":"t_period","index":0,"value":0.0022000000000000058,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 TRAN"},{"name":"freq","key":"freq","index":0,"value":454.54545454545337,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 TRAN"},{"name":"vcap_min","key":"vcap_min","index":0,"value":-2.4941443993171117,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 TRAN"},{"name":"vcap_max","key":"vcap_max","index":0,"value":2.4900667290889875,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"},{"name":"vout_max","key":"vout_max","index":0,"value":5,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00302_0cb1c487da10e296:532b6e4cb82ae7fa","source":"deepseek","example_id":"00302_0cb1c487da10e296","test_name":"test_test_302_cmos_nor2_gate_transient_response_0cb1c487da10e296","netlist_hash":"532b6e4cb82ae7fa","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"CMOS NOR2 gate with two series PMOS and two parallel NMOS.","pair_ids":["955b8ec6a6b1e98d","e7938b2e34904c2e","f5b5da697f216191"],"prompts":["CMOS NOR2 gate with two series PMOS and two parallel NMOS.","Transient analysis with two pulse inputs A and B.","Measurement of max/min output voltage, and propagation delays tphl and tplh."],"measurements":[{"name":"vmin","key":"vmin","index":0,"value":-4.340100480012181e-05,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 TRAN"},{"name":"vmax","key":"vmax","index":0,"value":3.3002744816459355,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"},{"name":"tphl","key":"tphl","index":0,"value":2.365997788965483e-11,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 TRAN"},{"name":"tplh","key":"tplh","index":0,"value":1.9422482559239952e-11,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:02229_fd34bd7d9d46ff5a:58f0c51005381b23","source":"deepseek","example_id":"02229_fd34bd7d9d46ff5a","test_name":"test_test_2229_first_order_sigma_delta_fd34bd7d9d46ff5a","netlist_hash":"58f0c51005381b23","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Design a first-order sigma-delta modulator using an integrator and a comparator. The integrator should be an active RC integrator with an op-amp, and the comparator should use a high-gain amplifier with diode clamping. Include a sample-and-hold driven by a pulse clock to create a discrete-time feedback DAC. Use behavioral E-sources for the op-amps.","pair_ids":["5611cf1f6e4c5c0e","a0cbe6bc4ca4d1c5","834aff95b1ec0d90"],"prompts":["Design a first-order sigma-delta modulator using an integrator and a comparator. The integrator should be an active RC integrator with an op-amp, and the comparator should use a high-gain amplifier with diode clamping. Include a sample-and-hold driven by a pulse clock to create a discrete-time feedback DAC. Use behavioral E-sources for the op-amps.","Create a single-bit sigma-delta ADC with continuous-time integrator and 1-bit DAC. Use an E-source op-amp for the integrator and another E-source for the comparator. Add a clocked switch and hold capacitor to sample the comparator output, and feed back the sampled voltage through a scaling resistor.","Build a first-order delta-sigma modulator in SPICE with ideal op-amp models (E sources) and a pulse generator as the clock. The input is a DC voltage, and the output bitstream is represented by the sampled DAC voltage. Include transient analysis and measurements of the average DAC output."],"measurements":[{"name":"avg_in","key":"avg_in","index":0,"value":0.3000000000000185,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 TRAN"},{"name":"avg_dac","key":"avg_dac","index":0,"value":-0.2999999999939826,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 TRAN"}]} +{"id":"deepseek:00586_6600b204beec1bb6:6581095f3a2d1441","source":"deepseek","example_id":"00586_6600b204beec1bb6","test_name":"test_test_586_lc_high_pass_ladder_6600b204beec1bb6","netlist_hash":"6581095f3a2d1441","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"Design a 3rd order Butterworth high-pass LC ladder filter with 50 ohm impedance and 1 kHz cutoff.","pair_ids":["aa541b9b2eb59d4c","fb9c98ed9d3523d2","6911a7e3c0736ee6","c73c39b63c7cf22f","509e862073cb9af7"],"prompts":["Design a 3rd order Butterworth high-pass LC ladder filter with 50 ohm impedance and 1 kHz cutoff.","Create a passive high-pass ladder filter using ideal L and C, Butterworth response, 3rd order, 50 ohm terminations, 1 kHz cutoff.","I need a Spice netlist for a 3-element high-pass LC ladder derived from a low-pass prototype; use Butterworth coefficients, 50 ohms, 1 kHz cutoff.","Simulate a 1 kHz cutoff passive high-pass filter using a 3rd order LC ladder network with 50 ohm impedance.","Write a measured SPICE netlist for a Butterworth high-pass LC ladder of order 3, impedance 50, cutoff 1kHz."],"measurements":[{"name":"gain1k","key":"gain1k","index":0,"value":-9.030758782215685,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"ripple","key":"ripple","index":0,"value":-6.020604202080685,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"f_3db","key":"f_3db","index":0,"value":1002.4735610114503,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 AC"},{"name":"att100","key":"att100","index":0,"value":-66.02086236937176,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"deepseek:02316_a62a4abb3020cb96:b2dfd4fa885bf0e7","source":"deepseek","example_id":"02316_a62a4abb3020cb96","test_name":"test_test_2316_linear_regulator_npn_zener_a62a4abb3020cb96","netlist_hash":"b2dfd4fa885bf0e7","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"A linear voltage regulator using an NPN pass transistor (Q1) in an emitter-follower configuration.","pair_ids":["1db45102fbce99cd","9e926cf4b3cad345","def646e504b72994","dd23e2eb0eca27d1"],"prompts":["A linear voltage regulator using an NPN pass transistor (Q1) in an emitter-follower configuration.","The base voltage is set by a Zener diode (D1) biased through resistor R1 from the input.","The output voltage is approximately the Zener voltage (5.6V) minus the transistor's VBE (\u22480.7V), yielding ~4.9V.","The .DC analysis sweeps the input voltage from 10V to 15V, and .MEAS statements capture the output voltage at specific points and compute line regulation."],"measurements":[{"name":"VOUT","key":"VOUT","index":0,"value":4.867565899862508,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"VOUT_MAX","key":"VOUT_MAX","index":0,"value":4.885459552769392,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"VOUT_MIN","key":"VOUT_MIN","index":0,"value":4.852303613194515,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"REG_LINE","key":"REG_LINE","index":0,"value":0.03315593957487728,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#2 DC"}]} +{"id":"deepseek:00297_452f8f30210955c5:1bda726e6408e60c","source":"deepseek","example_id":"00297_452f8f30210955c5","test_name":"test_test_297_cmos_nor2_transient_452f8f30210955c5","netlist_hash":"1bda726e6408e60c","generator_model":"deepseek-v4-pro","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"CMOS two-input NOR gate with 5V supply.","pair_ids":["bb7f14f88acd0c60","b8e2f4ae043cc822","17db79398d5b09ef","ba2a070d8df8a47e"],"prompts":["CMOS two-input NOR gate with 5V supply.","NMOS and PMOS LEVEL=1 models with VTO=1V/-1V and KP=100u/40u.","Input A pulsed 0-5V at 10ns, B tied low.","Load capacitor increased to 1pF to achieve measurable propagation delays."],"measurements":[{"name":"vout_high","key":"vout_high","index":0,"value":4.999999993726592,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"tphl","key":"tphl","index":0,"value":3.2793110385986717e-10,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 TRAN"},{"name":"vout_low","key":"vout_low","index":0,"value":8.510774183928352e-10,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"tplh","key":"tplh","index":0,"value":7.975440173334425e-10,"value_is_finite":true,"success":true,"measurement_type":"TRIG_TARG","simulation_name":"#1 TRAN"}]} +{"id":"local:00263_b11b208733d880ea:742a4341aa3151ca","source":"local","example_id":"00263_b11b208733d880ea","test_name":"test_test_263_non_inverting_op_amp_filter_b11b208733d880ea","netlist_hash":"742a4341aa3151ca","generator_model":"local-model","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Create a non-inverting op-amp filter with AC analysis to measure gain at different frequencies","pair_ids":["4ca4856e200f28b4","6d03e0113c43fd5d","3668e868e3102e04"],"prompts":["Create a non-inverting op-amp filter with AC analysis to measure gain at different frequencies","Design a filter with gain of 2 at low frequencies and a pole around 1.6kHz","Measure the magnitude response at 1kHz, 10kHz, and 100kHz"],"measurements":[{"name":"gain_mag","key":"gain_mag","index":0,"value":-1.0000200004000082,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"gain_10k","key":"gain_10k","index":0,"value":-1.0000200004000082,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"gain_100k","key":"gain_100k","index":0,"value":-1.0000200004000082,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"local:00230_71dff43e55211471:1e8812e41889774a","source":"local","example_id":"00230_71dff43e55211471","test_name":"test_test_230_rc_low_pass_filter_71dff43e55211471","netlist_hash":"1e8812e41889774a","generator_model":"local-model","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":2,"representative_prompt":"Design a first-order RC low-pass filter with -3dB cutoff at 10kHz","pair_ids":["1205fa37c8a15d56","0fba73aec438a7f5"],"prompts":["Design a first-order RC low-pass filter with -3dB cutoff at 10kHz","Measure DC gain and verify -3dB point at cutoff frequency"],"measurements":[{"name":"cutoff_gain","key":"cutoff_gain","index":0,"value":0.9901180880506223,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"phase_at_10k","key":"phase_at_10k","index":0,"value":-0.0995722618436958,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"dc_gain","key":"dc_gain","index":0,"value":0.9999990019471205,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"local:00250_cbf7d041c7167707:8fca304b46b2468c","source":"local","example_id":"00250_cbf7d041c7167707","test_name":"test_test_250_series_pass_linear_regulator_with_op_amp_error_amplifier_cbf7d041c7167707","netlist_hash":"8fca304b46b2468c","generator_model":"local-model","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"Series pass linear regulator with op-amp error amplifier for precise voltage regulation","pair_ids":["4e0ee6e826672968","3759d0c080706493","b4bedbb4de03c4b9","0d2c4de606c5c9cc","b92b78595bfec7f8"],"prompts":["Series pass linear regulator with op-amp error amplifier for precise voltage regulation","Op-amp based series pass regulator with NPN pass transistor and voltage divider feedback","Linear regulator with high-gain error amplifier driving series pass transistor","Series pass regulator with op-amp control loop and resistive feedback network","Precision linear regulator using op-amp error amplifier and series pass BJT"],"measurements":[{"name":"linereg","key":"linereg","index":0,"value":4.694433552998589e-09,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#2 DC"},{"name":"vout","key":"vout","index":0,"value":4.999883733203533,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 OP"},{"name":"vout20","key":"vout20","index":0,"value":4.999883756179771,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"vout10","key":"vout10","index":0,"value":4.999883709235435,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"}]} +{"id":"local:00165_16879559a101df44:b2454fa0692ee835","source":"local","example_id":"00165_16879559a101df44","test_name":"test_test_165_op_amp_with_negative_feedback_16879559a101df44","netlist_hash":"b2454fa0692ee835","generator_model":"local-model","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Op-amp with input offset and negative feedback resistor network","pair_ids":["ff9e1b2f01588fc8","5344e5f0d9fdc58f","bfdf5d03c387b6b4"],"prompts":["Op-amp with input offset and negative feedback resistor network","Simple non-inverting amplifier configuration","Op-amp with DC offset and AC input signal"],"measurements":[{"name":"gain_db","key":"gain_db","index":0,"value":19.999131454468756,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"phase","key":"phase","index":0,"value":0,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"}]} +{"id":"local:00050_d3c4b5885866ac1e:9ca4cb151a1177b6","source":"local","example_id":"00050_d3c4b5885866ac1e","test_name":"test_test_50_op_amp_differentiator_with_limit_resistor_d3c4b5885866ac1e","netlist_hash":"9ca4cb151a1177b6","generator_model":"local-model","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Input limit resistor prevents high-frequency oscillation","pair_ids":["ed844f9711bfc2a9","84f96acc3bbb9e4a","32333216ab20f7aa","67ff634a1a3efa8e"],"prompts":["Input limit resistor prevents high-frequency oscillation","Differentiator gain increases with frequency","Op-amp provides high open-loop gain","Limit resistor creates low-pass characteristic at high frequencies"],"measurements":[{"name":"vmin","key":"vmin","index":0,"value":-0.9929271915316349,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#3 TRAN"},{"name":"vmax","key":"vmax","index":0,"value":0.9929240919300355,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#3 TRAN"},{"name":"vm_1k","key":"vm_1k","index":0,"value":0,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"vp_1k","key":"vp_1k","index":0,"value":0,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"vm_10k","key":"vm_10k","index":0,"value":0,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"vp_10k","key":"vp_10k","index":0,"value":0,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"vm_100k","key":"vm_100k","index":0,"value":0,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"}]} +{"id":"local:00212_3d6363668c92ae6e:374400ccf38301a0","source":"local","example_id":"00212_3d6363668c92ae6e","test_name":"test_test_212_sample_and_hold_3d6363668c92ae6e","netlist_hash":"374400ccf38301a0","generator_model":"local-model","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"Op-amp buffer configuration with high gain (100k) for input buffering","pair_ids":["24bf4f9244506773","da897eae11d17793","d1b716ab31d3f803","c55d1f4155efabcf","9bcfbf54fa8f4aa2"],"prompts":["Op-amp buffer configuration with high gain (100k) for input buffering","Ideal switch model with RON=10 and ROFF=100MEG","1nF hold capacitor with 100MEG leakage resistor","Control pulse drives sample switch, reset pulse drives hold switch","Input pulse provides 0-5V ramp for sampling"],"measurements":[{"name":"vmin","key":"vmin","index":0,"value":0,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 TRAN"},{"name":"vmax","key":"vmax","index":0,"value":4.999900002032518,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"},{"name":"vout_reset","key":"vout_reset","index":0,"value":4.999900002032518,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"vout_sample","key":"vout_sample","index":0,"value":4.999900002032518,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"vout_hold","key":"vout_hold","index":0,"value":0,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"}]} +{"id":"local:00183_a3201354efa9c6dc:c4d9b1d9c180ae12","source":"local","example_id":"00183_a3201354efa9c6dc","test_name":"test_test_183_rc_low_pass_filter_with_op_amp_buffer_a3201354efa9c6dc","netlist_hash":"c4d9b1d9c180ae12","generator_model":"local-model","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":5,"representative_prompt":"Design a first-order RC low-pass filter with cutoff frequency around 1.6 kHz, buffered by an op-amp for high input impedance.","pair_ids":["67fce03c526cf703","daddc2f53ae01d18","68bd88ee11e16871","896b54e8e9383615","26978e139303cde4"],"prompts":["Design a first-order RC low-pass filter with cutoff frequency around 1.6 kHz, buffered by an op-amp for high input impedance.","Create a simple anti-alias filter for ADC input protection with 10k source impedance and 10nF capacitance.","Build a passive RC low-pass section followed by a voltage-follower buffer to isolate load effects.","Implement a 10k/10nF RC filter with behavioral op-amp buffer for clean DC-to-AC response measurement.","Construct a basic low-pass filter with cutoff at 1.6kHz, buffered to prevent load interaction."],"measurements":[{"name":"gain_10k","key":"gain_10k","index":0,"value":-16.072322124267604,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"gain_1k","key":"gain_1k","index":0,"value":-1.445156974667376,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"gain_dc","key":"gain_dc","index":0,"value":-8.857298764274187e-05,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"local:00134_79637cd1f936de9c:52a7fd0b06c2e09b","source":"local","example_id":"00134_79637cd1f936de9c","test_name":"test_test_134_long_tailed_pair_resistive_loads_79637cd1f936de9c","netlist_hash":"52a7fd0b06c2e09b","generator_model":"local-model","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Long-tailed pair differential amplifier","pair_ids":["e02b0cf4607fb303","13a652596f91cb2a","c115159eeae4412a"],"prompts":["Long-tailed pair differential amplifier","Resistive collector loads","Single-ended output"],"measurements":[{"name":"i_tail","key":"i_tail","index":0,"value":0.001,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 OP"},{"name":"vout","key":"vout","index":0,"value":5.000000000609269,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 OP"},{"name":"gain","key":"gain","index":0,"value":95.67568443453362,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"}]} +{"id":"local:00146_0469a5abee19c7f7:56842094d6ef72aa","source":"local","example_id":"00146_0469a5abee19c7f7","test_name":"test_test_146_bjt_bandgap_reference_core_0469a5abee19c7f7","netlist_hash":"56842094d6ef72aa","generator_model":"local-model","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Bandgap reference with PTAT current and VBE subtraction","pair_ids":["18bb144ce7b4a79d","dd177e2ab49aec25","a68b35a1117b3574"],"prompts":["Bandgap reference with PTAT current and VBE subtraction","Temperature-compensated voltage reference","Op-amp like summing node with transistors"],"measurements":[{"name":"vmin","key":"vmin","index":0,"value":6.002996999652297e-08,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#2 DC"},{"name":"vmax","key":"vmax","index":0,"value":2.400298771027148e-07,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#2 DC"},{"name":"vref","key":"vref","index":0,"value":1.500299240986173e-07,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"vref_slope","key":"vref_slope","index":0,"value":2.999998451769864e-08,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#2 DC"}]} +{"id":"local:00198_5e61572e0660e7a0:2126b3f3b02f669a","source":"local","example_id":"00198_5e61572e0660e7a0","test_name":"test_test_198_op_amp_subtractor_5e61572e0660e7a0","netlist_hash":"2126b3f3b02f669a","generator_model":"local-model","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":2,"representative_prompt":"Op-amp subtractor with matched resistor ratios for accurate differential amplification","pair_ids":["6eea0381562c271b","762c76ad7195b008"],"prompts":["Op-amp subtractor with matched resistor ratios for accurate differential amplification","Four-resistor differential amplifier with behavioral op-amp and input voltage sources"],"measurements":[{"name":"gain_ac","key":"gain_ac","index":0,"value":0,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"vout_ac","key":"vout_ac","index":0,"value":0,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"phase_ac","key":"phase_ac","index":0,"value":0,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"}]} +{"id":"local:00137_b18f96bda85fd016:cc0ca91485108307","source":"local","example_id":"00137_b18f96bda85fd016","test_name":"test_test_137_buck_converter_b18f96bda85fd016","netlist_hash":"cc0ca91485108307","generator_model":"local-model","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":2,"representative_prompt":"Simple DC-DC buck converter","pair_ids":["7eb90b7b840199f0","83c0b40bbd9d6ebb"],"prompts":["Simple DC-DC buck converter","Switching regulator with diode catch"],"measurements":[{"name":"RIPPLE","key":"RIPPLE","index":0,"value":2.541098841762901e-21,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#1 TRAN"},{"name":"VOUT_AVG","key":"VOUT_AVG","index":0,"value":1.199999416036897e-06,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 TRAN"}]} +{"id":"local:00156_ac064360d30feecb:36324c6777271003","source":"local","example_id":"00156_ac064360d30feecb","test_name":"test_test_156_diode_clamp_ac064360d30feecb","netlist_hash":"36324c6777271003","generator_model":"local-model","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"PULSE source with negative excursion to test clamp","pair_ids":["6e77336cb4714cb0","b44753cee66129ec","b7bdff86b923d7fd","e1b75f8c6700a25f"],"prompts":["PULSE source with negative excursion to test clamp","Resistor limits current into diode clamp","Diode conducts when input drops below -5V rail","Output clamped to approximately -5V with diode drop"],"measurements":[{"name":"vmin","key":"vmin","index":0,"value":-9.999998995001516,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 TRAN"},{"name":"vmax","key":"vmax","index":0,"value":-4.598603895635322,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"},{"name":"vclamp","key":"vclamp","index":0,"value":-4.598612042773468,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"vavg","key":"vavg","index":0,"value":-7.490065549798183,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 TRAN"}]} +{"id":"local:00133_4bfe7f03e5dd0fc7:0ef5d26153c1bbd6","source":"local","example_id":"00133_4bfe7f03e5dd0fc7","test_name":"test_test_133_bjt_phase_splitter_4bfe7f03e5dd0fc7","netlist_hash":"0ef5d26153c1bbd6","generator_model":"local-model","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Phase splitter with split collector and emitter loads","pair_ids":["500009f466445a9d","961c4296d15d143b","fe9f9cb2df09f717"],"prompts":["Phase splitter with split collector and emitter loads","Audio preamplifier driver stage with 180-degree phase shift","Split load phase inverter using NPN transistor"],"measurements":[{"name":"phase_diff","key":"phase_diff","index":0,"value":0.000716338986786601,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"vout_q1_mag","key":"vout_q1_mag","index":0,"value":0.007359294618574378,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"vout_q2_mag","key":"vout_q2_mag","index":0,"value":0,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"vout_mag","key":"vout_mag","index":0,"value":0.007359294618574378,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"}]} +{"id":"local:00020_3d165ba946a2f3a3:a9d4cc47af78f0b2","source":"local","example_id":"00020_3d165ba946a2f3a3","test_name":"test_test_20_symmetric_diode_clipper_3d165ba946a2f3a3","netlist_hash":"a9d4cc47af78f0b2","generator_model":"local-model","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Input sine wave of 10V peak is clipped to approximately +/-0.7V by anti-parallel diodes","pair_ids":["d4c942de76ae507a","69e68fb925619626","6224419f308f9627"],"prompts":["Input sine wave of 10V peak is clipped to approximately +/-0.7V by anti-parallel diodes","D1 and D2 form a symmetric diode protection circuit","Rload provides a 1k path to ground for output measurement"],"measurements":[{"name":"vmin","key":"vmin","index":0,"value":-9.476479740125091,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 TRAN"},{"name":"vmax","key":"vmax","index":0,"value":8.411533938203956,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"},{"name":"vpp","key":"vpp","index":0,"value":8.411533938203956,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 TRAN"},{"name":"vavg","key":"vavg","index":0,"value":0.024246057091677552,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 TRAN"}]} +{"id":"local:00099_d167b433c4c3135e:8f480412a21bdb8e","source":"local","example_id":"00099_d167b433c4c3135e","test_name":"test_test_99_voltage_divider_with_load_d167b433c4c3135e","netlist_hash":"8f480412a21bdb8e","generator_model":"local-model","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Design a voltage divider to reduce 10V to 5V with 10k and 10k resistors","pair_ids":["8f1710a4647c8df2","40812cfaa6c6569f","d52af3d4ccba1e54","03929561feac4544"],"prompts":["Design a voltage divider to reduce 10V to 5V with 10k and 10k resistors","Add a 10k load and measure the output voltage","Verify the loaded output is approximately 3.33V","Calculate the current through each resistor"],"measurements":[{"name":"I_RL","key":"I_RL","index":0,"value":0.0003333333333333333,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"Vout","key":"Vout","index":0,"value":3.333333333333333,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"I_R2","key":"I_R2","index":0,"value":0.0003333333333333333,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"I_R1","key":"I_R1","index":0,"value":0.0006666666666666668,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"}]} +{"id":"local:00228_3621ac4d61fa0ac4:050107f9c3e7f7b4","source":"local","example_id":"00228_3621ac4d61fa0ac4","test_name":"test_test_228_linear_regulator_3621ac4d61fa0ac4","netlist_hash":"050107f9c3e7f7b4","generator_model":"local-model","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Series pass linear regulator with op-amp error amplifier","pair_ids":["c94d3e1ae737f10d","64e7e87546830134","255592cbb67a752d","9b45b389ead2bc09"],"prompts":["Series pass linear regulator with op-amp error amplifier","Voltage reference of 2.5V with resistive divider feedback","Pass transistor configured as emitter follower","Op-amp drives base of pass transistor for regulation"],"measurements":[{"name":"vout_min","key":"vout_min","index":0,"value":4.9998827537638135,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#2 DC"},{"name":"line_reg","key":"line_reg","index":0,"value":6.740447133779526e-08,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#2 DC"},{"name":"vout_nom","key":"vout_nom","index":0,"value":4.999882781325141,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"vout_max","key":"vout_max","index":0,"value":4.999882821168285,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#2 DC"}]} +{"id":"local:00308_1ccff1e5a1ca996b:110cfd71afc10532","source":"local","example_id":"00308_1ccff1e5a1ca996b","test_name":"test_test_308_charge_pump_doubler_1ccff1e5a1ca996b","netlist_hash":"110cfd71afc10532","generator_model":"local-model","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Charge pump voltage doubler using diode steering and pumping capacitors","pair_ids":["a5b3e052e849847c","16c0e8b70b9ac3bd","bbd8945c636c6f79","8e84fbdd9f87cab3"],"prompts":["Charge pump voltage doubler using diode steering and pumping capacitors","Input 5V DC with 5V 2u period clock drives the pump","Two 1uF capacitors store and transfer charge to output","100k load draws current creating ripple on output"],"measurements":[{"name":"vmin","key":"vmin","index":0,"value":4.44629161693115,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 TRAN"},{"name":"vout_avg","key":"vout_avg","index":0,"value":4.446291616931192,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 TRAN"},{"name":"vmax","key":"vmax","index":0,"value":4.446291616931218,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"}]} +{"id":"local:00310_8fe59ad928c11d15:d5a42a27d4361f85","source":"local","example_id":"00310_8fe59ad928c11d15","test_name":"test_test_310_lc_resonant_tank_8fe59ad928c11d15","netlist_hash":"d5a42a27d4361f85","generator_model":"local-model","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"AC analysis of parallel LC resonant circuit","pair_ids":["b4cf07c3d734f015","594383acc819669a","36cc14aaebd1718c"],"prompts":["AC analysis of parallel LC resonant circuit","Measure maximum and minimum voltage across tank","Verify resonance peak at expected frequency"],"measurements":[{"name":"vmin","key":"vmin","index":0,"value":0.0015885733459517475,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 AC"},{"name":"vmax","key":"vmax","index":0,"value":0.9980322969616403,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 AC"},{"name":"v_at_f0","key":"v_at_f0","index":0,"value":0.010008745113784492,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"local:00013_4abb4897cbb2047f:1fe828f5801a25aa","source":"local","example_id":"00013_4abb4897cbb2047f","test_name":"test_test_13_rlc_notch_filter_4abb4897cbb2047f","netlist_hash":"1fe828f5801a25aa","generator_model":"local-model","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Series LC branch creates impedance minimum at resonance","pair_ids":["6825a402024d5256","a05043a4a64db732","b1a43708169cd665"],"prompts":["Series LC branch creates impedance minimum at resonance","Input sees R1 in series with parallel LC and load","Notch frequency determined by L and C values"],"measurements":[{"name":"vout_high","key":"vout_high","index":0,"value":-0.9879281602071951,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"vout_notch","key":"vout_notch","index":0,"value":-0.8431849555892628,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"vout_low","key":"vout_low","index":0,"value":-0.8279955091493009,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"local:00047_1d081fe90f70e705:cacc5872d17ea035","source":"local","example_id":"00047_1d081fe90f70e705","test_name":"test_test_47_voltage_follower_1d081fe90f70e705","netlist_hash":"cacc5872d17ea035","generator_model":"local-model","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Op-amp voltage follower with input resistor for impedance matching","pair_ids":["60581a0af959c2a3","28c711cd15e1cf22","346d74f5edd67510"],"prompts":["Op-amp voltage follower with input resistor for impedance matching","Buffer circuit with AC analysis to verify unity gain","Simple non-inverting amplifier with gain of 1"],"measurements":[{"name":"gain_db","key":"gain_db","index":0,"value":20.00095550041367,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"vout_mag","key":"vout_mag","index":0,"value":10.00110012101331,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"phase","key":"phase","index":0,"value":3.141592653589793,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"local:00203_a8052ed39ef09d80:5b9e38df8a43793b","source":"local","example_id":"00203_a8052ed39ef09d80","test_name":"test_test_203_transimpedance_amplifier_a8052ed39ef09d80","netlist_hash":"5b9e38df8a43793b","generator_model":"local-model","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":2,"representative_prompt":"Current-to-voltage converter for sensor interface","pair_ids":["9db4f2eabebf6823","86a67b20392055f8"],"prompts":["Current-to-voltage converter for sensor interface","Transimpedance amplifier with photodiode input"],"measurements":[{"name":"gain10","key":"gain10","index":0,"value":0,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"gain100","key":"gain100","index":0,"value":0,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"vout","key":"vout","index":0,"value":3000000,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 OP"},{"name":"gain","key":"gain","index":0,"value":0,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"}]} +{"id":"local:00055_853cb48f72660556:abdb3f918ed8bfb7","source":"local","example_id":"00055_853cb48f72660556","test_name":"test_test_55_op_amp_buffer_with_input_offset_853cb48f72660556","netlist_hash":"abdb3f918ed8bfb7","generator_model":"local-model","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Voltage follower with input offset voltage","pair_ids":["fa177d98ce8324e3","74574821d6d64a39","683caa4a4253a487"],"prompts":["Voltage follower with input offset voltage","Op-amp buffer with DC offset for realistic behavior","Non-inverting amplifier with gain of 1"],"measurements":[{"name":"vout_min","key":"vout_min","index":0,"value":0.009999900000934758,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#3 TRAN"},{"name":"gain_mag","key":"gain_mag","index":0,"value":0,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"vout_max","key":"vout_max","index":0,"value":0.009999900000934758,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#3 TRAN"}]} +{"id":"local:00141_334bf60eb66b90db:12d1418f775f10a9","source":"local","example_id":"00141_334bf60eb66b90db","test_name":"test_test_141_bjt_current_sink_with_emitter_resistor_334bf60eb66b90db","netlist_hash":"12d1418f775f10a9","generator_model":"local-model","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Design a BJT current sink with emitter resistor for load regulation","pair_ids":["c94879810f51f9db","3a4d9d7444741389","6cc61ca49eba04f9"],"prompts":["Design a BJT current sink with emitter resistor for load regulation","Create a current sink that maintains constant current regardless of load","Implement a simple current source using NPN transistor with RE for stability"],"measurements":[{"name":"Imax","key":"Imax","index":0,"value":0.009228632371767461,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#2 DC"},{"name":"Iout","key":"Iout","index":0,"value":0.004249913796977216,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 OP"},{"name":"Imin","key":"Imin","index":0,"value":1.3441119984224294e-11,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#2 DC"}]} +{"id":"local:00102_2f76deb98ac747ce:e19a8cf3579d57c9","source":"local","example_id":"00102_2f76deb98ac747ce","test_name":"test_test_102_diode_clamp_to_positive_rail_2f76deb98ac747ce","netlist_hash":"e19a8cf3579d57c9","generator_model":"local-model","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Simple diode clamp circuit that shifts AC input to positive DC level","pair_ids":["62e44ad343ebbae6","05a18b1cc3ad9622","8e922aa39b490337"],"prompts":["Simple diode clamp circuit that shifts AC input to positive DC level","Input pulse from 0-5V gets clamped to approximately 0.7-5V range","Diode conducts when input exceeds output, pulling it up to supply"],"measurements":[{"name":"vmin","key":"vmin","index":0,"value":-6.957858853270335e-22,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 TRAN"},{"name":"vmax","key":"vmax","index":0,"value":4.661945123889972,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"},{"name":"vavg","key":"vavg","index":0,"value":2.3331891400497016,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 TRAN"}]} +{"id":"local:00014_841c3b889cb97e9c:2a517c865680a293","source":"local","example_id":"00014_841c3b889cb97e9c","test_name":"test_test_14_twin_t_notch_filter_841c3b889cb97e9c","netlist_hash":"2a517c865680a293","generator_model":"local-model","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Twin-T passive notch filter with R=10k, C1=0.01uF, C2=0.005uF","pair_ids":["2f4a11f5b86ab0c9","f1fbd6fb4f81c165","49d30b3df98d6232"],"prompts":["Twin-T passive notch filter with R=10k, C1=0.01uF, C2=0.005uF","Added R3=10k from n2 to ground to prevent floating node error","AC analysis with measurements at low, high, and notch frequencies"],"measurements":[{"name":"vout_high","key":"vout_high","index":0,"value":0.9944654028641782,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"vout_notch","key":"vout_notch","index":0,"value":0.3085338946484029,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"vout_low","key":"vout_low","index":0,"value":0.990253299033549,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"local:00120_d37d61f1c639405c:4d744d1231b5f391","source":"local","example_id":"00120_d37d61f1c639405c","test_name":"test_test_120_greinacher_quadrupler_d37d61f1c639405c","netlist_hash":"4d744d1231b5f391","generator_model":"local-model","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Four-diode voltage quadrupler with input AC 10V peak sine","pair_ids":["dd2277dc7dfcfcd5","39db122b95301fc6","d194dd911ea8cc88"],"prompts":["Four-diode voltage quadrupler with input AC 10V peak sine","Output should be approximately 40V DC with ripple","Capacitor values 10uF, load 100k, diode model standard"],"measurements":[{"name":"vout_min","key":"vout_min","index":0,"value":-9.94926273373816,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 TRAN"},{"name":"vout_avg","key":"vout_avg","index":0,"value":-0.42835812403826035,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 TRAN"},{"name":"vout_ripple","key":"vout_ripple","index":0,"value":19.39863041377527,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#1 TRAN"},{"name":"vout_max","key":"vout_max","index":0,"value":9.44936768003711,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"}]} +{"id":"local:00080_5e9c19ad6b8e6630:643e382631963f83","source":"local","example_id":"00080_5e9c19ad6b8e6630","test_name":"test_test_80_lc_high_pass_ladder_5e9c19ad6b8e6630","netlist_hash":"643e382631963f83","generator_model":"local-model","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Third-order LC high-pass ladder filter with series capacitors and shunt inductor","pair_ids":["6d9804aea21a5113","20aa7351ebabc4ca","ee1f2bde5ea2064b"],"prompts":["Third-order LC high-pass ladder filter with series capacitors and shunt inductor","Input impedance matched to 50 ohm source and load for minimal reflection","AC analysis shows high-pass response with -3dB cutoff near 1kHz"],"measurements":[{"name":"gain_10k","key":"gain_10k","index":0,"value":-7.870334614431743e-06,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 AC"},{"name":"gain_100","key":"gain_100","index":0,"value":-7.792734973840658e-14,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 AC"},{"name":"v10k","key":"v10k","index":0,"value":-7.870334614431743e-06,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"v1k","key":"v1k","index":0,"value":-7.793496463156963e-10,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"v100","key":"v100","index":0,"value":-7.792734973840658e-14,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"gain_1k","key":"gain_1k","index":0,"value":-7.793496463156963e-10,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 AC"},{"name":"gain_100k","key":"gain_100k","index":0,"value":-0.30023023368373325,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 AC"},{"name":"v100k","key":"v100k","index":0,"value":-0.30023023368373325,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"local:00007_a963c45bebbca78d:7f8a86640594a7db","source":"local","example_id":"00007_a963c45bebbca78d","test_name":"test_test_7_three_section_rc_phase_shift_a963c45bebbca78d","netlist_hash":"7f8a86640594a7db","generator_model":"local-model","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Three-section RC phase-shift network for frequency-dependent phase measurement","pair_ids":["9baa272c9d65cf73","c85bffd28c4ec3a1","77af9c0d16bd8083","fe47f8ca308ac519"],"prompts":["Three-section RC phase-shift network for frequency-dependent phase measurement","Each RC section contributes approximately -30 degrees at mid frequencies","Total phase shift ranges from -30 to -150 degrees across frequency range","Magnitude attenuates as frequency increases beyond pole frequencies"],"measurements":[{"name":"phase_10000","key":"phase_10000","index":0,"value":1.6503228088372344,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"mag_10000","key":"mag_10000","index":0,"value":4.024817161254947e-06,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"phase_100","key":"phase_100","index":0,"value":-1.8405898604317046,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"mag_1000","key":"mag_1000","index":0,"value":0.0034748743387551973,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"phase_1000","key":"phase_1000","index":0,"value":2.321888968850923,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"mag_100","key":"mag_100","index":0,"value":0.2736695045223136,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"local:00245_1776ba338f0d1335:30e2323830b7ca9e","source":"local","example_id":"00245_1776ba338f0d1335","test_name":"test_test_245_non_inverting_amplifier_1776ba338f0d1335","netlist_hash":"30e2323830b7ca9e","generator_model":"local-model","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Non-inverting amplifier with behavioral op-amp","pair_ids":["0d5fb1b173d7d819","c53f6ad7a74a8cfb","850cecff0f39b91a"],"prompts":["Non-inverting amplifier with behavioral op-amp","Gain of 10 with Rf=90k, Rin=10k","Input DC 1V, expected output 10V"],"measurements":[{"name":"VOUT","key":"VOUT","index":0,"value":1.0000100001198007,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 OP"},{"name":"VINP","key":"VINP","index":0,"value":1.0000100001000012,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 OP"},{"name":"VDIFF","key":"VDIFF","index":0,"value":1.0000100001000012,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 OP"},{"name":"VINM","key":"VINM","index":0,"value":1,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 OP"}]} +{"id":"local:00006_eb35032d4d1dbadd:4d52da146bb45955","source":"local","example_id":"00006_eb35032d4d1dbadd","test_name":"test_test_6_two_pole_rc_ladder_low_pass_eb35032d4d1dbadd","netlist_hash":"4d52da146bb45955","generator_model":"local-model","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":2,"representative_prompt":"Two-pole passive RC ladder low-pass filter with three RC sections","pair_ids":["a2a59036b1432423","a56c54791c9eee5a"],"prompts":["Two-pole passive RC ladder low-pass filter with three RC sections","Ladder topology: series R-shunt C, series R-shunt C, series R load"],"measurements":[{"name":"f3db","key":"f3db","index":0,"value":5958.1442119469575,"value_is_finite":true,"success":true,"measurement_type":"WHEN","simulation_name":"#1 AC"},{"name":"gain1k","key":"gain1k","index":0,"value":0.98645501661658,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"gain10","key":"gain10","index":0,"value":0.9998618533911141,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"gain100k","key":"gain100k","index":0,"value":0.023338672716187697,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"local:00139_ff32c5d814b40bf0:9d4a4b8980e8fccd","source":"local","example_id":"00139_ff32c5d814b40bf0","test_name":"test_test_139_cascode_bjt_current_mirror_ff32c5d814b40bf0","netlist_hash":"9d4a4b8980e8fccd","generator_model":"local-model","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Cascode BJT current mirror with four transistors for high output impedance","pair_ids":["c2ea0ce0b8f479ee","8a58f80d030ad3c7","41e1566a3eddf2fb"],"prompts":["Cascode BJT current mirror with four transistors for high output impedance","Reference current of 1mA mirrored to output with cascode isolation","DC sweep to verify current mirroring ratio and output characteristics"],"measurements":[{"name":"iout","key":"iout","index":0,"value":0.001,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"vout","key":"vout","index":0,"value":10,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 OP"},{"name":"vout","key":"vout","index":1,"value":10,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"}]} +{"id":"local:00262_46cd6a8fd01eb1d6:0b8573719a2f9d0e","source":"local","example_id":"00262_46cd6a8fd01eb1d6","test_name":"test_test_262_voltage_follower_46cd6a8fd01eb1d6","netlist_hash":"0b8573719a2f9d0e","generator_model":"local-model","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":2,"representative_prompt":"Op-amp voltage follower with input DC source and load resistor","pair_ids":["c08e2a816f625e6d","7ca0248ca08d251f"],"prompts":["Op-amp voltage follower with input DC source and load resistor","Buffer circuit to isolate high impedance source from load"],"measurements":[{"name":"VOUT","key":"VOUT","index":0,"value":0.999990000099999,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"VOUT_MAX","key":"VOUT_MAX","index":0,"value":0.999990000099999,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#2 DC"},{"name":"VOUT_MIN","key":"VOUT_MIN","index":0,"value":0,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#2 DC"}]} +{"id":"local:00263_05d96159173acecc:76ac431736c0d77a","source":"local","example_id":"00263_05d96159173acecc","test_name":"test_test_263_noninverting_amp_05d96159173acecc","netlist_hash":"76ac431736c0d77a","generator_model":"local-model","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":2,"representative_prompt":"Non-inverting op-amp amplifier with gain of 10","pair_ids":["3f1baecb548df0a0","6dfb7d15dee8da7a"],"prompts":["Non-inverting op-amp amplifier with gain of 10","Input resistor network for feedback and ground reference"],"measurements":[{"name":"GAIN_DB","key":"GAIN_DB","index":0,"value":19.999131454462745,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"PHASE","key":"PHASE","index":0,"value":0,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"}]} +{"id":"local:00265_89efde0cb37d2e80:c548e7d5ab158324","source":"local","example_id":"00265_89efde0cb37d2e80","test_name":"test_test_265_peak_detector_89efde0cb37d2e80","netlist_hash":"c548e7d5ab158324","generator_model":"local-model","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":2,"representative_prompt":"Diode peak detector with op-amp buffer","pair_ids":["d4bc3ee1db0847b0","787112a46cece89c"],"prompts":["Diode peak detector with op-amp buffer","Captures maximum input voltage and holds with capacitor"],"measurements":[{"name":"VOUT_MIN","key":"VOUT_MIN","index":0,"value":1.8636173903850177,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 TRAN"},{"name":"VOUT_MAX","key":"VOUT_MAX","index":0,"value":1.9246397246493279,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"}]} +{"id":"local:00266_6df1ebdf33bf969d:85711bfe34e4d181","source":"local","example_id":"00266_6df1ebdf33bf969d","test_name":"test_test_266_howland_current_pump_6df1ebdf33bf969d","netlist_hash":"85711bfe34e4d181","generator_model":"local-model","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":2,"representative_prompt":"Howland current pump for load driving","pair_ids":["d36285fa20e28c27","2e2be99919bf4053"],"prompts":["Howland current pump for load driving","Converts voltage input to load current with op-amp feedback"],"measurements":[{"name":"VOUT","key":"VOUT","index":0,"value":50000.00112295151,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"ILOAD","key":"ILOAD","index":0,"value":0,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"VLOAD","key":"VLOAD","index":0,"value":50000.00112295151,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"}]} +{"id":"local:00180_3a081dc3f070956c:d7bb6cda04bfb1ca","source":"local","example_id":"00180_3a081dc3f070956c","test_name":"test_test_180_voltage_divider_with_load_3a081dc3f070956c","netlist_hash":"d7bb6cda04bfb1ca","generator_model":"local-model","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":2,"representative_prompt":"Voltage divider with load resistor - measure unloaded and loaded voltages","pair_ids":["96e7fbd32e1dd41f","faa1b400ce9b5608"],"prompts":["Voltage divider with load resistor - measure unloaded and loaded voltages","Simple resistive divider - compare Vout with and without load"],"measurements":[{"name":"vout_unloaded","key":"vout_unloaded","index":0,"value":3.333333333333333,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"ratio_loaded","key":"ratio_loaded","index":0,"value":1,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#2 DC"},{"name":"vout_loaded","key":"vout_loaded","index":0,"value":3.333333333333333,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"}]} +{"id":"local:00181_4db9373138d14283:817ce816fcc481ea","source":"local","example_id":"00181_4db9373138d14283","test_name":"test_test_181_op_amp_buffer_4db9373138d14283","netlist_hash":"817ce816fcc481ea","generator_model":"local-model","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":2,"representative_prompt":"Op-amp voltage follower - unity gain buffer","pair_ids":["6921e8522ccc1b94","2097c4dea0672548"],"prompts":["Op-amp voltage follower - unity gain buffer","Buffer with high input impedance - measure input and output"],"measurements":[{"name":"gain_mag","key":"gain_mag","index":0,"value":0.999990000099999,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"phase","key":"phase","index":0,"value":0,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"}]} +{"id":"local:00182_2f094cf84d2fa82f:6908994b97641b5c","source":"local","example_id":"00182_2f094cf84d2fa82f","test_name":"test_test_182_rc_step_response_2f094cf84d2fa82f","netlist_hash":"6908994b97641b5c","generator_model":"local-model","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":2,"representative_prompt":"RC step response - measure rise time","pair_ids":["9c1891c7a6488970","282acc5859c05cb2"],"prompts":["RC step response - measure rise time","Capacitor charging - time constant measurement"],"measurements":[{"name":"vout_100u","key":"vout_100u","index":0,"value":-0.24016754628948772,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"vout_10u","key":"vout_10u","index":0,"value":-0.025111615179835088,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"trise","key":"trise","index":0,"value":-0.025111615179835088,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#1 TRAN"},{"name":"vout_5u","key":"vout_5u","index":0,"value":4.984962655075249,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"}]} +{"id":"local:00174_1639567e4bfb1c77:dc887da244efbe58","source":"local","example_id":"00174_1639567e4bfb1c77","test_name":"test_test_174_npn_emitter_follower_1639567e4bfb1c77","netlist_hash":"dc887da244efbe58","generator_model":"local-model","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Emitter follower buffer circuit","pair_ids":["52d505fe0b2546dd","32c059153a02cb69","fba4a0c28c1b29ad"],"prompts":["Emitter follower buffer circuit","Provides impedance matching","Measures voltage gain close to 1"],"measurements":[{"name":"PHASE","key":"PHASE","index":0,"value":0,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"VOUT_MAG","key":"VOUT_MAG","index":0,"value":0.9901950593177136,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"}]} +{"id":"local:00018_0290ab8bfe4c90fa:52bce3d2ad1a21ce","source":"local","example_id":"00018_0290ab8bfe4c90fa","test_name":"test_test_18_bridge_rectifier_with_smoothing_cap_0290ab8bfe4c90fa","netlist_hash":"52bce3d2ad1a21ce","generator_model":"local-model","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Bridge diode configuration for full-wave rectification","pair_ids":["6ccba276b2ae8a03","8182355f157f5d01","775989d67fb6bf99","b3fa0b086571a109"],"prompts":["Bridge diode configuration for full-wave rectification","Smoothing capacitor reduces ripple on DC output","Load resistor draws current from filtered supply","Diode model with realistic parameters"],"measurements":[{"name":"vout_min","key":"vout_min","index":0,"value":1.7633848636892833,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 TRAN"},{"name":"vout_avg","key":"vout_avg","index":0,"value":6.549440518720372,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 TRAN"},{"name":"vout_max","key":"vout_max","index":0,"value":8.541683381624823,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"},{"name":"vripple","key":"vripple","index":0,"value":6.77829851793554,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#1 TRAN"}]} +{"id":"local:00192_e213d81601759bda:b9728e9be4ec23c7","source":"local","example_id":"00192_e213d81601759bda","test_name":"test_test_192_jfet_amplitude_limiter_e213d81601759bda","netlist_hash":"b9728e9be4ec23c7","generator_model":"local-model","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"JFET amplitude limiter with automatic gain control","pair_ids":["484b755bb9dc6e11","adff524636885c52","978cab2f79b5d001"],"prompts":["JFET amplitude limiter with automatic gain control","Input sine wave limited to stable output amplitude","JFET acts as variable resistor for gain stabilization"],"measurements":[{"name":"vmin","key":"vmin","index":0,"value":-3.454841504291246e-11,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#2 TRAN"},{"name":"vmax","key":"vmax","index":0,"value":4.067215681446888e-10,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#2 TRAN"},{"name":"vpp","key":"vpp","index":0,"value":4.067215681446888e-10,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#2 TRAN"}]} +{"id":"local:00002_98d2a37ac23b7295:57703cba5a3f84a3","source":"local","example_id":"00002_98d2a37ac23b7295","test_name":"test_test_2_t_pad_resistive_attenuator_98d2a37ac23b7295","netlist_hash":"57703cba5a3f84a3","generator_model":"local-model","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Design a T-topology resistive pad to provide 6 dB attenuation with 600 ohm impedance matching","pair_ids":["dec8a040b90b8ac7","41f4506e5296389a","149bfbfa04c054e5"],"prompts":["Design a T-topology resistive pad to provide 6 dB attenuation with 600 ohm impedance matching","Create a T-pad attenuator with series resistors of 62 ohm and shunt resistor of 1.07 k ohm","Verify the T-pad provides approximately -6 dB output at 1 kHz with AC analysis"],"measurements":[{"name":"vout_mag","key":"vout_mag","index":0,"value":0.17636684303350972,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"vout_db","key":"vout_db","index":0,"value":-15.07166117785813,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"}]} +{"id":"local:00152_b3e9b3dae122850f:b5323c4bc87f3e64","source":"local","example_id":"00152_b3e9b3dae122850f","test_name":"test_test_152_quasi_complementary_output_stage_b3e9b3dae122850f","netlist_hash":"b5323c4bc87f3e64","generator_model":"local-model","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Quasi-complementary BJT push-pull output stage with diode bias","pair_ids":["54d5dcc3625e23f4","9e020da47d712873","f838869ea65c5609"],"prompts":["Quasi-complementary BJT push-pull output stage with diode bias","Class-AB operation with low quiescent current","Output swing limited by transistor saturation voltages"],"measurements":[{"name":"vmin","key":"vmin","index":0,"value":-1.7771764330016924,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#2 TRAN"},{"name":"ipeak","key":"ipeak","index":0,"value":0.0015271085825032812,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#2 TRAN"},{"name":"vmax","key":"vmax","index":0,"value":0.20541243040804974,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#2 TRAN"},{"name":"vpp","key":"vpp","index":0,"value":0.20541243040804974,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#2 TRAN"},{"name":"vout","key":"vout","index":0,"value":-0.7853625619109335,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 OP"},{"name":"iq","key":"iq","index":0,"value":0.0014276539906340551,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 TRAN"}]} +{"id":"local:00202_b01bcfbf58a9fb4c:16ad1e324e34c00f","source":"local","example_id":"00202_b01bcfbf58a9fb4c","test_name":"test_test_202_voltage_follower_b01bcfbf58a9fb4c","netlist_hash":"16ad1e324e34c00f","generator_model":"local-model","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Create an op-amp voltage follower with input DC 1V and AC 1V, output loaded with 10k resistor","pair_ids":["d5f5c108c0ba8f68","315c6d139d2601ca","8c864df048bd69db"],"prompts":["Create an op-amp voltage follower with input DC 1V and AC 1V, output loaded with 10k resistor","Design a unity gain buffer using behavioral op-amp E1 with feedback from output to negative input","Measure AC gain at 1kHz and verify output magnitude is approximately 1V with phase near 0"],"measurements":[{"name":"vout_mag","key":"vout_mag","index":0,"value":0.999990000099999,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"vout_db","key":"vout_db","index":0,"value":-8.685846208858971e-05,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"}]} +{"id":"local:00204_fc6471f0ae254bfb:08c287df167be685","source":"local","example_id":"00204_fc6471f0ae254bfb","test_name":"test_test_204_opamp_integrator_fc6471f0ae254bfb","netlist_hash":"08c287df167be685","generator_model":"local-model","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Op-amp integrator with R=10k, C=1nF, input sine 1kHz amplitude 1V","pair_ids":["4cf36e524ce4b18b","7b3b391367e7f864","11f39359e81fb8ad"],"prompts":["Op-amp integrator with R=10k, C=1nF, input sine 1kHz amplitude 1V","Transient analysis to measure output peak-to-peak and average over steady state","Verify output is 90-degree phase shifted and amplitude reduced by RC"],"measurements":[{"name":"vout_avg","key":"vout_avg","index":0,"value":-0.0029140910194854386,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#2 TRAN"},{"name":"vout_pp","key":"vout_pp","index":0,"value":1.848578511647442,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#2 TRAN"}]} +{"id":"local:00164_f6068d057fc7d7ea:acb254df98556a45","source":"local","example_id":"00164_f6068d057fc7d7ea","test_name":"test_test_164_pmos_common_source_amplifier_f6068d057fc7d7ea","netlist_hash":"acb254df98556a45","generator_model":"local-model","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":2,"representative_prompt":"PMOS common-source amplifier with resistive load and mid-rail gate bias","pair_ids":["0fe6cde2d1bb9916","7830fab2f4e7a682"],"prompts":["PMOS common-source amplifier with resistive load and mid-rail gate bias","Small-signal AC analysis to verify voltage gain magnitude"],"measurements":[{"name":"vd","key":"vd","index":0,"value":5,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 OP"},{"name":"gain_mag","key":"gain_mag","index":0,"value":0,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"phase","key":"phase","index":0,"value":0,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"}]} +{"id":"local:00143_8855b0c4126f2c8b:73d3d0a21b28036e","source":"local","example_id":"00143_8855b0c4126f2c8b","test_name":"test_test_143_bjt_current_limiter_8855b0c4126f2c8b","netlist_hash":"73d3d0a21b28036e","generator_model":"local-model","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Two-transistor BJT current limiting protection circuit","pair_ids":["ecdfc86ba09b41f1","431f867c3ee5f159","15a33d724927a218"],"prompts":["Two-transistor BJT current limiting protection circuit","Pass transistor Q1 with sensing transistor Q2 for current regulation","Limits load current to approximately 0.7A when supply is 12V"],"measurements":[{"name":"IOUT_6V","key":"IOUT_6V","index":0,"value":6.418219844413509e-10,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"IOUT_RATIO","key":"IOUT_RATIO","index":0,"value":2.2761865927795184,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#2 DC"},{"name":"IOUT_12V","key":"IOUT_12V","index":0,"value":1.4609065959365476e-09,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"IOUT_LIMIT","key":"IOUT_LIMIT","index":0,"value":1.4609065959365476e-09,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#2 DC"}]} +{"id":"local:00291_a868f4ceab261b34:fbf60c2dc41834cd","source":"local","example_id":"00291_a868f4ceab261b34","test_name":"test_test_291_voltage_divider_with_load_a868f4ceab261b34","netlist_hash":"fbf60c2dc41834cd","generator_model":"local-model","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Create a voltage divider with two 10k resistors and a 1k load, measure the loaded output voltage","pair_ids":["98b4b5268d767846","a75c1d890b0b6480","089075f04a79aae4"],"prompts":["Create a voltage divider with two 10k resistors and a 1k load, measure the loaded output voltage","Design a simple voltage divider that provides 0.5V from 5V supply, include load effect","Build a resistive voltage divider with load and verify the output using SPICE"],"measurements":[{"name":"VOUT","key":"VOUT","index":0,"value":0.41666666666666663,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 OP"},{"name":"I_RL","key":"I_RL","index":0,"value":0.00041666666666666664,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 OP"},{"name":"I_R2","key":"I_R2","index":0,"value":4.1666666666666665e-05,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 OP"},{"name":"I_R1","key":"I_R1","index":0,"value":0.0004583333333333333,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 OP"}]} +{"id":"local:00128_5176e3a49427b6ce:a9b5abcb008893f1","source":"local","example_id":"00128_5176e3a49427b6ce","test_name":"test_test_128_common_emitter_amplifier_with_active_current_source_load_5176e3a49427b6ce","netlist_hash":"a9b5abcb008893f1","generator_model":"local-model","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Common-emitter BJT amplifier with current-source load","pair_ids":["9712554aebd4a38e","1101f7ac677805b9","4d8b29b5996868ba"],"prompts":["Common-emitter BJT amplifier with current-source load","Active load provides high impedance for voltage gain","Emitter resistor for bias stabilization"],"measurements":[{"name":"vout","key":"vout","index":0,"value":316128.29747678794,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 OP"},{"name":"gain","key":"gain","index":0,"value":0.499419495691023,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"phase","key":"phase","index":0,"value":0.015914151511777233,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"}]} +{"id":"local:00205_3d2ca5a572ef2d94:6b552657acb29edc","source":"local","example_id":"00205_3d2ca5a572ef2d94","test_name":"test_test_205_howland_current_pump_3d2ca5a572ef2d94","netlist_hash":"6b552657acb29edc","generator_model":"local-model","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Howland current pump with behavioral op-amp for load current control","pair_ids":["87ef10533e1b929c","2171cb2876f86086","62d5ed63e56e98ce"],"prompts":["Howland current pump with behavioral op-amp for load current control","Four-resistor bridge with load in feedback path","Converts voltage input to load current with high output impedance"],"measurements":[{"name":"i_load","key":"i_load","index":0,"value":0,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 OP"},{"name":"vout","key":"vout","index":0,"value":1.9999600008013658,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 OP"},{"name":"gain","key":"gain","index":0,"value":1.9999600008013658,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"phase","key":"phase","index":0,"value":0,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"}]} +{"id":"local:00107_8224f31275de9bdc:373aae08023de5e2","source":"local","example_id":"00107_8224f31275de9bdc","test_name":"test_test_107_diode_and_gate_8224f31275de9bdc","netlist_hash":"373aae08023de5e2","generator_model":"local-model","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Diode AND gate with pull-up resistor and two pulse inputs","pair_ids":["5ccc5d29f91a5fc6","b9f1eba3d6583039","8d25a6ff763b56d1"],"prompts":["Diode AND gate with pull-up resistor and two pulse inputs","Transient analysis to verify high and low output levels","Measures average output voltage and peak values"],"measurements":[{"name":"vmin","key":"vmin","index":0,"value":4.999979900004123,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 TRAN"},{"name":"vout_high","key":"vout_high","index":0,"value":4.999999999999999,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"},{"name":"vout_avg","key":"vout_avg","index":0,"value":4.999991958351914,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 TRAN"},{"name":"vmax","key":"vmax","index":0,"value":5,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"},{"name":"vout_low","key":"vout_low","index":0,"value":4.999979900004123,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 TRAN"}]} +{"id":"local:00256_dda2182f3dd47900:5370d14a0393be46","source":"local","example_id":"00256_dda2182f3dd47900","test_name":"test_test_256_constant_current_charger_dda2182f3dd47900","netlist_hash":"5370d14a0393be46","generator_model":"local-model","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Constant-current battery charger with op-amp feedback control","pair_ids":["fc53af4e441afac4","c7af5b8ee606cba7","4f4b2a016f128b1e"],"prompts":["Constant-current battery charger with op-amp feedback control","Op-amp drives pass transistor for current regulation","Battery voltage sweep to verify current regulation"],"measurements":[{"name":"Imax","key":"Imax","index":0,"value":0.011802108744388355,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"Icharge","key":"Icharge","index":0,"value":0.011803902939682497,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"Imin","key":"Imin","index":0,"value":2.416389310866407e-12,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"}]} +{"id":"local:00096_e0f7918704e6b16e:b31e4ad99a894801","source":"local","example_id":"00096_e0f7918704e6b16e","test_name":"test_test_96_full_wave_center_tapped_rectifier_with_smoothing_capacitor_e0f7918704e6b16e","netlist_hash":"b31e4ad99a894801","generator_model":"local-model","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Design a full-wave rectifier power supply with center-tapped transformer and smoothing capacitor","pair_ids":["8db55fb35398e1fc","7ba116b1e6814178","11bad3fed6b4e9e3","06b4dd9234edc566"],"prompts":["Design a full-wave rectifier power supply with center-tapped transformer and smoothing capacitor","Implement a bridge-free full-wave rectifier using two diodes and center-tapped AC source","Create a 12V DC supply from 17V peak AC using full-wave rectification and capacitor filter","Build a full-wave rectifier with 100uF smoothing capacitor for ripple reduction"],"measurements":[{"name":"vout_min","key":"vout_min","index":0,"value":14.246880907599273,"value_is_finite":true,"success":true,"measurement_type":"MIN","simulation_name":"#1 TRAN"},{"name":"vout_avg","key":"vout_avg","index":0,"value":15.411887057602637,"value_is_finite":true,"success":true,"measurement_type":"AVG","simulation_name":"#1 TRAN"},{"name":"vout_ripple","key":"vout_ripple","index":0,"value":2.312824175677928,"value_is_finite":true,"success":true,"measurement_type":"PP","simulation_name":"#1 TRAN"},{"name":"vout_max","key":"vout_max","index":0,"value":16.5597050832772,"value_is_finite":true,"success":true,"measurement_type":"MAX","simulation_name":"#1 TRAN"}]} +{"id":"local:00194_2e7df13af6be218d:2d318355732731d1","source":"local","example_id":"00194_2e7df13af6be218d","test_name":"test_test_194_inverting_amplifier_with_bias_compensation_2e7df13af6be218d","netlist_hash":"2d318355732731d1","generator_model":"local-model","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Design an inverting amplifier with gain of -10 using 10k and 100k resistors","pair_ids":["0dd3f9216918225e","0ffc93b8618d197e","e22c543a0f777cc4","195c2fd870b60f96"],"prompts":["Design an inverting amplifier with gain of -10 using 10k and 100k resistors","Add input bias compensation resistor to non-inverting input","Verify AC gain and phase at 1kHz","Measure output voltage and phase for AC analysis"],"measurements":[{"name":"gain","key":"gain","index":0,"value":-9.99890012098669,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"phase","key":"phase","index":0,"value":-3.141592653589793,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"}]} +{"id":"local:00065_8c26ca7dabbab34f:ffe0632d0704a1e2","source":"local","example_id":"00065_8c26ca7dabbab34f","test_name":"test_test_65_bridged_t_attenuator_8c26ca7dabbab34f","netlist_hash":"ffe0632d0704a1e2","generator_model":"local-model","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Bridged-T resistive attenuator with 10k, 10k, 10k, 5k resistor values","pair_ids":["4d4ec2706b558b76","b076dff079e46ad6","8a9a9948007c4039"],"prompts":["Bridged-T resistive attenuator with 10k, 10k, 10k, 5k resistor values","Provides approximately 10dB attenuation at low frequencies","Input impedance is approximately 10k for matching"],"measurements":[{"name":"attenuation","key":"attenuation","index":0,"value":-18.06179973983887,"value_is_finite":true,"success":true,"measurement_type":"PARAM","simulation_name":"#2 AC"},{"name":"vin_db","key":"vin_db","index":0,"value":0,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"vout_mag","key":"vout_mag","index":0,"value":0.125,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"vout_db","key":"vout_db","index":0,"value":-18.06179973983887,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"vin_mag","key":"vin_mag","index":0,"value":1,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"}]} +{"id":"local:00199_ec5cd1df6ec01a67:465352eca5ed7fc7","source":"local","example_id":"00199_ec5cd1df6ec01a67","test_name":"test_test_199_two_op_amp_instrumentation_amplifier_ec5cd1df6ec01a67","netlist_hash":"465352eca5ed7fc7","generator_model":"local-model","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Two-op-amp instrumentation amplifier with differential input and high CMRR","pair_ids":["6870910c961d37a3","2cb753676a472d58","35298eab559a7ab3"],"prompts":["Two-op-amp instrumentation amplifier with differential input and high CMRR","Precision amplifier configuration with input tail resistor for common-mode rejection","Instrumentation amplifier with three op-amps: two input stages and one difference amplifier"],"measurements":[{"name":"vout","key":"vout","index":0,"value":0,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"gain","key":"gain","index":0,"value":0,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"}]} +{"id":"local:00017_c3c36f24c65a08b0:e86ff2363a4baa6a","source":"local","example_id":"00017_c3c36f24c65a08b0","test_name":"test_test_17_voltage_divider_with_load_c3c36f24c65a08b0","netlist_hash":"e86ff2363a4baa6a","generator_model":"local-model","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Design a voltage divider to reduce 10V to 5V with 10k and 10k resistors","pair_ids":["57534a9d90e7ef63","cdf73cdca4480d91","84a149f804ecd18c","76804be713b5faf5"],"prompts":["Design a voltage divider to reduce 10V to 5V with 10k and 10k resistors","Add a 100k load resistor and measure the output voltage","Verify the loaded output is approximately 4.76V","Calculate the current through each resistor"],"measurements":[{"name":"VOUT","key":"VOUT","index":0,"value":4.761904761904762,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"I_RL","key":"I_RL","index":0,"value":4.761904761904762e-05,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"I_R2","key":"I_R2","index":0,"value":0.0004761904761904762,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"},{"name":"I_R1","key":"I_R1","index":0,"value":0.0005238095238095238,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 DC"}]} +{"id":"local:00309_7adf609ac31faedb:bd8d967400f70ecf","source":"local","example_id":"00309_7adf609ac31faedb","test_name":"test_test_309_mosfet_common_source_with_resistive_bias_7adf609ac31faedb","netlist_hash":"bd8d967400f70ecf","generator_model":"local-model","generator_source":"deepseek_measured_repaired","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":4,"representative_prompt":"Resistive gate bias network sets Vg to 5V","pair_ids":["4bebb67abf59e407","6724607aeb29ee5f","58a3fd2d8b2e73eb","df36e47c946124cf"],"prompts":["Resistive gate bias network sets Vg to 5V","Source degeneration resistor provides negative feedback","MOSFET operates in saturation region","Drain current flows through R3 creating Vd"],"measurements":[{"name":"idrain","key":"idrain","index":0,"value":0.000677342684775033,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 OP"},{"name":"vgate","key":"vgate","index":0,"value":4.999999999999999,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 OP"},{"name":"vsource","key":"vsource","index":0,"value":0.3386713405948942,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 OP"},{"name":"vdrain","key":"vdrain","index":0,"value":3.2265731522496712,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 OP"},{"name":"vds","key":"vds","index":0,"value":3.2265731522496712,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 OP"}]} +{"id":"local:00008_042952e6cd27f20d:547dd402a661ef97","source":"local","example_id":"00008_042952e6cd27f20d","test_name":"test_test_8_rc_low_pass_filter_042952e6cd27f20d","netlist_hash":"547dd402a661ef97","generator_model":"local-model","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"First-order RC low-pass filter with R=1k, C=10nF","pair_ids":["0ae3a57c8c45500f","1745e44d9fb6738c","e2e9e7c4eb99e4fe"],"prompts":["First-order RC low-pass filter with R=1k, C=10nF","AC analysis from 10 Hz to 100 kHz","Measure gain at low, cutoff, and high frequencies"],"measurements":[{"name":"vout_high","key":"vout_high","index":0,"value":0.15717672547758996,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"vout_mid","key":"vout_mid","index":0,"value":0.9950429025561466,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"},{"name":"vout_low","key":"vout_low","index":0,"value":0.9999998026079703,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 AC"}]} +{"id":"local:00196_63cda1e691cd4e89:9786ecee19204917","source":"local","example_id":"00196_63cda1e691cd4e89","test_name":"test_test_196_3_input_summing_amplifier_63cda1e691cd4e89","netlist_hash":"9786ecee19204917","generator_model":"local-model","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Summing amplifier with three weighted input signals","pair_ids":["72817b66cb217ca5","154806bfce4bc63d","8e11455fe4b367c3"],"prompts":["Summing amplifier with three weighted input signals","Input resistors determine weighting factors","Op-amp provides virtual ground at inverting input"],"measurements":[{"name":"vout","key":"vout","index":0,"value":-18.00216025923111,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#1 OP"},{"name":"gain","key":"gain","index":0,"value":6.00072008641037,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"phase","key":"phase","index":0,"value":3.141592653589793,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"}]} +{"id":"local:00207_a2e5afa9d24544b5:aa83e0eea42c234c","source":"local","example_id":"00207_a2e5afa9d24544b5","test_name":"test_test_207_op_amp_negative_impedance_converter_a2e5afa9d24544b5","netlist_hash":"aa83e0eea42c234c","generator_model":"local-model","generator_source":"deepseek_measured","quality_tier":"gold","status":"ok","pytest_status":"ok","prompt_count":3,"representative_prompt":"Negative impedance converter using op-amp","pair_ids":["118619ffea82798e","31918438261f79bc","1ea8aada086e40ef"],"prompts":["Negative impedance converter using op-amp","Input impedance should be negative","AC analysis to verify impedance magnitude"],"measurements":[{"name":"vout_phase","key":"vout_phase","index":0,"value":3.141592653589793,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"phase_x","key":"phase_x","index":0,"value":3.141592653589793,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"vout_mag","key":"vout_mag","index":0,"value":10.00110012101331,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"},{"name":"zin_mag","key":"zin_mag","index":0,"value":0.00010001100121013311,"value_is_finite":true,"success":true,"measurement_type":"FIND_AT","simulation_name":"#2 AC"}]} diff --git a/src/SpiceSharpParser.AIExamples/accepted_examples_manifest.json b/src/SpiceSharpParser.AIExamples/accepted_examples_manifest.json new file mode 100644 index 00000000..b7371201 --- /dev/null +++ b/src/SpiceSharpParser.AIExamples/accepted_examples_manifest.json @@ -0,0 +1,26 @@ +{ + "sources": [ + { + "accepted_pair_count": 3095, + "accepted_pairs_path": "dataset/data/accepted_pairs.jsonl", + "accepted_pairs_sha256": "b910faaefe2738bd9e5d9a2d76a21d6d0a34badf1492f960a02978234dc2a6b3", + "measured_example_count": 887, + "measured_examples_path": "dataset/data/measured_examples.jsonl", + "measured_examples_sha256": "4ab8c45ac81d670809dd1646913619521351e12b0790a779a7c7a1c59c550f3e", + "name": "deepseek", + "unique_netlist_count": 887 + }, + { + "accepted_pair_count": 187, + "accepted_pairs_path": "dataset/data/local_llama_big/accepted_pairs.jsonl", + "accepted_pairs_sha256": "04d52281166c46022c8d61b0c94e46d834b40a8d8cf6efe93af00d6efffb10bb", + "measured_example_count": 61, + "measured_examples_path": "dataset/data/local_llama_big/measured_examples.jsonl", + "measured_examples_sha256": "b2bb8fe5a2ccd4c39e0930a3b6ceb8ac679ee30f5d9b443bb7c81a7b195f09c6", + "name": "local", + "unique_netlist_count": 61 + } + ], + "total_unique_cases": 948, + "unmatched_accepted_pair_hashes": 0 +}