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<!DOCTYPE html>
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<title>Release Notes for STM32U3xx CMSIS</title>
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<h1 id="release-notes-for-stm32u3xx-cmsis">Release Notes for <mark>STM32U3xx CMSIS</mark></h1>
<p>Copyright © 2024 - 2026 STMicroelectronics<br />
</p>
<a href="https://www.st.com" class="logo"><img src="_htmresc/st_logo_2020.png" alt="ST logo" /></a>
</center>
<h1 id="purpose">Purpose</h1>
<p>This driver provides the CMSIS device for the STM32U3xx product. This covers</p>
<ul>
<li>STM32U375xx devices</li>
<li>STM32U385xx devices</li>
</ul>
<p>This driver is composed of the description of the registers under “Include” directory.</p>
<p>Various template files are provided to easily build an application. They can be adapted to fit applications requirements.</p>
<ul>
<li>Templates/system_stm32u3xx.c contains the initialization code referred as SystemInit.</li>
<li>Startup files are provided as example for EWARM©, MDK-ARM©, STM32CubeIDE©.</li>
<li>Linker files are provided as example for EWARM©, MDK-ARM©, STM32CubeIDE©.</li>
</ul>
</div>
<div class="col-sm-12 col-lg-8">
<h1 id="update-history">Update history</h1>
<div class="collapse">
<input type="checkbox" id="collapse-section4" checked aria-hidden="true"> <label for="collapse-section4" aria-hidden="true"> <strong>V1.3.0 / 04-February-2026</strong> </label>
<div>
<h2 id="official-release">Official Release</h2>
<ul>
<li>Official release of CMSIS for <strong>STM32U3xx</strong> firmware package supporting <strong>STM32U385xx/STM32U375xx/STM32U3B5xx/STM32U3C5xx</strong> devices</li>
<li>CMSIS Device Release version of bits and registers definition aligned with <strong>RM0487</strong></li>
</ul>
<h2 id="contents">Contents</h2>
<ul>
<li>First official release of STM32U3B5xx/STM32U3C5xx</li>
<li>Add COMP2 output-blanking PWM assignment</li>
<li>Fix Missing OR operator in IS_TIM_CCXN_INSTANCE definition</li>
<li>Set stack limit (MSPLIM) in CMSIS Device templates</li>
<li>Remove “<strong>section_static_hsp_data_bram_start</strong>” & “<strong>section_static_hsp_data_bram_end</strong>” useless symbols</li>
<li>Fix wrong memory region for HSP_DATA_BRAM</li>
<li>Add missing bit fields in flash</li>
<li>Update scatter file with correct flash size</li>
<li>Add Begin/End symbols for HSP_DATA_BRAM memory region</li>
<li>Add clock defaults to system file</li>
<li>Add/Update TSC registers for U3 derivatives</li>
<li>Add/Update DBGMCU registers</li>
<li>Add SYSCFG_CFGR1_TSC_G2_IO3 and SYSCFG_CFGR1_TSC_G2_IO1 bit definitions in SYSCFG_CFGR1</li>
<li>Fix wrong macro value for VREFBUF_CSR_VRS_2</li>
<li>Update TIM8 IRQ Handler name and remove unused AES IRQ handler</li>
<li>Add I2C4 macros for STM32U3 2M</li>
<li>Rename “HSP_BKO0CFGR_xxxx” constants by “HSP_BKOCFGR_xxxx”</li>
<li>Fix wrong macro HSPI1 to HSP1 in DBGMCU_AHB1FZR_DBG_HSP1</li>
<li>CMSIS update removing ADC DIFSEL register</li>
<li>Fix MPCBB registers for SRAM3</li>
<li>CMSIS correction for TIM8_S Definition</li>
<li>Add SPI4 instance for STM32U3 2M</li>
<li>Update FLASH linker files with correct flash size</li>
</ul>
<h2 id="known-limitations">Known Limitations</h2>
<ul>
<li>None</li>
</ul>
</div>
</div>
<div class="collapse">
<input type="checkbox" id="collapse-section3" aria-hidden="true"> <label for="collapse-section3" aria-hidden="true"> <strong>V1.2.0 / 04-June-2025</strong> </label>
<div>
<h2 id="maintenance-release">Maintenance Release</h2>
<ul>
<li>Maintenance release of CMSIS for <strong>STM32U3xx</strong> firmware package supporting <strong>STM32U385xx/STM32U375xx</strong> devices</li>
</ul>
<h2 id="contents-1">Contents</h2>
<ul>
<li>Add PKA on STM32U375xx</li>
<li>Add CCB sanity check feature on STM32U385xx</li>
<li>Swap bit position FLASH MEM and FLASH REG in GTZC1 TZIC registers</li>
</ul>
<h2 id="known-limitations-1">Known Limitations</h2>
<ul>
<li>None</li>
</ul>
</div>
</div>
<div class="collapse">
<input type="checkbox" id="collapse-section2" aria-hidden="true"> <label for="collapse-section2" aria-hidden="true"> <strong>V1.1.0 / 05-February-2025</strong> </label>
<div>
<h2 id="maintenance-release-1">Maintenance Release</h2>
<ul>
<li>Maintenance release of CMSIS for <strong>STM32U3xx</strong> firmware package supporting <strong>STM32U385xx/STM32U375xx</strong> devices</li>
</ul>
<h2 id="contents-2">Contents</h2>
<ul>
<li>Fix PWR_I3CPUCR2_PG14_I3CPU_Pos value</li>
<li>Suppress unused bit</li>
<li>Minor fix on comments</li>
</ul>
<h2 id="known-limitations-2">Known Limitations</h2>
<ul>
<li>None</li>
</ul>
</div>
</div>
<div class="collapse">
<input type="checkbox" id="collapse-section1" aria-hidden="true"> <label for="collapse-section1" aria-hidden="true"> <strong>V1.0.0 / 30-October-2024</strong> </label>
<div>
<h2 id="first-release">First Release</h2>
<ul>
<li>First official release of CMSIS for <strong>STM32U3xx</strong> firmware package supporting <strong>STM32U385xx/STM32U375xx</strong> devices</li>
</ul>
<h2 id="contents-3">Contents</h2>
<ul>
<li>First official release of CMSIS devices drivers
<ul>
<li>Support of STM32U385xx/STM32U375xx devices</li>
</ul></li>
</ul>
<h2 id="known-limitations-3">Known Limitations</h2>
<ul>
<li>None</li>
</ul>
</div>
</div>
</div>
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