Passes:
div-timing
boot-regs/-dmgABC
add-sp-e-timing
call-timing
call-cc-timing
call-cc-timing2
call-timing2
di-timing
ei-sequence
ei-timing
halt-ime0-ei
halt-ime1-timing
if-ie-registers
halt-ime0-nointr-timing
intr-timing
halt-ime1-timing2
jp-cc-timing
oam-dma/reg-read
oam-dma/basic
jp-timing
ld-hl-sp-e-timing
oam-dma-restart
pop-timing
oam-dma-start
oam-dma-timing
ppu/intr-2-0-timing
ppu/intr-1-2-timing
ppu/intr-2-mode0-timing
ppu/intr-2-mode3-timing
ppu/intr-2-oam-ok-timing
rapid-di-ei
push-timing
ret-cc-timing
ppu/vblank-stat-intr
reti-intr-timing
ret-timing
timer/rapid-toggle
reti-timing
rst-timing
timer/tim00
timer/tim00-div-trigger
timer/tim01
timer/tim01-div-trigger
timer/tim10
ppu/hblank-ly-scx-timing
timer/tim10-div-trigger
timer/tim11
timer/tim11-div-trigger
timer/tima-reload
timer/tima-write-reloading
timer/tma-write-reloading
timer/div-write
Fails:
interrupts/ie_push. I just simply haven't had the time or interest to fix this one. I'm sure it wouldn't be too difficult.
Passes:
intr_2_0_timing
intr_1_2_timing
intr_2_mode0_scx1_timing_nops
intr_0_timing
intr_1_timing
intr_2_mode0_scx2_timing_nops
intr_2_mode0_scx3_timing_nops
intr_2_mode0_scx4_timing_nops
intr_2_mode0_scx5_timing_nops
intr_2_mode0_scx6_timing_nops
intr_2_mode0_timing
intr_2_mode0_scx7_timing_nops
intr_2_mode3_timing
intr_2_mode0_scx8_timing_nops
intr_2_timing
hblank_ly_scx_timing_nops
hblank_ly_scx_timing
lcdon_mode_timing
ly00_01_mode0_2
ly00_mode0_2
ly00_mode1_0
ly00_mode2_3
ly143_144_145
ly00_mode3_0
ly143_144_152_153
ly143_144_mode0_1
ly143_144_mode3_0
ly_lyc_144
ly_lyc
vblank_if_timing
ly_lyc_153
vblank_stat_intr
ly_lyc_0
ly_new_frame
hblank_ly_scx_timing_variant_nops
All CPU instruction tests pass. All instruction time tests pass.