1313
1414#include "board.h"
1515
16- #include <registers/regsarmglobaltimer.h>
17- #include <registers/regsepit.h>
16+ // #include <registers/regsarmglobaltimer.h>
17+ // #include <registers/regsepit.h>
1818
19- #include <imx_uart.h>
20- #include <epit.h>
21- #include <cortex_a.h>
19+ // #include <imx_uart.h>
20+ // #include <epit.h>
21+ // #include <cortex_a.h>
2222
2323#include <mmu.h>
2424
@@ -32,38 +32,38 @@ const rt_uint32_t platform_mem_desc_size = sizeof(platform_mem_desc)/sizeof(plat
3232static void rt_hw_timer_isr (int vector , void * param )
3333{
3434 rt_tick_increase ();
35- epit_get_compare_event (HW_EPIT1 );
35+ // epit_get_compare_event(HW_EPIT1);
3636}
3737
3838int rt_hw_timer_init (void )
3939{
4040 uint32_t freq ;
4141
4242 // Make sure the timer is off.
43- HW_ARMGLOBALTIMER_CONTROL .B .TIMER_ENABLE = 0 ;
43+ // HW_ARMGLOBALTIMER_CONTROL.B.TIMER_ENABLE = 0;
4444
45- HW_ARMGLOBALTIMER_CONTROL .B .FCR0 = 1 ;
45+ // HW_ARMGLOBALTIMER_CONTROL.B.FCR0 =1;
4646
47- HW_ARMGLOBALTIMER_CONTROL .B .FCR1 = 0 ;
47+ // HW_ARMGLOBALTIMER_CONTROL.B.FCR1 =0;
4848
49- HW_ARMGLOBALTIMER_CONTROL .B .DBG_ENABLE = 0 ;
49+ // HW_ARMGLOBALTIMER_CONTROL.B.DBG_ENABLE =0;
5050
51- // Clear counter.
52- HW_ARMGLOBALTIMER_COUNTER_HI_WR (0 );
53- HW_ARMGLOBALTIMER_COUNTER_LO_WR (0 );
51+ // // Clear counter.
52+ // HW_ARMGLOBALTIMER_COUNTER_HI_WR(0);
53+ // HW_ARMGLOBALTIMER_COUNTER_LO_WR(0);
5454
55- // Now turn on the timer.
56- HW_ARMGLOBALTIMER_CONTROL .B .TIMER_ENABLE = 1 ;
55+ // // Now turn on the timer.
56+ // HW_ARMGLOBALTIMER_CONTROL.B.TIMER_ENABLE = 1;
5757
58- freq = get_main_clock (IPG_CLK );
58+ // freq = get_main_clock(IPG_CLK);
5959
60- epit_init (HW_EPIT1 , CLKSRC_IPG_CLK , freq / 1000000 ,
61- SET_AND_FORGET , 10000 , WAIT_MODE_EN | STOP_MODE_EN );
60+ // epit_init(HW_EPIT1, CLKSRC_IPG_CLK, freq / 1000000,
61+ // SET_AND_FORGET, 10000, WAIT_MODE_EN | STOP_MODE_EN);
6262
63- epit_counter_enable (HW_EPIT1 , 10000 , IRQ_MODE );
63+ // epit_counter_enable(HW_EPIT1, 10000, IRQ_MODE);
6464
65- rt_hw_interrupt_install (IMX_INT_EPIT1 , rt_hw_timer_isr , RT_NULL , "tick" );
66- rt_hw_interrupt_umask (IMX_INT_EPIT1 );
65+ // rt_hw_interrupt_install(IMX_INT_EPIT1, rt_hw_timer_isr, RT_NULL, "tick");
66+ // rt_hw_interrupt_umask(IMX_INT_EPIT1);
6767
6868 return 0 ;
6969}
@@ -74,8 +74,8 @@ INIT_BOARD_EXPORT(rt_hw_timer_init);
7474 */
7575void rt_hw_board_init (void )
7676{
77- enable_neon_fpu ();
78- disable_strict_align_check ();
77+ // enable_neon_fpu();
78+ // disable_strict_align_check();
7979
8080 rt_components_board_init ();
8181 rt_console_set_device (RT_CONSOLE_DEVICE_NAME );
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