vivado: added the check of a CHARACTER generic and a README.md file with notes

Author: rodrigomelo9

vivado/README.md

@@ -0,0 +1,14 @@
+# Notes about Vivado
+
+> Last update: Vivado 2021.2
+
+* FREQ=125MHz to match the employed clock of the ZYBO.
+
+VHDL:
+* Support to specify a REAL generic was added/fixed in the Vivado 2020.2 version
+  * https://forums.xilinx.com/t5/Vivado-TCL-Community/How-to-specify-a-REAL-generic-in-Vivado/m-p/1209088#M9581
+* Specify an architecture is supported, but not working
+  * https://support.xilinx.com/s/question/0D52E00006r9kHiSAI/specify-a-vhdl-architecture-seems-not-working
+  * As a workaround, I set SKIP_ARCH
+* Values are specified following Verilog notation.
+  * In case of character, is needed to specify the ASCII value

vivado/vhdl.tcl

@@ -13,12 +13,12 @@ add_files ../resources/constraints/zybo/clk.xdc
 add_files ../resources/constraints/zybo/led.xdc
 
 set_property top Top [current_fileset]
+set_property top_arch ARCH_SEL [current_fileset]
 
-set_property top_arch VIVADO [current_fileset]
+set GENERICS "FREQ=125000000 BOO=true INT=255 LOG=1'b1 VEC=8'b11111111 CHR=8'd90 STR=WXYZ REA=1.1 SKIP_ARCH=1"
+set_property "generic" $GENERICS -objects [get_filesets sources_1]
 
-# NOTE: support to specify a REAL generic was added into the Vivado 2020.2 version
-# https://forums.xilinx.com/t5/Vivado-TCL-Community/How-to-specify-a-REAL-generic-in-Vivado/m-p/1209088#M9581
-set_property "generic" "BOO=true INT=255 LOG=1'b1 VEC=8'b11111111 STR=WXYZ REA=1.1" -objects [get_filesets sources_1]
+set_property STEPS.SYNTH_DESIGN.ARGS.ASSERT true [get_runs synth_1]
 
 reset_run synth_1
 launch_runs synth_1