diff --git a/.gitignore b/.gitignore
new file mode 100644
index 000000000..09da79fc4
--- /dev/null
+++ b/.gitignore
@@ -0,0 +1,2 @@
+Apps/FlightSoftware/MotorControl/Release/
+Apps/FlightSoftware/MotorControl/Debug/
diff --git a/Apps/FlightSoftware/MotorControl/.cproject b/Apps/FlightSoftware/MotorControl/.cproject
index 58b778132..71b1d1484 100644
--- a/Apps/FlightSoftware/MotorControl/.cproject
+++ b/Apps/FlightSoftware/MotorControl/.cproject
@@ -51,12 +51,12 @@
-
-
+
+
-
-
+
+
@@ -78,7 +78,7 @@
-
+
@@ -121,81 +121,85 @@
-
-
diff --git a/Apps/FlightSoftware/MotorControl/.gitignore b/Apps/FlightSoftware/MotorControl/.gitignore
index 14c720338..000c45d34 100644
--- a/Apps/FlightSoftware/MotorControl/.gitignore
+++ b/Apps/FlightSoftware/MotorControl/.gitignore
@@ -1,2 +1,3 @@
Readme
/Debug/
+/Release/
diff --git a/Apps/FlightSoftware/MotorControl/.launches/MotorControl.launch b/Apps/FlightSoftware/MotorControl/.launches/MotorControl.launch
new file mode 100644
index 000000000..176d01b01
--- /dev/null
+++ b/Apps/FlightSoftware/MotorControl/.launches/MotorControl.launch
@@ -0,0 +1,42 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
diff --git a/Apps/FlightSoftware/MotorControl/.project b/Apps/FlightSoftware/MotorControl/.project
index b3d97620a..93e062a43 100644
--- a/Apps/FlightSoftware/MotorControl/.project
+++ b/Apps/FlightSoftware/MotorControl/.project
@@ -24,11 +24,4 @@
org.eclipse.cdt.core.ccnature
org.eclipse.cdt.managedbuilder.core.ScannerConfigNature
-
-
- driverlib
- 2
- /home/cedric/ti/msp430ware_3_80_07_00/driverlib/driverlib
-
-
diff --git a/Apps/FlightSoftware/MotorControl/.settings/org.eclipse.cdt.codan.core.prefs b/Apps/FlightSoftware/MotorControl/.settings/org.eclipse.cdt.codan.core.prefs
new file mode 100644
index 000000000..f653028c5
--- /dev/null
+++ b/Apps/FlightSoftware/MotorControl/.settings/org.eclipse.cdt.codan.core.prefs
@@ -0,0 +1,3 @@
+eclipse.preferences.version=1
+inEditor=false
+onBuild=false
diff --git a/Apps/FlightSoftware/MotorControl/.settings/org.eclipse.cdt.debug.core.prefs b/Apps/FlightSoftware/MotorControl/.settings/org.eclipse.cdt.debug.core.prefs
new file mode 100644
index 000000000..2adc7b1dd
--- /dev/null
+++ b/Apps/FlightSoftware/MotorControl/.settings/org.eclipse.cdt.debug.core.prefs
@@ -0,0 +1,2 @@
+eclipse.preferences.version=1
+org.eclipse.cdt.debug.core.toggleBreakpointModel=com.ti.ccstudio.debug.CCSBreakpointMarker
diff --git a/Apps/FlightSoftware/MotorControl/.settings/org.eclipse.core.resources.prefs b/Apps/FlightSoftware/MotorControl/.settings/org.eclipse.core.resources.prefs
new file mode 100644
index 000000000..a4e9f5050
--- /dev/null
+++ b/Apps/FlightSoftware/MotorControl/.settings/org.eclipse.core.resources.prefs
@@ -0,0 +1,15 @@
+eclipse.preferences.version=1
+encoding//Debug/driverlib/subdir_rules.mk=UTF-8
+encoding//Debug/driverlib/subdir_vars.mk=UTF-8
+encoding//Debug/makefile=UTF-8
+encoding//Debug/objects.mk=UTF-8
+encoding//Debug/sources.mk=UTF-8
+encoding//Debug/subdir_rules.mk=UTF-8
+encoding//Debug/subdir_vars.mk=UTF-8
+encoding//Release/driverlib/subdir_rules.mk=UTF-8
+encoding//Release/driverlib/subdir_vars.mk=UTF-8
+encoding//Release/makefile=UTF-8
+encoding//Release/objects.mk=UTF-8
+encoding//Release/sources.mk=UTF-8
+encoding//Release/subdir_rules.mk=UTF-8
+encoding//Release/subdir_vars.mk=UTF-8
diff --git a/Apps/FlightSoftware/MotorControl/Release/MotorControl.map b/Apps/FlightSoftware/MotorControl/Release/MotorControl.map
new file mode 100644
index 000000000..13fc9b1a8
--- /dev/null
+++ b/Apps/FlightSoftware/MotorControl/Release/MotorControl.map
@@ -0,0 +1,3857 @@
+******************************************************************************
+ MSP430 Linker PC v18.12.4
+******************************************************************************
+>> Linked Sat Apr 10 13:41:10 2021
+
+OUTPUT FILE NAME:
+ENTRY POINT SYMBOL: "_c_int00_noargs_mpu" address: 00004000
+
+
+MEMORY CONFIGURATION
+
+ name origin length used unused attr fill
+---------------------- -------- --------- -------- -------- ---- --------
+ TINYRAM 0000000a 00000016 00000000 00000016 RWIX
+ BSL 00001000 00000800 00000000 00000800 RWIX
+ INFOD 00001800 00000080 00000000 00000080 RWIX
+ INFOC 00001880 00000080 00000000 00000080 RWIX
+ INFOB 00001900 00000080 00000000 00000080 RWIX
+ INFOA 00001980 00000080 00000000 00000080 RWIX
+ RAM 00001c00 00001000 000009a3 0000065d RWIX
+ LEARAM 00002c00 00000ec8 00000000 00000ec8 RWIX
+ LEASTACK 00003ac8 00000138 00000000 00000138 RWIX
+ FRAM 00004000 0000bf80 000008b8 0000b6c8 RWIX
+ JTAGSIGNATURE 0000ff80 00000004 00000004 00000000 RWIX ffff
+ BSLSIGNATURE 0000ff84 00000004 00000004 00000000 RWIX ffff
+ IPESIGNATURE 0000ff88 00000008 00000008 00000000 RWIX ffff
+ INT00 0000ff90 00000002 00000000 00000002 RWIX
+ INT01 0000ff92 00000002 00000000 00000002 RWIX
+ INT02 0000ff94 00000002 00000000 00000002 RWIX
+ INT03 0000ff96 00000002 00000000 00000002 RWIX
+ INT04 0000ff98 00000002 00000000 00000002 RWIX
+ INT05 0000ff9a 00000002 00000000 00000002 RWIX
+ INT06 0000ff9c 00000002 00000000 00000002 RWIX
+ INT07 0000ff9e 00000002 00000000 00000002 RWIX
+ INT08 0000ffa0 00000002 00000000 00000002 RWIX
+ INT09 0000ffa2 00000002 00000000 00000002 RWIX
+ INT10 0000ffa4 00000002 00000000 00000002 RWIX
+ INT11 0000ffa6 00000002 00000000 00000002 RWIX
+ INT12 0000ffa8 00000002 00000000 00000002 RWIX
+ INT13 0000ffaa 00000002 00000000 00000002 RWIX
+ INT14 0000ffac 00000002 00000000 00000002 RWIX
+ INT15 0000ffae 00000002 00000000 00000002 RWIX
+ INT16 0000ffb0 00000002 00000000 00000002 RWIX
+ INT17 0000ffb2 00000002 00000000 00000002 RWIX
+ INT18 0000ffb4 00000002 00000002 00000000 RWIX
+ INT19 0000ffb6 00000002 00000002 00000000 RWIX
+ INT20 0000ffb8 00000002 00000002 00000000 RWIX
+ INT21 0000ffba 00000002 00000002 00000000 RWIX
+ INT22 0000ffbc 00000002 00000002 00000000 RWIX
+ INT23 0000ffbe 00000002 00000002 00000000 RWIX
+ INT24 0000ffc0 00000002 00000002 00000000 RWIX
+ INT25 0000ffc2 00000002 00000002 00000000 RWIX
+ INT26 0000ffc4 00000002 00000002 00000000 RWIX
+ INT27 0000ffc6 00000002 00000002 00000000 RWIX
+ INT28 0000ffc8 00000002 00000002 00000000 RWIX
+ INT29 0000ffca 00000002 00000002 00000000 RWIX
+ INT30 0000ffcc 00000002 00000002 00000000 RWIX
+ INT31 0000ffce 00000002 00000002 00000000 RWIX
+ INT32 0000ffd0 00000002 00000002 00000000 RWIX
+ INT33 0000ffd2 00000002 00000002 00000000 RWIX
+ INT34 0000ffd4 00000002 00000002 00000000 RWIX
+ INT35 0000ffd6 00000002 00000002 00000000 RWIX
+ INT36 0000ffd8 00000002 00000002 00000000 RWIX
+ INT37 0000ffda 00000002 00000002 00000000 RWIX
+ INT38 0000ffdc 00000002 00000002 00000000 RWIX
+ INT39 0000ffde 00000002 00000002 00000000 RWIX
+ INT40 0000ffe0 00000002 00000002 00000000 RWIX
+ INT41 0000ffe2 00000002 00000002 00000000 RWIX
+ INT42 0000ffe4 00000002 00000002 00000000 RWIX
+ INT43 0000ffe6 00000002 00000002 00000000 RWIX
+ INT44 0000ffe8 00000002 00000002 00000000 RWIX
+ INT45 0000ffea 00000002 00000002 00000000 RWIX
+ INT46 0000ffec 00000002 00000002 00000000 RWIX
+ INT47 0000ffee 00000002 00000002 00000000 RWIX
+ INT48 0000fff0 00000002 00000002 00000000 RWIX
+ INT49 0000fff2 00000002 00000002 00000000 RWIX
+ INT50 0000fff4 00000002 00000002 00000000 RWIX
+ INT51 0000fff6 00000002 00000002 00000000 RWIX
+ INT52 0000fff8 00000002 00000002 00000000 RWIX
+ INT53 0000fffa 00000002 00000002 00000000 RWIX
+ INT54 0000fffc 00000002 00000002 00000000 RWIX
+ RESET 0000fffe 00000002 00000002 00000000 RWIX
+ FRAM2 00010000 00034000 00000e74 0003318c RWIX
+
+
+SECTION ALLOCATION MAP
+
+ output attributes/
+section page origin length input sections
+-------- ---- ---------- ---------- ----------------
+.TI.persistent
+* 0 00004000 00000000 UNINITIALIZED
+
+.cio 0 00004000 00000000 UNINITIALIZED
+
+.sysmem 0 00004000 00000000 UNINITIALIZED
+
+.ipestruct
+* 0 00004000 00000000 UNINITIALIZED
+
+.ipe 0 00004000 00000000 UNINITIALIZED
+
+.ipe_const
+* 0 00004000 00000000 UNINITIALIZED
+
+.ipe:_isr
+* 0 00004000 00000000 UNINITIALIZED
+
+.cinit 0 00004880 00000028
+ 00004880 0000000c (__TI_handler_table)
+ 0000488c 00000006 (.cinit..bss.load) [load image, compression = zero_init]
+ 00004892 00000005 (.cinit..data.load) [load image, compression = lzss]
+ 00004897 00000001 --HOLE-- [fill = 0]
+ 00004898 00000010 (__TI_cinit_table)
+
+.binit 0 000048a8 00000010
+ 000048a8 00000010 (.binit)
+
+.init_array
+* 0 00004000 00000000 UNINITIALIZED
+
+.text:_isr
+* 0 00004000 00000028
+ 00004000 00000020 rts430x_lc_rd_eabi.lib : boot.c.obj (.text:_isr:_c_int00_noargs_mpu)
+ 00004020 00000008 : isr_trap.asm.obj (.text:_isr:__TI_ISR_TRAP)
+
+.TI.ramfunc
+* 0 00004028 00000828 RUN ADDR = 00001c00
+ 00004028 000006ca main.obj (.TI.ramfunc:TIMER0_B0_ISR)
+ 000046f2 0000015e i2c.obj (.TI.ramfunc:USCI_B0_ISR)
+
+.bss 0 00002428 000000da UNINITIALIZED
+ 00002428 0000002e (.common:g_piCur)
+ 00002456 0000002e (.common:g_piSpd)
+ 00002484 00000010 (.common:g_i2cCmdLength)
+ 00002494 00000008 (.common:g_hallMap)
+ 0000249c 00000008 (.common:g_rxBuffer)
+ 000024a4 00000008 (.common:g_txBuffer)
+ 000024ac 00000006 (.common:g_impulse)
+ 000024b2 00000004 (.common:g_closeLoopThreshold)
+ 000024b6 00000004 (.common:g_currentOffsetPhaseA)
+ 000024ba 00000004 (.common:g_currentOffsetPhaseB)
+ 000024be 00000004 (.common:g_currentOffsetPhaseC)
+ 000024c2 00000004 (.common:g_currentPhaseA)
+ 000024c6 00000004 (.common:g_currentPhaseB)
+ 000024ca 00000004 (.common:g_currentPhaseC)
+ 000024ce 00000004 (.common:g_currentPosition)
+ 000024d2 00000004 (.common:g_currentSpeed)
+ 000024d6 00000004 (.common:g_hallSensor)
+ 000024da 00000004 (.common:g_oldPosition)
+ 000024de 00000004 (.common:g_openLoopTorque)
+ 000024e2 00000004 (.common:g_targetPosition)
+ 000024e6 00000002 (.common:g_cmdState)
+ 000024e8 00000002 (.common:g_controlPrescaler)
+ 000024ea 00000002 (.common:g_slaveMode)
+ 000024ec 00000002 (.common:g_state)
+ 000024ee 00000002 (.common:g_transmitCurrentPosition)
+ 000024f0 00000001 (.common:g_calibrating)
+ 000024f1 00000001 (.common:g_calibrationDone)
+ 000024f2 00000001 (.common:g_closedLoop)
+ 000024f3 00000001 (.common:g_commState)
+ 000024f4 00000001 (.common:g_controlRegister)
+ 000024f5 00000001 (.common:g_faultRegister)
+ 000024f6 00000001 (.common:g_i2cSlaveAddress)
+ 000024f7 00000001 (.common:g_maxSpeed)
+ 000024f8 00000001 (.common:g_mod6cnt)
+ 000024f9 00000001 (.common:g_oldCommState)
+ 000024fa 00000001 (.common:g_readRegAddr)
+ 000024fb 00000001 (.common:g_rxBufferIdx)
+ 000024fc 00000001 (.common:g_rxByteCtr)
+ 000024fd 00000001 (.common:g_statusRegister)
+ 000024fe 00000001 (.common:g_targetDirection)
+ 000024ff 00000001 (.common:g_targetReached)
+ 00002500 00000001 (.common:g_txBufferIdx)
+ 00002501 00000001 (.common:g_txByteCtr)
+
+.data 0 00002502 00000001 UNINITIALIZED
+ 00002502 00000001 main.obj (.data)
+
+.stack 0 00002b60 000000a0 UNINITIALIZED
+ 00002b60 00000004 rts430x_lc_rd_eabi.lib : boot.c.obj (.stack)
+ 00002b64 0000009c --HOLE--
+
+$fill000 0 0000ff80 00000004
+ 0000ff80 00000004 --HOLE-- [fill = ffff]
+
+$fill001 0 0000ff84 00000004
+ 0000ff84 00000004 --HOLE-- [fill = ffff]
+
+$fill002 0 0000ff88 00000008
+ 0000ff88 00000008 --HOLE-- [fill = ffff]
+
+LEA 0 0000ffb4 00000002
+ 0000ffb4 00000002 rts430x_lc_rd_eabi.lib : int18.asm.obj (.int18)
+
+PORT8 0 0000ffb6 00000002
+ 0000ffb6 00000002 rts430x_lc_rd_eabi.lib : int19.asm.obj (.int19)
+
+PORT7 0 0000ffb8 00000002
+ 0000ffb8 00000002 rts430x_lc_rd_eabi.lib : int20.asm.obj (.int20)
+
+EUSCI_B3 0 0000ffba 00000002
+ 0000ffba 00000002 rts430x_lc_rd_eabi.lib : int21.asm.obj (.int21)
+
+EUSCI_B2 0 0000ffbc 00000002
+ 0000ffbc 00000002 rts430x_lc_rd_eabi.lib : int22.asm.obj (.int22)
+
+EUSCI_B1 0 0000ffbe 00000002
+ 0000ffbe 00000002 rts430x_lc_rd_eabi.lib : int23.asm.obj (.int23)
+
+EUSCI_A3 0 0000ffc0 00000002
+ 0000ffc0 00000002 rts430x_lc_rd_eabi.lib : int24.asm.obj (.int24)
+
+EUSCI_A2 0 0000ffc2 00000002
+ 0000ffc2 00000002 rts430x_lc_rd_eabi.lib : int25.asm.obj (.int25)
+
+PORT6 0 0000ffc4 00000002
+ 0000ffc4 00000002 rts430x_lc_rd_eabi.lib : int26.asm.obj (.int26)
+
+PORT5 0 0000ffc6 00000002
+ 0000ffc6 00000002 rts430x_lc_rd_eabi.lib : int27.asm.obj (.int27)
+
+TIMER4_A1
+* 0 0000ffc8 00000002
+ 0000ffc8 00000002 rts430x_lc_rd_eabi.lib : int28.asm.obj (.int28)
+
+TIMER4_A0
+* 0 0000ffca 00000002
+ 0000ffca 00000002 rts430x_lc_rd_eabi.lib : int29.asm.obj (.int29)
+
+AES256 0 0000ffcc 00000002
+ 0000ffcc 00000002 rts430x_lc_rd_eabi.lib : int30.asm.obj (.int30)
+
+RTC_C 0 0000ffce 00000002
+ 0000ffce 00000002 rts430x_lc_rd_eabi.lib : int31.asm.obj (.int31)
+
+PORT4 0 0000ffd0 00000002
+ 0000ffd0 00000002 rts430x_lc_rd_eabi.lib : int32.asm.obj (.int32)
+
+PORT3 0 0000ffd2 00000002
+ 0000ffd2 00000002 rts430x_lc_rd_eabi.lib : int33.asm.obj (.int33)
+
+TIMER3_A1
+* 0 0000ffd4 00000002
+ 0000ffd4 00000002 rts430x_lc_rd_eabi.lib : int34.asm.obj (.int34)
+
+TIMER3_A0
+* 0 0000ffd6 00000002
+ 0000ffd6 00000002 rts430x_lc_rd_eabi.lib : int35.asm.obj (.int35)
+
+PORT2 0 0000ffd8 00000002
+ 0000ffd8 00000002 rts430x_lc_rd_eabi.lib : int36.asm.obj (.int36)
+
+TIMER2_A1
+* 0 0000ffda 00000002
+ 0000ffda 00000002 rts430x_lc_rd_eabi.lib : int37.asm.obj (.int37)
+
+TIMER2_A0
+* 0 0000ffdc 00000002
+ 0000ffdc 00000002 rts430x_lc_rd_eabi.lib : int38.asm.obj (.int38)
+
+PORT1 0 0000ffde 00000002
+ 0000ffde 00000002 rts430x_lc_rd_eabi.lib : int39.asm.obj (.int39)
+
+TIMER1_A1
+* 0 0000ffe0 00000002
+ 0000ffe0 00000002 rts430x_lc_rd_eabi.lib : int40.asm.obj (.int40)
+
+TIMER1_A0
+* 0 0000ffe2 00000002
+ 0000ffe2 00000002 rts430x_lc_rd_eabi.lib : int41.asm.obj (.int41)
+
+DMA 0 0000ffe4 00000002
+ 0000ffe4 00000002 rts430x_lc_rd_eabi.lib : int42.asm.obj (.int42)
+
+EUSCI_A1 0 0000ffe6 00000002
+ 0000ffe6 00000002 rts430x_lc_rd_eabi.lib : int43.asm.obj (.int43)
+
+TIMER0_A1
+* 0 0000ffe8 00000002
+ 0000ffe8 00000002 rts430x_lc_rd_eabi.lib : int44.asm.obj (.int44)
+
+TIMER0_A0
+* 0 0000ffea 00000002
+ 0000ffea 00000002 rts430x_lc_rd_eabi.lib : int45.asm.obj (.int45)
+
+ADC12_B 0 0000ffec 00000002
+ 0000ffec 00000002 rts430x_lc_rd_eabi.lib : int46.asm.obj (.int46)
+
+EUSCI_B0 0 0000ffee 00000002
+ 0000ffee 00000002 i2c.obj (.int47)
+
+EUSCI_A0 0 0000fff0 00000002
+ 0000fff0 00000002 rts430x_lc_rd_eabi.lib : int48.asm.obj (.int48)
+
+WDT 0 0000fff2 00000002
+ 0000fff2 00000002 rts430x_lc_rd_eabi.lib : int49.asm.obj (.int49)
+
+TIMER0_B1
+* 0 0000fff4 00000002
+ 0000fff4 00000002 rts430x_lc_rd_eabi.lib : int50.asm.obj (.int50)
+
+TIMER0_B0
+* 0 0000fff6 00000002
+ 0000fff6 00000002 main.obj (.int51)
+
+COMP_E 0 0000fff8 00000002
+ 0000fff8 00000002 rts430x_lc_rd_eabi.lib : int52.asm.obj (.int52)
+
+UNMI 0 0000fffa 00000002
+ 0000fffa 00000002 rts430x_lc_rd_eabi.lib : int53.asm.obj (.int53)
+
+SYSNMI 0 0000fffc 00000002
+ 0000fffc 00000002 rts430x_lc_rd_eabi.lib : int54.asm.obj (.int54)
+
+.reset 0 0000fffe 00000002
+ 0000fffe 00000002 rts430x_lc_rd_eabi.lib : boot.c.obj (.reset)
+
+.const 0 00004850 00000030
+ 00004850 0000001c gpio.obj (.const:GPIO_PORT_TO_BASE)
+ 0000486c 0000000e main.obj (.const:$P$T0$1)
+ 0000487a 00000006 i2c.obj (.const:$P$T0$1)
+
+.text 0 00010000 00000e74
+ 00010000 000001ce main.obj (.text:main)
+ 000101ce 000000f0 cs.obj (.text:CS_setDCOFreq)
+ 000102be 000000d8 main.obj (.text:initializePwmModules)
+ 00010396 000000b8 i2c.obj (.text:i2cSlaveTransactionDone)
+ 0001044e 000000b8 main.obj (.text:initializeAdcModule)
+ 00010506 000000b8 main.obj (.text:updateStateMachine)
+ 000105be 000000a4 bsp.obj (.text:initializeGpios)
+ 00010662 00000088 adc12_b.obj (.text:ADC12_B_init)
+ 000106ea 0000007e i2c.obj (.text:initializeI2cModule)
+ 00010768 00000076 timer_b.obj (.text:Timer_B_initUpDownMode)
+ 000107de 00000076 rts430x_lc_rd_eabi.lib : copy_decompress_lzss.c.obj (.text:decompress:lzss:__TI_decompress_lzss)
+ 00010854 0000006c gpio.obj (.text:GPIO_setAsPeripheralModuleFunctionInputPin)
+ 000108c0 00000068 gpio.obj (.text:GPIO_setAsPeripheralModuleFunctionOutputPin)
+ 00010928 00000068 main.obj (.text:currentOffsetCalibration)
+ 00010990 00000066 rts430x_lc_rd_eabi.lib : autoinit.c.obj (.text:__TI_auto_init_nopinit_hold_wdt:__TI_auto_init_nopinit_hold_wdt)
+ 000109f6 00000064 : cpy_tbl.c.obj (.text:copy_in)
+ 00010a5a 00000056 cs.obj (.text:CS_initClockSignal)
+ 00010ab0 00000042 gpio.obj (.text:GPIO_setAsInputPin)
+ 00010af2 0000003e i2c.obj (.text:initializeCmdLength)
+ 00010b30 0000003e rts430x_lc_rd_eabi.lib : lsl32.asm.obj (.text:l_lsl_const)
+ 00010b6e 0000003e : lsr32.asm.obj (.text:l_lsr_const)
+ 00010bac 0000003c adc12_b.obj (.text:ADC12_B_configureMemory)
+ 00010be8 00000038 gpio.obj (.text:GPIO_setAsOutputPin)
+ 00010c20 00000038 timer_b.obj (.text:Timer_B_initCompareMode)
+ 00010c58 00000030 adc12_b.obj (.text:ADC12_B_startConversion)
+ 00010c88 0000002c MSPMPU_INIT_LIB_CCS_msp430_large_code_restricted_data.lib : mpu_init.o (.text:__mpu_init)
+ 00010cb4 0000002c main.obj (.text:resetPiController)
+ 00010ce0 0000002a eusci_b_i2c.obj (.text:EUSCI_B_I2C_initSlave)
+ 00010d0a 00000028 main.obj (.text:initializeHallInterface)
+ 00010d32 00000024 rts430x_lc_rd_eabi.lib : copy_zero_init.c.obj (.text:decompress:ZI:__TI_zero_init_nomemset:__TI_zero_init_nomemset)
+ 00010d56 00000020 adc12_b.obj (.text:ADC12_B_setupSamplingTimer)
+ 00010d76 0000001c gpio.obj (.text:GPIO_setOutputHighOnPin)
+ 00010d92 0000001c gpio.obj (.text:GPIO_setOutputLowOnPin)
+ 00010dae 00000018 rts430x_lc_rd_eabi.lib : mult16_f5hw.asm.obj (.text)
+ 00010dc6 00000016 wdt_a.obj (.text:WDT_A_hold)
+ 00010ddc 00000014 i2c.obj (.text:copyArray)
+ 00010df0 00000014 rts430x_lc_rd_eabi.lib : memcpy.c.obj (.text:memcpy)
+ 00010e04 00000012 : copy_decompress_none.c.obj (.text:decompress:none:__TI_decompress_none)
+ 00010e16 00000010 adc12_b.obj (.text:ADC12_B_setResolution)
+ 00010e26 0000000e adc12_b.obj (.text:ADC12_B_enable)
+ 00010e34 0000000c eusci_b_i2c.obj (.text:EUSCI_B_I2C_clearInterrupt)
+ 00010e40 0000000c eusci_b_i2c.obj (.text:EUSCI_B_I2C_enableInterrupt)
+ 00010e4c 0000000c main.obj (.text:read_driver_fault)
+ 00010e58 0000000a timer_b.obj (.text:Timer_B_clearCaptureCompareInterrupt)
+ 00010e62 00000006 eusci_b_i2c.obj (.text:EUSCI_B_I2C_enable)
+ 00010e68 00000006 rts430x_lc_rd_eabi.lib : exit.c.obj (.text:abort)
+ 00010e6e 00000004 : pre_init.c.obj (.text:_system_pre_init)
+ 00010e72 00000002 : startup.c.obj (.text:_system_post_cinit)
+
+MODULE SUMMARY
+
+ Module code ro data rw data
+ ------ ---- ------- -------
+ .\
+ main.obj 4722 16 177
+ i2c.obj 1092 8 42
+ bsp.obj 164 0 0
+ +--+----------------------------+------+---------+---------+
+ Total: 5978 24 219
+
+ .\driverlib\
+ gpio.obj 390 28 0
+ cs.obj 326 0 0
+ adc12_b.obj 306 0 0
+ timer_b.obj 184 0 0
+ eusci_b_i2c.obj 72 0 0
+ wdt_a.obj 22 0 0
+ +--+----------------------------+------+---------+---------+
+ Total: 1300 28 0
+
+ C:\ti\ccs930\ccs\ccs_base\msp430\lib\FR59xx\MSPMPU_INIT_LIB_CCS_msp430_large_code_restricted_data.lib
+ mpu_init.o 44 0 0
+ +--+----------------------------+------+---------+---------+
+ Total: 44 0 0
+
+ C:\ti\ccs930\ccs\tools\compiler\ti-cgt-msp430_18.12.4.LTS\lib\rts430x_lc_rd_eabi.lib
+ copy_decompress_lzss.c.obj 118 0 0
+ autoinit.c.obj 102 0 0
+ cpy_tbl.c.obj 100 0 0
+ lsl32.asm.obj 62 0 0
+ lsr32.asm.obj 62 0 0
+ copy_zero_init.c.obj 36 0 0
+ boot.c.obj 32 2 0
+ mult16_f5hw.asm.obj 24 0 0
+ memcpy.c.obj 20 0 0
+ copy_decompress_none.c.obj 18 0 0
+ isr_trap.asm.obj 8 0 0
+ exit.c.obj 6 0 0
+ pre_init.c.obj 4 0 0
+ int18.asm.obj 0 2 0
+ int19.asm.obj 0 2 0
+ int20.asm.obj 0 2 0
+ int21.asm.obj 0 2 0
+ int22.asm.obj 0 2 0
+ int23.asm.obj 0 2 0
+ int24.asm.obj 0 2 0
+ int25.asm.obj 0 2 0
+ int26.asm.obj 0 2 0
+ int27.asm.obj 0 2 0
+ int28.asm.obj 0 2 0
+ int29.asm.obj 0 2 0
+ int30.asm.obj 0 2 0
+ int31.asm.obj 0 2 0
+ int32.asm.obj 0 2 0
+ int33.asm.obj 0 2 0
+ int34.asm.obj 0 2 0
+ int35.asm.obj 0 2 0
+ int36.asm.obj 0 2 0
+ int37.asm.obj 0 2 0
+ int38.asm.obj 0 2 0
+ int39.asm.obj 0 2 0
+ int40.asm.obj 0 2 0
+ int41.asm.obj 0 2 0
+ int42.asm.obj 0 2 0
+ int43.asm.obj 0 2 0
+ int44.asm.obj 0 2 0
+ int45.asm.obj 0 2 0
+ int46.asm.obj 0 2 0
+ int48.asm.obj 0 2 0
+ int49.asm.obj 0 2 0
+ int50.asm.obj 0 2 0
+ int52.asm.obj 0 2 0
+ int53.asm.obj 0 2 0
+ int54.asm.obj 0 2 0
+ startup.c.obj 2 0 0
+ +--+----------------------------+------+---------+---------+
+ Total: 594 72 0
+
+ Stack: 0 0 160
+ Linker Generated: 0 55 0
+ +--+----------------------------+------+---------+---------+
+ Grand Total: 7916 179 379
+
+
+LINKER GENERATED COPY TABLES
+
+__TI_cinit_table @ 00004898 records: 2, size/record: 8, table size: 16
+ .bss: load addr=0000488c, load size=00000006 bytes, run addr=00002428, run size=000000da bytes, compression=zero_init
+ .data: load addr=00004892, load size=00000005 bytes, run addr=00002502, run size=00000001 bytes, compression=lzss
+binit @ 000048a8 records: 1, size/record: 12, table size: 16
+ .TI.ramfunc: load addr=00004028, load size=00000828, run addr=00001c00, run size=00000828, compression=none
+
+
+LINKER GENERATED HANDLER TABLE
+
+__TI_handler_table @ 00004880 records: 3, size/record: 4, table size: 12
+ index: 0, handler: __TI_zero_init
+ index: 1, handler: __TI_decompress_lzss
+ index: 2, handler: __TI_decompress_none
+
+
+GLOBAL SYMBOLS: SORTED ALPHABETICALLY BY Name
+
+address name
+------- ----
+00000800 ADC12CTL0
+00000801 ADC12CTL0_H
+00000800 ADC12CTL0_L
+00000802 ADC12CTL1
+00000803 ADC12CTL1_H
+00000802 ADC12CTL1_L
+00000804 ADC12CTL2
+00000805 ADC12CTL2_H
+00000804 ADC12CTL2_L
+00000806 ADC12CTL3
+00000807 ADC12CTL3_H
+00000806 ADC12CTL3_L
+0000080a ADC12HI
+0000080b ADC12HI_H
+0000080a ADC12HI_L
+00000812 ADC12IER0
+00000813 ADC12IER0_H
+00000812 ADC12IER0_L
+00000814 ADC12IER1
+00000815 ADC12IER1_H
+00000814 ADC12IER1_L
+00000816 ADC12IER2
+00000817 ADC12IER2_H
+00000816 ADC12IER2_L
+0000080c ADC12IFGR0
+0000080d ADC12IFGR0_H
+0000080c ADC12IFGR0_L
+0000080e ADC12IFGR1
+0000080f ADC12IFGR1_H
+0000080e ADC12IFGR1_L
+00000810 ADC12IFGR2
+00000811 ADC12IFGR2_H
+00000810 ADC12IFGR2_L
+00000818 ADC12IV
+00000819 ADC12IV_H
+00000818 ADC12IV_L
+00000808 ADC12LO
+00000809 ADC12LO_H
+00000808 ADC12LO_L
+00000820 ADC12MCTL0
+00000821 ADC12MCTL0_H
+00000820 ADC12MCTL0_L
+00000822 ADC12MCTL1
+00000834 ADC12MCTL10
+00000835 ADC12MCTL10_H
+00000834 ADC12MCTL10_L
+00000836 ADC12MCTL11
+00000837 ADC12MCTL11_H
+00000836 ADC12MCTL11_L
+00000838 ADC12MCTL12
+00000839 ADC12MCTL12_H
+00000838 ADC12MCTL12_L
+0000083a ADC12MCTL13
+0000083b ADC12MCTL13_H
+0000083a ADC12MCTL13_L
+0000083c ADC12MCTL14
+0000083d ADC12MCTL14_H
+0000083c ADC12MCTL14_L
+0000083e ADC12MCTL15
+0000083f ADC12MCTL15_H
+0000083e ADC12MCTL15_L
+00000840 ADC12MCTL16
+00000841 ADC12MCTL16_H
+00000840 ADC12MCTL16_L
+00000842 ADC12MCTL17
+00000843 ADC12MCTL17_H
+00000842 ADC12MCTL17_L
+00000844 ADC12MCTL18
+00000845 ADC12MCTL18_H
+00000844 ADC12MCTL18_L
+00000846 ADC12MCTL19
+00000847 ADC12MCTL19_H
+00000846 ADC12MCTL19_L
+00000823 ADC12MCTL1_H
+00000822 ADC12MCTL1_L
+00000824 ADC12MCTL2
+00000848 ADC12MCTL20
+00000849 ADC12MCTL20_H
+00000848 ADC12MCTL20_L
+0000084a ADC12MCTL21
+0000084b ADC12MCTL21_H
+0000084a ADC12MCTL21_L
+0000084c ADC12MCTL22
+0000084d ADC12MCTL22_H
+0000084c ADC12MCTL22_L
+0000084e ADC12MCTL23
+0000084f ADC12MCTL23_H
+0000084e ADC12MCTL23_L
+00000850 ADC12MCTL24
+00000851 ADC12MCTL24_H
+00000850 ADC12MCTL24_L
+00000852 ADC12MCTL25
+00000853 ADC12MCTL25_H
+00000852 ADC12MCTL25_L
+00000854 ADC12MCTL26
+00000855 ADC12MCTL26_H
+00000854 ADC12MCTL26_L
+00000856 ADC12MCTL27
+00000857 ADC12MCTL27_H
+00000856 ADC12MCTL27_L
+00000858 ADC12MCTL28
+00000859 ADC12MCTL28_H
+00000858 ADC12MCTL28_L
+0000085a ADC12MCTL29
+0000085b ADC12MCTL29_H
+0000085a ADC12MCTL29_L
+00000825 ADC12MCTL2_H
+00000824 ADC12MCTL2_L
+00000826 ADC12MCTL3
+0000085c ADC12MCTL30
+0000085d ADC12MCTL30_H
+0000085c ADC12MCTL30_L
+0000085e ADC12MCTL31
+0000085f ADC12MCTL31_H
+0000085e ADC12MCTL31_L
+00000827 ADC12MCTL3_H
+00000826 ADC12MCTL3_L
+00000828 ADC12MCTL4
+00000829 ADC12MCTL4_H
+00000828 ADC12MCTL4_L
+0000082a ADC12MCTL5
+0000082b ADC12MCTL5_H
+0000082a ADC12MCTL5_L
+0000082c ADC12MCTL6
+0000082d ADC12MCTL6_H
+0000082c ADC12MCTL6_L
+0000082e ADC12MCTL7
+0000082f ADC12MCTL7_H
+0000082e ADC12MCTL7_L
+00000830 ADC12MCTL8
+00000831 ADC12MCTL8_H
+00000830 ADC12MCTL8_L
+00000832 ADC12MCTL9
+00000833 ADC12MCTL9_H
+00000832 ADC12MCTL9_L
+00000860 ADC12MEM0
+00000861 ADC12MEM0_H
+00000860 ADC12MEM0_L
+00000862 ADC12MEM1
+00000874 ADC12MEM10
+00000875 ADC12MEM10_H
+00000874 ADC12MEM10_L
+00000876 ADC12MEM11
+00000877 ADC12MEM11_H
+00000876 ADC12MEM11_L
+00000878 ADC12MEM12
+00000879 ADC12MEM12_H
+00000878 ADC12MEM12_L
+0000087a ADC12MEM13
+0000087b ADC12MEM13_H
+0000087a ADC12MEM13_L
+0000087c ADC12MEM14
+0000087d ADC12MEM14_H
+0000087c ADC12MEM14_L
+0000087e ADC12MEM15
+0000087f ADC12MEM15_H
+0000087e ADC12MEM15_L
+00000880 ADC12MEM16
+00000881 ADC12MEM16_H
+00000880 ADC12MEM16_L
+00000882 ADC12MEM17
+00000883 ADC12MEM17_H
+00000882 ADC12MEM17_L
+00000884 ADC12MEM18
+00000885 ADC12MEM18_H
+00000884 ADC12MEM18_L
+00000886 ADC12MEM19
+00000887 ADC12MEM19_H
+00000886 ADC12MEM19_L
+00000863 ADC12MEM1_H
+00000862 ADC12MEM1_L
+00000864 ADC12MEM2
+00000888 ADC12MEM20
+00000889 ADC12MEM20_H
+00000888 ADC12MEM20_L
+0000088a ADC12MEM21
+0000088b ADC12MEM21_H
+0000088a ADC12MEM21_L
+0000088c ADC12MEM22
+0000088d ADC12MEM22_H
+0000088c ADC12MEM22_L
+0000088e ADC12MEM23
+0000088f ADC12MEM23_H
+0000088e ADC12MEM23_L
+00000890 ADC12MEM24
+00000891 ADC12MEM24_H
+00000890 ADC12MEM24_L
+00000892 ADC12MEM25
+00000893 ADC12MEM25_H
+00000892 ADC12MEM25_L
+00000894 ADC12MEM26
+00000895 ADC12MEM26_H
+00000894 ADC12MEM26_L
+00000896 ADC12MEM27
+00000897 ADC12MEM27_H
+00000896 ADC12MEM27_L
+00000898 ADC12MEM28
+00000899 ADC12MEM28_H
+00000898 ADC12MEM28_L
+0000089a ADC12MEM29
+0000089b ADC12MEM29_H
+0000089a ADC12MEM29_L
+00000865 ADC12MEM2_H
+00000864 ADC12MEM2_L
+00000866 ADC12MEM3
+0000089c ADC12MEM30
+0000089d ADC12MEM30_H
+0000089c ADC12MEM30_L
+0000089e ADC12MEM31
+0000089f ADC12MEM31_H
+0000089e ADC12MEM31_L
+00000867 ADC12MEM3_H
+00000866 ADC12MEM3_L
+00000868 ADC12MEM4
+00000869 ADC12MEM4_H
+00000868 ADC12MEM4_L
+0000086a ADC12MEM5
+0000086b ADC12MEM5_H
+0000086a ADC12MEM5_L
+0000086c ADC12MEM6
+0000086d ADC12MEM6_H
+0000086c ADC12MEM6_L
+0000086e ADC12MEM7
+0000086f ADC12MEM7_H
+0000086e ADC12MEM7_L
+00000870 ADC12MEM8
+00000871 ADC12MEM8_H
+00000870 ADC12MEM8_L
+00000872 ADC12MEM9
+00000873 ADC12MEM9_H
+00000872 ADC12MEM9_L
+00010bac ADC12_B_configureMemory
+00010e26 ADC12_B_enable
+00010662 ADC12_B_init
+00010e16 ADC12_B_setResolution
+00010d56 ADC12_B_setupSamplingTimer
+00010c58 ADC12_B_startConversion
+000009c0 AESACTL0
+000009c1 AESACTL0_H
+000009c0 AESACTL0_L
+000009c2 AESACTL1
+000009c3 AESACTL1_H
+000009c2 AESACTL1_L
+000009c8 AESADIN
+000009c9 AESADIN_H
+000009c8 AESADIN_L
+000009ca AESADOUT
+000009cb AESADOUT_H
+000009ca AESADOUT_L
+000009c6 AESAKEY
+000009c7 AESAKEY_H
+000009c6 AESAKEY_L
+000009c4 AESASTAT
+000009c5 AESASTAT_H
+000009c4 AESASTAT_L
+000009cc AESAXDIN
+000009cd AESAXDIN_H
+000009cc AESAXDIN_L
+000009ce AESAXIN
+000009cf AESAXIN_H
+000009ce AESAXIN_L
+000004be BCD2BIN
+000004bf BCD2BIN_H
+000004be BCD2BIN_L
+000004bc BIN2BCD
+000004bd BIN2BCD_H
+000004bc BIN2BCD_L
+00010e68 C$$EXIT
+0000043e CAPTIO0CTL
+0000043f CAPTIO0CTL_H
+0000043e CAPTIO0CTL_L
+0000047e CAPTIO1CTL
+0000047f CAPTIO1CTL_H
+0000047e CAPTIO1CTL_L
+000008c0 CECTL0
+000008c1 CECTL0_H
+000008c0 CECTL0_L
+000008c2 CECTL1
+000008c3 CECTL1_H
+000008c2 CECTL1_L
+000008c4 CECTL2
+000008c5 CECTL2_H
+000008c4 CECTL2_L
+000008c6 CECTL3
+000008c7 CECTL3_H
+000008c6 CECTL3_L
+000008cc CEINT
+000008cd CEINT_H
+000008cc CEINT_L
+000008ce CEIV
+000008cf CEIV_H
+000008ce CEIV_L
+00000996 CRC16DIRBW0
+00000997 CRC16DIRBW0_H
+00000996 CRC16DIRBW0_L
+00000990 CRC16DIW0
+00000991 CRC16DIW0_H
+00000990 CRC16DIW0_L
+00000998 CRC16INIRESW0
+00000999 CRC16INIRESW0_H
+00000998 CRC16INIRESW0_L
+0000099e CRC16RESRW0
+0000099f CRC16RESRW0_H
+0000099e CRC16RESRW0_L
+00000986 CRC32DIRBW0
+00000987 CRC32DIRBW0_H
+00000986 CRC32DIRBW0_L
+00000984 CRC32DIRBW1
+00000985 CRC32DIRBW1_H
+00000984 CRC32DIRBW1_L
+00000980 CRC32DIW0
+00000981 CRC32DIW0_H
+00000980 CRC32DIW0_L
+00000982 CRC32DIW1
+00000983 CRC32DIW1_H
+00000982 CRC32DIW1_L
+00000988 CRC32INIRESW0
+00000989 CRC32INIRESW0_H
+00000988 CRC32INIRESW0_L
+0000098a CRC32INIRESW1
+0000098b CRC32INIRESW1_H
+0000098a CRC32INIRESW1_L
+0000098e CRC32RESRW0
+0000098f CRC32RESRW0_H
+0000098e CRC32RESRW0_L
+0000098c CRC32RESRW1
+0000098d CRC32RESRW1_H
+0000098c CRC32RESRW1_L
+00000150 CRCDI
+00000152 CRCDIRB
+00000153 CRCDIRB_H
+00000152 CRCDIRB_L
+00000151 CRCDI_H
+00000150 CRCDI_L
+00000154 CRCINIRES
+00000155 CRCINIRES_H
+00000154 CRCINIRES_L
+00000156 CRCRESR
+00000157 CRCRESR_H
+00000156 CRCRESR_L
+00000160 CSCTL0
+00000161 CSCTL0_H
+00000160 CSCTL0_L
+00000162 CSCTL1
+00000163 CSCTL1_H
+00000162 CSCTL1_L
+00000164 CSCTL2
+00000165 CSCTL2_H
+00000164 CSCTL2_L
+00000166 CSCTL3
+00000167 CSCTL3_H
+00000166 CSCTL3_L
+00000168 CSCTL4
+00000169 CSCTL4_H
+00000168 CSCTL4_L
+0000016a CSCTL5
+0000016b CSCTL5_H
+0000016a CSCTL5_L
+0000016c CSCTL6
+0000016d CSCTL6_H
+0000016c CSCTL6_L
+00010a5a CS_initClockSignal
+000101ce CS_setDCOFreq
+00000510 DMA0CTL
+00000511 DMA0CTL_H
+00000510 DMA0CTL_L
+00000516 DMA0DA
+00000518 DMA0DAH
+00000516 DMA0DAL
+00000512 DMA0SA
+00000514 DMA0SAH
+00000512 DMA0SAL
+0000051a DMA0SZ
+0000051b DMA0SZ_H
+0000051a DMA0SZ_L
+00000520 DMA1CTL
+00000521 DMA1CTL_H
+00000520 DMA1CTL_L
+00000526 DMA1DA
+00000528 DMA1DAH
+00000526 DMA1DAL
+00000522 DMA1SA
+00000524 DMA1SAH
+00000522 DMA1SAL
+0000052a DMA1SZ
+0000052b DMA1SZ_H
+0000052a DMA1SZ_L
+00000530 DMA2CTL
+00000531 DMA2CTL_H
+00000530 DMA2CTL_L
+00000536 DMA2DA
+00000538 DMA2DAH
+00000536 DMA2DAL
+00000532 DMA2SA
+00000534 DMA2SAH
+00000532 DMA2SAL
+0000053a DMA2SZ
+0000053b DMA2SZ_H
+0000053a DMA2SZ_L
+00000540 DMA3CTL
+00000541 DMA3CTL_H
+00000540 DMA3CTL_L
+00000546 DMA3DA
+00000548 DMA3DAH
+00000546 DMA3DAL
+00000542 DMA3SA
+00000544 DMA3SAH
+00000542 DMA3SAL
+0000054a DMA3SZ
+0000054b DMA3SZ_H
+0000054a DMA3SZ_L
+00000550 DMA4CTL
+00000551 DMA4CTL_H
+00000550 DMA4CTL_L
+00000556 DMA4DA
+00000558 DMA4DAH
+00000556 DMA4DAL
+00000552 DMA4SA
+00000554 DMA4SAH
+00000552 DMA4SAL
+0000055a DMA4SZ
+0000055b DMA4SZ_H
+0000055a DMA4SZ_L
+00000560 DMA5CTL
+00000561 DMA5CTL_H
+00000560 DMA5CTL_L
+00000566 DMA5DA
+00000568 DMA5DAH
+00000566 DMA5DAL
+00000562 DMA5SA
+00000564 DMA5SAH
+00000562 DMA5SAL
+0000056a DMA5SZ
+0000056b DMA5SZ_H
+0000056a DMA5SZ_L
+00000500 DMACTL0
+00000501 DMACTL0_H
+00000500 DMACTL0_L
+00000502 DMACTL1
+00000503 DMACTL1_H
+00000502 DMACTL1_L
+00000504 DMACTL2
+00000505 DMACTL2_H
+00000504 DMACTL2_L
+00000508 DMACTL4
+00000509 DMACTL4_H
+00000508 DMACTL4_L
+0000050e DMAIV
+0000050f DMAIV_H
+0000050e DMAIV_L
+00010e34 EUSCI_B_I2C_clearInterrupt
+00010e62 EUSCI_B_I2C_enable
+00010e40 EUSCI_B_I2C_enableInterrupt
+00010ce0 EUSCI_B_I2C_initSlave
+00000140 FRCTL0
+00000141 FRCTL0_H
+00000140 FRCTL0_L
+00000144 GCCTL0
+00000145 GCCTL0_H
+00000144 GCCTL0_L
+00000146 GCCTL1
+00000147 GCCTL1_H
+00000146 GCCTL1_L
+00010ab0 GPIO_setAsInputPin
+00010be8 GPIO_setAsOutputPin
+00010854 GPIO_setAsPeripheralModuleFunctionInputPin
+000108c0 GPIO_setAsPeripheralModuleFunctionOutputPin
+00010d76 GPIO_setOutputHighOnPin
+00010d92 GPIO_setOutputLowOnPin
+00000a80 LEACAP
+00000a82 LEACAPH
+00000a80 LEACAPL
+00000a98 LEACMA
+00000a9a LEACMAH
+00000a98 LEACMAL
+00000a9c LEACMCTL
+00000a9e LEACMCTLH
+00000a9c LEACMCTLL
+00000aa8 LEACMDSTAT
+00000aaa LEACMDSTATH
+00000aa8 LEACMDSTATL
+00000a84 LEACNF0
+00000a86 LEACNF0H
+00000a84 LEACNF0L
+00000a88 LEACNF1
+00000a8a LEACNF1H
+00000a88 LEACNF1L
+00000a8c LEACNF2
+00000a8e LEACNF2H
+00000a8c LEACNF2L
+00000ab4 LEADSTSTAT
+00000ab6 LEADSTSTATH
+00000ab4 LEADSTSTATL
+00000af4 LEAIE
+00000af6 LEAIEH
+00000af4 LEAIEL
+00000af8 LEAIFG
+00000afa LEAIFGH
+00000af8 LEAIFGL
+00000af0 LEAIFGSET
+00000af2 LEAIFGSETH
+00000af0 LEAIFGSETL
+00000afc LEAIV
+00000afe LEAIVH
+00000afc LEAIVL
+00000a90 LEAMB
+00000a92 LEAMBH
+00000a90 LEAMBL
+00000a94 LEAMT
+00000a96 LEAMTH
+00000a94 LEAMTL
+00000ad0 LEAPMCB
+00000ad2 LEAPMCBH
+00000ad0 LEAPMCBL
+00000ac0 LEAPMCTL
+00000ac2 LEAPMCTLH
+00000ac0 LEAPMCTLL
+00000ac4 LEAPMDST
+00000ac6 LEAPMDSTH
+00000ac4 LEAPMDSTL
+00000acc LEAPMS0
+00000ace LEAPMS0H
+00000acc LEAPMS0L
+00000ac8 LEAPMS1
+00000aca LEAPMS1H
+00000ac8 LEAPMS1L
+00000ab0 LEAS0STAT
+00000ab2 LEAS0STATH
+00000ab0 LEAS0STATL
+00000aac LEAS1STAT
+00000aae LEAS1STATH
+00000aac LEAS1STATL
+000004c4 MAC
+000004da MAC32H
+000004db MAC32H_H
+000004da MAC32H_L
+000004d8 MAC32L
+000004d9 MAC32L_H
+000004d8 MAC32L_L
+000004c6 MACS
+000004de MACS32H
+000004df MACS32H_H
+000004de MACS32H_L
+000004dc MACS32L
+000004dd MACS32L_H
+000004dc MACS32L_L
+000004c7 MACS_H
+000004c6 MACS_L
+000004c5 MAC_H
+000004c4 MAC_L
+000005a0 MPUCTL0
+000005a1 MPUCTL0_H
+000005a0 MPUCTL0_L
+000005a2 MPUCTL1
+000005a3 MPUCTL1_H
+000005a2 MPUCTL1_L
+000005aa MPUIPC0
+000005ab MPUIPC0_H
+000005aa MPUIPC0_L
+000005ae MPUIPSEGB1
+000005af MPUIPSEGB1_H
+000005ae MPUIPSEGB1_L
+000005ac MPUIPSEGB2
+000005ad MPUIPSEGB2_H
+000005ac MPUIPSEGB2_L
+000005a8 MPUSAM
+000005a9 MPUSAM_H
+000005a8 MPUSAM_L
+000005a6 MPUSEGB1
+000005a7 MPUSEGB1_H
+000005a6 MPUSEGB1_L
+000005a4 MPUSEGB2
+000005a5 MPUSEGB2_H
+000005a4 MPUSEGB2_L
+000004c0 MPY
+000004ec MPY32CTL0
+000004ed MPY32CTL0_H
+000004ec MPY32CTL0_L
+000004d2 MPY32H
+000004d3 MPY32H_H
+000004d2 MPY32H_L
+000004d0 MPY32L
+000004d1 MPY32L_H
+000004d0 MPY32L_L
+000004c2 MPYS
+000004d6 MPYS32H
+000004d7 MPYS32H_H
+000004d6 MPYS32H_L
+000004d4 MPYS32L
+000004d5 MPYS32L_H
+000004d4 MPYS32L_L
+000004c3 MPYS_H
+000004c2 MPYS_L
+000004c1 MPY_H
+000004c0 MPY_L
+000004c8 OP2
+000004e2 OP2H
+000004e3 OP2H_H
+000004e2 OP2H_L
+000004e0 OP2L
+000004e1 OP2L_H
+000004e0 OP2L_L
+000004c9 OP2_H
+000004c8 OP2_L
+00000204 P1DIR
+0000021a P1IE
+00000218 P1IES
+0000021c P1IFG
+00000200 P1IN
+0000020e P1IV
+0000020f P1IV_H
+0000020e P1IV_L
+00000202 P1OUT
+00000206 P1REN
+0000020a P1SEL0
+0000020c P1SEL1
+00000216 P1SELC
+00000205 P2DIR
+0000021b P2IE
+00000219 P2IES
+0000021d P2IFG
+00000201 P2IN
+0000021e P2IV
+0000021f P2IV_H
+0000021e P2IV_L
+00000203 P2OUT
+00000207 P2REN
+0000020b P2SEL0
+0000020d P2SEL1
+00000217 P2SELC
+00000224 P3DIR
+0000023a P3IE
+00000238 P3IES
+0000023c P3IFG
+00000220 P3IN
+0000022e P3IV
+0000022f P3IV_H
+0000022e P3IV_L
+00000222 P3OUT
+00000226 P3REN
+0000022a P3SEL0
+0000022c P3SEL1
+00000236 P3SELC
+00000225 P4DIR
+0000023b P4IE
+00000239 P4IES
+0000023d P4IFG
+00000221 P4IN
+0000023e P4IV
+0000023f P4IV_H
+0000023e P4IV_L
+00000223 P4OUT
+00000227 P4REN
+0000022b P4SEL0
+0000022d P4SEL1
+00000237 P4SELC
+00000244 P5DIR
+0000025a P5IE
+00000258 P5IES
+0000025c P5IFG
+00000240 P5IN
+0000024e P5IV
+0000024f P5IV_H
+0000024e P5IV_L
+00000242 P5OUT
+00000246 P5REN
+0000024a P5SEL0
+0000024c P5SEL1
+00000256 P5SELC
+00000245 P6DIR
+0000025b P6IE
+00000259 P6IES
+0000025d P6IFG
+00000241 P6IN
+0000025e P6IV
+0000025f P6IV_H
+0000025e P6IV_L
+00000243 P6OUT
+00000247 P6REN
+0000024b P6SEL0
+0000024d P6SEL1
+00000257 P6SELC
+00000264 P7DIR
+0000027a P7IE
+00000278 P7IES
+0000027c P7IFG
+00000260 P7IN
+0000026e P7IV
+0000026f P7IV_H
+0000026e P7IV_L
+00000262 P7OUT
+00000266 P7REN
+0000026a P7SEL0
+0000026c P7SEL1
+00000276 P7SELC
+00000265 P8DIR
+0000027b P8IE
+00000279 P8IES
+0000027d P8IFG
+00000261 P8IN
+0000027e P8IV
+0000027f P8IV_H
+0000027e P8IV_L
+00000263 P8OUT
+00000267 P8REN
+0000026b P8SEL0
+0000026d P8SEL1
+00000277 P8SELC
+00000204 PADIR
+00000205 PADIR_H
+00000204 PADIR_L
+0000021a PAIE
+00000218 PAIES
+00000219 PAIES_H
+00000218 PAIES_L
+0000021b PAIE_H
+0000021a PAIE_L
+0000021c PAIFG
+0000021d PAIFG_H
+0000021c PAIFG_L
+00000200 PAIN
+00000201 PAIN_H
+00000200 PAIN_L
+00000202 PAOUT
+00000203 PAOUT_H
+00000202 PAOUT_L
+00000206 PAREN
+00000207 PAREN_H
+00000206 PAREN_L
+0000020a PASEL0
+0000020b PASEL0_H
+0000020a PASEL0_L
+0000020c PASEL1
+0000020d PASEL1_H
+0000020c PASEL1_L
+00000216 PASELC
+00000217 PASELC_H
+00000216 PASELC_L
+00000224 PBDIR
+00000225 PBDIR_H
+00000224 PBDIR_L
+0000023a PBIE
+00000238 PBIES
+00000239 PBIES_H
+00000238 PBIES_L
+0000023b PBIE_H
+0000023a PBIE_L
+0000023c PBIFG
+0000023d PBIFG_H
+0000023c PBIFG_L
+00000220 PBIN
+00000221 PBIN_H
+00000220 PBIN_L
+00000222 PBOUT
+00000223 PBOUT_H
+00000222 PBOUT_L
+00000226 PBREN
+00000227 PBREN_H
+00000226 PBREN_L
+0000022a PBSEL0
+0000022b PBSEL0_H
+0000022a PBSEL0_L
+0000022c PBSEL1
+0000022d PBSEL1_H
+0000022c PBSEL1_L
+00000236 PBSELC
+00000237 PBSELC_H
+00000236 PBSELC_L
+00000244 PCDIR
+00000245 PCDIR_H
+00000244 PCDIR_L
+0000025a PCIE
+00000258 PCIES
+00000259 PCIES_H
+00000258 PCIES_L
+0000025b PCIE_H
+0000025a PCIE_L
+0000025c PCIFG
+0000025d PCIFG_H
+0000025c PCIFG_L
+00000240 PCIN
+00000241 PCIN_H
+00000240 PCIN_L
+00000242 PCOUT
+00000243 PCOUT_H
+00000242 PCOUT_L
+00000246 PCREN
+00000247 PCREN_H
+00000246 PCREN_L
+0000024a PCSEL0
+0000024b PCSEL0_H
+0000024a PCSEL0_L
+0000024c PCSEL1
+0000024d PCSEL1_H
+0000024c PCSEL1_L
+00000256 PCSELC
+00000257 PCSELC_H
+00000256 PCSELC_L
+00000264 PDDIR
+00000265 PDDIR_H
+00000264 PDDIR_L
+0000027a PDIE
+00000278 PDIES
+00000279 PDIES_H
+00000278 PDIES_L
+0000027b PDIE_H
+0000027a PDIE_L
+0000027c PDIFG
+0000027d PDIFG_H
+0000027c PDIFG_L
+00000260 PDIN
+00000261 PDIN_H
+00000260 PDIN_L
+00000262 PDOUT
+00000263 PDOUT_H
+00000262 PDOUT_L
+00000266 PDREN
+00000267 PDREN_H
+00000266 PDREN_L
+0000026a PDSEL0
+0000026b PDSEL0_H
+0000026a PDSEL0_L
+0000026c PDSEL1
+0000026d PDSEL1_H
+0000026c PDSEL1_L
+00000276 PDSELC
+00000277 PDSELC_H
+00000276 PDSELC_L
+00000324 PJDIR
+00000325 PJDIR_H
+00000324 PJDIR_L
+00000320 PJIN
+00000321 PJIN_H
+00000320 PJIN_L
+00000322 PJOUT
+00000323 PJOUT_H
+00000322 PJOUT_L
+00000326 PJREN
+00000327 PJREN_H
+00000326 PJREN_L
+0000032a PJSEL0
+0000032b PJSEL0_H
+0000032a PJSEL0_L
+0000032c PJSEL1
+0000032d PJSEL1_H
+0000032c PJSEL1_L
+00000336 PJSELC
+00000337 PJSELC_H
+00000336 PJSELC_L
+00000130 PM5CTL0
+00000131 PM5CTL0_H
+00000130 PM5CTL0_L
+00000120 PMMCTL0
+00000121 PMMCTL0_H
+00000120 PMMCTL0_L
+0000012a PMMIFG
+0000012b PMMIFG_H
+0000012a PMMIFG_L
+00000158 RCCTL0
+00000159 RCCTL0_H
+00000158 RCCTL0_L
+000001b0 REFCTL0
+000001b1 REFCTL0_H
+000001b0 REFCTL0_L
+000004e4 RES0
+000004e5 RES0_H
+000004e4 RES0_L
+000004e6 RES1
+000004e7 RES1_H
+000004e6 RES1_L
+000004e8 RES2
+000004e9 RES2_H
+000004e8 RES2_L
+000004ea RES3
+000004eb RES3_H
+000004ea RES3_L
+000004cc RESHI
+000004cd RESHI_H
+000004cc RESHI_L
+000004ca RESLO
+000004cb RESLO_H
+000004ca RESLO_L
+000004ac RT0PS
+000004ad RT1PS
+000004ba RTCADOWDAY
+000004bb RTCADOWDAY_H
+000004ba RTCADOWDAY_L
+000004b8 RTCAMINHR
+000004b9 RTCAMINHR_H
+000004b8 RTCAMINHR_L
+000004b0 RTCCNT1
+000004b0 RTCCNT12
+000004b1 RTCCNT12_H
+000004b0 RTCCNT12_L
+000004b1 RTCCNT2
+000004b2 RTCCNT3
+000004b2 RTCCNT34
+000004b3 RTCCNT34_H
+000004b2 RTCCNT34_L
+000004b3 RTCCNT4
+000004a0 RTCCTL0
+000004a1 RTCCTL0_H
+000004a0 RTCCTL0_L
+000004a2 RTCCTL13
+000004a3 RTCCTL13_H
+000004a2 RTCCTL13_L
+000004b4 RTCDATE
+000004b5 RTCDATE_H
+000004b4 RTCDATE_L
+000004ae RTCIV
+000004af RTCIV_H
+000004ae RTCIV_L
+000004a4 RTCOCAL
+000004a5 RTCOCAL_H
+000004a4 RTCOCAL_L
+000004ac RTCPS
+000004a8 RTCPS0CTL
+000004a9 RTCPS0CTL_H
+000004a8 RTCPS0CTL_L
+000004aa RTCPS1CTL
+000004ab RTCPS1CTL_H
+000004aa RTCPS1CTL_L
+000004ad RTCPS_H
+000004ac RTCPS_L
+000004a6 RTCTCMP
+000004a7 RTCTCMP_H
+000004a6 RTCTCMP_L
+000004b0 RTCTIM0
+000004b1 RTCTIM0_H
+000004b0 RTCTIM0_L
+000004b2 RTCTIM1
+000004b3 RTCTIM1_H
+000004b2 RTCTIM1_L
+000004b6 RTCYEAR
+000004b7 RTCYEAR_H
+000004b6 RTCYEAR_L
+00000100 SFRIE1
+00000101 SFRIE1_H
+00000100 SFRIE1_L
+00000102 SFRIFG1
+00000103 SFRIFG1_H
+00000102 SFRIFG1_L
+00000104 SFRRPCR
+00000105 SFRRPCR_H
+00000104 SFRRPCR_L
+000004ce SUMEXT
+000004cf SUMEXT_H
+000004ce SUMEXT_L
+00000180 SYSCTL
+00000181 SYSCTL_H
+00000180 SYSCTL_L
+00000186 SYSJMBC
+00000187 SYSJMBC_H
+00000186 SYSJMBC_L
+00000188 SYSJMBI0
+00000189 SYSJMBI0_H
+00000188 SYSJMBI0_L
+0000018a SYSJMBI1
+0000018b SYSJMBI1_H
+0000018a SYSJMBI1_L
+0000018c SYSJMBO0
+0000018d SYSJMBO0_H
+0000018c SYSJMBO0_L
+0000018e SYSJMBO1
+0000018f SYSJMBO1_H
+0000018e SYSJMBO1_L
+0000019e SYSRSTIV
+0000019f SYSRSTIV_H
+0000019e SYSRSTIV_L
+0000019c SYSSNIV
+0000019d SYSSNIV_H
+0000019c SYSSNIV_L
+0000019a SYSUNIV
+0000019b SYSUNIV_H
+0000019a SYSUNIV_L
+00000352 TA0CCR0
+00000353 TA0CCR0_H
+00000352 TA0CCR0_L
+00000354 TA0CCR1
+00000355 TA0CCR1_H
+00000354 TA0CCR1_L
+00000356 TA0CCR2
+00000357 TA0CCR2_H
+00000356 TA0CCR2_L
+00000342 TA0CCTL0
+00000343 TA0CCTL0_H
+00000342 TA0CCTL0_L
+00000344 TA0CCTL1
+00000345 TA0CCTL1_H
+00000344 TA0CCTL1_L
+00000346 TA0CCTL2
+00000347 TA0CCTL2_H
+00000346 TA0CCTL2_L
+00000340 TA0CTL
+00000341 TA0CTL_H
+00000340 TA0CTL_L
+00000360 TA0EX0
+00000361 TA0EX0_H
+00000360 TA0EX0_L
+0000036e TA0IV
+0000036f TA0IV_H
+0000036e TA0IV_L
+00000350 TA0R
+00000351 TA0R_H
+00000350 TA0R_L
+00000392 TA1CCR0
+00000393 TA1CCR0_H
+00000392 TA1CCR0_L
+00000394 TA1CCR1
+00000395 TA1CCR1_H
+00000394 TA1CCR1_L
+00000396 TA1CCR2
+00000397 TA1CCR2_H
+00000396 TA1CCR2_L
+00000382 TA1CCTL0
+00000383 TA1CCTL0_H
+00000382 TA1CCTL0_L
+00000384 TA1CCTL1
+00000385 TA1CCTL1_H
+00000384 TA1CCTL1_L
+00000386 TA1CCTL2
+00000387 TA1CCTL2_H
+00000386 TA1CCTL2_L
+00000380 TA1CTL
+00000381 TA1CTL_H
+00000380 TA1CTL_L
+000003a0 TA1EX0
+000003a1 TA1EX0_H
+000003a0 TA1EX0_L
+000003ae TA1IV
+000003af TA1IV_H
+000003ae TA1IV_L
+00000390 TA1R
+00000391 TA1R_H
+00000390 TA1R_L
+00000412 TA2CCR0
+00000413 TA2CCR0_H
+00000412 TA2CCR0_L
+00000414 TA2CCR1
+00000415 TA2CCR1_H
+00000414 TA2CCR1_L
+00000402 TA2CCTL0
+00000403 TA2CCTL0_H
+00000402 TA2CCTL0_L
+00000404 TA2CCTL1
+00000405 TA2CCTL1_H
+00000404 TA2CCTL1_L
+00000400 TA2CTL
+00000401 TA2CTL_H
+00000400 TA2CTL_L
+00000420 TA2EX0
+00000421 TA2EX0_H
+00000420 TA2EX0_L
+0000042e TA2IV
+0000042f TA2IV_H
+0000042e TA2IV_L
+00000410 TA2R
+00000411 TA2R_H
+00000410 TA2R_L
+00000452 TA3CCR0
+00000453 TA3CCR0_H
+00000452 TA3CCR0_L
+00000454 TA3CCR1
+00000455 TA3CCR1_H
+00000454 TA3CCR1_L
+00000442 TA3CCTL0
+00000443 TA3CCTL0_H
+00000442 TA3CCTL0_L
+00000444 TA3CCTL1
+00000445 TA3CCTL1_H
+00000444 TA3CCTL1_L
+00000440 TA3CTL
+00000441 TA3CTL_H
+00000440 TA3CTL_L
+00000460 TA3EX0
+00000461 TA3EX0_H
+00000460 TA3EX0_L
+0000046e TA3IV
+0000046f TA3IV_H
+0000046e TA3IV_L
+00000450 TA3R
+00000451 TA3R_H
+00000450 TA3R_L
+000007d2 TA4CCR0
+000007d3 TA4CCR0_H
+000007d2 TA4CCR0_L
+000007d4 TA4CCR1
+000007d5 TA4CCR1_H
+000007d4 TA4CCR1_L
+000007d6 TA4CCR2
+000007d7 TA4CCR2_H
+000007d6 TA4CCR2_L
+000007c2 TA4CCTL0
+000007c3 TA4CCTL0_H
+000007c2 TA4CCTL0_L
+000007c4 TA4CCTL1
+000007c5 TA4CCTL1_H
+000007c4 TA4CCTL1_L
+000007c6 TA4CCTL2
+000007c7 TA4CCTL2_H
+000007c6 TA4CCTL2_L
+000007c0 TA4CTL
+000007c1 TA4CTL_H
+000007c0 TA4CTL_L
+000007e0 TA4EX0
+000007e1 TA4EX0_H
+000007e0 TA4EX0_L
+000007ee TA4IV
+000007ef TA4IV_H
+000007ee TA4IV_L
+000007d0 TA4R
+000007d1 TA4R_H
+000007d0 TA4R_L
+000003d2 TB0CCR0
+000003d3 TB0CCR0_H
+000003d2 TB0CCR0_L
+000003d4 TB0CCR1
+000003d5 TB0CCR1_H
+000003d4 TB0CCR1_L
+000003d6 TB0CCR2
+000003d7 TB0CCR2_H
+000003d6 TB0CCR2_L
+000003d8 TB0CCR3
+000003d9 TB0CCR3_H
+000003d8 TB0CCR3_L
+000003da TB0CCR4
+000003db TB0CCR4_H
+000003da TB0CCR4_L
+000003dc TB0CCR5
+000003dd TB0CCR5_H
+000003dc TB0CCR5_L
+000003de TB0CCR6
+000003df TB0CCR6_H
+000003de TB0CCR6_L
+000003c2 TB0CCTL0
+000003c3 TB0CCTL0_H
+000003c2 TB0CCTL0_L
+000003c4 TB0CCTL1
+000003c5 TB0CCTL1_H
+000003c4 TB0CCTL1_L
+000003c6 TB0CCTL2
+000003c7 TB0CCTL2_H
+000003c6 TB0CCTL2_L
+000003c8 TB0CCTL3
+000003c9 TB0CCTL3_H
+000003c8 TB0CCTL3_L
+000003ca TB0CCTL4
+000003cb TB0CCTL4_H
+000003ca TB0CCTL4_L
+000003cc TB0CCTL5
+000003cd TB0CCTL5_H
+000003cc TB0CCTL5_L
+000003ce TB0CCTL6
+000003cf TB0CCTL6_H
+000003ce TB0CCTL6_L
+000003c0 TB0CTL
+000003c1 TB0CTL_H
+000003c0 TB0CTL_L
+000003e0 TB0EX0
+000003e1 TB0EX0_H
+000003e0 TB0EX0_L
+000003ee TB0IV
+000003ef TB0IV_H
+000003ee TB0IV_L
+000003d0 TB0R
+000003d1 TB0R_H
+000003d0 TB0R_L
+00001c00 TIMER0_B0_ISR
+00010e58 Timer_B_clearCaptureCompareInterrupt
+00010c20 Timer_B_initCompareMode
+00010768 Timer_B_initUpDownMode
+000005d0 UCA0ABCTL
+000005d1 UCA0ABCTL_H
+000005d0 UCA0ABCTL_L
+000005c6 UCA0BRW
+000005c7 UCA0BRW_H
+000005c6 UCA0BRW_L
+000005c0 UCA0CTLW0
+000005c1 UCA0CTLW0_H
+000005c0 UCA0CTLW0_L
+000005c2 UCA0CTLW1
+000005c3 UCA0CTLW1_H
+000005c2 UCA0CTLW1_L
+000005da UCA0IE
+000005db UCA0IE_H
+000005da UCA0IE_L
+000005dc UCA0IFG
+000005dd UCA0IFG_H
+000005dc UCA0IFG_L
+000005d2 UCA0IRCTL
+000005d3 UCA0IRCTL_H
+000005d2 UCA0IRCTL_L
+000005de UCA0IV
+000005df UCA0IV_H
+000005de UCA0IV_L
+000005c8 UCA0MCTLW
+000005c9 UCA0MCTLW_H
+000005c8 UCA0MCTLW_L
+000005cc UCA0RXBUF
+000005cd UCA0RXBUF_H
+000005cc UCA0RXBUF_L
+000005ca UCA0STATW
+000005cb UCA0STATW_H
+000005ca UCA0STATW_L
+000005ce UCA0TXBUF
+000005cf UCA0TXBUF_H
+000005ce UCA0TXBUF_L
+000005f0 UCA1ABCTL
+000005f1 UCA1ABCTL_H
+000005f0 UCA1ABCTL_L
+000005e6 UCA1BRW
+000005e7 UCA1BRW_H
+000005e6 UCA1BRW_L
+000005e0 UCA1CTLW0
+000005e1 UCA1CTLW0_H
+000005e0 UCA1CTLW0_L
+000005e2 UCA1CTLW1
+000005e3 UCA1CTLW1_H
+000005e2 UCA1CTLW1_L
+000005fa UCA1IE
+000005fb UCA1IE_H
+000005fa UCA1IE_L
+000005fc UCA1IFG
+000005fd UCA1IFG_H
+000005fc UCA1IFG_L
+000005f2 UCA1IRCTL
+000005f3 UCA1IRCTL_H
+000005f2 UCA1IRCTL_L
+000005fe UCA1IV
+000005ff UCA1IV_H
+000005fe UCA1IV_L
+000005e8 UCA1MCTLW
+000005e9 UCA1MCTLW_H
+000005e8 UCA1MCTLW_L
+000005ec UCA1RXBUF
+000005ed UCA1RXBUF_H
+000005ec UCA1RXBUF_L
+000005ea UCA1STATW
+000005eb UCA1STATW_H
+000005ea UCA1STATW_L
+000005ee UCA1TXBUF
+000005ef UCA1TXBUF_H
+000005ee UCA1TXBUF_L
+00000610 UCA2ABCTL
+00000611 UCA2ABCTL_H
+00000610 UCA2ABCTL_L
+00000606 UCA2BRW
+00000607 UCA2BRW_H
+00000606 UCA2BRW_L
+00000600 UCA2CTLW0
+00000601 UCA2CTLW0_H
+00000600 UCA2CTLW0_L
+00000602 UCA2CTLW1
+00000603 UCA2CTLW1_H
+00000602 UCA2CTLW1_L
+0000061a UCA2IE
+0000061b UCA2IE_H
+0000061a UCA2IE_L
+0000061c UCA2IFG
+0000061d UCA2IFG_H
+0000061c UCA2IFG_L
+00000612 UCA2IRCTL
+00000613 UCA2IRCTL_H
+00000612 UCA2IRCTL_L
+0000061e UCA2IV
+0000061f UCA2IV_H
+0000061e UCA2IV_L
+00000608 UCA2MCTLW
+00000609 UCA2MCTLW_H
+00000608 UCA2MCTLW_L
+0000060c UCA2RXBUF
+0000060d UCA2RXBUF_H
+0000060c UCA2RXBUF_L
+0000060a UCA2STATW
+0000060b UCA2STATW_H
+0000060a UCA2STATW_L
+0000060e UCA2TXBUF
+0000060f UCA2TXBUF_H
+0000060e UCA2TXBUF_L
+00000630 UCA3ABCTL
+00000631 UCA3ABCTL_H
+00000630 UCA3ABCTL_L
+00000626 UCA3BRW
+00000627 UCA3BRW_H
+00000626 UCA3BRW_L
+00000620 UCA3CTLW0
+00000621 UCA3CTLW0_H
+00000620 UCA3CTLW0_L
+00000622 UCA3CTLW1
+00000623 UCA3CTLW1_H
+00000622 UCA3CTLW1_L
+0000063a UCA3IE
+0000063b UCA3IE_H
+0000063a UCA3IE_L
+0000063c UCA3IFG
+0000063d UCA3IFG_H
+0000063c UCA3IFG_L
+00000632 UCA3IRCTL
+00000633 UCA3IRCTL_H
+00000632 UCA3IRCTL_L
+0000063e UCA3IV
+0000063f UCA3IV_H
+0000063e UCA3IV_L
+00000628 UCA3MCTLW
+00000629 UCA3MCTLW_H
+00000628 UCA3MCTLW_L
+0000062c UCA3RXBUF
+0000062d UCA3RXBUF_H
+0000062c UCA3RXBUF_L
+0000062a UCA3STATW
+0000062b UCA3STATW_H
+0000062a UCA3STATW_L
+0000062e UCA3TXBUF
+0000062f UCA3TXBUF_H
+0000062e UCA3TXBUF_L
+0000065e UCB0ADDMASK
+0000065f UCB0ADDMASK_H
+0000065e UCB0ADDMASK_L
+0000065c UCB0ADDRX
+0000065d UCB0ADDRX_H
+0000065c UCB0ADDRX_L
+00000646 UCB0BRW
+00000647 UCB0BRW_H
+00000646 UCB0BRW_L
+00000640 UCB0CTLW0
+00000641 UCB0CTLW0_H
+00000640 UCB0CTLW0_L
+00000642 UCB0CTLW1
+00000643 UCB0CTLW1_H
+00000642 UCB0CTLW1_L
+00000654 UCB0I2COA0
+00000655 UCB0I2COA0_H
+00000654 UCB0I2COA0_L
+00000656 UCB0I2COA1
+00000657 UCB0I2COA1_H
+00000656 UCB0I2COA1_L
+00000658 UCB0I2COA2
+00000659 UCB0I2COA2_H
+00000658 UCB0I2COA2_L
+0000065a UCB0I2COA3
+0000065b UCB0I2COA3_H
+0000065a UCB0I2COA3_L
+00000660 UCB0I2CSA
+00000661 UCB0I2CSA_H
+00000660 UCB0I2CSA_L
+0000066a UCB0IE
+0000066b UCB0IE_H
+0000066a UCB0IE_L
+0000066c UCB0IFG
+0000066d UCB0IFG_H
+0000066c UCB0IFG_L
+0000066e UCB0IV
+0000066f UCB0IV_H
+0000066e UCB0IV_L
+0000064c UCB0RXBUF
+0000064d UCB0RXBUF_H
+0000064c UCB0RXBUF_L
+00000648 UCB0STATW
+00000649 UCB0STATW_H
+00000648 UCB0STATW_L
+0000064a UCB0TBCNT
+0000064b UCB0TBCNT_H
+0000064a UCB0TBCNT_L
+0000064e UCB0TXBUF
+0000064f UCB0TXBUF_H
+0000064e UCB0TXBUF_L
+0000069e UCB1ADDMASK
+0000069f UCB1ADDMASK_H
+0000069e UCB1ADDMASK_L
+0000069c UCB1ADDRX
+0000069d UCB1ADDRX_H
+0000069c UCB1ADDRX_L
+00000686 UCB1BRW
+00000687 UCB1BRW_H
+00000686 UCB1BRW_L
+00000680 UCB1CTLW0
+00000681 UCB1CTLW0_H
+00000680 UCB1CTLW0_L
+00000682 UCB1CTLW1
+00000683 UCB1CTLW1_H
+00000682 UCB1CTLW1_L
+00000694 UCB1I2COA0
+00000695 UCB1I2COA0_H
+00000694 UCB1I2COA0_L
+00000696 UCB1I2COA1
+00000697 UCB1I2COA1_H
+00000696 UCB1I2COA1_L
+00000698 UCB1I2COA2
+00000699 UCB1I2COA2_H
+00000698 UCB1I2COA2_L
+0000069a UCB1I2COA3
+0000069b UCB1I2COA3_H
+0000069a UCB1I2COA3_L
+000006a0 UCB1I2CSA
+000006a1 UCB1I2CSA_H
+000006a0 UCB1I2CSA_L
+000006aa UCB1IE
+000006ab UCB1IE_H
+000006aa UCB1IE_L
+000006ac UCB1IFG
+000006ad UCB1IFG_H
+000006ac UCB1IFG_L
+000006ae UCB1IV
+000006af UCB1IV_H
+000006ae UCB1IV_L
+0000068c UCB1RXBUF
+0000068d UCB1RXBUF_H
+0000068c UCB1RXBUF_L
+00000688 UCB1STATW
+00000689 UCB1STATW_H
+00000688 UCB1STATW_L
+0000068a UCB1TBCNT
+0000068b UCB1TBCNT_H
+0000068a UCB1TBCNT_L
+0000068e UCB1TXBUF
+0000068f UCB1TXBUF_H
+0000068e UCB1TXBUF_L
+000006de UCB2ADDMASK
+000006df UCB2ADDMASK_H
+000006de UCB2ADDMASK_L
+000006dc UCB2ADDRX
+000006dd UCB2ADDRX_H
+000006dc UCB2ADDRX_L
+000006c6 UCB2BRW
+000006c7 UCB2BRW_H
+000006c6 UCB2BRW_L
+000006c0 UCB2CTLW0
+000006c1 UCB2CTLW0_H
+000006c0 UCB2CTLW0_L
+000006c2 UCB2CTLW1
+000006c3 UCB2CTLW1_H
+000006c2 UCB2CTLW1_L
+000006d4 UCB2I2COA0
+000006d5 UCB2I2COA0_H
+000006d4 UCB2I2COA0_L
+000006d6 UCB2I2COA1
+000006d7 UCB2I2COA1_H
+000006d6 UCB2I2COA1_L
+000006d8 UCB2I2COA2
+000006d9 UCB2I2COA2_H
+000006d8 UCB2I2COA2_L
+000006da UCB2I2COA3
+000006db UCB2I2COA3_H
+000006da UCB2I2COA3_L
+000006e0 UCB2I2CSA
+000006e1 UCB2I2CSA_H
+000006e0 UCB2I2CSA_L
+000006ea UCB2IE
+000006eb UCB2IE_H
+000006ea UCB2IE_L
+000006ec UCB2IFG
+000006ed UCB2IFG_H
+000006ec UCB2IFG_L
+000006ee UCB2IV
+000006ef UCB2IV_H
+000006ee UCB2IV_L
+000006cc UCB2RXBUF
+000006cd UCB2RXBUF_H
+000006cc UCB2RXBUF_L
+000006c8 UCB2STATW
+000006c9 UCB2STATW_H
+000006c8 UCB2STATW_L
+000006ca UCB2TBCNT
+000006cb UCB2TBCNT_H
+000006ca UCB2TBCNT_L
+000006ce UCB2TXBUF
+000006cf UCB2TXBUF_H
+000006ce UCB2TXBUF_L
+0000071e UCB3ADDMASK
+0000071f UCB3ADDMASK_H
+0000071e UCB3ADDMASK_L
+0000071c UCB3ADDRX
+0000071d UCB3ADDRX_H
+0000071c UCB3ADDRX_L
+00000706 UCB3BRW
+00000707 UCB3BRW_H
+00000706 UCB3BRW_L
+00000700 UCB3CTLW0
+00000701 UCB3CTLW0_H
+00000700 UCB3CTLW0_L
+00000702 UCB3CTLW1
+00000703 UCB3CTLW1_H
+00000702 UCB3CTLW1_L
+00000714 UCB3I2COA0
+00000715 UCB3I2COA0_H
+00000714 UCB3I2COA0_L
+00000716 UCB3I2COA1
+00000717 UCB3I2COA1_H
+00000716 UCB3I2COA1_L
+00000718 UCB3I2COA2
+00000719 UCB3I2COA2_H
+00000718 UCB3I2COA2_L
+0000071a UCB3I2COA3
+0000071b UCB3I2COA3_H
+0000071a UCB3I2COA3_L
+00000720 UCB3I2CSA
+00000721 UCB3I2CSA_H
+00000720 UCB3I2CSA_L
+0000072a UCB3IE
+0000072b UCB3IE_H
+0000072a UCB3IE_L
+0000072c UCB3IFG
+0000072d UCB3IFG_H
+0000072c UCB3IFG_L
+0000072e UCB3IV
+0000072f UCB3IV_H
+0000072e UCB3IV_L
+0000070c UCB3RXBUF
+0000070d UCB3RXBUF_H
+0000070c UCB3RXBUF_L
+00000708 UCB3STATW
+00000709 UCB3STATW_H
+00000708 UCB3STATW_L
+0000070a UCB3TBCNT
+0000070b UCB3TBCNT_H
+0000070a UCB3TBCNT_L
+0000070e UCB3TXBUF
+0000070f UCB3TXBUF_H
+0000070e UCB3TXBUF_L
+000022ca USCI_B0_ISR
+0000015c WDTCTL
+0000015d WDTCTL_H
+0000015c WDTCTL_L
+00010dc6 WDT_A_hold
+00002c00 __STACK_END
+000000a0 __STACK_SIZE
+000048a8 __TI_BINIT_Base
+000048b8 __TI_BINIT_Limit
+00004898 __TI_CINIT_Base
+000048a8 __TI_CINIT_Limit
+00004880 __TI_Handler_Table_Base
+0000488c __TI_Handler_Table_Limit
+00004020 __TI_ISR_TRAP
+00010990 __TI_auto_init_nopinit_hold_wdt
+000107de __TI_decompress_lzss
+00010e04 __TI_decompress_none
+0000ffb4 __TI_int18
+0000ffb6 __TI_int19
+0000ffb8 __TI_int20
+0000ffba __TI_int21
+0000ffbc __TI_int22
+0000ffbe __TI_int23
+0000ffc0 __TI_int24
+0000ffc2 __TI_int25
+0000ffc4 __TI_int26
+0000ffc6 __TI_int27
+0000ffc8 __TI_int28
+0000ffca __TI_int29
+0000ffcc __TI_int30
+0000ffce __TI_int31
+0000ffd0 __TI_int32
+0000ffd2 __TI_int33
+0000ffd4 __TI_int34
+0000ffd6 __TI_int35
+0000ffd8 __TI_int36
+0000ffda __TI_int37
+0000ffdc __TI_int38
+0000ffde __TI_int39
+0000ffe0 __TI_int40
+0000ffe2 __TI_int41
+0000ffe4 __TI_int42
+0000ffe6 __TI_int43
+0000ffe8 __TI_int44
+0000ffea __TI_int45
+0000ffec __TI_int46
+0000ffee __TI_int47
+0000fff0 __TI_int48
+0000fff2 __TI_int49
+0000fff4 __TI_int50
+0000fff6 __TI_int51
+0000fff8 __TI_int52
+0000fffa __TI_int53
+0000fffc __TI_int54
+ffffffff __TI_pprof_out_hndl
+ffffffff __TI_prof_data_size
+ffffffff __TI_prof_data_start
+000048a8 __TI_table_binit
+00010d32 __TI_zero_init_nomemset
+ffffffff __c_args__
+00000001 __mpu_enable
+00010c88 __mpu_init
+00010dae __mspabi_mpyi_f5hw
+00010b68 __mspabi_slll_1
+00010b44 __mspabi_slll_10
+00010b40 __mspabi_slll_11
+00010b3c __mspabi_slll_12
+00010b38 __mspabi_slll_13
+00010b34 __mspabi_slll_14
+00010b30 __mspabi_slll_15
+00010b64 __mspabi_slll_2
+00010b60 __mspabi_slll_3
+00010b5c __mspabi_slll_4
+00010b58 __mspabi_slll_5
+00010b54 __mspabi_slll_6
+00010b50 __mspabi_slll_7
+00010b4c __mspabi_slll_8
+00010b48 __mspabi_slll_9
+00010ba6 __mspabi_srll_1
+00010b82 __mspabi_srll_10
+00010b7e __mspabi_srll_11
+00010b7a __mspabi_srll_12
+00010b76 __mspabi_srll_13
+00010b72 __mspabi_srll_14
+00010b6e __mspabi_srll_15
+00010ba2 __mspabi_srll_2
+00010b9e __mspabi_srll_3
+00010b9a __mspabi_srll_4
+00010b96 __mspabi_srll_5
+00010b92 __mspabi_srll_6
+00010b8e __mspabi_srll_7
+00010b8a __mspabi_srll_8
+00010b86 __mspabi_srll_9
+00004000 _c_int00_noargs_mpu
+0000fffe _reset_vector
+00002b60 _stack
+00010e72 _system_post_cinit
+00010e6e _system_pre_init
+00010e68 abort
+00010ddc copyArray
+000109f6 copy_in
+00010928 currentOffsetCalibration
+00002502 driveOpenLoop
+00004000 fram_ipe_end
+00004000 fram_ipe_start
+00004000 fram_rw_start
+00004000 fram_rx_start
+000024f0 g_calibrating
+000024f1 g_calibrationDone
+000024b2 g_closeLoopThreshold
+000024f2 g_closedLoop
+000024e6 g_cmdState
+000024f3 g_commState
+000024e8 g_controlPrescaler
+000024f4 g_controlRegister
+000024b6 g_currentOffsetPhaseA
+000024ba g_currentOffsetPhaseB
+000024be g_currentOffsetPhaseC
+000024c2 g_currentPhaseA
+000024c6 g_currentPhaseB
+000024ca g_currentPhaseC
+000024ce g_currentPosition
+000024d2 g_currentSpeed
+000024f5 g_faultRegister
+00002494 g_hallMap
+000024d6 g_hallSensor
+00002484 g_i2cCmdLength
+000024f6 g_i2cSlaveAddress
+000024ac g_impulse
+000024f7 g_maxSpeed
+000024f8 g_mod6cnt
+000024f9 g_oldCommState
+000024da g_oldPosition
+000024de g_openLoopTorque
+00002428 g_piCur
+00002456 g_piSpd
+000024fa g_readRegAddr
+0000249c g_rxBuffer
+000024fb g_rxBufferIdx
+000024fc g_rxByteCtr
+000024ea g_slaveMode
+000024ec g_state
+000024fd g_statusRegister
+000024fe g_targetDirection
+000024e2 g_targetPosition
+000024ff g_targetReached
+000024ee g_transmitCurrentPosition
+000024a4 g_txBuffer
+00002500 g_txBufferIdx
+00002501 g_txByteCtr
+00010396 i2cSlaveTransactionDone
+0001044e initializeAdcModule
+00010af2 initializeCmdLength
+000105be initializeGpios
+00010d0a initializeHallInterface
+000106ea initializeI2cModule
+000102be initializePwmModules
+00010000 main
+00010df0 memcpy
+0000a501 mpu_ctl0_value
+00001513 mpu_sam_value
+00000400 mpu_segment_border1
+00000400 mpu_segment_border2
+00010e4c read_driver_fault
+00010cb4 resetPiController
+00010506 updateStateMachine
+
+
+GLOBAL SYMBOLS: SORTED BY Symbol Address
+
+address name
+------- ----
+00000001 __mpu_enable
+000000a0 __STACK_SIZE
+00000100 SFRIE1
+00000100 SFRIE1_L
+00000101 SFRIE1_H
+00000102 SFRIFG1
+00000102 SFRIFG1_L
+00000103 SFRIFG1_H
+00000104 SFRRPCR
+00000104 SFRRPCR_L
+00000105 SFRRPCR_H
+00000120 PMMCTL0
+00000120 PMMCTL0_L
+00000121 PMMCTL0_H
+0000012a PMMIFG
+0000012a PMMIFG_L
+0000012b PMMIFG_H
+00000130 PM5CTL0
+00000130 PM5CTL0_L
+00000131 PM5CTL0_H
+00000140 FRCTL0
+00000140 FRCTL0_L
+00000141 FRCTL0_H
+00000144 GCCTL0
+00000144 GCCTL0_L
+00000145 GCCTL0_H
+00000146 GCCTL1
+00000146 GCCTL1_L
+00000147 GCCTL1_H
+00000150 CRCDI
+00000150 CRCDI_L
+00000151 CRCDI_H
+00000152 CRCDIRB
+00000152 CRCDIRB_L
+00000153 CRCDIRB_H
+00000154 CRCINIRES
+00000154 CRCINIRES_L
+00000155 CRCINIRES_H
+00000156 CRCRESR
+00000156 CRCRESR_L
+00000157 CRCRESR_H
+00000158 RCCTL0
+00000158 RCCTL0_L
+00000159 RCCTL0_H
+0000015c WDTCTL
+0000015c WDTCTL_L
+0000015d WDTCTL_H
+00000160 CSCTL0
+00000160 CSCTL0_L
+00000161 CSCTL0_H
+00000162 CSCTL1
+00000162 CSCTL1_L
+00000163 CSCTL1_H
+00000164 CSCTL2
+00000164 CSCTL2_L
+00000165 CSCTL2_H
+00000166 CSCTL3
+00000166 CSCTL3_L
+00000167 CSCTL3_H
+00000168 CSCTL4
+00000168 CSCTL4_L
+00000169 CSCTL4_H
+0000016a CSCTL5
+0000016a CSCTL5_L
+0000016b CSCTL5_H
+0000016c CSCTL6
+0000016c CSCTL6_L
+0000016d CSCTL6_H
+00000180 SYSCTL
+00000180 SYSCTL_L
+00000181 SYSCTL_H
+00000186 SYSJMBC
+00000186 SYSJMBC_L
+00000187 SYSJMBC_H
+00000188 SYSJMBI0
+00000188 SYSJMBI0_L
+00000189 SYSJMBI0_H
+0000018a SYSJMBI1
+0000018a SYSJMBI1_L
+0000018b SYSJMBI1_H
+0000018c SYSJMBO0
+0000018c SYSJMBO0_L
+0000018d SYSJMBO0_H
+0000018e SYSJMBO1
+0000018e SYSJMBO1_L
+0000018f SYSJMBO1_H
+0000019a SYSUNIV
+0000019a SYSUNIV_L
+0000019b SYSUNIV_H
+0000019c SYSSNIV
+0000019c SYSSNIV_L
+0000019d SYSSNIV_H
+0000019e SYSRSTIV
+0000019e SYSRSTIV_L
+0000019f SYSRSTIV_H
+000001b0 REFCTL0
+000001b0 REFCTL0_L
+000001b1 REFCTL0_H
+00000200 P1IN
+00000200 PAIN
+00000200 PAIN_L
+00000201 P2IN
+00000201 PAIN_H
+00000202 P1OUT
+00000202 PAOUT
+00000202 PAOUT_L
+00000203 P2OUT
+00000203 PAOUT_H
+00000204 P1DIR
+00000204 PADIR
+00000204 PADIR_L
+00000205 P2DIR
+00000205 PADIR_H
+00000206 P1REN
+00000206 PAREN
+00000206 PAREN_L
+00000207 P2REN
+00000207 PAREN_H
+0000020a P1SEL0
+0000020a PASEL0
+0000020a PASEL0_L
+0000020b P2SEL0
+0000020b PASEL0_H
+0000020c P1SEL1
+0000020c PASEL1
+0000020c PASEL1_L
+0000020d P2SEL1
+0000020d PASEL1_H
+0000020e P1IV
+0000020e P1IV_L
+0000020f P1IV_H
+00000216 P1SELC
+00000216 PASELC
+00000216 PASELC_L
+00000217 P2SELC
+00000217 PASELC_H
+00000218 P1IES
+00000218 PAIES
+00000218 PAIES_L
+00000219 P2IES
+00000219 PAIES_H
+0000021a P1IE
+0000021a PAIE
+0000021a PAIE_L
+0000021b P2IE
+0000021b PAIE_H
+0000021c P1IFG
+0000021c PAIFG
+0000021c PAIFG_L
+0000021d P2IFG
+0000021d PAIFG_H
+0000021e P2IV
+0000021e P2IV_L
+0000021f P2IV_H
+00000220 P3IN
+00000220 PBIN
+00000220 PBIN_L
+00000221 P4IN
+00000221 PBIN_H
+00000222 P3OUT
+00000222 PBOUT
+00000222 PBOUT_L
+00000223 P4OUT
+00000223 PBOUT_H
+00000224 P3DIR
+00000224 PBDIR
+00000224 PBDIR_L
+00000225 P4DIR
+00000225 PBDIR_H
+00000226 P3REN
+00000226 PBREN
+00000226 PBREN_L
+00000227 P4REN
+00000227 PBREN_H
+0000022a P3SEL0
+0000022a PBSEL0
+0000022a PBSEL0_L
+0000022b P4SEL0
+0000022b PBSEL0_H
+0000022c P3SEL1
+0000022c PBSEL1
+0000022c PBSEL1_L
+0000022d P4SEL1
+0000022d PBSEL1_H
+0000022e P3IV
+0000022e P3IV_L
+0000022f P3IV_H
+00000236 P3SELC
+00000236 PBSELC
+00000236 PBSELC_L
+00000237 P4SELC
+00000237 PBSELC_H
+00000238 P3IES
+00000238 PBIES
+00000238 PBIES_L
+00000239 P4IES
+00000239 PBIES_H
+0000023a P3IE
+0000023a PBIE
+0000023a PBIE_L
+0000023b P4IE
+0000023b PBIE_H
+0000023c P3IFG
+0000023c PBIFG
+0000023c PBIFG_L
+0000023d P4IFG
+0000023d PBIFG_H
+0000023e P4IV
+0000023e P4IV_L
+0000023f P4IV_H
+00000240 P5IN
+00000240 PCIN
+00000240 PCIN_L
+00000241 P6IN
+00000241 PCIN_H
+00000242 P5OUT
+00000242 PCOUT
+00000242 PCOUT_L
+00000243 P6OUT
+00000243 PCOUT_H
+00000244 P5DIR
+00000244 PCDIR
+00000244 PCDIR_L
+00000245 P6DIR
+00000245 PCDIR_H
+00000246 P5REN
+00000246 PCREN
+00000246 PCREN_L
+00000247 P6REN
+00000247 PCREN_H
+0000024a P5SEL0
+0000024a PCSEL0
+0000024a PCSEL0_L
+0000024b P6SEL0
+0000024b PCSEL0_H
+0000024c P5SEL1
+0000024c PCSEL1
+0000024c PCSEL1_L
+0000024d P6SEL1
+0000024d PCSEL1_H
+0000024e P5IV
+0000024e P5IV_L
+0000024f P5IV_H
+00000256 P5SELC
+00000256 PCSELC
+00000256 PCSELC_L
+00000257 P6SELC
+00000257 PCSELC_H
+00000258 P5IES
+00000258 PCIES
+00000258 PCIES_L
+00000259 P6IES
+00000259 PCIES_H
+0000025a P5IE
+0000025a PCIE
+0000025a PCIE_L
+0000025b P6IE
+0000025b PCIE_H
+0000025c P5IFG
+0000025c PCIFG
+0000025c PCIFG_L
+0000025d P6IFG
+0000025d PCIFG_H
+0000025e P6IV
+0000025e P6IV_L
+0000025f P6IV_H
+00000260 P7IN
+00000260 PDIN
+00000260 PDIN_L
+00000261 P8IN
+00000261 PDIN_H
+00000262 P7OUT
+00000262 PDOUT
+00000262 PDOUT_L
+00000263 P8OUT
+00000263 PDOUT_H
+00000264 P7DIR
+00000264 PDDIR
+00000264 PDDIR_L
+00000265 P8DIR
+00000265 PDDIR_H
+00000266 P7REN
+00000266 PDREN
+00000266 PDREN_L
+00000267 P8REN
+00000267 PDREN_H
+0000026a P7SEL0
+0000026a PDSEL0
+0000026a PDSEL0_L
+0000026b P8SEL0
+0000026b PDSEL0_H
+0000026c P7SEL1
+0000026c PDSEL1
+0000026c PDSEL1_L
+0000026d P8SEL1
+0000026d PDSEL1_H
+0000026e P7IV
+0000026e P7IV_L
+0000026f P7IV_H
+00000276 P7SELC
+00000276 PDSELC
+00000276 PDSELC_L
+00000277 P8SELC
+00000277 PDSELC_H
+00000278 P7IES
+00000278 PDIES
+00000278 PDIES_L
+00000279 P8IES
+00000279 PDIES_H
+0000027a P7IE
+0000027a PDIE
+0000027a PDIE_L
+0000027b P8IE
+0000027b PDIE_H
+0000027c P7IFG
+0000027c PDIFG
+0000027c PDIFG_L
+0000027d P8IFG
+0000027d PDIFG_H
+0000027e P8IV
+0000027e P8IV_L
+0000027f P8IV_H
+00000320 PJIN
+00000320 PJIN_L
+00000321 PJIN_H
+00000322 PJOUT
+00000322 PJOUT_L
+00000323 PJOUT_H
+00000324 PJDIR
+00000324 PJDIR_L
+00000325 PJDIR_H
+00000326 PJREN
+00000326 PJREN_L
+00000327 PJREN_H
+0000032a PJSEL0
+0000032a PJSEL0_L
+0000032b PJSEL0_H
+0000032c PJSEL1
+0000032c PJSEL1_L
+0000032d PJSEL1_H
+00000336 PJSELC
+00000336 PJSELC_L
+00000337 PJSELC_H
+00000340 TA0CTL
+00000340 TA0CTL_L
+00000341 TA0CTL_H
+00000342 TA0CCTL0
+00000342 TA0CCTL0_L
+00000343 TA0CCTL0_H
+00000344 TA0CCTL1
+00000344 TA0CCTL1_L
+00000345 TA0CCTL1_H
+00000346 TA0CCTL2
+00000346 TA0CCTL2_L
+00000347 TA0CCTL2_H
+00000350 TA0R
+00000350 TA0R_L
+00000351 TA0R_H
+00000352 TA0CCR0
+00000352 TA0CCR0_L
+00000353 TA0CCR0_H
+00000354 TA0CCR1
+00000354 TA0CCR1_L
+00000355 TA0CCR1_H
+00000356 TA0CCR2
+00000356 TA0CCR2_L
+00000357 TA0CCR2_H
+00000360 TA0EX0
+00000360 TA0EX0_L
+00000361 TA0EX0_H
+0000036e TA0IV
+0000036e TA0IV_L
+0000036f TA0IV_H
+00000380 TA1CTL
+00000380 TA1CTL_L
+00000381 TA1CTL_H
+00000382 TA1CCTL0
+00000382 TA1CCTL0_L
+00000383 TA1CCTL0_H
+00000384 TA1CCTL1
+00000384 TA1CCTL1_L
+00000385 TA1CCTL1_H
+00000386 TA1CCTL2
+00000386 TA1CCTL2_L
+00000387 TA1CCTL2_H
+00000390 TA1R
+00000390 TA1R_L
+00000391 TA1R_H
+00000392 TA1CCR0
+00000392 TA1CCR0_L
+00000393 TA1CCR0_H
+00000394 TA1CCR1
+00000394 TA1CCR1_L
+00000395 TA1CCR1_H
+00000396 TA1CCR2
+00000396 TA1CCR2_L
+00000397 TA1CCR2_H
+000003a0 TA1EX0
+000003a0 TA1EX0_L
+000003a1 TA1EX0_H
+000003ae TA1IV
+000003ae TA1IV_L
+000003af TA1IV_H
+000003c0 TB0CTL
+000003c0 TB0CTL_L
+000003c1 TB0CTL_H
+000003c2 TB0CCTL0
+000003c2 TB0CCTL0_L
+000003c3 TB0CCTL0_H
+000003c4 TB0CCTL1
+000003c4 TB0CCTL1_L
+000003c5 TB0CCTL1_H
+000003c6 TB0CCTL2
+000003c6 TB0CCTL2_L
+000003c7 TB0CCTL2_H
+000003c8 TB0CCTL3
+000003c8 TB0CCTL3_L
+000003c9 TB0CCTL3_H
+000003ca TB0CCTL4
+000003ca TB0CCTL4_L
+000003cb TB0CCTL4_H
+000003cc TB0CCTL5
+000003cc TB0CCTL5_L
+000003cd TB0CCTL5_H
+000003ce TB0CCTL6
+000003ce TB0CCTL6_L
+000003cf TB0CCTL6_H
+000003d0 TB0R
+000003d0 TB0R_L
+000003d1 TB0R_H
+000003d2 TB0CCR0
+000003d2 TB0CCR0_L
+000003d3 TB0CCR0_H
+000003d4 TB0CCR1
+000003d4 TB0CCR1_L
+000003d5 TB0CCR1_H
+000003d6 TB0CCR2
+000003d6 TB0CCR2_L
+000003d7 TB0CCR2_H
+000003d8 TB0CCR3
+000003d8 TB0CCR3_L
+000003d9 TB0CCR3_H
+000003da TB0CCR4
+000003da TB0CCR4_L
+000003db TB0CCR4_H
+000003dc TB0CCR5
+000003dc TB0CCR5_L
+000003dd TB0CCR5_H
+000003de TB0CCR6
+000003de TB0CCR6_L
+000003df TB0CCR6_H
+000003e0 TB0EX0
+000003e0 TB0EX0_L
+000003e1 TB0EX0_H
+000003ee TB0IV
+000003ee TB0IV_L
+000003ef TB0IV_H
+00000400 TA2CTL
+00000400 TA2CTL_L
+00000400 mpu_segment_border1
+00000400 mpu_segment_border2
+00000401 TA2CTL_H
+00000402 TA2CCTL0
+00000402 TA2CCTL0_L
+00000403 TA2CCTL0_H
+00000404 TA2CCTL1
+00000404 TA2CCTL1_L
+00000405 TA2CCTL1_H
+00000410 TA2R
+00000410 TA2R_L
+00000411 TA2R_H
+00000412 TA2CCR0
+00000412 TA2CCR0_L
+00000413 TA2CCR0_H
+00000414 TA2CCR1
+00000414 TA2CCR1_L
+00000415 TA2CCR1_H
+00000420 TA2EX0
+00000420 TA2EX0_L
+00000421 TA2EX0_H
+0000042e TA2IV
+0000042e TA2IV_L
+0000042f TA2IV_H
+0000043e CAPTIO0CTL
+0000043e CAPTIO0CTL_L
+0000043f CAPTIO0CTL_H
+00000440 TA3CTL
+00000440 TA3CTL_L
+00000441 TA3CTL_H
+00000442 TA3CCTL0
+00000442 TA3CCTL0_L
+00000443 TA3CCTL0_H
+00000444 TA3CCTL1
+00000444 TA3CCTL1_L
+00000445 TA3CCTL1_H
+00000450 TA3R
+00000450 TA3R_L
+00000451 TA3R_H
+00000452 TA3CCR0
+00000452 TA3CCR0_L
+00000453 TA3CCR0_H
+00000454 TA3CCR1
+00000454 TA3CCR1_L
+00000455 TA3CCR1_H
+00000460 TA3EX0
+00000460 TA3EX0_L
+00000461 TA3EX0_H
+0000046e TA3IV
+0000046e TA3IV_L
+0000046f TA3IV_H
+0000047e CAPTIO1CTL
+0000047e CAPTIO1CTL_L
+0000047f CAPTIO1CTL_H
+000004a0 RTCCTL0
+000004a0 RTCCTL0_L
+000004a1 RTCCTL0_H
+000004a2 RTCCTL13
+000004a2 RTCCTL13_L
+000004a3 RTCCTL13_H
+000004a4 RTCOCAL
+000004a4 RTCOCAL_L
+000004a5 RTCOCAL_H
+000004a6 RTCTCMP
+000004a6 RTCTCMP_L
+000004a7 RTCTCMP_H
+000004a8 RTCPS0CTL
+000004a8 RTCPS0CTL_L
+000004a9 RTCPS0CTL_H
+000004aa RTCPS1CTL
+000004aa RTCPS1CTL_L
+000004ab RTCPS1CTL_H
+000004ac RT0PS
+000004ac RTCPS
+000004ac RTCPS_L
+000004ad RT1PS
+000004ad RTCPS_H
+000004ae RTCIV
+000004ae RTCIV_L
+000004af RTCIV_H
+000004b0 RTCCNT1
+000004b0 RTCCNT12
+000004b0 RTCCNT12_L
+000004b0 RTCTIM0
+000004b0 RTCTIM0_L
+000004b1 RTCCNT12_H
+000004b1 RTCCNT2
+000004b1 RTCTIM0_H
+000004b2 RTCCNT3
+000004b2 RTCCNT34
+000004b2 RTCCNT34_L
+000004b2 RTCTIM1
+000004b2 RTCTIM1_L
+000004b3 RTCCNT34_H
+000004b3 RTCCNT4
+000004b3 RTCTIM1_H
+000004b4 RTCDATE
+000004b4 RTCDATE_L
+000004b5 RTCDATE_H
+000004b6 RTCYEAR
+000004b6 RTCYEAR_L
+000004b7 RTCYEAR_H
+000004b8 RTCAMINHR
+000004b8 RTCAMINHR_L
+000004b9 RTCAMINHR_H
+000004ba RTCADOWDAY
+000004ba RTCADOWDAY_L
+000004bb RTCADOWDAY_H
+000004bc BIN2BCD
+000004bc BIN2BCD_L
+000004bd BIN2BCD_H
+000004be BCD2BIN
+000004be BCD2BIN_L
+000004bf BCD2BIN_H
+000004c0 MPY
+000004c0 MPY_L
+000004c1 MPY_H
+000004c2 MPYS
+000004c2 MPYS_L
+000004c3 MPYS_H
+000004c4 MAC
+000004c4 MAC_L
+000004c5 MAC_H
+000004c6 MACS
+000004c6 MACS_L
+000004c7 MACS_H
+000004c8 OP2
+000004c8 OP2_L
+000004c9 OP2_H
+000004ca RESLO
+000004ca RESLO_L
+000004cb RESLO_H
+000004cc RESHI
+000004cc RESHI_L
+000004cd RESHI_H
+000004ce SUMEXT
+000004ce SUMEXT_L
+000004cf SUMEXT_H
+000004d0 MPY32L
+000004d0 MPY32L_L
+000004d1 MPY32L_H
+000004d2 MPY32H
+000004d2 MPY32H_L
+000004d3 MPY32H_H
+000004d4 MPYS32L
+000004d4 MPYS32L_L
+000004d5 MPYS32L_H
+000004d6 MPYS32H
+000004d6 MPYS32H_L
+000004d7 MPYS32H_H
+000004d8 MAC32L
+000004d8 MAC32L_L
+000004d9 MAC32L_H
+000004da MAC32H
+000004da MAC32H_L
+000004db MAC32H_H
+000004dc MACS32L
+000004dc MACS32L_L
+000004dd MACS32L_H
+000004de MACS32H
+000004de MACS32H_L
+000004df MACS32H_H
+000004e0 OP2L
+000004e0 OP2L_L
+000004e1 OP2L_H
+000004e2 OP2H
+000004e2 OP2H_L
+000004e3 OP2H_H
+000004e4 RES0
+000004e4 RES0_L
+000004e5 RES0_H
+000004e6 RES1
+000004e6 RES1_L
+000004e7 RES1_H
+000004e8 RES2
+000004e8 RES2_L
+000004e9 RES2_H
+000004ea RES3
+000004ea RES3_L
+000004eb RES3_H
+000004ec MPY32CTL0
+000004ec MPY32CTL0_L
+000004ed MPY32CTL0_H
+00000500 DMACTL0
+00000500 DMACTL0_L
+00000501 DMACTL0_H
+00000502 DMACTL1
+00000502 DMACTL1_L
+00000503 DMACTL1_H
+00000504 DMACTL2
+00000504 DMACTL2_L
+00000505 DMACTL2_H
+00000508 DMACTL4
+00000508 DMACTL4_L
+00000509 DMACTL4_H
+0000050e DMAIV
+0000050e DMAIV_L
+0000050f DMAIV_H
+00000510 DMA0CTL
+00000510 DMA0CTL_L
+00000511 DMA0CTL_H
+00000512 DMA0SA
+00000512 DMA0SAL
+00000514 DMA0SAH
+00000516 DMA0DA
+00000516 DMA0DAL
+00000518 DMA0DAH
+0000051a DMA0SZ
+0000051a DMA0SZ_L
+0000051b DMA0SZ_H
+00000520 DMA1CTL
+00000520 DMA1CTL_L
+00000521 DMA1CTL_H
+00000522 DMA1SA
+00000522 DMA1SAL
+00000524 DMA1SAH
+00000526 DMA1DA
+00000526 DMA1DAL
+00000528 DMA1DAH
+0000052a DMA1SZ
+0000052a DMA1SZ_L
+0000052b DMA1SZ_H
+00000530 DMA2CTL
+00000530 DMA2CTL_L
+00000531 DMA2CTL_H
+00000532 DMA2SA
+00000532 DMA2SAL
+00000534 DMA2SAH
+00000536 DMA2DA
+00000536 DMA2DAL
+00000538 DMA2DAH
+0000053a DMA2SZ
+0000053a DMA2SZ_L
+0000053b DMA2SZ_H
+00000540 DMA3CTL
+00000540 DMA3CTL_L
+00000541 DMA3CTL_H
+00000542 DMA3SA
+00000542 DMA3SAL
+00000544 DMA3SAH
+00000546 DMA3DA
+00000546 DMA3DAL
+00000548 DMA3DAH
+0000054a DMA3SZ
+0000054a DMA3SZ_L
+0000054b DMA3SZ_H
+00000550 DMA4CTL
+00000550 DMA4CTL_L
+00000551 DMA4CTL_H
+00000552 DMA4SA
+00000552 DMA4SAL
+00000554 DMA4SAH
+00000556 DMA4DA
+00000556 DMA4DAL
+00000558 DMA4DAH
+0000055a DMA4SZ
+0000055a DMA4SZ_L
+0000055b DMA4SZ_H
+00000560 DMA5CTL
+00000560 DMA5CTL_L
+00000561 DMA5CTL_H
+00000562 DMA5SA
+00000562 DMA5SAL
+00000564 DMA5SAH
+00000566 DMA5DA
+00000566 DMA5DAL
+00000568 DMA5DAH
+0000056a DMA5SZ
+0000056a DMA5SZ_L
+0000056b DMA5SZ_H
+000005a0 MPUCTL0
+000005a0 MPUCTL0_L
+000005a1 MPUCTL0_H
+000005a2 MPUCTL1
+000005a2 MPUCTL1_L
+000005a3 MPUCTL1_H
+000005a4 MPUSEGB2
+000005a4 MPUSEGB2_L
+000005a5 MPUSEGB2_H
+000005a6 MPUSEGB1
+000005a6 MPUSEGB1_L
+000005a7 MPUSEGB1_H
+000005a8 MPUSAM
+000005a8 MPUSAM_L
+000005a9 MPUSAM_H
+000005aa MPUIPC0
+000005aa MPUIPC0_L
+000005ab MPUIPC0_H
+000005ac MPUIPSEGB2
+000005ac MPUIPSEGB2_L
+000005ad MPUIPSEGB2_H
+000005ae MPUIPSEGB1
+000005ae MPUIPSEGB1_L
+000005af MPUIPSEGB1_H
+000005c0 UCA0CTLW0
+000005c0 UCA0CTLW0_L
+000005c1 UCA0CTLW0_H
+000005c2 UCA0CTLW1
+000005c2 UCA0CTLW1_L
+000005c3 UCA0CTLW1_H
+000005c6 UCA0BRW
+000005c6 UCA0BRW_L
+000005c7 UCA0BRW_H
+000005c8 UCA0MCTLW
+000005c8 UCA0MCTLW_L
+000005c9 UCA0MCTLW_H
+000005ca UCA0STATW
+000005ca UCA0STATW_L
+000005cb UCA0STATW_H
+000005cc UCA0RXBUF
+000005cc UCA0RXBUF_L
+000005cd UCA0RXBUF_H
+000005ce UCA0TXBUF
+000005ce UCA0TXBUF_L
+000005cf UCA0TXBUF_H
+000005d0 UCA0ABCTL
+000005d0 UCA0ABCTL_L
+000005d1 UCA0ABCTL_H
+000005d2 UCA0IRCTL
+000005d2 UCA0IRCTL_L
+000005d3 UCA0IRCTL_H
+000005da UCA0IE
+000005da UCA0IE_L
+000005db UCA0IE_H
+000005dc UCA0IFG
+000005dc UCA0IFG_L
+000005dd UCA0IFG_H
+000005de UCA0IV
+000005de UCA0IV_L
+000005df UCA0IV_H
+000005e0 UCA1CTLW0
+000005e0 UCA1CTLW0_L
+000005e1 UCA1CTLW0_H
+000005e2 UCA1CTLW1
+000005e2 UCA1CTLW1_L
+000005e3 UCA1CTLW1_H
+000005e6 UCA1BRW
+000005e6 UCA1BRW_L
+000005e7 UCA1BRW_H
+000005e8 UCA1MCTLW
+000005e8 UCA1MCTLW_L
+000005e9 UCA1MCTLW_H
+000005ea UCA1STATW
+000005ea UCA1STATW_L
+000005eb UCA1STATW_H
+000005ec UCA1RXBUF
+000005ec UCA1RXBUF_L
+000005ed UCA1RXBUF_H
+000005ee UCA1TXBUF
+000005ee UCA1TXBUF_L
+000005ef UCA1TXBUF_H
+000005f0 UCA1ABCTL
+000005f0 UCA1ABCTL_L
+000005f1 UCA1ABCTL_H
+000005f2 UCA1IRCTL
+000005f2 UCA1IRCTL_L
+000005f3 UCA1IRCTL_H
+000005fa UCA1IE
+000005fa UCA1IE_L
+000005fb UCA1IE_H
+000005fc UCA1IFG
+000005fc UCA1IFG_L
+000005fd UCA1IFG_H
+000005fe UCA1IV
+000005fe UCA1IV_L
+000005ff UCA1IV_H
+00000600 UCA2CTLW0
+00000600 UCA2CTLW0_L
+00000601 UCA2CTLW0_H
+00000602 UCA2CTLW1
+00000602 UCA2CTLW1_L
+00000603 UCA2CTLW1_H
+00000606 UCA2BRW
+00000606 UCA2BRW_L
+00000607 UCA2BRW_H
+00000608 UCA2MCTLW
+00000608 UCA2MCTLW_L
+00000609 UCA2MCTLW_H
+0000060a UCA2STATW
+0000060a UCA2STATW_L
+0000060b UCA2STATW_H
+0000060c UCA2RXBUF
+0000060c UCA2RXBUF_L
+0000060d UCA2RXBUF_H
+0000060e UCA2TXBUF
+0000060e UCA2TXBUF_L
+0000060f UCA2TXBUF_H
+00000610 UCA2ABCTL
+00000610 UCA2ABCTL_L
+00000611 UCA2ABCTL_H
+00000612 UCA2IRCTL
+00000612 UCA2IRCTL_L
+00000613 UCA2IRCTL_H
+0000061a UCA2IE
+0000061a UCA2IE_L
+0000061b UCA2IE_H
+0000061c UCA2IFG
+0000061c UCA2IFG_L
+0000061d UCA2IFG_H
+0000061e UCA2IV
+0000061e UCA2IV_L
+0000061f UCA2IV_H
+00000620 UCA3CTLW0
+00000620 UCA3CTLW0_L
+00000621 UCA3CTLW0_H
+00000622 UCA3CTLW1
+00000622 UCA3CTLW1_L
+00000623 UCA3CTLW1_H
+00000626 UCA3BRW
+00000626 UCA3BRW_L
+00000627 UCA3BRW_H
+00000628 UCA3MCTLW
+00000628 UCA3MCTLW_L
+00000629 UCA3MCTLW_H
+0000062a UCA3STATW
+0000062a UCA3STATW_L
+0000062b UCA3STATW_H
+0000062c UCA3RXBUF
+0000062c UCA3RXBUF_L
+0000062d UCA3RXBUF_H
+0000062e UCA3TXBUF
+0000062e UCA3TXBUF_L
+0000062f UCA3TXBUF_H
+00000630 UCA3ABCTL
+00000630 UCA3ABCTL_L
+00000631 UCA3ABCTL_H
+00000632 UCA3IRCTL
+00000632 UCA3IRCTL_L
+00000633 UCA3IRCTL_H
+0000063a UCA3IE
+0000063a UCA3IE_L
+0000063b UCA3IE_H
+0000063c UCA3IFG
+0000063c UCA3IFG_L
+0000063d UCA3IFG_H
+0000063e UCA3IV
+0000063e UCA3IV_L
+0000063f UCA3IV_H
+00000640 UCB0CTLW0
+00000640 UCB0CTLW0_L
+00000641 UCB0CTLW0_H
+00000642 UCB0CTLW1
+00000642 UCB0CTLW1_L
+00000643 UCB0CTLW1_H
+00000646 UCB0BRW
+00000646 UCB0BRW_L
+00000647 UCB0BRW_H
+00000648 UCB0STATW
+00000648 UCB0STATW_L
+00000649 UCB0STATW_H
+0000064a UCB0TBCNT
+0000064a UCB0TBCNT_L
+0000064b UCB0TBCNT_H
+0000064c UCB0RXBUF
+0000064c UCB0RXBUF_L
+0000064d UCB0RXBUF_H
+0000064e UCB0TXBUF
+0000064e UCB0TXBUF_L
+0000064f UCB0TXBUF_H
+00000654 UCB0I2COA0
+00000654 UCB0I2COA0_L
+00000655 UCB0I2COA0_H
+00000656 UCB0I2COA1
+00000656 UCB0I2COA1_L
+00000657 UCB0I2COA1_H
+00000658 UCB0I2COA2
+00000658 UCB0I2COA2_L
+00000659 UCB0I2COA2_H
+0000065a UCB0I2COA3
+0000065a UCB0I2COA3_L
+0000065b UCB0I2COA3_H
+0000065c UCB0ADDRX
+0000065c UCB0ADDRX_L
+0000065d UCB0ADDRX_H
+0000065e UCB0ADDMASK
+0000065e UCB0ADDMASK_L
+0000065f UCB0ADDMASK_H
+00000660 UCB0I2CSA
+00000660 UCB0I2CSA_L
+00000661 UCB0I2CSA_H
+0000066a UCB0IE
+0000066a UCB0IE_L
+0000066b UCB0IE_H
+0000066c UCB0IFG
+0000066c UCB0IFG_L
+0000066d UCB0IFG_H
+0000066e UCB0IV
+0000066e UCB0IV_L
+0000066f UCB0IV_H
+00000680 UCB1CTLW0
+00000680 UCB1CTLW0_L
+00000681 UCB1CTLW0_H
+00000682 UCB1CTLW1
+00000682 UCB1CTLW1_L
+00000683 UCB1CTLW1_H
+00000686 UCB1BRW
+00000686 UCB1BRW_L
+00000687 UCB1BRW_H
+00000688 UCB1STATW
+00000688 UCB1STATW_L
+00000689 UCB1STATW_H
+0000068a UCB1TBCNT
+0000068a UCB1TBCNT_L
+0000068b UCB1TBCNT_H
+0000068c UCB1RXBUF
+0000068c UCB1RXBUF_L
+0000068d UCB1RXBUF_H
+0000068e UCB1TXBUF
+0000068e UCB1TXBUF_L
+0000068f UCB1TXBUF_H
+00000694 UCB1I2COA0
+00000694 UCB1I2COA0_L
+00000695 UCB1I2COA0_H
+00000696 UCB1I2COA1
+00000696 UCB1I2COA1_L
+00000697 UCB1I2COA1_H
+00000698 UCB1I2COA2
+00000698 UCB1I2COA2_L
+00000699 UCB1I2COA2_H
+0000069a UCB1I2COA3
+0000069a UCB1I2COA3_L
+0000069b UCB1I2COA3_H
+0000069c UCB1ADDRX
+0000069c UCB1ADDRX_L
+0000069d UCB1ADDRX_H
+0000069e UCB1ADDMASK
+0000069e UCB1ADDMASK_L
+0000069f UCB1ADDMASK_H
+000006a0 UCB1I2CSA
+000006a0 UCB1I2CSA_L
+000006a1 UCB1I2CSA_H
+000006aa UCB1IE
+000006aa UCB1IE_L
+000006ab UCB1IE_H
+000006ac UCB1IFG
+000006ac UCB1IFG_L
+000006ad UCB1IFG_H
+000006ae UCB1IV
+000006ae UCB1IV_L
+000006af UCB1IV_H
+000006c0 UCB2CTLW0
+000006c0 UCB2CTLW0_L
+000006c1 UCB2CTLW0_H
+000006c2 UCB2CTLW1
+000006c2 UCB2CTLW1_L
+000006c3 UCB2CTLW1_H
+000006c6 UCB2BRW
+000006c6 UCB2BRW_L
+000006c7 UCB2BRW_H
+000006c8 UCB2STATW
+000006c8 UCB2STATW_L
+000006c9 UCB2STATW_H
+000006ca UCB2TBCNT
+000006ca UCB2TBCNT_L
+000006cb UCB2TBCNT_H
+000006cc UCB2RXBUF
+000006cc UCB2RXBUF_L
+000006cd UCB2RXBUF_H
+000006ce UCB2TXBUF
+000006ce UCB2TXBUF_L
+000006cf UCB2TXBUF_H
+000006d4 UCB2I2COA0
+000006d4 UCB2I2COA0_L
+000006d5 UCB2I2COA0_H
+000006d6 UCB2I2COA1
+000006d6 UCB2I2COA1_L
+000006d7 UCB2I2COA1_H
+000006d8 UCB2I2COA2
+000006d8 UCB2I2COA2_L
+000006d9 UCB2I2COA2_H
+000006da UCB2I2COA3
+000006da UCB2I2COA3_L
+000006db UCB2I2COA3_H
+000006dc UCB2ADDRX
+000006dc UCB2ADDRX_L
+000006dd UCB2ADDRX_H
+000006de UCB2ADDMASK
+000006de UCB2ADDMASK_L
+000006df UCB2ADDMASK_H
+000006e0 UCB2I2CSA
+000006e0 UCB2I2CSA_L
+000006e1 UCB2I2CSA_H
+000006ea UCB2IE
+000006ea UCB2IE_L
+000006eb UCB2IE_H
+000006ec UCB2IFG
+000006ec UCB2IFG_L
+000006ed UCB2IFG_H
+000006ee UCB2IV
+000006ee UCB2IV_L
+000006ef UCB2IV_H
+00000700 UCB3CTLW0
+00000700 UCB3CTLW0_L
+00000701 UCB3CTLW0_H
+00000702 UCB3CTLW1
+00000702 UCB3CTLW1_L
+00000703 UCB3CTLW1_H
+00000706 UCB3BRW
+00000706 UCB3BRW_L
+00000707 UCB3BRW_H
+00000708 UCB3STATW
+00000708 UCB3STATW_L
+00000709 UCB3STATW_H
+0000070a UCB3TBCNT
+0000070a UCB3TBCNT_L
+0000070b UCB3TBCNT_H
+0000070c UCB3RXBUF
+0000070c UCB3RXBUF_L
+0000070d UCB3RXBUF_H
+0000070e UCB3TXBUF
+0000070e UCB3TXBUF_L
+0000070f UCB3TXBUF_H
+00000714 UCB3I2COA0
+00000714 UCB3I2COA0_L
+00000715 UCB3I2COA0_H
+00000716 UCB3I2COA1
+00000716 UCB3I2COA1_L
+00000717 UCB3I2COA1_H
+00000718 UCB3I2COA2
+00000718 UCB3I2COA2_L
+00000719 UCB3I2COA2_H
+0000071a UCB3I2COA3
+0000071a UCB3I2COA3_L
+0000071b UCB3I2COA3_H
+0000071c UCB3ADDRX
+0000071c UCB3ADDRX_L
+0000071d UCB3ADDRX_H
+0000071e UCB3ADDMASK
+0000071e UCB3ADDMASK_L
+0000071f UCB3ADDMASK_H
+00000720 UCB3I2CSA
+00000720 UCB3I2CSA_L
+00000721 UCB3I2CSA_H
+0000072a UCB3IE
+0000072a UCB3IE_L
+0000072b UCB3IE_H
+0000072c UCB3IFG
+0000072c UCB3IFG_L
+0000072d UCB3IFG_H
+0000072e UCB3IV
+0000072e UCB3IV_L
+0000072f UCB3IV_H
+000007c0 TA4CTL
+000007c0 TA4CTL_L
+000007c1 TA4CTL_H
+000007c2 TA4CCTL0
+000007c2 TA4CCTL0_L
+000007c3 TA4CCTL0_H
+000007c4 TA4CCTL1
+000007c4 TA4CCTL1_L
+000007c5 TA4CCTL1_H
+000007c6 TA4CCTL2
+000007c6 TA4CCTL2_L
+000007c7 TA4CCTL2_H
+000007d0 TA4R
+000007d0 TA4R_L
+000007d1 TA4R_H
+000007d2 TA4CCR0
+000007d2 TA4CCR0_L
+000007d3 TA4CCR0_H
+000007d4 TA4CCR1
+000007d4 TA4CCR1_L
+000007d5 TA4CCR1_H
+000007d6 TA4CCR2
+000007d6 TA4CCR2_L
+000007d7 TA4CCR2_H
+000007e0 TA4EX0
+000007e0 TA4EX0_L
+000007e1 TA4EX0_H
+000007ee TA4IV
+000007ee TA4IV_L
+000007ef TA4IV_H
+00000800 ADC12CTL0
+00000800 ADC12CTL0_L
+00000801 ADC12CTL0_H
+00000802 ADC12CTL1
+00000802 ADC12CTL1_L
+00000803 ADC12CTL1_H
+00000804 ADC12CTL2
+00000804 ADC12CTL2_L
+00000805 ADC12CTL2_H
+00000806 ADC12CTL3
+00000806 ADC12CTL3_L
+00000807 ADC12CTL3_H
+00000808 ADC12LO
+00000808 ADC12LO_L
+00000809 ADC12LO_H
+0000080a ADC12HI
+0000080a ADC12HI_L
+0000080b ADC12HI_H
+0000080c ADC12IFGR0
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+0000080e ADC12IFGR1
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+0000080f ADC12IFGR1_H
+00000810 ADC12IFGR2
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+00000811 ADC12IFGR2_H
+00000812 ADC12IER0
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+00000813 ADC12IER0_H
+00000814 ADC12IER1
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+00000815 ADC12IER1_H
+00000816 ADC12IER2
+00000816 ADC12IER2_L
+00000817 ADC12IER2_H
+00000818 ADC12IV
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+00000819 ADC12IV_H
+00000820 ADC12MCTL0
+00000820 ADC12MCTL0_L
+00000821 ADC12MCTL0_H
+00000822 ADC12MCTL1
+00000822 ADC12MCTL1_L
+00000823 ADC12MCTL1_H
+00000824 ADC12MCTL2
+00000824 ADC12MCTL2_L
+00000825 ADC12MCTL2_H
+00000826 ADC12MCTL3
+00000826 ADC12MCTL3_L
+00000827 ADC12MCTL3_H
+00000828 ADC12MCTL4
+00000828 ADC12MCTL4_L
+00000829 ADC12MCTL4_H
+0000082a ADC12MCTL5
+0000082a ADC12MCTL5_L
+0000082b ADC12MCTL5_H
+0000082c ADC12MCTL6
+0000082c ADC12MCTL6_L
+0000082d ADC12MCTL6_H
+0000082e ADC12MCTL7
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+0000082f ADC12MCTL7_H
+00000830 ADC12MCTL8
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+00000831 ADC12MCTL8_H
+00000832 ADC12MCTL9
+00000832 ADC12MCTL9_L
+00000833 ADC12MCTL9_H
+00000834 ADC12MCTL10
+00000834 ADC12MCTL10_L
+00000835 ADC12MCTL10_H
+00000836 ADC12MCTL11
+00000836 ADC12MCTL11_L
+00000837 ADC12MCTL11_H
+00000838 ADC12MCTL12
+00000838 ADC12MCTL12_L
+00000839 ADC12MCTL12_H
+0000083a ADC12MCTL13
+0000083a ADC12MCTL13_L
+0000083b ADC12MCTL13_H
+0000083c ADC12MCTL14
+0000083c ADC12MCTL14_L
+0000083d ADC12MCTL14_H
+0000083e ADC12MCTL15
+0000083e ADC12MCTL15_L
+0000083f ADC12MCTL15_H
+00000840 ADC12MCTL16
+00000840 ADC12MCTL16_L
+00000841 ADC12MCTL16_H
+00000842 ADC12MCTL17
+00000842 ADC12MCTL17_L
+00000843 ADC12MCTL17_H
+00000844 ADC12MCTL18
+00000844 ADC12MCTL18_L
+00000845 ADC12MCTL18_H
+00000846 ADC12MCTL19
+00000846 ADC12MCTL19_L
+00000847 ADC12MCTL19_H
+00000848 ADC12MCTL20
+00000848 ADC12MCTL20_L
+00000849 ADC12MCTL20_H
+0000084a ADC12MCTL21
+0000084a ADC12MCTL21_L
+0000084b ADC12MCTL21_H
+0000084c ADC12MCTL22
+0000084c ADC12MCTL22_L
+0000084d ADC12MCTL22_H
+0000084e ADC12MCTL23
+0000084e ADC12MCTL23_L
+0000084f ADC12MCTL23_H
+00000850 ADC12MCTL24
+00000850 ADC12MCTL24_L
+00000851 ADC12MCTL24_H
+00000852 ADC12MCTL25
+00000852 ADC12MCTL25_L
+00000853 ADC12MCTL25_H
+00000854 ADC12MCTL26
+00000854 ADC12MCTL26_L
+00000855 ADC12MCTL26_H
+00000856 ADC12MCTL27
+00000856 ADC12MCTL27_L
+00000857 ADC12MCTL27_H
+00000858 ADC12MCTL28
+00000858 ADC12MCTL28_L
+00000859 ADC12MCTL28_H
+0000085a ADC12MCTL29
+0000085a ADC12MCTL29_L
+0000085b ADC12MCTL29_H
+0000085c ADC12MCTL30
+0000085c ADC12MCTL30_L
+0000085d ADC12MCTL30_H
+0000085e ADC12MCTL31
+0000085e ADC12MCTL31_L
+0000085f ADC12MCTL31_H
+00000860 ADC12MEM0
+00000860 ADC12MEM0_L
+00000861 ADC12MEM0_H
+00000862 ADC12MEM1
+00000862 ADC12MEM1_L
+00000863 ADC12MEM1_H
+00000864 ADC12MEM2
+00000864 ADC12MEM2_L
+00000865 ADC12MEM2_H
+00000866 ADC12MEM3
+00000866 ADC12MEM3_L
+00000867 ADC12MEM3_H
+00000868 ADC12MEM4
+00000868 ADC12MEM4_L
+00000869 ADC12MEM4_H
+0000086a ADC12MEM5
+0000086a ADC12MEM5_L
+0000086b ADC12MEM5_H
+0000086c ADC12MEM6
+0000086c ADC12MEM6_L
+0000086d ADC12MEM6_H
+0000086e ADC12MEM7
+0000086e ADC12MEM7_L
+0000086f ADC12MEM7_H
+00000870 ADC12MEM8
+00000870 ADC12MEM8_L
+00000871 ADC12MEM8_H
+00000872 ADC12MEM9
+00000872 ADC12MEM9_L
+00000873 ADC12MEM9_H
+00000874 ADC12MEM10
+00000874 ADC12MEM10_L
+00000875 ADC12MEM10_H
+00000876 ADC12MEM11
+00000876 ADC12MEM11_L
+00000877 ADC12MEM11_H
+00000878 ADC12MEM12
+00000878 ADC12MEM12_L
+00000879 ADC12MEM12_H
+0000087a ADC12MEM13
+0000087a ADC12MEM13_L
+0000087b ADC12MEM13_H
+0000087c ADC12MEM14
+0000087c ADC12MEM14_L
+0000087d ADC12MEM14_H
+0000087e ADC12MEM15
+0000087e ADC12MEM15_L
+0000087f ADC12MEM15_H
+00000880 ADC12MEM16
+00000880 ADC12MEM16_L
+00000881 ADC12MEM16_H
+00000882 ADC12MEM17
+00000882 ADC12MEM17_L
+00000883 ADC12MEM17_H
+00000884 ADC12MEM18
+00000884 ADC12MEM18_L
+00000885 ADC12MEM18_H
+00000886 ADC12MEM19
+00000886 ADC12MEM19_L
+00000887 ADC12MEM19_H
+00000888 ADC12MEM20
+00000888 ADC12MEM20_L
+00000889 ADC12MEM20_H
+0000088a ADC12MEM21
+0000088a ADC12MEM21_L
+0000088b ADC12MEM21_H
+0000088c ADC12MEM22
+0000088c ADC12MEM22_L
+0000088d ADC12MEM22_H
+0000088e ADC12MEM23
+0000088e ADC12MEM23_L
+0000088f ADC12MEM23_H
+00000890 ADC12MEM24
+00000890 ADC12MEM24_L
+00000891 ADC12MEM24_H
+00000892 ADC12MEM25
+00000892 ADC12MEM25_L
+00000893 ADC12MEM25_H
+00000894 ADC12MEM26
+00000894 ADC12MEM26_L
+00000895 ADC12MEM26_H
+00000896 ADC12MEM27
+00000896 ADC12MEM27_L
+00000897 ADC12MEM27_H
+00000898 ADC12MEM28
+00000898 ADC12MEM28_L
+00000899 ADC12MEM28_H
+0000089a ADC12MEM29
+0000089a ADC12MEM29_L
+0000089b ADC12MEM29_H
+0000089c ADC12MEM30
+0000089c ADC12MEM30_L
+0000089d ADC12MEM30_H
+0000089e ADC12MEM31
+0000089e ADC12MEM31_L
+0000089f ADC12MEM31_H
+000008c0 CECTL0
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+000008cc CEINT
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+00000980 CRC32DIW0
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+00000984 CRC32DIRBW1
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+00000986 CRC32DIRBW0
+00000986 CRC32DIRBW0_L
+00000987 CRC32DIRBW0_H
+00000988 CRC32INIRESW0
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+00000989 CRC32INIRESW0_H
+0000098a CRC32INIRESW1
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+0000098c CRC32RESRW1
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+00000990 CRC16DIW0
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+0000099e CRC16RESRW0
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+000009c0 AESACTL0
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+000009c4 AESASTAT_L
+000009c5 AESASTAT_H
+000009c6 AESAKEY
+000009c6 AESAKEY_L
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+000009c8 AESADIN
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+000009c9 AESADIN_H
+000009ca AESADOUT
+000009ca AESADOUT_L
+000009cb AESADOUT_H
+000009cc AESAXDIN
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+000009cf AESAXIN_H
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+00000a90 LEAMB
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+00000a94 LEAMTL
+00000a96 LEAMTH
+00000a98 LEACMA
+00000a98 LEACMAL
+00000a9a LEACMAH
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+00000a9c LEACMCTLL
+00000a9e LEACMCTLH
+00000aa8 LEACMDSTAT
+00000aa8 LEACMDSTATL
+00000aaa LEACMDSTATH
+00000aac LEAS1STAT
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+00000aae LEAS1STATH
+00000ab0 LEAS0STAT
+00000ab0 LEAS0STATL
+00000ab2 LEAS0STATH
+00000ab4 LEADSTSTAT
+00000ab4 LEADSTSTATL
+00000ab6 LEADSTSTATH
+00000ac0 LEAPMCTL
+00000ac0 LEAPMCTLL
+00000ac2 LEAPMCTLH
+00000ac4 LEAPMDST
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+00000ac8 LEAPMS1
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+00000ad2 LEAPMCBH
+00000af0 LEAIFGSET
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+00000af2 LEAIFGSETH
+00000af4 LEAIE
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+00001513 mpu_sam_value
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+000024be g_currentOffsetPhaseC
+000024c2 g_currentPhaseA
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+000024ca g_currentPhaseC
+000024ce g_currentPosition
+000024d2 g_currentSpeed
+000024d6 g_hallSensor
+000024da g_oldPosition
+000024de g_openLoopTorque
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+000024ea g_slaveMode
+000024ec g_state
+000024ee g_transmitCurrentPosition
+000024f0 g_calibrating
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+000024f7 g_maxSpeed
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+000024fa g_readRegAddr
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+000024fd g_statusRegister
+000024fe g_targetDirection
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+00004000 fram_ipe_end
+00004000 fram_ipe_start
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+0000fffa __TI_int53
+0000fffc __TI_int54
+0000fffe _reset_vector
+00010000 main
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+000102be initializePwmModules
+00010396 i2cSlaveTransactionDone
+0001044e initializeAdcModule
+00010506 updateStateMachine
+000105be initializeGpios
+00010662 ADC12_B_init
+000106ea initializeI2cModule
+00010768 Timer_B_initUpDownMode
+000107de __TI_decompress_lzss
+00010854 GPIO_setAsPeripheralModuleFunctionInputPin
+000108c0 GPIO_setAsPeripheralModuleFunctionOutputPin
+00010928 currentOffsetCalibration
+00010990 __TI_auto_init_nopinit_hold_wdt
+000109f6 copy_in
+00010a5a CS_initClockSignal
+00010ab0 GPIO_setAsInputPin
+00010af2 initializeCmdLength
+00010b30 __mspabi_slll_15
+00010b34 __mspabi_slll_14
+00010b38 __mspabi_slll_13
+00010b3c __mspabi_slll_12
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+00010b44 __mspabi_slll_10
+00010b48 __mspabi_slll_9
+00010b4c __mspabi_slll_8
+00010b50 __mspabi_slll_7
+00010b54 __mspabi_slll_6
+00010b58 __mspabi_slll_5
+00010b5c __mspabi_slll_4
+00010b60 __mspabi_slll_3
+00010b64 __mspabi_slll_2
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+00010b6e __mspabi_srll_15
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+00010b9e __mspabi_srll_3
+00010ba2 __mspabi_srll_2
+00010ba6 __mspabi_srll_1
+00010bac ADC12_B_configureMemory
+00010be8 GPIO_setAsOutputPin
+00010c20 Timer_B_initCompareMode
+00010c58 ADC12_B_startConversion
+00010c88 __mpu_init
+00010cb4 resetPiController
+00010ce0 EUSCI_B_I2C_initSlave
+00010d0a initializeHallInterface
+00010d32 __TI_zero_init_nomemset
+00010d56 ADC12_B_setupSamplingTimer
+00010d76 GPIO_setOutputHighOnPin
+00010d92 GPIO_setOutputLowOnPin
+00010dae __mspabi_mpyi_f5hw
+00010dc6 WDT_A_hold
+00010ddc copyArray
+00010df0 memcpy
+00010e04 __TI_decompress_none
+00010e16 ADC12_B_setResolution
+00010e26 ADC12_B_enable
+00010e34 EUSCI_B_I2C_clearInterrupt
+00010e40 EUSCI_B_I2C_enableInterrupt
+00010e4c read_driver_fault
+00010e58 Timer_B_clearCaptureCompareInterrupt
+00010e62 EUSCI_B_I2C_enable
+00010e68 C$$EXIT
+00010e68 abort
+00010e6e _system_pre_init
+00010e72 _system_post_cinit
+ffffffff __TI_pprof_out_hndl
+ffffffff __TI_prof_data_size
+ffffffff __TI_prof_data_start
+ffffffff __c_args__
+
+[1685 symbols]
diff --git a/Apps/FlightSoftware/MotorControl/Release/MotorControl.out b/Apps/FlightSoftware/MotorControl/Release/MotorControl.out
new file mode 100644
index 000000000..106fa1496
Binary files /dev/null and b/Apps/FlightSoftware/MotorControl/Release/MotorControl.out differ
diff --git a/Apps/FlightSoftware/MotorControl/Release/MotorControl_linkInfo.xml b/Apps/FlightSoftware/MotorControl/Release/MotorControl_linkInfo.xml
new file mode 100644
index 000000000..af404d9ce
--- /dev/null
+++ b/Apps/FlightSoftware/MotorControl/Release/MotorControl_linkInfo.xml
@@ -0,0 +1,14627 @@
+
+
+ MSP430 Linker PC v18.12.4.LTS
+ Copyright (c) 2003-2018 Texas Instruments Incorporated
+ 0x6071e336
+ 0x0
+ MotorControl.out
+
+ _c_int00_noargs_mpu
+ 0x4000
+
+
+
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+
+ ADC12IFGR1_H
+ 0x80f
+
+
+ ADC12IFGR2
+ 0x810
+
+
+ ADC12IFGR2_L
+ 0x810
+
+
+ ADC12IFGR2_H
+ 0x811
+
+
+ ADC12IER0
+ 0x812
+
+
+ ADC12IER0_L
+ 0x812
+
+
+ ADC12IER0_H
+ 0x813
+
+
+ ADC12IER1
+ 0x814
+
+
+ ADC12IER1_L
+ 0x814
+
+
+ ADC12IER1_H
+ 0x815
+
+
+ ADC12IER2
+ 0x816
+
+
+ ADC12IER2_L
+ 0x816
+
+
+ ADC12IER2_H
+ 0x817
+
+
+ ADC12IV
+ 0x818
+
+
+ ADC12IV_L
+ 0x818
+
+
+ ADC12IV_H
+ 0x819
+
+
+ ADC12MCTL0
+ 0x820
+
+
+ ADC12MCTL0_L
+ 0x820
+
+
+ ADC12MCTL0_H
+ 0x821
+
+
+ ADC12MCTL1
+ 0x822
+
+
+ ADC12MCTL1_L
+ 0x822
+
+
+ ADC12MCTL1_H
+ 0x823
+
+
+ ADC12MCTL2
+ 0x824
+
+
+ ADC12MCTL2_L
+ 0x824
+
+
+ ADC12MCTL2_H
+ 0x825
+
+
+ ADC12MCTL3
+ 0x826
+
+
+ ADC12MCTL3_L
+ 0x826
+
+
+ ADC12MCTL3_H
+ 0x827
+
+
+ ADC12MCTL4
+ 0x828
+
+
+ ADC12MCTL4_L
+ 0x828
+
+
+ ADC12MCTL4_H
+ 0x829
+
+
+ ADC12MCTL5
+ 0x82a
+
+
+ ADC12MCTL5_L
+ 0x82a
+
+
+ ADC12MCTL5_H
+ 0x82b
+
+
+ ADC12MCTL6
+ 0x82c
+
+
+ ADC12MCTL6_L
+ 0x82c
+
+
+ ADC12MCTL6_H
+ 0x82d
+
+
+ ADC12MCTL7
+ 0x82e
+
+
+ ADC12MCTL7_L
+ 0x82e
+
+
+ ADC12MCTL7_H
+ 0x82f
+
+
+ ADC12MCTL8
+ 0x830
+
+
+ ADC12MCTL8_L
+ 0x830
+
+
+ ADC12MCTL8_H
+ 0x831
+
+
+ ADC12MCTL9
+ 0x832
+
+
+ ADC12MCTL9_L
+ 0x832
+
+
+ ADC12MCTL9_H
+ 0x833
+
+
+ ADC12MCTL10
+ 0x834
+
+
+ ADC12MCTL10_L
+ 0x834
+
+
+ ADC12MCTL10_H
+ 0x835
+
+
+ ADC12MCTL11
+ 0x836
+
+
+ ADC12MCTL11_L
+ 0x836
+
+
+ ADC12MCTL11_H
+ 0x837
+
+
+ ADC12MCTL12
+ 0x838
+
+
+ ADC12MCTL12_L
+ 0x838
+
+
+ ADC12MCTL12_H
+ 0x839
+
+
+ ADC12MCTL13
+ 0x83a
+
+
+ ADC12MCTL13_L
+ 0x83a
+
+
+ ADC12MCTL13_H
+ 0x83b
+
+
+ ADC12MCTL14
+ 0x83c
+
+
+ ADC12MCTL14_L
+ 0x83c
+
+
+ ADC12MCTL14_H
+ 0x83d
+
+
+ ADC12MCTL15
+ 0x83e
+
+
+ ADC12MCTL15_L
+ 0x83e
+
+
+ ADC12MCTL15_H
+ 0x83f
+
+
+ ADC12MCTL16
+ 0x840
+
+
+ ADC12MCTL16_L
+ 0x840
+
+
+ ADC12MCTL16_H
+ 0x841
+
+
+ ADC12MCTL17
+ 0x842
+
+
+ ADC12MCTL17_L
+ 0x842
+
+
+ ADC12MCTL17_H
+ 0x843
+
+
+ ADC12MCTL18
+ 0x844
+
+
+ ADC12MCTL18_L
+ 0x844
+
+
+ ADC12MCTL18_H
+ 0x845
+
+
+ ADC12MCTL19
+ 0x846
+
+
+ ADC12MCTL19_L
+ 0x846
+
+
+ ADC12MCTL19_H
+ 0x847
+
+
+ ADC12MCTL20
+ 0x848
+
+
+ ADC12MCTL20_L
+ 0x848
+
+
+ ADC12MCTL20_H
+ 0x849
+
+
+ ADC12MCTL21
+ 0x84a
+
+
+ ADC12MCTL21_L
+ 0x84a
+
+
+ ADC12MCTL21_H
+ 0x84b
+
+
+ ADC12MCTL22
+ 0x84c
+
+
+ ADC12MCTL22_L
+ 0x84c
+
+
+ ADC12MCTL22_H
+ 0x84d
+
+
+ ADC12MCTL23
+ 0x84e
+
+
+ ADC12MCTL23_L
+ 0x84e
+
+
+ ADC12MCTL23_H
+ 0x84f
+
+
+ ADC12MCTL24
+ 0x850
+
+
+ ADC12MCTL24_L
+ 0x850
+
+
+ ADC12MCTL24_H
+ 0x851
+
+
+ ADC12MCTL25
+ 0x852
+
+
+ ADC12MCTL25_L
+ 0x852
+
+
+ ADC12MCTL25_H
+ 0x853
+
+
+ ADC12MCTL26
+ 0x854
+
+
+ ADC12MCTL26_L
+ 0x854
+
+
+ ADC12MCTL26_H
+ 0x855
+
+
+ ADC12MCTL27
+ 0x856
+
+
+ ADC12MCTL27_L
+ 0x856
+
+
+ ADC12MCTL27_H
+ 0x857
+
+
+ ADC12MCTL28
+ 0x858
+
+
+ ADC12MCTL28_L
+ 0x858
+
+
+ ADC12MCTL28_H
+ 0x859
+
+
+ ADC12MCTL29
+ 0x85a
+
+
+ ADC12MCTL29_L
+ 0x85a
+
+
+ ADC12MCTL29_H
+ 0x85b
+
+
+ ADC12MCTL30
+ 0x85c
+
+
+ ADC12MCTL30_L
+ 0x85c
+
+
+ ADC12MCTL30_H
+ 0x85d
+
+
+ ADC12MCTL31
+ 0x85e
+
+
+ ADC12MCTL31_L
+ 0x85e
+
+
+ ADC12MCTL31_H
+ 0x85f
+
+
+ ADC12MEM0
+ 0x860
+
+
+ ADC12MEM0_L
+ 0x860
+
+
+ ADC12MEM0_H
+ 0x861
+
+
+ ADC12MEM1
+ 0x862
+
+
+ ADC12MEM1_L
+ 0x862
+
+
+ ADC12MEM1_H
+ 0x863
+
+
+ ADC12MEM2
+ 0x864
+
+
+ ADC12MEM2_L
+ 0x864
+
+
+ ADC12MEM2_H
+ 0x865
+
+
+ ADC12MEM3
+ 0x866
+
+
+ ADC12MEM3_L
+ 0x866
+
+
+ ADC12MEM3_H
+ 0x867
+
+
+ ADC12MEM4
+ 0x868
+
+
+ ADC12MEM4_L
+ 0x868
+
+
+ ADC12MEM4_H
+ 0x869
+
+
+ ADC12MEM5
+ 0x86a
+
+
+ ADC12MEM5_L
+ 0x86a
+
+
+ ADC12MEM5_H
+ 0x86b
+
+
+ ADC12MEM6
+ 0x86c
+
+
+ ADC12MEM6_L
+ 0x86c
+
+
+ ADC12MEM6_H
+ 0x86d
+
+
+ ADC12MEM7
+ 0x86e
+
+
+ ADC12MEM7_L
+ 0x86e
+
+
+ ADC12MEM7_H
+ 0x86f
+
+
+ ADC12MEM8
+ 0x870
+
+
+ ADC12MEM8_L
+ 0x870
+
+
+ ADC12MEM8_H
+ 0x871
+
+
+ ADC12MEM9
+ 0x872
+
+
+ ADC12MEM9_L
+ 0x872
+
+
+ ADC12MEM9_H
+ 0x873
+
+
+ ADC12MEM10
+ 0x874
+
+
+ ADC12MEM10_L
+ 0x874
+
+
+ ADC12MEM10_H
+ 0x875
+
+
+ ADC12MEM11
+ 0x876
+
+
+ ADC12MEM11_L
+ 0x876
+
+
+ ADC12MEM11_H
+ 0x877
+
+
+ ADC12MEM12
+ 0x878
+
+
+ ADC12MEM12_L
+ 0x878
+
+
+ ADC12MEM12_H
+ 0x879
+
+
+ ADC12MEM13
+ 0x87a
+
+
+ ADC12MEM13_L
+ 0x87a
+
+
+ ADC12MEM13_H
+ 0x87b
+
+
+ ADC12MEM14
+ 0x87c
+
+
+ ADC12MEM14_L
+ 0x87c
+
+
+ ADC12MEM14_H
+ 0x87d
+
+
+ ADC12MEM15
+ 0x87e
+
+
+ ADC12MEM15_L
+ 0x87e
+
+
+ ADC12MEM15_H
+ 0x87f
+
+
+ ADC12MEM16
+ 0x880
+
+
+ ADC12MEM16_L
+ 0x880
+
+
+ ADC12MEM16_H
+ 0x881
+
+
+ ADC12MEM17
+ 0x882
+
+
+ ADC12MEM17_L
+ 0x882
+
+
+ ADC12MEM17_H
+ 0x883
+
+
+ ADC12MEM18
+ 0x884
+
+
+ ADC12MEM18_L
+ 0x884
+
+
+ ADC12MEM18_H
+ 0x885
+
+
+ ADC12MEM19
+ 0x886
+
+
+ ADC12MEM19_L
+ 0x886
+
+
+ ADC12MEM19_H
+ 0x887
+
+
+ ADC12MEM20
+ 0x888
+
+
+ ADC12MEM20_L
+ 0x888
+
+
+ ADC12MEM20_H
+ 0x889
+
+
+ ADC12MEM21
+ 0x88a
+
+
+ ADC12MEM21_L
+ 0x88a
+
+
+ ADC12MEM21_H
+ 0x88b
+
+
+ ADC12MEM22
+ 0x88c
+
+
+ ADC12MEM22_L
+ 0x88c
+
+
+ ADC12MEM22_H
+ 0x88d
+
+
+ ADC12MEM23
+ 0x88e
+
+
+ ADC12MEM23_L
+ 0x88e
+
+
+ ADC12MEM23_H
+ 0x88f
+
+
+ ADC12MEM24
+ 0x890
+
+
+ ADC12MEM24_L
+ 0x890
+
+
+ ADC12MEM24_H
+ 0x891
+
+
+ ADC12MEM25
+ 0x892
+
+
+ ADC12MEM25_L
+ 0x892
+
+
+ ADC12MEM25_H
+ 0x893
+
+
+ ADC12MEM26
+ 0x894
+
+
+ ADC12MEM26_L
+ 0x894
+
+
+ ADC12MEM26_H
+ 0x895
+
+
+ ADC12MEM27
+ 0x896
+
+
+ ADC12MEM27_L
+ 0x896
+
+
+ ADC12MEM27_H
+ 0x897
+
+
+ ADC12MEM28
+ 0x898
+
+
+ ADC12MEM28_L
+ 0x898
+
+
+ ADC12MEM28_H
+ 0x899
+
+
+ ADC12MEM29
+ 0x89a
+
+
+ ADC12MEM29_L
+ 0x89a
+
+
+ ADC12MEM29_H
+ 0x89b
+
+
+ ADC12MEM30
+ 0x89c
+
+
+ ADC12MEM30_L
+ 0x89c
+
+
+ ADC12MEM30_H
+ 0x89d
+
+
+ ADC12MEM31
+ 0x89e
+
+
+ ADC12MEM31_L
+ 0x89e
+
+
+ ADC12MEM31_H
+ 0x89f
+
+
+ AESACTL0
+ 0x9c0
+
+
+ AESACTL0_L
+ 0x9c0
+
+
+ AESACTL0_H
+ 0x9c1
+
+
+ AESACTL1
+ 0x9c2
+
+
+ AESACTL1_L
+ 0x9c2
+
+
+ AESACTL1_H
+ 0x9c3
+
+
+ AESASTAT
+ 0x9c4
+
+
+ AESASTAT_L
+ 0x9c4
+
+
+ AESASTAT_H
+ 0x9c5
+
+
+ AESAKEY
+ 0x9c6
+
+
+ AESAKEY_L
+ 0x9c6
+
+
+ AESAKEY_H
+ 0x9c7
+
+
+ AESADIN
+ 0x9c8
+
+
+ AESADIN_L
+ 0x9c8
+
+
+ AESADIN_H
+ 0x9c9
+
+
+ AESADOUT
+ 0x9ca
+
+
+ AESADOUT_L
+ 0x9ca
+
+
+ AESADOUT_H
+ 0x9cb
+
+
+ AESAXDIN
+ 0x9cc
+
+
+ AESAXDIN_L
+ 0x9cc
+
+
+ AESAXDIN_H
+ 0x9cd
+
+
+ AESAXIN
+ 0x9ce
+
+
+ AESAXIN_L
+ 0x9ce
+
+
+ AESAXIN_H
+ 0x9cf
+
+
+ CAPTIO0CTL
+ 0x43e
+
+
+ CAPTIO0CTL_L
+ 0x43e
+
+
+ CAPTIO0CTL_H
+ 0x43f
+
+
+ CAPTIO1CTL
+ 0x47e
+
+
+ CAPTIO1CTL_L
+ 0x47e
+
+
+ CAPTIO1CTL_H
+ 0x47f
+
+
+ CECTL0
+ 0x8c0
+
+
+ CECTL0_L
+ 0x8c0
+
+
+ CECTL0_H
+ 0x8c1
+
+
+ CECTL1
+ 0x8c2
+
+
+ CECTL1_L
+ 0x8c2
+
+
+ CECTL1_H
+ 0x8c3
+
+
+ CECTL2
+ 0x8c4
+
+
+ CECTL2_L
+ 0x8c4
+
+
+ CECTL2_H
+ 0x8c5
+
+
+ CECTL3
+ 0x8c6
+
+
+ CECTL3_L
+ 0x8c6
+
+
+ CECTL3_H
+ 0x8c7
+
+
+ CEINT
+ 0x8cc
+
+
+ CEINT_L
+ 0x8cc
+
+
+ CEINT_H
+ 0x8cd
+
+
+ CEIV
+ 0x8ce
+
+
+ CEIV_L
+ 0x8ce
+
+
+ CEIV_H
+ 0x8cf
+
+
+ CRCDI
+ 0x150
+
+
+ CRCDI_L
+ 0x150
+
+
+ CRCDI_H
+ 0x151
+
+
+ CRCDIRB
+ 0x152
+
+
+ CRCDIRB_L
+ 0x152
+
+
+ CRCDIRB_H
+ 0x153
+
+
+ CRCINIRES
+ 0x154
+
+
+ CRCINIRES_L
+ 0x154
+
+
+ CRCINIRES_H
+ 0x155
+
+
+ CRCRESR
+ 0x156
+
+
+ CRCRESR_L
+ 0x156
+
+
+ CRCRESR_H
+ 0x157
+
+
+ CRC32DIW0
+ 0x980
+
+
+ CRC32DIW0_L
+ 0x980
+
+
+ CRC32DIW0_H
+ 0x981
+
+
+ CRC32DIW1
+ 0x982
+
+
+ CRC32DIW1_L
+ 0x982
+
+
+ CRC32DIW1_H
+ 0x983
+
+
+ CRC32DIRBW1
+ 0x984
+
+
+ CRC32DIRBW1_L
+ 0x984
+
+
+ CRC32DIRBW1_H
+ 0x985
+
+
+ CRC32DIRBW0
+ 0x986
+
+
+ CRC32DIRBW0_L
+ 0x986
+
+
+ CRC32DIRBW0_H
+ 0x987
+
+
+ CRC32INIRESW0
+ 0x988
+
+
+ CRC32INIRESW0_L
+ 0x988
+
+
+ CRC32INIRESW0_H
+ 0x989
+
+
+ CRC32INIRESW1
+ 0x98a
+
+
+ CRC32INIRESW1_L
+ 0x98a
+
+
+ CRC32INIRESW1_H
+ 0x98b
+
+
+ CRC32RESRW1
+ 0x98c
+
+
+ CRC32RESRW1_L
+ 0x98c
+
+
+ CRC32RESRW1_H
+ 0x98d
+
+
+ CRC32RESRW0
+ 0x98e
+
+
+ CRC32RESRW0_L
+ 0x98e
+
+
+ CRC32RESRW0_H
+ 0x98f
+
+
+ CRC16DIW0
+ 0x990
+
+
+ CRC16DIW0_L
+ 0x990
+
+
+ CRC16DIW0_H
+ 0x991
+
+
+ CRC16DIRBW0
+ 0x996
+
+
+ CRC16DIRBW0_L
+ 0x996
+
+
+ CRC16DIRBW0_H
+ 0x997
+
+
+ CRC16INIRESW0
+ 0x998
+
+
+ CRC16INIRESW0_L
+ 0x998
+
+
+ CRC16INIRESW0_H
+ 0x999
+
+
+ CRC16RESRW0
+ 0x99e
+
+
+ CRC16RESRW0_L
+ 0x99e
+
+
+ CRC16RESRW0_H
+ 0x99f
+
+
+ CSCTL0
+ 0x160
+
+
+ CSCTL0_L
+ 0x160
+
+
+ CSCTL0_H
+ 0x161
+
+
+ CSCTL1
+ 0x162
+
+
+ CSCTL1_L
+ 0x162
+
+
+ CSCTL1_H
+ 0x163
+
+
+ CSCTL2
+ 0x164
+
+
+ CSCTL2_L
+ 0x164
+
+
+ CSCTL2_H
+ 0x165
+
+
+ CSCTL3
+ 0x166
+
+
+ CSCTL3_L
+ 0x166
+
+
+ CSCTL3_H
+ 0x167
+
+
+ CSCTL4
+ 0x168
+
+
+ CSCTL4_L
+ 0x168
+
+
+ CSCTL4_H
+ 0x169
+
+
+ CSCTL5
+ 0x16a
+
+
+ CSCTL5_L
+ 0x16a
+
+
+ CSCTL5_H
+ 0x16b
+
+
+ CSCTL6
+ 0x16c
+
+
+ CSCTL6_L
+ 0x16c
+
+
+ CSCTL6_H
+ 0x16d
+
+
+ PAIN
+ 0x200
+
+
+ PAIN_L
+ 0x200
+
+
+ PAIN_H
+ 0x201
+
+
+ PAOUT
+ 0x202
+
+
+ PAOUT_L
+ 0x202
+
+
+ PAOUT_H
+ 0x203
+
+
+ PADIR
+ 0x204
+
+
+ PADIR_L
+ 0x204
+
+
+ PADIR_H
+ 0x205
+
+
+ PAREN
+ 0x206
+
+
+ PAREN_L
+ 0x206
+
+
+ PAREN_H
+ 0x207
+
+
+ PASEL0
+ 0x20a
+
+
+ PASEL0_L
+ 0x20a
+
+
+ PASEL0_H
+ 0x20b
+
+
+ PASEL1
+ 0x20c
+
+
+ PASEL1_L
+ 0x20c
+
+
+ PASEL1_H
+ 0x20d
+
+
+ P1IV
+ 0x20e
+
+
+ P1IV_L
+ 0x20e
+
+
+ P1IV_H
+ 0x20f
+
+
+ PASELC
+ 0x216
+
+
+ PASELC_L
+ 0x216
+
+
+ PASELC_H
+ 0x217
+
+
+ PAIES
+ 0x218
+
+
+ PAIES_L
+ 0x218
+
+
+ PAIES_H
+ 0x219
+
+
+ PAIE
+ 0x21a
+
+
+ PAIE_L
+ 0x21a
+
+
+ PAIE_H
+ 0x21b
+
+
+ PAIFG
+ 0x21c
+
+
+ PAIFG_L
+ 0x21c
+
+
+ PAIFG_H
+ 0x21d
+
+
+ P2IV
+ 0x21e
+
+
+ P2IV_L
+ 0x21e
+
+
+ P2IV_H
+ 0x21f
+
+
+ PBIN
+ 0x220
+
+
+ PBIN_L
+ 0x220
+
+
+ PBIN_H
+ 0x221
+
+
+ PBOUT
+ 0x222
+
+
+ PBOUT_L
+ 0x222
+
+
+ PBOUT_H
+ 0x223
+
+
+ PBDIR
+ 0x224
+
+
+ PBDIR_L
+ 0x224
+
+
+ PBDIR_H
+ 0x225
+
+
+ PBREN
+ 0x226
+
+
+ PBREN_L
+ 0x226
+
+
+ PBREN_H
+ 0x227
+
+
+ PBSEL0
+ 0x22a
+
+
+ PBSEL0_L
+ 0x22a
+
+
+ PBSEL0_H
+ 0x22b
+
+
+ PBSEL1
+ 0x22c
+
+
+ PBSEL1_L
+ 0x22c
+
+
+ PBSEL1_H
+ 0x22d
+
+
+ P3IV
+ 0x22e
+
+
+ P3IV_L
+ 0x22e
+
+
+ P3IV_H
+ 0x22f
+
+
+ PBSELC
+ 0x236
+
+
+ PBSELC_L
+ 0x236
+
+
+ PBSELC_H
+ 0x237
+
+
+ PBIES
+ 0x238
+
+
+ PBIES_L
+ 0x238
+
+
+ PBIES_H
+ 0x239
+
+
+ PBIE
+ 0x23a
+
+
+ PBIE_L
+ 0x23a
+
+
+ PBIE_H
+ 0x23b
+
+
+ PBIFG
+ 0x23c
+
+
+ PBIFG_L
+ 0x23c
+
+
+ PBIFG_H
+ 0x23d
+
+
+ P4IV
+ 0x23e
+
+
+ P4IV_L
+ 0x23e
+
+
+ P4IV_H
+ 0x23f
+
+
+ PCIN
+ 0x240
+
+
+ PCIN_L
+ 0x240
+
+
+ PCIN_H
+ 0x241
+
+
+ PCOUT
+ 0x242
+
+
+ PCOUT_L
+ 0x242
+
+
+ PCOUT_H
+ 0x243
+
+
+ PCDIR
+ 0x244
+
+
+ PCDIR_L
+ 0x244
+
+
+ PCDIR_H
+ 0x245
+
+
+ PCREN
+ 0x246
+
+
+ PCREN_L
+ 0x246
+
+
+ PCREN_H
+ 0x247
+
+
+ PCSEL0
+ 0x24a
+
+
+ PCSEL0_L
+ 0x24a
+
+
+ PCSEL0_H
+ 0x24b
+
+
+ PCSEL1
+ 0x24c
+
+
+ PCSEL1_L
+ 0x24c
+
+
+ PCSEL1_H
+ 0x24d
+
+
+ P5IV
+ 0x24e
+
+
+ P5IV_L
+ 0x24e
+
+
+ P5IV_H
+ 0x24f
+
+
+ PCSELC
+ 0x256
+
+
+ PCSELC_L
+ 0x256
+
+
+ PCSELC_H
+ 0x257
+
+
+ PCIES
+ 0x258
+
+
+ PCIES_L
+ 0x258
+
+
+ PCIES_H
+ 0x259
+
+
+ PCIE
+ 0x25a
+
+
+ PCIE_L
+ 0x25a
+
+
+ PCIE_H
+ 0x25b
+
+
+ PCIFG
+ 0x25c
+
+
+ PCIFG_L
+ 0x25c
+
+
+ PCIFG_H
+ 0x25d
+
+
+ P6IV
+ 0x25e
+
+
+ P6IV_L
+ 0x25e
+
+
+ P6IV_H
+ 0x25f
+
+
+ PDIN
+ 0x260
+
+
+ PDIN_L
+ 0x260
+
+
+ PDIN_H
+ 0x261
+
+
+ PDOUT
+ 0x262
+
+
+ PDOUT_L
+ 0x262
+
+
+ PDOUT_H
+ 0x263
+
+
+ PDDIR
+ 0x264
+
+
+ PDDIR_L
+ 0x264
+
+
+ PDDIR_H
+ 0x265
+
+
+ PDREN
+ 0x266
+
+
+ PDREN_L
+ 0x266
+
+
+ PDREN_H
+ 0x267
+
+
+ PDSEL0
+ 0x26a
+
+
+ PDSEL0_L
+ 0x26a
+
+
+ PDSEL0_H
+ 0x26b
+
+
+ PDSEL1
+ 0x26c
+
+
+ PDSEL1_L
+ 0x26c
+
+
+ PDSEL1_H
+ 0x26d
+
+
+ P7IV
+ 0x26e
+
+
+ P7IV_L
+ 0x26e
+
+
+ P7IV_H
+ 0x26f
+
+
+ PDSELC
+ 0x276
+
+
+ PDSELC_L
+ 0x276
+
+
+ PDSELC_H
+ 0x277
+
+
+ PDIES
+ 0x278
+
+
+ PDIES_L
+ 0x278
+
+
+ PDIES_H
+ 0x279
+
+
+ PDIE
+ 0x27a
+
+
+ PDIE_L
+ 0x27a
+
+
+ PDIE_H
+ 0x27b
+
+
+ PDIFG
+ 0x27c
+
+
+ PDIFG_L
+ 0x27c
+
+
+ PDIFG_H
+ 0x27d
+
+
+ P8IV
+ 0x27e
+
+
+ P8IV_L
+ 0x27e
+
+
+ P8IV_H
+ 0x27f
+
+
+ PJIN
+ 0x320
+
+
+ PJIN_L
+ 0x320
+
+
+ PJIN_H
+ 0x321
+
+
+ PJOUT
+ 0x322
+
+
+ PJOUT_L
+ 0x322
+
+
+ PJOUT_H
+ 0x323
+
+
+ PJDIR
+ 0x324
+
+
+ PJDIR_L
+ 0x324
+
+
+ PJDIR_H
+ 0x325
+
+
+ PJREN
+ 0x326
+
+
+ PJREN_L
+ 0x326
+
+
+ PJREN_H
+ 0x327
+
+
+ PJSEL0
+ 0x32a
+
+
+ PJSEL0_L
+ 0x32a
+
+
+ PJSEL0_H
+ 0x32b
+
+
+ PJSEL1
+ 0x32c
+
+
+ PJSEL1_L
+ 0x32c
+
+
+ PJSEL1_H
+ 0x32d
+
+
+ PJSELC
+ 0x336
+
+
+ PJSELC_L
+ 0x336
+
+
+ PJSELC_H
+ 0x337
+
+
+ P1IN
+ 0x200
+
+
+ P2IN
+ 0x201
+
+
+ P2OUT
+ 0x203
+
+
+ P1OUT
+ 0x202
+
+
+ P1DIR
+ 0x204
+
+
+ P2DIR
+ 0x205
+
+
+ P1REN
+ 0x206
+
+
+ P2REN
+ 0x207
+
+
+ P1SEL0
+ 0x20a
+
+
+ P2SEL0
+ 0x20b
+
+
+ P1SEL1
+ 0x20c
+
+
+ P2SEL1
+ 0x20d
+
+
+ P1SELC
+ 0x216
+
+
+ P2SELC
+ 0x217
+
+
+ P1IES
+ 0x218
+
+
+ P2IES
+ 0x219
+
+
+ P1IE
+ 0x21a
+
+
+ P2IE
+ 0x21b
+
+
+ P1IFG
+ 0x21c
+
+
+ P2IFG
+ 0x21d
+
+
+ P3IN
+ 0x220
+
+
+ P4IN
+ 0x221
+
+
+ P3OUT
+ 0x222
+
+
+ P4OUT
+ 0x223
+
+
+ P3DIR
+ 0x224
+
+
+ P4DIR
+ 0x225
+
+
+ P3REN
+ 0x226
+
+
+ P4REN
+ 0x227
+
+
+ P4SEL0
+ 0x22b
+
+
+ P3SEL0
+ 0x22a
+
+
+ P3SEL1
+ 0x22c
+
+
+ P4SEL1
+ 0x22d
+
+
+ P3SELC
+ 0x236
+
+
+ P4SELC
+ 0x237
+
+
+ P3IES
+ 0x238
+
+
+ P4IES
+ 0x239
+
+
+ P3IE
+ 0x23a
+
+
+ P4IE
+ 0x23b
+
+
+ P3IFG
+ 0x23c
+
+
+ P4IFG
+ 0x23d
+
+
+ P5IN
+ 0x240
+
+
+ P6IN
+ 0x241
+
+
+ P5OUT
+ 0x242
+
+
+ P6OUT
+ 0x243
+
+
+ P5DIR
+ 0x244
+
+
+ P6DIR
+ 0x245
+
+
+ P5REN
+ 0x246
+
+
+ P6REN
+ 0x247
+
+
+ P5SEL0
+ 0x24a
+
+
+ P6SEL0
+ 0x24b
+
+
+ P5SEL1
+ 0x24c
+
+
+ P6SEL1
+ 0x24d
+
+
+ P5SELC
+ 0x256
+
+
+ P6SELC
+ 0x257
+
+
+ P5IES
+ 0x258
+
+
+ P6IES
+ 0x259
+
+
+ P5IE
+ 0x25a
+
+
+ P6IE
+ 0x25b
+
+
+ P5IFG
+ 0x25c
+
+
+ P6IFG
+ 0x25d
+
+
+ P7IN
+ 0x260
+
+
+ P8IN
+ 0x261
+
+
+ P7OUT
+ 0x262
+
+
+ P8OUT
+ 0x263
+
+
+ P7DIR
+ 0x264
+
+
+ P8DIR
+ 0x265
+
+
+ P7REN
+ 0x266
+
+
+ P8REN
+ 0x267
+
+
+ P7SEL0
+ 0x26a
+
+
+ P8SEL0
+ 0x26b
+
+
+ P7SEL1
+ 0x26c
+
+
+ P8SEL1
+ 0x26d
+
+
+ P7SELC
+ 0x276
+
+
+ P8SELC
+ 0x277
+
+
+ P7IES
+ 0x278
+
+
+ P8IES
+ 0x279
+
+
+ P7IE
+ 0x27a
+
+
+ P8IE
+ 0x27b
+
+
+ P7IFG
+ 0x27c
+
+
+ P8IFG
+ 0x27d
+
+
+ DMACTL0
+ 0x500
+
+
+ DMACTL0_L
+ 0x500
+
+
+ DMACTL0_H
+ 0x501
+
+
+ DMACTL1
+ 0x502
+
+
+ DMACTL1_L
+ 0x502
+
+
+ DMACTL1_H
+ 0x503
+
+
+ DMACTL2
+ 0x504
+
+
+ DMACTL2_L
+ 0x504
+
+
+ DMACTL2_H
+ 0x505
+
+
+ DMACTL4
+ 0x508
+
+
+ DMACTL4_L
+ 0x508
+
+
+ DMACTL4_H
+ 0x509
+
+
+ DMAIV
+ 0x50e
+
+
+ DMAIV_L
+ 0x50e
+
+
+ DMAIV_H
+ 0x50f
+
+
+ DMA0CTL
+ 0x510
+
+
+ DMA0CTL_L
+ 0x510
+
+
+ DMA0CTL_H
+ 0x511
+
+
+ DMA0SA
+ 0x512
+
+
+ DMA0SAL
+ 0x512
+
+
+ DMA0SAH
+ 0x514
+
+
+ DMA0DA
+ 0x516
+
+
+ DMA0DAL
+ 0x516
+
+
+ DMA0DAH
+ 0x518
+
+
+ DMA0SZ
+ 0x51a
+
+
+ DMA0SZ_L
+ 0x51a
+
+
+ DMA0SZ_H
+ 0x51b
+
+
+ DMA1CTL
+ 0x520
+
+
+ DMA1CTL_L
+ 0x520
+
+
+ DMA1CTL_H
+ 0x521
+
+
+ DMA1SA
+ 0x522
+
+
+ DMA1SAL
+ 0x522
+
+
+ DMA1SAH
+ 0x524
+
+
+ DMA1DA
+ 0x526
+
+
+ DMA1DAL
+ 0x526
+
+
+ DMA1DAH
+ 0x528
+
+
+ DMA1SZ
+ 0x52a
+
+
+ DMA1SZ_L
+ 0x52a
+
+
+ DMA1SZ_H
+ 0x52b
+
+
+ DMA2CTL
+ 0x530
+
+
+ DMA2CTL_L
+ 0x530
+
+
+ DMA2CTL_H
+ 0x531
+
+
+ DMA2SA
+ 0x532
+
+
+ DMA2SAL
+ 0x532
+
+
+ DMA2SAH
+ 0x534
+
+
+ DMA2DA
+ 0x536
+
+
+ DMA2DAL
+ 0x536
+
+
+ DMA2DAH
+ 0x538
+
+
+ DMA2SZ
+ 0x53a
+
+
+ DMA2SZ_L
+ 0x53a
+
+
+ DMA2SZ_H
+ 0x53b
+
+
+ DMA3CTL
+ 0x540
+
+
+ DMA3CTL_L
+ 0x540
+
+
+ DMA3CTL_H
+ 0x541
+
+
+ DMA3SA
+ 0x542
+
+
+ DMA3SAL
+ 0x542
+
+
+ DMA3SAH
+ 0x544
+
+
+ DMA3DA
+ 0x546
+
+
+ DMA3DAL
+ 0x546
+
+
+ DMA3DAH
+ 0x548
+
+
+ DMA3SZ
+ 0x54a
+
+
+ DMA3SZ_L
+ 0x54a
+
+
+ DMA3SZ_H
+ 0x54b
+
+
+ DMA4CTL
+ 0x550
+
+
+ DMA4CTL_L
+ 0x550
+
+
+ DMA4CTL_H
+ 0x551
+
+
+ DMA4SA
+ 0x552
+
+
+ DMA4SAL
+ 0x552
+
+
+ DMA4SAH
+ 0x554
+
+
+ DMA4DA
+ 0x556
+
+
+ DMA4DAL
+ 0x556
+
+
+ DMA4DAH
+ 0x558
+
+
+ DMA4SZ
+ 0x55a
+
+
+ DMA4SZ_L
+ 0x55a
+
+
+ DMA4SZ_H
+ 0x55b
+
+
+ DMA5CTL
+ 0x560
+
+
+ DMA5CTL_L
+ 0x560
+
+
+ DMA5CTL_H
+ 0x561
+
+
+ DMA5SA
+ 0x562
+
+
+ DMA5SAL
+ 0x562
+
+
+ DMA5SAH
+ 0x564
+
+
+ DMA5DA
+ 0x566
+
+
+ DMA5DAL
+ 0x566
+
+
+ DMA5DAH
+ 0x568
+
+
+ DMA5SZ
+ 0x56a
+
+
+ DMA5SZ_L
+ 0x56a
+
+
+ DMA5SZ_H
+ 0x56b
+
+
+ FRCTL0
+ 0x140
+
+
+ FRCTL0_L
+ 0x140
+
+
+ FRCTL0_H
+ 0x141
+
+
+ GCCTL0
+ 0x144
+
+
+ GCCTL0_L
+ 0x144
+
+
+ GCCTL0_H
+ 0x145
+
+
+ GCCTL1
+ 0x146
+
+
+ GCCTL1_L
+ 0x146
+
+
+ GCCTL1_H
+ 0x147
+
+
+ LEACAP
+ 0xa80
+
+
+ LEACAPL
+ 0xa80
+
+
+ LEACAPH
+ 0xa82
+
+
+ LEACNF0
+ 0xa84
+
+
+ LEACNF0L
+ 0xa84
+
+
+ LEACNF0H
+ 0xa86
+
+
+ LEACNF1
+ 0xa88
+
+
+ LEACNF1L
+ 0xa88
+
+
+ LEACNF1H
+ 0xa8a
+
+
+ LEACNF2
+ 0xa8c
+
+
+ LEACNF2L
+ 0xa8c
+
+
+ LEACNF2H
+ 0xa8e
+
+
+ LEAMB
+ 0xa90
+
+
+ LEAMBL
+ 0xa90
+
+
+ LEAMBH
+ 0xa92
+
+
+ LEAMT
+ 0xa94
+
+
+ LEAMTL
+ 0xa94
+
+
+ LEAMTH
+ 0xa96
+
+
+ LEACMA
+ 0xa98
+
+
+ LEACMAL
+ 0xa98
+
+
+ LEACMAH
+ 0xa9a
+
+
+ LEACMCTL
+ 0xa9c
+
+
+ LEACMCTLL
+ 0xa9c
+
+
+ LEACMCTLH
+ 0xa9e
+
+
+ LEACMDSTAT
+ 0xaa8
+
+
+ LEACMDSTATL
+ 0xaa8
+
+
+ LEACMDSTATH
+ 0xaaa
+
+
+ LEAS1STAT
+ 0xaac
+
+
+ LEAS1STATL
+ 0xaac
+
+
+ LEAS1STATH
+ 0xaae
+
+
+ LEAS0STAT
+ 0xab0
+
+
+ LEAS0STATL
+ 0xab0
+
+
+ LEAS0STATH
+ 0xab2
+
+
+ LEADSTSTAT
+ 0xab4
+
+
+ LEADSTSTATL
+ 0xab4
+
+
+ LEADSTSTATH
+ 0xab6
+
+
+ LEAPMCTL
+ 0xac0
+
+
+ LEAPMCTLL
+ 0xac0
+
+
+ LEAPMCTLH
+ 0xac2
+
+
+ LEAPMDST
+ 0xac4
+
+
+ LEAPMDSTL
+ 0xac4
+
+
+ LEAPMDSTH
+ 0xac6
+
+
+ LEAPMS1
+ 0xac8
+
+
+ LEAPMS1L
+ 0xac8
+
+
+ LEAPMS1H
+ 0xaca
+
+
+ LEAPMS0
+ 0xacc
+
+
+ LEAPMS0L
+ 0xacc
+
+
+ LEAPMS0H
+ 0xace
+
+
+ LEAPMCB
+ 0xad0
+
+
+ LEAPMCBL
+ 0xad0
+
+
+ LEAPMCBH
+ 0xad2
+
+
+ LEAIFGSET
+ 0xaf0
+
+
+ LEAIFGSETL
+ 0xaf0
+
+
+ LEAIFGSETH
+ 0xaf2
+
+
+ LEAIE
+ 0xaf4
+
+
+ LEAIEL
+ 0xaf4
+
+
+ LEAIEH
+ 0xaf6
+
+
+ LEAIFG
+ 0xaf8
+
+
+ LEAIFGL
+ 0xaf8
+
+
+ LEAIFGH
+ 0xafa
+
+
+ LEAIV
+ 0xafc
+
+
+ LEAIVL
+ 0xafc
+
+
+ LEAIVH
+ 0xafe
+
+
+ MPUCTL0
+ 0x5a0
+
+
+ MPUCTL0_L
+ 0x5a0
+
+
+ MPUCTL0_H
+ 0x5a1
+
+
+ MPUCTL1
+ 0x5a2
+
+
+ MPUCTL1_L
+ 0x5a2
+
+
+ MPUCTL1_H
+ 0x5a3
+
+
+ MPUSEGB2
+ 0x5a4
+
+
+ MPUSEGB2_L
+ 0x5a4
+
+
+ MPUSEGB2_H
+ 0x5a5
+
+
+ MPUSEGB1
+ 0x5a6
+
+
+ MPUSEGB1_L
+ 0x5a6
+
+
+ MPUSEGB1_H
+ 0x5a7
+
+
+ MPUSAM
+ 0x5a8
+
+
+ MPUSAM_L
+ 0x5a8
+
+
+ MPUSAM_H
+ 0x5a9
+
+
+ MPUIPC0
+ 0x5aa
+
+
+ MPUIPC0_L
+ 0x5aa
+
+
+ MPUIPC0_H
+ 0x5ab
+
+
+ MPUIPSEGB2
+ 0x5ac
+
+
+ MPUIPSEGB2_L
+ 0x5ac
+
+
+ MPUIPSEGB2_H
+ 0x5ad
+
+
+ MPUIPSEGB1
+ 0x5ae
+
+
+ MPUIPSEGB1_L
+ 0x5ae
+
+
+ MPUIPSEGB1_H
+ 0x5af
+
+
+ MPY
+ 0x4c0
+
+
+ MPY_L
+ 0x4c0
+
+
+ MPY_H
+ 0x4c1
+
+
+ MPYS
+ 0x4c2
+
+
+ MPYS_L
+ 0x4c2
+
+
+ MPYS_H
+ 0x4c3
+
+
+ MAC
+ 0x4c4
+
+
+ MAC_L
+ 0x4c4
+
+
+ MAC_H
+ 0x4c5
+
+
+ MACS
+ 0x4c6
+
+
+ MACS_L
+ 0x4c6
+
+
+ MACS_H
+ 0x4c7
+
+
+ OP2
+ 0x4c8
+
+
+ OP2_L
+ 0x4c8
+
+
+ OP2_H
+ 0x4c9
+
+
+ RESLO
+ 0x4ca
+
+
+ RESLO_L
+ 0x4ca
+
+
+ RESLO_H
+ 0x4cb
+
+
+ RESHI
+ 0x4cc
+
+
+ RESHI_L
+ 0x4cc
+
+
+ RESHI_H
+ 0x4cd
+
+
+ SUMEXT
+ 0x4ce
+
+
+ SUMEXT_L
+ 0x4ce
+
+
+ SUMEXT_H
+ 0x4cf
+
+
+ MPY32L
+ 0x4d0
+
+
+ MPY32L_L
+ 0x4d0
+
+
+ MPY32L_H
+ 0x4d1
+
+
+ MPY32H
+ 0x4d2
+
+
+ MPY32H_L
+ 0x4d2
+
+
+ MPY32H_H
+ 0x4d3
+
+
+ MPYS32L
+ 0x4d4
+
+
+ MPYS32L_L
+ 0x4d4
+
+
+ MPYS32L_H
+ 0x4d5
+
+
+ MPYS32H
+ 0x4d6
+
+
+ MPYS32H_L
+ 0x4d6
+
+
+ MPYS32H_H
+ 0x4d7
+
+
+ MAC32L
+ 0x4d8
+
+
+ MAC32L_L
+ 0x4d8
+
+
+ MAC32L_H
+ 0x4d9
+
+
+ MAC32H
+ 0x4da
+
+
+ MAC32H_L
+ 0x4da
+
+
+ MAC32H_H
+ 0x4db
+
+
+ MACS32L
+ 0x4dc
+
+
+ MACS32L_L
+ 0x4dc
+
+
+ MACS32L_H
+ 0x4dd
+
+
+ MACS32H
+ 0x4de
+
+
+ MACS32H_L
+ 0x4de
+
+
+ MACS32H_H
+ 0x4df
+
+
+ OP2L
+ 0x4e0
+
+
+ OP2L_L
+ 0x4e0
+
+
+ OP2L_H
+ 0x4e1
+
+
+ OP2H
+ 0x4e2
+
+
+ OP2H_L
+ 0x4e2
+
+
+ OP2H_H
+ 0x4e3
+
+
+ RES0
+ 0x4e4
+
+
+ RES0_L
+ 0x4e4
+
+
+ RES0_H
+ 0x4e5
+
+
+ RES1
+ 0x4e6
+
+
+ RES1_L
+ 0x4e6
+
+
+ RES1_H
+ 0x4e7
+
+
+ RES2
+ 0x4e8
+
+
+ RES2_L
+ 0x4e8
+
+
+ RES2_H
+ 0x4e9
+
+
+ RES3
+ 0x4ea
+
+
+ RES3_L
+ 0x4ea
+
+
+ RES3_H
+ 0x4eb
+
+
+ MPY32CTL0
+ 0x4ec
+
+
+ MPY32CTL0_L
+ 0x4ec
+
+
+ MPY32CTL0_H
+ 0x4ed
+
+
+ PMMCTL0
+ 0x120
+
+
+ PMMCTL0_L
+ 0x120
+
+
+ PMMCTL0_H
+ 0x121
+
+
+ PMMIFG
+ 0x12a
+
+
+ PMMIFG_L
+ 0x12a
+
+
+ PMMIFG_H
+ 0x12b
+
+
+ PM5CTL0
+ 0x130
+
+
+ PM5CTL0_L
+ 0x130
+
+
+ PM5CTL0_H
+ 0x131
+
+
+ RCCTL0
+ 0x158
+
+
+ RCCTL0_L
+ 0x158
+
+
+ RCCTL0_H
+ 0x159
+
+
+ REFCTL0
+ 0x1b0
+
+
+ REFCTL0_L
+ 0x1b0
+
+
+ REFCTL0_H
+ 0x1b1
+
+
+ RTCCTL0
+ 0x4a0
+
+
+ RTCCTL0_L
+ 0x4a0
+
+
+ RTCCTL0_H
+ 0x4a1
+
+
+ RTCCTL13
+ 0x4a2
+
+
+ RTCCTL13_L
+ 0x4a2
+
+
+ RTCCTL13_H
+ 0x4a3
+
+
+ RTCOCAL
+ 0x4a4
+
+
+ RTCOCAL_L
+ 0x4a4
+
+
+ RTCOCAL_H
+ 0x4a5
+
+
+ RTCTCMP
+ 0x4a6
+
+
+ RTCTCMP_L
+ 0x4a6
+
+
+ RTCTCMP_H
+ 0x4a7
+
+
+ RTCPS0CTL
+ 0x4a8
+
+
+ RTCPS0CTL_L
+ 0x4a8
+
+
+ RTCPS0CTL_H
+ 0x4a9
+
+
+ RTCPS1CTL
+ 0x4aa
+
+
+ RTCPS1CTL_L
+ 0x4aa
+
+
+ RTCPS1CTL_H
+ 0x4ab
+
+
+ RTCPS
+ 0x4ac
+
+
+ RTCPS_L
+ 0x4ac
+
+
+ RTCPS_H
+ 0x4ad
+
+
+ RTCIV
+ 0x4ae
+
+
+ RTCIV_L
+ 0x4ae
+
+
+ RTCIV_H
+ 0x4af
+
+
+ RTCTIM0
+ 0x4b0
+
+
+ RTCTIM0_L
+ 0x4b0
+
+
+ RTCTIM0_H
+ 0x4b1
+
+
+ RTCCNT12
+ 0x4b0
+
+
+ RTCCNT12_L
+ 0x4b0
+
+
+ RTCCNT12_H
+ 0x4b1
+
+
+ RTCTIM1
+ 0x4b2
+
+
+ RTCTIM1_L
+ 0x4b2
+
+
+ RTCTIM1_H
+ 0x4b3
+
+
+ RTCCNT34
+ 0x4b2
+
+
+ RTCCNT34_L
+ 0x4b2
+
+
+ RTCCNT34_H
+ 0x4b3
+
+
+ RTCDATE
+ 0x4b4
+
+
+ RTCDATE_L
+ 0x4b4
+
+
+ RTCDATE_H
+ 0x4b5
+
+
+ RTCYEAR
+ 0x4b6
+
+
+ RTCYEAR_L
+ 0x4b6
+
+
+ RTCYEAR_H
+ 0x4b7
+
+
+ RTCAMINHR
+ 0x4b8
+
+
+ RTCAMINHR_L
+ 0x4b8
+
+
+ RTCAMINHR_H
+ 0x4b9
+
+
+ RTCADOWDAY
+ 0x4ba
+
+
+ RTCADOWDAY_L
+ 0x4ba
+
+
+ RTCADOWDAY_H
+ 0x4bb
+
+
+ BIN2BCD
+ 0x4bc
+
+
+ BIN2BCD_L
+ 0x4bc
+
+
+ BIN2BCD_H
+ 0x4bd
+
+
+ BCD2BIN
+ 0x4be
+
+
+ BCD2BIN_L
+ 0x4be
+
+
+ BCD2BIN_H
+ 0x4bf
+
+
+ RT0PS
+ 0x4ac
+
+
+ RT1PS
+ 0x4ad
+
+
+ RTCCNT1
+ 0x4b0
+
+
+ RTCCNT2
+ 0x4b1
+
+
+ RTCCNT3
+ 0x4b2
+
+
+ RTCCNT4
+ 0x4b3
+
+
+ SFRIE1
+ 0x100
+
+
+ SFRIE1_L
+ 0x100
+
+
+ SFRIE1_H
+ 0x101
+
+
+ SFRIFG1
+ 0x102
+
+
+ SFRIFG1_L
+ 0x102
+
+
+ SFRIFG1_H
+ 0x103
+
+
+ SFRRPCR
+ 0x104
+
+
+ SFRRPCR_L
+ 0x104
+
+
+ SFRRPCR_H
+ 0x105
+
+
+ SYSCTL
+ 0x180
+
+
+ SYSCTL_L
+ 0x180
+
+
+ SYSCTL_H
+ 0x181
+
+
+ SYSJMBC
+ 0x186
+
+
+ SYSJMBC_L
+ 0x186
+
+
+ SYSJMBC_H
+ 0x187
+
+
+ SYSJMBI0
+ 0x188
+
+
+ SYSJMBI0_L
+ 0x188
+
+
+ SYSJMBI0_H
+ 0x189
+
+
+ SYSJMBI1
+ 0x18a
+
+
+ SYSJMBI1_L
+ 0x18a
+
+
+ SYSJMBI1_H
+ 0x18b
+
+
+ SYSJMBO0
+ 0x18c
+
+
+ SYSJMBO0_L
+ 0x18c
+
+
+ SYSJMBO0_H
+ 0x18d
+
+
+ SYSJMBO1
+ 0x18e
+
+
+ SYSJMBO1_L
+ 0x18e
+
+
+ SYSJMBO1_H
+ 0x18f
+
+
+ SYSUNIV
+ 0x19a
+
+
+ SYSUNIV_L
+ 0x19a
+
+
+ SYSUNIV_H
+ 0x19b
+
+
+ SYSSNIV
+ 0x19c
+
+
+ SYSSNIV_L
+ 0x19c
+
+
+ SYSSNIV_H
+ 0x19d
+
+
+ SYSRSTIV
+ 0x19e
+
+
+ SYSRSTIV_L
+ 0x19e
+
+
+ SYSRSTIV_H
+ 0x19f
+
+
+ TA0CTL
+ 0x340
+
+
+ TA0CTL_L
+ 0x340
+
+
+ TA0CTL_H
+ 0x341
+
+
+ TA0CCTL0
+ 0x342
+
+
+ TA0CCTL0_L
+ 0x342
+
+
+ TA0CCTL0_H
+ 0x343
+
+
+ TA0CCTL1
+ 0x344
+
+
+ TA0CCTL1_L
+ 0x344
+
+
+ TA0CCTL1_H
+ 0x345
+
+
+ TA0CCTL2
+ 0x346
+
+
+ TA0CCTL2_L
+ 0x346
+
+
+ TA0CCTL2_H
+ 0x347
+
+
+ TA0R
+ 0x350
+
+
+ TA0R_L
+ 0x350
+
+
+ TA0R_H
+ 0x351
+
+
+ TA0CCR0
+ 0x352
+
+
+ TA0CCR0_L
+ 0x352
+
+
+ TA0CCR0_H
+ 0x353
+
+
+ TA0CCR1
+ 0x354
+
+
+ TA0CCR1_L
+ 0x354
+
+
+ TA0CCR1_H
+ 0x355
+
+
+ TA0CCR2
+ 0x356
+
+
+ TA0CCR2_L
+ 0x356
+
+
+ TA0CCR2_H
+ 0x357
+
+
+ TA0EX0
+ 0x360
+
+
+ TA0EX0_L
+ 0x360
+
+
+ TA0EX0_H
+ 0x361
+
+
+ TA0IV
+ 0x36e
+
+
+ TA0IV_L
+ 0x36e
+
+
+ TA0IV_H
+ 0x36f
+
+
+ TA1CTL
+ 0x380
+
+
+ TA1CTL_L
+ 0x380
+
+
+ TA1CTL_H
+ 0x381
+
+
+ TA1CCTL0
+ 0x382
+
+
+ TA1CCTL0_L
+ 0x382
+
+
+ TA1CCTL0_H
+ 0x383
+
+
+ TA1CCTL1
+ 0x384
+
+
+ TA1CCTL1_L
+ 0x384
+
+
+ TA1CCTL1_H
+ 0x385
+
+
+ TA1CCTL2
+ 0x386
+
+
+ TA1CCTL2_L
+ 0x386
+
+
+ TA1CCTL2_H
+ 0x387
+
+
+ TA1R
+ 0x390
+
+
+ TA1R_L
+ 0x390
+
+
+ TA1R_H
+ 0x391
+
+
+ TA1CCR0
+ 0x392
+
+
+ TA1CCR0_L
+ 0x392
+
+
+ TA1CCR0_H
+ 0x393
+
+
+ TA1CCR1
+ 0x394
+
+
+ TA1CCR1_L
+ 0x394
+
+
+ TA1CCR1_H
+ 0x395
+
+
+ TA1CCR2
+ 0x396
+
+
+ TA1CCR2_L
+ 0x396
+
+
+ TA1CCR2_H
+ 0x397
+
+
+ TA1EX0
+ 0x3a0
+
+
+ TA1EX0_L
+ 0x3a0
+
+
+ TA1EX0_H
+ 0x3a1
+
+
+ TA1IV
+ 0x3ae
+
+
+ TA1IV_L
+ 0x3ae
+
+
+ TA1IV_H
+ 0x3af
+
+
+ TA2CTL
+ 0x400
+
+
+ TA2CTL_L
+ 0x400
+
+
+ TA2CTL_H
+ 0x401
+
+
+ TA2CCTL0
+ 0x402
+
+
+ TA2CCTL0_L
+ 0x402
+
+
+ TA2CCTL0_H
+ 0x403
+
+
+ TA2CCTL1
+ 0x404
+
+
+ TA2CCTL1_L
+ 0x404
+
+
+ TA2CCTL1_H
+ 0x405
+
+
+ TA2R
+ 0x410
+
+
+ TA2R_L
+ 0x410
+
+
+ TA2R_H
+ 0x411
+
+
+ TA2CCR0
+ 0x412
+
+
+ TA2CCR0_L
+ 0x412
+
+
+ TA2CCR0_H
+ 0x413
+
+
+ TA2CCR1
+ 0x414
+
+
+ TA2CCR1_L
+ 0x414
+
+
+ TA2CCR1_H
+ 0x415
+
+
+ TA2EX0
+ 0x420
+
+
+ TA2EX0_L
+ 0x420
+
+
+ TA2EX0_H
+ 0x421
+
+
+ TA2IV
+ 0x42e
+
+
+ TA2IV_L
+ 0x42e
+
+
+ TA2IV_H
+ 0x42f
+
+
+ TA3CTL
+ 0x440
+
+
+ TA3CTL_L
+ 0x440
+
+
+ TA3CTL_H
+ 0x441
+
+
+ TA3CCTL0
+ 0x442
+
+
+ TA3CCTL0_L
+ 0x442
+
+
+ TA3CCTL0_H
+ 0x443
+
+
+ TA3CCTL1
+ 0x444
+
+
+ TA3CCTL1_L
+ 0x444
+
+
+ TA3CCTL1_H
+ 0x445
+
+
+ TA3R
+ 0x450
+
+
+ TA3R_L
+ 0x450
+
+
+ TA3R_H
+ 0x451
+
+
+ TA3CCR0
+ 0x452
+
+
+ TA3CCR0_L
+ 0x452
+
+
+ TA3CCR0_H
+ 0x453
+
+
+ TA3CCR1
+ 0x454
+
+
+ TA3CCR1_L
+ 0x454
+
+
+ TA3CCR1_H
+ 0x455
+
+
+ TA3EX0
+ 0x460
+
+
+ TA3EX0_L
+ 0x460
+
+
+ TA3EX0_H
+ 0x461
+
+
+ TA3IV
+ 0x46e
+
+
+ TA3IV_L
+ 0x46e
+
+
+ TA3IV_H
+ 0x46f
+
+
+ TA4CTL
+ 0x7c0
+
+
+ TA4CTL_L
+ 0x7c0
+
+
+ TA4CTL_H
+ 0x7c1
+
+
+ TA4CCTL0
+ 0x7c2
+
+
+ TA4CCTL0_L
+ 0x7c2
+
+
+ TA4CCTL0_H
+ 0x7c3
+
+
+ TA4CCTL1
+ 0x7c4
+
+
+ TA4CCTL1_L
+ 0x7c4
+
+
+ TA4CCTL1_H
+ 0x7c5
+
+
+ TA4CCTL2
+ 0x7c6
+
+
+ TA4CCTL2_L
+ 0x7c6
+
+
+ TA4CCTL2_H
+ 0x7c7
+
+
+ TA4R
+ 0x7d0
+
+
+ TA4R_L
+ 0x7d0
+
+
+ TA4R_H
+ 0x7d1
+
+
+ TA4CCR0
+ 0x7d2
+
+
+ TA4CCR0_L
+ 0x7d2
+
+
+ TA4CCR0_H
+ 0x7d3
+
+
+ TA4CCR1
+ 0x7d4
+
+
+ TA4CCR1_L
+ 0x7d4
+
+
+ TA4CCR1_H
+ 0x7d5
+
+
+ TA4CCR2
+ 0x7d6
+
+
+ TA4CCR2_L
+ 0x7d6
+
+
+ TA4CCR2_H
+ 0x7d7
+
+
+ TA4EX0
+ 0x7e0
+
+
+ TA4EX0_L
+ 0x7e0
+
+
+ TA4EX0_H
+ 0x7e1
+
+
+ TA4IV
+ 0x7ee
+
+
+ TA4IV_L
+ 0x7ee
+
+
+ TA4IV_H
+ 0x7ef
+
+
+ TB0CTL
+ 0x3c0
+
+
+ TB0CTL_L
+ 0x3c0
+
+
+ TB0CTL_H
+ 0x3c1
+
+
+ TB0CCTL0
+ 0x3c2
+
+
+ TB0CCTL0_L
+ 0x3c2
+
+
+ TB0CCTL0_H
+ 0x3c3
+
+
+ TB0CCTL1
+ 0x3c4
+
+
+ TB0CCTL1_L
+ 0x3c4
+
+
+ TB0CCTL1_H
+ 0x3c5
+
+
+ TB0CCTL2
+ 0x3c6
+
+
+ TB0CCTL2_L
+ 0x3c6
+
+
+ TB0CCTL2_H
+ 0x3c7
+
+
+ TB0CCTL3
+ 0x3c8
+
+
+ TB0CCTL3_L
+ 0x3c8
+
+
+ TB0CCTL3_H
+ 0x3c9
+
+
+ TB0CCTL4
+ 0x3ca
+
+
+ TB0CCTL4_L
+ 0x3ca
+
+
+ TB0CCTL4_H
+ 0x3cb
+
+
+ TB0CCTL5
+ 0x3cc
+
+
+ TB0CCTL5_L
+ 0x3cc
+
+
+ TB0CCTL5_H
+ 0x3cd
+
+
+ TB0CCTL6
+ 0x3ce
+
+
+ TB0CCTL6_L
+ 0x3ce
+
+
+ TB0CCTL6_H
+ 0x3cf
+
+
+ TB0R
+ 0x3d0
+
+
+ TB0R_L
+ 0x3d0
+
+
+ TB0R_H
+ 0x3d1
+
+
+ TB0CCR0
+ 0x3d2
+
+
+ TB0CCR0_L
+ 0x3d2
+
+
+ TB0CCR0_H
+ 0x3d3
+
+
+ TB0CCR1
+ 0x3d4
+
+
+ TB0CCR1_L
+ 0x3d4
+
+
+ TB0CCR1_H
+ 0x3d5
+
+
+ TB0CCR2
+ 0x3d6
+
+
+ TB0CCR2_L
+ 0x3d6
+
+
+ TB0CCR2_H
+ 0x3d7
+
+
+ TB0CCR3
+ 0x3d8
+
+
+ TB0CCR3_L
+ 0x3d8
+
+
+ TB0CCR3_H
+ 0x3d9
+
+
+ TB0CCR4
+ 0x3da
+
+
+ TB0CCR4_L
+ 0x3da
+
+
+ TB0CCR4_H
+ 0x3db
+
+
+ TB0CCR5
+ 0x3dc
+
+
+ TB0CCR5_L
+ 0x3dc
+
+
+ TB0CCR5_H
+ 0x3dd
+
+
+ TB0CCR6
+ 0x3de
+
+
+ TB0CCR6_L
+ 0x3de
+
+
+ TB0CCR6_H
+ 0x3df
+
+
+ TB0EX0
+ 0x3e0
+
+
+ TB0EX0_L
+ 0x3e0
+
+
+ TB0EX0_H
+ 0x3e1
+
+
+ TB0IV
+ 0x3ee
+
+
+ TB0IV_L
+ 0x3ee
+
+
+ TB0IV_H
+ 0x3ef
+
+
+ WDTCTL
+ 0x15c
+
+
+ WDTCTL_L
+ 0x15c
+
+
+ WDTCTL_H
+ 0x15d
+
+
+ UCA0CTLW0
+ 0x5c0
+
+
+ UCA0CTLW0_L
+ 0x5c0
+
+
+ UCA0CTLW0_H
+ 0x5c1
+
+
+ UCA0CTLW1
+ 0x5c2
+
+
+ UCA0CTLW1_L
+ 0x5c2
+
+
+ UCA0CTLW1_H
+ 0x5c3
+
+
+ UCA0BRW
+ 0x5c6
+
+
+ UCA0BRW_L
+ 0x5c6
+
+
+ UCA0BRW_H
+ 0x5c7
+
+
+ UCA0MCTLW
+ 0x5c8
+
+
+ UCA0MCTLW_L
+ 0x5c8
+
+
+ UCA0MCTLW_H
+ 0x5c9
+
+
+ UCA0STATW
+ 0x5ca
+
+
+ UCA0STATW_L
+ 0x5ca
+
+
+ UCA0STATW_H
+ 0x5cb
+
+
+ UCA0RXBUF
+ 0x5cc
+
+
+ UCA0RXBUF_L
+ 0x5cc
+
+
+ UCA0RXBUF_H
+ 0x5cd
+
+
+ UCA0TXBUF
+ 0x5ce
+
+
+ UCA0TXBUF_L
+ 0x5ce
+
+
+ UCA0TXBUF_H
+ 0x5cf
+
+
+ UCA0ABCTL
+ 0x5d0
+
+
+ UCA0ABCTL_L
+ 0x5d0
+
+
+ UCA0ABCTL_H
+ 0x5d1
+
+
+ UCA0IRCTL
+ 0x5d2
+
+
+ UCA0IRCTL_L
+ 0x5d2
+
+
+ UCA0IRCTL_H
+ 0x5d3
+
+
+ UCA0IE
+ 0x5da
+
+
+ UCA0IE_L
+ 0x5da
+
+
+ UCA0IE_H
+ 0x5db
+
+
+ UCA0IFG
+ 0x5dc
+
+
+ UCA0IFG_L
+ 0x5dc
+
+
+ UCA0IFG_H
+ 0x5dd
+
+
+ UCA0IV
+ 0x5de
+
+
+ UCA0IV_L
+ 0x5de
+
+
+ UCA0IV_H
+ 0x5df
+
+
+ UCA1CTLW0
+ 0x5e0
+
+
+ UCA1CTLW0_L
+ 0x5e0
+
+
+ UCA1CTLW0_H
+ 0x5e1
+
+
+ UCA1CTLW1
+ 0x5e2
+
+
+ UCA1CTLW1_L
+ 0x5e2
+
+
+ UCA1CTLW1_H
+ 0x5e3
+
+
+ UCA1BRW
+ 0x5e6
+
+
+ UCA1BRW_L
+ 0x5e6
+
+
+ UCA1BRW_H
+ 0x5e7
+
+
+ UCA1MCTLW
+ 0x5e8
+
+
+ UCA1MCTLW_L
+ 0x5e8
+
+
+ UCA1MCTLW_H
+ 0x5e9
+
+
+ UCA1STATW
+ 0x5ea
+
+
+ UCA1STATW_L
+ 0x5ea
+
+
+ UCA1STATW_H
+ 0x5eb
+
+
+ UCA1RXBUF
+ 0x5ec
+
+
+ UCA1RXBUF_L
+ 0x5ec
+
+
+ UCA1RXBUF_H
+ 0x5ed
+
+
+ UCA1TXBUF
+ 0x5ee
+
+
+ UCA1TXBUF_L
+ 0x5ee
+
+
+ UCA1TXBUF_H
+ 0x5ef
+
+
+ UCA1ABCTL
+ 0x5f0
+
+
+ UCA1ABCTL_L
+ 0x5f0
+
+
+ UCA1ABCTL_H
+ 0x5f1
+
+
+ UCA1IRCTL
+ 0x5f2
+
+
+ UCA1IRCTL_L
+ 0x5f2
+
+
+ UCA1IRCTL_H
+ 0x5f3
+
+
+ UCA1IE
+ 0x5fa
+
+
+ UCA1IE_L
+ 0x5fa
+
+
+ UCA1IE_H
+ 0x5fb
+
+
+ UCA1IFG
+ 0x5fc
+
+
+ UCA1IFG_L
+ 0x5fc
+
+
+ UCA1IFG_H
+ 0x5fd
+
+
+ UCA1IV
+ 0x5fe
+
+
+ UCA1IV_L
+ 0x5fe
+
+
+ UCA1IV_H
+ 0x5ff
+
+
+ UCA2CTLW0
+ 0x600
+
+
+ UCA2CTLW0_L
+ 0x600
+
+
+ UCA2CTLW0_H
+ 0x601
+
+
+ UCA2CTLW1
+ 0x602
+
+
+ UCA2CTLW1_L
+ 0x602
+
+
+ UCA2CTLW1_H
+ 0x603
+
+
+ UCA2BRW
+ 0x606
+
+
+ UCA2BRW_L
+ 0x606
+
+
+ UCA2BRW_H
+ 0x607
+
+
+ UCA2MCTLW
+ 0x608
+
+
+ UCA2MCTLW_L
+ 0x608
+
+
+ UCA2MCTLW_H
+ 0x609
+
+
+ UCA2STATW
+ 0x60a
+
+
+ UCA2STATW_L
+ 0x60a
+
+
+ UCA2STATW_H
+ 0x60b
+
+
+ UCA2RXBUF
+ 0x60c
+
+
+ UCA2RXBUF_L
+ 0x60c
+
+
+ UCA2RXBUF_H
+ 0x60d
+
+
+ UCA2TXBUF
+ 0x60e
+
+
+ UCA2TXBUF_L
+ 0x60e
+
+
+ UCA2TXBUF_H
+ 0x60f
+
+
+ UCA2ABCTL
+ 0x610
+
+
+ UCA2ABCTL_L
+ 0x610
+
+
+ UCA2ABCTL_H
+ 0x611
+
+
+ UCA2IRCTL
+ 0x612
+
+
+ UCA2IRCTL_L
+ 0x612
+
+
+ UCA2IRCTL_H
+ 0x613
+
+
+ UCA2IE
+ 0x61a
+
+
+ UCA2IE_L
+ 0x61a
+
+
+ UCA2IE_H
+ 0x61b
+
+
+ UCA2IFG
+ 0x61c
+
+
+ UCA2IFG_L
+ 0x61c
+
+
+ UCA2IFG_H
+ 0x61d
+
+
+ UCA2IV
+ 0x61e
+
+
+ UCA2IV_L
+ 0x61e
+
+
+ UCA2IV_H
+ 0x61f
+
+
+ UCA3CTLW0
+ 0x620
+
+
+ UCA3CTLW0_L
+ 0x620
+
+
+ UCA3CTLW0_H
+ 0x621
+
+
+ UCA3CTLW1
+ 0x622
+
+
+ UCA3CTLW1_L
+ 0x622
+
+
+ UCA3CTLW1_H
+ 0x623
+
+
+ UCA3BRW
+ 0x626
+
+
+ UCA3BRW_L
+ 0x626
+
+
+ UCA3BRW_H
+ 0x627
+
+
+ UCA3MCTLW
+ 0x628
+
+
+ UCA3MCTLW_L
+ 0x628
+
+
+ UCA3MCTLW_H
+ 0x629
+
+
+ UCA3STATW
+ 0x62a
+
+
+ UCA3STATW_L
+ 0x62a
+
+
+ UCA3STATW_H
+ 0x62b
+
+
+ UCA3RXBUF
+ 0x62c
+
+
+ UCA3RXBUF_L
+ 0x62c
+
+
+ UCA3RXBUF_H
+ 0x62d
+
+
+ UCA3TXBUF
+ 0x62e
+
+
+ UCA3TXBUF_L
+ 0x62e
+
+
+ UCA3TXBUF_H
+ 0x62f
+
+
+ UCA3ABCTL
+ 0x630
+
+
+ UCA3ABCTL_L
+ 0x630
+
+
+ UCA3ABCTL_H
+ 0x631
+
+
+ UCA3IRCTL
+ 0x632
+
+
+ UCA3IRCTL_L
+ 0x632
+
+
+ UCA3IRCTL_H
+ 0x633
+
+
+ UCA3IE
+ 0x63a
+
+
+ UCA3IE_L
+ 0x63a
+
+
+ UCA3IE_H
+ 0x63b
+
+
+ UCA3IFG
+ 0x63c
+
+
+ UCA3IFG_L
+ 0x63c
+
+
+ UCA3IFG_H
+ 0x63d
+
+
+ UCA3IV
+ 0x63e
+
+
+ UCA3IV_L
+ 0x63e
+
+
+ UCA3IV_H
+ 0x63f
+
+
+ UCB0CTLW0
+ 0x640
+
+
+ UCB0CTLW0_L
+ 0x640
+
+
+ UCB0CTLW0_H
+ 0x641
+
+
+ UCB0CTLW1
+ 0x642
+
+
+ UCB0CTLW1_L
+ 0x642
+
+
+ UCB0CTLW1_H
+ 0x643
+
+
+ UCB0BRW
+ 0x646
+
+
+ UCB0BRW_L
+ 0x646
+
+
+ UCB0BRW_H
+ 0x647
+
+
+ UCB0STATW
+ 0x648
+
+
+ UCB0STATW_L
+ 0x648
+
+
+ UCB0STATW_H
+ 0x649
+
+
+ UCB0TBCNT
+ 0x64a
+
+
+ UCB0TBCNT_L
+ 0x64a
+
+
+ UCB0TBCNT_H
+ 0x64b
+
+
+ UCB0RXBUF
+ 0x64c
+
+
+ UCB0RXBUF_L
+ 0x64c
+
+
+ UCB0RXBUF_H
+ 0x64d
+
+
+ UCB0TXBUF
+ 0x64e
+
+
+ UCB0TXBUF_L
+ 0x64e
+
+
+ UCB0TXBUF_H
+ 0x64f
+
+
+ UCB0I2COA0
+ 0x654
+
+
+ UCB0I2COA0_L
+ 0x654
+
+
+ UCB0I2COA0_H
+ 0x655
+
+
+ UCB0I2COA1
+ 0x656
+
+
+ UCB0I2COA1_L
+ 0x656
+
+
+ UCB0I2COA1_H
+ 0x657
+
+
+ UCB0I2COA2
+ 0x658
+
+
+ UCB0I2COA2_L
+ 0x658
+
+
+ UCB0I2COA2_H
+ 0x659
+
+
+ UCB0I2COA3
+ 0x65a
+
+
+ UCB0I2COA3_L
+ 0x65a
+
+
+ UCB0I2COA3_H
+ 0x65b
+
+
+ UCB0ADDRX
+ 0x65c
+
+
+ UCB0ADDRX_L
+ 0x65c
+
+
+ UCB0ADDRX_H
+ 0x65d
+
+
+ UCB0ADDMASK
+ 0x65e
+
+
+ UCB0ADDMASK_L
+ 0x65e
+
+
+ UCB0ADDMASK_H
+ 0x65f
+
+
+ UCB0I2CSA
+ 0x660
+
+
+ UCB0I2CSA_L
+ 0x660
+
+
+ UCB0I2CSA_H
+ 0x661
+
+
+ UCB0IE
+ 0x66a
+
+
+ UCB0IE_L
+ 0x66a
+
+
+ UCB0IE_H
+ 0x66b
+
+
+ UCB0IFG
+ 0x66c
+
+
+ UCB0IFG_L
+ 0x66c
+
+
+ UCB0IFG_H
+ 0x66d
+
+
+ UCB0IV
+ 0x66e
+
+
+ UCB0IV_L
+ 0x66e
+
+
+ UCB0IV_H
+ 0x66f
+
+
+ UCB1CTLW0
+ 0x680
+
+
+ UCB1CTLW0_L
+ 0x680
+
+
+ UCB1CTLW0_H
+ 0x681
+
+
+ UCB1CTLW1
+ 0x682
+
+
+ UCB1CTLW1_L
+ 0x682
+
+
+ UCB1CTLW1_H
+ 0x683
+
+
+ UCB1BRW
+ 0x686
+
+
+ UCB1BRW_L
+ 0x686
+
+
+ UCB1BRW_H
+ 0x687
+
+
+ UCB1STATW
+ 0x688
+
+
+ UCB1STATW_L
+ 0x688
+
+
+ UCB1STATW_H
+ 0x689
+
+
+ UCB1TBCNT
+ 0x68a
+
+
+ UCB1TBCNT_L
+ 0x68a
+
+
+ UCB1TBCNT_H
+ 0x68b
+
+
+ UCB1RXBUF
+ 0x68c
+
+
+ UCB1RXBUF_L
+ 0x68c
+
+
+ UCB1RXBUF_H
+ 0x68d
+
+
+ UCB1TXBUF
+ 0x68e
+
+
+ UCB1TXBUF_L
+ 0x68e
+
+
+ UCB1TXBUF_H
+ 0x68f
+
+
+ UCB1I2COA0
+ 0x694
+
+
+ UCB1I2COA0_L
+ 0x694
+
+
+ UCB1I2COA0_H
+ 0x695
+
+
+ UCB1I2COA1
+ 0x696
+
+
+ UCB1I2COA1_L
+ 0x696
+
+
+ UCB1I2COA1_H
+ 0x697
+
+
+ UCB1I2COA2
+ 0x698
+
+
+ UCB1I2COA2_L
+ 0x698
+
+
+ UCB1I2COA2_H
+ 0x699
+
+
+ UCB1I2COA3
+ 0x69a
+
+
+ UCB1I2COA3_L
+ 0x69a
+
+
+ UCB1I2COA3_H
+ 0x69b
+
+
+ UCB1ADDRX
+ 0x69c
+
+
+ UCB1ADDRX_L
+ 0x69c
+
+
+ UCB1ADDRX_H
+ 0x69d
+
+
+ UCB1ADDMASK
+ 0x69e
+
+
+ UCB1ADDMASK_L
+ 0x69e
+
+
+ UCB1ADDMASK_H
+ 0x69f
+
+
+ UCB1I2CSA
+ 0x6a0
+
+
+ UCB1I2CSA_L
+ 0x6a0
+
+
+ UCB1I2CSA_H
+ 0x6a1
+
+
+ UCB1IE
+ 0x6aa
+
+
+ UCB1IE_L
+ 0x6aa
+
+
+ UCB1IE_H
+ 0x6ab
+
+
+ UCB1IFG
+ 0x6ac
+
+
+ UCB1IFG_L
+ 0x6ac
+
+
+ UCB1IFG_H
+ 0x6ad
+
+
+ UCB1IV
+ 0x6ae
+
+
+ UCB1IV_L
+ 0x6ae
+
+
+ UCB1IV_H
+ 0x6af
+
+
+ UCB2CTLW0
+ 0x6c0
+
+
+ UCB2CTLW0_L
+ 0x6c0
+
+
+ UCB2CTLW0_H
+ 0x6c1
+
+
+ UCB2CTLW1
+ 0x6c2
+
+
+ UCB2CTLW1_L
+ 0x6c2
+
+
+ UCB2CTLW1_H
+ 0x6c3
+
+
+ UCB2BRW
+ 0x6c6
+
+
+ UCB2BRW_L
+ 0x6c6
+
+
+ UCB2BRW_H
+ 0x6c7
+
+
+ UCB2STATW
+ 0x6c8
+
+
+ UCB2STATW_L
+ 0x6c8
+
+
+ UCB2STATW_H
+ 0x6c9
+
+
+ UCB2TBCNT
+ 0x6ca
+
+
+ UCB2TBCNT_L
+ 0x6ca
+
+
+ UCB2TBCNT_H
+ 0x6cb
+
+
+ UCB2RXBUF
+ 0x6cc
+
+
+ UCB2RXBUF_L
+ 0x6cc
+
+
+ UCB2RXBUF_H
+ 0x6cd
+
+
+ UCB2TXBUF
+ 0x6ce
+
+
+ UCB2TXBUF_L
+ 0x6ce
+
+
+ UCB2TXBUF_H
+ 0x6cf
+
+
+ UCB2I2COA0
+ 0x6d4
+
+
+ UCB2I2COA0_L
+ 0x6d4
+
+
+ UCB2I2COA0_H
+ 0x6d5
+
+
+ UCB2I2COA1
+ 0x6d6
+
+
+ UCB2I2COA1_L
+ 0x6d6
+
+
+ UCB2I2COA1_H
+ 0x6d7
+
+
+ UCB2I2COA2
+ 0x6d8
+
+
+ UCB2I2COA2_L
+ 0x6d8
+
+
+ UCB2I2COA2_H
+ 0x6d9
+
+
+ UCB2I2COA3
+ 0x6da
+
+
+ UCB2I2COA3_L
+ 0x6da
+
+
+ UCB2I2COA3_H
+ 0x6db
+
+
+ UCB2ADDRX
+ 0x6dc
+
+
+ UCB2ADDRX_L
+ 0x6dc
+
+
+ UCB2ADDRX_H
+ 0x6dd
+
+
+ UCB2ADDMASK
+ 0x6de
+
+
+ UCB2ADDMASK_L
+ 0x6de
+
+
+ UCB2ADDMASK_H
+ 0x6df
+
+
+ UCB2I2CSA
+ 0x6e0
+
+
+ UCB2I2CSA_L
+ 0x6e0
+
+
+ UCB2I2CSA_H
+ 0x6e1
+
+
+ UCB2IE
+ 0x6ea
+
+
+ UCB2IE_L
+ 0x6ea
+
+
+ UCB2IE_H
+ 0x6eb
+
+
+ UCB2IFG
+ 0x6ec
+
+
+ UCB2IFG_L
+ 0x6ec
+
+
+ UCB2IFG_H
+ 0x6ed
+
+
+ UCB2IV
+ 0x6ee
+
+
+ UCB2IV_L
+ 0x6ee
+
+
+ UCB2IV_H
+ 0x6ef
+
+
+ UCB3CTLW0
+ 0x700
+
+
+ UCB3CTLW0_L
+ 0x700
+
+
+ UCB3CTLW0_H
+ 0x701
+
+
+ UCB3CTLW1
+ 0x702
+
+
+ UCB3CTLW1_L
+ 0x702
+
+
+ UCB3CTLW1_H
+ 0x703
+
+
+ UCB3BRW
+ 0x706
+
+
+ UCB3BRW_L
+ 0x706
+
+
+ UCB3BRW_H
+ 0x707
+
+
+ UCB3STATW
+ 0x708
+
+
+ UCB3STATW_L
+ 0x708
+
+
+ UCB3STATW_H
+ 0x709
+
+
+ UCB3TBCNT
+ 0x70a
+
+
+ UCB3TBCNT_L
+ 0x70a
+
+
+ UCB3TBCNT_H
+ 0x70b
+
+
+ UCB3RXBUF
+ 0x70c
+
+
+ UCB3RXBUF_L
+ 0x70c
+
+
+ UCB3RXBUF_H
+ 0x70d
+
+
+ UCB3TXBUF
+ 0x70e
+
+
+ UCB3TXBUF_L
+ 0x70e
+
+
+ UCB3TXBUF_H
+ 0x70f
+
+
+ UCB3I2COA0
+ 0x714
+
+
+ UCB3I2COA0_L
+ 0x714
+
+
+ UCB3I2COA0_H
+ 0x715
+
+
+ UCB3I2COA1
+ 0x716
+
+
+ UCB3I2COA1_L
+ 0x716
+
+
+ UCB3I2COA1_H
+ 0x717
+
+
+ UCB3I2COA2
+ 0x718
+
+
+ UCB3I2COA2_L
+ 0x718
+
+
+ UCB3I2COA2_H
+ 0x719
+
+
+ UCB3I2COA3
+ 0x71a
+
+
+ UCB3I2COA3_L
+ 0x71a
+
+
+ UCB3I2COA3_H
+ 0x71b
+
+
+ UCB3ADDRX
+ 0x71c
+
+
+ UCB3ADDRX_L
+ 0x71c
+
+
+ UCB3ADDRX_H
+ 0x71d
+
+
+ UCB3ADDMASK
+ 0x71e
+
+
+ UCB3ADDMASK_L
+ 0x71e
+
+
+ UCB3ADDMASK_H
+ 0x71f
+
+
+ UCB3I2CSA
+ 0x720
+
+
+ UCB3I2CSA_L
+ 0x720
+
+
+ UCB3I2CSA_H
+ 0x721
+
+
+ UCB3IE
+ 0x72a
+
+
+ UCB3IE_L
+ 0x72a
+
+
+ UCB3IE_H
+ 0x72b
+
+
+ UCB3IFG
+ 0x72c
+
+
+ UCB3IFG_L
+ 0x72c
+
+
+ UCB3IFG_H
+ 0x72d
+
+
+ UCB3IV
+ 0x72e
+
+
+ UCB3IV_L
+ 0x72e
+
+
+ UCB3IV_H
+ 0x72f
+
+
+ fram_rw_start
+ 0x4000
+
+
+ fram_ipe_start
+ 0x4000
+
+
+ fram_ipe_end
+ 0x4000
+
+
+ fram_rx_start
+ 0x4000
+
+
+ __TI_table_binit
+ 0x48a8
+
+
+ __TI_CINIT_Base
+ 0x4898
+
+
+ __TI_CINIT_Limit
+ 0x48a8
+
+
+ __TI_Handler_Table_Base
+ 0x4880
+
+
+ __TI_Handler_Table_Limit
+ 0x488c
+
+
+ __TI_BINIT_Base
+ 0x48a8
+
+
+ __TI_BINIT_Limit
+ 0x48b8
+
+
+ __STACK_SIZE
+ 0xa0
+
+
+ __STACK_END
+ 0x2c00
+
+
+ __c_args__
+ 0xffffffff
+
+
+ __TI_pprof_out_hndl
+ 0xffffffff
+
+
+ __TI_prof_data_start
+ 0xffffffff
+
+
+ __TI_prof_data_size
+ 0xffffffff
+
+
+ initializeGpios
+ 0x105be
+
+
+
+ g_rxBuffer
+ 0x249c
+
+
+ g_txBuffer
+ 0x24a4
+
+
+ g_rxBufferIdx
+ 0x24fb
+
+
+ g_txBufferIdx
+ 0x2500
+
+
+ g_rxByteCtr
+ 0x24fc
+
+
+ g_txByteCtr
+ 0x2501
+
+
+ g_slaveMode
+ 0x24ea
+
+
+ g_i2cSlaveAddress
+ 0x24f6
+
+
+ g_readRegAddr
+ 0x24fa
+
+
+ g_transmitCurrentPosition
+ 0x24ee
+
+
+ g_i2cCmdLength
+ 0x2484
+
+
+ initializeI2cModule
+ 0x106ea
+
+
+
+ __TI_int47
+ 0xffee
+
+
+
+ USCI_B0_ISR
+ 0x22ca
+
+
+
+ initializeCmdLength
+ 0x10af2
+
+
+
+ copyArray
+ 0x10ddc
+
+
+
+ i2cSlaveTransactionDone
+ 0x10396
+
+
+
+ g_currentPhaseA
+ 0x24c2
+
+
+ g_currentPhaseB
+ 0x24c6
+
+
+ g_currentPhaseC
+ 0x24ca
+
+
+ g_calibrating
+ 0x24f0
+
+
+ g_calibrationDone
+ 0x24f1
+
+
+ g_currentOffsetPhaseA
+ 0x24b6
+
+
+ g_currentOffsetPhaseB
+ 0x24ba
+
+
+ g_currentOffsetPhaseC
+ 0x24be
+
+
+ g_currentSpeed
+ 0x24d2
+
+
+ g_openLoopTorque
+ 0x24de
+
+
+ g_closeLoopThreshold
+ 0x24b2
+
+
+ g_commState
+ 0x24f3
+
+
+ g_oldCommState
+ 0x24f9
+
+
+ g_hallSensor
+ 0x24d6
+
+
+ g_currentPosition
+ 0x24ce
+
+
+ g_oldPosition
+ 0x24da
+
+
+ g_targetPosition
+ 0x24e2
+
+
+ g_controlPrescaler
+ 0x24e8
+
+
+ g_hallMap
+ 0x2494
+
+
+ g_piSpd
+ 0x2456
+
+
+ g_piCur
+ 0x2428
+
+
+ g_impulse
+ 0x24ac
+
+
+ g_mod6cnt
+ 0x24f8
+
+
+ g_closedLoop
+ 0x24f2
+
+
+ g_targetReached
+ 0x24ff
+
+
+ g_maxSpeed
+ 0x24f7
+
+
+ g_state
+ 0x24ec
+
+
+ g_cmdState
+ 0x24e6
+
+
+ g_targetDirection
+ 0x24fe
+
+
+ g_statusRegister
+ 0x24fd
+
+
+ g_controlRegister
+ 0x24f4
+
+
+ g_faultRegister
+ 0x24f5
+
+
+ read_driver_fault
+ 0x10e4c
+
+
+
+ resetPiController
+ 0x10cb4
+
+
+
+ currentOffsetCalibration
+ 0x10928
+
+
+
+ initializePwmModules
+ 0x102be
+
+
+
+ __TI_int51
+ 0xfff6
+
+
+
+ initializeHallInterface
+ 0x10d0a
+
+
+
+ main
+ 0x10000
+
+
+
+ initializeAdcModule
+ 0x1044e
+
+
+
+ driveOpenLoop
+ 0x2502
+
+
+
+ updateStateMachine
+ 0x10506
+
+
+
+ TIMER0_B0_ISR
+ 0x1c00
+
+
+
+ ADC12_B_setResolution
+ 0x10e16
+
+
+
+ ADC12_B_configureMemory
+ 0x10bac
+
+
+
+ ADC12_B_init
+ 0x10662
+
+
+
+ ADC12_B_enable
+ 0x10e26
+
+
+
+ ADC12_B_setupSamplingTimer
+ 0x10d56
+
+
+
+ ADC12_B_startConversion
+ 0x10c58
+
+
+
+ CS_setDCOFreq
+ 0x101ce
+
+
+
+ CS_initClockSignal
+ 0x10a5a
+
+
+
+ EUSCI_B_I2C_clearInterrupt
+ 0x10e34
+
+
+
+ EUSCI_B_I2C_initSlave
+ 0x10ce0
+
+
+
+ EUSCI_B_I2C_enableInterrupt
+ 0x10e40
+
+
+
+ EUSCI_B_I2C_enable
+ 0x10e62
+
+
+
+ GPIO_setAsInputPin
+ 0x10ab0
+
+
+
+ GPIO_setOutputHighOnPin
+ 0x10d76
+
+
+
+ GPIO_setAsOutputPin
+ 0x10be8
+
+
+
+ GPIO_setOutputLowOnPin
+ 0x10d92
+
+
+
+ GPIO_setAsPeripheralModuleFunctionOutputPin
+ 0x108c0
+
+
+
+ GPIO_setAsPeripheralModuleFunctionInputPin
+ 0x10854
+
+
+
+ Timer_B_initUpDownMode
+ 0x10768
+
+
+
+ Timer_B_initCompareMode
+ 0x10c20
+
+
+
+ Timer_B_clearCaptureCompareInterrupt
+ 0x10e58
+
+
+
+ WDT_A_hold
+ 0x10dc6
+
+
+
+ __TI_decompress_lzss
+ 0x107de
+
+
+
+ __TI_decompress_none
+ 0x10e04
+
+
+
+ __TI_int18
+ 0xffb4
+
+
+
+ __TI_ISR_TRAP
+ 0x4020
+
+
+
+ __TI_int19
+ 0xffb6
+
+
+
+ __TI_int20
+ 0xffb8
+
+
+
+ __TI_int21
+ 0xffba
+
+
+
+ __TI_int22
+ 0xffbc
+
+
+
+ __TI_int23
+ 0xffbe
+
+
+
+ __TI_int24
+ 0xffc0
+
+
+
+ __TI_int25
+ 0xffc2
+
+
+
+ __TI_int26
+ 0xffc4
+
+
+
+ __TI_int27
+ 0xffc6
+
+
+
+ __TI_int28
+ 0xffc8
+
+
+
+ __TI_int29
+ 0xffca
+
+
+
+ __TI_int30
+ 0xffcc
+
+
+
+ __TI_int31
+ 0xffce
+
+
+
+ __TI_int32
+ 0xffd0
+
+
+
+ __TI_int33
+ 0xffd2
+
+
+
+ __TI_int34
+ 0xffd4
+
+
+
+ __TI_int35
+ 0xffd6
+
+
+
+ __TI_int36
+ 0xffd8
+
+
+
+ __TI_int37
+ 0xffda
+
+
+
+ __TI_int38
+ 0xffdc
+
+
+
+ __TI_int39
+ 0xffde
+
+
+
+ __TI_int40
+ 0xffe0
+
+
+
+ __TI_int41
+ 0xffe2
+
+
+
+ __TI_int42
+ 0xffe4
+
+
+
+ __TI_int43
+ 0xffe6
+
+
+
+ __TI_int44
+ 0xffe8
+
+
+
+ __TI_int45
+ 0xffea
+
+
+
+ __TI_int46
+ 0xffec
+
+
+
+ __TI_int48
+ 0xfff0
+
+
+
+ __TI_int49
+ 0xfff2
+
+
+
+ __TI_int50
+ 0xfff4
+
+
+
+ __TI_int52
+ 0xfff8
+
+
+
+ __TI_int53
+ 0xfffa
+
+
+
+ __TI_int54
+ 0xfffc
+
+
+
+ __TI_zero_init_nomemset
+ 0x10d32
+
+
+
+ __mspabi_mpyi_f5hw
+ 0x10dae
+
+
+
+ __mspabi_slll_9
+ 0x10b48
+
+
+
+ __mspabi_slll_8
+ 0x10b4c
+
+
+
+ __mspabi_slll_7
+ 0x10b50
+
+
+
+ __mspabi_slll_6
+ 0x10b54
+
+
+
+ __mspabi_slll_5
+ 0x10b58
+
+
+
+ __mspabi_slll_4
+ 0x10b5c
+
+
+
+ __mspabi_slll_3
+ 0x10b60
+
+
+
+ __mspabi_slll_2
+ 0x10b64
+
+
+
+ __mspabi_slll_1
+ 0x10b68
+
+
+
+ __mspabi_slll_15
+ 0x10b30
+
+
+
+ __mspabi_slll_14
+ 0x10b34
+
+
+
+ __mspabi_slll_13
+ 0x10b38
+
+
+
+ __mspabi_slll_12
+ 0x10b3c
+
+
+
+ __mspabi_slll_11
+ 0x10b40
+
+
+
+ __mspabi_slll_10
+ 0x10b44
+
+
+
+ __mspabi_srll_8
+ 0x10b8a
+
+
+
+ __mspabi_srll_9
+ 0x10b86
+
+
+
+ __mspabi_srll_6
+ 0x10b92
+
+
+
+ __mspabi_srll_7
+ 0x10b8e
+
+
+
+ __mspabi_srll_4
+ 0x10b9a
+
+
+
+ __mspabi_srll_5
+ 0x10b96
+
+
+
+ __mspabi_srll_2
+ 0x10ba2
+
+
+
+ __mspabi_srll_3
+ 0x10b9e
+
+
+
+ __mspabi_srll_1
+ 0x10ba6
+
+
+
+ __mspabi_srll_15
+ 0x10b6e
+
+
+
+ __mspabi_srll_14
+ 0x10b72
+
+
+
+ __mspabi_srll_13
+ 0x10b76
+
+
+
+ __mspabi_srll_12
+ 0x10b7a
+
+
+
+ __mspabi_srll_11
+ 0x10b7e
+
+
+
+ __mspabi_srll_10
+ 0x10b82
+
+
+
+ _c_int00_noargs_mpu
+ 0x4000
+
+
+
+ _stack
+ 0x2b60
+
+
+
+ _reset_vector
+ 0xfffe
+
+
+
+ __mpu_init
+ 0x10c88
+
+
+
+ __TI_auto_init_nopinit_hold_wdt
+ 0x10990
+
+
+
+ _system_post_cinit
+ 0x10e72
+
+
+
+ _system_pre_init
+ 0x10e6e
+
+
+
+ copy_in
+ 0x109f6
+
+
+
+ C$$EXIT
+ 0x10e68
+
+
+
+ abort
+ 0x10e68
+
+
+
+ memcpy
+ 0x10df0
+
+
+
+ Link successful
+
diff --git a/Apps/FlightSoftware/MotorControl/Release/bsp.d b/Apps/FlightSoftware/MotorControl/Release/bsp.d
new file mode 100644
index 000000000..361aebd9d
--- /dev/null
+++ b/Apps/FlightSoftware/MotorControl/Release/bsp.d
@@ -0,0 +1,109 @@
+# FIXED
+
+bsp.obj: ../bsp.c
+bsp.obj: ../bsp.h
+bsp.obj: E:/xprize/Documents/MotorControlDev/MotorControl/MotorControl/driverlib/driverlib.h
+bsp.obj: E:/xprize/Documents/MotorControlDev/MotorControl/MotorControl/driverlib/inc/hw_memmap.h
+bsp.obj: C:/ti/ccs930/ccs/ccs_base/msp430/include/msp430.h
+bsp.obj: C:/ti/ccs930/ccs/ccs_base/msp430/include/msp430fr5994.h
+bsp.obj: C:/ti/ccs930/ccs/ccs_base/msp430/include/in430.h
+bsp.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/intrinsics.h
+bsp.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/intrinsics_legacy_undefs.h
+bsp.obj: C:/ti/ccs930/ccs/ccs_base/msp430/include/legacy.h
+bsp.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/stdint.h
+bsp.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/_stdint40.h
+bsp.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/stdint.h
+bsp.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/cdefs.h
+bsp.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/_types.h
+bsp.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/machine/_types.h
+bsp.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/machine/_stdint.h
+bsp.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/_stdint.h
+bsp.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/stdbool.h
+bsp.obj: E:/xprize/Documents/MotorControlDev/MotorControl/MotorControl/driverlib/hspll.h
+bsp.obj: E:/xprize/Documents/MotorControlDev/MotorControl/MotorControl/driverlib/sysctl.h
+bsp.obj: E:/xprize/Documents/MotorControlDev/MotorControl/MotorControl/driverlib/dma.h
+bsp.obj: E:/xprize/Documents/MotorControlDev/MotorControl/MotorControl/driverlib/eusci_b_i2c.h
+bsp.obj: E:/xprize/Documents/MotorControlDev/MotorControl/MotorControl/driverlib/rtc_b.h
+bsp.obj: E:/xprize/Documents/MotorControlDev/MotorControl/MotorControl/driverlib/crc.h
+bsp.obj: E:/xprize/Documents/MotorControlDev/MotorControl/MotorControl/driverlib/adc12_b.h
+bsp.obj: E:/xprize/Documents/MotorControlDev/MotorControl/MotorControl/driverlib/esi.h
+bsp.obj: E:/xprize/Documents/MotorControlDev/MotorControl/MotorControl/driverlib/saph.h
+bsp.obj: E:/xprize/Documents/MotorControlDev/MotorControl/MotorControl/driverlib/cs.h
+bsp.obj: E:/xprize/Documents/MotorControlDev/MotorControl/MotorControl/driverlib/ram.h
+bsp.obj: E:/xprize/Documents/MotorControlDev/MotorControl/MotorControl/driverlib/mpy32.h
+bsp.obj: E:/xprize/Documents/MotorControlDev/MotorControl/MotorControl/driverlib/crc32.h
+bsp.obj: E:/xprize/Documents/MotorControlDev/MotorControl/MotorControl/driverlib/comp_e.h
+bsp.obj: E:/xprize/Documents/MotorControlDev/MotorControl/MotorControl/driverlib/framctl.h
+bsp.obj: E:/xprize/Documents/MotorControlDev/MotorControl/MotorControl/driverlib/aes256.h
+bsp.obj: E:/xprize/Documents/MotorControlDev/MotorControl/MotorControl/driverlib/sfr.h
+bsp.obj: E:/xprize/Documents/MotorControlDev/MotorControl/MotorControl/driverlib/wdt_a.h
+bsp.obj: E:/xprize/Documents/MotorControlDev/MotorControl/MotorControl/driverlib/timer_a.h
+bsp.obj: E:/xprize/Documents/MotorControlDev/MotorControl/MotorControl/driverlib/pmm.h
+bsp.obj: E:/xprize/Documents/MotorControlDev/MotorControl/MotorControl/driverlib/rtc_c.h
+bsp.obj: E:/xprize/Documents/MotorControlDev/MotorControl/MotorControl/driverlib/uups.h
+bsp.obj: E:/xprize/Documents/MotorControlDev/MotorControl/MotorControl/driverlib/framctl_a.h
+bsp.obj: E:/xprize/Documents/MotorControlDev/MotorControl/MotorControl/driverlib/eusci_a_uart.h
+bsp.obj: E:/xprize/Documents/MotorControlDev/MotorControl/MotorControl/driverlib/gpio.h
+bsp.obj: E:/xprize/Documents/MotorControlDev/MotorControl/MotorControl/driverlib/mpu.h
+bsp.obj: E:/xprize/Documents/MotorControlDev/MotorControl/MotorControl/driverlib/tlv.h
+bsp.obj: E:/xprize/Documents/MotorControlDev/MotorControl/MotorControl/driverlib/sdhs.h
+bsp.obj: E:/xprize/Documents/MotorControlDev/MotorControl/MotorControl/driverlib/eusci_a_spi.h
+bsp.obj: E:/xprize/Documents/MotorControlDev/MotorControl/MotorControl/driverlib/timer_b.h
+bsp.obj: E:/xprize/Documents/MotorControlDev/MotorControl/MotorControl/driverlib/ref_a.h
+bsp.obj: E:/xprize/Documents/MotorControlDev/MotorControl/MotorControl/driverlib/eusci_b_spi.h
+bsp.obj: E:/xprize/Documents/MotorControlDev/MotorControl/MotorControl/driverlib/mtif.h
+bsp.obj: E:/xprize/Documents/MotorControlDev/MotorControl/MotorControl/driverlib/lcd_c.h
+
+../bsp.c:
+../bsp.h:
+E:/xprize/Documents/MotorControlDev/MotorControl/MotorControl/driverlib/driverlib.h:
+E:/xprize/Documents/MotorControlDev/MotorControl/MotorControl/driverlib/inc/hw_memmap.h:
+C:/ti/ccs930/ccs/ccs_base/msp430/include/msp430.h:
+C:/ti/ccs930/ccs/ccs_base/msp430/include/msp430fr5994.h:
+C:/ti/ccs930/ccs/ccs_base/msp430/include/in430.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/intrinsics.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/intrinsics_legacy_undefs.h:
+C:/ti/ccs930/ccs/ccs_base/msp430/include/legacy.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/stdint.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/_stdint40.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/stdint.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/cdefs.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/_types.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/machine/_types.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/machine/_stdint.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/_stdint.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/stdbool.h:
+E:/xprize/Documents/MotorControlDev/MotorControl/MotorControl/driverlib/hspll.h:
+E:/xprize/Documents/MotorControlDev/MotorControl/MotorControl/driverlib/sysctl.h:
+E:/xprize/Documents/MotorControlDev/MotorControl/MotorControl/driverlib/dma.h:
+E:/xprize/Documents/MotorControlDev/MotorControl/MotorControl/driverlib/eusci_b_i2c.h:
+E:/xprize/Documents/MotorControlDev/MotorControl/MotorControl/driverlib/rtc_b.h:
+E:/xprize/Documents/MotorControlDev/MotorControl/MotorControl/driverlib/crc.h:
+E:/xprize/Documents/MotorControlDev/MotorControl/MotorControl/driverlib/adc12_b.h:
+E:/xprize/Documents/MotorControlDev/MotorControl/MotorControl/driverlib/esi.h:
+E:/xprize/Documents/MotorControlDev/MotorControl/MotorControl/driverlib/saph.h:
+E:/xprize/Documents/MotorControlDev/MotorControl/MotorControl/driverlib/cs.h:
+E:/xprize/Documents/MotorControlDev/MotorControl/MotorControl/driverlib/ram.h:
+E:/xprize/Documents/MotorControlDev/MotorControl/MotorControl/driverlib/mpy32.h:
+E:/xprize/Documents/MotorControlDev/MotorControl/MotorControl/driverlib/crc32.h:
+E:/xprize/Documents/MotorControlDev/MotorControl/MotorControl/driverlib/comp_e.h:
+E:/xprize/Documents/MotorControlDev/MotorControl/MotorControl/driverlib/framctl.h:
+E:/xprize/Documents/MotorControlDev/MotorControl/MotorControl/driverlib/aes256.h:
+E:/xprize/Documents/MotorControlDev/MotorControl/MotorControl/driverlib/sfr.h:
+E:/xprize/Documents/MotorControlDev/MotorControl/MotorControl/driverlib/wdt_a.h:
+E:/xprize/Documents/MotorControlDev/MotorControl/MotorControl/driverlib/timer_a.h:
+E:/xprize/Documents/MotorControlDev/MotorControl/MotorControl/driverlib/pmm.h:
+E:/xprize/Documents/MotorControlDev/MotorControl/MotorControl/driverlib/rtc_c.h:
+E:/xprize/Documents/MotorControlDev/MotorControl/MotorControl/driverlib/uups.h:
+E:/xprize/Documents/MotorControlDev/MotorControl/MotorControl/driverlib/framctl_a.h:
+E:/xprize/Documents/MotorControlDev/MotorControl/MotorControl/driverlib/eusci_a_uart.h:
+E:/xprize/Documents/MotorControlDev/MotorControl/MotorControl/driverlib/gpio.h:
+E:/xprize/Documents/MotorControlDev/MotorControl/MotorControl/driverlib/mpu.h:
+E:/xprize/Documents/MotorControlDev/MotorControl/MotorControl/driverlib/tlv.h:
+E:/xprize/Documents/MotorControlDev/MotorControl/MotorControl/driverlib/sdhs.h:
+E:/xprize/Documents/MotorControlDev/MotorControl/MotorControl/driverlib/eusci_a_spi.h:
+E:/xprize/Documents/MotorControlDev/MotorControl/MotorControl/driverlib/timer_b.h:
+E:/xprize/Documents/MotorControlDev/MotorControl/MotorControl/driverlib/ref_a.h:
+E:/xprize/Documents/MotorControlDev/MotorControl/MotorControl/driverlib/eusci_b_spi.h:
+E:/xprize/Documents/MotorControlDev/MotorControl/MotorControl/driverlib/mtif.h:
+E:/xprize/Documents/MotorControlDev/MotorControl/MotorControl/driverlib/lcd_c.h:
diff --git a/Apps/FlightSoftware/MotorControl/Release/bsp.obj b/Apps/FlightSoftware/MotorControl/Release/bsp.obj
new file mode 100644
index 000000000..4ee179fb3
Binary files /dev/null and b/Apps/FlightSoftware/MotorControl/Release/bsp.obj differ
diff --git a/Apps/FlightSoftware/MotorControl/Release/ccsObjs.opt b/Apps/FlightSoftware/MotorControl/Release/ccsObjs.opt
new file mode 100644
index 000000000..a85d9f0c7
--- /dev/null
+++ b/Apps/FlightSoftware/MotorControl/Release/ccsObjs.opt
@@ -0,0 +1 @@
+"./bsp.obj" "./i2c.obj" "./main.obj" "./driverlib/adc12_b.obj" "./driverlib/aes256.obj" "./driverlib/comp_e.obj" "./driverlib/crc.obj" "./driverlib/crc32.obj" "./driverlib/cs.obj" "./driverlib/dma.obj" "./driverlib/esi.obj" "./driverlib/eusci_a_spi.obj" "./driverlib/eusci_a_uart.obj" "./driverlib/eusci_b_i2c.obj" "./driverlib/eusci_b_spi.obj" "./driverlib/framctl.obj" "./driverlib/framctl_a.obj" "./driverlib/gpio.obj" "./driverlib/hspll.obj" "./driverlib/lcd_c.obj" "./driverlib/mpu.obj" "./driverlib/mpy32.obj" "./driverlib/mtif.obj" "./driverlib/pmm.obj" "./driverlib/ram.obj" "./driverlib/ref_a.obj" "./driverlib/rtc_b.obj" "./driverlib/rtc_c.obj" "./driverlib/saph.obj" "./driverlib/sdhs.obj" "./driverlib/sfr.obj" "./driverlib/sysctl.obj" "./driverlib/timer_a.obj" "./driverlib/timer_b.obj" "./driverlib/tlv.obj" "./driverlib/uups.obj" "./driverlib/wdt_a.obj" "../lnk_msp430fr5994.cmd" -llibmpu_init.a -lIQmathLib.a -llibmath.a -llibc.a
\ No newline at end of file
diff --git a/Apps/FlightSoftware/MotorControl/Release/driverlib/adc12_b.d b/Apps/FlightSoftware/MotorControl/Release/driverlib/adc12_b.d
new file mode 100644
index 000000000..a2faa6d3b
--- /dev/null
+++ b/Apps/FlightSoftware/MotorControl/Release/driverlib/adc12_b.d
@@ -0,0 +1,45 @@
+# FIXED
+
+driverlib/adc12_b.obj: ../driverlib/adc12_b.c
+driverlib/adc12_b.obj: ../driverlib/inc/hw_memmap.h
+driverlib/adc12_b.obj: C:/ti/ccs930/ccs/ccs_base/msp430/include/msp430.h
+driverlib/adc12_b.obj: C:/ti/ccs930/ccs/ccs_base/msp430/include/msp430fr5994.h
+driverlib/adc12_b.obj: C:/ti/ccs930/ccs/ccs_base/msp430/include/in430.h
+driverlib/adc12_b.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/intrinsics.h
+driverlib/adc12_b.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/intrinsics_legacy_undefs.h
+driverlib/adc12_b.obj: C:/ti/ccs930/ccs/ccs_base/msp430/include/legacy.h
+driverlib/adc12_b.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/stdint.h
+driverlib/adc12_b.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/_stdint40.h
+driverlib/adc12_b.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/stdint.h
+driverlib/adc12_b.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/cdefs.h
+driverlib/adc12_b.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/_types.h
+driverlib/adc12_b.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/machine/_types.h
+driverlib/adc12_b.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/machine/_stdint.h
+driverlib/adc12_b.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/_stdint.h
+driverlib/adc12_b.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/stdbool.h
+driverlib/adc12_b.obj: ../driverlib/adc12_b.h
+driverlib/adc12_b.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/assert.h
+driverlib/adc12_b.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/_ti_config.h
+driverlib/adc12_b.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/linkage.h
+
+../driverlib/adc12_b.c:
+../driverlib/inc/hw_memmap.h:
+C:/ti/ccs930/ccs/ccs_base/msp430/include/msp430.h:
+C:/ti/ccs930/ccs/ccs_base/msp430/include/msp430fr5994.h:
+C:/ti/ccs930/ccs/ccs_base/msp430/include/in430.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/intrinsics.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/intrinsics_legacy_undefs.h:
+C:/ti/ccs930/ccs/ccs_base/msp430/include/legacy.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/stdint.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/_stdint40.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/stdint.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/cdefs.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/_types.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/machine/_types.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/machine/_stdint.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/_stdint.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/stdbool.h:
+../driverlib/adc12_b.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/assert.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/_ti_config.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/linkage.h:
diff --git a/Apps/FlightSoftware/MotorControl/Release/driverlib/adc12_b.obj b/Apps/FlightSoftware/MotorControl/Release/driverlib/adc12_b.obj
new file mode 100644
index 000000000..0208b1e41
Binary files /dev/null and b/Apps/FlightSoftware/MotorControl/Release/driverlib/adc12_b.obj differ
diff --git a/Apps/FlightSoftware/MotorControl/Release/driverlib/aes256.d b/Apps/FlightSoftware/MotorControl/Release/driverlib/aes256.d
new file mode 100644
index 000000000..4440bcc2c
--- /dev/null
+++ b/Apps/FlightSoftware/MotorControl/Release/driverlib/aes256.d
@@ -0,0 +1,45 @@
+# FIXED
+
+driverlib/aes256.obj: ../driverlib/aes256.c
+driverlib/aes256.obj: ../driverlib/inc/hw_memmap.h
+driverlib/aes256.obj: C:/ti/ccs930/ccs/ccs_base/msp430/include/msp430.h
+driverlib/aes256.obj: C:/ti/ccs930/ccs/ccs_base/msp430/include/msp430fr5994.h
+driverlib/aes256.obj: C:/ti/ccs930/ccs/ccs_base/msp430/include/in430.h
+driverlib/aes256.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/intrinsics.h
+driverlib/aes256.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/intrinsics_legacy_undefs.h
+driverlib/aes256.obj: C:/ti/ccs930/ccs/ccs_base/msp430/include/legacy.h
+driverlib/aes256.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/stdint.h
+driverlib/aes256.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/_stdint40.h
+driverlib/aes256.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/stdint.h
+driverlib/aes256.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/cdefs.h
+driverlib/aes256.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/_types.h
+driverlib/aes256.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/machine/_types.h
+driverlib/aes256.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/machine/_stdint.h
+driverlib/aes256.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/_stdint.h
+driverlib/aes256.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/stdbool.h
+driverlib/aes256.obj: ../driverlib/aes256.h
+driverlib/aes256.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/assert.h
+driverlib/aes256.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/_ti_config.h
+driverlib/aes256.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/linkage.h
+
+../driverlib/aes256.c:
+../driverlib/inc/hw_memmap.h:
+C:/ti/ccs930/ccs/ccs_base/msp430/include/msp430.h:
+C:/ti/ccs930/ccs/ccs_base/msp430/include/msp430fr5994.h:
+C:/ti/ccs930/ccs/ccs_base/msp430/include/in430.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/intrinsics.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/intrinsics_legacy_undefs.h:
+C:/ti/ccs930/ccs/ccs_base/msp430/include/legacy.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/stdint.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/_stdint40.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/stdint.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/cdefs.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/_types.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/machine/_types.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/machine/_stdint.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/_stdint.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/stdbool.h:
+../driverlib/aes256.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/assert.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/_ti_config.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/linkage.h:
diff --git a/Apps/FlightSoftware/MotorControl/Release/driverlib/aes256.obj b/Apps/FlightSoftware/MotorControl/Release/driverlib/aes256.obj
new file mode 100644
index 000000000..ea1676197
Binary files /dev/null and b/Apps/FlightSoftware/MotorControl/Release/driverlib/aes256.obj differ
diff --git a/Apps/FlightSoftware/MotorControl/Release/driverlib/comp_e.d b/Apps/FlightSoftware/MotorControl/Release/driverlib/comp_e.d
new file mode 100644
index 000000000..3061197f1
--- /dev/null
+++ b/Apps/FlightSoftware/MotorControl/Release/driverlib/comp_e.d
@@ -0,0 +1,45 @@
+# FIXED
+
+driverlib/comp_e.obj: ../driverlib/comp_e.c
+driverlib/comp_e.obj: ../driverlib/inc/hw_memmap.h
+driverlib/comp_e.obj: C:/ti/ccs930/ccs/ccs_base/msp430/include/msp430.h
+driverlib/comp_e.obj: C:/ti/ccs930/ccs/ccs_base/msp430/include/msp430fr5994.h
+driverlib/comp_e.obj: C:/ti/ccs930/ccs/ccs_base/msp430/include/in430.h
+driverlib/comp_e.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/intrinsics.h
+driverlib/comp_e.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/intrinsics_legacy_undefs.h
+driverlib/comp_e.obj: C:/ti/ccs930/ccs/ccs_base/msp430/include/legacy.h
+driverlib/comp_e.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/stdint.h
+driverlib/comp_e.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/_stdint40.h
+driverlib/comp_e.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/stdint.h
+driverlib/comp_e.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/cdefs.h
+driverlib/comp_e.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/_types.h
+driverlib/comp_e.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/machine/_types.h
+driverlib/comp_e.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/machine/_stdint.h
+driverlib/comp_e.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/_stdint.h
+driverlib/comp_e.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/stdbool.h
+driverlib/comp_e.obj: ../driverlib/comp_e.h
+driverlib/comp_e.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/assert.h
+driverlib/comp_e.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/_ti_config.h
+driverlib/comp_e.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/linkage.h
+
+../driverlib/comp_e.c:
+../driverlib/inc/hw_memmap.h:
+C:/ti/ccs930/ccs/ccs_base/msp430/include/msp430.h:
+C:/ti/ccs930/ccs/ccs_base/msp430/include/msp430fr5994.h:
+C:/ti/ccs930/ccs/ccs_base/msp430/include/in430.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/intrinsics.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/intrinsics_legacy_undefs.h:
+C:/ti/ccs930/ccs/ccs_base/msp430/include/legacy.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/stdint.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/_stdint40.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/stdint.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/cdefs.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/_types.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/machine/_types.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/machine/_stdint.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/_stdint.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/stdbool.h:
+../driverlib/comp_e.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/assert.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/_ti_config.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/linkage.h:
diff --git a/Apps/FlightSoftware/MotorControl/Release/driverlib/comp_e.obj b/Apps/FlightSoftware/MotorControl/Release/driverlib/comp_e.obj
new file mode 100644
index 000000000..29a9552bf
Binary files /dev/null and b/Apps/FlightSoftware/MotorControl/Release/driverlib/comp_e.obj differ
diff --git a/Apps/FlightSoftware/MotorControl/Release/driverlib/crc.d b/Apps/FlightSoftware/MotorControl/Release/driverlib/crc.d
new file mode 100644
index 000000000..4ea5bb8bd
--- /dev/null
+++ b/Apps/FlightSoftware/MotorControl/Release/driverlib/crc.d
@@ -0,0 +1,45 @@
+# FIXED
+
+driverlib/crc.obj: ../driverlib/crc.c
+driverlib/crc.obj: ../driverlib/inc/hw_memmap.h
+driverlib/crc.obj: C:/ti/ccs930/ccs/ccs_base/msp430/include/msp430.h
+driverlib/crc.obj: C:/ti/ccs930/ccs/ccs_base/msp430/include/msp430fr5994.h
+driverlib/crc.obj: C:/ti/ccs930/ccs/ccs_base/msp430/include/in430.h
+driverlib/crc.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/intrinsics.h
+driverlib/crc.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/intrinsics_legacy_undefs.h
+driverlib/crc.obj: C:/ti/ccs930/ccs/ccs_base/msp430/include/legacy.h
+driverlib/crc.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/stdint.h
+driverlib/crc.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/_stdint40.h
+driverlib/crc.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/stdint.h
+driverlib/crc.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/cdefs.h
+driverlib/crc.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/_types.h
+driverlib/crc.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/machine/_types.h
+driverlib/crc.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/machine/_stdint.h
+driverlib/crc.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/_stdint.h
+driverlib/crc.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/stdbool.h
+driverlib/crc.obj: ../driverlib/crc.h
+driverlib/crc.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/assert.h
+driverlib/crc.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/_ti_config.h
+driverlib/crc.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/linkage.h
+
+../driverlib/crc.c:
+../driverlib/inc/hw_memmap.h:
+C:/ti/ccs930/ccs/ccs_base/msp430/include/msp430.h:
+C:/ti/ccs930/ccs/ccs_base/msp430/include/msp430fr5994.h:
+C:/ti/ccs930/ccs/ccs_base/msp430/include/in430.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/intrinsics.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/intrinsics_legacy_undefs.h:
+C:/ti/ccs930/ccs/ccs_base/msp430/include/legacy.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/stdint.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/_stdint40.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/stdint.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/cdefs.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/_types.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/machine/_types.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/machine/_stdint.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/_stdint.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/stdbool.h:
+../driverlib/crc.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/assert.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/_ti_config.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/linkage.h:
diff --git a/Apps/FlightSoftware/MotorControl/Release/driverlib/crc.obj b/Apps/FlightSoftware/MotorControl/Release/driverlib/crc.obj
new file mode 100644
index 000000000..bda3de909
Binary files /dev/null and b/Apps/FlightSoftware/MotorControl/Release/driverlib/crc.obj differ
diff --git a/Apps/FlightSoftware/MotorControl/Release/driverlib/crc32.d b/Apps/FlightSoftware/MotorControl/Release/driverlib/crc32.d
new file mode 100644
index 000000000..5d816749e
--- /dev/null
+++ b/Apps/FlightSoftware/MotorControl/Release/driverlib/crc32.d
@@ -0,0 +1,45 @@
+# FIXED
+
+driverlib/crc32.obj: ../driverlib/crc32.c
+driverlib/crc32.obj: ../driverlib/inc/hw_memmap.h
+driverlib/crc32.obj: C:/ti/ccs930/ccs/ccs_base/msp430/include/msp430.h
+driverlib/crc32.obj: C:/ti/ccs930/ccs/ccs_base/msp430/include/msp430fr5994.h
+driverlib/crc32.obj: C:/ti/ccs930/ccs/ccs_base/msp430/include/in430.h
+driverlib/crc32.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/intrinsics.h
+driverlib/crc32.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/intrinsics_legacy_undefs.h
+driverlib/crc32.obj: C:/ti/ccs930/ccs/ccs_base/msp430/include/legacy.h
+driverlib/crc32.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/stdint.h
+driverlib/crc32.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/_stdint40.h
+driverlib/crc32.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/stdint.h
+driverlib/crc32.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/cdefs.h
+driverlib/crc32.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/_types.h
+driverlib/crc32.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/machine/_types.h
+driverlib/crc32.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/machine/_stdint.h
+driverlib/crc32.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/_stdint.h
+driverlib/crc32.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/stdbool.h
+driverlib/crc32.obj: ../driverlib/crc32.h
+driverlib/crc32.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/assert.h
+driverlib/crc32.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/_ti_config.h
+driverlib/crc32.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/linkage.h
+
+../driverlib/crc32.c:
+../driverlib/inc/hw_memmap.h:
+C:/ti/ccs930/ccs/ccs_base/msp430/include/msp430.h:
+C:/ti/ccs930/ccs/ccs_base/msp430/include/msp430fr5994.h:
+C:/ti/ccs930/ccs/ccs_base/msp430/include/in430.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/intrinsics.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/intrinsics_legacy_undefs.h:
+C:/ti/ccs930/ccs/ccs_base/msp430/include/legacy.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/stdint.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/_stdint40.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/stdint.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/cdefs.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/_types.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/machine/_types.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/machine/_stdint.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/_stdint.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/stdbool.h:
+../driverlib/crc32.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/assert.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/_ti_config.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/linkage.h:
diff --git a/Apps/FlightSoftware/MotorControl/Release/driverlib/crc32.obj b/Apps/FlightSoftware/MotorControl/Release/driverlib/crc32.obj
new file mode 100644
index 000000000..433ad6f30
Binary files /dev/null and b/Apps/FlightSoftware/MotorControl/Release/driverlib/crc32.obj differ
diff --git a/Apps/FlightSoftware/MotorControl/Release/driverlib/cs.d b/Apps/FlightSoftware/MotorControl/Release/driverlib/cs.d
new file mode 100644
index 000000000..99dbd91ca
--- /dev/null
+++ b/Apps/FlightSoftware/MotorControl/Release/driverlib/cs.d
@@ -0,0 +1,45 @@
+# FIXED
+
+driverlib/cs.obj: ../driverlib/cs.c
+driverlib/cs.obj: ../driverlib/inc/hw_memmap.h
+driverlib/cs.obj: C:/ti/ccs930/ccs/ccs_base/msp430/include/msp430.h
+driverlib/cs.obj: C:/ti/ccs930/ccs/ccs_base/msp430/include/msp430fr5994.h
+driverlib/cs.obj: C:/ti/ccs930/ccs/ccs_base/msp430/include/in430.h
+driverlib/cs.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/intrinsics.h
+driverlib/cs.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/intrinsics_legacy_undefs.h
+driverlib/cs.obj: C:/ti/ccs930/ccs/ccs_base/msp430/include/legacy.h
+driverlib/cs.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/stdint.h
+driverlib/cs.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/_stdint40.h
+driverlib/cs.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/stdint.h
+driverlib/cs.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/cdefs.h
+driverlib/cs.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/_types.h
+driverlib/cs.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/machine/_types.h
+driverlib/cs.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/machine/_stdint.h
+driverlib/cs.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/_stdint.h
+driverlib/cs.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/stdbool.h
+driverlib/cs.obj: ../driverlib/cs.h
+driverlib/cs.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/assert.h
+driverlib/cs.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/_ti_config.h
+driverlib/cs.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/linkage.h
+
+../driverlib/cs.c:
+../driverlib/inc/hw_memmap.h:
+C:/ti/ccs930/ccs/ccs_base/msp430/include/msp430.h:
+C:/ti/ccs930/ccs/ccs_base/msp430/include/msp430fr5994.h:
+C:/ti/ccs930/ccs/ccs_base/msp430/include/in430.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/intrinsics.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/intrinsics_legacy_undefs.h:
+C:/ti/ccs930/ccs/ccs_base/msp430/include/legacy.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/stdint.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/_stdint40.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/stdint.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/cdefs.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/_types.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/machine/_types.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/machine/_stdint.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/_stdint.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/stdbool.h:
+../driverlib/cs.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/assert.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/_ti_config.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/linkage.h:
diff --git a/Apps/FlightSoftware/MotorControl/Release/driverlib/cs.obj b/Apps/FlightSoftware/MotorControl/Release/driverlib/cs.obj
new file mode 100644
index 000000000..3c37d31e1
Binary files /dev/null and b/Apps/FlightSoftware/MotorControl/Release/driverlib/cs.obj differ
diff --git a/Apps/FlightSoftware/MotorControl/Release/driverlib/dma.d b/Apps/FlightSoftware/MotorControl/Release/driverlib/dma.d
new file mode 100644
index 000000000..b5a61a66e
--- /dev/null
+++ b/Apps/FlightSoftware/MotorControl/Release/driverlib/dma.d
@@ -0,0 +1,45 @@
+# FIXED
+
+driverlib/dma.obj: ../driverlib/dma.c
+driverlib/dma.obj: ../driverlib/inc/hw_memmap.h
+driverlib/dma.obj: C:/ti/ccs930/ccs/ccs_base/msp430/include/msp430.h
+driverlib/dma.obj: C:/ti/ccs930/ccs/ccs_base/msp430/include/msp430fr5994.h
+driverlib/dma.obj: C:/ti/ccs930/ccs/ccs_base/msp430/include/in430.h
+driverlib/dma.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/intrinsics.h
+driverlib/dma.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/intrinsics_legacy_undefs.h
+driverlib/dma.obj: C:/ti/ccs930/ccs/ccs_base/msp430/include/legacy.h
+driverlib/dma.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/stdint.h
+driverlib/dma.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/_stdint40.h
+driverlib/dma.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/stdint.h
+driverlib/dma.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/cdefs.h
+driverlib/dma.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/_types.h
+driverlib/dma.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/machine/_types.h
+driverlib/dma.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/machine/_stdint.h
+driverlib/dma.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/_stdint.h
+driverlib/dma.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/stdbool.h
+driverlib/dma.obj: ../driverlib/dma.h
+driverlib/dma.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/assert.h
+driverlib/dma.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/_ti_config.h
+driverlib/dma.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/linkage.h
+
+../driverlib/dma.c:
+../driverlib/inc/hw_memmap.h:
+C:/ti/ccs930/ccs/ccs_base/msp430/include/msp430.h:
+C:/ti/ccs930/ccs/ccs_base/msp430/include/msp430fr5994.h:
+C:/ti/ccs930/ccs/ccs_base/msp430/include/in430.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/intrinsics.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/intrinsics_legacy_undefs.h:
+C:/ti/ccs930/ccs/ccs_base/msp430/include/legacy.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/stdint.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/_stdint40.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/stdint.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/cdefs.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/_types.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/machine/_types.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/machine/_stdint.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/_stdint.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/stdbool.h:
+../driverlib/dma.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/assert.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/_ti_config.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/linkage.h:
diff --git a/Apps/FlightSoftware/MotorControl/Release/driverlib/dma.obj b/Apps/FlightSoftware/MotorControl/Release/driverlib/dma.obj
new file mode 100644
index 000000000..62ede558e
Binary files /dev/null and b/Apps/FlightSoftware/MotorControl/Release/driverlib/dma.obj differ
diff --git a/Apps/FlightSoftware/MotorControl/Release/driverlib/esi.d b/Apps/FlightSoftware/MotorControl/Release/driverlib/esi.d
new file mode 100644
index 000000000..a6916674e
--- /dev/null
+++ b/Apps/FlightSoftware/MotorControl/Release/driverlib/esi.d
@@ -0,0 +1,37 @@
+# FIXED
+
+driverlib/esi.obj: ../driverlib/esi.c
+driverlib/esi.obj: ../driverlib/inc/hw_memmap.h
+driverlib/esi.obj: C:/ti/ccs930/ccs/ccs_base/msp430/include/msp430.h
+driverlib/esi.obj: C:/ti/ccs930/ccs/ccs_base/msp430/include/msp430fr5994.h
+driverlib/esi.obj: C:/ti/ccs930/ccs/ccs_base/msp430/include/in430.h
+driverlib/esi.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/intrinsics.h
+driverlib/esi.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/intrinsics_legacy_undefs.h
+driverlib/esi.obj: C:/ti/ccs930/ccs/ccs_base/msp430/include/legacy.h
+driverlib/esi.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/stdint.h
+driverlib/esi.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/_stdint40.h
+driverlib/esi.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/stdint.h
+driverlib/esi.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/cdefs.h
+driverlib/esi.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/_types.h
+driverlib/esi.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/machine/_types.h
+driverlib/esi.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/machine/_stdint.h
+driverlib/esi.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/_stdint.h
+driverlib/esi.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/stdbool.h
+
+../driverlib/esi.c:
+../driverlib/inc/hw_memmap.h:
+C:/ti/ccs930/ccs/ccs_base/msp430/include/msp430.h:
+C:/ti/ccs930/ccs/ccs_base/msp430/include/msp430fr5994.h:
+C:/ti/ccs930/ccs/ccs_base/msp430/include/in430.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/intrinsics.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/intrinsics_legacy_undefs.h:
+C:/ti/ccs930/ccs/ccs_base/msp430/include/legacy.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/stdint.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/_stdint40.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/stdint.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/cdefs.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/_types.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/machine/_types.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/machine/_stdint.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/_stdint.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/stdbool.h:
diff --git a/Apps/FlightSoftware/MotorControl/Release/driverlib/esi.obj b/Apps/FlightSoftware/MotorControl/Release/driverlib/esi.obj
new file mode 100644
index 000000000..976bbd651
Binary files /dev/null and b/Apps/FlightSoftware/MotorControl/Release/driverlib/esi.obj differ
diff --git a/Apps/FlightSoftware/MotorControl/Release/driverlib/eusci_a_spi.d b/Apps/FlightSoftware/MotorControl/Release/driverlib/eusci_a_spi.d
new file mode 100644
index 000000000..a523305c3
--- /dev/null
+++ b/Apps/FlightSoftware/MotorControl/Release/driverlib/eusci_a_spi.d
@@ -0,0 +1,45 @@
+# FIXED
+
+driverlib/eusci_a_spi.obj: ../driverlib/eusci_a_spi.c
+driverlib/eusci_a_spi.obj: ../driverlib/inc/hw_memmap.h
+driverlib/eusci_a_spi.obj: C:/ti/ccs930/ccs/ccs_base/msp430/include/msp430.h
+driverlib/eusci_a_spi.obj: C:/ti/ccs930/ccs/ccs_base/msp430/include/msp430fr5994.h
+driverlib/eusci_a_spi.obj: C:/ti/ccs930/ccs/ccs_base/msp430/include/in430.h
+driverlib/eusci_a_spi.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/intrinsics.h
+driverlib/eusci_a_spi.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/intrinsics_legacy_undefs.h
+driverlib/eusci_a_spi.obj: C:/ti/ccs930/ccs/ccs_base/msp430/include/legacy.h
+driverlib/eusci_a_spi.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/stdint.h
+driverlib/eusci_a_spi.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/_stdint40.h
+driverlib/eusci_a_spi.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/stdint.h
+driverlib/eusci_a_spi.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/cdefs.h
+driverlib/eusci_a_spi.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/_types.h
+driverlib/eusci_a_spi.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/machine/_types.h
+driverlib/eusci_a_spi.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/machine/_stdint.h
+driverlib/eusci_a_spi.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/_stdint.h
+driverlib/eusci_a_spi.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/stdbool.h
+driverlib/eusci_a_spi.obj: ../driverlib/eusci_a_spi.h
+driverlib/eusci_a_spi.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/assert.h
+driverlib/eusci_a_spi.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/_ti_config.h
+driverlib/eusci_a_spi.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/linkage.h
+
+../driverlib/eusci_a_spi.c:
+../driverlib/inc/hw_memmap.h:
+C:/ti/ccs930/ccs/ccs_base/msp430/include/msp430.h:
+C:/ti/ccs930/ccs/ccs_base/msp430/include/msp430fr5994.h:
+C:/ti/ccs930/ccs/ccs_base/msp430/include/in430.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/intrinsics.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/intrinsics_legacy_undefs.h:
+C:/ti/ccs930/ccs/ccs_base/msp430/include/legacy.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/stdint.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/_stdint40.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/stdint.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/cdefs.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/_types.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/machine/_types.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/machine/_stdint.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/_stdint.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/stdbool.h:
+../driverlib/eusci_a_spi.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/assert.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/_ti_config.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/linkage.h:
diff --git a/Apps/FlightSoftware/MotorControl/Release/driverlib/eusci_a_spi.obj b/Apps/FlightSoftware/MotorControl/Release/driverlib/eusci_a_spi.obj
new file mode 100644
index 000000000..218476ba2
Binary files /dev/null and b/Apps/FlightSoftware/MotorControl/Release/driverlib/eusci_a_spi.obj differ
diff --git a/Apps/FlightSoftware/MotorControl/Release/driverlib/eusci_a_uart.d b/Apps/FlightSoftware/MotorControl/Release/driverlib/eusci_a_uart.d
new file mode 100644
index 000000000..606861e5b
--- /dev/null
+++ b/Apps/FlightSoftware/MotorControl/Release/driverlib/eusci_a_uart.d
@@ -0,0 +1,45 @@
+# FIXED
+
+driverlib/eusci_a_uart.obj: ../driverlib/eusci_a_uart.c
+driverlib/eusci_a_uart.obj: ../driverlib/inc/hw_memmap.h
+driverlib/eusci_a_uart.obj: C:/ti/ccs930/ccs/ccs_base/msp430/include/msp430.h
+driverlib/eusci_a_uart.obj: C:/ti/ccs930/ccs/ccs_base/msp430/include/msp430fr5994.h
+driverlib/eusci_a_uart.obj: C:/ti/ccs930/ccs/ccs_base/msp430/include/in430.h
+driverlib/eusci_a_uart.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/intrinsics.h
+driverlib/eusci_a_uart.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/intrinsics_legacy_undefs.h
+driverlib/eusci_a_uart.obj: C:/ti/ccs930/ccs/ccs_base/msp430/include/legacy.h
+driverlib/eusci_a_uart.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/stdint.h
+driverlib/eusci_a_uart.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/_stdint40.h
+driverlib/eusci_a_uart.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/stdint.h
+driverlib/eusci_a_uart.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/cdefs.h
+driverlib/eusci_a_uart.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/_types.h
+driverlib/eusci_a_uart.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/machine/_types.h
+driverlib/eusci_a_uart.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/machine/_stdint.h
+driverlib/eusci_a_uart.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/_stdint.h
+driverlib/eusci_a_uart.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/stdbool.h
+driverlib/eusci_a_uart.obj: ../driverlib/eusci_a_uart.h
+driverlib/eusci_a_uart.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/assert.h
+driverlib/eusci_a_uart.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/_ti_config.h
+driverlib/eusci_a_uart.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/linkage.h
+
+../driverlib/eusci_a_uart.c:
+../driverlib/inc/hw_memmap.h:
+C:/ti/ccs930/ccs/ccs_base/msp430/include/msp430.h:
+C:/ti/ccs930/ccs/ccs_base/msp430/include/msp430fr5994.h:
+C:/ti/ccs930/ccs/ccs_base/msp430/include/in430.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/intrinsics.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/intrinsics_legacy_undefs.h:
+C:/ti/ccs930/ccs/ccs_base/msp430/include/legacy.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/stdint.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/_stdint40.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/stdint.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/cdefs.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/_types.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/machine/_types.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/machine/_stdint.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/_stdint.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/stdbool.h:
+../driverlib/eusci_a_uart.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/assert.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/_ti_config.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/linkage.h:
diff --git a/Apps/FlightSoftware/MotorControl/Release/driverlib/eusci_a_uart.obj b/Apps/FlightSoftware/MotorControl/Release/driverlib/eusci_a_uart.obj
new file mode 100644
index 000000000..12f893cd9
Binary files /dev/null and b/Apps/FlightSoftware/MotorControl/Release/driverlib/eusci_a_uart.obj differ
diff --git a/Apps/FlightSoftware/MotorControl/Release/driverlib/eusci_b_i2c.d b/Apps/FlightSoftware/MotorControl/Release/driverlib/eusci_b_i2c.d
new file mode 100644
index 000000000..9bccedb45
--- /dev/null
+++ b/Apps/FlightSoftware/MotorControl/Release/driverlib/eusci_b_i2c.d
@@ -0,0 +1,45 @@
+# FIXED
+
+driverlib/eusci_b_i2c.obj: ../driverlib/eusci_b_i2c.c
+driverlib/eusci_b_i2c.obj: ../driverlib/inc/hw_memmap.h
+driverlib/eusci_b_i2c.obj: C:/ti/ccs930/ccs/ccs_base/msp430/include/msp430.h
+driverlib/eusci_b_i2c.obj: C:/ti/ccs930/ccs/ccs_base/msp430/include/msp430fr5994.h
+driverlib/eusci_b_i2c.obj: C:/ti/ccs930/ccs/ccs_base/msp430/include/in430.h
+driverlib/eusci_b_i2c.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/intrinsics.h
+driverlib/eusci_b_i2c.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/intrinsics_legacy_undefs.h
+driverlib/eusci_b_i2c.obj: C:/ti/ccs930/ccs/ccs_base/msp430/include/legacy.h
+driverlib/eusci_b_i2c.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/stdint.h
+driverlib/eusci_b_i2c.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/_stdint40.h
+driverlib/eusci_b_i2c.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/stdint.h
+driverlib/eusci_b_i2c.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/cdefs.h
+driverlib/eusci_b_i2c.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/_types.h
+driverlib/eusci_b_i2c.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/machine/_types.h
+driverlib/eusci_b_i2c.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/machine/_stdint.h
+driverlib/eusci_b_i2c.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/_stdint.h
+driverlib/eusci_b_i2c.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/stdbool.h
+driverlib/eusci_b_i2c.obj: ../driverlib/eusci_b_i2c.h
+driverlib/eusci_b_i2c.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/assert.h
+driverlib/eusci_b_i2c.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/_ti_config.h
+driverlib/eusci_b_i2c.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/linkage.h
+
+../driverlib/eusci_b_i2c.c:
+../driverlib/inc/hw_memmap.h:
+C:/ti/ccs930/ccs/ccs_base/msp430/include/msp430.h:
+C:/ti/ccs930/ccs/ccs_base/msp430/include/msp430fr5994.h:
+C:/ti/ccs930/ccs/ccs_base/msp430/include/in430.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/intrinsics.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/intrinsics_legacy_undefs.h:
+C:/ti/ccs930/ccs/ccs_base/msp430/include/legacy.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/stdint.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/_stdint40.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/stdint.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/cdefs.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/_types.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/machine/_types.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/machine/_stdint.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/_stdint.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/stdbool.h:
+../driverlib/eusci_b_i2c.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/assert.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/_ti_config.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/linkage.h:
diff --git a/Apps/FlightSoftware/MotorControl/Release/driverlib/eusci_b_i2c.obj b/Apps/FlightSoftware/MotorControl/Release/driverlib/eusci_b_i2c.obj
new file mode 100644
index 000000000..ad24984a0
Binary files /dev/null and b/Apps/FlightSoftware/MotorControl/Release/driverlib/eusci_b_i2c.obj differ
diff --git a/Apps/FlightSoftware/MotorControl/Release/driverlib/eusci_b_spi.d b/Apps/FlightSoftware/MotorControl/Release/driverlib/eusci_b_spi.d
new file mode 100644
index 000000000..0444b8d6c
--- /dev/null
+++ b/Apps/FlightSoftware/MotorControl/Release/driverlib/eusci_b_spi.d
@@ -0,0 +1,45 @@
+# FIXED
+
+driverlib/eusci_b_spi.obj: ../driverlib/eusci_b_spi.c
+driverlib/eusci_b_spi.obj: ../driverlib/inc/hw_memmap.h
+driverlib/eusci_b_spi.obj: C:/ti/ccs930/ccs/ccs_base/msp430/include/msp430.h
+driverlib/eusci_b_spi.obj: C:/ti/ccs930/ccs/ccs_base/msp430/include/msp430fr5994.h
+driverlib/eusci_b_spi.obj: C:/ti/ccs930/ccs/ccs_base/msp430/include/in430.h
+driverlib/eusci_b_spi.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/intrinsics.h
+driverlib/eusci_b_spi.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/intrinsics_legacy_undefs.h
+driverlib/eusci_b_spi.obj: C:/ti/ccs930/ccs/ccs_base/msp430/include/legacy.h
+driverlib/eusci_b_spi.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/stdint.h
+driverlib/eusci_b_spi.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/_stdint40.h
+driverlib/eusci_b_spi.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/stdint.h
+driverlib/eusci_b_spi.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/cdefs.h
+driverlib/eusci_b_spi.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/_types.h
+driverlib/eusci_b_spi.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/machine/_types.h
+driverlib/eusci_b_spi.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/machine/_stdint.h
+driverlib/eusci_b_spi.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/_stdint.h
+driverlib/eusci_b_spi.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/stdbool.h
+driverlib/eusci_b_spi.obj: ../driverlib/eusci_b_spi.h
+driverlib/eusci_b_spi.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/assert.h
+driverlib/eusci_b_spi.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/_ti_config.h
+driverlib/eusci_b_spi.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/linkage.h
+
+../driverlib/eusci_b_spi.c:
+../driverlib/inc/hw_memmap.h:
+C:/ti/ccs930/ccs/ccs_base/msp430/include/msp430.h:
+C:/ti/ccs930/ccs/ccs_base/msp430/include/msp430fr5994.h:
+C:/ti/ccs930/ccs/ccs_base/msp430/include/in430.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/intrinsics.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/intrinsics_legacy_undefs.h:
+C:/ti/ccs930/ccs/ccs_base/msp430/include/legacy.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/stdint.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/_stdint40.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/stdint.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/cdefs.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/_types.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/machine/_types.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/machine/_stdint.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/_stdint.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/stdbool.h:
+../driverlib/eusci_b_spi.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/assert.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/_ti_config.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/linkage.h:
diff --git a/Apps/FlightSoftware/MotorControl/Release/driverlib/eusci_b_spi.obj b/Apps/FlightSoftware/MotorControl/Release/driverlib/eusci_b_spi.obj
new file mode 100644
index 000000000..cac1bb374
Binary files /dev/null and b/Apps/FlightSoftware/MotorControl/Release/driverlib/eusci_b_spi.obj differ
diff --git a/Apps/FlightSoftware/MotorControl/Release/driverlib/framctl.d b/Apps/FlightSoftware/MotorControl/Release/driverlib/framctl.d
new file mode 100644
index 000000000..810b9f330
--- /dev/null
+++ b/Apps/FlightSoftware/MotorControl/Release/driverlib/framctl.d
@@ -0,0 +1,37 @@
+# FIXED
+
+driverlib/framctl.obj: ../driverlib/framctl.c
+driverlib/framctl.obj: ../driverlib/inc/hw_memmap.h
+driverlib/framctl.obj: C:/ti/ccs930/ccs/ccs_base/msp430/include/msp430.h
+driverlib/framctl.obj: C:/ti/ccs930/ccs/ccs_base/msp430/include/msp430fr5994.h
+driverlib/framctl.obj: C:/ti/ccs930/ccs/ccs_base/msp430/include/in430.h
+driverlib/framctl.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/intrinsics.h
+driverlib/framctl.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/intrinsics_legacy_undefs.h
+driverlib/framctl.obj: C:/ti/ccs930/ccs/ccs_base/msp430/include/legacy.h
+driverlib/framctl.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/stdint.h
+driverlib/framctl.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/_stdint40.h
+driverlib/framctl.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/stdint.h
+driverlib/framctl.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/cdefs.h
+driverlib/framctl.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/_types.h
+driverlib/framctl.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/machine/_types.h
+driverlib/framctl.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/machine/_stdint.h
+driverlib/framctl.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/_stdint.h
+driverlib/framctl.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/stdbool.h
+
+../driverlib/framctl.c:
+../driverlib/inc/hw_memmap.h:
+C:/ti/ccs930/ccs/ccs_base/msp430/include/msp430.h:
+C:/ti/ccs930/ccs/ccs_base/msp430/include/msp430fr5994.h:
+C:/ti/ccs930/ccs/ccs_base/msp430/include/in430.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/intrinsics.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/intrinsics_legacy_undefs.h:
+C:/ti/ccs930/ccs/ccs_base/msp430/include/legacy.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/stdint.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/_stdint40.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/stdint.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/cdefs.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/_types.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/machine/_types.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/machine/_stdint.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/_stdint.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/stdbool.h:
diff --git a/Apps/FlightSoftware/MotorControl/Release/driverlib/framctl.obj b/Apps/FlightSoftware/MotorControl/Release/driverlib/framctl.obj
new file mode 100644
index 000000000..a0afb529c
Binary files /dev/null and b/Apps/FlightSoftware/MotorControl/Release/driverlib/framctl.obj differ
diff --git a/Apps/FlightSoftware/MotorControl/Release/driverlib/framctl_a.d b/Apps/FlightSoftware/MotorControl/Release/driverlib/framctl_a.d
new file mode 100644
index 000000000..998c8b6df
--- /dev/null
+++ b/Apps/FlightSoftware/MotorControl/Release/driverlib/framctl_a.d
@@ -0,0 +1,45 @@
+# FIXED
+
+driverlib/framctl_a.obj: ../driverlib/framctl_a.c
+driverlib/framctl_a.obj: ../driverlib/inc/hw_memmap.h
+driverlib/framctl_a.obj: C:/ti/ccs930/ccs/ccs_base/msp430/include/msp430.h
+driverlib/framctl_a.obj: C:/ti/ccs930/ccs/ccs_base/msp430/include/msp430fr5994.h
+driverlib/framctl_a.obj: C:/ti/ccs930/ccs/ccs_base/msp430/include/in430.h
+driverlib/framctl_a.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/intrinsics.h
+driverlib/framctl_a.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/intrinsics_legacy_undefs.h
+driverlib/framctl_a.obj: C:/ti/ccs930/ccs/ccs_base/msp430/include/legacy.h
+driverlib/framctl_a.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/stdint.h
+driverlib/framctl_a.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/_stdint40.h
+driverlib/framctl_a.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/stdint.h
+driverlib/framctl_a.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/cdefs.h
+driverlib/framctl_a.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/_types.h
+driverlib/framctl_a.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/machine/_types.h
+driverlib/framctl_a.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/machine/_stdint.h
+driverlib/framctl_a.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/_stdint.h
+driverlib/framctl_a.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/stdbool.h
+driverlib/framctl_a.obj: ../driverlib/framctl_a.h
+driverlib/framctl_a.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/assert.h
+driverlib/framctl_a.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/_ti_config.h
+driverlib/framctl_a.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/linkage.h
+
+../driverlib/framctl_a.c:
+../driverlib/inc/hw_memmap.h:
+C:/ti/ccs930/ccs/ccs_base/msp430/include/msp430.h:
+C:/ti/ccs930/ccs/ccs_base/msp430/include/msp430fr5994.h:
+C:/ti/ccs930/ccs/ccs_base/msp430/include/in430.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/intrinsics.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/intrinsics_legacy_undefs.h:
+C:/ti/ccs930/ccs/ccs_base/msp430/include/legacy.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/stdint.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/_stdint40.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/stdint.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/cdefs.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/_types.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/machine/_types.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/machine/_stdint.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/_stdint.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/stdbool.h:
+../driverlib/framctl_a.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/assert.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/_ti_config.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/linkage.h:
diff --git a/Apps/FlightSoftware/MotorControl/Release/driverlib/framctl_a.obj b/Apps/FlightSoftware/MotorControl/Release/driverlib/framctl_a.obj
new file mode 100644
index 000000000..878c655bc
Binary files /dev/null and b/Apps/FlightSoftware/MotorControl/Release/driverlib/framctl_a.obj differ
diff --git a/Apps/FlightSoftware/MotorControl/Release/driverlib/gpio.d b/Apps/FlightSoftware/MotorControl/Release/driverlib/gpio.d
new file mode 100644
index 000000000..250fad31f
--- /dev/null
+++ b/Apps/FlightSoftware/MotorControl/Release/driverlib/gpio.d
@@ -0,0 +1,45 @@
+# FIXED
+
+driverlib/gpio.obj: ../driverlib/gpio.c
+driverlib/gpio.obj: ../driverlib/inc/hw_memmap.h
+driverlib/gpio.obj: C:/ti/ccs930/ccs/ccs_base/msp430/include/msp430.h
+driverlib/gpio.obj: C:/ti/ccs930/ccs/ccs_base/msp430/include/msp430fr5994.h
+driverlib/gpio.obj: C:/ti/ccs930/ccs/ccs_base/msp430/include/in430.h
+driverlib/gpio.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/intrinsics.h
+driverlib/gpio.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/intrinsics_legacy_undefs.h
+driverlib/gpio.obj: C:/ti/ccs930/ccs/ccs_base/msp430/include/legacy.h
+driverlib/gpio.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/stdint.h
+driverlib/gpio.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/_stdint40.h
+driverlib/gpio.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/stdint.h
+driverlib/gpio.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/cdefs.h
+driverlib/gpio.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/_types.h
+driverlib/gpio.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/machine/_types.h
+driverlib/gpio.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/machine/_stdint.h
+driverlib/gpio.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/_stdint.h
+driverlib/gpio.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/stdbool.h
+driverlib/gpio.obj: ../driverlib/gpio.h
+driverlib/gpio.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/assert.h
+driverlib/gpio.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/_ti_config.h
+driverlib/gpio.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/linkage.h
+
+../driverlib/gpio.c:
+../driverlib/inc/hw_memmap.h:
+C:/ti/ccs930/ccs/ccs_base/msp430/include/msp430.h:
+C:/ti/ccs930/ccs/ccs_base/msp430/include/msp430fr5994.h:
+C:/ti/ccs930/ccs/ccs_base/msp430/include/in430.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/intrinsics.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/intrinsics_legacy_undefs.h:
+C:/ti/ccs930/ccs/ccs_base/msp430/include/legacy.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/stdint.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/_stdint40.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/stdint.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/cdefs.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/_types.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/machine/_types.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/machine/_stdint.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/_stdint.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/stdbool.h:
+../driverlib/gpio.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/assert.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/_ti_config.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/linkage.h:
diff --git a/Apps/FlightSoftware/MotorControl/Release/driverlib/gpio.obj b/Apps/FlightSoftware/MotorControl/Release/driverlib/gpio.obj
new file mode 100644
index 000000000..2b662621e
Binary files /dev/null and b/Apps/FlightSoftware/MotorControl/Release/driverlib/gpio.obj differ
diff --git a/Apps/FlightSoftware/MotorControl/Release/driverlib/hspll.d b/Apps/FlightSoftware/MotorControl/Release/driverlib/hspll.d
new file mode 100644
index 000000000..d6e03143c
--- /dev/null
+++ b/Apps/FlightSoftware/MotorControl/Release/driverlib/hspll.d
@@ -0,0 +1,37 @@
+# FIXED
+
+driverlib/hspll.obj: ../driverlib/hspll.c
+driverlib/hspll.obj: ../driverlib/inc/hw_memmap.h
+driverlib/hspll.obj: C:/ti/ccs930/ccs/ccs_base/msp430/include/msp430.h
+driverlib/hspll.obj: C:/ti/ccs930/ccs/ccs_base/msp430/include/msp430fr5994.h
+driverlib/hspll.obj: C:/ti/ccs930/ccs/ccs_base/msp430/include/in430.h
+driverlib/hspll.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/intrinsics.h
+driverlib/hspll.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/intrinsics_legacy_undefs.h
+driverlib/hspll.obj: C:/ti/ccs930/ccs/ccs_base/msp430/include/legacy.h
+driverlib/hspll.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/stdint.h
+driverlib/hspll.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/_stdint40.h
+driverlib/hspll.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/stdint.h
+driverlib/hspll.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/cdefs.h
+driverlib/hspll.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/_types.h
+driverlib/hspll.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/machine/_types.h
+driverlib/hspll.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/machine/_stdint.h
+driverlib/hspll.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/_stdint.h
+driverlib/hspll.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/stdbool.h
+
+../driverlib/hspll.c:
+../driverlib/inc/hw_memmap.h:
+C:/ti/ccs930/ccs/ccs_base/msp430/include/msp430.h:
+C:/ti/ccs930/ccs/ccs_base/msp430/include/msp430fr5994.h:
+C:/ti/ccs930/ccs/ccs_base/msp430/include/in430.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/intrinsics.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/intrinsics_legacy_undefs.h:
+C:/ti/ccs930/ccs/ccs_base/msp430/include/legacy.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/stdint.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/_stdint40.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/stdint.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/cdefs.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/_types.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/machine/_types.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/machine/_stdint.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/_stdint.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/stdbool.h:
diff --git a/Apps/FlightSoftware/MotorControl/Release/driverlib/hspll.obj b/Apps/FlightSoftware/MotorControl/Release/driverlib/hspll.obj
new file mode 100644
index 000000000..39f930618
Binary files /dev/null and b/Apps/FlightSoftware/MotorControl/Release/driverlib/hspll.obj differ
diff --git a/Apps/FlightSoftware/MotorControl/Release/driverlib/lcd_c.d b/Apps/FlightSoftware/MotorControl/Release/driverlib/lcd_c.d
new file mode 100644
index 000000000..52e8e8582
--- /dev/null
+++ b/Apps/FlightSoftware/MotorControl/Release/driverlib/lcd_c.d
@@ -0,0 +1,37 @@
+# FIXED
+
+driverlib/lcd_c.obj: ../driverlib/lcd_c.c
+driverlib/lcd_c.obj: ../driverlib/inc/hw_memmap.h
+driverlib/lcd_c.obj: C:/ti/ccs930/ccs/ccs_base/msp430/include/msp430.h
+driverlib/lcd_c.obj: C:/ti/ccs930/ccs/ccs_base/msp430/include/msp430fr5994.h
+driverlib/lcd_c.obj: C:/ti/ccs930/ccs/ccs_base/msp430/include/in430.h
+driverlib/lcd_c.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/intrinsics.h
+driverlib/lcd_c.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/intrinsics_legacy_undefs.h
+driverlib/lcd_c.obj: C:/ti/ccs930/ccs/ccs_base/msp430/include/legacy.h
+driverlib/lcd_c.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/stdint.h
+driverlib/lcd_c.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/_stdint40.h
+driverlib/lcd_c.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/stdint.h
+driverlib/lcd_c.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/cdefs.h
+driverlib/lcd_c.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/_types.h
+driverlib/lcd_c.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/machine/_types.h
+driverlib/lcd_c.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/machine/_stdint.h
+driverlib/lcd_c.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/_stdint.h
+driverlib/lcd_c.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/stdbool.h
+
+../driverlib/lcd_c.c:
+../driverlib/inc/hw_memmap.h:
+C:/ti/ccs930/ccs/ccs_base/msp430/include/msp430.h:
+C:/ti/ccs930/ccs/ccs_base/msp430/include/msp430fr5994.h:
+C:/ti/ccs930/ccs/ccs_base/msp430/include/in430.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/intrinsics.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/intrinsics_legacy_undefs.h:
+C:/ti/ccs930/ccs/ccs_base/msp430/include/legacy.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/stdint.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/_stdint40.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/stdint.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/cdefs.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/_types.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/machine/_types.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/machine/_stdint.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/_stdint.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/stdbool.h:
diff --git a/Apps/FlightSoftware/MotorControl/Release/driverlib/lcd_c.obj b/Apps/FlightSoftware/MotorControl/Release/driverlib/lcd_c.obj
new file mode 100644
index 000000000..5b8b99f21
Binary files /dev/null and b/Apps/FlightSoftware/MotorControl/Release/driverlib/lcd_c.obj differ
diff --git a/Apps/FlightSoftware/MotorControl/Release/driverlib/mpu.d b/Apps/FlightSoftware/MotorControl/Release/driverlib/mpu.d
new file mode 100644
index 000000000..f0d32ca3d
--- /dev/null
+++ b/Apps/FlightSoftware/MotorControl/Release/driverlib/mpu.d
@@ -0,0 +1,45 @@
+# FIXED
+
+driverlib/mpu.obj: ../driverlib/mpu.c
+driverlib/mpu.obj: ../driverlib/inc/hw_memmap.h
+driverlib/mpu.obj: C:/ti/ccs930/ccs/ccs_base/msp430/include/msp430.h
+driverlib/mpu.obj: C:/ti/ccs930/ccs/ccs_base/msp430/include/msp430fr5994.h
+driverlib/mpu.obj: C:/ti/ccs930/ccs/ccs_base/msp430/include/in430.h
+driverlib/mpu.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/intrinsics.h
+driverlib/mpu.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/intrinsics_legacy_undefs.h
+driverlib/mpu.obj: C:/ti/ccs930/ccs/ccs_base/msp430/include/legacy.h
+driverlib/mpu.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/stdint.h
+driverlib/mpu.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/_stdint40.h
+driverlib/mpu.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/stdint.h
+driverlib/mpu.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/cdefs.h
+driverlib/mpu.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/_types.h
+driverlib/mpu.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/machine/_types.h
+driverlib/mpu.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/machine/_stdint.h
+driverlib/mpu.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/_stdint.h
+driverlib/mpu.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/stdbool.h
+driverlib/mpu.obj: ../driverlib/mpu.h
+driverlib/mpu.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/assert.h
+driverlib/mpu.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/_ti_config.h
+driverlib/mpu.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/linkage.h
+
+../driverlib/mpu.c:
+../driverlib/inc/hw_memmap.h:
+C:/ti/ccs930/ccs/ccs_base/msp430/include/msp430.h:
+C:/ti/ccs930/ccs/ccs_base/msp430/include/msp430fr5994.h:
+C:/ti/ccs930/ccs/ccs_base/msp430/include/in430.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/intrinsics.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/intrinsics_legacy_undefs.h:
+C:/ti/ccs930/ccs/ccs_base/msp430/include/legacy.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/stdint.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/_stdint40.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/stdint.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/cdefs.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/_types.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/machine/_types.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/machine/_stdint.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/_stdint.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/stdbool.h:
+../driverlib/mpu.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/assert.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/_ti_config.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/linkage.h:
diff --git a/Apps/FlightSoftware/MotorControl/Release/driverlib/mpu.obj b/Apps/FlightSoftware/MotorControl/Release/driverlib/mpu.obj
new file mode 100644
index 000000000..2995b9f4d
Binary files /dev/null and b/Apps/FlightSoftware/MotorControl/Release/driverlib/mpu.obj differ
diff --git a/Apps/FlightSoftware/MotorControl/Release/driverlib/mpy32.d b/Apps/FlightSoftware/MotorControl/Release/driverlib/mpy32.d
new file mode 100644
index 000000000..73ce1f5a1
--- /dev/null
+++ b/Apps/FlightSoftware/MotorControl/Release/driverlib/mpy32.d
@@ -0,0 +1,45 @@
+# FIXED
+
+driverlib/mpy32.obj: ../driverlib/mpy32.c
+driverlib/mpy32.obj: ../driverlib/inc/hw_memmap.h
+driverlib/mpy32.obj: C:/ti/ccs930/ccs/ccs_base/msp430/include/msp430.h
+driverlib/mpy32.obj: C:/ti/ccs930/ccs/ccs_base/msp430/include/msp430fr5994.h
+driverlib/mpy32.obj: C:/ti/ccs930/ccs/ccs_base/msp430/include/in430.h
+driverlib/mpy32.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/intrinsics.h
+driverlib/mpy32.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/intrinsics_legacy_undefs.h
+driverlib/mpy32.obj: C:/ti/ccs930/ccs/ccs_base/msp430/include/legacy.h
+driverlib/mpy32.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/stdint.h
+driverlib/mpy32.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/_stdint40.h
+driverlib/mpy32.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/stdint.h
+driverlib/mpy32.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/cdefs.h
+driverlib/mpy32.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/_types.h
+driverlib/mpy32.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/machine/_types.h
+driverlib/mpy32.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/machine/_stdint.h
+driverlib/mpy32.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/_stdint.h
+driverlib/mpy32.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/stdbool.h
+driverlib/mpy32.obj: ../driverlib/mpy32.h
+driverlib/mpy32.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/assert.h
+driverlib/mpy32.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/_ti_config.h
+driverlib/mpy32.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/linkage.h
+
+../driverlib/mpy32.c:
+../driverlib/inc/hw_memmap.h:
+C:/ti/ccs930/ccs/ccs_base/msp430/include/msp430.h:
+C:/ti/ccs930/ccs/ccs_base/msp430/include/msp430fr5994.h:
+C:/ti/ccs930/ccs/ccs_base/msp430/include/in430.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/intrinsics.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/intrinsics_legacy_undefs.h:
+C:/ti/ccs930/ccs/ccs_base/msp430/include/legacy.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/stdint.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/_stdint40.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/stdint.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/cdefs.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/_types.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/machine/_types.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/machine/_stdint.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/_stdint.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/stdbool.h:
+../driverlib/mpy32.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/assert.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/_ti_config.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/linkage.h:
diff --git a/Apps/FlightSoftware/MotorControl/Release/driverlib/mpy32.obj b/Apps/FlightSoftware/MotorControl/Release/driverlib/mpy32.obj
new file mode 100644
index 000000000..9a09bbe77
Binary files /dev/null and b/Apps/FlightSoftware/MotorControl/Release/driverlib/mpy32.obj differ
diff --git a/Apps/FlightSoftware/MotorControl/Release/driverlib/mtif.d b/Apps/FlightSoftware/MotorControl/Release/driverlib/mtif.d
new file mode 100644
index 000000000..1e01776ae
--- /dev/null
+++ b/Apps/FlightSoftware/MotorControl/Release/driverlib/mtif.d
@@ -0,0 +1,37 @@
+# FIXED
+
+driverlib/mtif.obj: ../driverlib/mtif.c
+driverlib/mtif.obj: ../driverlib/inc/hw_memmap.h
+driverlib/mtif.obj: C:/ti/ccs930/ccs/ccs_base/msp430/include/msp430.h
+driverlib/mtif.obj: C:/ti/ccs930/ccs/ccs_base/msp430/include/msp430fr5994.h
+driverlib/mtif.obj: C:/ti/ccs930/ccs/ccs_base/msp430/include/in430.h
+driverlib/mtif.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/intrinsics.h
+driverlib/mtif.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/intrinsics_legacy_undefs.h
+driverlib/mtif.obj: C:/ti/ccs930/ccs/ccs_base/msp430/include/legacy.h
+driverlib/mtif.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/stdint.h
+driverlib/mtif.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/_stdint40.h
+driverlib/mtif.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/stdint.h
+driverlib/mtif.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/cdefs.h
+driverlib/mtif.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/_types.h
+driverlib/mtif.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/machine/_types.h
+driverlib/mtif.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/machine/_stdint.h
+driverlib/mtif.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/_stdint.h
+driverlib/mtif.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/stdbool.h
+
+../driverlib/mtif.c:
+../driverlib/inc/hw_memmap.h:
+C:/ti/ccs930/ccs/ccs_base/msp430/include/msp430.h:
+C:/ti/ccs930/ccs/ccs_base/msp430/include/msp430fr5994.h:
+C:/ti/ccs930/ccs/ccs_base/msp430/include/in430.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/intrinsics.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/intrinsics_legacy_undefs.h:
+C:/ti/ccs930/ccs/ccs_base/msp430/include/legacy.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/stdint.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/_stdint40.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/stdint.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/cdefs.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/_types.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/machine/_types.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/machine/_stdint.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/_stdint.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/stdbool.h:
diff --git a/Apps/FlightSoftware/MotorControl/Release/driverlib/mtif.obj b/Apps/FlightSoftware/MotorControl/Release/driverlib/mtif.obj
new file mode 100644
index 000000000..51ce18d68
Binary files /dev/null and b/Apps/FlightSoftware/MotorControl/Release/driverlib/mtif.obj differ
diff --git a/Apps/FlightSoftware/MotorControl/Release/driverlib/pmm.d b/Apps/FlightSoftware/MotorControl/Release/driverlib/pmm.d
new file mode 100644
index 000000000..f51821dd7
--- /dev/null
+++ b/Apps/FlightSoftware/MotorControl/Release/driverlib/pmm.d
@@ -0,0 +1,45 @@
+# FIXED
+
+driverlib/pmm.obj: ../driverlib/pmm.c
+driverlib/pmm.obj: ../driverlib/inc/hw_memmap.h
+driverlib/pmm.obj: C:/ti/ccs930/ccs/ccs_base/msp430/include/msp430.h
+driverlib/pmm.obj: C:/ti/ccs930/ccs/ccs_base/msp430/include/msp430fr5994.h
+driverlib/pmm.obj: C:/ti/ccs930/ccs/ccs_base/msp430/include/in430.h
+driverlib/pmm.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/intrinsics.h
+driverlib/pmm.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/intrinsics_legacy_undefs.h
+driverlib/pmm.obj: C:/ti/ccs930/ccs/ccs_base/msp430/include/legacy.h
+driverlib/pmm.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/stdint.h
+driverlib/pmm.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/_stdint40.h
+driverlib/pmm.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/stdint.h
+driverlib/pmm.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/cdefs.h
+driverlib/pmm.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/_types.h
+driverlib/pmm.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/machine/_types.h
+driverlib/pmm.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/machine/_stdint.h
+driverlib/pmm.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/_stdint.h
+driverlib/pmm.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/stdbool.h
+driverlib/pmm.obj: ../driverlib/pmm.h
+driverlib/pmm.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/assert.h
+driverlib/pmm.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/_ti_config.h
+driverlib/pmm.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/linkage.h
+
+../driverlib/pmm.c:
+../driverlib/inc/hw_memmap.h:
+C:/ti/ccs930/ccs/ccs_base/msp430/include/msp430.h:
+C:/ti/ccs930/ccs/ccs_base/msp430/include/msp430fr5994.h:
+C:/ti/ccs930/ccs/ccs_base/msp430/include/in430.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/intrinsics.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/intrinsics_legacy_undefs.h:
+C:/ti/ccs930/ccs/ccs_base/msp430/include/legacy.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/stdint.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/_stdint40.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/stdint.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/cdefs.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/_types.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/machine/_types.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/machine/_stdint.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/_stdint.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/stdbool.h:
+../driverlib/pmm.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/assert.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/_ti_config.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/linkage.h:
diff --git a/Apps/FlightSoftware/MotorControl/Release/driverlib/pmm.obj b/Apps/FlightSoftware/MotorControl/Release/driverlib/pmm.obj
new file mode 100644
index 000000000..1224a966e
Binary files /dev/null and b/Apps/FlightSoftware/MotorControl/Release/driverlib/pmm.obj differ
diff --git a/Apps/FlightSoftware/MotorControl/Release/driverlib/ram.d b/Apps/FlightSoftware/MotorControl/Release/driverlib/ram.d
new file mode 100644
index 000000000..c9c239747
--- /dev/null
+++ b/Apps/FlightSoftware/MotorControl/Release/driverlib/ram.d
@@ -0,0 +1,45 @@
+# FIXED
+
+driverlib/ram.obj: ../driverlib/ram.c
+driverlib/ram.obj: ../driverlib/inc/hw_memmap.h
+driverlib/ram.obj: C:/ti/ccs930/ccs/ccs_base/msp430/include/msp430.h
+driverlib/ram.obj: C:/ti/ccs930/ccs/ccs_base/msp430/include/msp430fr5994.h
+driverlib/ram.obj: C:/ti/ccs930/ccs/ccs_base/msp430/include/in430.h
+driverlib/ram.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/intrinsics.h
+driverlib/ram.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/intrinsics_legacy_undefs.h
+driverlib/ram.obj: C:/ti/ccs930/ccs/ccs_base/msp430/include/legacy.h
+driverlib/ram.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/stdint.h
+driverlib/ram.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/_stdint40.h
+driverlib/ram.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/stdint.h
+driverlib/ram.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/cdefs.h
+driverlib/ram.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/_types.h
+driverlib/ram.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/machine/_types.h
+driverlib/ram.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/machine/_stdint.h
+driverlib/ram.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/_stdint.h
+driverlib/ram.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/stdbool.h
+driverlib/ram.obj: ../driverlib/ram.h
+driverlib/ram.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/assert.h
+driverlib/ram.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/_ti_config.h
+driverlib/ram.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/linkage.h
+
+../driverlib/ram.c:
+../driverlib/inc/hw_memmap.h:
+C:/ti/ccs930/ccs/ccs_base/msp430/include/msp430.h:
+C:/ti/ccs930/ccs/ccs_base/msp430/include/msp430fr5994.h:
+C:/ti/ccs930/ccs/ccs_base/msp430/include/in430.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/intrinsics.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/intrinsics_legacy_undefs.h:
+C:/ti/ccs930/ccs/ccs_base/msp430/include/legacy.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/stdint.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/_stdint40.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/stdint.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/cdefs.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/_types.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/machine/_types.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/machine/_stdint.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/_stdint.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/stdbool.h:
+../driverlib/ram.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/assert.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/_ti_config.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/linkage.h:
diff --git a/Apps/FlightSoftware/MotorControl/Release/driverlib/ram.obj b/Apps/FlightSoftware/MotorControl/Release/driverlib/ram.obj
new file mode 100644
index 000000000..ecc39b7cf
Binary files /dev/null and b/Apps/FlightSoftware/MotorControl/Release/driverlib/ram.obj differ
diff --git a/Apps/FlightSoftware/MotorControl/Release/driverlib/ref_a.d b/Apps/FlightSoftware/MotorControl/Release/driverlib/ref_a.d
new file mode 100644
index 000000000..1b91a78a8
--- /dev/null
+++ b/Apps/FlightSoftware/MotorControl/Release/driverlib/ref_a.d
@@ -0,0 +1,45 @@
+# FIXED
+
+driverlib/ref_a.obj: ../driverlib/ref_a.c
+driverlib/ref_a.obj: ../driverlib/inc/hw_memmap.h
+driverlib/ref_a.obj: C:/ti/ccs930/ccs/ccs_base/msp430/include/msp430.h
+driverlib/ref_a.obj: C:/ti/ccs930/ccs/ccs_base/msp430/include/msp430fr5994.h
+driverlib/ref_a.obj: C:/ti/ccs930/ccs/ccs_base/msp430/include/in430.h
+driverlib/ref_a.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/intrinsics.h
+driverlib/ref_a.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/intrinsics_legacy_undefs.h
+driverlib/ref_a.obj: C:/ti/ccs930/ccs/ccs_base/msp430/include/legacy.h
+driverlib/ref_a.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/stdint.h
+driverlib/ref_a.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/_stdint40.h
+driverlib/ref_a.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/stdint.h
+driverlib/ref_a.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/cdefs.h
+driverlib/ref_a.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/_types.h
+driverlib/ref_a.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/machine/_types.h
+driverlib/ref_a.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/machine/_stdint.h
+driverlib/ref_a.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/_stdint.h
+driverlib/ref_a.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/stdbool.h
+driverlib/ref_a.obj: ../driverlib/ref_a.h
+driverlib/ref_a.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/assert.h
+driverlib/ref_a.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/_ti_config.h
+driverlib/ref_a.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/linkage.h
+
+../driverlib/ref_a.c:
+../driverlib/inc/hw_memmap.h:
+C:/ti/ccs930/ccs/ccs_base/msp430/include/msp430.h:
+C:/ti/ccs930/ccs/ccs_base/msp430/include/msp430fr5994.h:
+C:/ti/ccs930/ccs/ccs_base/msp430/include/in430.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/intrinsics.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/intrinsics_legacy_undefs.h:
+C:/ti/ccs930/ccs/ccs_base/msp430/include/legacy.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/stdint.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/_stdint40.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/stdint.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/cdefs.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/_types.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/machine/_types.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/machine/_stdint.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/_stdint.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/stdbool.h:
+../driverlib/ref_a.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/assert.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/_ti_config.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/linkage.h:
diff --git a/Apps/FlightSoftware/MotorControl/Release/driverlib/ref_a.obj b/Apps/FlightSoftware/MotorControl/Release/driverlib/ref_a.obj
new file mode 100644
index 000000000..c0583c469
Binary files /dev/null and b/Apps/FlightSoftware/MotorControl/Release/driverlib/ref_a.obj differ
diff --git a/Apps/FlightSoftware/MotorControl/Release/driverlib/rtc_b.d b/Apps/FlightSoftware/MotorControl/Release/driverlib/rtc_b.d
new file mode 100644
index 000000000..b2b6a1801
--- /dev/null
+++ b/Apps/FlightSoftware/MotorControl/Release/driverlib/rtc_b.d
@@ -0,0 +1,37 @@
+# FIXED
+
+driverlib/rtc_b.obj: ../driverlib/rtc_b.c
+driverlib/rtc_b.obj: ../driverlib/inc/hw_memmap.h
+driverlib/rtc_b.obj: C:/ti/ccs930/ccs/ccs_base/msp430/include/msp430.h
+driverlib/rtc_b.obj: C:/ti/ccs930/ccs/ccs_base/msp430/include/msp430fr5994.h
+driverlib/rtc_b.obj: C:/ti/ccs930/ccs/ccs_base/msp430/include/in430.h
+driverlib/rtc_b.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/intrinsics.h
+driverlib/rtc_b.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/intrinsics_legacy_undefs.h
+driverlib/rtc_b.obj: C:/ti/ccs930/ccs/ccs_base/msp430/include/legacy.h
+driverlib/rtc_b.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/stdint.h
+driverlib/rtc_b.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/_stdint40.h
+driverlib/rtc_b.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/stdint.h
+driverlib/rtc_b.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/cdefs.h
+driverlib/rtc_b.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/_types.h
+driverlib/rtc_b.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/machine/_types.h
+driverlib/rtc_b.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/machine/_stdint.h
+driverlib/rtc_b.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/_stdint.h
+driverlib/rtc_b.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/stdbool.h
+
+../driverlib/rtc_b.c:
+../driverlib/inc/hw_memmap.h:
+C:/ti/ccs930/ccs/ccs_base/msp430/include/msp430.h:
+C:/ti/ccs930/ccs/ccs_base/msp430/include/msp430fr5994.h:
+C:/ti/ccs930/ccs/ccs_base/msp430/include/in430.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/intrinsics.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/intrinsics_legacy_undefs.h:
+C:/ti/ccs930/ccs/ccs_base/msp430/include/legacy.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/stdint.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/_stdint40.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/stdint.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/cdefs.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/_types.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/machine/_types.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/machine/_stdint.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/_stdint.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/stdbool.h:
diff --git a/Apps/FlightSoftware/MotorControl/Release/driverlib/rtc_b.obj b/Apps/FlightSoftware/MotorControl/Release/driverlib/rtc_b.obj
new file mode 100644
index 000000000..582ce2b06
Binary files /dev/null and b/Apps/FlightSoftware/MotorControl/Release/driverlib/rtc_b.obj differ
diff --git a/Apps/FlightSoftware/MotorControl/Release/driverlib/rtc_c.d b/Apps/FlightSoftware/MotorControl/Release/driverlib/rtc_c.d
new file mode 100644
index 000000000..59b141f05
--- /dev/null
+++ b/Apps/FlightSoftware/MotorControl/Release/driverlib/rtc_c.d
@@ -0,0 +1,45 @@
+# FIXED
+
+driverlib/rtc_c.obj: ../driverlib/rtc_c.c
+driverlib/rtc_c.obj: ../driverlib/inc/hw_memmap.h
+driverlib/rtc_c.obj: C:/ti/ccs930/ccs/ccs_base/msp430/include/msp430.h
+driverlib/rtc_c.obj: C:/ti/ccs930/ccs/ccs_base/msp430/include/msp430fr5994.h
+driverlib/rtc_c.obj: C:/ti/ccs930/ccs/ccs_base/msp430/include/in430.h
+driverlib/rtc_c.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/intrinsics.h
+driverlib/rtc_c.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/intrinsics_legacy_undefs.h
+driverlib/rtc_c.obj: C:/ti/ccs930/ccs/ccs_base/msp430/include/legacy.h
+driverlib/rtc_c.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/stdint.h
+driverlib/rtc_c.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/_stdint40.h
+driverlib/rtc_c.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/stdint.h
+driverlib/rtc_c.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/cdefs.h
+driverlib/rtc_c.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/_types.h
+driverlib/rtc_c.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/machine/_types.h
+driverlib/rtc_c.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/machine/_stdint.h
+driverlib/rtc_c.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/_stdint.h
+driverlib/rtc_c.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/stdbool.h
+driverlib/rtc_c.obj: ../driverlib/rtc_c.h
+driverlib/rtc_c.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/assert.h
+driverlib/rtc_c.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/_ti_config.h
+driverlib/rtc_c.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/linkage.h
+
+../driverlib/rtc_c.c:
+../driverlib/inc/hw_memmap.h:
+C:/ti/ccs930/ccs/ccs_base/msp430/include/msp430.h:
+C:/ti/ccs930/ccs/ccs_base/msp430/include/msp430fr5994.h:
+C:/ti/ccs930/ccs/ccs_base/msp430/include/in430.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/intrinsics.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/intrinsics_legacy_undefs.h:
+C:/ti/ccs930/ccs/ccs_base/msp430/include/legacy.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/stdint.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/_stdint40.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/stdint.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/cdefs.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/_types.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/machine/_types.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/machine/_stdint.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/_stdint.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/stdbool.h:
+../driverlib/rtc_c.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/assert.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/_ti_config.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/linkage.h:
diff --git a/Apps/FlightSoftware/MotorControl/Release/driverlib/rtc_c.obj b/Apps/FlightSoftware/MotorControl/Release/driverlib/rtc_c.obj
new file mode 100644
index 000000000..443e2ddbd
Binary files /dev/null and b/Apps/FlightSoftware/MotorControl/Release/driverlib/rtc_c.obj differ
diff --git a/Apps/FlightSoftware/MotorControl/Release/driverlib/saph.d b/Apps/FlightSoftware/MotorControl/Release/driverlib/saph.d
new file mode 100644
index 000000000..faea60371
--- /dev/null
+++ b/Apps/FlightSoftware/MotorControl/Release/driverlib/saph.d
@@ -0,0 +1,37 @@
+# FIXED
+
+driverlib/saph.obj: ../driverlib/saph.c
+driverlib/saph.obj: ../driverlib/inc/hw_memmap.h
+driverlib/saph.obj: C:/ti/ccs930/ccs/ccs_base/msp430/include/msp430.h
+driverlib/saph.obj: C:/ti/ccs930/ccs/ccs_base/msp430/include/msp430fr5994.h
+driverlib/saph.obj: C:/ti/ccs930/ccs/ccs_base/msp430/include/in430.h
+driverlib/saph.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/intrinsics.h
+driverlib/saph.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/intrinsics_legacy_undefs.h
+driverlib/saph.obj: C:/ti/ccs930/ccs/ccs_base/msp430/include/legacy.h
+driverlib/saph.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/stdint.h
+driverlib/saph.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/_stdint40.h
+driverlib/saph.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/stdint.h
+driverlib/saph.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/cdefs.h
+driverlib/saph.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/_types.h
+driverlib/saph.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/machine/_types.h
+driverlib/saph.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/machine/_stdint.h
+driverlib/saph.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/_stdint.h
+driverlib/saph.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/stdbool.h
+
+../driverlib/saph.c:
+../driverlib/inc/hw_memmap.h:
+C:/ti/ccs930/ccs/ccs_base/msp430/include/msp430.h:
+C:/ti/ccs930/ccs/ccs_base/msp430/include/msp430fr5994.h:
+C:/ti/ccs930/ccs/ccs_base/msp430/include/in430.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/intrinsics.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/intrinsics_legacy_undefs.h:
+C:/ti/ccs930/ccs/ccs_base/msp430/include/legacy.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/stdint.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/_stdint40.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/stdint.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/cdefs.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/_types.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/machine/_types.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/machine/_stdint.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/_stdint.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/stdbool.h:
diff --git a/Apps/FlightSoftware/MotorControl/Release/driverlib/saph.obj b/Apps/FlightSoftware/MotorControl/Release/driverlib/saph.obj
new file mode 100644
index 000000000..4de839ba6
Binary files /dev/null and b/Apps/FlightSoftware/MotorControl/Release/driverlib/saph.obj differ
diff --git a/Apps/FlightSoftware/MotorControl/Release/driverlib/sdhs.d b/Apps/FlightSoftware/MotorControl/Release/driverlib/sdhs.d
new file mode 100644
index 000000000..32d249838
--- /dev/null
+++ b/Apps/FlightSoftware/MotorControl/Release/driverlib/sdhs.d
@@ -0,0 +1,37 @@
+# FIXED
+
+driverlib/sdhs.obj: ../driverlib/sdhs.c
+driverlib/sdhs.obj: ../driverlib/inc/hw_memmap.h
+driverlib/sdhs.obj: C:/ti/ccs930/ccs/ccs_base/msp430/include/msp430.h
+driverlib/sdhs.obj: C:/ti/ccs930/ccs/ccs_base/msp430/include/msp430fr5994.h
+driverlib/sdhs.obj: C:/ti/ccs930/ccs/ccs_base/msp430/include/in430.h
+driverlib/sdhs.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/intrinsics.h
+driverlib/sdhs.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/intrinsics_legacy_undefs.h
+driverlib/sdhs.obj: C:/ti/ccs930/ccs/ccs_base/msp430/include/legacy.h
+driverlib/sdhs.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/stdint.h
+driverlib/sdhs.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/_stdint40.h
+driverlib/sdhs.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/stdint.h
+driverlib/sdhs.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/cdefs.h
+driverlib/sdhs.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/_types.h
+driverlib/sdhs.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/machine/_types.h
+driverlib/sdhs.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/machine/_stdint.h
+driverlib/sdhs.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/_stdint.h
+driverlib/sdhs.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/stdbool.h
+
+../driverlib/sdhs.c:
+../driverlib/inc/hw_memmap.h:
+C:/ti/ccs930/ccs/ccs_base/msp430/include/msp430.h:
+C:/ti/ccs930/ccs/ccs_base/msp430/include/msp430fr5994.h:
+C:/ti/ccs930/ccs/ccs_base/msp430/include/in430.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/intrinsics.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/intrinsics_legacy_undefs.h:
+C:/ti/ccs930/ccs/ccs_base/msp430/include/legacy.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/stdint.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/_stdint40.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/stdint.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/cdefs.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/_types.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/machine/_types.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/machine/_stdint.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/_stdint.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/stdbool.h:
diff --git a/Apps/FlightSoftware/MotorControl/Release/driverlib/sdhs.obj b/Apps/FlightSoftware/MotorControl/Release/driverlib/sdhs.obj
new file mode 100644
index 000000000..9b12f2ba3
Binary files /dev/null and b/Apps/FlightSoftware/MotorControl/Release/driverlib/sdhs.obj differ
diff --git a/Apps/FlightSoftware/MotorControl/Release/driverlib/sfr.d b/Apps/FlightSoftware/MotorControl/Release/driverlib/sfr.d
new file mode 100644
index 000000000..c7a94b196
--- /dev/null
+++ b/Apps/FlightSoftware/MotorControl/Release/driverlib/sfr.d
@@ -0,0 +1,45 @@
+# FIXED
+
+driverlib/sfr.obj: ../driverlib/sfr.c
+driverlib/sfr.obj: ../driverlib/inc/hw_memmap.h
+driverlib/sfr.obj: C:/ti/ccs930/ccs/ccs_base/msp430/include/msp430.h
+driverlib/sfr.obj: C:/ti/ccs930/ccs/ccs_base/msp430/include/msp430fr5994.h
+driverlib/sfr.obj: C:/ti/ccs930/ccs/ccs_base/msp430/include/in430.h
+driverlib/sfr.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/intrinsics.h
+driverlib/sfr.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/intrinsics_legacy_undefs.h
+driverlib/sfr.obj: C:/ti/ccs930/ccs/ccs_base/msp430/include/legacy.h
+driverlib/sfr.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/stdint.h
+driverlib/sfr.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/_stdint40.h
+driverlib/sfr.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/stdint.h
+driverlib/sfr.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/cdefs.h
+driverlib/sfr.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/_types.h
+driverlib/sfr.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/machine/_types.h
+driverlib/sfr.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/machine/_stdint.h
+driverlib/sfr.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/_stdint.h
+driverlib/sfr.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/stdbool.h
+driverlib/sfr.obj: ../driverlib/sfr.h
+driverlib/sfr.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/assert.h
+driverlib/sfr.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/_ti_config.h
+driverlib/sfr.obj: C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/linkage.h
+
+../driverlib/sfr.c:
+../driverlib/inc/hw_memmap.h:
+C:/ti/ccs930/ccs/ccs_base/msp430/include/msp430.h:
+C:/ti/ccs930/ccs/ccs_base/msp430/include/msp430fr5994.h:
+C:/ti/ccs930/ccs/ccs_base/msp430/include/in430.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/intrinsics.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/intrinsics_legacy_undefs.h:
+C:/ti/ccs930/ccs/ccs_base/msp430/include/legacy.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/stdint.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/_stdint40.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/stdint.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/cdefs.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/_types.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/machine/_types.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/machine/_stdint.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/sys/_stdint.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/stdbool.h:
+../driverlib/sfr.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/assert.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/_ti_config.h:
+C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include/linkage.h:
diff --git a/Apps/FlightSoftware/MotorControl/Release/driverlib/sfr.obj b/Apps/FlightSoftware/MotorControl/Release/driverlib/sfr.obj
new file mode 100644
index 000000000..cb76c8691
Binary files /dev/null and b/Apps/FlightSoftware/MotorControl/Release/driverlib/sfr.obj differ
diff --git a/Apps/FlightSoftware/MotorControl/Release/driverlib/subdir_rules.mk b/Apps/FlightSoftware/MotorControl/Release/driverlib/subdir_rules.mk
new file mode 100644
index 000000000..f0b0b87a0
--- /dev/null
+++ b/Apps/FlightSoftware/MotorControl/Release/driverlib/subdir_rules.mk
@@ -0,0 +1,15 @@
+################################################################################
+# Automatically-generated file. Do not edit!
+################################################################################
+
+SHELL = cmd.exe
+
+# Each subdirectory must supply rules for building sources it contributes
+driverlib/%.obj: ../driverlib/%.c $(GEN_OPTS) | $(GEN_FILES) $(GEN_MISC_FILES)
+ @echo 'Building file: "$<"'
+ @echo 'Invoking: MSP430 Compiler'
+ "C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/bin/cl430" -vmspx --data_model=restricted -O2 --use_hw_mpy=F5 --include_path="C:/ti/ccs930/ccs/ccs_base/msp430/include" --include_path="E:/xprize/Documents/MotorControlDev/MotorControl/MotorControl/driverlib" --include_path="C:/ti/ccs930/ccs/ccs_base/msp430ware_3_80_11_07/iqmathlib/include" --include_path="E:/xprize/Documents/GitHub/motorControl_dev/Apps/FlightSoftware/MotorControl" --include_path="C:/ti/ccs930/ccs/tools/compiler/ti-cgt-msp430_18.12.4.LTS/include" --advice:power=all --advice:hw_config=all --define=__MSP430FR5994__ --define=_MPU_ENABLE --printf_support=minimal --diag_warning=225 --diag_wrap=off --display_error_number --silicon_errata=CPU21 --silicon_errata=CPU22 --silicon_errata=CPU40 --preproc_with_compile --preproc_dependency="driverlib/$(basename $(
+
+bool ADC12_B_init(uint16_t baseAddress, ADC12_B_initParam *param)
+{
+ //Make sure the ENC bit is cleared before initializing the ADC12
+ HWREG8(baseAddress + OFS_ADC12CTL0_L) &= ~ADC12ENC;
+
+ bool retVal = STATUS_SUCCESS;
+
+ //Turn OFF ADC12B Module & Clear Interrupt Registers
+ HWREG16(baseAddress + OFS_ADC12CTL0) &= ~(ADC12ON + ADC12ENC + ADC12SC);
+ HWREG16(baseAddress + OFS_ADC12IER0) &= 0x0000; //Reset ALL interrupt enables
+ HWREG16(baseAddress + OFS_ADC12IER1) &= 0x0000;
+ HWREG16(baseAddress + OFS_ADC12IER2) &= 0x0000;
+ HWREG16(baseAddress + OFS_ADC12IFGR0) &= 0x0000; //Reset ALL interrupt flags
+ HWREG16(baseAddress + OFS_ADC12IFGR1) &= 0x0000;
+ HWREG16(baseAddress + OFS_ADC12IFGR2) &= 0x0000;
+
+ //Set ADC12B Control 1
+ HWREG16(baseAddress + OFS_ADC12CTL1) =
+ param->sampleHoldSignalSourceSelect //Setup the Sample-and-Hold Source
+ + (param->clockSourceDivider & ADC12DIV_7) //Set Clock Divider
+ + (param->clockSourcePredivider & ADC12PDIV__64)
+ + param->clockSourceSelect; //Setup Clock Source
+
+ //Set ADC12B Control 2
+ HWREG16(baseAddress + OFS_ADC12CTL2) =
+ ADC12RES_2; //Default resolution to 12-bits
+
+ //Set ADC12B Control 3
+ HWREG16(baseAddress + OFS_ADC12CTL3) =
+ param->internalChannelMap; // Map internal channels
+
+ return (retVal) ;
+}
+
+void ADC12_B_enable (uint16_t baseAddress)
+{
+ // Clear ENC bit
+ HWREG8(baseAddress + OFS_ADC12CTL0_L) &= ~ADC12ENC;
+
+ //Enable the ADC12B Module
+ HWREG8(baseAddress + OFS_ADC12CTL0_L) |= ADC12ON;
+}
+
+void ADC12_B_disable (uint16_t baseAddress)
+{
+ // Clear ENC bit
+ HWREG8(baseAddress + OFS_ADC12CTL0_L) &= ~ADC12ENC;
+
+ // Must be implemented due to ADC66 errata
+ // Wait for ADC to finish conversion
+ while (ADC12_B_isBusy(baseAddress)) ;
+
+ //Disable ADC12B module
+ HWREG8(baseAddress + OFS_ADC12CTL0_L) &= ~ADC12ON;
+}
+
+void ADC12_B_setupSamplingTimer (uint16_t baseAddress,
+ uint16_t clockCycleHoldCountLowMem,
+ uint16_t clockCycleHoldCountHighMem,
+ uint16_t multipleSamplesEnabled)
+{
+ HWREG16(baseAddress + OFS_ADC12CTL1) |= ADC12SHP;
+
+ //Reset clock cycle hold counts and msc bit before setting them
+ HWREG16(baseAddress + OFS_ADC12CTL0) &=
+ ~(ADC12SHT0_15 + ADC12SHT1_15 + ADC12MSC);
+
+ //Set clock cycle hold counts and msc bit
+ HWREG16(baseAddress + OFS_ADC12CTL0) |= clockCycleHoldCountLowMem
+ + (clockCycleHoldCountHighMem << 4)
+ + multipleSamplesEnabled;
+}
+
+void ADC12_B_disableSamplingTimer (uint16_t baseAddress)
+{
+ HWREG16(baseAddress + OFS_ADC12CTL1) &= ~(ADC12SHP);
+}
+
+void ADC12_B_configureMemory(uint16_t baseAddress,
+ ADC12_B_configureMemoryParam *param)
+{
+ //Make sure the ENC bit is cleared before configuring a Memory Buffer Control
+ assert( !(HWREG16(baseAddress + OFS_ADC12CTL0) & ADC12ENC) );
+
+ if(!(HWREG16(baseAddress + OFS_ADC12CTL0) & ADC12ENC))
+ {
+ //Set the offset in respect to ADC12MCTL0
+ uint16_t memoryBufferControlOffset =
+ (OFS_ADC12MCTL0 + param->memoryBufferControlIndex);
+
+ //Reset the memory buffer control and Set the input source
+ HWREG16(baseAddress + memoryBufferControlOffset) =
+ param->inputSourceSelect //Set Input Source
+ + param->refVoltageSourceSelect //Set Vref+/-
+ + param->endOfSequence; //Set End of Sequence
+
+ HWREG16(baseAddress + memoryBufferControlOffset)
+ &= ~(ADC12WINC);
+
+ HWREG16(baseAddress + memoryBufferControlOffset)
+ |= param->windowComparatorSelect;
+ //(OFS_ADC12MCTL0_H + memoryIndex) == offset of OFS_ADC12MCTLX_H
+
+ HWREG16(baseAddress + memoryBufferControlOffset)
+ &= ~(ADC12DIF);
+
+ HWREG16(baseAddress + memoryBufferControlOffset)
+ |= param->differentialModeSelect;
+ //(OFS_ADC12MCTL0_H + memoryIndex) == offset of OFS_ADC12MCTLX_H
+ }
+}
+void ADC12_B_setWindowCompAdvanced (uint16_t baseAddress,
+ uint16_t highThreshold,
+ uint16_t lowThreshold)
+{
+ HWREG16(baseAddress + OFS_ADC12HI) = highThreshold;
+ HWREG16(baseAddress + OFS_ADC12LO) = lowThreshold;
+}
+
+void ADC12_B_enableInterrupt (uint16_t baseAddress,
+ uint16_t interruptMask0,
+ uint16_t interruptMask1,
+ uint16_t interruptMask2)
+{
+ HWREG16(baseAddress + OFS_ADC12IER0) |= interruptMask0;
+ HWREG16(baseAddress + OFS_ADC12IER1) |= interruptMask1;
+ HWREG16(baseAddress + OFS_ADC12IER2) |= interruptMask2;
+}
+
+void ADC12_B_disableInterrupt (uint16_t baseAddress,
+ uint16_t interruptMask0,
+ uint16_t interruptMask1,
+ uint16_t interruptMask2)
+{
+ HWREG16(baseAddress + OFS_ADC12IER0) &= ~(interruptMask0);
+ HWREG16(baseAddress + OFS_ADC12IER1) &= ~(interruptMask1);
+ HWREG16(baseAddress + OFS_ADC12IER2) &= ~(interruptMask2);
+}
+
+void ADC12_B_clearInterrupt (uint16_t baseAddress,
+ uint8_t interruptRegisterChoice,
+ uint16_t memoryInterruptFlagMask)
+{
+ HWREG16(baseAddress + OFS_ADC12IFGR0 + 2*interruptRegisterChoice) &=
+ ~(memoryInterruptFlagMask);
+
+}
+
+uint16_t ADC12_B_getInterruptStatus (uint16_t baseAddress,
+ uint8_t interruptRegisterChoice,
+ uint16_t memoryInterruptFlagMask)
+{
+ return ( HWREG16(baseAddress + OFS_ADC12IFGR0 + 2*interruptRegisterChoice)
+ & memoryInterruptFlagMask );
+}
+
+void ADC12_B_startConversion (uint16_t baseAddress,
+ uint16_t startingMemoryBufferIndex,
+ uint8_t conversionSequenceModeSelect)
+{
+ //Reset the ENC bit to set the starting memory address and conversion mode
+ //sequence
+ HWREG8(baseAddress + OFS_ADC12CTL0_L) &= ~(ADC12ENC);
+ //Reset the bits about to be set
+ HWREG16(baseAddress + OFS_ADC12CTL3) &= ~(ADC12CSTARTADD_31);
+ HWREG16(baseAddress + OFS_ADC12CTL1) &= ~(ADC12CONSEQ_3);
+
+ HWREG16(baseAddress + OFS_ADC12CTL3) |= startingMemoryBufferIndex;
+ HWREG16(baseAddress + OFS_ADC12CTL1) |= conversionSequenceModeSelect;
+ HWREG8(baseAddress + OFS_ADC12CTL0_L) |= ADC12ENC + ADC12SC;
+}
+
+void ADC12_B_disableConversions (uint16_t baseAddress, bool preempt)
+{
+ if (ADC12_B_PREEMPTCONVERSION == preempt){
+ HWREG8(baseAddress + OFS_ADC12CTL1_L) &= ~(ADC12CONSEQ_3);
+ //Reset conversion sequence mode to single-channel, single-conversion
+ } else if (~(HWREG8(baseAddress + OFS_ADC12CTL1_L) & ADC12CONSEQ_3)){
+ //To prevent preemption of a single-channel, single-conversion we must
+ //wait for the ADC core to finish the conversion.
+ while (ADC12_B_isBusy(baseAddress)) ;
+ }
+
+ HWREG8(baseAddress + OFS_ADC12CTL0_L) &= ~(ADC12ENC);
+}
+
+uint16_t ADC12_B_getResults (uint16_t baseAddress, uint8_t memoryBufferIndex)
+{
+ return ( HWREG16(baseAddress + (OFS_ADC12MEM0 + memoryBufferIndex)) );
+ //(0x60 + memoryBufferIndex) == offset of ADC12MEMx
+}
+
+void ADC12_B_setResolution (uint16_t baseAddress,
+ uint8_t resolutionSelect)
+{
+ HWREG8(baseAddress + OFS_ADC12CTL2_L) &= ~(ADC12RES_3);
+ HWREG8(baseAddress + OFS_ADC12CTL2_L) |= resolutionSelect;
+}
+
+void ADC12_B_setSampleHoldSignalInversion (uint16_t baseAddress,
+ uint16_t invertedSignal)
+{
+ HWREG16(baseAddress + OFS_ADC12CTL1) &= ~(ADC12ISSH);
+ HWREG16(baseAddress + OFS_ADC12CTL1) |= invertedSignal;
+}
+
+void ADC12_B_setDataReadBackFormat (uint16_t baseAddress,
+ uint8_t readBackFormat)
+{
+ HWREG8(baseAddress + OFS_ADC12CTL2_L) &= ~(ADC12DF);
+ HWREG8(baseAddress + OFS_ADC12CTL2_L) |= readBackFormat;
+}
+
+void ADC12_B_setAdcPowerMode (uint16_t baseAddress,
+ uint8_t powerMode)
+{
+ HWREG8(baseAddress + OFS_ADC12CTL2_L) &= ~(ADC12PWRMD);
+ HWREG8(baseAddress + OFS_ADC12CTL2_L) |= powerMode;
+}
+
+uint32_t ADC12_B_getMemoryAddressForDMA (uint16_t baseAddress,
+ uint8_t memoryIndex)
+{
+ return ( baseAddress + (OFS_ADC12MEM0 + memoryIndex) );
+ //(0x60 + memoryIndex) == offset of ADC12MEMx
+}
+
+uint8_t ADC12_B_isBusy (uint16_t baseAddress)
+{
+ return (HWREG8(baseAddress + OFS_ADC12CTL1_L) & ADC12BUSY);
+}
+
+
+#endif
+//*****************************************************************************
+//
+//! Close the doxygen group for adc12_b_api
+//! @}
+//
+//*****************************************************************************
diff --git a/Apps/FlightSoftware/MotorControl/driverlib/adc12_b.h b/Apps/FlightSoftware/MotorControl/driverlib/adc12_b.h
new file mode 100644
index 000000000..446341e2d
--- /dev/null
+++ b/Apps/FlightSoftware/MotorControl/driverlib/adc12_b.h
@@ -0,0 +1,1496 @@
+/* --COPYRIGHT--,BSD
+ * Copyright (c) 2017, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * --/COPYRIGHT--*/
+//*****************************************************************************
+//
+// adc12_b.h - Driver for the ADC12_B Module.
+//
+//*****************************************************************************
+
+#ifndef __MSP430WARE_ADC12_B_H__
+#define __MSP430WARE_ADC12_B_H__
+
+#include "inc/hw_memmap.h"
+
+#ifdef __MSP430_HAS_ADC12_B__
+
+//*****************************************************************************
+//
+// If building with a C++ compiler, make all of the definitions in this header
+// have a C binding.
+//
+//*****************************************************************************
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+#include "inc/hw_memmap.h"
+//*****************************************************************************
+//
+//! \brief Used in the ADC12_B_init() function as the param parameter.
+//
+//*****************************************************************************
+typedef struct ADC12_B_initParam {
+ //! Is the signal that will trigger a sample-and-hold for an input signal
+ //! to be converted.
+ //! \n Valid values are:
+ //! - \b ADC12_B_SAMPLEHOLDSOURCE_SC [Default]
+ //! - \b ADC12_B_SAMPLEHOLDSOURCE_1
+ //! - \b ADC12_B_SAMPLEHOLDSOURCE_2
+ //! - \b ADC12_B_SAMPLEHOLDSOURCE_3
+ //! - \b ADC12_B_SAMPLEHOLDSOURCE_4
+ //! - \b ADC12_B_SAMPLEHOLDSOURCE_5
+ //! - \b ADC12_B_SAMPLEHOLDSOURCE_6
+ //! - \b ADC12_B_SAMPLEHOLDSOURCE_7 - This parameter is device specific and
+ //! sources should be found in the device's datasheet.
+ uint16_t sampleHoldSignalSourceSelect;
+ //! Selects the clock that will be used by the ADC12B core, and the
+ //! sampling timer if a sampling pulse mode is enabled.
+ //! \n Valid values are:
+ //! - \b ADC12_B_CLOCKSOURCE_ADC12OSC [Default] - MODOSC 5 MHz oscillator
+ //! from the UCS
+ //! - \b ADC12_B_CLOCKSOURCE_ACLK - The Auxiliary Clock
+ //! - \b ADC12_B_CLOCKSOURCE_MCLK - The Master Clock
+ //! - \b ADC12_B_CLOCKSOURCE_SMCLK - The Sub-Master Clock
+ uint8_t clockSourceSelect;
+ //! Selects the amount that the clock will be divided.
+ //! \n Valid values are:
+ //! - \b ADC12_B_CLOCKDIVIDER_1 [Default]
+ //! - \b ADC12_B_CLOCKDIVIDER_2
+ //! - \b ADC12_B_CLOCKDIVIDER_3
+ //! - \b ADC12_B_CLOCKDIVIDER_4
+ //! - \b ADC12_B_CLOCKDIVIDER_5
+ //! - \b ADC12_B_CLOCKDIVIDER_6
+ //! - \b ADC12_B_CLOCKDIVIDER_7
+ //! - \b ADC12_B_CLOCKDIVIDER_8
+ uint16_t clockSourceDivider;
+ //! Selects the amount that the clock will be predivided.
+ //! \n Valid values are:
+ //! - \b ADC12_B_CLOCKPREDIVIDER__1 [Default]
+ //! - \b ADC12_B_CLOCKPREDIVIDER__4
+ //! - \b ADC12_B_CLOCKPREDIVIDER__32
+ //! - \b ADC12_B_CLOCKPREDIVIDER__64
+ uint16_t clockSourcePredivider;
+ //! Selects what internal channel to map for ADC input channels
+ //! \n Valid values are:
+ //! - \b ADC12_B_MAPINTCH3
+ //! - \b ADC12_B_MAPINTCH2
+ //! - \b ADC12_B_MAPINTCH1
+ //! - \b ADC12_B_MAPINTCH0
+ //! - \b ADC12_B_TEMPSENSEMAP
+ //! - \b ADC12_B_BATTMAP
+ //! - \b ADC12_B_NOINTCH
+ uint16_t internalChannelMap;
+} ADC12_B_initParam;
+
+//*****************************************************************************
+//
+//! \brief Used in the ADC12_B_configureMemory() function as the param
+//! parameter.
+//
+//*****************************************************************************
+typedef struct ADC12_B_configureMemoryParam {
+ //! Is the selected memory buffer to set the configuration for.
+ //! \n Valid values are:
+ //! - \b ADC12_B_MEMORY_0
+ //! - \b ADC12_B_MEMORY_1
+ //! - \b ADC12_B_MEMORY_2
+ //! - \b ADC12_B_MEMORY_3
+ //! - \b ADC12_B_MEMORY_4
+ //! - \b ADC12_B_MEMORY_5
+ //! - \b ADC12_B_MEMORY_6
+ //! - \b ADC12_B_MEMORY_7
+ //! - \b ADC12_B_MEMORY_8
+ //! - \b ADC12_B_MEMORY_9
+ //! - \b ADC12_B_MEMORY_10
+ //! - \b ADC12_B_MEMORY_11
+ //! - \b ADC12_B_MEMORY_12
+ //! - \b ADC12_B_MEMORY_13
+ //! - \b ADC12_B_MEMORY_14
+ //! - \b ADC12_B_MEMORY_15
+ //! - \b ADC12_B_MEMORY_16
+ //! - \b ADC12_B_MEMORY_17
+ //! - \b ADC12_B_MEMORY_18
+ //! - \b ADC12_B_MEMORY_19
+ //! - \b ADC12_B_MEMORY_20
+ //! - \b ADC12_B_MEMORY_21
+ //! - \b ADC12_B_MEMORY_22
+ //! - \b ADC12_B_MEMORY_23
+ //! - \b ADC12_B_MEMORY_24
+ //! - \b ADC12_B_MEMORY_25
+ //! - \b ADC12_B_MEMORY_26
+ //! - \b ADC12_B_MEMORY_27
+ //! - \b ADC12_B_MEMORY_28
+ //! - \b ADC12_B_MEMORY_29
+ //! - \b ADC12_B_MEMORY_30
+ //! - \b ADC12_B_MEMORY_31
+ uint8_t memoryBufferControlIndex;
+ //! Is the input that will store the converted data into the specified
+ //! memory buffer.
+ //! \n Valid values are:
+ //! - \b ADC12_B_INPUT_A0 [Default]
+ //! - \b ADC12_B_INPUT_A1
+ //! - \b ADC12_B_INPUT_A2
+ //! - \b ADC12_B_INPUT_A3
+ //! - \b ADC12_B_INPUT_A4
+ //! - \b ADC12_B_INPUT_A5
+ //! - \b ADC12_B_INPUT_A6
+ //! - \b ADC12_B_INPUT_A7
+ //! - \b ADC12_B_INPUT_A8
+ //! - \b ADC12_B_INPUT_A9
+ //! - \b ADC12_B_INPUT_A10
+ //! - \b ADC12_B_INPUT_A11
+ //! - \b ADC12_B_INPUT_A12
+ //! - \b ADC12_B_INPUT_A13
+ //! - \b ADC12_B_INPUT_A14
+ //! - \b ADC12_B_INPUT_A15
+ //! - \b ADC12_B_INPUT_A16
+ //! - \b ADC12_B_INPUT_A17
+ //! - \b ADC12_B_INPUT_A18
+ //! - \b ADC12_B_INPUT_A19
+ //! - \b ADC12_B_INPUT_A20
+ //! - \b ADC12_B_INPUT_A21
+ //! - \b ADC12_B_INPUT_A22
+ //! - \b ADC12_B_INPUT_A23
+ //! - \b ADC12_B_INPUT_A24
+ //! - \b ADC12_B_INPUT_A25
+ //! - \b ADC12_B_INPUT_A26
+ //! - \b ADC12_B_INPUT_A27
+ //! - \b ADC12_B_INPUT_A28
+ //! - \b ADC12_B_INPUT_A29
+ //! - \b ADC12_B_INPUT_TCMAP
+ //! - \b ADC12_B_INPUT_BATMAP
+ uint8_t inputSourceSelect;
+ //! Is the reference voltage source to set as the upper/lower limits for
+ //! the conversion stored in the specified memory.
+ //! \n Valid values are:
+ //! - \b ADC12_B_VREFPOS_AVCC_VREFNEG_VSS [Default]
+ //! - \b ADC12_B_VREFPOS_INTBUF_VREFNEG_VSS
+ //! - \b ADC12_B_VREFPOS_EXTNEG_VREFNEG_VSS
+ //! - \b ADC12_B_VREFPOS_EXTBUF_VREFNEG_VSS
+ //! - \b ADC12_B_VREFPOS_EXTPOS_VREFNEG_VSS
+ //! - \b ADC12_B_VREFPOS_AVCC_VREFNEG_EXTBUF
+ //! - \b ADC12_B_VREFPOS_AVCC_VREFNEG_EXTPOS
+ //! - \b ADC12_B_VREFPOS_INTBUF_VREFNEG_EXTPOS
+ //! - \b ADC12_B_VREFPOS_AVCC_VREFNEG_INTBUF
+ //! - \b ADC12_B_VREFPOS_EXTPOS_VREFNEG_INTBUF
+ //! - \b ADC12_B_VREFPOS_AVCC_VREFNEG_EXTNEG
+ //! - \b ADC12_B_VREFPOS_INTBUF_VREFNEG_EXTNEG
+ //! - \b ADC12_B_VREFPOS_EXTPOS_VREFNEG_EXTNEG
+ //! - \b ADC12_B_VREFPOS_EXTBUF_VREFNEG_EXTNEG
+ uint16_t refVoltageSourceSelect;
+ //! Indicates that the specified memory buffer will be the end of the
+ //! sequence if a sequenced conversion mode is selected
+ //! \n Valid values are:
+ //! - \b ADC12_B_NOTENDOFSEQUENCE [Default] - The specified memory buffer
+ //! will NOT be the end of the sequence OR a sequenced conversion mode
+ //! is not selected.
+ //! - \b ADC12_B_ENDOFSEQUENCE - The specified memory buffer will be the
+ //! end of the sequence.
+ uint16_t endOfSequence;
+ //! Sets the window comparator mode
+ //! \n Valid values are:
+ //! - \b ADC12_B_WINDOW_COMPARATOR_DISABLE [Default]
+ //! - \b ADC12_B_WINDOW_COMPARATOR_ENABLE
+ uint16_t windowComparatorSelect;
+ //! Sets the differential mode
+ //! \n Valid values are:
+ //! - \b ADC12_B_DIFFERENTIAL_MODE_DISABLE [Default]
+ //! - \b ADC12_B_DIFFERENTIAL_MODE_ENABLE
+ uint16_t differentialModeSelect;
+} ADC12_B_configureMemoryParam;
+
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the clockSourceDivider
+// parameter for functions: ADC12_B_init(); the param parameter for functions:
+// ADC12_B_init().
+//
+//*****************************************************************************
+#define ADC12_B_CLOCKDIVIDER_1 (ADC12DIV_0)
+#define ADC12_B_CLOCKDIVIDER_2 (ADC12DIV_1)
+#define ADC12_B_CLOCKDIVIDER_3 (ADC12DIV_2)
+#define ADC12_B_CLOCKDIVIDER_4 (ADC12DIV_3)
+#define ADC12_B_CLOCKDIVIDER_5 (ADC12DIV_4)
+#define ADC12_B_CLOCKDIVIDER_6 (ADC12DIV_5)
+#define ADC12_B_CLOCKDIVIDER_7 (ADC12DIV_6)
+#define ADC12_B_CLOCKDIVIDER_8 (ADC12DIV_7)
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the clockSourceSelect
+// parameter for functions: ADC12_B_init(); the param parameter for functions:
+// ADC12_B_init().
+//
+//*****************************************************************************
+#define ADC12_B_CLOCKSOURCE_ADC12OSC (ADC12SSEL_0)
+#define ADC12_B_CLOCKSOURCE_ACLK (ADC12SSEL_1)
+#define ADC12_B_CLOCKSOURCE_MCLK (ADC12SSEL_2)
+#define ADC12_B_CLOCKSOURCE_SMCLK (ADC12SSEL_3)
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the clockSourcePredivider
+// parameter for functions: ADC12_B_init(); the param parameter for functions:
+// ADC12_B_init().
+//
+//*****************************************************************************
+#define ADC12_B_CLOCKPREDIVIDER__1 (ADC12PDIV__1)
+#define ADC12_B_CLOCKPREDIVIDER__4 (ADC12PDIV__4)
+#define ADC12_B_CLOCKPREDIVIDER__32 (ADC12PDIV__32)
+#define ADC12_B_CLOCKPREDIVIDER__64 (ADC12PDIV__64)
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the param parameter for
+// functions: ADC12_B_init(); the sampleHoldSignalSourceSelect parameter for
+// functions: ADC12_B_init().
+//
+//*****************************************************************************
+#define ADC12_B_SAMPLEHOLDSOURCE_SC (ADC12SHS_0)
+#define ADC12_B_SAMPLEHOLDSOURCE_1 (ADC12SHS_1)
+#define ADC12_B_SAMPLEHOLDSOURCE_2 (ADC12SHS_2)
+#define ADC12_B_SAMPLEHOLDSOURCE_3 (ADC12SHS_3)
+#define ADC12_B_SAMPLEHOLDSOURCE_4 (ADC12SHS_4)
+#define ADC12_B_SAMPLEHOLDSOURCE_5 (ADC12SHS_5)
+#define ADC12_B_SAMPLEHOLDSOURCE_6 (ADC12SHS_6)
+#define ADC12_B_SAMPLEHOLDSOURCE_7 (ADC12SHS_7)
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the internalChannelMap
+// parameter for functions: ADC12_B_init(); the param parameter for functions:
+// ADC12_B_init().
+//
+//*****************************************************************************
+#define ADC12_B_MAPINTCH3 (ADC12ICH3MAP)
+#define ADC12_B_MAPINTCH2 (ADC12ICH2MAP)
+#define ADC12_B_MAPINTCH1 (ADC12ICH1MAP)
+#define ADC12_B_MAPINTCH0 (ADC12ICH0MAP)
+#define ADC12_B_TEMPSENSEMAP (ADC12TCMAP)
+#define ADC12_B_BATTMAP (ADC12BATMAP)
+#define ADC12_B_NOINTCH (0x00)
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the clockCycleHoldCountLowMem
+// parameter for functions: ADC12_B_setupSamplingTimer(); the
+// clockCycleHoldCountHighMem parameter for functions:
+// ADC12_B_setupSamplingTimer().
+//
+//*****************************************************************************
+#define ADC12_B_CYCLEHOLD_4_CYCLES (ADC12SHT0_0)
+#define ADC12_B_CYCLEHOLD_8_CYCLES (ADC12SHT0_1)
+#define ADC12_B_CYCLEHOLD_16_CYCLES (ADC12SHT0_2)
+#define ADC12_B_CYCLEHOLD_32_CYCLES (ADC12SHT0_3)
+#define ADC12_B_CYCLEHOLD_64_CYCLES (ADC12SHT0_4)
+#define ADC12_B_CYCLEHOLD_96_CYCLES (ADC12SHT0_5)
+#define ADC12_B_CYCLEHOLD_128_CYCLES (ADC12SHT0_6)
+#define ADC12_B_CYCLEHOLD_192_CYCLES (ADC12SHT0_7)
+#define ADC12_B_CYCLEHOLD_256_CYCLES (ADC12SHT0_8)
+#define ADC12_B_CYCLEHOLD_384_CYCLES (ADC12SHT0_9)
+#define ADC12_B_CYCLEHOLD_512_CYCLES (ADC12SHT0_10)
+#define ADC12_B_CYCLEHOLD_768_CYCLES (ADC12SHT0_11)
+#define ADC12_B_CYCLEHOLD_1024_CYCLES (ADC12SHT0_12)
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the multipleSamplesEnabled
+// parameter for functions: ADC12_B_setupSamplingTimer().
+//
+//*****************************************************************************
+#define ADC12_B_MULTIPLESAMPLESDISABLE (!(ADC12MSC))
+#define ADC12_B_MULTIPLESAMPLESENABLE (ADC12MSC)
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the param parameter for
+// functions: ADC12_B_configureMemory().
+//
+//*****************************************************************************
+#define ADC12_B_DIFFERENTIAL_MODE_DISABLE (0x00)
+#define ADC12_B_DIFFERENTIAL_MODE_ENABLE (ADC12DIF)
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the param parameter for
+// functions: ADC12_B_configureMemory().
+//
+//*****************************************************************************
+#define ADC12_B_NOTENDOFSEQUENCE (!(ADC12EOS))
+#define ADC12_B_ENDOFSEQUENCE (ADC12EOS)
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the param parameter for
+// functions: ADC12_B_configureMemory().
+//
+//*****************************************************************************
+#define ADC12_B_VREFPOS_AVCC_VREFNEG_VSS (ADC12VRSEL_0)
+#define ADC12_B_VREFPOS_INTBUF_VREFNEG_VSS (ADC12VRSEL_1)
+#define ADC12_B_VREFPOS_EXTNEG_VREFNEG_VSS (ADC12VRSEL_2)
+#define ADC12_B_VREFPOS_EXTBUF_VREFNEG_VSS (ADC12VRSEL_3)
+#define ADC12_B_VREFPOS_EXTPOS_VREFNEG_VSS (ADC12VRSEL_4)
+#define ADC12_B_VREFPOS_AVCC_VREFNEG_EXTBUF (ADC12VRSEL_5)
+#define ADC12_B_VREFPOS_AVCC_VREFNEG_EXTPOS (ADC12VRSEL_6)
+#define ADC12_B_VREFPOS_INTBUF_VREFNEG_EXTPOS (ADC12VRSEL_7)
+#define ADC12_B_VREFPOS_AVCC_VREFNEG_INTBUF (ADC12VRSEL_9)
+#define ADC12_B_VREFPOS_EXTPOS_VREFNEG_INTBUF (ADC12VRSEL_11)
+#define ADC12_B_VREFPOS_AVCC_VREFNEG_EXTNEG (ADC12VRSEL_12)
+#define ADC12_B_VREFPOS_INTBUF_VREFNEG_EXTNEG (ADC12VRSEL_13)
+#define ADC12_B_VREFPOS_EXTPOS_VREFNEG_EXTNEG (ADC12VRSEL_14)
+#define ADC12_B_VREFPOS_EXTBUF_VREFNEG_EXTNEG (ADC12VRSEL_15)
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the param parameter for
+// functions: ADC12_B_configureMemory().
+//
+//*****************************************************************************
+#define ADC12_B_INPUT_A0 (ADC12INCH_0)
+#define ADC12_B_INPUT_A1 (ADC12INCH_1)
+#define ADC12_B_INPUT_A2 (ADC12INCH_2)
+#define ADC12_B_INPUT_A3 (ADC12INCH_3)
+#define ADC12_B_INPUT_A4 (ADC12INCH_4)
+#define ADC12_B_INPUT_A5 (ADC12INCH_5)
+#define ADC12_B_INPUT_A6 (ADC12INCH_6)
+#define ADC12_B_INPUT_A7 (ADC12INCH_7)
+#define ADC12_B_INPUT_A8 (ADC12INCH_8)
+#define ADC12_B_INPUT_A9 (ADC12INCH_9)
+#define ADC12_B_INPUT_A10 (ADC12INCH_10)
+#define ADC12_B_INPUT_A11 (ADC12INCH_11)
+#define ADC12_B_INPUT_A12 (ADC12INCH_12)
+#define ADC12_B_INPUT_A13 (ADC12INCH_13)
+#define ADC12_B_INPUT_A14 (ADC12INCH_14)
+#define ADC12_B_INPUT_A15 (ADC12INCH_15)
+#define ADC12_B_INPUT_A16 (ADC12INCH_16)
+#define ADC12_B_INPUT_A17 (ADC12INCH_17)
+#define ADC12_B_INPUT_A18 (ADC12INCH_18)
+#define ADC12_B_INPUT_A19 (ADC12INCH_19)
+#define ADC12_B_INPUT_A20 (ADC12INCH_20)
+#define ADC12_B_INPUT_A21 (ADC12INCH_21)
+#define ADC12_B_INPUT_A22 (ADC12INCH_22)
+#define ADC12_B_INPUT_A23 (ADC12INCH_23)
+#define ADC12_B_INPUT_A24 (ADC12INCH_24)
+#define ADC12_B_INPUT_A25 (ADC12INCH_25)
+#define ADC12_B_INPUT_A26 (ADC12INCH_26)
+#define ADC12_B_INPUT_A27 (ADC12INCH_27)
+#define ADC12_B_INPUT_A28 (ADC12INCH_28)
+#define ADC12_B_INPUT_A29 (ADC12INCH_29)
+#define ADC12_B_INPUT_TCMAP (ADC12INCH_30)
+#define ADC12_B_INPUT_BATMAP (ADC12INCH_31)
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the param parameter for
+// functions: ADC12_B_configureMemory().
+//
+//*****************************************************************************
+#define ADC12_B_WINDOW_COMPARATOR_DISABLE (0x00)
+#define ADC12_B_WINDOW_COMPARATOR_ENABLE (ADC12WINC)
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the memoryIndex parameter for
+// functions: ADC12_B_getMemoryAddressForDMA(); the memoryBufferIndex parameter
+// for functions: ADC12_B_getResults(); the param parameter for functions:
+// ADC12_B_configureMemory().
+//
+//*****************************************************************************
+#define ADC12_B_MEMORY_0 (0x00)
+#define ADC12_B_MEMORY_1 (0x02)
+#define ADC12_B_MEMORY_2 (0x04)
+#define ADC12_B_MEMORY_3 (0x06)
+#define ADC12_B_MEMORY_4 (0x08)
+#define ADC12_B_MEMORY_5 (0x0A)
+#define ADC12_B_MEMORY_6 (0x0C)
+#define ADC12_B_MEMORY_7 (0x0E)
+#define ADC12_B_MEMORY_8 (0x10)
+#define ADC12_B_MEMORY_9 (0x12)
+#define ADC12_B_MEMORY_10 (0x14)
+#define ADC12_B_MEMORY_11 (0x16)
+#define ADC12_B_MEMORY_12 (0x18)
+#define ADC12_B_MEMORY_13 (0x1A)
+#define ADC12_B_MEMORY_14 (0x1C)
+#define ADC12_B_MEMORY_15 (0x1E)
+#define ADC12_B_MEMORY_16 (0x20)
+#define ADC12_B_MEMORY_17 (0x22)
+#define ADC12_B_MEMORY_18 (0x24)
+#define ADC12_B_MEMORY_19 (0x26)
+#define ADC12_B_MEMORY_20 (0x28)
+#define ADC12_B_MEMORY_21 (0x2A)
+#define ADC12_B_MEMORY_22 (0x2C)
+#define ADC12_B_MEMORY_23 (0x2E)
+#define ADC12_B_MEMORY_24 (0x30)
+#define ADC12_B_MEMORY_25 (0x32)
+#define ADC12_B_MEMORY_26 (0x34)
+#define ADC12_B_MEMORY_27 (0x36)
+#define ADC12_B_MEMORY_28 (0x38)
+#define ADC12_B_MEMORY_29 (0x3A)
+#define ADC12_B_MEMORY_30 (0x3C)
+#define ADC12_B_MEMORY_31 (0x3E)
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the interruptMask0 parameter
+// for functions: ADC12_B_enableInterrupt(), and ADC12_B_disableInterrupt().
+//
+//*****************************************************************************
+#define ADC12_B_IE0 (ADC12IE0)
+#define ADC12_B_IE1 (ADC12IE1)
+#define ADC12_B_IE2 (ADC12IE2)
+#define ADC12_B_IE3 (ADC12IE3)
+#define ADC12_B_IE4 (ADC12IE4)
+#define ADC12_B_IE5 (ADC12IE5)
+#define ADC12_B_IE6 (ADC12IE6)
+#define ADC12_B_IE7 (ADC12IE7)
+#define ADC12_B_IE8 (ADC12IE8)
+#define ADC12_B_IE9 (ADC12IE9)
+#define ADC12_B_IE10 (ADC12IE10)
+#define ADC12_B_IE11 (ADC12IE11)
+#define ADC12_B_IE12 (ADC12IE12)
+#define ADC12_B_IE13 (ADC12IE13)
+#define ADC12_B_IE14 (ADC12IE14)
+#define ADC12_B_IE15 (ADC12IE15)
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the interruptMask1 parameter
+// for functions: ADC12_B_enableInterrupt(), and ADC12_B_disableInterrupt().
+//
+//*****************************************************************************
+#define ADC12_B_IE16 (ADC12IE16)
+#define ADC12_B_IE17 (ADC12IE17)
+#define ADC12_B_IE18 (ADC12IE18)
+#define ADC12_B_IE19 (ADC12IE19)
+#define ADC12_B_IE20 (ADC12IE20)
+#define ADC12_B_IE21 (ADC12IE21)
+#define ADC12_B_IE22 (ADC12IE22)
+#define ADC12_B_IE23 (ADC12IE23)
+#define ADC12_B_IE24 (ADC12IE24)
+#define ADC12_B_IE25 (ADC12IE25)
+#define ADC12_B_IE26 (ADC12IE26)
+#define ADC12_B_IE27 (ADC12IE27)
+#define ADC12_B_IE28 (ADC12IE28)
+#define ADC12_B_IE29 (ADC12IE29)
+#define ADC12_B_IE30 (ADC12IE30)
+#define ADC12_B_IE31 (ADC12IE31)
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the interruptMask2 parameter
+// for functions: ADC12_B_enableInterrupt(), and ADC12_B_disableInterrupt().
+//
+//*****************************************************************************
+#define ADC12_B_INIE (ADC12INIE)
+#define ADC12_B_LOIE (ADC12LOIE)
+#define ADC12_B_HIIE (ADC12HIIE)
+#define ADC12_B_OVIE (ADC12OVIE)
+#define ADC12_B_TOVIE (ADC12TOVIE)
+#define ADC12_B_RDYIE (ADC12RDYIE)
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the memoryInterruptFlagMask
+// parameter for functions: ADC12_B_clearInterrupt(), and
+// ADC12_B_getInterruptStatus().
+//
+//*****************************************************************************
+#define ADC12_B_IFG0 (ADC12IFG0)
+#define ADC12_B_IFG1 (ADC12IFG1)
+#define ADC12_B_IFG2 (ADC12IFG2)
+#define ADC12_B_IFG3 (ADC12IFG3)
+#define ADC12_B_IFG4 (ADC12IFG4)
+#define ADC12_B_IFG5 (ADC12IFG5)
+#define ADC12_B_IFG6 (ADC12IFG6)
+#define ADC12_B_IFG7 (ADC12IFG7)
+#define ADC12_B_IFG8 (ADC12IFG8)
+#define ADC12_B_IFG9 (ADC12IFG9)
+#define ADC12_B_IFG10 (ADC12IFG10)
+#define ADC12_B_IFG11 (ADC12IFG11)
+#define ADC12_B_IFG12 (ADC12IFG12)
+#define ADC12_B_IFG13 (ADC12IFG13)
+#define ADC12_B_IFG14 (ADC12IFG14)
+#define ADC12_B_IFG15 (ADC12IFG15)
+#define ADC12_B_IFG16 (ADC12IFG16)
+#define ADC12_B_IFG17 (ADC12IFG17)
+#define ADC12_B_IFG18 (ADC12IFG18)
+#define ADC12_B_IFG19 (ADC12IFG19)
+#define ADC12_B_IFG20 (ADC12IFG20)
+#define ADC12_B_IFG21 (ADC12IFG21)
+#define ADC12_B_IFG22 (ADC12IFG22)
+#define ADC12_B_IFG23 (ADC12IFG23)
+#define ADC12_B_IFG24 (ADC12IFG24)
+#define ADC12_B_IFG25 (ADC12IFG25)
+#define ADC12_B_IFG26 (ADC12IFG26)
+#define ADC12_B_IFG27 (ADC12IFG27)
+#define ADC12_B_IFG28 (ADC12IFG28)
+#define ADC12_B_IFG29 (ADC12IFG29)
+#define ADC12_B_IFG30 (ADC12IFG30)
+#define ADC12_B_IFG31 (ADC12IFG31)
+#define ADC12_B_INIFG (ADC12INIFG)
+#define ADC12_B_LOIFG (ADC12LOIFG)
+#define ADC12_B_HIIFG (ADC12HIIFG)
+#define ADC12_B_OVIFG (ADC12OVIFG)
+#define ADC12_B_TOVIFG (ADC12TOVIFG)
+#define ADC12_B_RDYIFG (ADC12RDYIFG)
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the startingMemoryBufferIndex
+// parameter for functions: ADC12_B_startConversion().
+//
+//*****************************************************************************
+#define ADC12_B_START_AT_ADC12MEM0 (ADC12CSTARTADD_0)
+#define ADC12_B_START_AT_ADC12MEM1 (ADC12CSTARTADD_1)
+#define ADC12_B_START_AT_ADC12MEM2 (ADC12CSTARTADD_2)
+#define ADC12_B_START_AT_ADC12MEM3 (ADC12CSTARTADD_3)
+#define ADC12_B_START_AT_ADC12MEM4 (ADC12CSTARTADD_4)
+#define ADC12_B_START_AT_ADC12MEM5 (ADC12CSTARTADD_5)
+#define ADC12_B_START_AT_ADC12MEM6 (ADC12CSTARTADD_6)
+#define ADC12_B_START_AT_ADC12MEM7 (ADC12CSTARTADD_7)
+#define ADC12_B_START_AT_ADC12MEM8 (ADC12CSTARTADD_8)
+#define ADC12_B_START_AT_ADC12MEM9 (ADC12CSTARTADD_9)
+#define ADC12_B_START_AT_ADC12MEM10 (ADC12CSTARTADD_10)
+#define ADC12_B_START_AT_ADC12MEM11 (ADC12CSTARTADD_11)
+#define ADC12_B_START_AT_ADC12MEM12 (ADC12CSTARTADD_12)
+#define ADC12_B_START_AT_ADC12MEM13 (ADC12CSTARTADD_13)
+#define ADC12_B_START_AT_ADC12MEM14 (ADC12CSTARTADD_14)
+#define ADC12_B_START_AT_ADC12MEM15 (ADC12CSTARTADD_15)
+#define ADC12_B_START_AT_ADC12MEM16 (ADC12CSTARTADD_16)
+#define ADC12_B_START_AT_ADC12MEM17 (ADC12CSTARTADD_17)
+#define ADC12_B_START_AT_ADC12MEM18 (ADC12CSTARTADD_18)
+#define ADC12_B_START_AT_ADC12MEM19 (ADC12CSTARTADD_19)
+#define ADC12_B_START_AT_ADC12MEM20 (ADC12CSTARTADD_20)
+#define ADC12_B_START_AT_ADC12MEM21 (ADC12CSTARTADD_21)
+#define ADC12_B_START_AT_ADC12MEM22 (ADC12CSTARTADD_22)
+#define ADC12_B_START_AT_ADC12MEM23 (ADC12CSTARTADD_23)
+#define ADC12_B_START_AT_ADC12MEM24 (ADC12CSTARTADD_24)
+#define ADC12_B_START_AT_ADC12MEM25 (ADC12CSTARTADD_25)
+#define ADC12_B_START_AT_ADC12MEM26 (ADC12CSTARTADD_26)
+#define ADC12_B_START_AT_ADC12MEM27 (ADC12CSTARTADD_27)
+#define ADC12_B_START_AT_ADC12MEM28 (ADC12CSTARTADD_28)
+#define ADC12_B_START_AT_ADC12MEM29 (ADC12CSTARTADD_29)
+#define ADC12_B_START_AT_ADC12MEM30 (ADC12CSTARTADD_30)
+#define ADC12_B_START_AT_ADC12MEM31 (ADC12CSTARTADD_31)
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the
+// conversionSequenceModeSelect parameter for functions:
+// ADC12_B_startConversion().
+//
+//*****************************************************************************
+#define ADC12_B_SINGLECHANNEL (ADC12CONSEQ_0)
+#define ADC12_B_SEQOFCHANNELS (ADC12CONSEQ_1)
+#define ADC12_B_REPEATED_SINGLECHANNEL (ADC12CONSEQ_2)
+#define ADC12_B_REPEATED_SEQOFCHANNELS (ADC12CONSEQ_3)
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the preempt parameter for
+// functions: ADC12_B_disableConversions().
+//
+//*****************************************************************************
+#define ADC12_B_COMPLETECONVERSION false
+#define ADC12_B_PREEMPTCONVERSION true
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the resolutionSelect
+// parameter for functions: ADC12_B_setResolution().
+//
+//*****************************************************************************
+#define ADC12_B_RESOLUTION_8BIT (ADC12RES__8BIT)
+#define ADC12_B_RESOLUTION_10BIT (ADC12RES__10BIT)
+#define ADC12_B_RESOLUTION_12BIT (ADC12RES__12BIT)
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the invertedSignal parameter
+// for functions: ADC12_B_setSampleHoldSignalInversion().
+//
+//*****************************************************************************
+#define ADC12_B_NONINVERTEDSIGNAL (!(ADC12ISSH))
+#define ADC12_B_INVERTEDSIGNAL (ADC12ISSH)
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the readBackFormat parameter
+// for functions: ADC12_B_setDataReadBackFormat().
+//
+//*****************************************************************************
+#define ADC12_B_UNSIGNED_BINARY (!(ADC12DF))
+#define ADC12_B_SIGNED_2SCOMPLEMENT (ADC12DF)
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the powerMode parameter for
+// functions: ADC12_B_setAdcPowerMode().
+//
+//*****************************************************************************
+#define ADC12_B_REGULARPOWERMODE (!(ADC12PWRMD))
+#define ADC12_B_LOWPOWERMODE (ADC12PWRMD)
+
+//*****************************************************************************
+//
+// The following are values that can be passed toThe following are values that
+// can be returned by the ADC12_B_isBusy() function.
+//
+//*****************************************************************************
+#define ADC12_B_NOTBUSY 0x00
+#define ADC12_B_BUSY ADC12BUSY
+
+//*****************************************************************************
+//
+// Prototypes for the APIs.
+//
+//*****************************************************************************
+
+//*****************************************************************************
+//
+//! \brief Initializes the ADC12B Module.
+//!
+//! This function initializes the ADC module to allow for analog-to-digital
+//! conversions. Specifically this function sets up the sample-and-hold signal
+//! and clock sources for the ADC core to use for conversions. Upon successful
+//! completion of the initialization all of the ADC control registers will be
+//! reset, excluding the memory controls and reference module bits, the given
+//! parameters will be set, and the ADC core will be turned on (Note, that the
+//! ADC core only draws power during conversions and remains off when not
+//! converting).Note that sample/hold signal sources are device dependent. Note
+//! that if re-initializing the ADC after starting a conversion with the
+//! startConversion() function, the disableConversion() must be called BEFORE
+//! this function can be called.
+//!
+//! \param baseAddress is the base address of the ADC12B module.
+//! \param param is the pointer to struct for initialization.
+//!
+//! \return STATUS_SUCCESS or STATUS_FAILURE of the initialization process.
+//
+//*****************************************************************************
+extern bool ADC12_B_init(uint16_t baseAddress,
+ ADC12_B_initParam *param);
+
+//*****************************************************************************
+//
+//! \brief Enables the ADC12B block.
+//!
+//! This will enable operation of the ADC12B block.
+//!
+//! \param baseAddress is the base address of the ADC12B module.
+//!
+//! Modified bits are \b ADC12ON of \b ADC12CTL0 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void ADC12_B_enable(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Disables the ADC12B block.
+//!
+//! This will disable operation of the ADC12B block.
+//!
+//! \param baseAddress is the base address of the ADC12B module.
+//!
+//! Modified bits are \b ADC12ON of \b ADC12CTL0 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void ADC12_B_disable(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Sets up and enables the Sampling Timer Pulse Mode.
+//!
+//! This function sets up the sampling timer pulse mode which allows the
+//! sample/hold signal to trigger a sampling timer to sample-and-hold an input
+//! signal for a specified number of clock cycles without having to hold the
+//! sample/hold signal for the entire period of sampling. Note that if a
+//! conversion has been started with the startConversion() function, then a
+//! call to disableConversions() is required before this function may be
+//! called.
+//!
+//! \param baseAddress is the base address of the ADC12B module.
+//! \param clockCycleHoldCountLowMem sets the amount of clock cycles to sample-
+//! and-hold for the higher memory buffers 0-7.
+//! Valid values are:
+//! - \b ADC12_B_CYCLEHOLD_4_CYCLES [Default]
+//! - \b ADC12_B_CYCLEHOLD_8_CYCLES
+//! - \b ADC12_B_CYCLEHOLD_16_CYCLES
+//! - \b ADC12_B_CYCLEHOLD_32_CYCLES
+//! - \b ADC12_B_CYCLEHOLD_64_CYCLES
+//! - \b ADC12_B_CYCLEHOLD_96_CYCLES
+//! - \b ADC12_B_CYCLEHOLD_128_CYCLES
+//! - \b ADC12_B_CYCLEHOLD_192_CYCLES
+//! - \b ADC12_B_CYCLEHOLD_256_CYCLES
+//! - \b ADC12_B_CYCLEHOLD_384_CYCLES
+//! - \b ADC12_B_CYCLEHOLD_512_CYCLES
+//! - \b ADC12_B_CYCLEHOLD_768_CYCLES
+//! - \b ADC12_B_CYCLEHOLD_1024_CYCLES
+//! \n Modified bits are \b ADC12SHT0x of \b ADC12CTL0 register.
+//! \param clockCycleHoldCountHighMem sets the amount of clock cycles to
+//! sample-and-hold for the higher memory buffers 8-15.
+//! Valid values are:
+//! - \b ADC12_B_CYCLEHOLD_4_CYCLES [Default]
+//! - \b ADC12_B_CYCLEHOLD_8_CYCLES
+//! - \b ADC12_B_CYCLEHOLD_16_CYCLES
+//! - \b ADC12_B_CYCLEHOLD_32_CYCLES
+//! - \b ADC12_B_CYCLEHOLD_64_CYCLES
+//! - \b ADC12_B_CYCLEHOLD_96_CYCLES
+//! - \b ADC12_B_CYCLEHOLD_128_CYCLES
+//! - \b ADC12_B_CYCLEHOLD_192_CYCLES
+//! - \b ADC12_B_CYCLEHOLD_256_CYCLES
+//! - \b ADC12_B_CYCLEHOLD_384_CYCLES
+//! - \b ADC12_B_CYCLEHOLD_512_CYCLES
+//! - \b ADC12_B_CYCLEHOLD_768_CYCLES
+//! - \b ADC12_B_CYCLEHOLD_1024_CYCLES
+//! \n Modified bits are \b ADC12SHT1x of \b ADC12CTL0 register.
+//! \param multipleSamplesEnabled allows multiple conversions to start without
+//! a trigger signal from the sample/hold signal
+//! Valid values are:
+//! - \b ADC12_B_MULTIPLESAMPLESDISABLE [Default] - a timer trigger will
+//! be needed to start every ADC conversion.
+//! - \b ADC12_B_MULTIPLESAMPLESENABLE - during a sequenced and/or
+//! repeated conversion mode, after the first conversion, no
+//! sample/hold signal is necessary to start subsequent sample/hold
+//! and convert processes.
+//! \n Modified bits are \b ADC12MSC of \b ADC12CTL0 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void ADC12_B_setupSamplingTimer(uint16_t baseAddress,
+ uint16_t clockCycleHoldCountLowMem,
+ uint16_t clockCycleHoldCountHighMem,
+ uint16_t multipleSamplesEnabled);
+
+//*****************************************************************************
+//
+//! \brief Disables Sampling Timer Pulse Mode.
+//!
+//! Disables the Sampling Timer Pulse Mode. Note that if a conversion has been
+//! started with the startConversion() function, then a call to
+//! disableConversions() is required before this function may be called.
+//!
+//! \param baseAddress is the base address of the ADC12B module.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void ADC12_B_disableSamplingTimer(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Configures the controls of the selected memory buffer.
+//!
+//! Maps an input signal conversion into the selected memory buffer, as well as
+//! the positive and negative reference voltages for each conversion being
+//! stored into this memory buffer. If the internal reference is used for the
+//! positive reference voltage, the internal REF module must be used to control
+//! the voltage level. Note that if a conversion has been started with the
+//! startConversion() function, then a call to disableConversions() is required
+//! before this function may be called. If conversion is not disabled, this
+//! function does nothing.
+//!
+//! \param baseAddress is the base address of the ADC12B module.
+//! \param param is the pointer to struct for ADC12B memory configuration.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void ADC12_B_configureMemory(uint16_t baseAddress,
+ ADC12_B_configureMemoryParam *param);
+
+//*****************************************************************************
+//
+//! \brief Sets the high and low threshold for the window comparator feature.
+//!
+//! Sets the high and low threshold for the window comparator feature. Use the
+//! ADC12HIIE, ADC12INIE, ADC12LOIE interrupts to utilize this feature.
+//!
+//! \param baseAddress is the base address of the ADC12B module.
+//! \param highThreshold is the upper bound that could trip an interrupt for
+//! the window comparator.
+//! \param lowThreshold is the lower bound that could trip on interrupt for the
+//! window comparator.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void ADC12_B_setWindowCompAdvanced(uint16_t baseAddress,
+ uint16_t highThreshold,
+ uint16_t lowThreshold);
+
+//*****************************************************************************
+//
+//! \brief Enables selected ADC12B interrupt sources.
+//!
+//! Enables the indicated ADC12B interrupt sources. Only the sources that are
+//! enabled can be reflected to the processor interrupt; disabled sources have
+//! no effect on the processor. Does not clear interrupt flags.
+//!
+//! \param baseAddress is the base address of the ADC12B module.
+//! \param interruptMask0 is the bit mask of the memory buffer and overflow
+//! interrupt sources to be enabled. If the desired interrupt is not
+//! available in the selection for interruptMask0, then simply pass in a
+//! '0' for this value.
+//! Valid values are:
+//! - \b ADC12_B_IE0
+//! - \b ADC12_B_IE1
+//! - \b ADC12_B_IE2
+//! - \b ADC12_B_IE3
+//! - \b ADC12_B_IE4
+//! - \b ADC12_B_IE5
+//! - \b ADC12_B_IE6
+//! - \b ADC12_B_IE7
+//! - \b ADC12_B_IE8
+//! - \b ADC12_B_IE9
+//! - \b ADC12_B_IE10
+//! - \b ADC12_B_IE11
+//! - \b ADC12_B_IE12
+//! - \b ADC12_B_IE13
+//! - \b ADC12_B_IE14
+//! - \b ADC12_B_IE15
+//! \param interruptMask1 is the bit mask of the memory buffer and overflow
+//! interrupt sources to be enabled. If the desired interrupt is not
+//! available in the selection for interruptMask1, then simply pass in a
+//! '0' for this value.
+//! Valid values are:
+//! - \b ADC12_B_IE16
+//! - \b ADC12_B_IE17
+//! - \b ADC12_B_IE18
+//! - \b ADC12_B_IE19
+//! - \b ADC12_B_IE20
+//! - \b ADC12_B_IE21
+//! - \b ADC12_B_IE22
+//! - \b ADC12_B_IE23
+//! - \b ADC12_B_IE24
+//! - \b ADC12_B_IE25
+//! - \b ADC12_B_IE26
+//! - \b ADC12_B_IE27
+//! - \b ADC12_B_IE28
+//! - \b ADC12_B_IE29
+//! - \b ADC12_B_IE30
+//! - \b ADC12_B_IE31
+//! \param interruptMask2 is the bit mask of the memory buffer and overflow
+//! interrupt sources to be enabled. If the desired interrupt is not
+//! available in the selection for interruptMask2, then simply pass in a
+//! '0' for this value.
+//! Valid values are:
+//! - \b ADC12_B_INIE - Interrupt enable for a conversion in the result
+//! register is either greater than the ADC12LO or lower than the
+//! ADC12HI threshold. GIE bit must be set to enable the interrupt.
+//! - \b ADC12_B_LOIE - Interrupt enable for the falling short of the
+//! lower limit interrupt of the window comparator for the result
+//! register. GIE bit must be set to enable the interrupt.
+//! - \b ADC12_B_HIIE - Interrupt enable for the exceeding the upper
+//! limit of the window comparator for the result register. GIE bit
+//! must be set to enable the interrupt.
+//! - \b ADC12_B_OVIE - Interrupt enable for a conversion that is about
+//! to save to a memory buffer that has not been read out yet. GIE
+//! bit must be set to enable the interrupt.
+//! - \b ADC12_B_TOVIE - enable for a conversion that is about to start
+//! before the previous conversion has been completed. GIE bit must
+//! be set to enable the interrupt.
+//! - \b ADC12_B_RDYIE - enable for the local buffered reference ready
+//! signal. GIE bit must be set to enable the interrupt.
+//!
+//! Modified bits of \b ADC12IERx register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void ADC12_B_enableInterrupt(uint16_t baseAddress,
+ uint16_t interruptMask0,
+ uint16_t interruptMask1,
+ uint16_t interruptMask2);
+
+//*****************************************************************************
+//
+//! \brief Disables selected ADC12B interrupt sources.
+//!
+//! Disables the indicated ADC12B interrupt sources. Only the sources that are
+//! enabled can be reflected to the processor interrupt; disabled sources have
+//! no effect on the processor.
+//!
+//! \param baseAddress is the base address of the ADC12B module.
+//! \param interruptMask0 is the bit mask of the memory buffer and overflow
+//! interrupt sources to be disabled. If the desired interrupt is not
+//! available in the selection for interruptMask0, then simply pass in a
+//! '0' for this value.
+//! Valid values are:
+//! - \b ADC12_B_IE0
+//! - \b ADC12_B_IE1
+//! - \b ADC12_B_IE2
+//! - \b ADC12_B_IE3
+//! - \b ADC12_B_IE4
+//! - \b ADC12_B_IE5
+//! - \b ADC12_B_IE6
+//! - \b ADC12_B_IE7
+//! - \b ADC12_B_IE8
+//! - \b ADC12_B_IE9
+//! - \b ADC12_B_IE10
+//! - \b ADC12_B_IE11
+//! - \b ADC12_B_IE12
+//! - \b ADC12_B_IE13
+//! - \b ADC12_B_IE14
+//! - \b ADC12_B_IE15
+//! \param interruptMask1 is the bit mask of the memory buffer and overflow
+//! interrupt sources to be disabled. If the desired interrupt is not
+//! available in the selection for interruptMask1, then simply pass in a
+//! '0' for this value.
+//! Valid values are:
+//! - \b ADC12_B_IE16
+//! - \b ADC12_B_IE17
+//! - \b ADC12_B_IE18
+//! - \b ADC12_B_IE19
+//! - \b ADC12_B_IE20
+//! - \b ADC12_B_IE21
+//! - \b ADC12_B_IE22
+//! - \b ADC12_B_IE23
+//! - \b ADC12_B_IE24
+//! - \b ADC12_B_IE25
+//! - \b ADC12_B_IE26
+//! - \b ADC12_B_IE27
+//! - \b ADC12_B_IE28
+//! - \b ADC12_B_IE29
+//! - \b ADC12_B_IE30
+//! - \b ADC12_B_IE31
+//! \param interruptMask2 is the bit mask of the memory buffer and overflow
+//! interrupt sources to be disabled. If the desired interrupt is not
+//! available in the selection for interruptMask2, then simply pass in a
+//! '0' for this value.
+//! Valid values are:
+//! - \b ADC12_B_INIE - Interrupt enable for a conversion in the result
+//! register is either greater than the ADC12LO or lower than the
+//! ADC12HI threshold. GIE bit must be set to enable the interrupt.
+//! - \b ADC12_B_LOIE - Interrupt enable for the falling short of the
+//! lower limit interrupt of the window comparator for the result
+//! register. GIE bit must be set to enable the interrupt.
+//! - \b ADC12_B_HIIE - Interrupt enable for the exceeding the upper
+//! limit of the window comparator for the result register. GIE bit
+//! must be set to enable the interrupt.
+//! - \b ADC12_B_OVIE - Interrupt enable for a conversion that is about
+//! to save to a memory buffer that has not been read out yet. GIE
+//! bit must be set to enable the interrupt.
+//! - \b ADC12_B_TOVIE - enable for a conversion that is about to start
+//! before the previous conversion has been completed. GIE bit must
+//! be set to enable the interrupt.
+//! - \b ADC12_B_RDYIE - enable for the local buffered reference ready
+//! signal. GIE bit must be set to enable the interrupt.
+//!
+//! Modified bits of \b ADC12IERx register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void ADC12_B_disableInterrupt(uint16_t baseAddress,
+ uint16_t interruptMask0,
+ uint16_t interruptMask1,
+ uint16_t interruptMask2);
+
+//*****************************************************************************
+//
+//! \brief Clears ADC12B selected interrupt flags.
+//!
+//! Modified registers are ADC12IFG .
+//!
+//! \param baseAddress is the base address of the ADC12B module.
+//! \param interruptRegisterChoice is either 0, 1, or 2, to choose the correct
+//! interrupt register to update
+//! \param memoryInterruptFlagMask is the bit mask of the memory buffer and
+//! overflow interrupt flags to be cleared.
+//! Valid values are:
+//! - \b ADC12_B_IFG0 - interruptRegisterChoice = 0
+//! - \b ADC12_B_IFG1
+//! - \b ADC12_B_IFG2
+//! - \b ADC12_B_IFG3
+//! - \b ADC12_B_IFG4
+//! - \b ADC12_B_IFG5
+//! - \b ADC12_B_IFG6
+//! - \b ADC12_B_IFG7
+//! - \b ADC12_B_IFG8
+//! - \b ADC12_B_IFG9
+//! - \b ADC12_B_IFG10
+//! - \b ADC12_B_IFG11
+//! - \b ADC12_B_IFG12
+//! - \b ADC12_B_IFG13
+//! - \b ADC12_B_IFG14
+//! - \b ADC12_B_IFG15
+//! - \b ADC12_B_IFG16 - interruptRegisterChoice = 1
+//! - \b ADC12_B_IFG17
+//! - \b ADC12_B_IFG18
+//! - \b ADC12_B_IFG19
+//! - \b ADC12_B_IFG20
+//! - \b ADC12_B_IFG21
+//! - \b ADC12_B_IFG22
+//! - \b ADC12_B_IFG23
+//! - \b ADC12_B_IFG24
+//! - \b ADC12_B_IFG25
+//! - \b ADC12_B_IFG26
+//! - \b ADC12_B_IFG27
+//! - \b ADC12_B_IFG28
+//! - \b ADC12_B_IFG29
+//! - \b ADC12_B_IFG30
+//! - \b ADC12_B_IFG31
+//! - \b ADC12_B_INIFG - interruptRegisterChoice = 2
+//! - \b ADC12_B_LOIFG
+//! - \b ADC12_B_HIIFG
+//! - \b ADC12_B_OVIFG
+//! - \b ADC12_B_TOVIFG
+//! - \b ADC12_B_RDYIFG - The selected ADC12B interrupt flags are
+//! cleared, so that it no longer asserts. The memory buffer
+//! interrupt flags are only cleared when the memory buffer is
+//! accessed. Note that the overflow interrupts do not have an
+//! interrupt flag to clear; they must be accessed directly from the
+//! interrupt vector.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void ADC12_B_clearInterrupt(uint16_t baseAddress,
+ uint8_t interruptRegisterChoice,
+ uint16_t memoryInterruptFlagMask);
+
+//*****************************************************************************
+//
+//! \brief Returns the status of the selected memory interrupt flags.
+//!
+//! Returns the status of the selected memory interrupt flags. Note that the
+//! overflow interrupts do not have an interrupt flag to clear; they must be
+//! accessed directly from the interrupt vector.
+//!
+//! \param baseAddress is the base address of the ADC12B module.
+//! \param interruptRegisterChoice is either 0, 1, or 2, to choose the correct
+//! interrupt register to update
+//! \param memoryInterruptFlagMask is the bit mask of the memory buffer and
+//! overflow interrupt flags to be cleared.
+//! Valid values are:
+//! - \b ADC12_B_IFG0 - interruptRegisterChoice = 0
+//! - \b ADC12_B_IFG1
+//! - \b ADC12_B_IFG2
+//! - \b ADC12_B_IFG3
+//! - \b ADC12_B_IFG4
+//! - \b ADC12_B_IFG5
+//! - \b ADC12_B_IFG6
+//! - \b ADC12_B_IFG7
+//! - \b ADC12_B_IFG8
+//! - \b ADC12_B_IFG9
+//! - \b ADC12_B_IFG10
+//! - \b ADC12_B_IFG11
+//! - \b ADC12_B_IFG12
+//! - \b ADC12_B_IFG13
+//! - \b ADC12_B_IFG14
+//! - \b ADC12_B_IFG15
+//! - \b ADC12_B_IFG16 - interruptRegisterChoice = 1
+//! - \b ADC12_B_IFG17
+//! - \b ADC12_B_IFG18
+//! - \b ADC12_B_IFG19
+//! - \b ADC12_B_IFG20
+//! - \b ADC12_B_IFG21
+//! - \b ADC12_B_IFG22
+//! - \b ADC12_B_IFG23
+//! - \b ADC12_B_IFG24
+//! - \b ADC12_B_IFG25
+//! - \b ADC12_B_IFG26
+//! - \b ADC12_B_IFG27
+//! - \b ADC12_B_IFG28
+//! - \b ADC12_B_IFG29
+//! - \b ADC12_B_IFG30
+//! - \b ADC12_B_IFG31
+//! - \b ADC12_B_INIFG - interruptRegisterChoice = 2
+//! - \b ADC12_B_LOIFG
+//! - \b ADC12_B_HIIFG
+//! - \b ADC12_B_OVIFG
+//! - \b ADC12_B_TOVIFG
+//! - \b ADC12_B_RDYIFG - The selected ADC12B interrupt flags are
+//! cleared, so that it no longer asserts. The memory buffer
+//! interrupt flags are only cleared when the memory buffer is
+//! accessed. Note that the overflow interrupts do not have an
+//! interrupt flag to clear; they must be accessed directly from the
+//! interrupt vector.
+//!
+//! \return The current interrupt flag status for the corresponding mask.
+//
+//*****************************************************************************
+extern uint16_t ADC12_B_getInterruptStatus(uint16_t baseAddress,
+ uint8_t interruptRegisterChoice,
+ uint16_t memoryInterruptFlagMask);
+
+//*****************************************************************************
+//
+//! \brief Enables/Starts an Analog-to-Digital Conversion.
+//!
+//! Enables/starts the conversion process of the ADC. If the sample/hold signal
+//! source chosen during initialization was ADC12OSC, then the conversion is
+//! started immediately, otherwise the chosen sample/hold signal source starts
+//! the conversion by a rising edge of the signal. Keep in mind when selecting
+//! conversion modes, that for sequenced and/or repeated modes, to keep the
+//! sample/hold-and-convert process continuing without a trigger from the
+//! sample/hold signal source, the multiple samples must be enabled using the
+//! ADC12_B_setupSamplingTimer() function. Note that after this function is
+//! called, the ADC12_B_stopConversions() has to be called to re-initialize the
+//! ADC, reconfigure a memory buffer control, enable/disable the sampling
+//! timer, or to change the internal reference voltage.
+//!
+//! \param baseAddress is the base address of the ADC12B module.
+//! \param startingMemoryBufferIndex is the memory buffer that will hold the
+//! first or only conversion.
+//! Valid values are:
+//! - \b ADC12_B_START_AT_ADC12MEM0 [Default]
+//! - \b ADC12_B_START_AT_ADC12MEM1
+//! - \b ADC12_B_START_AT_ADC12MEM2
+//! - \b ADC12_B_START_AT_ADC12MEM3
+//! - \b ADC12_B_START_AT_ADC12MEM4
+//! - \b ADC12_B_START_AT_ADC12MEM5
+//! - \b ADC12_B_START_AT_ADC12MEM6
+//! - \b ADC12_B_START_AT_ADC12MEM7
+//! - \b ADC12_B_START_AT_ADC12MEM8
+//! - \b ADC12_B_START_AT_ADC12MEM9
+//! - \b ADC12_B_START_AT_ADC12MEM10
+//! - \b ADC12_B_START_AT_ADC12MEM11
+//! - \b ADC12_B_START_AT_ADC12MEM12
+//! - \b ADC12_B_START_AT_ADC12MEM13
+//! - \b ADC12_B_START_AT_ADC12MEM14
+//! - \b ADC12_B_START_AT_ADC12MEM15
+//! - \b ADC12_B_START_AT_ADC12MEM16
+//! - \b ADC12_B_START_AT_ADC12MEM17
+//! - \b ADC12_B_START_AT_ADC12MEM18
+//! - \b ADC12_B_START_AT_ADC12MEM19
+//! - \b ADC12_B_START_AT_ADC12MEM20
+//! - \b ADC12_B_START_AT_ADC12MEM21
+//! - \b ADC12_B_START_AT_ADC12MEM22
+//! - \b ADC12_B_START_AT_ADC12MEM23
+//! - \b ADC12_B_START_AT_ADC12MEM24
+//! - \b ADC12_B_START_AT_ADC12MEM25
+//! - \b ADC12_B_START_AT_ADC12MEM26
+//! - \b ADC12_B_START_AT_ADC12MEM27
+//! - \b ADC12_B_START_AT_ADC12MEM28
+//! - \b ADC12_B_START_AT_ADC12MEM29
+//! - \b ADC12_B_START_AT_ADC12MEM30
+//! - \b ADC12_B_START_AT_ADC12MEM31
+//! \n Modified bits are \b ADC12CSTARTADDx of \b ADC12CTL1 register.
+//! \param conversionSequenceModeSelect determines the ADC operating mode.
+//! Valid values are:
+//! - \b ADC12_B_SINGLECHANNEL [Default] - one-time conversion of a
+//! single channel into a single memory buffer.
+//! - \b ADC12_B_SEQOFCHANNELS - one time conversion of multiple
+//! channels into the specified starting memory buffer and each
+//! subsequent memory buffer up until the conversion is stored in a
+//! memory buffer dedicated as the end-of-sequence by the memory's
+//! control register.
+//! - \b ADC12_B_REPEATED_SINGLECHANNEL - repeated conversions of one
+//! channel into a single memory buffer.
+//! - \b ADC12_B_REPEATED_SEQOFCHANNELS - repeated conversions of
+//! multiple channels into the specified starting memory buffer and
+//! each subsequent memory buffer up until the conversion is stored
+//! in a memory buffer dedicated as the end-of-sequence by the
+//! memory's control register.
+//! \n Modified bits are \b ADC12CONSEQx of \b ADC12CTL1 register.
+//!
+//! Modified bits of \b ADC12CTL1 register and bits of \b ADC12CTL0 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void ADC12_B_startConversion(uint16_t baseAddress,
+ uint16_t startingMemoryBufferIndex,
+ uint8_t conversionSequenceModeSelect);
+
+//*****************************************************************************
+//
+//! \brief Disables the ADC from converting any more signals.
+//!
+//! Disables the ADC from converting any more signals. If there is a conversion
+//! in progress, this function can stop it immediately if the preempt parameter
+//! is set as ADC12_B_PREEMPTCONVERSION, by changing the conversion mode to
+//! single-channel, single-conversion and disabling conversions. If the
+//! conversion mode is set as single-channel, single-conversion and this
+//! function is called without preemption, then the ADC core conversion status
+//! is polled until the conversion is complete before disabling conversions to
+//! prevent unpredictable data. If the ADC12_B_startConversion() has been
+//! called, then this function has to be called to re-initialize the ADC,
+//! reconfigure a memory buffer control, enable/disable the sampling pulse
+//! mode, or change the internal reference voltage.
+//!
+//! \param baseAddress is the base address of the ADC12B module.
+//! \param preempt specifies if the current conversion should be preemptively
+//! stopped before the end of the conversion.
+//! Valid values are:
+//! - \b ADC12_B_COMPLETECONVERSION - Allows the ADC12B to end the
+//! current conversion before disabling conversions.
+//! - \b ADC12_B_PREEMPTCONVERSION - Stops the ADC12B immediately, with
+//! unpredictable results of the current conversion.
+//!
+//! Modified bits of \b ADC12CTL1 register and bits of \b ADC12CTL0 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void ADC12_B_disableConversions(uint16_t baseAddress,
+ bool preempt);
+
+//*****************************************************************************
+//
+//! \brief Returns the raw contents of the specified memory buffer.
+//!
+//! Returns the raw contents of the specified memory buffer. The format of the
+//! content depends on the read-back format of the data: if the data is in
+//! signed 2's complement format then the contents in the memory buffer will be
+//! left-justified with the least-significant bits as 0's, whereas if the data
+//! is in unsigned format then the contents in the memory buffer will be right-
+//! justified with the most-significant bits as 0's.
+//!
+//! \param baseAddress is the base address of the ADC12B module.
+//! \param memoryBufferIndex is the specified memory buffer to read.
+//! Valid values are:
+//! - \b ADC12_B_MEMORY_0
+//! - \b ADC12_B_MEMORY_1
+//! - \b ADC12_B_MEMORY_2
+//! - \b ADC12_B_MEMORY_3
+//! - \b ADC12_B_MEMORY_4
+//! - \b ADC12_B_MEMORY_5
+//! - \b ADC12_B_MEMORY_6
+//! - \b ADC12_B_MEMORY_7
+//! - \b ADC12_B_MEMORY_8
+//! - \b ADC12_B_MEMORY_9
+//! - \b ADC12_B_MEMORY_10
+//! - \b ADC12_B_MEMORY_11
+//! - \b ADC12_B_MEMORY_12
+//! - \b ADC12_B_MEMORY_13
+//! - \b ADC12_B_MEMORY_14
+//! - \b ADC12_B_MEMORY_15
+//! - \b ADC12_B_MEMORY_16
+//! - \b ADC12_B_MEMORY_17
+//! - \b ADC12_B_MEMORY_18
+//! - \b ADC12_B_MEMORY_19
+//! - \b ADC12_B_MEMORY_20
+//! - \b ADC12_B_MEMORY_21
+//! - \b ADC12_B_MEMORY_22
+//! - \b ADC12_B_MEMORY_23
+//! - \b ADC12_B_MEMORY_24
+//! - \b ADC12_B_MEMORY_25
+//! - \b ADC12_B_MEMORY_26
+//! - \b ADC12_B_MEMORY_27
+//! - \b ADC12_B_MEMORY_28
+//! - \b ADC12_B_MEMORY_29
+//! - \b ADC12_B_MEMORY_30
+//! - \b ADC12_B_MEMORY_31
+//!
+//! \return A signed integer of the contents of the specified memory buffer.
+//
+//*****************************************************************************
+extern uint16_t ADC12_B_getResults(uint16_t baseAddress,
+ uint8_t memoryBufferIndex);
+
+//*****************************************************************************
+//
+//! \brief Use to change the resolution of the converted data.
+//!
+//! This function can be used to change the resolution of the converted data
+//! from the default of 12-bits.
+//!
+//! \param baseAddress is the base address of the ADC12B module.
+//! \param resolutionSelect determines the resolution of the converted data.
+//! Valid values are:
+//! - \b ADC12_B_RESOLUTION_8BIT
+//! - \b ADC12_B_RESOLUTION_10BIT
+//! - \b ADC12_B_RESOLUTION_12BIT [Default]
+//! \n Modified bits are \b ADC12RESx of \b ADC12CTL2 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void ADC12_B_setResolution(uint16_t baseAddress,
+ uint8_t resolutionSelect);
+
+//*****************************************************************************
+//
+//! \brief Use to invert or un-invert the sample/hold signal.
+//!
+//! This function can be used to invert or un-invert the sample/hold signal.
+//! Note that if a conversion has been started with the startConversion()
+//! function, then a call to disableConversions() is required before this
+//! function may be called.
+//!
+//! \param baseAddress is the base address of the ADC12B module.
+//! \param invertedSignal set if the sample/hold signal should be inverted
+//! Valid values are:
+//! - \b ADC12_B_NONINVERTEDSIGNAL [Default] - a sample-and-hold of an
+//! input signal for conversion will be started on a rising edge of
+//! the sample/hold signal.
+//! - \b ADC12_B_INVERTEDSIGNAL - a sample-and-hold of an input signal
+//! for conversion will be started on a falling edge of the
+//! sample/hold signal.
+//! \n Modified bits are \b ADC12ISSH of \b ADC12CTL1 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void ADC12_B_setSampleHoldSignalInversion(uint16_t baseAddress,
+ uint16_t invertedSignal);
+
+//*****************************************************************************
+//
+//! \brief Use to set the read-back format of the converted data.
+//!
+//! Sets the format of the converted data: how it will be stored into the
+//! memory buffer, and how it should be read back. The format can be set as
+//! right-justified (default), which indicates that the number will be
+//! unsigned, or left-justified, which indicates that the number will be signed
+//! in 2's complement format. This change affects all memory buffers for
+//! subsequent conversions.
+//!
+//! \param baseAddress is the base address of the ADC12B module.
+//! \param readBackFormat is the specified format to store the conversions in
+//! the memory buffer.
+//! Valid values are:
+//! - \b ADC12_B_UNSIGNED_BINARY [Default]
+//! - \b ADC12_B_SIGNED_2SCOMPLEMENT
+//! \n Modified bits are \b ADC12DF of \b ADC12CTL2 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void ADC12_B_setDataReadBackFormat(uint16_t baseAddress,
+ uint8_t readBackFormat);
+
+//*****************************************************************************
+//
+//! \brief Use to set the ADC's power conservation mode if the sampling rate is
+//! at 50-ksps or less.
+//!
+//! Sets ADC's power mode. If the user has a sampling rate greater than
+//! 50-ksps, then he/she can only enable ADC12_B_REGULARPOWERMODE. If the
+//! sampling rate is 50-ksps or less, the user can enable ADC12_B_LOWPOWERMODE
+//! granting additional power savings.
+//!
+//! \param baseAddress is the base address of the ADC12B module.
+//! \param powerMode is the specified maximum sampling rate.
+//! Valid values are:
+//! - \b ADC12_B_REGULARPOWERMODE [Default] - If sampling rate is
+//! greater than 50-ksps, there is no power saving feature available.
+//! - \b ADC12_B_LOWPOWERMODE - If sampling rate is less than or equal
+//! to 50-ksps, select this value to save power
+//! \n Modified bits are \b ADC12SR of \b ADC12CTL2 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void ADC12_B_setAdcPowerMode(uint16_t baseAddress,
+ uint8_t powerMode);
+
+//*****************************************************************************
+//
+//! \brief Returns the address of the specified memory buffer for the DMA
+//! module.
+//!
+//! Returns the address of the specified memory buffer. This can be used in
+//! conjunction with the DMA to store the converted data directly to memory.
+//!
+//! \param baseAddress is the base address of the ADC12B module.
+//! \param memoryIndex is the memory buffer to return the address of.
+//! Valid values are:
+//! - \b ADC12_B_MEMORY_0
+//! - \b ADC12_B_MEMORY_1
+//! - \b ADC12_B_MEMORY_2
+//! - \b ADC12_B_MEMORY_3
+//! - \b ADC12_B_MEMORY_4
+//! - \b ADC12_B_MEMORY_5
+//! - \b ADC12_B_MEMORY_6
+//! - \b ADC12_B_MEMORY_7
+//! - \b ADC12_B_MEMORY_8
+//! - \b ADC12_B_MEMORY_9
+//! - \b ADC12_B_MEMORY_10
+//! - \b ADC12_B_MEMORY_11
+//! - \b ADC12_B_MEMORY_12
+//! - \b ADC12_B_MEMORY_13
+//! - \b ADC12_B_MEMORY_14
+//! - \b ADC12_B_MEMORY_15
+//! - \b ADC12_B_MEMORY_16
+//! - \b ADC12_B_MEMORY_17
+//! - \b ADC12_B_MEMORY_18
+//! - \b ADC12_B_MEMORY_19
+//! - \b ADC12_B_MEMORY_20
+//! - \b ADC12_B_MEMORY_21
+//! - \b ADC12_B_MEMORY_22
+//! - \b ADC12_B_MEMORY_23
+//! - \b ADC12_B_MEMORY_24
+//! - \b ADC12_B_MEMORY_25
+//! - \b ADC12_B_MEMORY_26
+//! - \b ADC12_B_MEMORY_27
+//! - \b ADC12_B_MEMORY_28
+//! - \b ADC12_B_MEMORY_29
+//! - \b ADC12_B_MEMORY_30
+//! - \b ADC12_B_MEMORY_31
+//!
+//! \return address of the specified memory buffer
+//
+//*****************************************************************************
+extern uint32_t ADC12_B_getMemoryAddressForDMA(uint16_t baseAddress,
+ uint8_t memoryIndex);
+
+//*****************************************************************************
+//
+//! \brief Returns the busy status of the ADC12B core.
+//!
+//! Returns the status of the ADC core if there is a conversion currently
+//! taking place.
+//!
+//! \param baseAddress is the base address of the ADC12B module.
+//!
+//! \return ADC12_B_BUSY or ADC12_B_NOTBUSY dependent if there is a conversion
+//! currently taking place.
+//! Return one of the following:
+//! - \b ADC12_B_NOTBUSY
+//! - \b ADC12_B_BUSY
+//! \n indicating if a conversion is taking place
+//
+//*****************************************************************************
+extern uint8_t ADC12_B_isBusy(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+// Mark the end of the C bindings section for C++ compilers.
+//
+//*****************************************************************************
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+#endif // __MSP430WARE_ADC12_B_H__
diff --git a/Apps/FlightSoftware/MotorControl/driverlib/aes256.c b/Apps/FlightSoftware/MotorControl/driverlib/aes256.c
new file mode 100644
index 000000000..848b28fed
--- /dev/null
+++ b/Apps/FlightSoftware/MotorControl/driverlib/aes256.c
@@ -0,0 +1,368 @@
+/* --COPYRIGHT--,BSD
+ * Copyright (c) 2017, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * --/COPYRIGHT--*/
+//*****************************************************************************
+//
+// aes256.c - Driver for the aes256 Module.
+//
+//*****************************************************************************
+
+//*****************************************************************************
+//
+//! \addtogroup aes256_api aes256
+//! @{
+//
+//*****************************************************************************
+
+#include "inc/hw_memmap.h"
+
+#ifdef __MSP430_HAS_AES256__
+#include "aes256.h"
+
+#include
+
+uint8_t AES256_setCipherKey (uint16_t baseAddress,
+ const uint8_t * cipherKey,
+ uint16_t keyLength)
+{
+ uint8_t i;
+ uint16_t sCipherKey;
+
+ HWREG16(baseAddress + OFS_AESACTL0) &= (~(AESKL_1 + AESKL_2));
+
+ switch(keyLength)
+ {
+ case AES256_KEYLENGTH_128BIT :
+ HWREG16(baseAddress + OFS_AESACTL0) |= AESKL__128;
+ break;
+
+ case AES256_KEYLENGTH_192BIT :
+ HWREG16(baseAddress + OFS_AESACTL0) |= AESKL__192;
+ break;
+
+ case AES256_KEYLENGTH_256BIT :
+ HWREG16(baseAddress + OFS_AESACTL0) |= AESKL__256;
+ break;
+
+ default :
+ return STATUS_FAIL;
+ }
+
+ keyLength = keyLength / 8;
+
+ for (i = 0; i < keyLength; i = i + 2)
+ {
+ sCipherKey = (uint16_t)(cipherKey[i]);
+ sCipherKey = sCipherKey | ((uint16_t)(cipherKey[i + 1]) << 8);
+ HWREG16(baseAddress + OFS_AESAKEY) = sCipherKey;
+ }
+
+ // Wait until key is written
+ while(0x00 == (HWREG16(baseAddress + OFS_AESASTAT) & AESKEYWR ));
+ return STATUS_SUCCESS;
+}
+
+void AES256_encryptData (uint16_t baseAddress,
+ const uint8_t * data,
+ uint8_t * encryptedData)
+{
+ uint8_t i;
+ uint16_t tempData = 0;
+ uint16_t tempVariable = 0;
+
+ // Set module to encrypt mode
+ HWREG16(baseAddress + OFS_AESACTL0) &= ~AESOP_3;
+
+
+ // Write data to encrypt to module
+ for (i = 0; i < 16; i = i + 2)
+ {
+ tempVariable = (uint16_t)(data[i]);
+ tempVariable = tempVariable | ((uint16_t)(data[i+1]) << 8);
+ HWREG16(baseAddress + OFS_AESADIN) = tempVariable;
+ }
+
+ // Key that is already written shall be used
+ // Encryption is initialized by setting AESKEYWR to 1
+ HWREG16(baseAddress + OFS_AESASTAT) |= AESKEYWR;
+
+ // Wait unit finished ~167 MCLK
+ while(AESBUSY == (HWREG16(baseAddress + OFS_AESASTAT) & AESBUSY) );
+
+ // Write encrypted data back to variable
+ for (i = 0; i < 16; i = i + 2)
+ {
+ tempData = HWREG16(baseAddress + OFS_AESADOUT);
+ *(encryptedData + i) = (uint8_t)tempData;
+ *(encryptedData +i + 1) = (uint8_t)(tempData >> 8);
+
+
+ }
+}
+
+void AES256_decryptData (uint16_t baseAddress,
+ const uint8_t * data,
+ uint8_t * decryptedData)
+{
+ uint8_t i;
+ uint16_t tempData = 0;
+ uint16_t tempVariable = 0;
+
+ // Set module to decrypt mode
+ HWREG16(baseAddress + OFS_AESACTL0) |= (AESOP_3);
+
+ // Write data to decrypt to module
+ for (i = 0; i < 16; i = i + 2)
+ {
+ tempVariable = (uint16_t)(data[i+1] << 8);
+ tempVariable = tempVariable | ((uint16_t)(data[i]));
+ HWREG16(baseAddress + OFS_AESADIN) = tempVariable;
+ }
+
+ // Key that is already written shall be used
+ // Now decryption starts
+ HWREG16(baseAddress + OFS_AESASTAT) |= AESKEYWR;
+
+ // Wait unit finished ~167 MCLK
+ while(AESBUSY == (HWREG16(baseAddress + OFS_AESASTAT) & AESBUSY ));
+
+ // Write encrypted data back to variable
+ for (i = 0; i < 16; i = i + 2)
+ {
+ tempData = HWREG16(baseAddress + OFS_AESADOUT);
+ *(decryptedData + i) = (uint8_t)tempData;
+ *(decryptedData +i + 1) = (uint8_t)(tempData >> 8);
+ }
+}
+
+uint8_t AES256_setDecipherKey (uint16_t baseAddress,
+ const uint8_t * cipherKey,
+ uint16_t keyLength
+ )
+{
+ uint8_t i;
+ uint16_t tempVariable = 0;
+
+ // Set module to decrypt mode
+ HWREG16(baseAddress + OFS_AESACTL0) &= ~(AESOP0);
+ HWREG16(baseAddress + OFS_AESACTL0) |= AESOP1;
+
+ switch(keyLength)
+ {
+ case AES256_KEYLENGTH_128BIT :
+ HWREG16(baseAddress + OFS_AESACTL0) |= AESKL__128;
+ break;
+
+ case AES256_KEYLENGTH_192BIT :
+ HWREG16(baseAddress + OFS_AESACTL0) |= AESKL__192;
+ break;
+
+ case AES256_KEYLENGTH_256BIT :
+ HWREG16(baseAddress + OFS_AESACTL0) |= AESKL__256;
+ break;
+
+ default :
+ return STATUS_FAIL;
+ }
+
+
+ keyLength = keyLength / 8;
+
+
+ // Write cipher key to key register
+ for (i = 0; i < keyLength; i = i + 2)
+ {
+ tempVariable = (uint16_t)(cipherKey[i]);
+ tempVariable = tempVariable | ((uint16_t)(cipherKey[i + 1]) << 8);
+ HWREG16(baseAddress + OFS_AESAKEY) = tempVariable;
+ }
+
+ // Wait until key is processed ~52 MCLK
+ while((HWREG16(baseAddress + OFS_AESASTAT) & AESBUSY) == AESBUSY);
+
+ return STATUS_SUCCESS;
+}
+
+void AES256_clearInterrupt (uint16_t baseAddress )
+{
+ HWREG16(baseAddress + OFS_AESACTL0) &= ~AESRDYIFG;
+}
+
+uint32_t AES256_getInterruptStatus (uint16_t baseAddress)
+{
+ return ((HWREG16(baseAddress + OFS_AESACTL0) & AESRDYIFG) << 0x04);
+}
+
+void AES256_enableInterrupt (uint16_t baseAddress)
+{
+ HWREG16(baseAddress + OFS_AESACTL0) |= AESRDYIE;
+}
+
+void AES256_disableInterrupt (uint16_t baseAddress)
+{
+ HWREG16(baseAddress + OFS_AESACTL0) &= ~AESRDYIE;
+}
+
+void AES256_reset (uint16_t baseAddress)
+{
+ HWREG16(baseAddress + OFS_AESACTL0) |= AESSWRST;
+}
+
+void AES256_startEncryptData (uint16_t baseAddress,
+ const uint8_t * data)
+{
+ uint8_t i;
+ uint16_t tempVariable = 0;
+
+ // Set module to encrypt mode
+ HWREG16(baseAddress + OFS_AESACTL0) &= ~AESOP_3;
+
+
+ // Write data to encrypt to module
+ for (i = 0; i < 16; i = i + 2)
+ {
+ tempVariable = (uint16_t)(data[i]);
+ tempVariable = tempVariable | ((uint16_t)(data[i+1 ]) << 8);
+ HWREG16(baseAddress + OFS_AESADIN) = tempVariable;
+ }
+
+ // Key that is already written shall be used
+ // Encryption is initialized by setting AESKEYWR to 1
+ HWREG16(baseAddress + OFS_AESASTAT) |= AESKEYWR;
+}
+
+void AES256_startDecryptData (uint16_t baseAddress,
+ const uint8_t * data)
+{
+ uint8_t i;
+ uint16_t tempVariable = 0;
+
+ // Set module to decrypt mode
+ HWREG16(baseAddress + OFS_AESACTL0) |= (AESOP_3);
+
+ // Write data to decrypt to module
+ for (i = 0; i < 16; i = i + 2)
+ {
+ tempVariable = (uint16_t)(data[i+1] << 8);
+ tempVariable = tempVariable | ((uint16_t)(data[i]));
+ HWREG16(baseAddress + OFS_AESADIN) = tempVariable;
+ }
+
+ // Key that is already written shall be used
+ // Now decryption starts
+ HWREG16(baseAddress + OFS_AESASTAT) |= AESKEYWR;
+}
+
+uint8_t AES256_startSetDecipherKey (uint16_t baseAddress,
+ const uint8_t * cipherKey,
+ uint16_t keyLength)
+{
+ uint8_t i;
+ uint16_t tempVariable = 0;
+
+ HWREG16(baseAddress + OFS_AESACTL0) &= ~(AESOP0);
+ HWREG16(baseAddress + OFS_AESACTL0) |= AESOP1;
+
+ switch(keyLength)
+ {
+ case AES256_KEYLENGTH_128BIT :
+ HWREG16(baseAddress + OFS_AESACTL0) |= AESKL__128;
+ break;
+
+ case AES256_KEYLENGTH_192BIT :
+ HWREG16(baseAddress + OFS_AESACTL0) |= AESKL__192;
+ break;
+
+ case AES256_KEYLENGTH_256BIT :
+ HWREG16(baseAddress + OFS_AESACTL0) |= AESKL__256;
+ break;
+
+ default :
+ return STATUS_FAIL;
+ }
+
+ keyLength = keyLength / 8;
+
+ // Write cipher key to key register
+ for (i = 0; i < keyLength; i = i + 2)
+ {
+ tempVariable = (uint16_t)(cipherKey[i]);
+ tempVariable = tempVariable | ((uint16_t)(cipherKey[i+1]) << 8);
+ HWREG16(baseAddress + OFS_AESAKEY) = tempVariable;
+ }
+
+ return STATUS_SUCCESS;
+}
+
+uint8_t AES256_getDataOut(uint16_t baseAddress,
+ uint8_t *outputData
+ )
+{
+ uint8_t i;
+ uint16_t tempData = 0;
+
+ // If module is busy, exit and return failure
+ if( AESBUSY == (HWREG16(baseAddress + OFS_AESASTAT) & AESBUSY))
+ return STATUS_FAIL;
+
+ // Write encrypted data back to variable
+ for (i = 0; i < 16; i = i + 2)
+ {
+ tempData = HWREG16(baseAddress + OFS_AESADOUT);
+ *(outputData + i ) = (uint8_t)tempData;
+ *(outputData +i + 1) = (uint8_t)(tempData >> 8);
+ }
+
+ return STATUS_SUCCESS;
+}
+
+uint16_t AES256_isBusy (uint16_t baseAddress)
+{
+ return (HWREG16(baseAddress + OFS_AESASTAT) & AESBUSY);
+}
+
+void AES256_clearErrorFlag (uint16_t baseAddress )
+{
+ HWREG16(baseAddress + OFS_AESACTL0) &= ~AESERRFG;
+}
+
+uint32_t AES256_getErrorFlagStatus (uint16_t baseAddress)
+{
+ return (HWREG16(baseAddress + OFS_AESACTL0) & AESERRFG);
+}
+
+#endif
+//*****************************************************************************
+//
+//! Close the doxygen group for aes256_api
+//! @}
+//
+//*****************************************************************************
diff --git a/Apps/FlightSoftware/MotorControl/driverlib/aes256.h b/Apps/FlightSoftware/MotorControl/driverlib/aes256.h
new file mode 100644
index 000000000..7c0c69706
--- /dev/null
+++ b/Apps/FlightSoftware/MotorControl/driverlib/aes256.h
@@ -0,0 +1,418 @@
+/* --COPYRIGHT--,BSD
+ * Copyright (c) 2017, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * --/COPYRIGHT--*/
+//*****************************************************************************
+//
+// aes256.h - Driver for the AES256 Module.
+//
+//*****************************************************************************
+
+#ifndef __MSP430WARE_AES256_H__
+#define __MSP430WARE_AES256_H__
+
+#include "inc/hw_memmap.h"
+
+#ifdef __MSP430_HAS_AES256__
+
+//*****************************************************************************
+//
+// If building with a C++ compiler, make all of the definitions in this header
+// have a C binding.
+//
+//*****************************************************************************
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the keyLength parameter for
+// functions: AES256_setCipherKey(), AES256_setDecipherKey(), and
+// AES256_startSetDecipherKey().
+//
+//*****************************************************************************
+#define AES256_KEYLENGTH_128BIT 128
+#define AES256_KEYLENGTH_192BIT 192
+#define AES256_KEYLENGTH_256BIT 256
+
+//*****************************************************************************
+//
+// The following are values that can be passed toThe following are values that
+// can be returned by the AES256_getErrorFlagStatus() function.
+//
+//*****************************************************************************
+#define AES256_ERROR_OCCURRED AESERRFG
+#define AES256_NO_ERROR 0x00
+
+//*****************************************************************************
+//
+// The following are values that can be passed toThe following are values that
+// can be returned by the AES256_isBusy() function.
+//
+//*****************************************************************************
+#define AES256_BUSY AESBUSY
+#define AES256_NOT_BUSY 0x00
+
+//*****************************************************************************
+//
+// The following are values that can be passed toThe following are values that
+// can be returned by the AES256_getInterruptStatus() function.
+//
+//*****************************************************************************
+#define AES256_READY_INTERRUPT AESRDYIE
+#define AES256_NOTREADY_INTERRUPT 0x00
+
+//*****************************************************************************
+//
+// Prototypes for the APIs.
+//
+//*****************************************************************************
+
+//*****************************************************************************
+//
+//! \brief Loads a 128, 192 or 256 bit cipher key to AES256 module.
+//!
+//! This function loads a 128, 192 or 256 bit cipher key to AES256 module.
+//! Requires both a key as well as the length of the key provided. Acceptable
+//! key lengths are AES256_KEYLENGTH_128BIT, AES256_KEYLENGTH_192BIT, or
+//! AES256_KEYLENGTH_256BIT
+//!
+//! \param baseAddress is the base address of the AES256 module.
+//! \param cipherKey is a pointer to an uint8_t array with a length of 16 bytes
+//! that contains a 128 bit cipher key.
+//! \param keyLength is the length of the key.
+//! Valid values are:
+//! - \b AES256_KEYLENGTH_128BIT
+//! - \b AES256_KEYLENGTH_192BIT
+//! - \b AES256_KEYLENGTH_256BIT
+//!
+//! \return STATUS_SUCCESS or STATUS_FAIL of key loading
+//
+//*****************************************************************************
+extern uint8_t AES256_setCipherKey(uint16_t baseAddress,
+ const uint8_t *cipherKey,
+ uint16_t keyLength);
+
+//*****************************************************************************
+//
+//! \brief Encrypts a block of data using the AES256 module.
+//!
+//! The cipher key that is used for encryption should be loaded in advance by
+//! using function AES256_setCipherKey()
+//!
+//! \param baseAddress is the base address of the AES256 module.
+//! \param data is a pointer to an uint8_t array with a length of 16 bytes that
+//! contains data to be encrypted.
+//! \param encryptedData is a pointer to an uint8_t array with a length of 16
+//! bytes in that the encrypted data will be written.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void AES256_encryptData(uint16_t baseAddress,
+ const uint8_t *data,
+ uint8_t *encryptedData);
+
+//*****************************************************************************
+//
+//! \brief Decrypts a block of data using the AES256 module.
+//!
+//! This function requires a pregenerated decryption key. A key can be loaded
+//! and pregenerated by using function AES256_setDecipherKey() or
+//! AES256_startSetDecipherKey(). The decryption takes 167 MCLK.
+//!
+//! \param baseAddress is the base address of the AES256 module.
+//! \param data is a pointer to an uint8_t array with a length of 16 bytes that
+//! contains encrypted data to be decrypted.
+//! \param decryptedData is a pointer to an uint8_t array with a length of 16
+//! bytes in that the decrypted data will be written.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void AES256_decryptData(uint16_t baseAddress,
+ const uint8_t *data,
+ uint8_t *decryptedData);
+
+//*****************************************************************************
+//
+//! \brief Sets the decipher key.
+//!
+//! The API AES256_startSetDecipherKey or AES256_setDecipherKey must be invoked
+//! before invoking AES256_startDecryptData.
+//!
+//! \param baseAddress is the base address of the AES256 module.
+//! \param cipherKey is a pointer to an uint8_t array with a length of 16 bytes
+//! that contains a 128 bit cipher key.
+//! \param keyLength is the length of the key.
+//! Valid values are:
+//! - \b AES256_KEYLENGTH_128BIT
+//! - \b AES256_KEYLENGTH_192BIT
+//! - \b AES256_KEYLENGTH_256BIT
+//!
+//! \return STATUS_SUCCESS or STATUS_FAIL of key loading
+//
+//*****************************************************************************
+extern uint8_t AES256_setDecipherKey(uint16_t baseAddress,
+ const uint8_t *cipherKey,
+ uint16_t keyLength);
+
+//*****************************************************************************
+//
+//! \brief Clears the AES256 ready interrupt flag.
+//!
+//! This function clears the AES256 ready interrupt flag. This flag is
+//! automatically cleared when AES256ADOUT is read, or when AES256AKEY or
+//! AES256ADIN is written. This function should be used when the flag needs to
+//! be reset and it has not been automatically cleared by one of the previous
+//! actions.
+//!
+//! \param baseAddress is the base address of the AES256 module.
+//!
+//! Modified bits are \b AESRDYIFG of \b AESACTL0 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void AES256_clearInterrupt(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Gets the AES256 ready interrupt flag status.
+//!
+//! This function checks the AES256 ready interrupt flag. This flag is
+//! automatically cleared when AES256ADOUT is read, or when AES256AKEY or
+//! AES256ADIN is written. This function can be used to confirm that this has
+//! been done.
+//!
+//! \param baseAddress is the base address of the AES256 module.
+//!
+//! \return One of the following:
+//! - \b AES256_READY_INTERRUPT
+//! - \b AES256_NOTREADY_INTERRUPT
+//! \n indicating the status of the AES256 ready status
+//
+//*****************************************************************************
+extern uint32_t AES256_getInterruptStatus(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Enables AES256 ready interrupt.
+//!
+//! Enables AES256 ready interrupt. This interrupt is reset by a PUC, but not
+//! reset by AES256_reset.
+//!
+//! \param baseAddress is the base address of the AES256 module.
+//!
+//! Modified bits are \b AESRDYIE of \b AESACTL0 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void AES256_enableInterrupt(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Disables AES256 ready interrupt.
+//!
+//! Disables AES256 ready interrupt. This interrupt is reset by a PUC, but not
+//! reset by AES256_reset.
+//!
+//! \param baseAddress is the base address of the AES256 module.
+//!
+//! Modified bits are \b AESRDYIE of \b AESACTL0 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void AES256_disableInterrupt(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Resets AES256 Module immediately.
+//!
+//! This function performs a software reset on the AES256 Module, note that
+//! this does not affect the AES256 ready interrupt.
+//!
+//! \param baseAddress is the base address of the AES256 module.
+//!
+//! Modified bits are \b AESSWRST of \b AESACTL0 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void AES256_reset(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Starts an encryption process on the AES256 module.
+//!
+//! The cipher key that is used for decryption should be loaded in advance by
+//! using function AES256_setCipherKey(). This is a non-blocking equivalent of
+//! AES256_encryptData(). It is recommended to use the interrupt functionality
+//! to check for procedure completion then use the AES256_getDataOut() API to
+//! retrieve the encrypted data.
+//!
+//! \param baseAddress is the base address of the AES256 module.
+//! \param data is a pointer to an uint8_t array with a length of 16 bytes that
+//! contains data to be encrypted.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void AES256_startEncryptData(uint16_t baseAddress,
+ const uint8_t *data);
+
+//*****************************************************************************
+//
+//! \brief Decrypts a block of data using the AES256 module.
+//!
+//! This is the non-blocking equivalent of AES256_decryptData(). This function
+//! requires a pregenerated decryption key. A key can be loaded and
+//! pregenerated by using function AES256_setDecipherKey() or
+//! AES256_startSetDecipherKey(). The decryption takes 167 MCLK. It is
+//! recommended to use interrupt to check for procedure completion then use the
+//! AES256_getDataOut() API to retrieve the decrypted data.
+//!
+//! \param baseAddress is the base address of the AES256 module.
+//! \param data is a pointer to an uint8_t array with a length of 16 bytes that
+//! contains encrypted data to be decrypted.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void AES256_startDecryptData(uint16_t baseAddress,
+ const uint8_t *data);
+
+//*****************************************************************************
+//
+//! \brief Sets the decipher key
+//!
+//! The API AES256_startSetDecipherKey() or AES256_setDecipherKey() must be
+//! invoked before invoking AES256_startDecryptData.
+//!
+//! \param baseAddress is the base address of the AES256 module.
+//! \param cipherKey is a pointer to an uint8_t array with a length of 16 bytes
+//! that contains a 128 bit cipher key.
+//! \param keyLength is the length of the key.
+//! Valid values are:
+//! - \b AES256_KEYLENGTH_128BIT
+//! - \b AES256_KEYLENGTH_192BIT
+//! - \b AES256_KEYLENGTH_256BIT
+//!
+//! \return STATUS_SUCCESS or STATUS_FAIL of key loading
+//
+//*****************************************************************************
+extern uint8_t AES256_startSetDecipherKey(uint16_t baseAddress,
+ const uint8_t *cipherKey,
+ uint16_t keyLength);
+
+//*****************************************************************************
+//
+//! \brief Reads back the output data from AES256 module.
+//!
+//! This function is meant to use after an encryption or decryption process
+//! that was started and finished by initiating an interrupt by use of
+//! AES256_startEncryptData or AES256_startDecryptData functions.
+//!
+//! \param baseAddress is the base address of the AES256 module.
+//! \param outputData is a pointer to an uint8_t array with a length of 16
+//! bytes in that the data will be written.
+//!
+//! \return STATUS_SUCCESS if data is valid, otherwise STATUS_FAIL
+//
+//*****************************************************************************
+extern uint8_t AES256_getDataOut(uint16_t baseAddress,
+ uint8_t *outputData);
+
+//*****************************************************************************
+//
+//! \brief Gets the AES256 module busy status.
+//!
+//! Gets the AES256 module busy status. If a key or data are written while the
+//! AES256 module is busy, an error flag will be thrown.
+//!
+//! \param baseAddress is the base address of the AES256 module.
+//!
+//! \return One of the following:
+//! - \b AES256_BUSY
+//! - \b AES256_NOT_BUSY
+//! \n indicating if the AES256 module is busy
+//
+//*****************************************************************************
+extern uint16_t AES256_isBusy(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Clears the AES256 error flag.
+//!
+//! Clears the AES256 error flag that results from a key or data being written
+//! while the AES256 module is busy.
+//!
+//! \param baseAddress is the base address of the AES256 module.
+//!
+//! Modified bits are \b AESERRFG of \b AESACTL0 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void AES256_clearErrorFlag(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Gets the AES256 error flag status.
+//!
+//! Checks the AES256 error flag that results from a key or data being written
+//! while the AES256 module is busy. If the flag is set, it needs to be cleared
+//! using AES256_clearErrorFlag.
+//!
+//! \param baseAddress is the base address of the AES256 module.
+//!
+//! \return One of the following:
+//! - \b AES256_ERROR_OCCURRED
+//! - \b AES256_NO_ERROR
+//! \n indicating the error flag status
+//
+//*****************************************************************************
+extern uint32_t AES256_getErrorFlagStatus(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+// Mark the end of the C bindings section for C++ compilers.
+//
+//*****************************************************************************
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+#endif // __MSP430WARE_AES256_H__
diff --git a/Apps/FlightSoftware/MotorControl/driverlib/comp_e.c b/Apps/FlightSoftware/MotorControl/driverlib/comp_e.c
new file mode 100644
index 000000000..9f851b079
--- /dev/null
+++ b/Apps/FlightSoftware/MotorControl/driverlib/comp_e.c
@@ -0,0 +1,277 @@
+/* --COPYRIGHT--,BSD
+ * Copyright (c) 2017, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * --/COPYRIGHT--*/
+//*****************************************************************************
+//
+// comp_e.c - Driver for the comp_e Module.
+//
+//*****************************************************************************
+
+//*****************************************************************************
+//
+//! \addtogroup comp_e_api comp_e
+//! @{
+//
+//*****************************************************************************
+
+#include "inc/hw_memmap.h"
+
+#ifdef __MSP430_HAS_COMP_E__
+#include "comp_e.h"
+
+#include
+
+static uint16_t __getRegisterSettingForInput(uint32_t input)
+{
+ switch(input)
+ {
+ case COMP_E_INPUT0:
+ return CEIPSEL_0;
+ case COMP_E_INPUT1:
+ return CEIPSEL_1;
+ case COMP_E_INPUT2:
+ return CEIPSEL_2;
+ case COMP_E_INPUT3:
+ return CEIPSEL_3;
+ case COMP_E_INPUT4:
+ return CEIPSEL_4;
+ case COMP_E_INPUT5:
+ return CEIPSEL_5;
+ case COMP_E_INPUT6:
+ return CEIPSEL_6;
+ case COMP_E_INPUT7:
+ return CEIPSEL_7;
+ case COMP_E_INPUT8:
+ return CEIPSEL_8;
+ case COMP_E_INPUT9:
+ return CEIPSEL_9;
+ case COMP_E_INPUT10:
+ return CEIPSEL_10;
+ case COMP_E_INPUT11:
+ return CEIPSEL_11;
+ case COMP_E_INPUT12:
+ return CEIPSEL_12;
+ case COMP_E_INPUT13:
+ return CEIPSEL_13;
+ case COMP_E_INPUT14:
+ return CEIPSEL_14;
+ case COMP_E_INPUT15:
+ return CEIPSEL_15;
+ case COMP_E_VREF:
+ return COMP_E_VREF;
+ default:
+ return 0x11;
+ }
+}
+
+bool Comp_E_init(uint16_t baseAddress, Comp_E_initParam *param)
+{
+ uint8_t positiveTerminalInput = __getRegisterSettingForInput(
+ param->posTerminalInput);
+ uint8_t negativeTerminalInput = __getRegisterSettingForInput(
+ param->negTerminalInput);
+ bool retVal = STATUS_SUCCESS;
+
+ //Reset COMPE Control 1 & Interrupt Registers for initialization (OFS_CECTL3
+ //is not reset because it controls the input buffers of the analog signals
+ //and may cause parasitic effects if an analog signal is still attached and
+ //the buffer is re-enabled
+ HWREG16(baseAddress + OFS_CECTL0) &= 0x0000;
+ HWREG16(baseAddress + OFS_CEINT) &= 0x0000;
+
+ //Clear reference voltage and reference source
+ HWREG16(baseAddress + OFS_CECTL2) &= ~(CERS_3 | CEREFL_3);
+
+ //Set the Positive Terminal
+ if (COMP_E_VREF != positiveTerminalInput){
+ //Enable Positive Terminal Input Mux and Set it to the appropriate input
+ HWREG16(baseAddress + OFS_CECTL0) |= CEIPEN + positiveTerminalInput;
+
+ //Disable the input buffer
+ HWREG16(baseAddress + OFS_CECTL3) |= (1 << positiveTerminalInput);
+ } else {
+ //Reset and Set COMPE Control 2 Register
+ HWREG16(baseAddress + OFS_CECTL2) &= ~(CERSEL); //Set Vref to go to (+)terminal
+ }
+
+ //Set the Negative Terminal
+ if (COMP_E_VREF != negativeTerminalInput){
+ //Enable Negative Terminal Input Mux and Set it to the appropriate input
+ HWREG16(baseAddress + OFS_CECTL0) |= CEIMEN + (negativeTerminalInput << 8);
+
+ //Disable the input buffer
+ HWREG16(baseAddress + OFS_CECTL3) |= (1 << negativeTerminalInput);
+ } else {
+ //Reset and Set COMPE Control 2 Register
+ HWREG16(baseAddress + OFS_CECTL2) |= CERSEL; //Set Vref to go to (-) terminal
+ }
+
+ //Reset and Set COMPE Control 1 Register
+ HWREG16(baseAddress + OFS_CECTL1) =
+ + param->outputFilterEnableAndDelayLevel //Set the filter enable bit and delay
+ + param->invertedOutputPolarity; //Set the polarity of the output
+
+ return (retVal);
+}
+void Comp_E_setReferenceVoltage (uint16_t baseAddress,
+ uint16_t supplyVoltageReferenceBase,
+ uint16_t lowerLimitSupplyVoltageFractionOf32,
+ uint16_t upperLimitSupplyVoltageFractionOf32)
+{
+ HWREG16(baseAddress + OFS_CECTL1) &= ~(CEMRVS); //Set to VREF0
+
+ //Reset COMPE Control 2 Bits (Except for CERSEL which is set in Comp_Init() )
+ HWREG16(baseAddress + OFS_CECTL2) &= CERSEL;
+
+ //Set Voltage Source (Vcc | Vref, resistor ladder or not)
+ if (COMP_E_REFERENCE_AMPLIFIER_DISABLED == supplyVoltageReferenceBase){
+ HWREG16(baseAddress + OFS_CECTL2) |= CERS_1; //Vcc with resistor ladder
+ } else if (lowerLimitSupplyVoltageFractionOf32 == 32){
+ //If the lower limit is 32, then the upper limit has to be 32 due to the
+ //assertion that upper must be >= to the lower limit. If the numerator is
+ //equal to 32, then the equation would be 32/32 == 1, therefore no resistor
+ //ladder is needed
+ HWREG16(baseAddress + OFS_CECTL2) |= CERS_3; //Vref, no resistor ladder
+ } else {
+ HWREG16(baseAddress + OFS_CECTL2) |= CERS_2; //Vref with resistor ladder
+ }
+
+ //Set COMPE Control 2 Register
+ HWREG16(baseAddress + OFS_CECTL2) |=
+ supplyVoltageReferenceBase //Set Supply Voltage Base
+ + ((upperLimitSupplyVoltageFractionOf32 - 1) << 8) //Set Supply Voltage Num.
+ + (lowerLimitSupplyVoltageFractionOf32 - 1);
+}
+
+void Comp_E_setReferenceAccuracy (uint16_t baseAddress,
+ uint16_t referenceAccuracy)
+{
+ HWREG16(baseAddress + OFS_CECTL2) &= ~(CEREFACC);
+ HWREG16(baseAddress + OFS_CECTL2) |= referenceAccuracy;
+}
+
+void Comp_E_setPowerMode (uint16_t baseAddress,
+ uint16_t powerMode)
+{
+ HWREG16(baseAddress + OFS_CECTL1) &= ~(COMP_E_NORMAL_MODE | COMP_E_ULTRA_LOW_POWER_MODE);
+ HWREG16(baseAddress + OFS_CECTL1) |= powerMode;
+}
+
+void Comp_E_enableInterrupt (uint16_t baseAddress,
+ uint16_t interruptMask)
+{
+ //Set the Interrupt enable bit
+ HWREG16(baseAddress + OFS_CEINT) |= interruptMask;
+}
+
+void Comp_E_disableInterrupt (uint16_t baseAddress,
+ uint16_t interruptMask)
+{
+ HWREG16(baseAddress + OFS_CEINT) &= ~(interruptMask);
+}
+
+void Comp_E_clearInterrupt (uint16_t baseAddress,
+ uint16_t interruptFlagMask)
+{
+ HWREG16(baseAddress + OFS_CEINT) &= ~(interruptFlagMask);
+}
+
+uint8_t Comp_E_getInterruptStatus (uint16_t baseAddress,
+ uint16_t interruptFlagMask)
+{
+ return ( HWREG16(baseAddress + OFS_CEINT) & interruptFlagMask );
+}
+
+void Comp_E_setInterruptEdgeDirection (uint16_t baseAddress,
+ uint16_t edgeDirection)
+{
+ //Set the edge direction that will trigger an interrupt
+ if (COMP_E_RISINGEDGE == edgeDirection){
+ HWREG16(baseAddress + OFS_CECTL1) &= ~(CEIES);
+ } else if (COMP_E_FALLINGEDGE == edgeDirection){
+ HWREG16(baseAddress + OFS_CECTL1) |= CEIES;
+ }
+}
+
+void Comp_E_toggleInterruptEdgeDirection (uint16_t baseAddress)
+{
+ HWREG16(baseAddress + OFS_CECTL1) ^= CEIES;
+}
+
+void Comp_E_enable (uint16_t baseAddress)
+{
+ HWREG16(baseAddress + OFS_CECTL1) |= CEON;
+}
+
+void Comp_E_disable (uint16_t baseAddress)
+{
+ HWREG16(baseAddress + OFS_CECTL1) &= ~(CEON);
+}
+
+void Comp_E_shortInputs (uint16_t baseAddress)
+{
+ HWREG16(baseAddress + OFS_CECTL1) |= CESHORT;
+}
+
+void Comp_E_unshortInputs (uint16_t baseAddress)
+{
+ HWREG16(baseAddress + OFS_CECTL1) &= ~(CESHORT);
+}
+
+void Comp_E_disableInputBuffer (uint16_t baseAddress,
+ uint16_t inputPort)
+{
+ HWREG16(baseAddress + OFS_CECTL3) |= (inputPort);
+}
+
+void Comp_E_enableInputBuffer (uint16_t baseAddress, uint16_t inputPort)
+{
+ HWREG16(baseAddress + OFS_CECTL3) &= ~(inputPort);
+}
+
+void Comp_E_swapIO (uint16_t baseAddress)
+{
+ HWREG16(baseAddress + OFS_CECTL1) ^= CEEX; //Toggle CEEX bit
+}
+
+uint16_t Comp_E_outputValue (uint16_t baseAddress)
+{
+ return (HWREG16(baseAddress + OFS_CECTL1) & CEOUT);
+}
+
+
+#endif
+//*****************************************************************************
+//
+//! Close the doxygen group for comp_e_api
+//! @}
+//
+//*****************************************************************************
diff --git a/Apps/FlightSoftware/MotorControl/driverlib/comp_e.h b/Apps/FlightSoftware/MotorControl/driverlib/comp_e.h
new file mode 100644
index 000000000..5346da3cd
--- /dev/null
+++ b/Apps/FlightSoftware/MotorControl/driverlib/comp_e.h
@@ -0,0 +1,666 @@
+/* --COPYRIGHT--,BSD
+ * Copyright (c) 2017, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * --/COPYRIGHT--*/
+//*****************************************************************************
+//
+// comp_e.h - Driver for the COMP_E Module.
+//
+//*****************************************************************************
+
+#ifndef __MSP430WARE_COMP_E_H__
+#define __MSP430WARE_COMP_E_H__
+
+#include "inc/hw_memmap.h"
+
+#ifdef __MSP430_HAS_COMP_E__
+
+//*****************************************************************************
+//
+// If building with a C++ compiler, make all of the definitions in this header
+// have a C binding.
+//
+//*****************************************************************************
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+#include "inc/hw_memmap.h"
+//*****************************************************************************
+//
+//! \brief Used in the Comp_E_init() function as the param parameter.
+//
+//*****************************************************************************
+typedef struct Comp_E_initParam {
+ //! Selects the input to the positive terminal.
+ //! \n Valid values are:
+ //! - \b COMP_E_INPUT0 [Default]
+ //! - \b COMP_E_INPUT1
+ //! - \b COMP_E_INPUT2
+ //! - \b COMP_E_INPUT3
+ //! - \b COMP_E_INPUT4
+ //! - \b COMP_E_INPUT5
+ //! - \b COMP_E_INPUT6
+ //! - \b COMP_E_INPUT7
+ //! - \b COMP_E_INPUT8
+ //! - \b COMP_E_INPUT9
+ //! - \b COMP_E_INPUT10
+ //! - \b COMP_E_INPUT11
+ //! - \b COMP_E_INPUT12
+ //! - \b COMP_E_INPUT13
+ //! - \b COMP_E_INPUT14
+ //! - \b COMP_E_INPUT15
+ //! - \b COMP_E_VREF
+ uint16_t posTerminalInput;
+ //! Selects the input to the negative terminal.
+ //! \n Valid values are:
+ //! - \b COMP_E_INPUT0 [Default]
+ //! - \b COMP_E_INPUT1
+ //! - \b COMP_E_INPUT2
+ //! - \b COMP_E_INPUT3
+ //! - \b COMP_E_INPUT4
+ //! - \b COMP_E_INPUT5
+ //! - \b COMP_E_INPUT6
+ //! - \b COMP_E_INPUT7
+ //! - \b COMP_E_INPUT8
+ //! - \b COMP_E_INPUT9
+ //! - \b COMP_E_INPUT10
+ //! - \b COMP_E_INPUT11
+ //! - \b COMP_E_INPUT12
+ //! - \b COMP_E_INPUT13
+ //! - \b COMP_E_INPUT14
+ //! - \b COMP_E_INPUT15
+ //! - \b COMP_E_VREF
+ uint16_t negTerminalInput;
+ //! Controls the output filter delay state, which is either off or enabled
+ //! with a specified delay level. This parameter is device specific and
+ //! delay levels should be found in the device's datasheet.
+ //! \n Valid values are:
+ //! - \b COMP_E_FILTEROUTPUT_OFF [Default]
+ //! - \b COMP_E_FILTEROUTPUT_DLYLVL1
+ //! - \b COMP_E_FILTEROUTPUT_DLYLVL2
+ //! - \b COMP_E_FILTEROUTPUT_DLYLVL3
+ //! - \b COMP_E_FILTEROUTPUT_DLYLVL4
+ uint8_t outputFilterEnableAndDelayLevel;
+ //! Controls if the output will be inverted or not
+ //! \n Valid values are:
+ //! - \b COMP_E_NORMALOUTPUTPOLARITY - indicates the output should be
+ //! normal
+ //! - \b COMP_E_INVERTEDOUTPUTPOLARITY - the output should be inverted
+ uint16_t invertedOutputPolarity;
+} Comp_E_initParam;
+
+
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the
+// outputFilterEnableAndDelayLevel parameter for functions: Comp_E_init(); the
+// param parameter for functions: Comp_E_init().
+//
+//*****************************************************************************
+#define COMP_E_FILTEROUTPUT_OFF 0x00
+#define COMP_E_FILTEROUTPUT_DLYLVL1 (CEF + CEFDLY_0)
+#define COMP_E_FILTEROUTPUT_DLYLVL2 (CEF + CEFDLY_1)
+#define COMP_E_FILTEROUTPUT_DLYLVL3 (CEF + CEFDLY_2)
+#define COMP_E_FILTEROUTPUT_DLYLVL4 (CEF + CEFDLY_3)
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the posTerminalInput
+// parameter for functions: Comp_E_init(); the inputPort parameter for
+// functions: Comp_E_disableInputBuffer(), and Comp_E_enableInputBuffer(); the
+// param parameter for functions: Comp_E_init(), and Comp_E_init(); the
+// negTerminalInput parameter for functions: Comp_E_init().
+//
+//*****************************************************************************
+#define COMP_E_INPUT0 (0x01)
+#define COMP_E_INPUT1 (0x02)
+#define COMP_E_INPUT2 (0x04)
+#define COMP_E_INPUT3 (0x08)
+#define COMP_E_INPUT4 (0x10)
+#define COMP_E_INPUT5 (0x20)
+#define COMP_E_INPUT6 (0x40)
+#define COMP_E_INPUT7 (0x80)
+#define COMP_E_INPUT8 (0x100)
+#define COMP_E_INPUT9 (0x200)
+#define COMP_E_INPUT10 (0x400)
+#define COMP_E_INPUT11 (0x800)
+#define COMP_E_INPUT12 (0x1000)
+#define COMP_E_INPUT13 (0x2000)
+#define COMP_E_INPUT14 (0x4000)
+#define COMP_E_INPUT15 (0x8000)
+#define COMP_E_VREF (0x9F)
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the invertedOutputPolarity
+// parameter for functions: Comp_E_init(); the param parameter for functions:
+// Comp_E_init().
+//
+//*****************************************************************************
+#define COMP_E_NORMALOUTPUTPOLARITY (!(CEOUTPOL))
+#define COMP_E_INVERTEDOUTPUTPOLARITY (CEOUTPOL)
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the
+// supplyVoltageReferenceBase parameter for functions:
+// Comp_E_setReferenceVoltage().
+//
+//*****************************************************************************
+#define COMP_E_REFERENCE_AMPLIFIER_DISABLED (CEREFL_0)
+#define COMP_E_VREFBASE1_2V (CEREFL_1)
+#define COMP_E_VREFBASE2_0V (CEREFL_2)
+#define COMP_E_VREFBASE2_5V (CEREFL_3)
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the referenceAccuracy
+// parameter for functions: Comp_E_setReferenceAccuracy().
+//
+//*****************************************************************************
+#define COMP_E_ACCURACY_STATIC (!CEREFACC)
+#define COMP_E_ACCURACY_CLOCKED (CEREFACC)
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the powerMode parameter for
+// functions: Comp_E_setPowerMode().
+//
+//*****************************************************************************
+#define COMP_E_HIGH_SPEED_MODE (CEPWRMD_0)
+#define COMP_E_NORMAL_MODE (CEPWRMD_1)
+#define COMP_E_ULTRA_LOW_POWER_MODE (CEPWRMD_2)
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the interruptMask parameter
+// for functions: Comp_E_enableInterrupt(), and Comp_E_disableInterrupt().
+//
+//*****************************************************************************
+#define COMP_E_OUTPUT_INTERRUPT (CEIE)
+#define COMP_E_INVERTED_POLARITY_INTERRUPT (CEIIE)
+#define COMP_E_READY_INTERRUPT (CERDYIE)
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the interruptFlagMask
+// parameter for functions: Comp_E_clearInterrupt(), and
+// Comp_E_getInterruptStatus() as well as returned by the
+// Comp_E_getInterruptStatus() function.
+//
+//*****************************************************************************
+#define COMP_E_OUTPUT_INTERRUPT_FLAG (CEIFG)
+#define COMP_E_INTERRUPT_FLAG_INVERTED_POLARITY (CEIIFG)
+#define COMP_E_INTERRUPT_FLAG_READY (CERDYIFG)
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the edgeDirection parameter
+// for functions: Comp_E_setInterruptEdgeDirection().
+//
+//*****************************************************************************
+#define COMP_E_RISINGEDGE (!(CEIES))
+#define COMP_E_FALLINGEDGE (CEIES)
+
+//*****************************************************************************
+//
+// The following are values that can be passed toThe following are values that
+// can be returned by the Comp_E_outputValue() function.
+//
+//*****************************************************************************
+#define COMP_E_LOW (0x0)
+#define COMP_E_HIGH (CEOUT)
+
+//*****************************************************************************
+//
+// Prototypes for the APIs.
+//
+//*****************************************************************************
+
+//*****************************************************************************
+//
+//! \brief Initializes the Comp_E Module.
+//!
+//! Upon successful initialization of the Comp_E module, this function will
+//! have reset all necessary register bits and set the given options in the
+//! registers. To actually use the Comp_E module, the Comp_E_enable() function
+//! must be explicitly called before use. If a Reference Voltage is set to a
+//! terminal, the Voltage should be set using the setReferenceVoltage()
+//! function.
+//!
+//! \param baseAddress is the base address of the COMP_E module.
+//! \param param is the pointer to struct for initialization.
+//!
+//! \return STATUS_SUCCESS or STATUS_FAILURE of the initialization process
+//
+//*****************************************************************************
+extern bool Comp_E_init(uint16_t baseAddress,
+ Comp_E_initParam *param);
+
+//*****************************************************************************
+//
+//! \brief Generates a Reference Voltage to the terminal selected during
+//! initialization.
+//!
+//! Use this function to generate a voltage to serve as a reference to the
+//! terminal selected at initialization. The voltage is determined by the
+//! equation: Vbase * (Numerator / 32). If the upper and lower limit voltage
+//! numerators are equal, then a static reference is defined, whereas they are
+//! different then a hysteresis effect is generated.
+//!
+//! \param baseAddress is the base address of the COMP_E module.
+//! \param supplyVoltageReferenceBase decides the source and max amount of
+//! Voltage that can be used as a reference.
+//! Valid values are:
+//! - \b COMP_E_REFERENCE_AMPLIFIER_DISABLED
+//! - \b COMP_E_VREFBASE1_2V
+//! - \b COMP_E_VREFBASE2_0V
+//! - \b COMP_E_VREFBASE2_5V
+//! \n Modified bits are \b CEREFL of \b CECTL2 register.
+//! \param lowerLimitSupplyVoltageFractionOf32 is the numerator of the equation
+//! to generate the reference voltage for the lower limit reference
+//! voltage.
+//! \n Modified bits are \b CEREF0 of \b CECTL2 register.
+//! \param upperLimitSupplyVoltageFractionOf32 is the numerator of the equation
+//! to generate the reference voltage for the upper limit reference
+//! voltage.
+//! \n Modified bits are \b CEREF1 of \b CECTL2 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void Comp_E_setReferenceVoltage(uint16_t baseAddress,
+ uint16_t supplyVoltageReferenceBase,
+ uint16_t lowerLimitSupplyVoltageFractionOf32,
+ uint16_t upperLimitSupplyVoltageFractionOf32);
+
+//*****************************************************************************
+//
+//! \brief Sets the reference accuracy
+//!
+//! The reference accuracy is set to the desired setting. Clocked is better for
+//! low power operations but has a lower accuracy.
+//!
+//! \param baseAddress is the base address of the COMP_E module.
+//! \param referenceAccuracy is the reference accuracy setting of the COMP_E.
+//! Valid values are:
+//! - \b COMP_E_ACCURACY_STATIC
+//! - \b COMP_E_ACCURACY_CLOCKED - for low power / low accuracy
+//! \n Modified bits are \b CEREFACC of \b CECTL2 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void Comp_E_setReferenceAccuracy(uint16_t baseAddress,
+ uint16_t referenceAccuracy);
+
+//*****************************************************************************
+//
+//! \brief Sets the power mode
+//!
+//! \param baseAddress is the base address of the COMP_E module.
+//! \param powerMode decides the power mode
+//! Valid values are:
+//! - \b COMP_E_HIGH_SPEED_MODE
+//! - \b COMP_E_NORMAL_MODE
+//! - \b COMP_E_ULTRA_LOW_POWER_MODE
+//! \n Modified bits are \b CEPWRMD of \b CECTL1 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void Comp_E_setPowerMode(uint16_t baseAddress,
+ uint16_t powerMode);
+
+//*****************************************************************************
+//
+//! \brief Enables selected Comp_E interrupt sources.
+//!
+//! Enables the indicated Comp_E interrupt sources. Only the sources that are
+//! enabled can be reflected to the processor interrupt; disabled sources have
+//! no effect on the processor. Does not clear interrupt flags.
+//!
+//! \param baseAddress is the base address of the COMP_E module.
+//! \param interruptMask
+//! Mask value is the logical OR of any of the following:
+//! - \b COMP_E_OUTPUT_INTERRUPT - Output interrupt
+//! - \b COMP_E_INVERTED_POLARITY_INTERRUPT - Output interrupt inverted
+//! polarity
+//! - \b COMP_E_READY_INTERRUPT - Ready interrupt
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void Comp_E_enableInterrupt(uint16_t baseAddress,
+ uint16_t interruptMask);
+
+//*****************************************************************************
+//
+//! \brief Disables selected Comp_E interrupt sources.
+//!
+//! Disables the indicated Comp_E interrupt sources. Only the sources that are
+//! enabled can be reflected to the processor interrupt; disabled sources have
+//! no effect on the processor.
+//!
+//! \param baseAddress is the base address of the COMP_E module.
+//! \param interruptMask
+//! Mask value is the logical OR of any of the following:
+//! - \b COMP_E_OUTPUT_INTERRUPT - Output interrupt
+//! - \b COMP_E_INVERTED_POLARITY_INTERRUPT - Output interrupt inverted
+//! polarity
+//! - \b COMP_E_READY_INTERRUPT - Ready interrupt
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void Comp_E_disableInterrupt(uint16_t baseAddress,
+ uint16_t interruptMask);
+
+//*****************************************************************************
+//
+//! \brief Clears Comp_E interrupt flags.
+//!
+//! The Comp_E interrupt source is cleared, so that it no longer asserts. The
+//! highest interrupt flag is automatically cleared when an interrupt vector
+//! generator is used.
+//!
+//! \param baseAddress is the base address of the COMP_E module.
+//! \param interruptFlagMask
+//! Mask value is the logical OR of any of the following:
+//! - \b COMP_E_OUTPUT_INTERRUPT_FLAG - Output interrupt flag
+//! - \b COMP_E_INTERRUPT_FLAG_INVERTED_POLARITY - Output interrupt flag
+//! inverted polarity
+//! - \b COMP_E_INTERRUPT_FLAG_READY - Ready interrupt flag
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void Comp_E_clearInterrupt(uint16_t baseAddress,
+ uint16_t interruptFlagMask);
+
+//*****************************************************************************
+//
+//! \brief Gets the current Comp_E interrupt status.
+//!
+//! This returns the interrupt status for the Comp_E module based on which flag
+//! is passed.
+//!
+//! \param baseAddress is the base address of the COMP_E module.
+//! \param interruptFlagMask
+//! Mask value is the logical OR of any of the following:
+//! - \b COMP_E_OUTPUT_INTERRUPT_FLAG - Output interrupt flag
+//! - \b COMP_E_INTERRUPT_FLAG_INVERTED_POLARITY - Output interrupt flag
+//! inverted polarity
+//! - \b COMP_E_INTERRUPT_FLAG_READY - Ready interrupt flag
+//!
+//! \return Logical OR of any of the following:
+//! - \b COMP_E_OUTPUT_INTERRUPT_FLAG Output interrupt flag
+//! - \b COMP_E_INTERRUPT_FLAG_INVERTED_POLARITY Output interrupt flag
+//! inverted polarity
+//! - \b COMP_E_INTERRUPT_FLAG_READY Ready interrupt flag
+//! \n indicating the status of the masked flags
+//
+//*****************************************************************************
+extern uint8_t Comp_E_getInterruptStatus(uint16_t baseAddress,
+ uint16_t interruptFlagMask);
+
+//*****************************************************************************
+//
+//! \brief Explicitly sets the edge direction that would trigger an interrupt.
+//!
+//! This function will set which direction the output will have to go, whether
+//! rising or falling, to generate an interrupt based on a non-inverted
+//! interrupt.
+//!
+//! \param baseAddress is the base address of the COMP_E module.
+//! \param edgeDirection determines which direction the edge would have to go
+//! to generate an interrupt based on the non-inverted interrupt flag.
+//! Valid values are:
+//! - \b COMP_E_RISINGEDGE [Default] - sets the bit to generate an
+//! interrupt when the output of the Comp_E rises from LOW to HIGH if
+//! the normal interrupt bit is set(and HIGH to LOW if the inverted
+//! interrupt enable bit is set).
+//! - \b COMP_E_FALLINGEDGE - sets the bit to generate an interrupt when
+//! the output of the Comp_E falls from HIGH to LOW if the normal
+//! interrupt bit is set(and LOW to HIGH if the inverted interrupt
+//! enable bit is set).
+//! \n Modified bits are \b CEIES of \b CECTL1 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void Comp_E_setInterruptEdgeDirection(uint16_t baseAddress,
+ uint16_t edgeDirection);
+
+//*****************************************************************************
+//
+//! \brief Toggles the edge direction that would trigger an interrupt.
+//!
+//! This function will toggle which direction the output will have to go,
+//! whether rising or falling, to generate an interrupt based on a non-inverted
+//! interrupt. If the direction was rising, it is now falling, if it was
+//! falling, it is now rising.
+//!
+//! \param baseAddress is the base address of the COMP_E module.
+//!
+//! Modified bits are \b CEIES of \b CECTL1 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void Comp_E_toggleInterruptEdgeDirection(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Turns on the Comp_E module.
+//!
+//! This function sets the bit that enables the operation of the Comp_E module.
+//!
+//! \param baseAddress is the base address of the COMP_E module.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void Comp_E_enable(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Turns off the Comp_E module.
+//!
+//! This function clears the CEON bit disabling the operation of the Comp_E
+//! module, saving from excess power consumption.
+//!
+//! \param baseAddress is the base address of the COMP_E module.
+//!
+//! Modified bits are \b CEON of \b CECTL1 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void Comp_E_disable(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Shorts the two input pins chosen during initialization.
+//!
+//! This function sets the bit that shorts the devices attached to the input
+//! pins chosen from the initialization of the Comp_E.
+//!
+//! \param baseAddress is the base address of the COMP_E module.
+//!
+//! Modified bits are \b CESHORT of \b CECTL1 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void Comp_E_shortInputs(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Disables the short of the two input pins chosen during
+//! initialization.
+//!
+//! This function clears the bit that shorts the devices attached to the input
+//! pins chosen from the initialization of the Comp_E.
+//!
+//! \param baseAddress is the base address of the COMP_E module.
+//!
+//! Modified bits are \b CESHORT of \b CECTL1 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void Comp_E_unshortInputs(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Disables the input buffer of the selected input port to effectively
+//! allow for analog signals.
+//!
+//! This function sets the bit to disable the buffer for the specified input
+//! port to allow for analog signals from any of the Comp_E input pins. This
+//! bit is automatically set when the input is initialized to be used with the
+//! Comp_E module. This function should be used whenever an analog input is
+//! connected to one of these pins to prevent parasitic voltage from causing
+//! unexpected results.
+//!
+//! \param baseAddress is the base address of the COMP_E module.
+//! \param inputPort is the port in which the input buffer will be disabled.
+//! Mask value is the logical OR of any of the following:
+//! - \b COMP_E_INPUT0 [Default]
+//! - \b COMP_E_INPUT1
+//! - \b COMP_E_INPUT2
+//! - \b COMP_E_INPUT3
+//! - \b COMP_E_INPUT4
+//! - \b COMP_E_INPUT5
+//! - \b COMP_E_INPUT6
+//! - \b COMP_E_INPUT7
+//! - \b COMP_E_INPUT8
+//! - \b COMP_E_INPUT9
+//! - \b COMP_E_INPUT10
+//! - \b COMP_E_INPUT11
+//! - \b COMP_E_INPUT12
+//! - \b COMP_E_INPUT13
+//! - \b COMP_E_INPUT14
+//! - \b COMP_E_INPUT15
+//! - \b COMP_E_VREF
+//! \n Modified bits are \b CEPDx of \b CECTL3 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void Comp_E_disableInputBuffer(uint16_t baseAddress,
+ uint16_t inputPort);
+
+//*****************************************************************************
+//
+//! \brief Enables the input buffer of the selected input port to allow for
+//! digital signals.
+//!
+//! This function clears the bit to enable the buffer for the specified input
+//! port to allow for digital signals from any of the Comp_E input pins. This
+//! should not be reset if there is an analog signal connected to the specified
+//! input pin to prevent from unexpected results.
+//!
+//! \param baseAddress is the base address of the COMP_E module.
+//! \param inputPort is the port in which the input buffer will be enabled.
+//! Mask value is the logical OR of any of the following:
+//! - \b COMP_E_INPUT0 [Default]
+//! - \b COMP_E_INPUT1
+//! - \b COMP_E_INPUT2
+//! - \b COMP_E_INPUT3
+//! - \b COMP_E_INPUT4
+//! - \b COMP_E_INPUT5
+//! - \b COMP_E_INPUT6
+//! - \b COMP_E_INPUT7
+//! - \b COMP_E_INPUT8
+//! - \b COMP_E_INPUT9
+//! - \b COMP_E_INPUT10
+//! - \b COMP_E_INPUT11
+//! - \b COMP_E_INPUT12
+//! - \b COMP_E_INPUT13
+//! - \b COMP_E_INPUT14
+//! - \b COMP_E_INPUT15
+//! - \b COMP_E_VREF
+//! \n Modified bits are \b CEPDx of \b CECTL3 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void Comp_E_enableInputBuffer(uint16_t baseAddress,
+ uint16_t inputPort);
+
+//*****************************************************************************
+//
+//! \brief Toggles the bit that swaps which terminals the inputs go to, while
+//! also inverting the output of the Comp_E.
+//!
+//! This function toggles the bit that controls which input goes to which
+//! terminal. After initialization, this bit is set to 0, after toggling it
+//! once the inputs are routed to the opposite terminal and the output is
+//! inverted.
+//!
+//! \param baseAddress is the base address of the COMP_E module.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void Comp_E_swapIO(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Returns the output value of the Comp_E module.
+//!
+//! Returns the output value of the Comp_E module.
+//!
+//! \param baseAddress is the base address of the COMP_E module.
+//!
+//! \return One of the following:
+//! - \b COMP_E_LOW
+//! - \b COMP_E_HIGH
+//! \n indicating the output value of the Comp_E module
+//
+//*****************************************************************************
+extern uint16_t Comp_E_outputValue(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+// Mark the end of the C bindings section for C++ compilers.
+//
+//*****************************************************************************
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+#endif // __MSP430WARE_COMP_E_H__
diff --git a/Apps/FlightSoftware/MotorControl/driverlib/crc.c b/Apps/FlightSoftware/MotorControl/driverlib/crc.c
new file mode 100644
index 000000000..6b1bd6718
--- /dev/null
+++ b/Apps/FlightSoftware/MotorControl/driverlib/crc.c
@@ -0,0 +1,103 @@
+/* --COPYRIGHT--,BSD
+ * Copyright (c) 2017, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * --/COPYRIGHT--*/
+//*****************************************************************************
+//
+// crc.c - Driver for the crc Module.
+//
+//*****************************************************************************
+
+//*****************************************************************************
+//
+//! \addtogroup crc_api crc
+//! @{
+//
+//*****************************************************************************
+
+#include "inc/hw_memmap.h"
+
+#ifdef __MSP430_HAS_CRC__
+#include "crc.h"
+
+#include
+
+void CRC_setSeed (uint16_t baseAddress,
+ uint16_t seed)
+{
+ HWREG16(baseAddress + OFS_CRCINIRES) = seed;
+}
+
+void CRC_set16BitData (uint16_t baseAddress,
+ uint16_t dataIn)
+{
+ HWREG16(baseAddress + OFS_CRCDI) = dataIn;
+}
+
+void CRC_set8BitData (uint16_t baseAddress,
+ uint8_t dataIn)
+{
+ HWREG8(baseAddress + OFS_CRCDI_L) = dataIn;
+}
+
+void CRC_set16BitDataReversed (uint16_t baseAddress,
+ uint16_t dataIn)
+{
+ HWREG16(baseAddress + OFS_CRCDIRB) = dataIn;
+}
+
+void CRC_set8BitDataReversed (uint16_t baseAddress,
+ uint8_t dataIn)
+{
+ HWREG8(baseAddress + OFS_CRCDIRB_L) = dataIn;
+}
+
+uint16_t CRC_getData (uint16_t baseAddress)
+{
+ return ( HWREG16(baseAddress + OFS_CRCDI) );
+}
+
+uint16_t CRC_getResult (uint16_t baseAddress)
+{
+ return ( HWREG16(baseAddress + OFS_CRCINIRES) );
+}
+
+uint16_t CRC_getResultBitsReversed (uint16_t baseAddress)
+{
+ return ( HWREG16(baseAddress + OFS_CRCRESR) );
+}
+
+#endif
+//*****************************************************************************
+//
+//! Close the doxygen group for crc_api
+//! @}
+//
+//*****************************************************************************
diff --git a/Apps/FlightSoftware/MotorControl/driverlib/crc.h b/Apps/FlightSoftware/MotorControl/driverlib/crc.h
new file mode 100644
index 000000000..3e7193291
--- /dev/null
+++ b/Apps/FlightSoftware/MotorControl/driverlib/crc.h
@@ -0,0 +1,209 @@
+/* --COPYRIGHT--,BSD
+ * Copyright (c) 2017, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * --/COPYRIGHT--*/
+//*****************************************************************************
+//
+// crc.h - Driver for the CRC Module.
+//
+//*****************************************************************************
+
+#ifndef __MSP430WARE_CRC_H__
+#define __MSP430WARE_CRC_H__
+
+#include "inc/hw_memmap.h"
+
+#ifdef __MSP430_HAS_CRC__
+
+//*****************************************************************************
+//
+// If building with a C++ compiler, make all of the definitions in this header
+// have a C binding.
+//
+//*****************************************************************************
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+//*****************************************************************************
+//
+// Prototypes for the APIs.
+//
+//*****************************************************************************
+
+//*****************************************************************************
+//
+//! \brief Sets the seed for the CRC.
+//!
+//! This function sets the seed for the CRC to begin generating a signature
+//! with the given seed and all passed data. Using this function resets the CRC
+//! signature.
+//!
+//! \param baseAddress is the base address of the CRC module.
+//! \param seed is the seed for the CRC to start generating a signature from.
+//! \n Modified bits are \b CRCINIRES of \b CRCINIRES register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void CRC_setSeed(uint16_t baseAddress,
+ uint16_t seed);
+
+//*****************************************************************************
+//
+//! \brief Sets the 16 bit data to add into the CRC module to generate a new
+//! signature.
+//!
+//! This function sets the given data into the CRC module to generate the new
+//! signature from the current signature and new data.
+//!
+//! \param baseAddress is the base address of the CRC module.
+//! \param dataIn is the data to be added, through the CRC module, to the
+//! signature.
+//! \n Modified bits are \b CRCDI of \b CRCDI register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void CRC_set16BitData(uint16_t baseAddress,
+ uint16_t dataIn);
+
+//*****************************************************************************
+//
+//! \brief Sets the 8 bit data to add into the CRC module to generate a new
+//! signature.
+//!
+//! This function sets the given data into the CRC module to generate the new
+//! signature from the current signature and new data.
+//!
+//! \param baseAddress is the base address of the CRC module.
+//! \param dataIn is the data to be added, through the CRC module, to the
+//! signature.
+//! \n Modified bits are \b CRCDI of \b CRCDI register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void CRC_set8BitData(uint16_t baseAddress,
+ uint8_t dataIn);
+
+//*****************************************************************************
+//
+//! \brief Translates the 16 bit data by reversing the bits in each byte and
+//! then sets this data to add into the CRC module to generate a new signature.
+//!
+//! This function first reverses the bits in each byte of the data and then
+//! generates the new signature from the current signature and new translated
+//! data.
+//!
+//! \param baseAddress is the base address of the CRC module.
+//! \param dataIn is the data to be added, through the CRC module, to the
+//! signature.
+//! \n Modified bits are \b CRCDIRB of \b CRCDIRB register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void CRC_set16BitDataReversed(uint16_t baseAddress,
+ uint16_t dataIn);
+
+//*****************************************************************************
+//
+//! \brief Translates the 8 bit data by reversing the bits in each byte and
+//! then sets this data to add into the CRC module to generate a new signature.
+//!
+//! This function first reverses the bits in each byte of the data and then
+//! generates the new signature from the current signature and new translated
+//! data.
+//!
+//! \param baseAddress is the base address of the CRC module.
+//! \param dataIn is the data to be added, through the CRC module, to the
+//! signature.
+//! \n Modified bits are \b CRCDIRB of \b CRCDIRB register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void CRC_set8BitDataReversed(uint16_t baseAddress,
+ uint8_t dataIn);
+
+//*****************************************************************************
+//
+//! \brief Returns the value currently in the Data register.
+//!
+//! This function returns the value currently in the data register. If set in
+//! byte bits reversed format, then the translated data would be returned.
+//!
+//! \param baseAddress is the base address of the CRC module.
+//!
+//! \return The value currently in the data register
+//
+//*****************************************************************************
+extern uint16_t CRC_getData(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Returns the value pf the Signature Result.
+//!
+//! This function returns the value of the signature result generated by the
+//! CRC.
+//!
+//! \param baseAddress is the base address of the CRC module.
+//!
+//! \return The value currently in the data register
+//
+//*****************************************************************************
+extern uint16_t CRC_getResult(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Returns the bit-wise reversed format of the Signature Result.
+//!
+//! This function returns the bit-wise reversed format of the Signature Result.
+//!
+//! \param baseAddress is the base address of the CRC module.
+//!
+//! \return The bit-wise reversed format of the Signature Result
+//
+//*****************************************************************************
+extern uint16_t CRC_getResultBitsReversed(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+// Mark the end of the C bindings section for C++ compilers.
+//
+//*****************************************************************************
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+#endif // __MSP430WARE_CRC_H__
diff --git a/Apps/FlightSoftware/MotorControl/driverlib/crc32.c b/Apps/FlightSoftware/MotorControl/driverlib/crc32.c
new file mode 100644
index 000000000..6583abb40
--- /dev/null
+++ b/Apps/FlightSoftware/MotorControl/driverlib/crc32.c
@@ -0,0 +1,157 @@
+/* --COPYRIGHT--,BSD
+ * Copyright (c) 2017, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * --/COPYRIGHT--*/
+//*****************************************************************************
+//
+// crc32.c - Driver for the crc32 Module.
+//
+//*****************************************************************************
+
+//*****************************************************************************
+//
+//! \addtogroup crc32_api crc32
+//! @{
+//
+//*****************************************************************************
+
+#include "inc/hw_memmap.h"
+
+#ifdef __MSP430_HAS_CRC32__
+#include "crc32.h"
+
+#include
+
+void CRC32_setSeed(uint32_t seed, uint8_t crcMode)
+{
+ if (CRC16_MODE == crcMode) {
+ HWREG16(CRC32_BASE + OFS_CRC16INIRESW0) = seed;
+ }
+ else
+ {
+ HWREG16(CRC32_BASE + OFS_CRC32INIRESW1) = ((seed & 0xFFFF0000)
+ >> 16);
+ HWREG16(CRC32_BASE + OFS_CRC32INIRESW0) = (seed & 0xFFFF);
+ }
+}
+
+void CRC32_set8BitData(uint8_t dataIn, uint8_t crcMode)
+{
+ if (CRC16_MODE == crcMode) {
+ HWREG8(CRC32_BASE + OFS_CRC16DIW0_L) = dataIn;
+ }
+ else {
+ HWREG8(CRC32_BASE + OFS_CRC32DIW0_L) = dataIn;
+ }
+}
+
+void CRC32_set16BitData(uint16_t dataIn, uint8_t crcMode)
+{
+ if (CRC16_MODE == crcMode) {
+ HWREG16(CRC32_BASE + OFS_CRC16DIW0) = dataIn;
+ }
+ else {
+ HWREG16(CRC32_BASE + OFS_CRC32DIW0) = dataIn;
+ }
+
+}
+
+void CRC32_set32BitData(uint32_t dataIn)
+{
+
+ HWREG16(CRC32_BASE + OFS_CRC32DIW0) = dataIn & 0xFFFF;
+ HWREG16(CRC32_BASE + OFS_CRC32DIW1) = (uint16_t) ((dataIn & 0xFFFF0000)
+ >> 16);
+}
+
+void CRC32_set8BitDataReversed(uint8_t dataIn, uint8_t crcMode)
+{
+
+ if (CRC16_MODE == crcMode) {
+ HWREG8(CRC32_BASE + OFS_CRC16DIRBW0_L) = dataIn;
+ } else {
+ HWREG8(CRC32_BASE + OFS_CRC32DIRBW1_L) = dataIn;
+ }
+}
+
+void CRC32_set16BitDataReversed(uint16_t dataIn, uint8_t crcMode)
+{
+
+ if (CRC16_MODE == crcMode) {
+ HWREG16(CRC32_BASE + OFS_CRC16DIRBW0) = dataIn;
+ } else {
+ HWREG16(CRC32_BASE + OFS_CRC32DIRBW1) = dataIn;
+ }
+}
+
+void CRC32_set32BitDataReversed(uint32_t dataIn)
+{
+ HWREG16(CRC32_BASE + OFS_CRC32DIRBW1) = dataIn & 0xFFFF;
+ HWREG16(CRC32_BASE + OFS_CRC32DIRBW0) = (uint16_t) ((dataIn & 0xFFFF0000)
+ >> 16);
+}
+
+uint32_t CRC32_getResult(uint8_t crcMode)
+{
+ if (CRC16_MODE == crcMode) {
+ return (HWREG16(CRC32_BASE + OFS_CRC16INIRESW0) );
+ }
+ else
+ {
+ uint32_t result = 0;
+ result = HWREG16(CRC32_BASE + OFS_CRC32INIRESW1);
+ result = (result << 16);
+ result |= HWREG16(CRC32_BASE + OFS_CRC32INIRESW0);
+ return (result);
+ }
+}
+
+uint32_t CRC32_getResultReversed(uint8_t crcMode)
+{
+ if (CRC16_MODE == crcMode) {
+ return (HWREG16(CRC32_BASE + OFS_CRC16RESRW0) );
+ }
+ else
+ {
+ uint32_t result = 0;
+ result = HWREG16(CRC32_BASE + OFS_CRC32RESRW0);
+ result = (result << 16);
+ result |= HWREG16(CRC32_BASE + OFS_CRC32RESRW1);
+ return (result);
+ }
+}
+
+#endif
+//*****************************************************************************
+//
+//! Close the doxygen group for crc32_api
+//! @}
+//
+//*****************************************************************************
diff --git a/Apps/FlightSoftware/MotorControl/driverlib/crc32.h b/Apps/FlightSoftware/MotorControl/driverlib/crc32.h
new file mode 100644
index 000000000..b7ce136e8
--- /dev/null
+++ b/Apps/FlightSoftware/MotorControl/driverlib/crc32.h
@@ -0,0 +1,263 @@
+/* --COPYRIGHT--,BSD
+ * Copyright (c) 2017, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * --/COPYRIGHT--*/
+//*****************************************************************************
+//
+// crc32.h - Driver for the CRC32 Module.
+//
+//*****************************************************************************
+
+#ifndef __MSP430WARE_CRC32_H__
+#define __MSP430WARE_CRC32_H__
+
+#include "inc/hw_memmap.h"
+
+#ifdef __MSP430_HAS_CRC32__
+
+//*****************************************************************************
+//
+// If building with a C++ compiler, make all of the definitions in this header
+// have a C binding.
+//
+//*****************************************************************************
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the crcMode parameter for
+// functions: CRC32_setSeed(), CRC32_getResult(), CRC32_getResultReversed(),
+// CRC32_set8BitDataReversed(), CRC32_set16BitDataReversed(),
+// CRC32_set8BitData(), and CRC32_set16BitData().
+//
+//*****************************************************************************
+#define CRC32_MODE (0x01)
+#define CRC16_MODE (0x00)
+
+//*****************************************************************************
+//
+// Prototypes for the APIs.
+//
+//*****************************************************************************
+
+//*****************************************************************************
+//
+//! \brief Sets the seed for the CRC32.
+//!
+//! This function sets the seed for the CRC32 to begin generating a signature
+//! with the given seed and all passed data. Using this function resets the
+//! CRC32 signature.
+//!
+//! \param seed is the seed for the CRC32 to start generating a signature from.
+//! \n Modified bits are \b CRC32INIRESL0 of \b CRC32INIRESL0 register.
+//! \param crcMode selects the mode of operation for the CRC32
+//! Valid values are:
+//! - \b CRC32_MODE - 32 Bit Mode
+//! - \b CRC16_MODE - 16 Bit Mode
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void CRC32_setSeed(uint32_t seed,
+ uint8_t crcMode);
+
+//*****************************************************************************
+//
+//! \brief Sets the 8 bit data to add into the CRC32 module to generate a new
+//! signature.
+//!
+//! This function sets the given data into the CRC32 module to generate the new
+//! signature from the current signature and new data. Bit 0 is treated as the
+//! LSB.
+//!
+//! \param dataIn is the data to be added, through the CRC32 module, to the
+//! signature.
+//! \param crcMode selects the mode of operation for the CRC32
+//! Valid values are:
+//! - \b CRC32_MODE - 32 Bit Mode
+//! - \b CRC16_MODE - 16 Bit Mode
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void CRC32_set8BitData(uint8_t dataIn,
+ uint8_t crcMode);
+
+//*****************************************************************************
+//
+//! \brief Sets the 16 bit data to add into the CRC32 module to generate a new
+//! signature.
+//!
+//! This function sets the given data into the CRC32 module to generate the new
+//! signature from the current signature and new data. Bit 0 is treated as the
+//! LSB.
+//!
+//! \param dataIn is the data to be added, through the CRC32 module, to the
+//! signature.
+//! \param crcMode selects the mode of operation for the CRC32
+//! Valid values are:
+//! - \b CRC32_MODE - 32 Bit Mode
+//! - \b CRC16_MODE - 16 Bit Mode
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void CRC32_set16BitData(uint16_t dataIn,
+ uint8_t crcMode);
+
+//*****************************************************************************
+//
+//! \brief Sets the 32 bit data to add into the CRC32 module to generate a new
+//! signature.
+//!
+//! This function sets the given data into the CRC32 module to generate the new
+//! signature from the current signature and new data. Bit 0 is treated as the
+//! LSB.
+//!
+//! \param dataIn is the data to be added, through the CRC32 module, to the
+//! signature.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void CRC32_set32BitData(uint32_t dataIn);
+
+//*****************************************************************************
+//
+//! \brief Translates the data by reversing the bits in each 8 bit data and
+//! then sets this data to add into the CRC32 module to generate a new
+//! signature.
+//!
+//! This function first reverses the bits in each byte of the data and then
+//! generates the new signature from the current signature and new translated
+//! data. Bit 0 is treated as the MSB.
+//!
+//! \param dataIn is the data to be added, through the CRC32 module, to the
+//! signature.
+//! \param crcMode selects the mode of operation for the CRC32
+//! Valid values are:
+//! - \b CRC32_MODE - 32 Bit Mode
+//! - \b CRC16_MODE - 16 Bit Mode
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void CRC32_set8BitDataReversed(uint8_t dataIn,
+ uint8_t crcMode);
+
+//*****************************************************************************
+//
+//! \brief Translates the data by reversing the bits in each 16 bit data and
+//! then sets this data to add into the CRC32 module to generate a new
+//! signature.
+//!
+//! This function first reverses the bits in each byte of the data and then
+//! generates the new signature from the current signature and new translated
+//! data. Bit 0 is treated as the MSB.
+//!
+//! \param dataIn is the data to be added, through the CRC32 module, to the
+//! signature.
+//! \param crcMode selects the mode of operation for the CRC32
+//! Valid values are:
+//! - \b CRC32_MODE - 32 Bit Mode
+//! - \b CRC16_MODE - 16 Bit Mode
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void CRC32_set16BitDataReversed(uint16_t dataIn,
+ uint8_t crcMode);
+
+//*****************************************************************************
+//
+//! \brief Translates the data by reversing the bits in each 32 bit data and
+//! then sets this data to add into the CRC32 module to generate a new
+//! signature.
+//!
+//! This function first reverses the bits in each byte of the data and then
+//! generates the new signature from the current signature and new translated
+//! data. Bit 0 is treated as the MSB.
+//!
+//! \param dataIn is the data to be added, through the CRC32 module, to the
+//! signature.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void CRC32_set32BitDataReversed(uint32_t dataIn);
+
+//*****************************************************************************
+//
+//! \brief Returns the value of the signature result.
+//!
+//! This function returns the value of the signature result generated by the
+//! CRC32. Bit 0 is treated as LSB.
+//!
+//! \param crcMode selects the mode of operation for the CRC32
+//! Valid values are:
+//! - \b CRC32_MODE - 32 Bit Mode
+//! - \b CRC16_MODE - 16 Bit Mode
+//!
+//! \return The signature result
+//
+//*****************************************************************************
+extern uint32_t CRC32_getResult(uint8_t crcMode);
+
+//*****************************************************************************
+//
+//! \brief Returns the bit-wise reversed format of the 32 bit signature result.
+//!
+//! This function returns the bit-wise reversed format of the signature result.
+//! Bit 0 is treated as MSB.
+//!
+//! \param crcMode selects the mode of operation for the CRC32
+//! Valid values are:
+//! - \b CRC32_MODE - 32 Bit Mode
+//! - \b CRC16_MODE - 16 Bit Mode
+//!
+//! \return The bit-wise reversed format of the signature result
+//
+//*****************************************************************************
+extern uint32_t CRC32_getResultReversed(uint8_t crcMode);
+
+//*****************************************************************************
+//
+// Mark the end of the C bindings section for C++ compilers.
+//
+//*****************************************************************************
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+#endif // __MSP430WARE_CRC32_H__
diff --git a/Apps/FlightSoftware/MotorControl/driverlib/cs.c b/Apps/FlightSoftware/MotorControl/driverlib/cs.c
new file mode 100644
index 000000000..5e16538ca
--- /dev/null
+++ b/Apps/FlightSoftware/MotorControl/driverlib/cs.c
@@ -0,0 +1,996 @@
+/* --COPYRIGHT--,BSD
+ * Copyright (c) 2017, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * --/COPYRIGHT--*/
+//*****************************************************************************
+//
+// cs.c - Driver for the cs Module.
+//
+//*****************************************************************************
+
+//*****************************************************************************
+//
+//! \addtogroup cs_api cs
+//! @{
+//
+//*****************************************************************************
+
+#include "inc/hw_memmap.h"
+
+#if defined(__MSP430_HAS_CS__) || defined(__MSP430_HAS_SFR__)
+#include "cs.h"
+
+#include
+
+//*****************************************************************************
+//
+// The following value is used by CS_getACLK, CS_getSMCLK, CS_getMCLK to
+// determine the operating frequency based on the available DCO frequencies.
+//
+//*****************************************************************************
+#define CS_DCO_FREQ_1 1000000
+#define CS_DCO_FREQ_2 2670000
+#define CS_DCO_FREQ_3 3330000
+#define CS_DCO_FREQ_4 4000000
+#define CS_DCO_FREQ_5 5330000
+#define CS_DCO_FREQ_6 6670000
+#define CS_DCO_FREQ_7 8000000
+#define CS_DCO_FREQ_8 16000000
+#define CS_DCO_FREQ_9 20000000
+#define CS_DCO_FREQ_10 24000000
+
+//*****************************************************************************
+//
+// Internal very low power VLOCLK, low frequency oscillator with 10kHz typical
+// frequency, internal low-power oscillator MODCLK with 5 MHz typical
+// frequency and LFMODCLK is MODCLK divided by 128.
+//
+//*****************************************************************************
+#define CS_VLOCLK_FREQUENCY 10000
+#define CS_MODCLK_FREQUENCY 5000000
+#define CS_LFMODCLK_FREQUENCY 39062
+
+//*****************************************************************************
+//
+// The following value is used by CS_XT1Start, CS_bypassXT1,
+// CS_XT1StartWithTimeout, CS_bypassXT1WithTimeout to properly set
+// the XTS bit. This frequency threshold is specified in the User's Guide.
+//
+//*****************************************************************************
+#define LFXT_FREQUENCY_THRESHOLD 50000
+
+//*****************************************************************************
+//
+// LFXT crystal frequency. Should be set with
+// CS_externalClockSourceInit if LFXT is used and user intends to invoke
+// CS_getSMCLK, CS_getMCLK, CS_getACLK and
+// CS_turnOnLFXT, CS_LFXTByPass, CS_turnOnLFXTWithTimeout,
+// CS_LFXTByPassWithTimeout.
+//
+//*****************************************************************************
+static uint32_t privateLFXTClockFrequency = 0;
+
+//*****************************************************************************
+//
+// The HFXT crystal frequency. Should be set with
+// CS_externalClockSourceInit if HFXT is used and user intends to invoke
+// CS_getSMCLK, CS_getMCLK, CS_getACLK,
+// CS_turnOnLFXT, CS_LFXTByPass, CS_turnOnLFXTWithTimeout,
+// CS_LFXTByPassWithTimeout.
+//
+//*****************************************************************************
+static uint32_t privateHFXTClockFrequency = 0;
+
+static uint32_t privateCSASourceClockFromDCO (uint8_t clockdivider)
+{
+ uint32_t CLKFrequency = 0;
+
+ if (HWREG16(CS_BASE + OFS_CSCTL1)& DCORSEL) {
+ switch(HWREG16(CS_BASE + OFS_CSCTL1) & DCOFSEL_7) {
+ case DCOFSEL_0:
+ CLKFrequency=CS_DCO_FREQ_1/clockdivider;
+ break;
+ case DCOFSEL_1:
+ CLKFrequency=CS_DCO_FREQ_5/clockdivider;
+ break;
+ case DCOFSEL_2:
+ CLKFrequency=CS_DCO_FREQ_6/clockdivider;
+ break;
+ case DCOFSEL_3:
+ CLKFrequency=CS_DCO_FREQ_7/clockdivider;
+ break;
+ case DCOFSEL_4:
+ CLKFrequency=CS_DCO_FREQ_8/clockdivider;
+ break;
+ case DCOFSEL_5:
+ CLKFrequency=CS_DCO_FREQ_9/clockdivider;
+ break;
+ case DCOFSEL_6:
+ case DCOFSEL_7:
+ CLKFrequency=CS_DCO_FREQ_10/clockdivider;
+ break;
+ default:
+ CLKFrequency=0;
+ break;
+ }
+ }
+ else {
+ switch(HWREG16(CS_BASE + OFS_CSCTL1) & DCOFSEL_7) {
+ case DCOFSEL_0:
+ CLKFrequency=CS_DCO_FREQ_1/clockdivider;
+ break;
+ case DCOFSEL_1:
+ CLKFrequency=CS_DCO_FREQ_2/clockdivider;
+ break;
+ case DCOFSEL_2:
+ CLKFrequency=CS_DCO_FREQ_3/clockdivider;
+ break;
+ case DCOFSEL_3:
+ CLKFrequency=CS_DCO_FREQ_4/clockdivider;
+ break;
+ case DCOFSEL_4:
+ CLKFrequency=CS_DCO_FREQ_5/clockdivider;
+ break;
+ case DCOFSEL_5:
+ CLKFrequency=CS_DCO_FREQ_6/clockdivider;
+ break;
+ case DCOFSEL_6:
+ case DCOFSEL_7:
+ CLKFrequency=CS_DCO_FREQ_7/clockdivider;
+ break;
+ default:
+ CLKFrequency=0;
+ break;
+ }
+
+ }
+
+ return (CLKFrequency);
+}
+
+static uint32_t privateCSAComputeCLKFrequency (uint16_t CLKSource,
+ uint16_t CLKSourceDivider
+ )
+{
+ uint32_t CLKFrequency = 0;
+ uint8_t CLKSourceFrequencyDivider = 1;
+ uint8_t i = 0;
+
+ //Determine Frequency divider
+ for ( i = 0; i < CLKSourceDivider; i++) {
+ CLKSourceFrequencyDivider *= 2;
+ }
+
+ //Unlock CS control register
+ HWREG16(CS_BASE + OFS_CSCTL0) = CSKEY;
+
+ //Determine clock source based on CLKSource
+ switch (CLKSource) {
+
+ //If LFXT is selected as clock source
+ case SELM__LFXTCLK:
+ CLKFrequency = (privateLFXTClockFrequency /
+ CLKSourceFrequencyDivider);
+
+ //Check if LFXTOFFG is not set. If fault flag is set
+ //VLO is used as source clock
+ if (HWREG8(CS_BASE + OFS_CSCTL5) & LFXTOFFG) {
+ HWREG8(CS_BASE + OFS_CSCTL5) &= ~(LFXTOFFG);
+ //Clear OFIFG fault flag
+ HWREG8(SFR_BASE + OFS_SFRIFG1) &= ~OFIFG;
+
+ if (HWREG8(CS_BASE + OFS_CSCTL5) & LFXTOFFG) {
+ CLKFrequency = CS_LFMODCLK_FREQUENCY;
+ }
+ }
+ break;
+
+ case SELM__VLOCLK:
+ CLKFrequency =
+ (CS_VLOCLK_FREQUENCY / CLKSourceFrequencyDivider);
+ break;
+
+ case SELM__LFMODOSC:
+ CLKFrequency =
+ (CS_LFMODCLK_FREQUENCY / CLKSourceFrequencyDivider);
+
+ break;
+
+ case SELM__DCOCLK:
+ CLKFrequency =
+ privateCSASourceClockFromDCO( CLKSourceFrequencyDivider);
+
+ break;
+
+ case SELM__MODOSC:
+ CLKFrequency =
+ (CS_MODCLK_FREQUENCY / CLKSourceFrequencyDivider);
+
+ break;
+
+ case SELM__HFXTCLK:
+ CLKFrequency =
+ (privateHFXTClockFrequency / CLKSourceFrequencyDivider);
+
+ if (HWREG8(CS_BASE + OFS_CSCTL5) & HFXTOFFG) {
+
+ HWREG8(CS_BASE + OFS_CSCTL5) &= ~HFXTOFFG;
+ //Clear OFIFG fault flag
+ HWREG8(SFR_BASE + OFS_SFRIFG1) &= ~OFIFG;
+ }
+
+ if (HWREG8(CS_BASE + OFS_CSCTL5) & HFXTOFFG) {
+ CLKFrequency = CS_MODCLK_FREQUENCY;
+ }
+ break;
+ }
+
+ //Lock CS control register
+ HWREG8(CS_BASE + OFS_CSCTL0_H) = 0x00;
+
+ return (CLKFrequency);
+}
+
+void CS_setExternalClockSource (uint32_t LFXTCLK_frequency,
+ uint32_t HFXTCLK_frequency
+ )
+{
+ privateLFXTClockFrequency = LFXTCLK_frequency;
+ privateHFXTClockFrequency = HFXTCLK_frequency;
+}
+
+void CS_initClockSignal (uint8_t selectedClockSignal,
+ uint16_t clockSource,
+ uint16_t clockSourceDivider
+ )
+{
+
+ //Verify User has selected a valid Frequency divider
+ assert(
+ (CS_CLOCK_DIVIDER_1 == clockSourceDivider) ||
+ (CS_CLOCK_DIVIDER_2 == clockSourceDivider) ||
+ (CS_CLOCK_DIVIDER_4 == clockSourceDivider) ||
+ (CS_CLOCK_DIVIDER_8 == clockSourceDivider) ||
+ (CS_CLOCK_DIVIDER_16 == clockSourceDivider) ||
+ (CS_CLOCK_DIVIDER_32 == clockSourceDivider)
+ );
+
+ //Unlock CS control register
+ HWREG16(CS_BASE + OFS_CSCTL0) = CSKEY;
+
+ uint16_t temp = HWREG16(CS_BASE + OFS_CSCTL3);
+ switch (selectedClockSignal) {
+ case CS_ACLK:
+ assert(
+ (CS_LFXTCLK_SELECT == clockSource) ||
+ (CS_VLOCLK_SELECT == clockSource) ||
+ (CS_LFMODOSC_SELECT == clockSource)
+ );
+
+ clockSourceDivider = clockSourceDivider << 8;
+ clockSource = clockSource << 8;
+
+ HWREG16(CS_BASE + OFS_CSCTL2) &= ~(SELA_7);
+ HWREG16(CS_BASE + OFS_CSCTL2) |= (clockSource);
+ HWREG16(CS_BASE + OFS_CSCTL3) = temp & ~(DIVA0 + DIVA1 + DIVA2) |
+ clockSourceDivider;
+ break;
+ case CS_SMCLK:
+ assert(
+ (CS_LFXTCLK_SELECT == clockSource) ||
+ (CS_VLOCLK_SELECT == clockSource) ||
+ (CS_DCOCLK_SELECT == clockSource) ||
+ (CS_HFXTCLK_SELECT == clockSource) ||
+ (CS_LFMODOSC_SELECT== clockSource) ||
+ (CS_MODOSC_SELECT == clockSource)
+ );
+
+ clockSource = clockSource << 4;
+ clockSourceDivider = clockSourceDivider << 4;
+
+ HWREG16(CS_BASE + OFS_CSCTL2) &= ~(SELS_7);
+ HWREG16(CS_BASE + OFS_CSCTL2) |= clockSource;
+ HWREG16(CS_BASE + OFS_CSCTL3) = temp & ~(DIVS0 + DIVS1 + DIVS2) |
+ clockSourceDivider;
+ break;
+ case CS_MCLK:
+ assert(
+ (CS_LFXTCLK_SELECT == clockSource) ||
+ (CS_VLOCLK_SELECT == clockSource) ||
+ (CS_DCOCLK_SELECT == clockSource) ||
+ (CS_HFXTCLK_SELECT == clockSource) ||
+ (CS_LFMODOSC_SELECT== clockSource) ||
+ (CS_MODOSC_SELECT == clockSource)
+ );
+
+ HWREG16(CS_BASE + OFS_CSCTL2) &= ~(SELM_7);
+ HWREG16(CS_BASE + OFS_CSCTL2) |= clockSource;
+ HWREG16(CS_BASE + OFS_CSCTL3) = temp & ~(DIVM0 + DIVM1 + DIVM2) |
+ clockSourceDivider;
+ break;
+ }
+
+ //Lock CS control register
+ HWREG8(CS_BASE + OFS_CSCTL0_H) = 0x00;
+}
+
+void CS_turnOnLFXT (uint16_t lfxtdrive
+ )
+{
+ assert(privateLFXTClockFrequency != 0);
+
+ assert((lfxtdrive == CS_LFXT_DRIVE_0 ) ||
+ (lfxtdrive == CS_LFXT_DRIVE_1 ) ||
+ (lfxtdrive == CS_LFXT_DRIVE_2 ) ||
+ (lfxtdrive == CS_LFXT_DRIVE_3 ));
+
+ //Unlock CS control register
+ HWREG16(CS_BASE + OFS_CSCTL0) = CSKEY;
+
+ //Switch ON LFXT oscillator
+ HWREG16(CS_BASE + OFS_CSCTL4) &= ~LFXTOFF;
+
+ //Highest drive setting for LFXTstartup
+ HWREG16(CS_BASE + OFS_CSCTL4_L) |= LFXTDRIVE1_L + LFXTDRIVE0_L;
+
+ HWREG16(CS_BASE + OFS_CSCTL4) &= ~LFXTBYPASS;
+
+ //Wait for Crystal to stabilize
+ while (HWREG8(CS_BASE + OFS_CSCTL5) & LFXTOFFG)
+ {
+ //Clear OSC flaut Flags fault flags
+ HWREG8(CS_BASE + OFS_CSCTL5) &= ~(LFXTOFFG);
+
+ //Clear OFIFG fault flag
+ HWREG8(SFR_BASE + OFS_SFRIFG1) &= ~OFIFG;
+ }
+
+ //Set requested Drive mode
+ HWREG16(CS_BASE + OFS_CSCTL4) = ( HWREG16(CS_BASE + OFS_CSCTL4) &
+ ~(LFXTDRIVE_3)
+ ) |
+ (lfxtdrive);
+
+ //Lock CS control register
+ HWREG8(CS_BASE + OFS_CSCTL0_H) = 0x00;
+}
+
+void CS_turnOffSMCLK(void)
+{
+ //Unlock CS control register
+ HWREG16(CS_BASE + OFS_CSCTL0) = CSKEY;
+
+ HWREG16(CS_BASE + OFS_CSCTL4) |= SMCLKOFF;
+
+ //Lock CS control register
+ HWREG8(CS_BASE + OFS_CSCTL0_H) = 0x00;
+}
+void CS_turnOnSMCLK(void)
+{
+ //Unlock CS control register
+ HWREG16(CS_BASE + OFS_CSCTL0) = CSKEY;
+
+ HWREG16(CS_BASE + OFS_CSCTL4) &= ~SMCLKOFF;
+
+ //Lock CS control register
+ HWREG8(CS_BASE + OFS_CSCTL0_H) = 0x00;
+}
+void CS_bypassLFXT (void)
+{
+ //Verify user has set frequency of LFXT with SetExternalClockSource
+ assert(privateLFXTClockFrequency != 0);
+
+ //Unlock CS control register
+ HWREG16(CS_BASE + OFS_CSCTL0) = CSKEY;
+
+ assert(privateLFXTClockFrequency < LFXT_FREQUENCY_THRESHOLD);
+
+ //Set LFXT in LF mode Switch off LFXT oscillator and enable BYPASS mode
+ HWREG16(CS_BASE + OFS_CSCTL4) |= (LFXTBYPASS + LFXTOFF);
+
+ //Wait until LFXT stabilizes
+ while (HWREG8(CS_BASE + OFS_CSCTL5) & LFXTOFFG)
+ {
+ //Clear OSC flaut Flags fault flags
+ HWREG8(CS_BASE + OFS_CSCTL5) &= ~(LFXTOFFG);
+
+ //Clear the global fault flag. In case the LFXT caused the global fault
+ //flag to get set this will clear the global error condition. If any
+ //error condition persists, global flag will get again.
+ HWREG8(SFR_BASE + OFS_SFRIFG1) &= ~OFIFG;
+ }
+
+ //Lock CS control register
+ HWREG8(CS_BASE + OFS_CSCTL0_H) = 0x00;
+}
+
+bool CS_turnOnLFXTWithTimeout (uint16_t lfxtdrive,
+ uint32_t timeout
+ )
+{
+ assert(privateLFXTClockFrequency != 0);
+
+ assert((lfxtdrive == CS_LFXT_DRIVE_0 ) ||
+ (lfxtdrive == CS_LFXT_DRIVE_1 ) ||
+ (lfxtdrive == CS_LFXT_DRIVE_2 ) ||
+ (lfxtdrive == CS_LFXT_DRIVE_3 ));
+
+ assert(timeout > 0);
+
+ //Unlock CS control register
+ HWREG16(CS_BASE + OFS_CSCTL0) = CSKEY;
+
+ //Switch ON LFXT oscillator
+ HWREG16(CS_BASE + OFS_CSCTL4) &= ~LFXTOFF;
+
+ //Highest drive setting for LFXTstartup
+ HWREG16(CS_BASE + OFS_CSCTL4_L) |= LFXTDRIVE1_L + LFXTDRIVE0_L;
+
+ HWREG16(CS_BASE + OFS_CSCTL4) &= ~LFXTBYPASS;
+
+ while ((HWREG8(CS_BASE + OFS_CSCTL5) & LFXTOFFG) && --timeout)
+ {
+ //Clear OSC fault Flags fault flags
+ HWREG8(CS_BASE + OFS_CSCTL5) &= ~(LFXTOFFG);
+
+ //Clear the global fault flag. In case the LFXT caused the global fault
+ //flag to get set this will clear the global error condition. If any
+ //error condition persists, global flag will get again.
+ HWREG8(SFR_BASE + OFS_SFRIFG1) &= ~OFIFG;
+ }
+
+ if(timeout) {
+ //Set requested Drive mode
+ HWREG16(CS_BASE + OFS_CSCTL4) = ( HWREG16(CS_BASE + OFS_CSCTL4) &
+ ~(LFXTDRIVE_3)
+ ) |
+ (lfxtdrive);
+ //Lock CS control register
+ HWREG8(CS_BASE + OFS_CSCTL0_H) = 0x00;
+ return (STATUS_SUCCESS);
+ }
+ else {
+ //Lock CS control register
+ HWREG8(CS_BASE + OFS_CSCTL0_H) = 0x00;
+ return (STATUS_FAIL);
+ }
+}
+
+bool CS_bypassLFXTWithTimeout (uint32_t timeout
+ )
+{
+ assert(privateLFXTClockFrequency != 0);
+
+ assert(privateLFXTClockFrequency < LFXT_FREQUENCY_THRESHOLD);
+
+ assert(timeout > 0);
+
+ //Unlock CS control register
+ HWREG16(CS_BASE + OFS_CSCTL0) = CSKEY;
+
+ //Set LFXT in LF mode Switch off LFXT oscillator and enable BYPASS mode
+ HWREG16(CS_BASE + OFS_CSCTL4) |= (LFXTBYPASS + LFXTOFF);
+
+ while ((HWREG8(CS_BASE + OFS_CSCTL5) & LFXTOFFG) && --timeout)
+ {
+ //Clear OSC fault Flags fault flags
+ HWREG8(CS_BASE + OFS_CSCTL5) &= ~(LFXTOFFG);
+
+ //Clear the global fault flag. In case the LFXT caused the global fault
+ //flag to get set this will clear the global error condition. If any
+ //error condition persists, global flag will get again.
+ HWREG8(SFR_BASE + OFS_SFRIFG1) &= ~OFIFG;
+
+ }
+
+ //Lock CS control register
+ HWREG8(CS_BASE + OFS_CSCTL0_H) = 0x00;
+
+ if (timeout) {
+ return (STATUS_SUCCESS);
+ }
+ else {
+ return (STATUS_FAIL);
+ }
+}
+
+void CS_turnOffLFXT (void)
+{
+ //Unlock CS control register
+ HWREG16(CS_BASE + OFS_CSCTL0) = CSKEY;
+
+ //Switch off LFXT oscillator
+ HWREG16(CS_BASE + OFS_CSCTL4) |= LFXTOFF;
+
+ //Lock CS control register
+ HWREG8(CS_BASE + OFS_CSCTL0_H) = 0x00;
+}
+
+void CS_turnOnHFXT (uint16_t hfxtdrive
+ )
+{
+ assert(privateHFXTClockFrequency != 0);
+
+ assert((hfxtdrive == CS_HFXT_DRIVE_4MHZ_8MHZ )||
+ (hfxtdrive == CS_HFXT_DRIVE_8MHZ_16MHZ )||
+ (hfxtdrive == CS_HFXT_DRIVE_16MHZ_24MHZ )||
+ (hfxtdrive == CS_HFXT_DRIVE_24MHZ_32MHZ ));
+
+ //Unlock CS control register
+ HWREG16(CS_BASE + OFS_CSCTL0) = CSKEY;
+
+ //Switch ON HFXT oscillator
+ HWREG16(CS_BASE + OFS_CSCTL4) &= ~HFXTOFF;
+
+ //Disable HFXTBYPASS mode and Switch on HFXT oscillator
+ HWREG16(CS_BASE + OFS_CSCTL4) &= ~HFXTBYPASS;
+
+ //If HFFrequency is (16, 24] MHz
+ if (privateHFXTClockFrequency > 16000000) {
+ HWREG16(CS_BASE + OFS_CSCTL4) |= HFFREQ_3;
+ }
+ //If HFFrequency is (8, 16] MHz
+ else if (privateHFXTClockFrequency > 8000000) {
+ HWREG16(CS_BASE + OFS_CSCTL4) &= ~HFFREQ_3;
+ HWREG16(CS_BASE + OFS_CSCTL4) |= HFFREQ_2;
+ }
+ //If HFFrequency is (4, 8] MHz
+ else if (privateHFXTClockFrequency > 4000000) {
+ HWREG16(CS_BASE + OFS_CSCTL4) &= ~HFFREQ_3;
+ HWREG16(CS_BASE + OFS_CSCTL4) |= HFFREQ_1;
+ }
+ //If HFFrequency is [0, 4] MHz
+ else {
+ HWREG16(CS_BASE + OFS_CSCTL4) &= ~HFFREQ_3;
+ }
+
+ while (HWREG8(CS_BASE + OFS_CSCTL5) & HFXTOFFG) {
+ //Clear OSC fault flags
+ HWREG8(CS_BASE + OFS_CSCTL5) &= ~(HFXTOFFG);
+
+ //Clear OFIFG fault flag
+ HWREG8(SFR_BASE + OFS_SFRIFG1) &= ~OFIFG;
+ }
+
+ HWREG16(CS_BASE + OFS_CSCTL4) = ( HWREG16(CS_BASE + OFS_CSCTL4) &
+ ~(CS_HFXT_DRIVE_24MHZ_32MHZ)
+ ) |
+ (hfxtdrive);
+
+ //Lock CS control register
+ HWREG8(CS_BASE + OFS_CSCTL0_H) = 0x00;
+}
+
+void CS_bypassHFXT (void)
+{
+ //Verify user has initialized value of HFXTClock
+ assert(privateHFXTClockFrequency != 0);
+
+ //Unlock CS control register
+ HWREG16(CS_BASE + OFS_CSCTL0) = CSKEY;
+
+ //Switch off HFXT oscillator and set it to BYPASS mode
+ HWREG16(CS_BASE + OFS_CSCTL4) |= ( HFXTBYPASS + HFXTOFF );
+
+ //If HFFrequency is (16, 24] MHz
+ if (privateHFXTClockFrequency > 16000000) {
+ HWREG16(CS_BASE + OFS_CSCTL4) |= HFFREQ_3;
+ }
+ //If HFFrequency is (8, 16] MHz
+ else if (privateHFXTClockFrequency > 8000000) {
+ HWREG16(CS_BASE + OFS_CSCTL4) &= ~HFFREQ_3;
+ HWREG16(CS_BASE + OFS_CSCTL4) |= HFFREQ_2;
+ }
+ //If HFFrequency is (4, 8] MHz
+ else if (privateHFXTClockFrequency > 4000000) {
+ HWREG16(CS_BASE + OFS_CSCTL4) &= ~HFFREQ_3;
+ HWREG16(CS_BASE + OFS_CSCTL4) |= HFFREQ_1;
+ }
+ //If HFFrequency is [0, 4] MHz
+ else {
+ HWREG16(CS_BASE + OFS_CSCTL4) &= ~HFFREQ_3;
+ }
+
+ while (HWREG8(CS_BASE + OFS_CSCTL5) & HFXTOFFG) {
+ //Clear OSC fault flags
+ HWREG8(CS_BASE + OFS_CSCTL5) &= ~(HFXTOFFG);
+
+ //Clear OFIFG fault flag
+ HWREG8(SFR_BASE + OFS_SFRIFG1) &= ~OFIFG;
+ }
+
+ //Lock CS control register
+ HWREG8(CS_BASE + OFS_CSCTL0_H) = 0x00;
+}
+
+bool CS_turnOnHFXTWithTimeout (uint16_t hfxtdrive,
+ uint32_t timeout
+ )
+{
+ //Verify user has initialized value of HFXTClock
+ assert(privateHFXTClockFrequency != 0);
+
+ assert(timeout > 0);
+
+ //Unlock CS control register
+ HWREG16(CS_BASE + OFS_CSCTL0) = CSKEY;
+
+ //Switch on HFXT oscillator
+ HWREG16(CS_BASE + OFS_CSCTL4) &= ~HFXTOFF;
+
+ //Disable HFXTBYPASS mode
+ HWREG16(CS_BASE + OFS_CSCTL4) &= ~HFXTBYPASS;
+
+ //If HFFrequency is (16, 24] MHz
+ if (privateHFXTClockFrequency > 16000000) {
+ HWREG16(CS_BASE + OFS_CSCTL4) |= HFFREQ_3;
+ }
+ //If HFFrequency is (8, 16] MHz
+ else if (privateHFXTClockFrequency > 8000000) {
+ HWREG16(CS_BASE + OFS_CSCTL4) &= ~HFFREQ_3;
+ HWREG16(CS_BASE + OFS_CSCTL4) |= HFFREQ_2;
+ }
+ //If HFFrequency is (4, 8] MHz
+ else if (privateHFXTClockFrequency > 4000000) {
+ HWREG16(CS_BASE + OFS_CSCTL4) &= ~HFFREQ_3;
+ HWREG16(CS_BASE + OFS_CSCTL4) |= HFFREQ_1;
+ }
+ //If HFFrequency is [0, 4] MHz
+ else {
+ HWREG16(CS_BASE + OFS_CSCTL4) &= ~HFFREQ_3;
+ }
+
+ while ((HWREG8(CS_BASE + OFS_CSCTL5) & HFXTOFFG) && --timeout)
+ {
+ //Clear OSC fault Flags fault flags
+ HWREG8(CS_BASE + OFS_CSCTL5) &= ~(HFXTOFFG);
+
+ // Clear the global fault flag. In case the LFXT caused the global fault
+ // flag to get set this will clear the global error condition. If any
+ // error condition persists, global flag will get again.
+ HWREG8(SFR_BASE + OFS_SFRIFG1) &= ~OFIFG;
+
+ }
+
+ if (timeout) {
+ //Set drive strength for HFXT
+ HWREG16(CS_BASE + OFS_CSCTL4) = ( HWREG16(CS_BASE + OFS_CSCTL4) &
+ ~(CS_HFXT_DRIVE_24MHZ_32MHZ)
+ ) |
+ (hfxtdrive);
+ //Lock CS control register
+ HWREG8(CS_BASE + OFS_CSCTL0_H) = 0x00;
+ return (STATUS_SUCCESS);
+ }
+ else {
+ //Lock CS control register
+ HWREG8(CS_BASE + OFS_CSCTL0_H) = 0x00;
+ return (STATUS_FAIL);
+ }
+}
+
+bool CS_bypassHFXTWithTimeout (uint32_t timeout
+ )
+{
+ //Verify user has initialized value of HFXTClock
+ assert(privateHFXTClockFrequency != 0);
+
+ assert(timeout > 0);
+
+ // Unlock CS control register
+ HWREG16(CS_BASE + OFS_CSCTL0) = CSKEY;
+
+ //If HFFrequency is (16, 24] MHz
+ if (privateHFXTClockFrequency > 16000000) {
+ HWREG16(CS_BASE + OFS_CSCTL4) |= HFFREQ_3;
+ }
+ //If HFFrequency is (8, 16] MHz
+ else if (privateHFXTClockFrequency > 8000000) {
+ HWREG16(CS_BASE + OFS_CSCTL4) &= ~HFFREQ_3;
+ HWREG16(CS_BASE + OFS_CSCTL4) |= HFFREQ_2;
+ }
+ //If HFFrequency is (4, 8] MHz
+ else if (privateHFXTClockFrequency > 4000000) {
+ HWREG16(CS_BASE + OFS_CSCTL4) &= ~HFFREQ_3;
+ HWREG16(CS_BASE + OFS_CSCTL4) |= HFFREQ_1;
+ }
+ //If HFFrequency is [0, 4] MHz
+ else {
+ HWREG16(CS_BASE + OFS_CSCTL4) &= ~HFFREQ_3;
+ }
+
+ //Switch off HFXT oscillator and enable BYPASS mode
+ HWREG16(CS_BASE + OFS_CSCTL4) |= (HFXTBYPASS + HFXTOFF);
+
+ while ((HWREG8(CS_BASE + OFS_CSCTL5) & HFXTOFFG) && --timeout)
+ {
+ //Clear OSC fault flags
+ HWREG8(CS_BASE + OFS_CSCTL5) &= ~(HFXTOFFG);
+
+ // Clear the global fault flag. In case the LFXT caused the global fault
+ // flag to get set this will clear the global error condition. If any
+ // error condition persists, global flag will get again.
+ HWREG8(SFR_BASE + OFS_SFRIFG1) &= ~OFIFG;
+ }
+
+ // Lock CS control register
+ HWREG8(CS_BASE + OFS_CSCTL0_H) = 0x00;
+
+ if (timeout) {
+ return (STATUS_SUCCESS);
+ }
+ else {
+ return (STATUS_FAIL);
+ }
+}
+
+void CS_turnOffHFXT (void)
+{
+ //Unlock CS control register
+ HWREG16(CS_BASE + OFS_CSCTL0) = CSKEY;
+
+ //Switch off HFXT oscillator
+ HWREG16(CS_BASE + OFS_CSCTL4) |= HFXTOFF;
+
+ //Lock CS control register
+ HWREG8(CS_BASE + OFS_CSCTL0_H) = 0x00;
+}
+
+void CS_enableClockRequest (uint8_t selectClock
+ )
+{
+ assert(
+ (CS_ACLK == selectClock )||
+ (CS_SMCLK == selectClock )||
+ (CS_MCLK == selectClock )||
+ (CS_MODOSC== selectClock ));
+
+ //Unlock CS control register
+ HWREG16(CS_BASE + OFS_CSCTL0) = CSKEY;
+
+ HWREG8(CS_BASE + OFS_CSCTL6) |= selectClock;
+
+ //Lock CS control register
+ HWREG8(CS_BASE + OFS_CSCTL0_H) = 0x00;
+}
+
+void CS_disableClockRequest (uint8_t selectClock
+ )
+{
+ assert(
+ (CS_ACLK == selectClock )||
+ (CS_SMCLK == selectClock )||
+ (CS_MCLK == selectClock )||
+ (CS_MODOSC== selectClock ));
+
+ //Unlock CS control register
+ HWREG16(CS_BASE + OFS_CSCTL0) = CSKEY;
+
+ HWREG8(CS_BASE + OFS_CSCTL6) &= ~selectClock;
+
+ //Lock CS control register
+ HWREG8(CS_BASE + OFS_CSCTL0_H) = 0x00;
+}
+
+uint8_t CS_getFaultFlagStatus (uint8_t mask
+ )
+{
+ assert(
+ (CS_HFXTOFFG == mask )||
+ (CS_LFXTOFFG == mask )
+ );
+ return (HWREG8(CS_BASE + OFS_CSCTL5) & mask);
+}
+
+void CS_clearFaultFlag (uint8_t mask
+ )
+{
+ assert(
+ (CS_HFXTOFFG == mask )||
+ (CS_LFXTOFFG == mask )
+ );
+
+ //Unlock CS control register
+ HWREG16(CS_BASE + OFS_CSCTL0) = CSKEY;
+
+ HWREG8(CS_BASE + OFS_CSCTL5) &= ~mask;
+
+ //Lock CS control register
+ HWREG8(CS_BASE + OFS_CSCTL0_H) = 0x00;
+}
+
+uint32_t CS_getACLK (void)
+{
+
+ //Find ACLK source
+ uint16_t ACLKSource = (HWREG16(CS_BASE + OFS_CSCTL2) & SELA_7);
+ ACLKSource = ACLKSource >> 8;
+
+ //Find ACLK frequency divider
+ uint16_t ACLKSourceDivider = HWREG16(CS_BASE + OFS_CSCTL3) & SELA_7;
+ ACLKSourceDivider = ACLKSourceDivider >> 8;
+
+ return (privateCSAComputeCLKFrequency(
+ ACLKSource,
+ ACLKSourceDivider));
+
+}
+
+uint32_t CS_getSMCLK (void)
+{
+ //Find SMCLK source
+ uint16_t SMCLKSource = HWREG8(CS_BASE + OFS_CSCTL2) & SELS_7;
+
+ SMCLKSource = SMCLKSource >> 4;
+
+ //Find SMCLK frequency divider
+ uint16_t SMCLKSourceDivider = HWREG16(CS_BASE + OFS_CSCTL3) & SELS_7;
+ SMCLKSourceDivider = SMCLKSourceDivider >> 4;
+
+ return (privateCSAComputeCLKFrequency(
+ SMCLKSource,
+ SMCLKSourceDivider )
+ );
+}
+
+uint32_t CS_getMCLK (void)
+{
+ //Find MCLK source
+ uint16_t MCLKSource = (HWREG16(CS_BASE + OFS_CSCTL2) & SELM_7);
+ //Find MCLK frequency divider
+ uint16_t MCLKSourceDivider = HWREG16(CS_BASE + OFS_CSCTL3) & SELM_7;
+
+ return (privateCSAComputeCLKFrequency(
+ MCLKSource,
+ MCLKSourceDivider )
+ );
+}
+
+void CS_turnOffVLO(void)
+{
+ //Unlock CS control register
+ HWREG16(CS_BASE + OFS_CSCTL0) = CSKEY;
+
+ HWREG16(CS_BASE + OFS_CSCTL4) |= VLOOFF;
+
+ //Lock CS control register
+ HWREG8(CS_BASE + OFS_CSCTL0_H) = 0x00;
+}
+
+uint16_t CS_clearAllOscFlagsWithTimeout(uint32_t timeout)
+{
+ assert(timeout > 0);
+
+ //Unlock CS control register
+ HWREG16(CS_BASE + OFS_CSCTL0) = CSKEY;
+
+ do {
+ //Clear all osc fault flags
+ HWREG8(CS_BASE + OFS_CSCTL5) &= ~(LFXTOFFG + HFXTOFFG);
+
+ //Clear the global osc fault flag
+ HWREG8(SFR_BASE + OFS_SFRIFG1) &= ~OFIFG;
+
+ //Check LFXT fault flags
+ } while ((HWREG8(SFR_BASE + OFS_SFRIFG1) & OFIFG) && --timeout);
+
+ //Lock CS control register
+ HWREG8(CS_BASE + OFS_CSCTL0_H) = 0x00;
+
+ return (HWREG8(CS_BASE + OFS_CSCTL5) & (LFXTOFFG + HFXTOFFG));
+}
+
+void CS_setDCOFreq(uint16_t dcorsel,
+ uint16_t dcofsel)
+{
+ assert(
+ (dcofsel==CS_DCOFSEL_0)||
+ (dcofsel==CS_DCOFSEL_1)||
+ (dcofsel==CS_DCOFSEL_2)||
+ (dcofsel==CS_DCOFSEL_3)||
+ (dcofsel==CS_DCOFSEL_4)||
+ (dcofsel==CS_DCOFSEL_5)||
+ (dcofsel==CS_DCOFSEL_6)
+ );
+
+ //Verify user has selected a valid DCO Frequency Range option
+ assert(
+ (dcorsel==CS_DCORSEL_0)||
+ (dcorsel==CS_DCORSEL_1));
+
+ uint16_t tempCSCTL3 = 0;
+ //Unlock CS control register
+ HWREG16(CS_BASE + OFS_CSCTL0) = CSKEY;
+
+ //Assuming SMCLK and MCLK are sourced from DCO
+ //Store CSCTL3 settings to recover later
+ tempCSCTL3 = HWREG16(CS_BASE + OFS_CSCTL3);
+
+ //Keep overshoot transient within specification by setting clk
+ //sources to divide by 4
+ //Clear the DIVS & DIVM masks (~0x77) and set both fields to 4 divider
+ HWREG16(CS_BASE + OFS_CSCTL3) = HWREG16(CS_BASE + OFS_CSCTL3) &
+ (~(0x77)) | DIVS1 | DIVM1;
+
+ //Set user's frequency selection for DCO
+ HWREG16(CS_BASE + OFS_CSCTL1) = (dcorsel + dcofsel);
+
+ //Delay by ~10us to let DCO settle. cycles to wait = 20 cycles buffer +
+ //(10us * (x MHz/4))
+ switch(dcofsel)
+ {
+ case(CS_DCOFSEL_0):
+ //1 MHz or 1 MHz
+ (dcorsel == CS_DCORSEL_0) ? __delay_cycles(23) : __delay_cycles(23);
+ break;
+ case(CS_DCOFSEL_1):
+ //2.67 MHz or 5.33 MHz
+ (dcorsel == CS_DCORSEL_0) ? __delay_cycles(27) : __delay_cycles(34);
+ break;
+ case(CS_DCOFSEL_2):
+ //3.33 MHz or 6.67 MHz
+ (dcorsel == CS_DCORSEL_0) ? __delay_cycles(29) : __delay_cycles(37);
+ break;
+ case(CS_DCOFSEL_3):
+ //4 MHz or 8 MHz
+ (dcorsel == CS_DCORSEL_0) ? __delay_cycles(30) : __delay_cycles(40);
+ break;
+ case(CS_DCOFSEL_4):
+ //5.33 MHz or 16 MHz
+ (dcorsel == CS_DCORSEL_0) ? __delay_cycles(34) : __delay_cycles(60);
+ break;
+ case(CS_DCOFSEL_5):
+ //6.67 MHz or 21 MHz
+ (dcorsel == CS_DCORSEL_0) ? __delay_cycles(37) : __delay_cycles(73);
+ break;
+ case(CS_DCOFSEL_6):
+ //8 MHz or 24 MHz
+ (dcorsel == CS_DCORSEL_0) ? __delay_cycles(40) : __delay_cycles(80);
+ break;
+ default:
+ //Should not be used, but default is 8 MHz or 24 MHz
+ (dcorsel == CS_DCORSEL_0) ? __delay_cycles(40) : __delay_cycles(80);
+ break;
+ }
+
+ //Set all dividers
+ HWREG16(CS_BASE + OFS_CSCTL3) = tempCSCTL3;
+
+ //Lock CS control register
+ HWREG8(CS_BASE + OFS_CSCTL0_H) = 0x00;
+}
+
+#endif
+//*****************************************************************************
+//
+//! Close the doxygen group for cs_api
+//! @}
+//
+//*****************************************************************************
diff --git a/Apps/FlightSoftware/MotorControl/driverlib/cs.h b/Apps/FlightSoftware/MotorControl/driverlib/cs.h
new file mode 100644
index 000000000..3809cb68d
--- /dev/null
+++ b/Apps/FlightSoftware/MotorControl/driverlib/cs.h
@@ -0,0 +1,644 @@
+/* --COPYRIGHT--,BSD
+ * Copyright (c) 2017, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * --/COPYRIGHT--*/
+//*****************************************************************************
+//
+// cs.h - Driver for the CS Module.
+//
+//*****************************************************************************
+
+#ifndef __MSP430WARE_CS_H__
+#define __MSP430WARE_CS_H__
+
+#include "inc/hw_memmap.h"
+
+#if defined(__MSP430_HAS_CS__) || defined(__MSP430_HAS_SFR__)
+
+//*****************************************************************************
+//
+// If building with a C++ compiler, make all of the definitions in this header
+// have a C binding.
+//
+//*****************************************************************************
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the clockSourceDivider
+// parameter for functions: CS_initClockSignal().
+//
+//*****************************************************************************
+#define CS_CLOCK_DIVIDER_1 DIVM__1
+#define CS_CLOCK_DIVIDER_2 DIVM__2
+#define CS_CLOCK_DIVIDER_4 DIVM__4
+#define CS_CLOCK_DIVIDER_8 DIVM__8
+#define CS_CLOCK_DIVIDER_16 DIVM__16
+#define CS_CLOCK_DIVIDER_32 DIVM__32
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the selectClock parameter for
+// functions: CS_enableClockRequest(), and CS_disableClockRequest(); the
+// selectedClockSignal parameter for functions: CS_initClockSignal().
+//
+//*****************************************************************************
+#define CS_ACLK 0x01
+#define CS_MCLK 0x02
+#define CS_SMCLK 0x04
+#define CS_MODOSC MODCLKREQEN
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the clockSource parameter for
+// functions: CS_initClockSignal().
+//
+//*****************************************************************************
+#define CS_VLOCLK_SELECT SELM__VLOCLK
+#define CS_DCOCLK_SELECT SELM__DCOCLK
+#define CS_LFXTCLK_SELECT SELM__LFXTCLK
+#define CS_HFXTCLK_SELECT SELM__HFXTCLK
+#define CS_LFMODOSC_SELECT SELM__LFMODOSC
+#define CS_MODOSC_SELECT SELM__MODOSC
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the lfxtdrive parameter for
+// functions: CS_turnOnLFXT(), and CS_turnOnLFXTWithTimeout().
+//
+//*****************************************************************************
+#define CS_LFXT_DRIVE_0 LFXTDRIVE_0
+#define CS_LFXT_DRIVE_1 LFXTDRIVE_1
+#define CS_LFXT_DRIVE_2 LFXTDRIVE_2
+#define CS_LFXT_DRIVE_3 LFXTDRIVE_3
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the hfxtdrive parameter for
+// functions: CS_turnOnHFXT(), and CS_turnOnHFXTWithTimeout().
+//
+//*****************************************************************************
+#define CS_HFXT_DRIVE_4MHZ_8MHZ HFXTDRIVE_0
+#define CS_HFXT_DRIVE_8MHZ_16MHZ HFXTDRIVE_1
+#define CS_HFXT_DRIVE_16MHZ_24MHZ HFXTDRIVE_2
+#define CS_HFXT_DRIVE_24MHZ_32MHZ HFXTDRIVE_3
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the mask parameter for
+// functions: CS_getFaultFlagStatus(), and CS_clearFaultFlag() as well as
+// returned by the CS_getFaultFlagStatus() function.
+//
+//*****************************************************************************
+#define CS_LFXTOFFG LFXTOFFG
+#define CS_HFXTOFFG HFXTOFFG
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the dcorsel parameter for
+// functions: CS_setDCOFreq().
+//
+//*****************************************************************************
+#define CS_DCORSEL_0 0x00
+#define CS_DCORSEL_1 DCORSEL
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the dcofsel parameter for
+// functions: CS_setDCOFreq().
+//
+//*****************************************************************************
+#define CS_DCOFSEL_0 DCOFSEL_0
+#define CS_DCOFSEL_1 DCOFSEL_1
+#define CS_DCOFSEL_2 DCOFSEL_2
+#define CS_DCOFSEL_3 DCOFSEL_3
+#define CS_DCOFSEL_4 DCOFSEL_4
+#define CS_DCOFSEL_5 DCOFSEL_5
+#define CS_DCOFSEL_6 DCOFSEL_6
+
+//*****************************************************************************
+//
+// Prototypes for the APIs.
+//
+//*****************************************************************************
+
+//*****************************************************************************
+//
+//! \brief Sets the external clock source
+//!
+//! This function sets the external clock sources LFXT and HFXT crystal
+//! oscillator frequency values. This function must be called if an external
+//! crystal LFXT or HFXT is used and the user intends to call CS_getMCLK,
+//! CS_getSMCLK, CS_getACLK and CS_turnOnLFXT, CS_LFXTByPass,
+//! CS_turnOnLFXTWithTimeout, CS_LFXTByPassWithTimeout, CS_turnOnHFXT,
+//! CS_HFXTByPass, CS_turnOnHFXTWithTimeout, CS_HFXTByPassWithTimeout.
+//!
+//! \param LFXTCLK_frequency is the LFXT crystal frequencies in Hz
+//! \param HFXTCLK_frequency is the HFXT crystal frequencies in Hz
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void CS_setExternalClockSource(uint32_t LFXTCLK_frequency,
+ uint32_t HFXTCLK_frequency);
+
+//*****************************************************************************
+//
+//! \brief Initializes clock signal
+//!
+//! This function initializes each of the clock signals. The user must ensure
+//! that this function is called for each clock signal. If not, the default
+//! state is assumed for the particular clock signal. Refer to MSP430ware
+//! documentation for CS module or Device Family User's Guide for details of
+//! default clock signal states.
+//!
+//! \param selectedClockSignal Selected clock signal
+//! Valid values are:
+//! - \b CS_ACLK
+//! - \b CS_MCLK
+//! - \b CS_SMCLK
+//! - \b CS_MODOSC
+//! \param clockSource is the selected clock signal
+//! Valid values are:
+//! - \b CS_VLOCLK_SELECT
+//! - \b CS_DCOCLK_SELECT - [Not available for ACLK]
+//! - \b CS_LFXTCLK_SELECT
+//! - \b CS_HFXTCLK_SELECT - [Not available for ACLK]
+//! - \b CS_LFMODOSC_SELECT
+//! - \b CS_MODOSC_SELECT - [Not available for ACLK]
+//! \param clockSourceDivider is the selected clock divider to calculate clock
+//! signal from clock source.
+//! Valid values are:
+//! - \b CS_CLOCK_DIVIDER_1 - [Default for ACLK]
+//! - \b CS_CLOCK_DIVIDER_2
+//! - \b CS_CLOCK_DIVIDER_4
+//! - \b CS_CLOCK_DIVIDER_8 - [Default for SMCLK and MCLK]
+//! - \b CS_CLOCK_DIVIDER_16
+//! - \b CS_CLOCK_DIVIDER_32
+//!
+//! Modified bits of \b CSCTL0 register, bits of \b CSCTL3 register and bits of
+//! \b CSCTL2 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void CS_initClockSignal(uint8_t selectedClockSignal,
+ uint16_t clockSource,
+ uint16_t clockSourceDivider);
+
+//*****************************************************************************
+//
+//! \brief Initializes the LFXT crystal in low frequency mode.
+//!
+//! Initializes the LFXT crystal oscillator in low frequency mode. Loops until
+//! all oscillator fault flags are cleared, with no timeout. See the device-
+//! specific data sheet for appropriate drive settings. IMPORTANT: User must
+//! call CS_setExternalClockSource function to set frequency of external clocks
+//! before calling this function.
+//!
+//! \param lfxtdrive is the target drive strength for the LFXT crystal
+//! oscillator.
+//! Valid values are:
+//! - \b CS_LFXT_DRIVE_0
+//! - \b CS_LFXT_DRIVE_1
+//! - \b CS_LFXT_DRIVE_2
+//! - \b CS_LFXT_DRIVE_3 [Default]
+//!
+//! Modified bits of \b CSCTL0 register, bits of \b CSCTL5 register, bits of \b
+//! CSCTL4 register and bits of \b SFRIFG1 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void CS_turnOnLFXT(uint16_t lfxtdrive);
+
+//*****************************************************************************
+//
+//! \brief Turns off SMCLK using the SMCLKOFF bit.
+//!
+//!
+//! Modified bits of \b CSCTL4 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void CS_turnOffSMCLK(void);
+
+//*****************************************************************************
+//
+//! \brief Turns on SMCLK using the SMCLKOFF bit.
+//!
+//!
+//! Modified bits of \b CSCTL4 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void CS_turnOnSMCLK(void);
+
+//*****************************************************************************
+//
+//! \brief Bypasses the LFXT crystal oscillator.
+//!
+//! Bypasses the LFXT crystal oscillator. Loops until all oscillator fault
+//! flags are cleared, with no timeout. IMPORTANT: User must call
+//! CS_setExternalClockSource function to set frequency of external clocks
+//! before calling this function.
+//!
+//!
+//! Modified bits of \b CSCTL0 register, bits of \b CSCTL5 register, bits of \b
+//! CSCTL4 register and bits of \b SFRIFG register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void CS_bypassLFXT(void);
+
+//*****************************************************************************
+//
+//! \brief Initializes the LFXT crystal oscillator in low frequency mode with
+//! timeout.
+//!
+//! Initializes the LFXT crystal oscillator in low frequency mode with timeout.
+//! Loops until all oscillator fault flags are cleared or until a timeout
+//! counter is decremented and equals to zero. See the device-specific
+//! datasheet for appropriate drive settings. IMPORTANT: User must call
+//! CS_setExternalClockSource to set frequency of external clocks before
+//! calling this function.
+//!
+//! \param lfxtdrive is the target drive strength for the LFXT crystal
+//! oscillator.
+//! Valid values are:
+//! - \b CS_LFXT_DRIVE_0
+//! - \b CS_LFXT_DRIVE_1
+//! - \b CS_LFXT_DRIVE_2
+//! - \b CS_LFXT_DRIVE_3 [Default]
+//! \param timeout is the count value that gets decremented every time the loop
+//! that clears oscillator fault flags gets executed.
+//!
+//! Modified bits of \b CSCTL0 register, bits of \b CSCTL5 register, bits of \b
+//! CSCTL4 register and bits of \b SFRIFG1 register.
+//!
+//! \return STATUS_SUCCESS or STATUS_FAIL indicating if the LFXT crystal
+//! oscillator was initialized successfully
+//
+//*****************************************************************************
+extern bool CS_turnOnLFXTWithTimeout(uint16_t lfxtdrive,
+ uint32_t timeout);
+
+//*****************************************************************************
+//
+//! \brief Bypass the LFXT crystal oscillator with timeout.
+//!
+//! Bypasses the LFXT crystal oscillator with timeout. Loops until all
+//! oscillator fault flags are cleared or until a timeout counter is
+//! decremented and equals to zero. NOTE: User must call
+//! CS_setExternalClockSource to set frequency of external clocks before
+//! calling this function.
+//!
+//! \param timeout is the count value that gets decremented every time the loop
+//! that clears oscillator fault flags gets executed.
+//!
+//! Modified bits of \b CSCTL0 register, bits of \b CSCTL5 register, bits of \b
+//! CSCTL4 register and bits of \b SFRIFG register.
+//!
+//! \return STATUS_SUCCESS or STATUS_FAIL
+//
+//*****************************************************************************
+extern bool CS_bypassLFXTWithTimeout(uint32_t timeout);
+
+//*****************************************************************************
+//
+//! \brief Stops the LFXT oscillator using the LFXTOFF bit.
+//!
+//!
+//! Modified bits of \b CSCTL4 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void CS_turnOffLFXT(void);
+
+//*****************************************************************************
+//
+//! \brief Starts the HFXFT crystal
+//!
+//! Initializes the HFXT crystal oscillator, which supports crystal frequencies
+//! between 0 MHz and 24 MHz, depending on the selected drive strength. Loops
+//! until all oscillator fault flags are cleared, with no timeout. See the
+//! device-specific data sheet for appropriate drive settings. NOTE: User must
+//! call CS_setExternalClockSource to set frequency of external clocks before
+//! calling this function.
+//!
+//! \param hfxtdrive is the target drive strength for the HFXT crystal
+//! oscillator.
+//! Valid values are:
+//! - \b CS_HFXT_DRIVE_4MHZ_8MHZ
+//! - \b CS_HFXT_DRIVE_8MHZ_16MHZ
+//! - \b CS_HFXT_DRIVE_16MHZ_24MHZ
+//! - \b CS_HFXT_DRIVE_24MHZ_32MHZ [Default]
+//!
+//! Modified bits of \b CSCTL5 register, bits of \b CSCTL4 register and bits of
+//! \b SFRIFG1 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void CS_turnOnHFXT(uint16_t hfxtdrive);
+
+//*****************************************************************************
+//
+//! \brief Bypasses the HFXT crystal oscillator
+//!
+//! Bypasses the HFXT crystal oscillator, which supports crystal frequencies
+//! between 0 MHz and 24 MHz. Loops until all oscillator fault flags are
+//! cleared, with no timeout.NOTE: User must call CS_setExternalClockSource to
+//! set frequency of external clocks before calling this function.
+//!
+//!
+//! Modified bits of \b CSCTL5 register, bits of \b CSCTL4 register and bits of
+//! \b SFRIFG register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void CS_bypassHFXT(void);
+
+//*****************************************************************************
+//
+//! \brief Initializes the HFXT crystal oscillator with timeout.
+//!
+//! Initializes the HFXT crystal oscillator, which supports crystal frequencies
+//! between 0 MHz and 24 MHz, depending on the selected drive strength. Loops
+//! until all oscillator fault flags are cleared or until a timeout counter is
+//! decremented and equals to zero. See the device-specific data sheet for
+//! appropriate drive settings. NOTE: User must call CS_setExternalClockSource
+//! to set frequency of external clocks before calling this function.
+//!
+//! \param hfxtdrive is the target drive strength for the HFXT crystal
+//! oscillator.
+//! Valid values are:
+//! - \b CS_HFXT_DRIVE_4MHZ_8MHZ
+//! - \b CS_HFXT_DRIVE_8MHZ_16MHZ
+//! - \b CS_HFXT_DRIVE_16MHZ_24MHZ
+//! - \b CS_HFXT_DRIVE_24MHZ_32MHZ [Default]
+//! \param timeout is the count value that gets decremented every time the loop
+//! that clears oscillator fault flags gets executed.
+//!
+//! Modified bits of \b CSCTL5 register, bits of \b CSCTL4 register and bits of
+//! \b SFRIFG1 register.
+//!
+//! \return STATUS_SUCCESS or STATUS_FAIL
+//
+//*****************************************************************************
+extern bool CS_turnOnHFXTWithTimeout(uint16_t hfxtdrive,
+ uint32_t timeout);
+
+//*****************************************************************************
+//
+//! \brief Bypasses the HFXT crystal oscillator with timeout
+//!
+//! Bypasses the HFXT crystal oscillator, which supports crystal frequencies
+//! between 0 MHz and 24 MHz. Loops until all oscillator fault flags are
+//! cleared or until a timeout counter is decremented and equals to zero. NOTE:
+//! User must call CS_setExternalClockSource to set frequency of external
+//! clocks before calling this function.
+//!
+//! \param timeout is the count value that gets decremented every time the loop
+//! that clears oscillator fault flags gets executed.
+//!
+//! Modified bits of \b CSCTL5 register, bits of \b CSCTL4 register and bits of
+//! \b SFRIFG1 register.
+//!
+//! \return STATUS_SUCCESS or STATUS_FAIL
+//
+//*****************************************************************************
+extern bool CS_bypassHFXTWithTimeout(uint32_t timeout);
+
+//*****************************************************************************
+//
+//! \brief Stops the HFXT oscillator using the HFXTOFF bit.
+//!
+//!
+//! Modified bits of \b CSCTL4 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void CS_turnOffHFXT(void);
+
+//*****************************************************************************
+//
+//! \brief Enables conditional module requests
+//!
+//! \param selectClock selects specific request enables.
+//! Valid values are:
+//! - \b CS_ACLK
+//! - \b CS_MCLK
+//! - \b CS_SMCLK
+//! - \b CS_MODOSC
+//!
+//! Modified bits of \b CSCTL6 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void CS_enableClockRequest(uint8_t selectClock);
+
+//*****************************************************************************
+//
+//! \brief Disables conditional module requests
+//!
+//! \param selectClock selects specific request enables.
+//! Valid values are:
+//! - \b CS_ACLK
+//! - \b CS_MCLK
+//! - \b CS_SMCLK
+//! - \b CS_MODOSC
+//!
+//! Modified bits of \b CSCTL6 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void CS_disableClockRequest(uint8_t selectClock);
+
+//*****************************************************************************
+//
+//! \brief Gets the current CS fault flag status.
+//!
+//! \param mask is the masked interrupt flag status to be returned. Mask
+//! parameter can be either any of the following selection.
+//! Mask value is the logical OR of any of the following:
+//! - \b CS_LFXTOFFG - LFXT oscillator fault flag
+//! - \b CS_HFXTOFFG - HFXT oscillator fault flag
+//!
+//! \return Logical OR of any of the following:
+//! - \b CS_LFXTOFFG LFXT oscillator fault flag
+//! - \b CS_HFXTOFFG HFXT oscillator fault flag
+//! \n indicating the status of the masked interrupts
+//
+//*****************************************************************************
+extern uint8_t CS_getFaultFlagStatus(uint8_t mask);
+
+//*****************************************************************************
+//
+//! \brief Clears the current CS fault flag status for the masked bit.
+//!
+//! \param mask is the masked interrupt flag status to be returned. mask
+//! parameter can be any one of the following
+//! Mask value is the logical OR of any of the following:
+//! - \b CS_LFXTOFFG - LFXT oscillator fault flag
+//! - \b CS_HFXTOFFG - HFXT oscillator fault flag
+//!
+//! Modified bits of \b CSCTL5 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void CS_clearFaultFlag(uint8_t mask);
+
+//*****************************************************************************
+//
+//! \brief Get the current ACLK frequency.
+//!
+//! If a oscillator fault is set, the frequency returned will be based on the
+//! fail safe mechanism of CS module. The user of this API must ensure that
+//! CS_externalClockSourceInit API was invoked before in case LFXT or HFXT is
+//! being used.
+//!
+//!
+//! \return Current ACLK frequency in Hz
+//
+//*****************************************************************************
+extern uint32_t CS_getACLK(void);
+
+//*****************************************************************************
+//
+//! \brief Get the current SMCLK frequency.
+//!
+//! If a oscillator fault is set, the frequency returned will be based on the
+//! fail safe mechanism of CS module. The user of this API must ensure that
+//! CS_externalClockSourceInit API was invoked before in case LFXT or HFXT is
+//! being used.
+//!
+//!
+//! \return Current SMCLK frequency in Hz
+//
+//*****************************************************************************
+extern uint32_t CS_getSMCLK(void);
+
+//*****************************************************************************
+//
+//! \brief Get the current MCLK frequency.
+//!
+//! If a oscillator fault is set, the frequency returned will be based on the
+//! fail safe mechanism of CS module. The user of this API must ensure that
+//! CS_externalClockSourceInit API was invoked before in case LFXT or HFXT is
+//! being used.
+//!
+//!
+//! \return Current MCLK frequency in Hz
+//
+//*****************************************************************************
+extern uint32_t CS_getMCLK(void);
+
+//*****************************************************************************
+//
+//! \brief Turns off VLO
+//!
+//!
+//! Modified bits of \b CSCTL4 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void CS_turnOffVLO(void);
+
+//*****************************************************************************
+//
+//! \brief Clears all the Oscillator Flags
+//!
+//! \param timeout is the count value that gets decremented every time the loop
+//! that clears oscillator fault flags gets executed.
+//!
+//! Modified bits of \b CSCTL5 register and bits of \b SFRIFG1 register.
+//!
+//! \return the mask of the oscillator flag status
+//
+//*****************************************************************************
+extern uint16_t CS_clearAllOscFlagsWithTimeout(uint32_t timeout);
+
+//*****************************************************************************
+//
+//! \brief Set DCO frequency
+//!
+//! \param dcorsel selects frequency range option.
+//! Valid values are:
+//! - \b CS_DCORSEL_0 [Default] - Low Frequency Option
+//! - \b CS_DCORSEL_1 - High Frequency Option
+//! \param dcofsel selects valid frequency options based on dco frequency range
+//! selection (dcorsel)
+//! Valid values are:
+//! - \b CS_DCOFSEL_0 - Low frequency option 1MHz. High frequency option
+//! 1MHz.
+//! - \b CS_DCOFSEL_1 - Low frequency option 2.67MHz. High frequency
+//! option 5.33MHz.
+//! - \b CS_DCOFSEL_2 - Low frequency option 3.33MHz. High frequency
+//! option 6.67MHz.
+//! - \b CS_DCOFSEL_3 - Low frequency option 4MHz. High frequency option
+//! 8MHz.
+//! - \b CS_DCOFSEL_4 - Low frequency option 5.33MHz. High frequency
+//! option 16MHz.
+//! - \b CS_DCOFSEL_5 - Low frequency option 6.67MHz. High frequency
+//! option 20MHz.
+//! - \b CS_DCOFSEL_6 - Low frequency option 8MHz. High frequency option
+//! 24MHz.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void CS_setDCOFreq(uint16_t dcorsel,
+ uint16_t dcofsel);
+
+//*****************************************************************************
+//
+// Mark the end of the C bindings section for C++ compilers.
+//
+//*****************************************************************************
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+#endif // __MSP430WARE_CS_H__
diff --git a/Apps/FlightSoftware/MotorControl/driverlib/dma.c b/Apps/FlightSoftware/MotorControl/driverlib/dma.c
new file mode 100644
index 000000000..3f7817102
--- /dev/null
+++ b/Apps/FlightSoftware/MotorControl/driverlib/dma.c
@@ -0,0 +1,194 @@
+/* --COPYRIGHT--,BSD
+ * Copyright (c) 2017, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * --/COPYRIGHT--*/
+//*****************************************************************************
+//
+// dma.c - Driver for the dma Module.
+//
+//*****************************************************************************
+
+//*****************************************************************************
+//
+//! \addtogroup dma_api dma
+//! @{
+//
+//*****************************************************************************
+
+#include "inc/hw_memmap.h"
+
+#if defined(__MSP430_HAS_DMAX_3__) || defined(__MSP430_HAS_DMAX_6__)
+#include "dma.h"
+
+#include
+
+void DMA_init( DMA_initParam *param){
+ uint8_t triggerOffset = (param->channelSelect >> 4);
+
+ //Reset and Set DMA Control 0 Register
+ HWREG16(DMA_BASE + param->channelSelect + OFS_DMA0CTL) =
+ param->transferModeSelect //Set Transfer Mode
+ + param->transferUnitSelect //Set Transfer Unit Size
+ + param->triggerTypeSelect; //Set Trigger Type
+
+ //Set Transfer Size Amount
+ HWREG16(DMA_BASE + param->channelSelect + OFS_DMA0SZ) = param->transferSize;
+
+ if (triggerOffset & 0x01){ //Odd Channel
+ HWREG16(DMA_BASE + (triggerOffset & 0x0E)) &= 0x00FF; //Reset Trigger Select
+ HWREG16(DMA_BASE +
+ (triggerOffset & 0x0E)) |= (param->triggerSourceSelect << 8);
+ } else { //Even Channel
+ HWREG16(DMA_BASE + (triggerOffset & 0x0E)) &= 0xFF00; //Reset Trigger Select
+ HWREG16(DMA_BASE + (triggerOffset & 0x0E)) |= param->triggerSourceSelect;
+ }
+}
+void DMA_setTransferSize (uint8_t channelSelect,
+ uint16_t transferSize)
+{
+ //Set Transfer Size Amount
+ HWREG16(DMA_BASE + channelSelect + OFS_DMA0SZ) = transferSize;
+}
+
+uint16_t DMA_getTransferSize (uint8_t channelSelect)
+{
+ //Get Transfer Size Amount
+ return HWREG16(DMA_BASE + channelSelect + OFS_DMA0SZ);
+}
+
+void DMA_setSrcAddress (uint8_t channelSelect,
+ uint32_t srcAddress,
+ uint16_t directionSelect)
+{
+ //Set the Source Address
+ __data16_write_addr((unsigned short)(DMA_BASE + channelSelect + OFS_DMA0SA),
+ srcAddress);
+
+ //Reset bits before setting them
+ HWREG16(DMA_BASE + channelSelect + OFS_DMA0CTL) &= ~(DMASRCINCR_3);
+ HWREG16(DMA_BASE + channelSelect + OFS_DMA0CTL) |= directionSelect;
+}
+
+void DMA_setDstAddress (uint8_t channelSelect,
+ uint32_t dstAddress,
+ uint16_t directionSelect)
+{
+ //Set the Destination Address
+ __data16_write_addr((unsigned short)(DMA_BASE + channelSelect + OFS_DMA0DA),
+ dstAddress);
+
+ //Reset bits before setting them
+ HWREG16(DMA_BASE + channelSelect + OFS_DMA0CTL) &= ~(DMADSTINCR_3);
+ HWREG16(DMA_BASE + channelSelect + OFS_DMA0CTL) |= (directionSelect << 2);
+}
+
+void DMA_enableTransfers (uint8_t channelSelect)
+{
+ HWREG16(DMA_BASE + channelSelect + OFS_DMA0CTL) |= DMAEN;
+}
+
+void DMA_disableTransfers (uint8_t channelSelect)
+{
+ HWREG16(DMA_BASE + channelSelect + OFS_DMA0CTL) &= ~(DMAEN);
+}
+
+void DMA_startTransfer (uint8_t channelSelect)
+{
+ HWREG16(DMA_BASE + channelSelect + OFS_DMA0CTL) |= DMAREQ;
+}
+
+void DMA_enableInterrupt (uint8_t channelSelect)
+{
+ HWREG16(DMA_BASE + channelSelect + OFS_DMA0CTL) |= DMAIE;
+}
+
+void DMA_disableInterrupt (uint8_t channelSelect)
+{
+ HWREG16(DMA_BASE + channelSelect + OFS_DMA0CTL) &= ~(DMAIE);
+}
+
+uint16_t DMA_getInterruptStatus (uint8_t channelSelect)
+{
+ return (HWREG16(DMA_BASE + channelSelect + OFS_DMA0CTL) & DMAIFG);
+}
+
+void DMA_clearInterrupt (uint8_t channelSelect)
+{
+ HWREG16(DMA_BASE + channelSelect + OFS_DMA0CTL) &= ~(DMAIFG);
+}
+
+uint16_t DMA_getNMIAbortStatus (uint8_t channelSelect)
+{
+ return (HWREG16(DMA_BASE + channelSelect + OFS_DMA0CTL) & DMAABORT);
+}
+
+void DMA_clearNMIAbort (uint8_t channelSelect)
+{
+ HWREG16(DMA_BASE + channelSelect + OFS_DMA0CTL) &= ~(DMAABORT);
+}
+
+void DMA_disableTransferDuringReadModifyWrite (void)
+{
+ HWREG16(DMA_BASE + OFS_DMACTL4) |= DMARMWDIS;
+}
+
+void DMA_enableTransferDuringReadModifyWrite (void)
+{
+ HWREG16(DMA_BASE + OFS_DMACTL4) &= ~(DMARMWDIS);
+}
+
+void DMA_enableRoundRobinPriority (void)
+{
+ HWREG16(DMA_BASE + OFS_DMACTL4) |= ROUNDROBIN;
+}
+
+void DMA_disableRoundRobinPriority (void)
+{
+ HWREG16(DMA_BASE + OFS_DMACTL4) &= ~(ROUNDROBIN);
+}
+
+void DMA_enableNMIAbort (void)
+{
+ HWREG16(DMA_BASE + OFS_DMACTL4) |= ENNMI;
+}
+
+void DMA_disableNMIAbort (void)
+{
+ HWREG16(DMA_BASE + OFS_DMACTL4) &= ~(ENNMI);
+}
+
+
+#endif
+//*****************************************************************************
+//
+//! Close the doxygen group for dma_api
+//! @}
+//
+//*****************************************************************************
diff --git a/Apps/FlightSoftware/MotorControl/driverlib/dma.h b/Apps/FlightSoftware/MotorControl/driverlib/dma.h
new file mode 100644
index 000000000..7b112aa9d
--- /dev/null
+++ b/Apps/FlightSoftware/MotorControl/driverlib/dma.h
@@ -0,0 +1,747 @@
+/* --COPYRIGHT--,BSD
+ * Copyright (c) 2017, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * --/COPYRIGHT--*/
+//*****************************************************************************
+//
+// dma.h - Driver for the DMA Module.
+//
+//*****************************************************************************
+
+#ifndef __MSP430WARE_DMA_H__
+#define __MSP430WARE_DMA_H__
+
+#include "inc/hw_memmap.h"
+
+#if defined(__MSP430_HAS_DMAX_3__) || defined(__MSP430_HAS_DMAX_6__)
+
+//*****************************************************************************
+//
+// If building with a C++ compiler, make all of the definitions in this header
+// have a C binding.
+//
+//*****************************************************************************
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+#include "inc/hw_memmap.h"
+//*****************************************************************************
+//
+//! \brief Used in the DMA_init() function as the param parameter.
+//
+//*****************************************************************************
+typedef struct DMA_initParam {
+ //! Is the specified channel to initialize.
+ //! \n Valid values are:
+ //! - \b DMA_CHANNEL_0
+ //! - \b DMA_CHANNEL_1
+ //! - \b DMA_CHANNEL_2
+ //! - \b DMA_CHANNEL_3
+ //! - \b DMA_CHANNEL_4
+ //! - \b DMA_CHANNEL_5
+ //! - \b DMA_CHANNEL_6
+ //! - \b DMA_CHANNEL_7
+ uint8_t channelSelect;
+ //! Is the transfer mode of the selected channel.
+ //! \n Valid values are:
+ //! - \b DMA_TRANSFER_SINGLE [Default] - Single transfer, transfers
+ //! disabled after transferAmount of transfers.
+ //! - \b DMA_TRANSFER_BLOCK - Multiple transfers of transferAmount,
+ //! transfers disabled once finished.
+ //! - \b DMA_TRANSFER_BURSTBLOCK - Multiple transfers of transferAmount
+ //! interleaved with CPU activity, transfers disabled once finished.
+ //! - \b DMA_TRANSFER_REPEATED_SINGLE - Repeated single transfer by
+ //! trigger.
+ //! - \b DMA_TRANSFER_REPEATED_BLOCK - Multiple transfers of transferAmount
+ //! by trigger.
+ //! - \b DMA_TRANSFER_REPEATED_BURSTBLOCK - Multiple transfers of
+ //! transferAmount by trigger interleaved with CPU activity.
+ uint16_t transferModeSelect;
+ //! Is the amount of transfers to complete in a block transfer mode, as
+ //! well as how many transfers to complete before the interrupt flag is
+ //! set. Valid value is between 1-65535, if 0, no transfers will occur.
+ uint16_t transferSize;
+ //! Is the source that will trigger the start of each transfer, note that
+ //! the sources are device specific.
+ //! \n Valid values are:
+ //! - \b DMA_TRIGGERSOURCE_0 [Default]
+ //! - \b DMA_TRIGGERSOURCE_1
+ //! - \b DMA_TRIGGERSOURCE_2
+ //! - \b DMA_TRIGGERSOURCE_3
+ //! - \b DMA_TRIGGERSOURCE_4
+ //! - \b DMA_TRIGGERSOURCE_5
+ //! - \b DMA_TRIGGERSOURCE_6
+ //! - \b DMA_TRIGGERSOURCE_7
+ //! - \b DMA_TRIGGERSOURCE_8
+ //! - \b DMA_TRIGGERSOURCE_9
+ //! - \b DMA_TRIGGERSOURCE_10
+ //! - \b DMA_TRIGGERSOURCE_11
+ //! - \b DMA_TRIGGERSOURCE_12
+ //! - \b DMA_TRIGGERSOURCE_13
+ //! - \b DMA_TRIGGERSOURCE_14
+ //! - \b DMA_TRIGGERSOURCE_15
+ //! - \b DMA_TRIGGERSOURCE_16
+ //! - \b DMA_TRIGGERSOURCE_17
+ //! - \b DMA_TRIGGERSOURCE_18
+ //! - \b DMA_TRIGGERSOURCE_19
+ //! - \b DMA_TRIGGERSOURCE_20
+ //! - \b DMA_TRIGGERSOURCE_21
+ //! - \b DMA_TRIGGERSOURCE_22
+ //! - \b DMA_TRIGGERSOURCE_23
+ //! - \b DMA_TRIGGERSOURCE_24
+ //! - \b DMA_TRIGGERSOURCE_25
+ //! - \b DMA_TRIGGERSOURCE_26
+ //! - \b DMA_TRIGGERSOURCE_27
+ //! - \b DMA_TRIGGERSOURCE_28
+ //! - \b DMA_TRIGGERSOURCE_29
+ //! - \b DMA_TRIGGERSOURCE_30
+ //! - \b DMA_TRIGGERSOURCE_31
+ uint8_t triggerSourceSelect;
+ //! Is the specified size of transfers.
+ //! \n Valid values are:
+ //! - \b DMA_SIZE_SRCWORD_DSTWORD [Default]
+ //! - \b DMA_SIZE_SRCBYTE_DSTWORD
+ //! - \b DMA_SIZE_SRCWORD_DSTBYTE
+ //! - \b DMA_SIZE_SRCBYTE_DSTBYTE
+ uint8_t transferUnitSelect;
+ //! Is the type of trigger that the trigger signal needs to be to start a
+ //! transfer.
+ //! \n Valid values are:
+ //! - \b DMA_TRIGGER_RISINGEDGE [Default]
+ //! - \b DMA_TRIGGER_HIGH - A trigger would be a high signal from the
+ //! trigger source, to be held high through the length of the
+ //! transfer(s).
+ uint8_t triggerTypeSelect;
+} DMA_initParam;
+
+
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the triggerSourceSelect
+// parameter for functions: DMA_init(); the param parameter for functions:
+// DMA_init().
+//
+//*****************************************************************************
+#define DMA_TRIGGERSOURCE_0 (0x00)
+#define DMA_TRIGGERSOURCE_1 (0x01)
+#define DMA_TRIGGERSOURCE_2 (0x02)
+#define DMA_TRIGGERSOURCE_3 (0x03)
+#define DMA_TRIGGERSOURCE_4 (0x04)
+#define DMA_TRIGGERSOURCE_5 (0x05)
+#define DMA_TRIGGERSOURCE_6 (0x06)
+#define DMA_TRIGGERSOURCE_7 (0x07)
+#define DMA_TRIGGERSOURCE_8 (0x08)
+#define DMA_TRIGGERSOURCE_9 (0x09)
+#define DMA_TRIGGERSOURCE_10 (0x0A)
+#define DMA_TRIGGERSOURCE_11 (0x0B)
+#define DMA_TRIGGERSOURCE_12 (0x0C)
+#define DMA_TRIGGERSOURCE_13 (0x0D)
+#define DMA_TRIGGERSOURCE_14 (0x0E)
+#define DMA_TRIGGERSOURCE_15 (0x0F)
+#define DMA_TRIGGERSOURCE_16 (0x10)
+#define DMA_TRIGGERSOURCE_17 (0x11)
+#define DMA_TRIGGERSOURCE_18 (0x12)
+#define DMA_TRIGGERSOURCE_19 (0x13)
+#define DMA_TRIGGERSOURCE_20 (0x14)
+#define DMA_TRIGGERSOURCE_21 (0x15)
+#define DMA_TRIGGERSOURCE_22 (0x16)
+#define DMA_TRIGGERSOURCE_23 (0x17)
+#define DMA_TRIGGERSOURCE_24 (0x18)
+#define DMA_TRIGGERSOURCE_25 (0x19)
+#define DMA_TRIGGERSOURCE_26 (0x1A)
+#define DMA_TRIGGERSOURCE_27 (0x1B)
+#define DMA_TRIGGERSOURCE_28 (0x1C)
+#define DMA_TRIGGERSOURCE_29 (0x1D)
+#define DMA_TRIGGERSOURCE_30 (0x1E)
+#define DMA_TRIGGERSOURCE_31 (0x1F)
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the param parameter for
+// functions: DMA_init(); the transferModeSelect parameter for functions:
+// DMA_init().
+//
+//*****************************************************************************
+#define DMA_TRANSFER_SINGLE (DMADT_0)
+#define DMA_TRANSFER_BLOCK (DMADT_1)
+#define DMA_TRANSFER_BURSTBLOCK (DMADT_2)
+#define DMA_TRANSFER_REPEATED_SINGLE (DMADT_4)
+#define DMA_TRANSFER_REPEATED_BLOCK (DMADT_5)
+#define DMA_TRANSFER_REPEATED_BURSTBLOCK (DMADT_6)
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the channelSelect parameter
+// for functions: DMA_init(), DMA_setTransferSize(), DMA_getTransferSize(),
+// DMA_setSrcAddress(), DMA_setDstAddress(), DMA_enableTransfers(),
+// DMA_disableTransfers(), DMA_startTransfer(), DMA_enableInterrupt(),
+// DMA_disableInterrupt(), DMA_getInterruptStatus(), DMA_clearInterrupt(),
+// DMA_getNMIAbortStatus(), and DMA_clearNMIAbort(); the param parameter for
+// functions: DMA_init().
+//
+//*****************************************************************************
+#define DMA_CHANNEL_0 (0x00)
+#define DMA_CHANNEL_1 (0x10)
+#define DMA_CHANNEL_2 (0x20)
+#define DMA_CHANNEL_3 (0x30)
+#define DMA_CHANNEL_4 (0x40)
+#define DMA_CHANNEL_5 (0x50)
+#define DMA_CHANNEL_6 (0x60)
+#define DMA_CHANNEL_7 (0x70)
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the triggerTypeSelect
+// parameter for functions: DMA_init(); the param parameter for functions:
+// DMA_init().
+//
+//*****************************************************************************
+#define DMA_TRIGGER_RISINGEDGE (!(DMALEVEL))
+#define DMA_TRIGGER_HIGH (DMALEVEL)
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the transferUnitSelect
+// parameter for functions: DMA_init(); the param parameter for functions:
+// DMA_init().
+//
+//*****************************************************************************
+#define DMA_SIZE_SRCWORD_DSTWORD (!(DMASRCBYTE + DMADSTBYTE))
+#define DMA_SIZE_SRCBYTE_DSTWORD (DMASRCBYTE)
+#define DMA_SIZE_SRCWORD_DSTBYTE (DMADSTBYTE)
+#define DMA_SIZE_SRCBYTE_DSTBYTE (DMASRCBYTE + DMADSTBYTE)
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the directionSelect parameter
+// for functions: DMA_setSrcAddress(), and DMA_setDstAddress().
+//
+//*****************************************************************************
+#define DMA_DIRECTION_UNCHANGED (DMASRCINCR_0)
+#define DMA_DIRECTION_DECREMENT (DMASRCINCR_2)
+#define DMA_DIRECTION_INCREMENT (DMASRCINCR_3)
+
+//*****************************************************************************
+//
+// The following are values that can be passed toThe following are values that
+// can be returned by the DMA_getInterruptStatus() function.
+//
+//*****************************************************************************
+#define DMA_INT_INACTIVE (0x0)
+#define DMA_INT_ACTIVE (DMAIFG)
+
+//*****************************************************************************
+//
+// The following are values that can be passed toThe following are values that
+// can be returned by the DMA_getNMIAbortStatus() function.
+//
+//*****************************************************************************
+#define DMA_NOTABORTED (0x0)
+#define DMA_ABORTED (DMAABORT)
+
+//*****************************************************************************
+//
+// Prototypes for the APIs.
+//
+//*****************************************************************************
+
+//*****************************************************************************
+//
+//! \brief Initializes the specified DMA channel.
+//!
+//! This function initializes the specified DMA channel. Upon successful
+//! completion of initialization of the selected channel the control registers
+//! will be cleared and the given variables will be set. Please note, if
+//! transfers have been enabled with the enableTransfers() function, then a
+//! call to disableTransfers() is necessary before re-initialization. Also
+//! note, that the trigger sources are device dependent and can be found in the
+//! device family data sheet. The amount of DMA channels available are also
+//! device specific.
+//!
+//! \param param is the pointer to struct for initialization.
+//!
+//! \return STATUS_SUCCESS or STATUS_FAILURE of the initialization process.
+//
+//*****************************************************************************
+extern void DMA_init(DMA_initParam *param);
+
+//*****************************************************************************
+//
+//! \brief Sets the specified amount of transfers for the selected DMA channel.
+//!
+//! This function sets the specified amount of transfers for the selected DMA
+//! channel without having to reinitialize the DMA channel.
+//!
+//! \param channelSelect is the specified channel to set source address
+//! direction for.
+//! Valid values are:
+//! - \b DMA_CHANNEL_0
+//! - \b DMA_CHANNEL_1
+//! - \b DMA_CHANNEL_2
+//! - \b DMA_CHANNEL_3
+//! - \b DMA_CHANNEL_4
+//! - \b DMA_CHANNEL_5
+//! - \b DMA_CHANNEL_6
+//! - \b DMA_CHANNEL_7
+//! \param transferSize is the amount of transfers to complete in a block
+//! transfer mode, as well as how many transfers to complete before the
+//! interrupt flag is set. Valid value is between 1-65535, if 0, no
+//! transfers will occur.
+//! \n Modified bits are \b DMAxSZ of \b DMAxSZ register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void DMA_setTransferSize(uint8_t channelSelect,
+ uint16_t transferSize);
+
+//*****************************************************************************
+//
+//! \brief Gets the amount of transfers for the selected DMA channel.
+//!
+//! This function gets the amount of transfers for the selected DMA channel
+//! without having to reinitialize the DMA channel.
+//!
+//! \param channelSelect is the specified channel to set source address
+//! direction for.
+//! Valid values are:
+//! - \b DMA_CHANNEL_0
+//! - \b DMA_CHANNEL_1
+//! - \b DMA_CHANNEL_2
+//! - \b DMA_CHANNEL_3
+//! - \b DMA_CHANNEL_4
+//! - \b DMA_CHANNEL_5
+//! - \b DMA_CHANNEL_6
+//! - \b DMA_CHANNEL_7
+//!
+//! \return the amount of transfers
+//
+//*****************************************************************************
+extern uint16_t DMA_getTransferSize(uint8_t channelSelect);
+
+//*****************************************************************************
+//
+//! \brief Sets source address and the direction that the source address will
+//! move after a transfer.
+//!
+//! This function sets the source address and the direction that the source
+//! address will move after a transfer is complete. It may be incremented,
+//! decremented or unchanged.
+//!
+//! \param channelSelect is the specified channel to set source address
+//! direction for.
+//! Valid values are:
+//! - \b DMA_CHANNEL_0
+//! - \b DMA_CHANNEL_1
+//! - \b DMA_CHANNEL_2
+//! - \b DMA_CHANNEL_3
+//! - \b DMA_CHANNEL_4
+//! - \b DMA_CHANNEL_5
+//! - \b DMA_CHANNEL_6
+//! - \b DMA_CHANNEL_7
+//! \param srcAddress is the address of where the data will be transferred
+//! from.
+//! \n Modified bits are \b DMAxSA of \b DMAxSA register.
+//! \param directionSelect is the specified direction of the source address
+//! after a transfer.
+//! Valid values are:
+//! - \b DMA_DIRECTION_UNCHANGED
+//! - \b DMA_DIRECTION_DECREMENT
+//! - \b DMA_DIRECTION_INCREMENT
+//! \n Modified bits are \b DMASRCINCR of \b DMAxCTL register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void DMA_setSrcAddress(uint8_t channelSelect,
+ uint32_t srcAddress,
+ uint16_t directionSelect);
+
+//*****************************************************************************
+//
+//! \brief Sets the destination address and the direction that the destination
+//! address will move after a transfer.
+//!
+//! This function sets the destination address and the direction that the
+//! destination address will move after a transfer is complete. It may be
+//! incremented, decremented, or unchanged.
+//!
+//! \param channelSelect is the specified channel to set the destination
+//! address direction for.
+//! Valid values are:
+//! - \b DMA_CHANNEL_0
+//! - \b DMA_CHANNEL_1
+//! - \b DMA_CHANNEL_2
+//! - \b DMA_CHANNEL_3
+//! - \b DMA_CHANNEL_4
+//! - \b DMA_CHANNEL_5
+//! - \b DMA_CHANNEL_6
+//! - \b DMA_CHANNEL_7
+//! \param dstAddress is the address of where the data will be transferred to.
+//! \n Modified bits are \b DMAxDA of \b DMAxDA register.
+//! \param directionSelect is the specified direction of the destination
+//! address after a transfer.
+//! Valid values are:
+//! - \b DMA_DIRECTION_UNCHANGED
+//! - \b DMA_DIRECTION_DECREMENT
+//! - \b DMA_DIRECTION_INCREMENT
+//! \n Modified bits are \b DMADSTINCR of \b DMAxCTL register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void DMA_setDstAddress(uint8_t channelSelect,
+ uint32_t dstAddress,
+ uint16_t directionSelect);
+
+//*****************************************************************************
+//
+//! \brief Enables transfers to be triggered.
+//!
+//! This function enables transfers upon appropriate trigger of the selected
+//! trigger source for the selected channel.
+//!
+//! \param channelSelect is the specified channel to enable transfer for.
+//! Valid values are:
+//! - \b DMA_CHANNEL_0
+//! - \b DMA_CHANNEL_1
+//! - \b DMA_CHANNEL_2
+//! - \b DMA_CHANNEL_3
+//! - \b DMA_CHANNEL_4
+//! - \b DMA_CHANNEL_5
+//! - \b DMA_CHANNEL_6
+//! - \b DMA_CHANNEL_7
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void DMA_enableTransfers(uint8_t channelSelect);
+
+//*****************************************************************************
+//
+//! \brief Disables transfers from being triggered.
+//!
+//! This function disables transfer from being triggered for the selected
+//! channel. This function should be called before any re-initialization of the
+//! selected DMA channel.
+//!
+//! \param channelSelect is the specified channel to disable transfers for.
+//! Valid values are:
+//! - \b DMA_CHANNEL_0
+//! - \b DMA_CHANNEL_1
+//! - \b DMA_CHANNEL_2
+//! - \b DMA_CHANNEL_3
+//! - \b DMA_CHANNEL_4
+//! - \b DMA_CHANNEL_5
+//! - \b DMA_CHANNEL_6
+//! - \b DMA_CHANNEL_7
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void DMA_disableTransfers(uint8_t channelSelect);
+
+//*****************************************************************************
+//
+//! \brief Starts a transfer if using the default trigger source selected in
+//! initialization.
+//!
+//! This functions triggers a transfer of data from source to destination if
+//! the trigger source chosen from initialization is the DMA_TRIGGERSOURCE_0.
+//! Please note, this function needs to be called for each (repeated-)single
+//! transfer, and when transferAmount of transfers have been complete in
+//! (repeated-)block transfers.
+//!
+//! \param channelSelect is the specified channel to start transfers for.
+//! Valid values are:
+//! - \b DMA_CHANNEL_0
+//! - \b DMA_CHANNEL_1
+//! - \b DMA_CHANNEL_2
+//! - \b DMA_CHANNEL_3
+//! - \b DMA_CHANNEL_4
+//! - \b DMA_CHANNEL_5
+//! - \b DMA_CHANNEL_6
+//! - \b DMA_CHANNEL_7
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void DMA_startTransfer(uint8_t channelSelect);
+
+//*****************************************************************************
+//
+//! \brief Enables the DMA interrupt for the selected channel.
+//!
+//! Enables the DMA interrupt source. Only the sources that are enabled can be
+//! reflected to the processor interrupt; disabled sources have no effect on
+//! the processor. Does not clear interrupt flags.
+//!
+//! \param channelSelect is the specified channel to enable the interrupt for.
+//! Valid values are:
+//! - \b DMA_CHANNEL_0
+//! - \b DMA_CHANNEL_1
+//! - \b DMA_CHANNEL_2
+//! - \b DMA_CHANNEL_3
+//! - \b DMA_CHANNEL_4
+//! - \b DMA_CHANNEL_5
+//! - \b DMA_CHANNEL_6
+//! - \b DMA_CHANNEL_7
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void DMA_enableInterrupt(uint8_t channelSelect);
+
+//*****************************************************************************
+//
+//! \brief Disables the DMA interrupt for the selected channel.
+//!
+//! Disables the DMA interrupt source. Only the sources that are enabled can be
+//! reflected to the processor interrupt; disabled sources have no effect on
+//! the processor.
+//!
+//! \param channelSelect is the specified channel to disable the interrupt for.
+//! Valid values are:
+//! - \b DMA_CHANNEL_0
+//! - \b DMA_CHANNEL_1
+//! - \b DMA_CHANNEL_2
+//! - \b DMA_CHANNEL_3
+//! - \b DMA_CHANNEL_4
+//! - \b DMA_CHANNEL_5
+//! - \b DMA_CHANNEL_6
+//! - \b DMA_CHANNEL_7
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void DMA_disableInterrupt(uint8_t channelSelect);
+
+//*****************************************************************************
+//
+//! \brief Returns the status of the interrupt flag for the selected channel.
+//!
+//! Returns the status of the interrupt flag for the selected channel.
+//!
+//! \param channelSelect is the specified channel to return the interrupt flag
+//! status from.
+//! Valid values are:
+//! - \b DMA_CHANNEL_0
+//! - \b DMA_CHANNEL_1
+//! - \b DMA_CHANNEL_2
+//! - \b DMA_CHANNEL_3
+//! - \b DMA_CHANNEL_4
+//! - \b DMA_CHANNEL_5
+//! - \b DMA_CHANNEL_6
+//! - \b DMA_CHANNEL_7
+//!
+//! \return One of the following:
+//! - \b DMA_INT_INACTIVE
+//! - \b DMA_INT_ACTIVE
+//! \n indicating the status of the current interrupt flag
+//
+//*****************************************************************************
+extern uint16_t DMA_getInterruptStatus(uint8_t channelSelect);
+
+//*****************************************************************************
+//
+//! \brief Clears the interrupt flag for the selected channel.
+//!
+//! This function clears the DMA interrupt flag is cleared, so that it no
+//! longer asserts.
+//!
+//! \param channelSelect is the specified channel to clear the interrupt flag
+//! for.
+//! Valid values are:
+//! - \b DMA_CHANNEL_0
+//! - \b DMA_CHANNEL_1
+//! - \b DMA_CHANNEL_2
+//! - \b DMA_CHANNEL_3
+//! - \b DMA_CHANNEL_4
+//! - \b DMA_CHANNEL_5
+//! - \b DMA_CHANNEL_6
+//! - \b DMA_CHANNEL_7
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void DMA_clearInterrupt(uint8_t channelSelect);
+
+//*****************************************************************************
+//
+//! \brief Returns the status of the NMIAbort for the selected channel.
+//!
+//! This function returns the status of the NMI Abort flag for the selected
+//! channel. If this flag has been set, it is because a transfer on this
+//! channel was aborted due to a interrupt from an NMI.
+//!
+//! \param channelSelect is the specified channel to return the status of the
+//! NMI Abort flag for.
+//! Valid values are:
+//! - \b DMA_CHANNEL_0
+//! - \b DMA_CHANNEL_1
+//! - \b DMA_CHANNEL_2
+//! - \b DMA_CHANNEL_3
+//! - \b DMA_CHANNEL_4
+//! - \b DMA_CHANNEL_5
+//! - \b DMA_CHANNEL_6
+//! - \b DMA_CHANNEL_7
+//!
+//! \return One of the following:
+//! - \b DMA_NOTABORTED
+//! - \b DMA_ABORTED
+//! \n indicating the status of the NMIAbort for the selected channel
+//
+//*****************************************************************************
+extern uint16_t DMA_getNMIAbortStatus(uint8_t channelSelect);
+
+//*****************************************************************************
+//
+//! \brief Clears the status of the NMIAbort to proceed with transfers for the
+//! selected channel.
+//!
+//! This function clears the status of the NMI Abort flag for the selected
+//! channel to allow for transfers on the channel to continue.
+//!
+//! \param channelSelect is the specified channel to clear the NMI Abort flag
+//! for.
+//! Valid values are:
+//! - \b DMA_CHANNEL_0
+//! - \b DMA_CHANNEL_1
+//! - \b DMA_CHANNEL_2
+//! - \b DMA_CHANNEL_3
+//! - \b DMA_CHANNEL_4
+//! - \b DMA_CHANNEL_5
+//! - \b DMA_CHANNEL_6
+//! - \b DMA_CHANNEL_7
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void DMA_clearNMIAbort(uint8_t channelSelect);
+
+//*****************************************************************************
+//
+//! \brief Disables the DMA from stopping the CPU during a Read-Modify-Write
+//! Operation to start a transfer.
+//!
+//! This function allows the CPU to finish any read-modify-write operations it
+//! may be in the middle of before transfers of and DMA channel stop the CPU.
+//!
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void DMA_disableTransferDuringReadModifyWrite(void);
+
+//*****************************************************************************
+//
+//! \brief Enables the DMA to stop the CPU during a Read-Modify-Write Operation
+//! to start a transfer.
+//!
+//! This function allows the DMA to stop the CPU in the middle of a read-
+//! modify-write operation to transfer data.
+//!
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void DMA_enableTransferDuringReadModifyWrite(void);
+
+//*****************************************************************************
+//
+//! \brief Enables Round Robin prioritization.
+//!
+//! This function enables Round Robin Prioritization of DMA channels. In the
+//! case of Round Robin Prioritization, the last DMA channel to have
+//! transferred data then has the last priority, which comes into play when
+//! multiple DMA channels are ready to transfer at the same time.
+//!
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void DMA_enableRoundRobinPriority(void);
+
+//*****************************************************************************
+//
+//! \brief Disables Round Robin prioritization.
+//!
+//! This function disables Round Robin Prioritization, enabling static
+//! prioritization of the DMA channels. In static prioritization, the DMA
+//! channels are prioritized with the lowest DMA channel index having the
+//! highest priority (i.e. DMA Channel 0 has the highest priority).
+//!
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void DMA_disableRoundRobinPriority(void);
+
+//*****************************************************************************
+//
+//! \brief Enables a NMI to interrupt a DMA transfer.
+//!
+//! This function allow NMI's to interrupting any DMA transfer currently in
+//! progress and stops any future transfers to begin before the NMI is done
+//! processing.
+//!
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void DMA_enableNMIAbort(void);
+
+//*****************************************************************************
+//
+//! \brief Disables any NMI from interrupting a DMA transfer.
+//!
+//! This function disables NMI's from interrupting any DMA transfer currently
+//! in progress.
+//!
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void DMA_disableNMIAbort(void);
+
+//*****************************************************************************
+//
+// Mark the end of the C bindings section for C++ compilers.
+//
+//*****************************************************************************
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+#endif // __MSP430WARE_DMA_H__
diff --git a/Apps/FlightSoftware/MotorControl/driverlib/driverlib.h b/Apps/FlightSoftware/MotorControl/driverlib/driverlib.h
new file mode 100644
index 000000000..9f3f87e7c
--- /dev/null
+++ b/Apps/FlightSoftware/MotorControl/driverlib/driverlib.h
@@ -0,0 +1,67 @@
+/* --COPYRIGHT--,BSD
+ * Copyright (c) 2017, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * --/COPYRIGHT--*/
+#include "inc/hw_memmap.h"
+
+#include "hspll.h"
+#include "sysctl.h"
+#include "dma.h"
+#include "eusci_b_i2c.h"
+#include "rtc_b.h"
+#include "crc.h"
+#include "adc12_b.h"
+#include "esi.h"
+#include "saph.h"
+#include "cs.h"
+#include "ram.h"
+#include "mpy32.h"
+#include "crc32.h"
+#include "comp_e.h"
+#include "framctl.h"
+#include "aes256.h"
+#include "sfr.h"
+#include "wdt_a.h"
+#include "timer_a.h"
+#include "pmm.h"
+#include "rtc_c.h"
+#include "uups.h"
+#include "framctl_a.h"
+#include "eusci_a_uart.h"
+#include "gpio.h"
+#include "mpu.h"
+#include "tlv.h"
+#include "sdhs.h"
+#include "eusci_a_spi.h"
+#include "timer_b.h"
+#include "ref_a.h"
+#include "eusci_b_spi.h"
+#include "mtif.h"
+#include "lcd_c.h"
diff --git a/Apps/FlightSoftware/MotorControl/driverlib/esi.c b/Apps/FlightSoftware/MotorControl/driverlib/esi.c
new file mode 100644
index 000000000..a1c03fba6
--- /dev/null
+++ b/Apps/FlightSoftware/MotorControl/driverlib/esi.c
@@ -0,0 +1,1445 @@
+/* --COPYRIGHT--,BSD
+ * Copyright (c) 2017, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * --/COPYRIGHT--*/
+//*****************************************************************************
+//
+// esi.h - Driver for the ESI Module.
+//
+//*****************************************************************************
+
+//*****************************************************************************
+//
+//! \addtogroup esi_api esi
+//! @{
+//
+//*****************************************************************************
+
+#include "inc/hw_memmap.h"
+
+#ifdef __MSP430_HAS_ESI__
+#include "esi.h"
+
+#include
+
+// Uncomment for finding lower peak of the lower half cycle.
+// This required to set ESI comparator output as inverted
+#define INVERTED
+
+static uint16_t measureESIOSC(void);
+static void FindDAC(uint8_t selected_channel, uint8_t software_trigger);
+
+const ESI_AFE1_InitParams ESI_AFE1_INITPARAMS_DEFAULT = {ESI_EXCITATION_CIRCUIT_DISABLED,
+ ESI_SAMPLE_HOLD_DISABLED,
+ ESI_MID_VOLTAGE_GENERATOR_DISABLED,
+ ESI_SAMPLE_HOLD_VSS_TO_ESIVSS,
+ ESI_INVERTER_FOR_AFE1_DISABLE
+ };
+
+const ESI_AFE2_InitParams ESI_AFE2_INITPARAMS_DEFAULT = {
+ ESI_AFE2_INPUT_SELECT_CHx,
+ ESI_INVERTER_FOR_AFE2_DISABLE,
+ ESI_TSM_COMPARATOR_CONTROL_AFE2_DISABLE,
+ ESI_TSM_DAC_CONTROL_AFE2_DISABLE
+ };
+
+const ESI_TSM_InitParams ESI_TSM_INITPARAMS_DEFAULT = { ESI_TSM_SMCLK_DIV_1,
+ ESI_TSM_ACLK_DIV_1,
+ ESI_TSM_START_TRIGGER_DIV_2,
+ ESI_TSM_REPEAT_NEW_TRIGGER,
+ ESI_TSM_STOP_SEQUENCE,
+ ESI_TSM_HIGH_FREQ_CLK_FUNCTION_ON
+ };
+
+const ESI_PSM_InitParams ESI_PSM_INITPARAMS_DEFAULT = { ESI_PSM_Q6_DISABLE,
+ ESI_PSM_Q7_TRIGGER_DISABLE,
+ ESI_PSM_CNT0_DISABLE,
+ ESI_PSM_CNT0_RESET,
+ ESI_PSM_CNT1_DISABLE,
+ ESI_PSM_CNT1_RESET,
+ ESI_PSM_CNT2_DISABLE,
+ ESI_PSM_CNT2_RESET,
+ ESI_PSM_S3_SELECT,
+ ESI_PSM_TEST4_IS_Q2,
+ };
+
+//*****************************************************************************
+//
+//! Get ESI PSM Counter 0 Value
+//!
+//! This function reads the ESI Counter 0 register
+//!
+//! \return Counter value
+//
+//*****************************************************************************
+uint16_t ESI_getCounter0(void)
+{
+ return (ESICNT0);
+}
+
+//*****************************************************************************
+//
+//! Get ESI PSM Counter 1 Value
+//!
+//! This function reads the ESI Counter1 register
+//!
+//! \return Counter value
+//
+//*****************************************************************************
+uint16_t ESI_getCounter1(void)
+{
+ return (ESICNT1);
+}
+
+//*****************************************************************************
+//
+//! Get ESI PSM Counter 2 Value
+//!
+//! This function reads the ESI Counter2 register
+//!
+//! \return Counter value
+//
+//*****************************************************************************
+uint16_t ESI_getCounter2(void)
+{
+ return (ESICNT2);
+}
+
+//*****************************************************************************
+//
+//! Get ESI PSM Oscillator Counter Value
+//!
+//! This function reads the ESI Oscillator Counter register
+//!
+//! \return Counter value
+//
+//*****************************************************************************
+uint16_t ESI_getOscCounter(void)
+{
+ return (ESICNT3);
+}
+
+//*****************************************************************************
+//
+//! Initializes the ESI analog front end AFE1
+//!
+//! \param params is ESI_AFE1_InitParams struct
+//!
+//! This functions initializes the ESI analog front end AFE1.
+//!
+//! \return None
+//
+//*****************************************************************************
+
+void ESI_AFE1_init (ESI_AFE1_InitParams *params)
+{
+ // Unset the AFE1 bits
+ ESIAFE &= ~(ESITEN + ESISH + ESIVCC2 + ESIVSS + ESICACI3 + ESICISEL +
+ ESICA1X + ESICA1INV);
+ ESIAFE |=
+ params->excitationCircuitSelect +
+ params->sampleAndHoldSelect +
+ params->midVoltageGeneratorSelect +
+ params->sampleAndHoldVSSConnect +
+ params->inverterSelectOutputAFE1
+ ;
+
+ switch(params->inputSelectAFE1) {
+ case ESI_AFE1_INPUT_SELECT_CHx:
+ break;
+ case ESI_AFE1_INPUT_SELECT_CIx:
+ ESIAFE |= ESICA1X;
+ break;
+ case ESI_AFE1_INPUT_SELECT_CI3:
+ ESIAFE |= ESICA1X;
+ ESIAFE &= ~ESICISEL;
+ ESIAFE |= ESICACI3;
+ break;
+ case ESI_AFE1_INPUT_SELECT_CI:
+ ESIAFE |= ESICA1X;
+ ESIAFE |= ESICISEL;
+ break;
+ default:
+ break;
+ }
+}
+
+//*****************************************************************************
+//
+//! Initializes the ESI analog front end - AFE2
+//!
+//! \param params is ESI_AFE2_InitParams struct
+//!
+//! This functions initializes the ESI analog front end AFE2
+//!
+//! \return None
+//
+//*****************************************************************************
+
+void ESI_AFE2_init (ESI_AFE2_InitParams *params)
+{
+ // Unset the AFE2 bits
+ ESIAFE &= ~(ESICA2X + ESICA2INV + ESICA2EN + ESIDAC2EN);
+
+ ESIAFE |=
+ params->inputSelectAFE2 +
+ params->inverterSelectOutputAFE2 +
+ params->tsmControlComparatorAFE2 +
+ params->tsmControlDacAFE2
+ ;
+
+}
+
+//*****************************************************************************
+//
+//! Reads the latched comparator outputs form the AFEs
+//!
+//! \param channelSelect. Valid values are
+//! ESI_AFE1_CHANNEL0_SELECT
+//! ESI_AFE1_CHANNEL1_SELECT
+//! ESI_AFE1_CHANNEL2_SELECT
+//! ESI_AFE1_CHANNEL3_SELECT
+//! ESI_AFE2_CHANNEL0_SELECT
+//! ESI_AFE2_CHANNEL1_SELECT
+//! ESI_AFE2_CHANNEL2_SELECT
+//! ESI_AFE2_CHANNEL3_SELECT
+//! ESI_AFE1_TEST_CHANNEL0_SELECT
+//! ESI_AFE1_TEST_CHANNEL1_SELECT
+//!
+//! This function gets the ESIPPU register to get latched output values of the
+//! comparator outputs for AFE1 and AFE2
+//!
+//! \return Valid values are
+//! ESI_AFE_OUTPUT_LOW
+//! ESI_AFE_OUTPUT_HIGH
+//
+//*****************************************************************************
+uint16_t ESI_getLatchedComparatorOutput (
+ uint16_t channelSelect)
+{
+ uint16_t result;
+
+ result = ESIPPU;
+
+ return (result &= channelSelect);
+}
+
+//*****************************************************************************
+//
+//! Initializes the TSM
+//!
+//! \param params is ESI_TSM_InitParams struct
+//!
+//! This function initializes the TSM.
+//!
+//! \return None
+//
+//*****************************************************************************
+
+void ESI_TSM_init (ESI_TSM_InitParams *params)
+{
+ ESITSM =
+ params->smclkDivider +
+ params->aclkDivider +
+ params->startTriggerAclkDivider +
+ params->repeatMode +
+ params->startTriggerSelection +
+ params->tsmFunctionSelection
+ ;
+
+}
+
+//*****************************************************************************
+//
+//! Clear TSM entries
+//!
+//! This function clears all TSM entries
+//!
+//! \return None
+//
+//*****************************************************************************
+void ESI_TSM_clearTable(void)
+{
+ uint16_t *pTsm, i;
+
+ // Clear TSM Table (for testing only. not neccessary in real application)
+ pTsm = (uint16_t *)&ESITSM0;
+ for (i=0; i<32; i++)
+ {
+ *pTsm++ = 0x0200;
+ }
+}
+
+//*****************************************************************************
+//
+//! Copy TSM entries
+//!
+//! This function copies all TSM entries
+//!
+//! \return None
+//
+//*****************************************************************************
+void ESI_TSM_copyTable(uint16_t* tsmTable, uint16_t size)
+{
+ uint16_t *pt_tsmTable;
+ uint16_t i;
+
+ // Copy the TSM_Table into ESI TSM registers
+ // Destination pointer
+ pt_tsmTable = (uint16_t *)&ESITSM0;
+ // Divided by 2 because of unsigned integer (2bytes)
+ i = size/2;
+
+ do
+ {
+ *pt_tsmTable++ = *tsmTable++;
+ }while(--i);
+}
+
+//*****************************************************************************
+//
+//! TSM trigger using software
+//!
+//! This function starts a software initiated TSM sequence
+//!
+//! \return None
+//
+//*****************************************************************************
+void ESI_TSM_softwareTrigger(void)
+{
+ ESITSM |= ESISTART;
+}
+
+
+//*****************************************************************************
+//
+//! TSM trigger using software
+//!
+//! This function starts a software initiated TSM sequence
+//!
+//! \return ESIREATx bits from selected stateRegNum
+//
+//*****************************************************************************
+uint8_t ESI_TSM_getTSMStateDuration(uint8_t stateRegNum)
+{
+ volatile uint16_t* stateRegBase = (volatile uint16_t*)&ESITSM0;
+
+ return (*(stateRegBase + stateRegNum) & 0xf800) >> 11;
+}
+
+//*****************************************************************************
+//
+//! TSM trigger using software
+//!
+//! This function starts a software initiated TSM sequence
+//!
+//! \return ESIREATx bits from selected stateRegNum
+//
+//*****************************************************************************
+void ESI_TSM_setTSMStateDuration(uint8_t stateRegNum, uint8_t duration)
+{
+ assert(stateRegNum <= ESI_TSM_STATE_REG_31);
+ assert(duration <= ESI_TSM_STATE_DURATION_MAX);
+
+ volatile uint16_t* stateRegBase = (volatile uint16_t*)&ESITSM0;
+
+ *(stateRegBase + stateRegNum) &= ~0xF800;
+
+ *(stateRegBase + stateRegNum) |= (duration << 11);
+}
+
+
+//*****************************************************************************
+//
+//! Initialize Processing State Machine
+//
+//! \param params is ESI_PSM_InitParams struct
+//!
+//! This function initializes the PSM registers.
+//!
+//! \return None
+//
+//*****************************************************************************
+void ESI_PSM_init (ESI_PSM_InitParams *params)
+{
+ ESIPSM =
+ params->Q6Select +
+ params->Q7TriggerSelect +
+ params->count0Select +
+ params->count0Reset +
+ params->count1Select +
+ params->count1Reset +
+ params->count2Select +
+ params->count2Reset +
+ params->V2Select +
+ params->TEST4Select
+ ;
+}
+
+//*****************************************************************************
+//
+//! Clear PSM entries
+//!
+//! This function clears all PSM entries
+//!
+//! \return None
+//
+//*****************************************************************************
+void ESI_PSM_clearTable(void)
+{
+ uint8_t *pPsm, i;
+
+ // Clear TSM Table (for testing only. not neccessary in real application)
+ pPsm = (uint8_t *)&ESIRAM0;
+ for (i=0; i<128; i++)
+ {
+ *pPsm++ = 0x0;
+ }
+}
+
+//*****************************************************************************
+//
+//! Copy PSM entries
+//!
+//! This function copies all PSM entries
+//!
+//! \return None
+//
+//*****************************************************************************
+void ESI_PSM_copyTable(uint8_t* psmTable, uint8_t size)
+{
+ uint8_t *pt_psmTable;
+ uint8_t i;
+
+ assert(size<=128);
+
+ // Copy the TSM_Table into ESI TSM registers
+ pt_psmTable = (uint8_t *)&ESIRAM0; // Destination pointer
+ i = size;
+
+ do
+ {
+ *pt_psmTable++ = *psmTable++;
+ }while(--i);
+}
+
+//*****************************************************************************
+//
+//! Reset PSM counters
+//!
+//! \param counterToReset is the counter that needs t be reset
+//!
+//! This function resets the PSM counters
+//!
+//! \return None
+//
+//*****************************************************************************
+void ESI_PSM_resetCounter (uint16_t counterToReset)
+{
+ ESIPSM |= counterToReset;
+}
+
+//*****************************************************************************
+//
+//! Enables the internal Oscillator
+//!
+//!
+//! This function enables the high frequency internal oscillator
+//!
+//! \return None
+//
+//*****************************************************************************
+void ESI_enableInternalOscillator(void)
+{
+ ESIOSC |= ESIHFSEL;
+}
+
+//*****************************************************************************
+//
+//! Disables the internal Oscillator
+//!
+//!
+//! This function disables the high frequency internal oscillator
+//!
+//! \return None
+//
+//*****************************************************************************
+void ESI_disableInternalOscillator(void)
+{
+ ESIOSC &= ~ESIHFSEL;
+}
+
+//*****************************************************************************
+//
+//! Connects comparator output to timerA input
+//!
+//! \param counterToReset ESI_TIMERA_INPUT_TSM_COMPOUT or
+//! ESI_TIMERA_INPUT_TSM_PPUSRC
+//!
+//! This function connects the chosen comparator output to TimerA
+//!
+//! \return None
+//
+//*****************************************************************************
+void ESI_timerAInputSelect(uint16_t select)
+{
+ ESICTL |= select;
+}
+
+//*****************************************************************************
+//
+//! Connects psm source to comparator output
+//!
+//! \param sourceNum PSM_S1_SOURCE, PSM_S2_SOURCE or PSM_S3_SOURCE
+//! \param sourceSelect can have the following values
+//! ESI_PSM_SOURCE_IS_ESIOUT0
+//! ESI_PSM_SOURCE_IS_ESIOUT1
+//! ESI_PSM_SOURCE_IS_ESIOUT2
+//! ESI_PSM_SOURCE_IS_ESIOUT3
+//! ESI_PSM_SOURCE_IS_ESIOUT4
+//! ESI_PSM_SOURCE_IS_ESIOUT5
+//! ESI_PSM_SOURCE_IS_ESIOUT6
+//! ESI_PSM_SOURCE_IS_ESIOUT7
+//!
+//! This function connects the chosen comparator output to TimerA
+//!
+//! \return None
+//
+//*****************************************************************************
+void ESI_psmSourceSelect(uint16_t sourceNum, uint16_t sourceSelect)
+{
+ switch(sourceNum) {
+ case PSM_S1_SOURCE:
+ ESICTL &= ~(ESIS1SEL0|ESIS1SEL1|ESIS1SEL2);
+ ESICTL |= (sourceSelect << 7);
+ break;
+ case PSM_S2_SOURCE:
+ ESICTL &= ~(ESIS2SEL0|ESIS2SEL1|ESIS2SEL2);
+ ESICTL |= (sourceSelect << 10);
+ break;
+ case PSM_S3_SOURCE:
+ ESICTL &= ~(ESIS3SEL0|ESIS3SEL1|ESIS3SEL2);
+ ESICTL |= (sourceSelect << 13);
+ break;
+ default:
+ break;
+ }
+}
+
+//*****************************************************************************
+//
+//! Connects testChannel0 to comparator input
+//!
+//! \param sourceSelect can have the following values
+//! ESI_TEST_CHANNEL0_SOURCE_IS_CH0_CI0
+//! ESI_TEST_CHANNEL0_SOURCE_IS_CH1_CI1
+//! ESI_TEST_CHANNEL0_SOURCE_IS_CH2_CI2
+//! ESI_TEST_CHANNEL0_SOURCE_IS_CH3_CI3
+//!
+//! This function connects the chosen comparator input to the test channel0
+//!
+//! \return None
+//
+//*****************************************************************************
+void ESI_testChannel0SourceSelect(uint16_t sourceSelect)
+{
+ ESICTL &= ~(ESI_TEST_CHANNEL0_SOURCE_IS_CH3_CI3);
+ ESICTL |= sourceSelect;
+}
+
+//*****************************************************************************
+//
+//! Connects testChannel1to comparator input
+//!
+//! \param sourceSelect can have the following values
+//! ESI_TEST_CHANNEL1_SOURCE_IS_CH0_CI0
+//! ESI_TEST_CHANNEL1_SOURCE_IS_CH1_CI1
+//! ESI_TEST_CHANNEL1_SOURCE_IS_CH2_CI2
+//! ESI_TEST_CHANNEL1_SOURCE_IS_CH3_CI3
+//!
+//! This function connects the chosen comparator input to the test channel1
+//!
+//! \return None
+//
+//*****************************************************************************
+void ESI_testChannel1SourceSelect(uint16_t sourceSelect)
+{
+ ESICTL &= ~(ESI_TEST_CHANNEL1_SOURCE_IS_CH3_CI3);
+ ESICTL |= sourceSelect;
+}
+
+//*****************************************************************************
+//
+//! Enable ESI peripheral
+//!
+//! \return None
+//
+//*****************************************************************************
+void ESI_enable(void)
+{
+ ESICTL |= ESIEN;
+}
+
+//*****************************************************************************
+//
+//! Disable ESI peripheral
+//!
+//! \return None
+//
+//*****************************************************************************
+void ESI_disable(void)
+{
+ ESICTL &= ~ESIEN;
+}
+
+//*****************************************************************************
+//
+//! Start calibration on ESI internal Oscillator
+//!
+//! This function starts calibration of internal osciallator. After calling this
+//! function the user and use ESI_adjustInternalOscFreq() to adjust the freq. of
+//! the oscillator.
+//!
+//! \return None
+//
+//*****************************************************************************
+void ESI_startInternalOscCal(void)
+{
+ assert(ESIOSC | ESIHFSEL);
+ ESIOSC |= ESICLKGON;
+}
+
+//*****************************************************************************
+//
+//! Adjusts frequency ESI internal Oscillator
+//!
+//! This function adjusts frequency ESI internal Oscillator. It increases or
+//! decrease the freq by 3% based on incOrDec value.
+//!
+//! \return None
+//
+//*****************************************************************************
+void ESI_adjustInternalOscFreq(uint16_t incOrDec)
+{
+ uint16_t adjustValue;
+
+ assert(ESIOSC | ESIHFSEL);
+
+ adjustValue = ESIOSC >> 8;
+
+
+ if (incOrDec == ESI_INTERNAL_OSC_FREQ_INCREASE) {
+ adjustValue = adjustValue + 1;
+ adjustValue = adjustValue << 8;
+ }
+ else {
+ adjustValue = adjustValue - 1;
+ adjustValue = adjustValue << 8;
+ }
+
+ ESIOSC |= adjustValue;
+}
+
+//*****************************************************************************
+//
+//! Sets frequency of ESI internal Oscillator
+//!
+//!
+//! \return None
+//
+//*****************************************************************************
+void ESI_setNominalInternalOscFreq(void)
+{
+ ESIOSC = ESICLKFQ5 + ESICLKGON + ESIHFSEL;
+}
+
+
+//*****************************************************************************
+//
+//! The following function return the number of ESIOSC cycle during an ACLK
+//! cycle.
+//!
+//!
+//! \return None
+//
+//*****************************************************************************
+static uint16_t measureESIOSC(void){
+
+ uint16_t temp;
+
+ // This and next instruction realizes a clear->set ESICLKGON bit.
+ ESIOSC &= ~(ESICLKGON);
+
+ // This starts measurement.
+ ESIOSC |= ESICLKGON + ESIHFSEL;
+
+ // Get counter value, when measurement has not finished yet, ESICNT3
+ // value is 0x01
+ do
+ {
+ temp = ESICNT3;
+ } while(temp == 0x01);
+
+ // Stop ESIOSC oscillator
+ ESIOSC &= ~(ESICLKGON);
+
+ // returns counter value ESICNT3
+ return temp;
+}
+
+//******************************************************************************
+//! The following function returns the ESICLKFQx bits on ESIOSC register
+//
+//! \param none
+//
+//! \return ESICLKFQ bits only
+//******************************************************************************
+
+uint8_t ESI_getESICLKFQ(void){
+ uint16_t temp;
+
+ // Store ESIOSC content
+ temp = ESIOSC;
+ // Get ESICLKFQx bits
+ temp = (temp>>8) & 0x3F;
+
+ return temp;
+}
+
+//******************************************************************************
+//! The following function sets ESICLKFQx bits on ESIOSC register
+//
+//! \param setting is to the loaded to ESIOSC. Valid parameters a value between
+//! 0x00 and 0x3F. 0x00 corresponds to minimum frequency, 0x20
+//! corresponds to nominal frequency and 0x3F corresponds to maximum
+//! frequency.
+//
+//! \return none
+//******************************************************************************
+void ESI_setESICLKFQ(uint8_t setting)
+{ uint16_t temp;
+
+ assert(setting<0x40);
+
+ temp = ESIOSC; // get actual ESIOSC register content
+ temp &= ~(0x3F00);
+ temp = ((uint16_t) setting << 8) + temp; // and update ESICLKFQ bits
+ ESIOSC = temp;
+
+}
+
+//*****************************************************************************
+//
+//! Calibrate ESI internal Oscillator
+//!
+//!
+//! \return None
+//
+//*****************************************************************************
+void ESI_calibrateInternalOscFreq(uint16_t targetAclkCounts)
+{
+ ESI_setNominalInternalOscFreq();
+
+ ESI_measureESIOSC(ESI_ESIOSC_OVERSAMPLE_4);
+
+ if (ESICNT3 > targetAclkCounts) {
+ //freq is too high
+ do {
+ ESI_adjustInternalOscFreq(ESI_INTERNAL_OSC_FREQ_DECREASE);
+
+ } while (ESI_measureESIOSC(ESI_ESIOSC_OVERSAMPLE_4) > targetAclkCounts);
+
+ }else {
+ //freq is too low
+ do {
+ ESI_adjustInternalOscFreq(ESI_INTERNAL_OSC_FREQ_INCREASE);
+
+ } while (ESI_measureESIOSC(ESI_ESIOSC_OVERSAMPLE_4) > targetAclkCounts);
+ ESI_adjustInternalOscFreq(ESI_INTERNAL_OSC_FREQ_DECREASE);
+ }
+}
+
+//*****************************************************************************
+//
+//! The following function returns an average of ESIOSC measurement.
+//!
+//! \param
+//!
+//! \return averaged ESIOSC measurement.
+//
+//*****************************************************************************
+uint16_t ESI_measureESIOSC(uint8_t oversample){
+ uint8_t i;
+ uint16_t temp=0;
+
+ assert(oversample<9);
+
+ for(i=oversample;i>0;i--){
+ temp += measureESIOSC();
+ }
+
+ temp /= oversample;
+ return temp;
+}
+
+//*****************************************************************************
+//
+//! Set upper threshold for PSM counter 1
+//!
+//! \param threshold is the upper threashold that causes ESIIFG3 to get set.
+//!
+//! This function sets the threshold value for PSM counter 1. ESIIFG3 gets set
+//! when counter value and this threahold are equal.
+//!
+//! \return None
+//
+//*****************************************************************************
+void ESI_setPSMCounter1UpperThreshold(
+ uint16_t threshold)
+{
+ ESITHR1 = threshold;
+}
+
+//*****************************************************************************
+//
+//! Set lower threshold for PSM counter 1
+//!
+//! \param threshold is the lower threashold that causes ESIIFG3 to get set.
+//!
+//! This function set the threshold value for PSM counter 1. ESIIFG3 gets set
+//! when counter value and this threahold are equal.
+//!
+//! \return None
+//
+//*****************************************************************************
+void ESI_setPSMCounter1LowerThreshold(
+ uint16_t threshold)
+{
+ ESITHR2 = threshold;
+}
+
+//*****************************************************************************
+//
+//! sets AFE1 DAC threshold Value
+//!
+//! \param dacValue is value to be written to DAC register.
+//! \param dacRegNum is DAC register number
+//!
+//! Write DAC threshold value into selected DAC register
+//!
+//! \return None
+//
+//*****************************************************************************
+void ESI_setAFE1DACValue(uint16_t dacValue, uint8_t dacRegNum)
+{
+ volatile uint16_t* dacRegBase = (volatile uint16_t*) &ESIDAC1R0;
+ *(dacRegBase + dacRegNum) = dacValue;
+}
+
+//*****************************************************************************
+//
+//! gets AFE1 DAC threshold Value
+//!
+//! \param dacValue is value to be written to DAC register.
+//! \param dacRegNum is DAC register number
+//!
+//! Read DAC threshold value into selected DAC register
+//!
+//! \return DAC value from selected DAC register.
+//
+//*****************************************************************************
+uint16_t ESI_getAFE1DACValue(uint8_t dacRegNum)
+{
+ volatile uint16_t* dacRegBase = (volatile uint16_t*) &ESIDAC1R0;
+ return *(dacRegBase + dacRegNum);
+}
+
+//*****************************************************************************
+//
+//! sets AFE2 DAC threshold Value
+//!
+//! \param dacValue is value to be written to DAC register.
+//! \param dacRegNum is DAC register number
+//!
+//! Write DAC threshold value into selected DAC register
+//!
+//! \return None
+//
+//*****************************************************************************
+void ESI_setAFE2DACValue(uint16_t dacValue, uint8_t dacRegNum)
+{
+ volatile uint16_t* dacRegBase = (volatile uint16_t*) &ESIDAC2R0;
+ *(dacRegBase + dacRegNum) = dacValue;
+}
+
+//*****************************************************************************
+//
+//! gets AFE2 DAC threshold Value
+//!
+//! \param dacValue is value to be written to DAC register.
+//! \param dacRegNum is DAC register number
+//!
+//! Read DAC threshold value into selected DAC register
+//!
+//! \return DAC value from selected DAC register.
+//
+//*****************************************************************************
+uint16_t ESI_getAFE2DACValue(uint8_t dacRegNum)
+{
+ volatile uint16_t* dacRegBase = (volatile uint16_t*) &ESIDAC2R0;
+ return *(dacRegBase + dacRegNum);
+}
+
+//*****************************************************************************
+//
+//! sets TSM state register
+//!
+//! \param params constructs the state value
+//! \param stateRegNum is state register offset
+//!
+//! Sets selected TSM state register.
+//!
+//! \return None
+//
+//*****************************************************************************
+void ESI_setTSMstateReg(ESI_TSM_StateParams *params,
+ uint8_t stateRegNum)
+{
+ volatile uint16_t* stateRegBase = (volatile uint16_t*) &ESITSM0;
+ *(stateRegBase + stateRegNum) =
+ (params->inputChannelSelect +
+ params->LCDampingSelect +
+ params->excitationSelect +
+ params->comparatorSelect +
+ params->highFreqClkOn_or_compAutoZeroCycle +
+ params->outputLatchSelect +
+ params->testCycleSelect +
+ params->dacSelect +
+ params->tsmStop +
+ params->tsmClkSrc) |
+ (params->duration << 11);
+}
+
+//*****************************************************************************
+//
+//! Get ESI interrupt Vector Register
+//!
+//! \return None
+//
+//*****************************************************************************
+uint16_t ESI_getInterruptVectorRegister(void)
+{
+ return (ESIIV);
+}
+
+//*****************************************************************************
+//
+//! Enables ESI interrupts
+//!
+//! \param interruptMask is the bit mask of the interrupt sources to
+//! be enabled. Mask value is the logical OR of any of the following:
+//! \b ESI_INTERRUPT_AFE1_ESIOUTX
+//! \b ESI_INTERRUPT_ESISTOP
+//! \b ESI_INTERRUPT_ESISTART
+//! \b ESI_INTERRUPT_ESICNT1
+//! \b ESI_INTERRUPT_ESICNT2
+//! \b ESI_INTERRUPT_Q6_BIT_SET
+//! \b ESI_INTERRUPT_Q7_BIT_SET
+//! \b ESI_INTERRUPT_ESICNT0_COUNT_INTERVAL
+//! \b ESI_INTERRUPT_AFE2_ESIOUTX
+//!
+//! Modified bits of \b ESIINT1 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+void ESI_enableInterrupt(uint16_t interruptMask)
+{
+ ESIINT1 |= (interruptMask);
+}
+//*****************************************************************************
+//
+//! Disables ESI interrupts
+//!
+//! \param interruptMask is the bit mask of the interrupt sources to
+//! be disabled. Mask value is the logical OR of any of the following:
+//! \b ESI_INTERRUPT_AFE1_ESIOUTX
+//! \b ESI_INTERRUPT_ESISTOP
+//! \b ESI_INTERRUPT_ESISTART
+//! \b ESI_INTERRUPT_ESICNT1
+//! \b ESI_INTERRUPT_ESICNT2
+//! \b ESI_INTERRUPT_Q6_BIT_SET
+//! \b ESI_INTERRUPT_Q7_BIT_SET
+//! \b ESI_INTERRUPT_ESICNT0_COUNT_INTERVAL
+//! \b ESI_INTERRUPT_AFE2_ESIOUTX
+//!
+//! Modified bits of \b ESIINT1 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+void ESI_disableInterrupt(uint16_t interruptMask)
+{
+ ESIINT1 &= ~(interruptMask);
+}
+
+//*****************************************************************************
+//
+//! Get ESI interrupt status
+//!
+//! \param interruptMask is the masked interrupt flag status to be returned.
+//! Mask value is the logical OR of any of the following:
+//! - \b ESI_INTERRUPT_FLAG_AFE1_ESIOUTX
+//! - \b ESI_INTERRUPT_FLAG_ESISTOP
+//! - \b ESI_INTERRUPT_FLAG_ESISTART
+//! - \b ESI_INTERRUPT_FLAG_ESICNT1
+//! - \b ESI_INTERRUPT_FLAG_ESICNT2
+//! - \b ESI_INTERRUPT_FLAG_Q6_BIT_SET
+//! - \b ESI_INTERRUPT_FLAG_Q7_BIT_SET
+//! - \b ESI_INTERRUPT_FLAG_ESICNT0_COUNT_INTERVAL
+//! - \b ESI_INTERRUPT_FLAG_AFE2_ESIOUTX
+//!
+//! \return Logical OR of any of the following:
+//! - \b ESI_INTERRUPT_FLAG_AFE1_ESIOUTX
+//! - \b ESI_INTERRUPT_FLAG_ESISTOP
+//! - \b ESI_INTERRUPT_FLAG_ESISTART
+//! - \b ESI_INTERRUPT_FLAG_ESICNT1
+//! - \b ESI_INTERRUPT_FLAG_ESICNT2
+//! - \b ESI_INTERRUPT_FLAG_Q6_BIT_SET
+//! - \b ESI_INTERRUPT_FLAG_Q7_BIT_SET
+//! - \b ESI_INTERRUPT_FLAG_ESICNT0_COUNT_INTERVAL
+//! - \b ESI_INTERRUPT_FLAG_AFE2_ESIOUTX
+//! \n indicating the status of the masked flags
+//
+//*****************************************************************************
+uint16_t ESI_getInterruptStatus (uint16_t interruptMask)
+{
+ return (ESIINT2 & interruptMask);
+}
+
+//*****************************************************************************
+//
+//! Clear ESI interrupt flag
+//!
+//! \param interruptMask is the masked interrupt flag status to be returned.
+//! Mask value is the logical OR of any of the following:
+//! - \b ESI_INTERRUPT_FLAG_AFE1_ESIOUTX
+//! - \b ESI_INTERRUPT_FLAG_ESISTOP
+//! - \b ESI_INTERRUPT_FLAG_ESISTART
+//! - \b ESI_INTERRUPT_FLAG_ESICNT1
+//! - \b ESI_INTERRUPT_FLAG_ESICNT2
+//! - \b ESI_INTERRUPT_FLAG_Q6_BIT_SET
+//! - \b ESI_INTERRUPT_FLAG_Q7_BIT_SET
+//! - \b ESI_INTERRUPT_FLAG_ESICNT0_COUNT_INTERVAL
+//! - \b ESI_INTERRUPT_FLAG_AFE2_ESIOUTX
+//!
+//! \return None
+//
+//*****************************************************************************
+void ESI_clearInterrupt (uint16_t interruptMask)
+{
+ ESIINT2 &= ~(interruptMask);
+}
+
+//*****************************************************************************
+//
+//! Set source of IFG0 interrupt flag
+//!
+//! \param ifg0Src values are as follows
+//! ESI_IFG0_SET_WHEN_ESIOUT0_SET
+//! ESI_IFG0_SET_WHEN_ESIOUT0_RESET
+//! ESI_IFG0_SET_WHEN_ESIOUT1_SET
+//! ESI_IFG0_SET_WHEN_ESIOUT1_RESET
+//! ESI_IFG0_SET_WHEN_ESIOUT2_SET
+//! ESI_IFG0_SET_WHEN_ESIOUT2_RESET
+//! ESI_IFG0_SET_WHEN_ESIOUT3_SET
+//! ESI_IFG0_SET_WHEN_ESIOUT3_RESET
+//!
+//! \return None
+//
+//*****************************************************************************
+void ESI_setIFG0Source(uint16_t ifg0Src)
+{
+ ESIINT1 &= ~ESI_IFG0_SET_WHEN_ESIOUT3_RESET;
+ ESIINT1 |= ifg0Src;
+}
+
+//*****************************************************************************
+//
+//! Set source of IFG8 interrupt flag
+//!
+//! \param ifg8Src values are as follows
+//! ESI_IFG8_SET_WHEN_ESIOUT4_SET
+//! ESI_IFG8_SET_WHEN_ESIOUT4_RESET
+//! ESI_IFG8_SET_WHEN_ESIOUT5_SET
+//! ESI_IFG8_SET_WHEN_ESIOUT5_RESET
+//! ESI_IFG8_SET_WHEN_ESIOUT6_SET
+//! ESI_IFG8_SET_WHEN_ESIOUT6_RESET
+//! ESI_IFG8_SET_WHEN_ESIOUT7_SET
+//! ESI_IFG8_SET_WHEN_ESIOUT7_RESET
+//!
+//! \return None
+//
+//*****************************************************************************
+void ESI_setIFG8Source(uint16_t ifg8Src)
+{
+ ESIINT1 &= ~ESI_IFG8_SET_WHEN_ESIOUT7_RESET;
+ ESIINT1 |= ifg8Src;
+}
+
+//*****************************************************************************
+//
+//! Set source of IFG7 interrupt flag
+//!
+//! \param ifg7Src values are as follows
+//! ESI_IFG7_SOURCE_EVERY_COUNT_OF_CNT0
+//! ESI_IFG7_SOURCE_CNT0_MOD4
+//! ESI_IFG7_SOURCE_CNT0_MOD256
+//! ESI_IFG7_SOURCE_CNT0_ROLLOVER
+//!
+//! \return None
+//
+//*****************************************************************************
+void ESI_setIFG7Source(uint16_t ifg7Src)
+{
+ ESIINT2 &= ~ESI_IFG7_SOURCE_CNT0_ROLLOVER;
+ ESIINT2 |= ifg7Src;
+}
+
+//*****************************************************************************
+//
+//! Set source of IFG4 interrupt flag
+//!
+//! \param ifg4Src values are as follows
+//! ESI_IFG4_SOURCE_EVERY_COUNT_OF_CNT2
+//! ESI_IFG4_SOURCE_CNT2_MOD4
+//! ESI_IFG4_SOURCE_CNT2_MOD256
+//! ESI_IFG4_SOURCE_CNT2_ROLLOVER
+//!
+//! \return None
+//
+//*****************************************************************************
+void ESI_setIFG4Source(uint16_t ifg4Src)
+{
+ ESIINT2 &= ~ESI_IFG4_SOURCE_CNT2_ROLLOVER;
+ ESIINT2 |= ifg4Src;
+}
+
+
+
+
+//*****************************************************************************
+//
+//! Simple DAC calibration code using pre-defined TSM
+//! Supports AFE1 only.
+//! \param selected_channel acceptable values
+//! ESI_AFE1_CHANNEL0_SELECT
+//! ESI_AFE1_CHANNEL1_SELECT
+//! ESI_AFE1_CHANNEL2_SELECT
+//! ESI_AFE1_CHANNEL3_SELECT
+//!
+//!
+//! \return None
+//
+//*****************************************************************************
+void ESI_LC_DAC_calibration(uint8_t selected_channel)
+{
+#define NUM_SENSOR_CAL 4
+#define MIN_HYSTERESIS 30
+#define STEP_TO_FINISH 4
+
+ unsigned int i;
+ unsigned char test_bit, done;
+ unsigned int hysteresis[NUM_SENSOR_CAL],
+ hysteresis_hi[NUM_SENSOR_CAL],
+ hysteresis_lo[NUM_SENSOR_CAL],
+ current[NUM_SENSOR_CAL],
+ average[NUM_SENSOR_CAL],
+ max[NUM_SENSOR_CAL],
+ min[NUM_SENSOR_CAL];
+
+ // State: 0 = output low
+ // 1 = output high
+ // 2 = undetermined (between 2 hysteresis level)
+ unsigned char previous_state[NUM_SENSOR_CAL],
+ current_state[NUM_SENSOR_CAL],
+ step[NUM_SENSOR_CAL];
+
+ // Reset values
+ for (i = 0; i < NUM_SENSOR_CAL; i++)
+ {
+ max[i] = 0;
+ min[i] = 0xffff;
+ previous_state[i] = 2;
+ step[i] = 0;
+ }
+
+ do
+ {
+ // Find the current oscillating level, using software mode
+ FindDAC(selected_channel, 1);
+
+ test_bit = 1;
+ done = 1;
+
+ for (i = 0; i < NUM_SENSOR_CAL; i++)
+ {
+ // skip if the channel is not selected
+ if (test_bit & selected_channel)
+ {
+ current[i] = ESI_getAFE1DACValue(i*2);
+
+ // Record max and min value
+ if (current[i] > max[i])
+ max[i] = current[i];
+ if (current[i] < min[i])
+ min[i] = current[i];
+
+ // Update average and hysteresis level
+ average[i] = (max[i] + min[i]) >> 1;
+ hysteresis[i] = (max[i] - min[i]) >> 3;
+
+ if (hysteresis[i] < MIN_HYSTERESIS)
+ hysteresis[i] = MIN_HYSTERESIS;
+
+ hysteresis[i] >>= 1;
+ hysteresis_hi[i] = average[i] + hysteresis[i];
+ hysteresis_lo[i] = average[i] - hysteresis[i];
+
+ // Determine output state based on hysteresis_hi and hysteresis_lo
+ if (current[i] < hysteresis_lo[i])
+ current_state[i] = 0;
+ else if (current[i] > hysteresis_hi[i])
+ current_state[i] = 1;
+ else
+ current_state[i] = 2;
+
+ // If there is state change, proceed to next step
+ switch (current_state[i])
+ {
+ case 0:
+ case 1:
+ if (previous_state[i] != current_state[i])
+ {
+ step[i]++;
+ previous_state[i] = current_state[i];
+ }
+ break;
+
+ default:
+ break;
+ }
+
+ // Any selected sensor which has not finished calibration will set done to zero
+ if (step[i] < STEP_TO_FINISH)
+ done = 0;
+ }
+ test_bit <<= 1;
+ }
+ }
+ while (!done);
+
+ // Record DAC Values
+ test_bit = 1;
+ done = ESI_DAC1_REG0; // Temp value for recording DAC
+ for (i = 0; i < NUM_SENSOR_CAL; i++)
+ {
+ if (test_bit & selected_channel)
+ {
+ ESI_setAFE1DACValue(hysteresis_hi[i], done++);
+ ESI_setAFE1DACValue(hysteresis_lo[i], done++);
+ }
+ test_bit <<= 1;
+ }
+}
+
+//*****************************************************************************
+//
+//! Find the current oscillating level, using software mode
+//!
+//!
+//! \return None
+//
+//*****************************************************************************
+
+static void FindDAC(unsigned char selected_channel, unsigned char software_trigger)
+{
+ // DAC Level tester, using successive approximation approach
+ unsigned int DAC_BIT = 0x0800, Prev_DAC_BIT = 0x0C00;
+
+ unsigned int i;
+ unsigned int test_bit, DAC_index;
+
+ // Set initial DAC value for each selected channel
+
+ // AFE 1
+ if (selected_channel & 0x0f)
+ {
+ test_bit = 0x01;
+ DAC_index = ESI_DAC1_REG0;
+ for (i=0; i < 4; i++)
+ {
+ if (selected_channel & test_bit)
+ {
+ ESI_setAFE1DACValue(DAC_BIT, DAC_index++);
+ ESI_setAFE1DACValue(DAC_BIT, DAC_index++);
+ }
+ else
+ {
+ DAC_index += 2;
+ }
+ test_bit <<= 1;
+ }
+ }
+
+ // AFE 2
+ if (selected_channel & 0xf0)
+ {
+ test_bit = 0x10;
+ DAC_index = ESI_DAC2_REG0;
+ for (i=0; i < 4; i++)
+ {
+ if (selected_channel & test_bit)
+ {
+ ESI_setAFE2DACValue(DAC_BIT, DAC_index++);
+ ESI_setAFE2DACValue(DAC_BIT, DAC_index++);
+ }
+ else
+ {
+ DAC_index += 2;
+ }
+ test_bit <<= 1;
+ }
+ }
+
+ ESI_enableInterrupt(ESI_INTERRUPT_ESISTOP); // enable ESISTOP INT
+
+ // Find the DAC value for each selected channel
+ do
+ {
+ ESI_clearInterrupt (ESI_INTERRUPT_FLAG_ESISTOP);
+
+ if (software_trigger)
+ {
+ ESI_TSM_softwareTrigger();
+ }
+
+ __bis_SR_register(LPM3_bits+GIE); // wait for the ESISTOP flag
+ DAC_BIT >>= 1; // right shift one bit
+
+ // AFE 1
+ if (selected_channel & 0x0f)
+ {
+ test_bit = 0x01;
+ DAC_index = ESI_DAC1_REG0;
+ for (i=0; i<4; i++)
+ {
+ if (selected_channel & test_bit)
+ {
+
+#ifndef INVERTED
+ if (ESI_getLatchedComparatorOutput(test_bit) == ESI_AFE_OUTPUT_HIGH)
+#else
+ if (ESI_getLatchedComparatorOutput(test_bit) == ESI_AFE_OUTPUT_LOW)
+#endif
+ {
+ ESI_setAFE1DACValue(ESI_getAFE1DACValue(DAC_index) | DAC_BIT, DAC_index);
+ DAC_index++;
+ ESI_setAFE1DACValue(ESI_getAFE1DACValue(DAC_index) | DAC_BIT, DAC_index);
+ DAC_index++;
+ }
+ else
+ {
+ ESI_setAFE1DACValue(ESI_getAFE1DACValue(DAC_index) ^ Prev_DAC_BIT, DAC_index);
+ DAC_index++;
+ ESI_setAFE1DACValue(ESI_getAFE1DACValue(DAC_index) ^ Prev_DAC_BIT, DAC_index);
+ DAC_index++;
+ }
+ }
+ else
+ {
+ DAC_index += 2;
+ }
+ test_bit <<= 1;
+ }
+ }
+
+ // AFE 2
+ if (selected_channel & 0xf0)
+ {
+ test_bit = 0x10;
+ DAC_index = ESI_DAC2_REG0;
+ for (i=0; i<4; i++)
+ {
+ if (selected_channel & test_bit)
+ {
+#ifndef INVERTED
+ if (ESI_getLatchedComparatorOutput(test_bit) == ESI_AFE_OUTPUT_HIGH)
+#else
+ if (ESI_getLatchedComparatorOutput(test_bit) == ESI_AFE_OUTPUT_LOW)
+#endif
+ {
+ ESI_setAFE1DACValue(ESI_getAFE2DACValue(DAC_index) | DAC_BIT, DAC_index);
+ DAC_index++;
+ ESI_setAFE1DACValue(ESI_getAFE2DACValue(DAC_index) | DAC_BIT, DAC_index);
+ DAC_index++;
+ }
+ else
+ {
+ ESI_setAFE1DACValue(ESI_getAFE2DACValue(DAC_index) ^ Prev_DAC_BIT, DAC_index);
+ DAC_index++;
+ ESI_setAFE1DACValue(ESI_getAFE2DACValue(DAC_index) ^ Prev_DAC_BIT, DAC_index);
+ DAC_index++;
+ }
+ }
+ else
+ {
+ DAC_index += 2;
+ }
+ test_bit <<= 1;
+ }
+ }
+ Prev_DAC_BIT >>= 1; // right shift one bit
+ }
+ while (DAC_BIT);
+
+ ESI_disableInterrupt(ESI_INTERRUPT_ESISTOP);
+ __no_operation();
+}
+
+
+
+//*****************************************************************************
+//
+//! Close the doxygen group for esi_api
+//! @}
+//
+//*****************************************************************************
+#endif
diff --git a/Apps/FlightSoftware/MotorControl/driverlib/esi.h b/Apps/FlightSoftware/MotorControl/driverlib/esi.h
new file mode 100644
index 000000000..fca690ef2
--- /dev/null
+++ b/Apps/FlightSoftware/MotorControl/driverlib/esi.h
@@ -0,0 +1,888 @@
+/* --COPYRIGHT--,BSD
+ * Copyright (c) 2017, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * --/COPYRIGHT--*/
+//*****************************************************************************
+//
+// esi.h - Driver for the ESI Module.
+//
+//*****************************************************************************
+
+#ifndef __MSP430WARE_ESI_H__
+#define __MSP430WARE_ESI_H__
+
+#include "inc/hw_memmap.h"
+
+#ifdef __MSP430_HAS_ESI__
+
+//*****************************************************************************
+//
+// If building with a C++ compiler, make all of the definitions in this header
+// have a C binding.
+//
+//*****************************************************************************
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+uint16_t ESI_getCounter0(void);
+uint16_t ESI_getCounter1(void);
+uint16_t ESI_getCounter2(void);
+uint16_t ESI_getOscCounter(void);
+
+//*****************************************************************************
+//
+//The following are values that can be passed to excitationCircuitSelect
+//parameter in ESI_AFE_InitParams
+//
+//*****************************************************************************
+#define ESI_EXCITATION_CIRCUIT_DISABLED 0x0
+#define ESI_EXCITATION_CIRCUIT_ENABLED ESITEN
+
+//*****************************************************************************
+//
+//The following are values that can be passed to sampleAndHoldSelect
+//parameter in ESI_AFE_InitParams
+//
+//*****************************************************************************
+#define ESI_SAMPLE_HOLD_DISABLED 0x0
+#define ESI_SAMPLE_HOLD_ENABLED ESISH
+
+//*****************************************************************************
+//
+//The following are values that can be passed to midVoltageGeneratorSelect
+//parameter in ESI_AFE_InitParams
+//
+//*****************************************************************************
+#define ESI_MID_VOLTAGE_GENERATOR_DISABLED 0x0
+#define ESI_MID_VOLTAGE_GENERATOR_ENABLED ESIVCC2
+
+//*****************************************************************************
+//
+//The following are values that can be passed to sampleAndHoldVSSConnect
+//parameter in ESI_AFE_InitParams
+//
+//*****************************************************************************
+#define ESI_SAMPLE_HOLD_VSS_TO_ESIVSS 0x0
+#define ESI_SAMPLE_HOLD_VSS_BY_TSM ESIVSS
+
+//*****************************************************************************
+//
+//The following are values that can be passed to
+//inputSelectAFE1 parameter in ESI_AFE1_InitParams
+//
+//*****************************************************************************
+#define ESI_AFE1_INPUT_SELECT_CHx 0
+#define ESI_AFE1_INPUT_SELECT_CIx 1
+#define ESI_AFE1_INPUT_SELECT_CI3 2
+#define ESI_AFE1_INPUT_SELECT_CI 3
+
+//*****************************************************************************
+//
+//The following are values that can be passed to
+//inputSelectAFE2 parameter in ESI_AFE2_InitParams
+//
+//*****************************************************************************
+#define ESI_AFE2_INPUT_SELECT_CHx 0
+#define ESI_AFE2_INPUT_SELECT_CIx ESICA2X
+
+//*****************************************************************************
+//
+//The following are values that can be passed to
+//inverterSelectOutputAFE1 parameter in ESI_AFE1_InitParams
+//
+//*****************************************************************************
+#define ESI_INVERTER_FOR_AFE1_DISABLE 0x0
+#define ESI_INVERTER_FOR_AFE1_ENABLE ESICA1INV
+
+//*****************************************************************************
+//
+//The following are values that can be passed to
+//inverterSelectOutputAFE2 parameter in ESI_AFE2_InitParams
+//
+//*****************************************************************************
+#define ESI_INVERTER_FOR_AFE2_DISABLE 0x0
+#define ESI_INVERTER_FOR_AFE2_ENABLE ESICA2INV
+
+//*****************************************************************************
+//
+//The following are values that can be passed to
+//tsmControlOfComparatorAFE2 parameter in ESI_AFE2_InitParams
+//
+//*****************************************************************************
+#define ESI_TSM_COMPARATOR_CONTROL_AFE2_DISABLE 0x0
+#define ESI_TSM_COMPARATOR_CONTROL_AFE2_ENABLE ESICA2EN
+
+//*****************************************************************************
+//
+//The following are values that can be passed to
+//tsmControlDacAFE2 parameter in ESI_AFE2_InitParams
+//
+//*****************************************************************************
+#define ESI_TSM_DAC_CONTROL_AFE2_DISABLE 0x0
+#define ESI_TSM_DAC_CONTROL_AFE2_ENABLE ESIDAC2EN
+
+typedef struct ESI_AFE1_InitParams {
+ uint16_t excitationCircuitSelect;
+ uint16_t sampleAndHoldSelect;
+ uint16_t midVoltageGeneratorSelect;
+ uint16_t sampleAndHoldVSSConnect;
+ uint16_t inputSelectAFE1;
+ uint16_t inverterSelectOutputAFE1;
+} ESI_AFE1_InitParams;
+
+extern const ESI_AFE1_InitParams ESI_AFE1_INITPARAMS_DEFAULT;
+
+void ESI_AFE1_init (ESI_AFE1_InitParams *params);
+
+typedef struct ESI_AFE2_InitParams {
+ uint16_t inputSelectAFE2;
+ uint16_t inverterSelectOutputAFE2;
+ uint16_t tsmControlComparatorAFE2;
+ uint16_t tsmControlDacAFE2;
+} ESI_AFE2_InitParams;
+
+extern const ESI_AFE2_InitParams ESI_AFE2_INITPARAMS_DEFAULT;
+
+void ESI_AFE2_init (ESI_AFE2_InitParams *params);
+
+//*****************************************************************************
+//
+//The following are values that can be passed to
+//channelSelect parameter in ESI_getLatchedComparatorOutput
+//
+//*****************************************************************************
+#define ESI_AFE1_CHANNEL0_SELECT ESIOUT0
+#define ESI_AFE1_CHANNEL1_SELECT ESIOUT1
+#define ESI_AFE1_CHANNEL2_SELECT ESIOUT2
+#define ESI_AFE1_CHANNEL3_SELECT ESIOUT3
+#define ESI_AFE2_CHANNEL0_SELECT ESIOUT4
+#define ESI_AFE2_CHANNEL1_SELECT ESIOUT5
+#define ESI_AFE2_CHANNEL2_SELECT ESIOUT6
+#define ESI_AFE2_CHANNEL3_SELECT ESIOUT7
+#define ESI_AFE1_TEST_CHANNEL0_SELECT ESITCHOUT0
+#define ESI_AFE1_TEST_CHANNEL1_SELECT ESITCHOUT1
+
+//*****************************************************************************
+//
+//The following are values that are returned by ESI_getLatchedComparatorOutput
+//
+//*****************************************************************************
+#define ESI_AFE_OUTPUT_HIGH 0x1
+#define ESI_AFE_OUTPUT_LOW 0x0
+
+uint16_t ESI_getLatchedComparatorOutput (
+ uint16_t channelSelect);
+
+//*****************************************************************************
+//
+//The following are values that can be passed to
+//smclkDivider parameter in ESI_TSM_InitParams
+//
+//*****************************************************************************
+#define ESI_TSM_SMCLK_DIV_1 0x0
+#define ESI_TSM_SMCLK_DIV_2 ESIDIV10
+#define ESI_TSM_SMCLK_DIV_4 ESIDIV11
+#define ESI_TSM_SMCLK_DIV_8 ESIDIV10 + ESIDIV11
+
+//*****************************************************************************
+//
+//The following are values that can be passed to
+//aclkDivider parameter in ESI_TSM_InitParams
+//
+//*****************************************************************************
+#define ESI_TSM_ACLK_DIV_1 0x0
+#define ESI_TSM_ACLK_DIV_2 ESIDIV20
+#define ESI_TSM_ACLK_DIV_4 ESIDIV21
+#define ESI_TSM_ACLK_DIV_8 ESIDIV20 + ESIDIV21
+
+//*****************************************************************************
+//
+//The following are values that can be passed to
+//startTriggerAclkDivider parameter in ESI_TSM_InitParams
+//
+//*****************************************************************************
+#define ESI_TSM_START_TRIGGER_DIV_2 0x0
+#define ESI_TSM_START_TRIGGER_DIV_6 ESIDIV3A0
+#define ESI_TSM_START_TRIGGER_DIV_10 ESIDIV3A1
+#define ESI_TSM_START_TRIGGER_DIV_14 ESIDIV3A0 + ESIDIV3A1
+#define ESI_TSM_START_TRIGGER_DIV_18 ESIDIV3A2
+#define ESI_TSM_START_TRIGGER_DIV_22 ESIDIV3A2 + ESIDIV3A0
+#define ESI_TSM_START_TRIGGER_DIV_26 ESIDIV3A2 + ESIDIV3A1
+#define ESI_TSM_START_TRIGGER_DIV_30 ESIDIV3A2 + ESIDIV3A1 + ESIDIV3A0
+#define ESI_TSM_START_TRIGGER_DIV_42 ESIDIV3A0 + ESIDIV3A1 + ESIDIV3B0
+#define ESI_TSM_START_TRIGGER_DIV_50 ESIDIV3A1 + ESIDIV3B1
+#define ESI_TSM_START_TRIGGER_DIV_54 ESIDIV3A2 + ESIDIV3B0
+#define ESI_TSM_START_TRIGGER_DIV_66 ESIDIV3A2 + ESIDIV3A0 + ESIDIV3B0
+#define ESI_TSM_START_TRIGGER_DIV_70 ESIDIV3A1 + ESIDIV3A0 + ESIDIV3B1
+#define ESI_TSM_START_TRIGGER_DIV_78 ESIDIV3A2 + ESIDIV3A1 + ESIDIV3B0
+#define ESI_TSM_START_TRIGGER_DIV_90 ESIDIV3A2 + ESIDIV3A1 + ESIDIV3A0 + ESIDIV3B0
+#define ESI_TSM_START_TRIGGER_DIV_98 ESIDIV3A0 + ESIDIV3A1 + ESIDIV3B0 + ESIDIV3B1
+#define ESI_TSM_START_TRIGGER_DIV_110 ESIDIV3A2 + ESIDIV3A0 + ESIDIV3B1
+#define ESI_TSM_START_TRIGGER_DIV_126 ESIDIV3A2 + ESIDIV3B0 + ESIDIV3B1
+#define ESI_TSM_START_TRIGGER_DIV_130 ESIDIV3A2 + ESIDIV3A1 + ESIDIV3B1
+#define ESI_TSM_START_TRIGGER_DIV_150 ESIDIV3A2 + ESIDIV3A1 + ESIDIV3A0 + ESIDIV3B1
+#define ESI_TSM_START_TRIGGER_DIV_154 ESIDIV3A2 + ESIDIV3A0 + ESIDIV3B0 + ESIDIV3B1
+#define ESI_TSM_START_TRIGGER_DIV_162 ESIDIV3A2 + ESIDIV3B2
+#define ESI_TSM_START_TRIGGER_DIV_182 ESIDIV3A2 + ESIDIV3A1 + ESIDIV3B0 + ESIDIV3B1
+#define ESI_TSM_START_TRIGGER_DIV_198 ESIDIV3A2 + ESIDIV3A0 + ESIDIV3B2
+#define ESI_TSM_START_TRIGGER_DIV_210 ESIDIV3A2 + ESIDIV3A1 + ESIDIV3A0 + ESIDIV3B0 + ESIDIV3B1
+#define ESI_TSM_START_TRIGGER_DIV_234 ESIDIV3A2 + ESIDIV3A1 + ESIDIV3B2
+#define ESI_TSM_START_TRIGGER_DIV_242 ESIDIV3A2 + ESIDIV3A0 + ESIDIV3B2 + ESIDIV3B0
+#define ESI_TSM_START_TRIGGER_DIV_270 ESIDIV3A2 + ESIDIV3A1 + ESIDIV3A0 + ESIDIV3B2
+#define ESI_TSM_START_TRIGGER_DIV_286 ESIDIV3A2 + ESIDIV3A1 + ESIDIV3B2 + ESIDIV3B0
+#define ESI_TSM_START_TRIGGER_DIV_330 ESIDIV3A2 + ESIDIV3A1 + ESIDIV3A0 + ESIDIV3B2 + ESIDIV3B0
+#define ESI_TSM_START_TRIGGER_DIV_338 ESIDIV3A2 + ESIDIV3A1 + ESIDIV3B2 + ESIDIV3B1
+#define ESI_TSM_START_TRIGGER_DIV_390 ESIDIV3A2 + ESIDIV3A1 + ESIDIV3A0 + ESIDIV3B2 + ESIDIV3B1
+#define ESI_TSM_START_TRIGGER_DIV_450 ESIDIV3A2 + ESIDIV3A1 + ESIDIV3A0 + ESIDIV3B2 + ESIDIV3B1 + ESIDIV3B0
+
+//*****************************************************************************
+//
+//The following are values that can be passed to
+//repeatMode parameter in ESI_TSM_InitParams
+//
+//*****************************************************************************
+#define ESI_TSM_REPEAT_NEW_TRIGGER 0x0
+#define ESI_TSM_REPEAT_END_OF_PREVIOUS_SEQ ESITSMRP
+
+//*****************************************************************************
+//
+//The following are values that can be passed to
+//startTriggerSelection parameter in ESI_TSM_InitParams
+//
+//*****************************************************************************
+#define ESI_TSM_STOP_SEQUENCE 0x0
+#define ESI_TSM_START_TRIGGER_ACLK ESITSMTRG0
+#define ESI_TSM_START_TRIGGER_SOFTWARE ESITSMTRG1
+#define ESI_TSM_START_TRIGGER_ACLK_OR_SOFTWARE ESITSMTRG1 + ESITSMTRG0
+
+//*****************************************************************************
+//
+//The following are values that can be passed to
+//tsmFunctionalitySelection parameter in ESI_TSM_InitParams
+//
+//*****************************************************************************
+#define ESI_TSM_HIGH_FREQ_CLK_FUNCTION_ON 0x0
+#define ESI_TSM_AUTOZERO_CYCLE_FUNCTION_ON ESICLKAZSEL
+
+typedef struct ESI_TSM_InitParams {
+ uint16_t smclkDivider;
+ uint16_t aclkDivider;
+ uint16_t startTriggerAclkDivider;
+ uint16_t repeatMode;
+ uint16_t startTriggerSelection;
+ uint16_t tsmFunctionSelection;
+} ESI_TSM_InitParams;
+
+extern const ESI_TSM_InitParams ESI_TSM_INITPARAMS_DEFAULT;
+
+void ESI_TSM_init (ESI_TSM_InitParams *params);
+
+void ESI_TSM_clearTable(void);
+
+void ESI_TSM_copyTable(uint16_t* tsmTable, uint16_t size);
+
+void ESI_TSM_softwareTrigger(void);
+
+uint8_t ESI_TSM_getTSMStateDuration(uint8_t stateRegNum);
+
+void ESI_TSM_setTSMStateDuration(uint8_t stateRegNum, uint8_t duration);
+
+//*****************************************************************************
+//
+//The following are values that can be passed to
+//Q6Select parameter in ESI_PSM_InitParams
+//
+//*****************************************************************************
+#define ESI_PSM_Q6_DISABLE 0x0
+#define ESI_PSM_Q6_ENABLE ESIQ6EN
+
+//*****************************************************************************
+//
+//The following are values that can be passed to
+//Q7TriggerSelect parameter in ESI_PSM_InitParams
+//
+//*****************************************************************************
+#define ESI_PSM_Q7_TRIGGER_DISABLE 0x0
+#define ESI_PSM_Q7_TRIGGER_ENABLE ESIQ7TRG
+
+//*****************************************************************************
+//
+//The following are values that can be passed to
+//count0Select parameter in ESI_PSM_InitParams
+//
+//*****************************************************************************
+#define ESI_PSM_CNT0_DISABLE 0x0
+#define ESI_PSM_CNT0_ENABLE ESICNT0EN
+
+//*****************************************************************************
+//
+//The following are values that can be passed to
+//count0Reset parameter in ESI_PSM_InitParams
+//
+//*****************************************************************************
+#define ESI_PSM_CNT0_NO_RESET 0x0
+#define ESI_PSM_CNT0_RESET ESICNT0RST
+
+//*****************************************************************************
+//
+//The following are values that can be passed to
+//count1Select parameter in ESI_PSM_InitParams
+//
+//*****************************************************************************
+#define ESI_PSM_CNT1_DISABLE 0x0
+#define ESI_PSM_CNT1_ENABLE ESICNT1EN
+
+//*****************************************************************************
+//
+//The following are values that can be passed to
+//count1Reset parameter in ESI_PSM_InitParams
+//
+//*****************************************************************************
+#define ESI_PSM_CNT1_NO_RESET 0x0
+#define ESI_PSM_CNT1_RESET ESICNT1RST
+
+//*****************************************************************************
+//
+//The following are values that can be passed to
+//count2Select parameter in ESI_PSM_InitParams
+//
+//*****************************************************************************
+#define ESI_PSM_CNT2_DISABLE 0x0
+#define ESI_PSM_CNT2_ENABLE ESICNT2EN
+
+//*****************************************************************************
+//
+//The following are values that can be passed to
+//count2Reset parameter in ESI_PSM_InitParams
+//
+//*****************************************************************************
+#define ESI_PSM_CNT2_NO_RESET 0x0
+#define ESI_PSM_CNT2_RESET ESICNT2RST
+
+
+//*****************************************************************************
+//
+//The following are values that can be passed to
+//V2Select parameter in ESI_PSM_InitParams
+//
+//*****************************************************************************
+#define ESI_PSM_S3_SELECT 0x0
+#define ESI_PSM_Q0_SELECT ESIV2SEL
+
+//*****************************************************************************
+//
+//The following are values that can be passed to
+//TEST4Select parameter in ESI_PSM_InitParams
+//
+//*****************************************************************************
+#define ESI_PSM_TEST4_IS_Q2 0x0
+#define ESI_PSM_TEST4_IS_Q1 ESITEST4SEL0
+#define ESI_PSM_TEST4_IS_TSM_CLK ESITEST4SEL1
+#define ESI_PSM_TEST4_IS_AFE1_COMPARATOR ESITEST4SEL0 + ESITEST4SEL1
+
+typedef struct ESI_PSM_InitParams {
+ uint16_t Q6Select;
+ uint16_t Q7TriggerSelect;
+ uint16_t count0Select;
+ uint16_t count0Reset;
+ uint16_t count1Select;
+ uint16_t count1Reset;
+ uint16_t count2Select;
+ uint16_t count2Reset;
+ uint16_t V2Select;
+ uint16_t TEST4Select;
+} ESI_PSM_InitParams;
+
+extern const ESI_PSM_InitParams ESI_PSM_INITPARAMS_DEFAULT;
+
+void ESI_PSM_init (ESI_PSM_InitParams *params);
+
+void ESI_PSM_clearTable(void);
+void ESI_PSM_copyTable(uint8_t * psmTable, uint8_t size);
+
+//*****************************************************************************
+//
+//The following are values that can be passed to
+//counterToReset parameter in ESI_PSM_counterReset
+//
+//*****************************************************************************
+#define ESI_PSM_CNT0_RST ESICNT0RST
+#define ESI_PSM_CNT1_RST ESICNT1RST
+#define ESI_PSM_CNT2_RST ESICNT2RST
+
+void ESI_PSM_resetCounter (uint16_t counterToReset);
+
+//*****************************************************************************
+//
+//The following are values that can be passed to
+//testCycleInsertion parameter in ESI_InitParams
+//
+//*****************************************************************************
+#define ESI_TEST_CYCLE_INSERTION_DISABLE 0x0
+#define ESI_TEST_CYCLE_INSERTION_ENABLE ESITESTD
+
+//*****************************************************************************
+//
+//The following are values that can be passed to
+//timerAInputSelection parameter in ESI_InitParams
+//
+//*****************************************************************************
+#define ESI_TIMERA_INPUT_TSM_COMPOUT 0x0
+#define ESI_TIMERA_INPUT_TSM_PPUSRC ESICS
+
+//*****************************************************************************
+//
+//The following are values that can be passed to
+//testChannel0Select parameter in ESI_InitParams
+//
+//*****************************************************************************
+#define ESI_TEST_CHANNEL0_SOURCE_IS_CH0_CI0 0x0
+#define ESI_TEST_CHANNEL0_SOURCE_IS_CH1_CI1 ESITCH00
+#define ESI_TEST_CHANNEL0_SOURCE_IS_CH2_CI2 ESITCH01
+#define ESI_TEST_CHANNEL0_SOURCE_IS_CH3_CI3 ESITCH00 + ESITCH01
+
+//*****************************************************************************
+//
+//The following are values that can be passed to
+//testChannel1Select parameter in ESI_InitParams
+//
+//*****************************************************************************
+#define ESI_TEST_CHANNEL1_SOURCE_IS_CH0_CI0 0x0
+#define ESI_TEST_CHANNEL1_SOURCE_IS_CH1_CI1 ESITCH10
+#define ESI_TEST_CHANNEL1_SOURCE_IS_CH2_CI2 ESITCH11
+#define ESI_TEST_CHANNEL1_SOURCE_IS_CH3_CI3 ESITCH10 + ESITCH11
+
+//*****************************************************************************
+//
+//The following are values that can be passed to
+//internalOscSelect parameter in ESI_InitParams
+//
+//*****************************************************************************
+#define ESI_INTERNAL_OSC_DISABLE 0x0
+#define ESI_INTERNAL_OSC_ENABLE ESIHFSEL
+
+//*****************************************************************************
+//
+//The following are values that can be passed to
+//sourceNum parameter in ESI_psmSourceSelect
+//
+//*****************************************************************************
+#define PSM_S1_SOURCE 1
+#define PSM_S2_SOURCE 2
+#define PSM_S3_SOURCE 3
+
+//*****************************************************************************
+//
+//The following are values that can be passed to
+//sourceSelect parameter in ESI_psmSourceSelect
+//
+//*****************************************************************************
+#define ESI_PSM_SOURCE_IS_ESIOUT0 0
+#define ESI_PSM_SOURCE_IS_ESIOUT1 1
+#define ESI_PSM_SOURCE_IS_ESIOUT2 2
+#define ESI_PSM_SOURCE_IS_ESIOUT3 3
+#define ESI_PSM_SOURCE_IS_ESIOUT4 4
+#define ESI_PSM_SOURCE_IS_ESIOUT5 5
+#define ESI_PSM_SOURCE_IS_ESIOUT6 6
+#define ESI_PSM_SOURCE_IS_ESIOUT7 7
+
+void ESI_timerAInputSelect(uint16_t select);
+void ESI_psmSourceSelect(uint16_t sourceNum, uint16_t sourceSelect);
+void ESI_testChannel0SourceSelect(uint16_t sourceSelect);
+void ESI_testChannel1SourceSelect(uint16_t sourceSelect);
+void ESI_enable(void);
+void ESI_disable(void);
+
+void ESI_enableInternalOscillator();
+void ESI_disableInternalOscillator();
+void ESI_startInternalOscCal(void);
+void ESI_stopInternalOscCal(void);
+
+//*****************************************************************************
+//
+//The following are values that can be passed to
+//oversample parameter in ESI_measureESIOSCOversample
+//
+//*****************************************************************************
+#define ESI_ESIOSC_NO_OVERSAMPLE 0
+#define ESI_ESIOSC_OVERSAMPLE_2 2
+#define ESI_ESIOSC_OVERSAMPLE_4 4
+#define ESI_ESIOSC_OVERSAMPLE_8 8
+uint16_t ESI_measureESIOSC(uint8_t oversample);
+uint8_t ESI_getESICLKFQ(void);
+
+//*****************************************************************************
+//
+//The following are values that can be passed to
+//incOrDec parameter in ESI_adjustInternalOscFreq
+//
+//*****************************************************************************
+#define ESI_INTERNAL_OSC_FREQ_DECREASE 0x0
+#define ESI_INTERNAL_OSC_FREQ_INCREASE 0x1
+
+void ESI_adjustInternalOscFreq(uint16_t incOrDec);
+void ESI_setNominalInternalOscFreq(void);
+void ESI_calibrateInternalOscFreq(uint16_t targetAclkCounts);
+void ESI_setPSMCounter1IncreaseThreshold(
+ uint16_t threshold);
+
+void ESI_setPSMCounter1DecreaseThreshold(
+ uint16_t threshold);
+
+//*****************************************************************************
+//
+//The following are values that can be passed to
+//resultNum parameter in ESI_getConversionResult
+//
+//*****************************************************************************
+#define ESI_CONVERSION_RESULT_1 ESIADMEM1
+#define ESI_CONVERSION_RESULT_2 ESIADMEM2
+#define ESI_CONVERSION_RESULT_3 ESIADMEM3
+#define ESI_CONVERSION_RESULT_4 ESIADMEM4
+
+uint16_t ESI_getConversionResult(uint16_t resultNum);
+
+//*****************************************************************************
+//
+//The following are values that can be passed to
+//dacRegNum parameter in ESI_setAFE1DACValue and ESI_getAFE1DACValue
+//
+//*****************************************************************************
+#define ESI_DAC1_REG0 0
+#define ESI_DAC1_REG1 1
+#define ESI_DAC1_REG2 2
+#define ESI_DAC1_REG3 3
+#define ESI_DAC1_REG4 4
+#define ESI_DAC1_REG5 5
+#define ESI_DAC1_REG6 6
+#define ESI_DAC1_REG7 7
+
+void ESI_setAFE1DACValue(uint16_t dacValue,
+ uint8_t dacRegNum);
+uint16_t ESI_getAFE1DACValue(uint8_t dacRegNum);
+
+//*****************************************************************************
+//
+//The following are values that can be passed to
+//dacRegNum parameter in ESI_setAFE2DACValue and ESI_getAFE2DACValue
+//
+//*****************************************************************************
+#define ESI_DAC2_REG0 0
+#define ESI_DAC2_REG1 1
+#define ESI_DAC2_REG2 2
+#define ESI_DAC2_REG3 3
+#define ESI_DAC2_REG4 4
+#define ESI_DAC2_REG5 5
+#define ESI_DAC2_REG6 6
+#define ESI_DAC2_REG7 7
+
+void ESI_setAFE2DACValue(uint16_t dacValue,
+ uint8_t dacRegNum);
+uint16_t ESI_getAFE2DACValue(uint8_t dacRegNum);
+
+
+//*****************************************************************************
+//
+//The following are values that can be passed to
+//stateRegNum parameter in ESI_setTSMstateReg
+//
+//*****************************************************************************
+#define ESI_TSM_STATE_REG_0 0
+#define ESI_TSM_STATE_REG_1 1
+#define ESI_TSM_STATE_REG_2 2
+#define ESI_TSM_STATE_REG_3 3
+#define ESI_TSM_STATE_REG_4 4
+#define ESI_TSM_STATE_REG_5 5
+#define ESI_TSM_STATE_REG_6 6
+#define ESI_TSM_STATE_REG_7 7
+#define ESI_TSM_STATE_REG_8 8
+#define ESI_TSM_STATE_REG_9 9
+#define ESI_TSM_STATE_REG_10 10
+#define ESI_TSM_STATE_REG_11 11
+#define ESI_TSM_STATE_REG_12 12
+#define ESI_TSM_STATE_REG_13 13
+#define ESI_TSM_STATE_REG_14 14
+#define ESI_TSM_STATE_REG_15 15
+#define ESI_TSM_STATE_REG_16 16
+#define ESI_TSM_STATE_REG_17 17
+#define ESI_TSM_STATE_REG_18 18
+#define ESI_TSM_STATE_REG_19 19
+#define ESI_TSM_STATE_REG_20 20
+#define ESI_TSM_STATE_REG_21 21
+#define ESI_TSM_STATE_REG_22 22
+#define ESI_TSM_STATE_REG_23 23
+#define ESI_TSM_STATE_REG_24 24
+#define ESI_TSM_STATE_REG_25 25
+#define ESI_TSM_STATE_REG_26 26
+#define ESI_TSM_STATE_REG_27 27
+#define ESI_TSM_STATE_REG_28 28
+#define ESI_TSM_STATE_REG_29 29
+#define ESI_TSM_STATE_REG_30 30
+#define ESI_TSM_STATE_REG_31 31
+
+//*****************************************************************************
+//
+//The following are values that can be passed to
+//inputChannelSelect parameter in ESI_TSM_StateParams
+//
+//*****************************************************************************
+#define ESI_TSM_STATE_CHANNEL_SELECT_CH0 0
+#define ESI_TSM_STATE_CHANNEL_SELECT_CH1 ESICH0
+#define ESI_TSM_STATE_CHANNEL_SELECT_CH2 ESICH1
+#define ESI_TSM_STATE_CHANNEL_SELECT_CH3 (ESICH1 | ESICH0)
+
+//*****************************************************************************
+//
+//The following are values that can be passed to
+//LCDampingSelect parameter in ESI_TSM_StateParams
+//
+//*****************************************************************************
+#define ESI_TSM_STATE_LC_DAMPING_DISABLE 0x0
+#define ESI_TSM_STATE_LC_DAMPING_ENABLE ESILCEN
+
+//*****************************************************************************
+//
+//The following are values that can be passed to
+//excitationSelect parameter in ESI_TSM_StateParams
+//
+//*****************************************************************************
+#define ESI_TSM_STATE_EXCITATION_DISABLE 0x0
+#define ESI_TSM_STATE_EXCITATION_ENABLE ESIEX
+
+//*****************************************************************************
+//
+//The following are values that can be passed to
+//comparatorSelect parameter in ESI_TSM_StateParams
+//
+//*****************************************************************************
+#define ESI_TSM_STATE_COMPARATOR_DISABLE 0x0
+#define ESI_TSM_STATE_COMPARATOR_ENABLE ESICA
+
+//*****************************************************************************
+//
+//The following are values that can be passed to
+//highFreqClkOn_or_compAutoZeroCycle parameter in ESI_TSM_StateParams
+//
+//*****************************************************************************
+#define ESI_TSM_STATE_HIGH_FREQ_CLK_ON 0x0
+#define ESI_TSM_STATE_COMP_AUTOZERO_CYCLE ESICLKON
+
+//*****************************************************************************
+//
+//The following are values that can be passed to
+//outputLatchSelect parameter in ESI_TSM_StateParams
+//
+//*****************************************************************************
+#define ESI_TSM_STATE_OUTPUT_LATCH_DISABLE 0x0
+#define ESI_TSM_STATE_OUTPUT_LATCH_ENABLE ESIRSON
+
+//*****************************************************************************
+//
+//The following are values that can be passed to
+//testCycleSelect parameter in ESI_TSM_StateParams
+//
+//*****************************************************************************
+#define ESI_TSM_STATE_TEST_CYCLE_DISABLE 0x0
+#define ESI_TSM_STATE_TEST_CYCLE_ENABLE ESITESTS1
+
+//*****************************************************************************
+//
+//The following are values that can be passed to
+//dacSelect parameter in ESI_TSM_StateParams
+//
+//*****************************************************************************
+#define ESI_TSM_STATE_DAC_DISABLE 0x0
+#define ESI_TSM_STATE_DAC_ENABLE ESIDAC
+
+//*****************************************************************************
+//
+//The following are values that can be passed to
+//tsmStop parameter in ESI_TSM_StateParams
+//
+//*****************************************************************************
+#define ESI_TSM_STATE_CONTINUE 0x0
+#define ESI_TSM_STATE_STOP ESISTOP
+
+//*****************************************************************************
+//
+//The following are values that can be passed to
+//tsmClkSrc parameter in ESI_TSM_StateParams
+//
+//*****************************************************************************
+#define ESI_TSM_STATE_HIGH_FREQ_CLK 0x0
+#define ESI_TSM_STATE_ACLK ESICLK
+
+//*****************************************************************************
+//
+//Values between these min and max can be pased to
+//duration parameter in ESI_TSM_StateParams
+//
+//*****************************************************************************
+#define ESI_TSM_STATE_DURATION_MIN 0x00
+#define ESI_TSM_STATE_DURATION_MAX 0x1F
+
+typedef struct ESI_TSM_StateParams {
+ uint16_t inputChannelSelect;
+ uint16_t LCDampingSelect;
+ uint16_t excitationSelect;
+ uint16_t comparatorSelect;
+ uint16_t highFreqClkOn_or_compAutoZeroCycle;
+ uint16_t outputLatchSelect;
+ uint16_t testCycleSelect;
+ uint16_t dacSelect;
+ uint16_t tsmStop;
+ uint16_t tsmClkSrc;
+ uint16_t duration;
+} ESI_TSM_StateParams;
+
+void ESI_setTSMstateReg(ESI_TSM_StateParams *params,
+ uint8_t stateRegNum);
+
+uint16_t ESIgetInterruptVectorRegister(void);
+
+//*****************************************************************************
+//
+//The following values can be be used to form the interrupt mask for
+//ESI_enableInterrupt and ESI_disableInterrupt
+//
+//*****************************************************************************
+#define ESI_INTERRUPT_AFE1_ESIOUTX ESIIE0
+#define ESI_INTERRUPT_ESISTOP ESIIE1
+#define ESI_INTERRUPT_ESISTART ESIIE2
+#define ESI_INTERRUPT_ESICNT1 ESIIE3
+#define ESI_INTERRUPT_ESICNT2 ESIIE4
+#define ESI_INTERRUPT_Q6_BIT_SET ESIIE5
+#define ESI_INTERRUPT_Q7_BIT_SET ESIIE6
+#define ESI_INTERRUPT_ESICNT0_COUNT_INTERVAL ESIIE7
+#define ESI_INTERRUPT_AFE2_ESIOUTX ESIIE8
+
+
+void ESI_enableInterrupt(uint16_t interruptMask);
+void ESI_disableInterrupt(uint16_t interruptMask);
+
+//*****************************************************************************
+//
+//Return values for ESI_getInterruptStatus
+//
+//*****************************************************************************
+#define ESI_INTERRUPT_FLAG_AFE1_ESIOUTX ESIIFG0
+#define ESI_INTERRUPT_FLAG_ESISTOP ESIIFG1
+#define ESI_INTERRUPT_FLAG_ESISTART ESIIFG2
+#define ESI_INTERRUPT_FLAG_ESICNT1 ESIIFG3
+#define ESI_INTERRUPT_FLAG_ESICNT2 ESIIFG4
+#define ESI_INTERRUPT_FLAG_Q6_BIT_SET ESIIFG5
+#define ESI_INTERRUPT_FLAG_Q7_BIT_SET ESIIFG6
+#define ESI_INTERRUPT_FLAG_ESICNT0_COUNT_INTERVAL ESIIFG7
+#define ESI_INTERRUPT_FLAG_AFE2_ESIOUTX ESIIFG8
+
+
+uint16_t ESI_getInterruptStatus ( uint16_t interruptMask);
+void ESI_clearInterrupt (uint16_t interruptMask);
+
+//*****************************************************************************
+//
+//Values for ifg0Src in ESI_setIFG0Source
+//
+//*****************************************************************************
+#define ESI_IFG0_SET_WHEN_ESIOUT0_SET ESIIFGSET1_0
+#define ESI_IFG0_SET_WHEN_ESIOUT0_RESET ESIIFGSET1_1
+#define ESI_IFG0_SET_WHEN_ESIOUT1_SET ESIIFGSET1_2
+#define ESI_IFG0_SET_WHEN_ESIOUT1_RESET ESIIFGSET1_3
+#define ESI_IFG0_SET_WHEN_ESIOUT2_SET ESIIFGSET1_4
+#define ESI_IFG0_SET_WHEN_ESIOUT2_RESET ESIIFGSET1_5
+#define ESI_IFG0_SET_WHEN_ESIOUT3_SET ESIIFGSET1_6
+#define ESI_IFG0_SET_WHEN_ESIOUT3_RESET ESIIFGSET1_7
+
+void ESI_setIFG0Source(uint16_t ifg0Src);
+
+//*****************************************************************************
+//
+//Values for ifg8Src in ESI_setIFG8Source
+//
+//*****************************************************************************
+#define ESI_IFG8_SET_WHEN_ESIOUT4_SET ESIIFGSET2_0
+#define ESI_IFG8_SET_WHEN_ESIOUT4_RESET ESIIFGSET2_1
+#define ESI_IFG8_SET_WHEN_ESIOUT5_SET ESIIFGSET2_2
+#define ESI_IFG8_SET_WHEN_ESIOUT5_RESET ESIIFGSET2_3
+#define ESI_IFG8_SET_WHEN_ESIOUT6_SET ESIIFGSET2_4
+#define ESI_IFG8_SET_WHEN_ESIOUT6_RESET ESIIFGSET2_5
+#define ESI_IFG8_SET_WHEN_ESIOUT7_SET ESIIFGSET2_6
+#define ESI_IFG8_SET_WHEN_ESIOUT7_RESET ESIIFGSET2_7
+
+void ESI_setIFG8Source(uint16_t ifg8Src);
+
+//*****************************************************************************
+//
+//Values for ifg7Src in ESI_setIFG7Source
+//
+//*****************************************************************************
+#define ESI_IFG7_SOURCE_EVERY_COUNT_OF_CNT0 ESIIS0_0
+#define ESI_IFG7_SOURCE_CNT0_MOD4 ESIIS0_1
+#define ESI_IFG7_SOURCE_CNT0_MOD256 ESIIS0_2
+#define ESI_IFG7_SOURCE_CNT0_ROLLOVER ESIIS0_3
+
+void ESI_setIFG7Source(uint16_t ifg7Src);
+
+//*****************************************************************************
+//
+//Values for ifg4Src in ESI_setIFG4Source
+//
+//*****************************************************************************
+#define ESI_IFG4_SOURCE_EVERY_COUNT_OF_CNT2 ESIIS2_0
+#define ESI_IFG4_SOURCE_CNT2_MOD4 ESIIS2_1
+#define ESI_IFG4_SOURCE_CNT2_MOD256 ESIIS2_2
+#define ESI_IFG4_SOURCE_CNT2_ROLLOVER ESIIS2_3
+
+void ESI_setIFG4Source(uint16_t ifg4Src);
+
+
+void ESI_setPSMCounter1UpperThreshold(uint16_t threshold);
+void ESI_setPSMCounter1LowerThreshold(uint16_t threshold);
+
+//*****************************************************************************
+//
+// Set correct DAC values for LC sensors
+//
+//*****************************************************************************
+void ESI_LC_DAC_calibration(uint8_t selected_channel);
+
+//*****************************************************************************
+//
+// Mark the end of the C bindings section for C++ compilers.
+//
+//*****************************************************************************
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+#endif
diff --git a/Apps/FlightSoftware/MotorControl/driverlib/eusci_a_spi.c b/Apps/FlightSoftware/MotorControl/driverlib/eusci_a_spi.c
new file mode 100644
index 000000000..e54b87153
--- /dev/null
+++ b/Apps/FlightSoftware/MotorControl/driverlib/eusci_a_spi.c
@@ -0,0 +1,229 @@
+/* --COPYRIGHT--,BSD
+ * Copyright (c) 2017, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * --/COPYRIGHT--*/
+//*****************************************************************************
+//
+// eusci_a_spi.c - Driver for the eusci_a_spi Module.
+//
+//*****************************************************************************
+
+//*****************************************************************************
+//
+//! \addtogroup eusci_a_spi_api eusci_a_spi
+//! @{
+//
+//*****************************************************************************
+
+#include "inc/hw_memmap.h"
+
+#ifdef __MSP430_HAS_EUSCI_Ax__
+#include "eusci_a_spi.h"
+
+#include
+
+void EUSCI_A_SPI_initMaster (uint16_t baseAddress,
+ EUSCI_A_SPI_initMasterParam *param)
+{
+ //Disable the USCI Module
+ HWREG16(baseAddress + OFS_UCAxCTLW0) |= UCSWRST;
+
+ //Reset OFS_UCAxCTLW0 values
+ HWREG16(baseAddress + OFS_UCAxCTLW0) &= ~(UCCKPH + UCCKPL + UC7BIT + UCMSB +
+ UCMST + UCMODE_3 + UCSYNC);
+
+ //Reset OFS_UCAxCTLW0 values
+ HWREG16(baseAddress + OFS_UCAxCTLW0) &= ~(UCSSEL_3);
+
+ //Select Clock
+ HWREG16(baseAddress + OFS_UCAxCTLW0) |= param->selectClockSource;
+
+ HWREG16(baseAddress + OFS_UCAxBRW) =
+ (uint16_t)(param->clockSourceFrequency / param->desiredSpiClock);
+
+ /*
+ * Configure as SPI master mode.
+ * Clock phase select, polarity, msb
+ * UCMST = Master mode
+ * UCSYNC = Synchronous mode
+ * UCMODE_0 = 3-pin SPI
+ */
+ HWREG16(baseAddress + OFS_UCAxCTLW0) |= (
+ param->msbFirst +
+ param->clockPhase +
+ param->clockPolarity +
+ UCMST +
+ UCSYNC +
+ param->spiMode
+ );
+ //No modulation
+ HWREG16(baseAddress + OFS_UCAxMCTLW) = 0;
+}
+
+void EUSCI_A_SPI_select4PinFunctionality (uint16_t baseAddress,
+ uint8_t select4PinFunctionality
+ )
+{
+ HWREG16(baseAddress + OFS_UCAxCTLW0) &= ~UCSTEM;
+ HWREG16(baseAddress + OFS_UCAxCTLW0) |= select4PinFunctionality;
+}
+
+void EUSCI_A_SPI_changeMasterClock (uint16_t baseAddress,
+ EUSCI_A_SPI_changeMasterClockParam *param)
+{
+ //Disable the USCI Module
+ HWREG16(baseAddress + OFS_UCAxCTLW0) |= UCSWRST;
+
+ HWREG16(baseAddress + OFS_UCAxBRW) =
+ (uint16_t)(param->clockSourceFrequency / param->desiredSpiClock);
+
+ //Reset the UCSWRST bit to enable the USCI Module
+ HWREG16(baseAddress + OFS_UCAxCTLW0) &= ~(UCSWRST);
+}
+
+void EUSCI_A_SPI_initSlave (uint16_t baseAddress, EUSCI_A_SPI_initSlaveParam *param)
+{
+ //Disable USCI Module
+ HWREG16(baseAddress + OFS_UCAxCTLW0) |= UCSWRST;
+
+ //Reset OFS_UCAxCTLW0 register
+ HWREG16(baseAddress + OFS_UCAxCTLW0) &= ~(UCMSB +
+ UC7BIT +
+ UCMST +
+ UCCKPL +
+ UCCKPH +
+ UCMODE_3
+ );
+
+ //Clock polarity, phase select, msbFirst, SYNC, Mode0
+ HWREG16(baseAddress + OFS_UCAxCTLW0) |= (param->clockPhase +
+ param->clockPolarity +
+ param->msbFirst +
+ UCSYNC +
+ param->spiMode
+ );
+}
+
+void EUSCI_A_SPI_changeClockPhasePolarity (uint16_t baseAddress,
+ uint16_t clockPhase,
+ uint16_t clockPolarity
+ )
+{
+
+ //Disable the USCI Module
+ HWREG16(baseAddress + OFS_UCAxCTLW0) |= UCSWRST;
+
+ HWREG16(baseAddress + OFS_UCAxCTLW0) &= ~(UCCKPH + UCCKPL);
+
+ HWREG16(baseAddress + OFS_UCAxCTLW0) |= (
+ clockPhase +
+ clockPolarity
+ );
+
+ //Reset the UCSWRST bit to enable the USCI Module
+ HWREG16(baseAddress + OFS_UCAxCTLW0) &= ~(UCSWRST);
+}
+
+void EUSCI_A_SPI_transmitData ( uint16_t baseAddress,
+ uint8_t transmitData
+ )
+{
+ HWREG16(baseAddress + OFS_UCAxTXBUF) = transmitData;
+}
+
+uint8_t EUSCI_A_SPI_receiveData (uint16_t baseAddress)
+{
+ return ( HWREG16(baseAddress + OFS_UCAxRXBUF)) ;
+}
+
+void EUSCI_A_SPI_enableInterrupt (uint16_t baseAddress,
+ uint8_t mask
+ )
+{
+ HWREG16(baseAddress + OFS_UCAxIE) |= mask;
+}
+
+void EUSCI_A_SPI_disableInterrupt (uint16_t baseAddress,
+ uint8_t mask
+ )
+{
+ HWREG16(baseAddress + OFS_UCAxIE) &= ~mask;
+}
+
+uint8_t EUSCI_A_SPI_getInterruptStatus (uint16_t baseAddress,
+ uint8_t mask
+ )
+{
+ return ( HWREG16(baseAddress + OFS_UCAxIFG) & mask );
+}
+
+void EUSCI_A_SPI_clearInterrupt (uint16_t baseAddress,
+ uint8_t mask
+ )
+{
+ HWREG16(baseAddress + OFS_UCAxIFG) &= ~mask;
+}
+
+void EUSCI_A_SPI_enable (uint16_t baseAddress)
+{
+ //Reset the UCSWRST bit to enable the USCI Module
+ HWREG16(baseAddress + OFS_UCAxCTLW0) &= ~(UCSWRST);
+}
+
+void EUSCI_A_SPI_disable (uint16_t baseAddress)
+{
+ //Set the UCSWRST bit to disable the USCI Module
+ HWREG16(baseAddress + OFS_UCAxCTLW0) |= UCSWRST;
+}
+
+uint32_t EUSCI_A_SPI_getReceiveBufferAddress (uint16_t baseAddress)
+{
+ return ( baseAddress + OFS_UCAxRXBUF );
+}
+
+uint32_t EUSCI_A_SPI_getTransmitBufferAddress (uint16_t baseAddress)
+{
+ return ( baseAddress + OFS_UCAxTXBUF );
+}
+
+uint16_t EUSCI_A_SPI_isBusy (uint16_t baseAddress)
+{
+ //Return the bus busy status.
+ return (HWREG16(baseAddress + OFS_UCAxSTATW) & UCBUSY);
+}
+
+
+#endif
+//*****************************************************************************
+//
+//! Close the doxygen group for eusci_a_spi_api
+//! @}
+//
+//*****************************************************************************
diff --git a/Apps/FlightSoftware/MotorControl/driverlib/eusci_a_spi.h b/Apps/FlightSoftware/MotorControl/driverlib/eusci_a_spi.h
new file mode 100644
index 000000000..516cacbc0
--- /dev/null
+++ b/Apps/FlightSoftware/MotorControl/driverlib/eusci_a_spi.h
@@ -0,0 +1,526 @@
+/* --COPYRIGHT--,BSD
+ * Copyright (c) 2017, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * --/COPYRIGHT--*/
+//*****************************************************************************
+//
+// eusci_a_spi.h - Driver for the EUSCI_A_SPI Module.
+//
+//*****************************************************************************
+
+#ifndef __MSP430WARE_EUSCI_A_SPI_H__
+#define __MSP430WARE_EUSCI_A_SPI_H__
+
+#include "inc/hw_memmap.h"
+
+#ifdef __MSP430_HAS_EUSCI_Ax__
+
+//*****************************************************************************
+//
+// If building with a C++ compiler, make all of the definitions in this header
+// have a C binding.
+//
+//*****************************************************************************
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+#include "inc/hw_memmap.h"
+//*****************************************************************************
+//
+//! \brief Used in the EUSCI_A_SPI_changeMasterClock() function as the param
+//! parameter.
+//
+//*****************************************************************************
+typedef struct EUSCI_A_SPI_changeMasterClockParam {
+ //! Is the frequency of the selected clock source in Hz
+ uint32_t clockSourceFrequency;
+ //! Is the desired clock rate in Hz for SPI communication
+ uint32_t desiredSpiClock;
+} EUSCI_A_SPI_changeMasterClockParam;
+
+//*****************************************************************************
+//
+//! \brief Used in the EUSCI_A_SPI_initSlave() function as the param parameter.
+//
+//*****************************************************************************
+typedef struct EUSCI_A_SPI_initSlaveParam {
+ //! Controls the direction of the receive and transmit shift register.
+ //! \n Valid values are:
+ //! - \b EUSCI_A_SPI_MSB_FIRST
+ //! - \b EUSCI_A_SPI_LSB_FIRST [Default]
+ uint16_t msbFirst;
+ //! Is clock phase select.
+ //! \n Valid values are:
+ //! - \b EUSCI_A_SPI_PHASE_DATA_CHANGED_ONFIRST_CAPTURED_ON_NEXT [Default]
+ //! - \b EUSCI_A_SPI_PHASE_DATA_CAPTURED_ONFIRST_CHANGED_ON_NEXT
+ uint16_t clockPhase;
+ //! Is clock polarity select
+ //! \n Valid values are:
+ //! - \b EUSCI_A_SPI_CLOCKPOLARITY_INACTIVITY_HIGH
+ //! - \b EUSCI_A_SPI_CLOCKPOLARITY_INACTIVITY_LOW [Default]
+ uint16_t clockPolarity;
+ //! Is SPI mode select
+ //! \n Valid values are:
+ //! - \b EUSCI_A_SPI_3PIN
+ //! - \b EUSCI_A_SPI_4PIN_UCxSTE_ACTIVE_HIGH
+ //! - \b EUSCI_A_SPI_4PIN_UCxSTE_ACTIVE_LOW
+ uint16_t spiMode;
+} EUSCI_A_SPI_initSlaveParam;
+
+//*****************************************************************************
+//
+//! \brief Used in the EUSCI_A_SPI_initMaster() function as the param
+//! parameter.
+//
+//*****************************************************************************
+typedef struct EUSCI_A_SPI_initMasterParam {
+ //! Selects Clock source. Refer to device specific datasheet for available
+ //! options.
+ //! \n Valid values are:
+ //! - \b EUSCI_A_SPI_CLOCKSOURCE_ACLK
+ //! - \b EUSCI_A_SPI_CLOCKSOURCE_SMCLK
+ uint8_t selectClockSource;
+ //! Is the frequency of the selected clock source in Hz
+ uint32_t clockSourceFrequency;
+ //! Is the desired clock rate in Hz for SPI communication
+ uint32_t desiredSpiClock;
+ //! Controls the direction of the receive and transmit shift register.
+ //! \n Valid values are:
+ //! - \b EUSCI_A_SPI_MSB_FIRST
+ //! - \b EUSCI_A_SPI_LSB_FIRST [Default]
+ uint16_t msbFirst;
+ //! Is clock phase select.
+ //! \n Valid values are:
+ //! - \b EUSCI_A_SPI_PHASE_DATA_CHANGED_ONFIRST_CAPTURED_ON_NEXT [Default]
+ //! - \b EUSCI_A_SPI_PHASE_DATA_CAPTURED_ONFIRST_CHANGED_ON_NEXT
+ uint16_t clockPhase;
+ //! Is clock polarity select
+ //! \n Valid values are:
+ //! - \b EUSCI_A_SPI_CLOCKPOLARITY_INACTIVITY_HIGH
+ //! - \b EUSCI_A_SPI_CLOCKPOLARITY_INACTIVITY_LOW [Default]
+ uint16_t clockPolarity;
+ //! Is SPI mode select
+ //! \n Valid values are:
+ //! - \b EUSCI_A_SPI_3PIN
+ //! - \b EUSCI_A_SPI_4PIN_UCxSTE_ACTIVE_HIGH
+ //! - \b EUSCI_A_SPI_4PIN_UCxSTE_ACTIVE_LOW
+ uint16_t spiMode;
+} EUSCI_A_SPI_initMasterParam;
+
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the clockPhase parameter for
+// functions: EUSCI_A_SPI_changeClockPhasePolarity(); the param parameter for
+// functions: EUSCI_A_SPI_initMaster(), and EUSCI_A_SPI_initSlave().
+//
+//*****************************************************************************
+#define EUSCI_A_SPI_PHASE_DATA_CHANGED_ONFIRST_CAPTURED_ON_NEXT 0x00
+#define EUSCI_A_SPI_PHASE_DATA_CAPTURED_ONFIRST_CHANGED_ON_NEXT UCCKPH
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the param parameter for
+// functions: EUSCI_A_SPI_initMaster(), and EUSCI_A_SPI_initSlave().
+//
+//*****************************************************************************
+#define EUSCI_A_SPI_MSB_FIRST UCMSB
+#define EUSCI_A_SPI_LSB_FIRST 0x00
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the param parameter for
+// functions: EUSCI_A_SPI_initMaster(), and EUSCI_A_SPI_initSlave(); the
+// clockPolarity parameter for functions:
+// EUSCI_A_SPI_changeClockPhasePolarity().
+//
+//*****************************************************************************
+#define EUSCI_A_SPI_CLOCKPOLARITY_INACTIVITY_HIGH UCCKPL
+#define EUSCI_A_SPI_CLOCKPOLARITY_INACTIVITY_LOW 0x00
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the param parameter for
+// functions: EUSCI_A_SPI_initMaster().
+//
+//*****************************************************************************
+#define EUSCI_A_SPI_CLOCKSOURCE_ACLK UCSSEL__ACLK
+#define EUSCI_A_SPI_CLOCKSOURCE_SMCLK UCSSEL__SMCLK
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the param parameter for
+// functions: EUSCI_A_SPI_initMaster(), and EUSCI_A_SPI_initSlave().
+//
+//*****************************************************************************
+#define EUSCI_A_SPI_3PIN UCMODE_0
+#define EUSCI_A_SPI_4PIN_UCxSTE_ACTIVE_HIGH UCMODE_1
+#define EUSCI_A_SPI_4PIN_UCxSTE_ACTIVE_LOW UCMODE_2
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the select4PinFunctionality
+// parameter for functions: EUSCI_A_SPI_select4PinFunctionality().
+//
+//*****************************************************************************
+#define EUSCI_A_SPI_PREVENT_CONFLICTS_WITH_OTHER_MASTERS 0x00
+#define EUSCI_A_SPI_ENABLE_SIGNAL_FOR_4WIRE_SLAVE UCSTEM
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the mask parameter for
+// functions: EUSCI_A_SPI_enableInterrupt(), EUSCI_A_SPI_disableInterrupt(),
+// EUSCI_A_SPI_getInterruptStatus(), and EUSCI_A_SPI_clearInterrupt() as well
+// as returned by the EUSCI_A_SPI_getInterruptStatus() function.
+//
+//*****************************************************************************
+#define EUSCI_A_SPI_TRANSMIT_INTERRUPT UCTXIE
+#define EUSCI_A_SPI_RECEIVE_INTERRUPT UCRXIE
+
+//*****************************************************************************
+//
+// The following are values that can be passed toThe following are values that
+// can be returned by the EUSCI_A_SPI_isBusy() function.
+//
+//*****************************************************************************
+#define EUSCI_A_SPI_BUSY UCBUSY
+#define EUSCI_A_SPI_NOT_BUSY 0x00
+
+//*****************************************************************************
+//
+// Prototypes for the APIs.
+//
+//*****************************************************************************
+
+//*****************************************************************************
+//
+//! \brief Initializes the SPI Master block.
+//!
+//! Upon successful initialization of the SPI master block, this function will
+//! have set the bus speed for the master, but the SPI Master block still
+//! remains disabled and must be enabled with EUSCI_A_SPI_enable()
+//!
+//! \param baseAddress is the base address of the EUSCI_A_SPI Master module.
+//! \param param is the pointer to struct for master initialization.
+//!
+//! Modified bits are \b UCCKPH, \b UCCKPL, \b UC7BIT, \b UCMSB, \b UCSSELx and
+//! \b UCSWRST of \b UCAxCTLW0 register.
+//!
+//! \return STATUS_SUCCESS
+//
+//*****************************************************************************
+extern void EUSCI_A_SPI_initMaster(uint16_t baseAddress,
+ EUSCI_A_SPI_initMasterParam *param);
+
+//*****************************************************************************
+//
+//! \brief Selects 4Pin Functionality
+//!
+//! This function should be invoked only in 4-wire mode. Invoking this function
+//! has no effect in 3-wire mode.
+//!
+//! \param baseAddress is the base address of the EUSCI_A_SPI module.
+//! \param select4PinFunctionality selects 4 pin functionality
+//! Valid values are:
+//! - \b EUSCI_A_SPI_PREVENT_CONFLICTS_WITH_OTHER_MASTERS
+//! - \b EUSCI_A_SPI_ENABLE_SIGNAL_FOR_4WIRE_SLAVE
+//!
+//! Modified bits are \b UCSTEM of \b UCAxCTLW0 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void EUSCI_A_SPI_select4PinFunctionality(uint16_t baseAddress,
+ uint8_t select4PinFunctionality);
+
+//*****************************************************************************
+//
+//! \brief Initializes the SPI Master clock. At the end of this function call,
+//! SPI module is left enabled.
+//!
+//! \param baseAddress is the base address of the EUSCI_A_SPI module.
+//! \param param is the pointer to struct for master clock setting.
+//!
+//! Modified bits are \b UCSWRST of \b UCAxCTLW0 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void EUSCI_A_SPI_changeMasterClock(uint16_t baseAddress,
+ EUSCI_A_SPI_changeMasterClockParam *param);
+
+//*****************************************************************************
+//
+//! \brief Initializes the SPI Slave block.
+//!
+//! Upon successful initialization of the SPI slave block, this function will
+//! have initialized the slave block, but the SPI Slave block still remains
+//! disabled and must be enabled with EUSCI_A_SPI_enable()
+//!
+//! \param baseAddress is the base address of the EUSCI_A_SPI Slave module.
+//! \param param is the pointer to struct for slave initialization.
+//!
+//! Modified bits are \b UCMSB, \b UCMST, \b UC7BIT, \b UCCKPL, \b UCCKPH, \b
+//! UCMODE and \b UCSWRST of \b UCAxCTLW0 register.
+//!
+//! \return STATUS_SUCCESS
+//
+//*****************************************************************************
+extern void EUSCI_A_SPI_initSlave(uint16_t baseAddress,
+ EUSCI_A_SPI_initSlaveParam *param);
+
+//*****************************************************************************
+//
+//! \brief Changes the SPI clock phase and polarity. At the end of this
+//! function call, SPI module is left enabled.
+//!
+//! \param baseAddress is the base address of the EUSCI_A_SPI module.
+//! \param clockPhase is clock phase select.
+//! Valid values are:
+//! - \b EUSCI_A_SPI_PHASE_DATA_CHANGED_ONFIRST_CAPTURED_ON_NEXT
+//! [Default]
+//! - \b EUSCI_A_SPI_PHASE_DATA_CAPTURED_ONFIRST_CHANGED_ON_NEXT
+//! \param clockPolarity is clock polarity select
+//! Valid values are:
+//! - \b EUSCI_A_SPI_CLOCKPOLARITY_INACTIVITY_HIGH
+//! - \b EUSCI_A_SPI_CLOCKPOLARITY_INACTIVITY_LOW [Default]
+//!
+//! Modified bits are \b UCCKPL, \b UCCKPH and \b UCSWRST of \b UCAxCTLW0
+//! register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void EUSCI_A_SPI_changeClockPhasePolarity(uint16_t baseAddress,
+ uint16_t clockPhase,
+ uint16_t clockPolarity);
+
+//*****************************************************************************
+//
+//! \brief Transmits a byte from the SPI Module.
+//!
+//! This function will place the supplied data into SPI transmit data register
+//! to start transmission.
+//!
+//! \param baseAddress is the base address of the EUSCI_A_SPI module.
+//! \param transmitData data to be transmitted from the SPI module
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void EUSCI_A_SPI_transmitData(uint16_t baseAddress,
+ uint8_t transmitData);
+
+//*****************************************************************************
+//
+//! \brief Receives a byte that has been sent to the SPI Module.
+//!
+//! This function reads a byte of data from the SPI receive data Register.
+//!
+//! \param baseAddress is the base address of the EUSCI_A_SPI module.
+//!
+//! \return Returns the byte received from by the SPI module, cast as an
+//! uint8_t.
+//
+//*****************************************************************************
+extern uint8_t EUSCI_A_SPI_receiveData(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Enables individual SPI interrupt sources.
+//!
+//! Enables the indicated SPI interrupt sources. Only the sources that are
+//! enabled can be reflected to the processor interrupt; disabled sources have
+//! no effect on the processor. Does not clear interrupt flags.
+//!
+//! \param baseAddress is the base address of the EUSCI_A_SPI module.
+//! \param mask is the bit mask of the interrupt sources to be enabled.
+//! Mask value is the logical OR of any of the following:
+//! - \b EUSCI_A_SPI_TRANSMIT_INTERRUPT
+//! - \b EUSCI_A_SPI_RECEIVE_INTERRUPT
+//!
+//! Modified bits of \b UCAxIFG register and bits of \b UCAxIE register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void EUSCI_A_SPI_enableInterrupt(uint16_t baseAddress,
+ uint8_t mask);
+
+//*****************************************************************************
+//
+//! \brief Disables individual SPI interrupt sources.
+//!
+//! Disables the indicated SPI interrupt sources. Only the sources that are
+//! enabled can be reflected to the processor interrupt; disabled sources have
+//! no effect on the processor.
+//!
+//! \param baseAddress is the base address of the EUSCI_A_SPI module.
+//! \param mask is the bit mask of the interrupt sources to be disabled.
+//! Mask value is the logical OR of any of the following:
+//! - \b EUSCI_A_SPI_TRANSMIT_INTERRUPT
+//! - \b EUSCI_A_SPI_RECEIVE_INTERRUPT
+//!
+//! Modified bits of \b UCAxIE register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void EUSCI_A_SPI_disableInterrupt(uint16_t baseAddress,
+ uint8_t mask);
+
+//*****************************************************************************
+//
+//! \brief Gets the current SPI interrupt status.
+//!
+//! This returns the interrupt status for the SPI module based on which flag is
+//! passed.
+//!
+//! \param baseAddress is the base address of the EUSCI_A_SPI module.
+//! \param mask is the masked interrupt flag status to be returned.
+//! Mask value is the logical OR of any of the following:
+//! - \b EUSCI_A_SPI_TRANSMIT_INTERRUPT
+//! - \b EUSCI_A_SPI_RECEIVE_INTERRUPT
+//!
+//! \return Logical OR of any of the following:
+//! - \b EUSCI_A_SPI_TRANSMIT_INTERRUPT
+//! - \b EUSCI_A_SPI_RECEIVE_INTERRUPT
+//! \n indicating the status of the masked interrupts
+//
+//*****************************************************************************
+extern uint8_t EUSCI_A_SPI_getInterruptStatus(uint16_t baseAddress,
+ uint8_t mask);
+
+//*****************************************************************************
+//
+//! \brief Clears the selected SPI interrupt status flag.
+//!
+//! \param baseAddress is the base address of the EUSCI_A_SPI module.
+//! \param mask is the masked interrupt flag to be cleared.
+//! Mask value is the logical OR of any of the following:
+//! - \b EUSCI_A_SPI_TRANSMIT_INTERRUPT
+//! - \b EUSCI_A_SPI_RECEIVE_INTERRUPT
+//!
+//! Modified bits of \b UCAxIFG register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void EUSCI_A_SPI_clearInterrupt(uint16_t baseAddress,
+ uint8_t mask);
+
+//*****************************************************************************
+//
+//! \brief Enables the SPI block.
+//!
+//! This will enable operation of the SPI block.
+//!
+//! \param baseAddress is the base address of the EUSCI_A_SPI module.
+//!
+//! Modified bits are \b UCSWRST of \b UCAxCTLW0 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void EUSCI_A_SPI_enable(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Disables the SPI block.
+//!
+//! This will disable operation of the SPI block.
+//!
+//! \param baseAddress is the base address of the EUSCI_A_SPI module.
+//!
+//! Modified bits are \b UCSWRST of \b UCAxCTLW0 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void EUSCI_A_SPI_disable(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Returns the address of the RX Buffer of the SPI for the DMA module.
+//!
+//! Returns the address of the SPI RX Buffer. This can be used in conjunction
+//! with the DMA to store the received data directly to memory.
+//!
+//! \param baseAddress is the base address of the EUSCI_A_SPI module.
+//!
+//! \return the address of the RX Buffer
+//
+//*****************************************************************************
+extern uint32_t EUSCI_A_SPI_getReceiveBufferAddress(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Returns the address of the TX Buffer of the SPI for the DMA module.
+//!
+//! Returns the address of the SPI TX Buffer. This can be used in conjunction
+//! with the DMA to obtain transmitted data directly from memory.
+//!
+//! \param baseAddress is the base address of the EUSCI_A_SPI module.
+//!
+//! \return the address of the TX Buffer
+//
+//*****************************************************************************
+extern uint32_t EUSCI_A_SPI_getTransmitBufferAddress(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Indicates whether or not the SPI bus is busy.
+//!
+//! This function returns an indication of whether or not the SPI bus is
+//! busy.This function checks the status of the bus via UCBBUSY bit
+//!
+//! \param baseAddress is the base address of the EUSCI_A_SPI module.
+//!
+//! \return One of the following:
+//! - \b EUSCI_A_SPI_BUSY
+//! - \b EUSCI_A_SPI_NOT_BUSY
+//! \n indicating if the EUSCI_A_SPI is busy
+//
+//*****************************************************************************
+extern uint16_t EUSCI_A_SPI_isBusy(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+// Mark the end of the C bindings section for C++ compilers.
+//
+//*****************************************************************************
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+#endif // __MSP430WARE_EUSCI_A_SPI_H__
diff --git a/Apps/FlightSoftware/MotorControl/driverlib/eusci_a_uart.c b/Apps/FlightSoftware/MotorControl/driverlib/eusci_a_uart.c
new file mode 100644
index 000000000..cf0e61e78
--- /dev/null
+++ b/Apps/FlightSoftware/MotorControl/driverlib/eusci_a_uart.c
@@ -0,0 +1,267 @@
+/* --COPYRIGHT--,BSD
+ * Copyright (c) 2017, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * --/COPYRIGHT--*/
+//*****************************************************************************
+//
+// eusci_a_uart.c - Driver for the eusci_a_uart Module.
+//
+//*****************************************************************************
+
+//*****************************************************************************
+//
+//! \addtogroup eusci_a_uart_api eusci_a_uart
+//! @{
+//
+//*****************************************************************************
+
+#include "inc/hw_memmap.h"
+
+#ifdef __MSP430_HAS_EUSCI_Ax__
+#include "eusci_a_uart.h"
+
+#include
+
+bool EUSCI_A_UART_init(uint16_t baseAddress, EUSCI_A_UART_initParam *param)
+{
+ bool retVal = STATUS_SUCCESS;
+
+ //Disable the USCI Module
+ HWREG16(baseAddress + OFS_UCAxCTLW0) |= UCSWRST;
+
+ //Clock source select
+ HWREG16(baseAddress + OFS_UCAxCTLW0) &= ~UCSSEL_3;
+ HWREG16(baseAddress + OFS_UCAxCTLW0) |= param->selectClockSource;
+
+ //MSB, LSB select
+ HWREG16(baseAddress + OFS_UCAxCTLW0) &= ~UCMSB;
+ HWREG16(baseAddress + OFS_UCAxCTLW0) |= param->msborLsbFirst;
+
+ //UCSPB = 0(1 stop bit) OR 1(2 stop bits)
+ HWREG16(baseAddress + OFS_UCAxCTLW0) &= ~UCSPB;
+ HWREG16(baseAddress + OFS_UCAxCTLW0) |= param->numberofStopBits;
+
+ //Parity
+ switch (param->parity){
+ case EUSCI_A_UART_NO_PARITY:
+ //No Parity
+ HWREG16(baseAddress + OFS_UCAxCTLW0) &= ~UCPEN;
+ break;
+ case EUSCI_A_UART_ODD_PARITY:
+ //Odd Parity
+ HWREG16(baseAddress + OFS_UCAxCTLW0) |= UCPEN;
+ HWREG16(baseAddress + OFS_UCAxCTLW0) &= ~UCPAR;
+ break;
+ case EUSCI_A_UART_EVEN_PARITY:
+ //Even Parity
+ HWREG16(baseAddress + OFS_UCAxCTLW0) |= UCPEN;
+ HWREG16(baseAddress + OFS_UCAxCTLW0) |= UCPAR;
+ break;
+ }
+
+ //BaudRate Control Register
+ HWREG16(baseAddress + OFS_UCAxBRW ) = param->clockPrescalar;
+ //Modulation Control Register
+ HWREG16(baseAddress + OFS_UCAxMCTLW) = ((param->secondModReg <<8)
+ + (param->firstModReg <<4) + param->overSampling );
+
+ //Asynchronous mode & 8 bit character select & clear mode
+ HWREG16(baseAddress + OFS_UCAxCTLW0) &= ~(UCSYNC +
+ UC7BIT +
+ UCMODE_3
+ );
+
+ //Configure UART mode.
+ HWREG16(baseAddress + OFS_UCAxCTLW0) |= param->uartMode ;
+
+ //Reset UCRXIE, UCBRKIE, UCDORM, UCTXADDR, UCTXBRK
+ HWREG16(baseAddress + OFS_UCAxCTLW0) &= ~(UCRXEIE + UCBRKIE + UCDORM +
+ UCTXADDR + UCTXBRK
+ );
+ return (retVal);
+}
+
+void EUSCI_A_UART_transmitData ( uint16_t baseAddress,
+ uint8_t transmitData
+ )
+{
+ //If interrupts are not used, poll for flags
+ if (!(HWREG16(baseAddress + OFS_UCAxIE) & UCTXIE)){
+ //Poll for transmit interrupt flag
+ while (!(HWREG16(baseAddress + OFS_UCAxIFG) & UCTXIFG));
+ }
+
+ HWREG16(baseAddress + OFS_UCAxTXBUF) = transmitData;
+}
+
+uint8_t EUSCI_A_UART_receiveData (uint16_t baseAddress)
+{
+ //If interrupts are not used, poll for flags
+ if (!(HWREG16(baseAddress + OFS_UCAxIE) & UCRXIE)){
+ //Poll for receive interrupt flag
+ while (!(HWREG16(baseAddress + OFS_UCAxIFG) & UCRXIFG));
+ }
+
+ return ( HWREG16(baseAddress + OFS_UCAxRXBUF)) ;
+}
+
+void EUSCI_A_UART_enableInterrupt (uint16_t baseAddress,
+ uint8_t mask
+ )
+{
+ uint8_t locMask;
+
+ locMask = (mask & (EUSCI_A_UART_RECEIVE_INTERRUPT
+ | EUSCI_A_UART_TRANSMIT_INTERRUPT
+ | EUSCI_A_UART_STARTBIT_INTERRUPT
+ | EUSCI_A_UART_TRANSMIT_COMPLETE_INTERRUPT));
+
+ HWREG16(baseAddress + OFS_UCAxIE) |= locMask;
+
+ locMask = (mask & (EUSCI_A_UART_RECEIVE_ERRONEOUSCHAR_INTERRUPT
+ | EUSCI_A_UART_BREAKCHAR_INTERRUPT));
+ HWREG16(baseAddress + OFS_UCAxCTLW0) |= locMask;
+}
+
+void EUSCI_A_UART_disableInterrupt (uint16_t baseAddress,
+ uint8_t mask
+ )
+{
+ uint8_t locMask;
+
+ locMask = (mask & (EUSCI_A_UART_RECEIVE_INTERRUPT
+ | EUSCI_A_UART_TRANSMIT_INTERRUPT
+ | EUSCI_A_UART_STARTBIT_INTERRUPT
+ | EUSCI_A_UART_TRANSMIT_COMPLETE_INTERRUPT));
+ HWREG16(baseAddress + OFS_UCAxIE) &= ~locMask;
+
+ locMask = (mask & (EUSCI_A_UART_RECEIVE_ERRONEOUSCHAR_INTERRUPT
+ | EUSCI_A_UART_BREAKCHAR_INTERRUPT));
+ HWREG16(baseAddress + OFS_UCAxCTLW0) &= ~locMask;
+}
+
+uint8_t EUSCI_A_UART_getInterruptStatus (uint16_t baseAddress,
+ uint8_t mask)
+{
+ return ( HWREG16(baseAddress + OFS_UCAxIFG) & mask );
+}
+
+void EUSCI_A_UART_clearInterrupt (uint16_t baseAddress, uint8_t mask)
+{
+ //Clear the UART interrupt source.
+ HWREG16(baseAddress + OFS_UCAxIFG) &= ~(mask);
+}
+
+void EUSCI_A_UART_enable (uint16_t baseAddress)
+{
+ //Reset the UCSWRST bit to enable the USCI Module
+ HWREG16(baseAddress + OFS_UCAxCTLW0) &= ~(UCSWRST);
+}
+
+void EUSCI_A_UART_disable (uint16_t baseAddress)
+{
+ //Set the UCSWRST bit to disable the USCI Module
+ HWREG16(baseAddress + OFS_UCAxCTLW0) |= UCSWRST;
+}
+
+uint8_t EUSCI_A_UART_queryStatusFlags (uint16_t baseAddress,
+ uint8_t mask)
+{
+ return ( HWREG16(baseAddress + OFS_UCAxSTATW) & mask );
+}
+
+void EUSCI_A_UART_setDormant (uint16_t baseAddress)
+{
+ HWREG16(baseAddress + OFS_UCAxCTLW0) |= UCDORM;
+}
+
+void EUSCI_A_UART_resetDormant (uint16_t baseAddress)
+{
+ HWREG16(baseAddress + OFS_UCAxCTLW0) &= ~UCDORM;
+}
+
+void EUSCI_A_UART_transmitAddress (uint16_t baseAddress,
+ uint8_t transmitAddress)
+{
+ //Set UCTXADDR bit
+ HWREG16(baseAddress + OFS_UCAxCTLW0) |= UCTXADDR;
+
+ //Place next byte to be sent into the transmit buffer
+ HWREG16(baseAddress + OFS_UCAxTXBUF) = transmitAddress;
+}
+
+void EUSCI_A_UART_transmitBreak (uint16_t baseAddress)
+{
+ //Set UCTXADDR bit
+ HWREG16(baseAddress + OFS_UCAxCTLW0) |= UCTXBRK;
+
+ //If current mode is automatic baud-rate detection
+ if (EUSCI_A_UART_AUTOMATIC_BAUDRATE_DETECTION_MODE ==
+ (HWREG16(baseAddress + OFS_UCAxCTLW0) &
+ EUSCI_A_UART_AUTOMATIC_BAUDRATE_DETECTION_MODE)){
+ HWREG16(baseAddress + OFS_UCAxTXBUF) = EUSCI_A_UART_AUTOMATICBAUDRATE_SYNC;
+ } else {
+ HWREG16(baseAddress + OFS_UCAxTXBUF) = DEFAULT_SYNC;
+ }
+
+ //If interrupts are not used, poll for flags
+ if (!(HWREG16(baseAddress + OFS_UCAxIE) & UCTXIE)){
+ //Poll for transmit interrupt flag
+ while (!(HWREG16(baseAddress + OFS_UCAxIFG) & UCTXIFG));
+ }
+}
+
+uint32_t EUSCI_A_UART_getReceiveBufferAddress (uint16_t baseAddress)
+{
+ return ( baseAddress + OFS_UCAxRXBUF );
+}
+
+uint32_t EUSCI_A_UART_getTransmitBufferAddress (uint16_t baseAddress)
+{
+ return ( baseAddress + OFS_UCAxTXBUF );
+}
+
+void EUSCI_A_UART_selectDeglitchTime(uint16_t baseAddress,
+ uint16_t deglitchTime
+ )
+{
+ HWREG16(baseAddress + OFS_UCAxCTLW1) &= ~(UCGLIT1 + UCGLIT0);
+
+ HWREG16(baseAddress + OFS_UCAxCTLW1) |= deglitchTime;
+}
+
+
+#endif
+//*****************************************************************************
+//
+//! Close the doxygen group for eusci_a_uart_api
+//! @}
+//
+//*****************************************************************************
diff --git a/Apps/FlightSoftware/MotorControl/driverlib/eusci_a_uart.h b/Apps/FlightSoftware/MotorControl/driverlib/eusci_a_uart.h
new file mode 100644
index 000000000..4c9e12f7d
--- /dev/null
+++ b/Apps/FlightSoftware/MotorControl/driverlib/eusci_a_uart.h
@@ -0,0 +1,605 @@
+/* --COPYRIGHT--,BSD
+ * Copyright (c) 2017, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * --/COPYRIGHT--*/
+//*****************************************************************************
+//
+// eusci_a_uart.h - Driver for the EUSCI_A_UART Module.
+//
+//*****************************************************************************
+
+#ifndef __MSP430WARE_EUSCI_A_UART_H__
+#define __MSP430WARE_EUSCI_A_UART_H__
+
+#include "inc/hw_memmap.h"
+
+#ifdef __MSP430_HAS_EUSCI_Ax__
+
+//*****************************************************************************
+//
+// If building with a C++ compiler, make all of the definitions in this header
+// have a C binding.
+//
+//*****************************************************************************
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+#include "inc/hw_memmap.h"
+//*****************************************************************************
+//
+// The following values are the sync characters possible.
+//
+//*****************************************************************************
+#define DEFAULT_SYNC 0x00
+#define EUSCI_A_UART_AUTOMATICBAUDRATE_SYNC 0x55
+
+//*****************************************************************************
+//
+//! \brief Used in the EUSCI_A_UART_init() function as the param parameter.
+//
+//*****************************************************************************
+typedef struct EUSCI_A_UART_initParam {
+ //! Selects Clock source. Refer to device specific datasheet for available
+ //! options.
+ //! \n Valid values are:
+ //! - \b EUSCI_A_UART_CLOCKSOURCE_SMCLK
+ //! - \b EUSCI_A_UART_CLOCKSOURCE_ACLK
+ uint8_t selectClockSource;
+ //! Is the value to be written into UCBRx bits
+ uint16_t clockPrescalar;
+ //! Is First modulation stage register setting. This value is a pre-
+ //! calculated value which can be obtained from the Device Users Guide.
+ //! This value is written into UCBRFx bits of UCAxMCTLW.
+ uint8_t firstModReg;
+ //! Is Second modulation stage register setting. This value is a pre-
+ //! calculated value which can be obtained from the Device Users Guide.
+ //! This value is written into UCBRSx bits of UCAxMCTLW.
+ uint8_t secondModReg;
+ //! Is the desired parity.
+ //! \n Valid values are:
+ //! - \b EUSCI_A_UART_NO_PARITY [Default]
+ //! - \b EUSCI_A_UART_ODD_PARITY
+ //! - \b EUSCI_A_UART_EVEN_PARITY
+ uint8_t parity;
+ //! Controls direction of receive and transmit shift register.
+ //! \n Valid values are:
+ //! - \b EUSCI_A_UART_MSB_FIRST
+ //! - \b EUSCI_A_UART_LSB_FIRST [Default]
+ uint16_t msborLsbFirst;
+ //! Indicates one/two STOP bits
+ //! \n Valid values are:
+ //! - \b EUSCI_A_UART_ONE_STOP_BIT [Default]
+ //! - \b EUSCI_A_UART_TWO_STOP_BITS
+ uint16_t numberofStopBits;
+ //! Selects the mode of operation
+ //! \n Valid values are:
+ //! - \b EUSCI_A_UART_MODE [Default]
+ //! - \b EUSCI_A_UART_IDLE_LINE_MULTI_PROCESSOR_MODE
+ //! - \b EUSCI_A_UART_ADDRESS_BIT_MULTI_PROCESSOR_MODE
+ //! - \b EUSCI_A_UART_AUTOMATIC_BAUDRATE_DETECTION_MODE
+ uint16_t uartMode;
+ //! Indicates low frequency or oversampling baud generation
+ //! \n Valid values are:
+ //! - \b EUSCI_A_UART_OVERSAMPLING_BAUDRATE_GENERATION
+ //! - \b EUSCI_A_UART_LOW_FREQUENCY_BAUDRATE_GENERATION
+ uint8_t overSampling;
+} EUSCI_A_UART_initParam;
+
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the param parameter for
+// functions: EUSCI_A_UART_init().
+//
+//*****************************************************************************
+#define EUSCI_A_UART_NO_PARITY 0x00
+#define EUSCI_A_UART_ODD_PARITY 0x01
+#define EUSCI_A_UART_EVEN_PARITY 0x02
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the param parameter for
+// functions: EUSCI_A_UART_init().
+//
+//*****************************************************************************
+#define EUSCI_A_UART_MSB_FIRST UCMSB
+#define EUSCI_A_UART_LSB_FIRST 0x00
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the param parameter for
+// functions: EUSCI_A_UART_init().
+//
+//*****************************************************************************
+#define EUSCI_A_UART_MODE UCMODE_0
+#define EUSCI_A_UART_IDLE_LINE_MULTI_PROCESSOR_MODE UCMODE_1
+#define EUSCI_A_UART_ADDRESS_BIT_MULTI_PROCESSOR_MODE UCMODE_2
+#define EUSCI_A_UART_AUTOMATIC_BAUDRATE_DETECTION_MODE UCMODE_3
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the param parameter for
+// functions: EUSCI_A_UART_init().
+//
+//*****************************************************************************
+#define EUSCI_A_UART_CLOCKSOURCE_SMCLK UCSSEL__SMCLK
+#define EUSCI_A_UART_CLOCKSOURCE_ACLK UCSSEL__ACLK
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the param parameter for
+// functions: EUSCI_A_UART_init().
+//
+//*****************************************************************************
+#define EUSCI_A_UART_ONE_STOP_BIT 0x00
+#define EUSCI_A_UART_TWO_STOP_BITS UCSPB
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the param parameter for
+// functions: EUSCI_A_UART_init().
+//
+//*****************************************************************************
+#define EUSCI_A_UART_OVERSAMPLING_BAUDRATE_GENERATION 0x01
+#define EUSCI_A_UART_LOW_FREQUENCY_BAUDRATE_GENERATION 0x00
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the mask parameter for
+// functions: EUSCI_A_UART_enableInterrupt(), and
+// EUSCI_A_UART_disableInterrupt().
+//
+//*****************************************************************************
+#define EUSCI_A_UART_RECEIVE_INTERRUPT UCRXIE
+#define EUSCI_A_UART_TRANSMIT_INTERRUPT UCTXIE
+#define EUSCI_A_UART_RECEIVE_ERRONEOUSCHAR_INTERRUPT UCRXEIE
+#define EUSCI_A_UART_BREAKCHAR_INTERRUPT UCBRKIE
+#define EUSCI_A_UART_STARTBIT_INTERRUPT UCSTTIE
+#define EUSCI_A_UART_TRANSMIT_COMPLETE_INTERRUPT UCTXCPTIE
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the mask parameter for
+// functions: EUSCI_A_UART_getInterruptStatus(), and
+// EUSCI_A_UART_clearInterrupt() as well as returned by the
+// EUSCI_A_UART_getInterruptStatus() function.
+//
+//*****************************************************************************
+#define EUSCI_A_UART_RECEIVE_INTERRUPT_FLAG UCRXIFG
+#define EUSCI_A_UART_TRANSMIT_INTERRUPT_FLAG UCTXIFG
+#define EUSCI_A_UART_STARTBIT_INTERRUPT_FLAG UCSTTIFG
+#define EUSCI_A_UART_TRANSMIT_COMPLETE_INTERRUPT_FLAG UCTXCPTIFG
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the mask parameter for
+// functions: EUSCI_A_UART_queryStatusFlags() as well as returned by the
+// EUSCI_A_UART_queryStatusFlags() function.
+//
+//*****************************************************************************
+#define EUSCI_A_UART_LISTEN_ENABLE UCLISTEN
+#define EUSCI_A_UART_FRAMING_ERROR UCFE
+#define EUSCI_A_UART_OVERRUN_ERROR UCOE
+#define EUSCI_A_UART_PARITY_ERROR UCPE
+#define EUSCI_A_UART_BREAK_DETECT UCBRK
+#define EUSCI_A_UART_RECEIVE_ERROR UCRXERR
+#define EUSCI_A_UART_ADDRESS_RECEIVED UCADDR
+#define EUSCI_A_UART_IDLELINE UCIDLE
+#define EUSCI_A_UART_BUSY UCBUSY
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the deglitchTime parameter
+// for functions: EUSCI_A_UART_selectDeglitchTime().
+//
+//*****************************************************************************
+#define EUSCI_A_UART_DEGLITCH_TIME_2ns 0x00
+#define EUSCI_A_UART_DEGLITCH_TIME_50ns UCGLIT0
+#define EUSCI_A_UART_DEGLITCH_TIME_100ns UCGLIT1
+#define EUSCI_A_UART_DEGLITCH_TIME_200ns (UCGLIT0 + UCGLIT1)
+
+//*****************************************************************************
+//
+// Prototypes for the APIs.
+//
+//*****************************************************************************
+
+//*****************************************************************************
+//
+//! \brief Advanced initialization routine for the UART block. The values to be
+//! written into the clockPrescalar, firstModReg, secondModReg and overSampling
+//! parameters should be pre-computed and passed into the initialization
+//! function.
+//!
+//! Upon successful initialization of the UART block, this function will have
+//! initialized the module, but the UART block still remains disabled and must
+//! be enabled with EUSCI_A_UART_enable(). To calculate values for
+//! clockPrescalar, firstModReg, secondModReg and overSampling please use the
+//! link below.
+//!
+//! http://software-dl.ti.com/msp430/msp430_public_sw/mcu/msp430/MSP430BaudRateConverter/index.html
+//!
+//! \param baseAddress is the base address of the EUSCI_A_UART module.
+//! \param param is the pointer to struct for initialization.
+//!
+//! Modified bits are \b UCPEN, \b UCPAR, \b UCMSB, \b UC7BIT, \b UCSPB, \b
+//! UCMODEx and \b UCSYNC of \b UCAxCTL0 register; bits \b UCSSELx and \b
+//! UCSWRST of \b UCAxCTL1 register.
+//!
+//! \return STATUS_SUCCESS or STATUS_FAIL of the initialization process
+//
+//*****************************************************************************
+extern bool EUSCI_A_UART_init(uint16_t baseAddress,
+ EUSCI_A_UART_initParam *param);
+
+//*****************************************************************************
+//
+//! \brief Transmits a byte from the UART Module.Please note that if TX
+//! interrupt is disabled, this function manually polls the TX IFG flag waiting
+//! for an indication that it is safe to write to the transmit buffer and does
+//! not time-out
+//!
+//! This function will place the supplied data into UART transmit data register
+//! to start transmission
+//!
+//! \param baseAddress is the base address of the EUSCI_A_UART module.
+//! \param transmitData data to be transmitted from the UART module
+//!
+//! Modified bits of \b UCAxTXBUF register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void EUSCI_A_UART_transmitData(uint16_t baseAddress,
+ uint8_t transmitData);
+
+//*****************************************************************************
+//
+//! \brief Receives a byte that has been sent to the UART Module.
+//!
+//! This function reads a byte of data from the UART receive data Register.
+//!
+//! \param baseAddress is the base address of the EUSCI_A_UART module.
+//!
+//! Modified bits of \b UCAxRXBUF register.
+//!
+//! \return Returns the byte received from by the UART module, cast as an
+//! uint8_t.
+//
+//*****************************************************************************
+extern uint8_t EUSCI_A_UART_receiveData(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Enables individual UART interrupt sources.
+//!
+//! Enables the indicated UART interrupt sources. The interrupt flag is first
+//! and then the corresponding interrupt is enabled. Only the sources that are
+//! enabled can be reflected to the processor interrupt; disabled sources have
+//! no effect on the processor. Does not clear interrupt flags.
+//!
+//! \param baseAddress is the base address of the EUSCI_A_UART module.
+//! \param mask is the bit mask of the interrupt sources to be enabled.
+//! Mask value is the logical OR of any of the following:
+//! - \b EUSCI_A_UART_RECEIVE_INTERRUPT - Receive interrupt
+//! - \b EUSCI_A_UART_TRANSMIT_INTERRUPT - Transmit interrupt
+//! - \b EUSCI_A_UART_RECEIVE_ERRONEOUSCHAR_INTERRUPT - Receive
+//! erroneous-character interrupt enable
+//! - \b EUSCI_A_UART_BREAKCHAR_INTERRUPT - Receive break character
+//! interrupt enable
+//! - \b EUSCI_A_UART_STARTBIT_INTERRUPT - Start bit received interrupt
+//! enable
+//! - \b EUSCI_A_UART_TRANSMIT_COMPLETE_INTERRUPT - Transmit complete
+//! interrupt enable
+//!
+//! Modified bits of \b UCAxCTL1 register and bits of \b UCAxIE register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void EUSCI_A_UART_enableInterrupt(uint16_t baseAddress,
+ uint8_t mask);
+
+//*****************************************************************************
+//
+//! \brief Disables individual UART interrupt sources.
+//!
+//! Disables the indicated UART interrupt sources. Only the sources that are
+//! enabled can be reflected to the processor interrupt; disabled sources have
+//! no effect on the processor.
+//!
+//! \param baseAddress is the base address of the EUSCI_A_UART module.
+//! \param mask is the bit mask of the interrupt sources to be disabled.
+//! Mask value is the logical OR of any of the following:
+//! - \b EUSCI_A_UART_RECEIVE_INTERRUPT - Receive interrupt
+//! - \b EUSCI_A_UART_TRANSMIT_INTERRUPT - Transmit interrupt
+//! - \b EUSCI_A_UART_RECEIVE_ERRONEOUSCHAR_INTERRUPT - Receive
+//! erroneous-character interrupt enable
+//! - \b EUSCI_A_UART_BREAKCHAR_INTERRUPT - Receive break character
+//! interrupt enable
+//! - \b EUSCI_A_UART_STARTBIT_INTERRUPT - Start bit received interrupt
+//! enable
+//! - \b EUSCI_A_UART_TRANSMIT_COMPLETE_INTERRUPT - Transmit complete
+//! interrupt enable
+//!
+//! Modified bits of \b UCAxCTL1 register and bits of \b UCAxIE register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void EUSCI_A_UART_disableInterrupt(uint16_t baseAddress,
+ uint8_t mask);
+
+//*****************************************************************************
+//
+//! \brief Gets the current UART interrupt status.
+//!
+//! This returns the interrupt status for the UART module based on which flag
+//! is passed.
+//!
+//! \param baseAddress is the base address of the EUSCI_A_UART module.
+//! \param mask is the masked interrupt flag status to be returned.
+//! Mask value is the logical OR of any of the following:
+//! - \b EUSCI_A_UART_RECEIVE_INTERRUPT_FLAG
+//! - \b EUSCI_A_UART_TRANSMIT_INTERRUPT_FLAG
+//! - \b EUSCI_A_UART_STARTBIT_INTERRUPT_FLAG
+//! - \b EUSCI_A_UART_TRANSMIT_COMPLETE_INTERRUPT_FLAG
+//!
+//! Modified bits of \b UCAxIFG register.
+//!
+//! \return Logical OR of any of the following:
+//! - \b EUSCI_A_UART_RECEIVE_INTERRUPT_FLAG
+//! - \b EUSCI_A_UART_TRANSMIT_INTERRUPT_FLAG
+//! - \b EUSCI_A_UART_STARTBIT_INTERRUPT_FLAG
+//! - \b EUSCI_A_UART_TRANSMIT_COMPLETE_INTERRUPT_FLAG
+//! \n indicating the status of the masked flags
+//
+//*****************************************************************************
+extern uint8_t EUSCI_A_UART_getInterruptStatus(uint16_t baseAddress,
+ uint8_t mask);
+
+//*****************************************************************************
+//
+//! \brief Clears UART interrupt sources.
+//!
+//! The UART interrupt source is cleared, so that it no longer asserts. The
+//! highest interrupt flag is automatically cleared when an interrupt vector
+//! generator is used.
+//!
+//! \param baseAddress is the base address of the EUSCI_A_UART module.
+//! \param mask is a bit mask of the interrupt sources to be cleared.
+//! Mask value is the logical OR of any of the following:
+//! - \b EUSCI_A_UART_RECEIVE_INTERRUPT_FLAG
+//! - \b EUSCI_A_UART_TRANSMIT_INTERRUPT_FLAG
+//! - \b EUSCI_A_UART_STARTBIT_INTERRUPT_FLAG
+//! - \b EUSCI_A_UART_TRANSMIT_COMPLETE_INTERRUPT_FLAG
+//!
+//! Modified bits of \b UCAxIFG register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void EUSCI_A_UART_clearInterrupt(uint16_t baseAddress,
+ uint8_t mask);
+
+//*****************************************************************************
+//
+//! \brief Enables the UART block.
+//!
+//! This will enable operation of the UART block.
+//!
+//! \param baseAddress is the base address of the EUSCI_A_UART module.
+//!
+//! Modified bits are \b UCSWRST of \b UCAxCTL1 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void EUSCI_A_UART_enable(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Disables the UART block.
+//!
+//! This will disable operation of the UART block.
+//!
+//! \param baseAddress is the base address of the EUSCI_A_UART module.
+//!
+//! Modified bits are \b UCSWRST of \b UCAxCTL1 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void EUSCI_A_UART_disable(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Gets the current UART status flags.
+//!
+//! This returns the status for the UART module based on which flag is passed.
+//!
+//! \param baseAddress is the base address of the EUSCI_A_UART module.
+//! \param mask is the masked interrupt flag status to be returned.
+//! Mask value is the logical OR of any of the following:
+//! - \b EUSCI_A_UART_LISTEN_ENABLE
+//! - \b EUSCI_A_UART_FRAMING_ERROR
+//! - \b EUSCI_A_UART_OVERRUN_ERROR
+//! - \b EUSCI_A_UART_PARITY_ERROR
+//! - \b EUSCI_A_UART_BREAK_DETECT
+//! - \b EUSCI_A_UART_RECEIVE_ERROR
+//! - \b EUSCI_A_UART_ADDRESS_RECEIVED
+//! - \b EUSCI_A_UART_IDLELINE
+//! - \b EUSCI_A_UART_BUSY
+//!
+//! Modified bits of \b UCAxSTAT register.
+//!
+//! \return Logical OR of any of the following:
+//! - \b EUSCI_A_UART_LISTEN_ENABLE
+//! - \b EUSCI_A_UART_FRAMING_ERROR
+//! - \b EUSCI_A_UART_OVERRUN_ERROR
+//! - \b EUSCI_A_UART_PARITY_ERROR
+//! - \b EUSCI_A_UART_BREAK_DETECT
+//! - \b EUSCI_A_UART_RECEIVE_ERROR
+//! - \b EUSCI_A_UART_ADDRESS_RECEIVED
+//! - \b EUSCI_A_UART_IDLELINE
+//! - \b EUSCI_A_UART_BUSY
+//! \n indicating the status of the masked interrupt flags
+//
+//*****************************************************************************
+extern uint8_t EUSCI_A_UART_queryStatusFlags(uint16_t baseAddress,
+ uint8_t mask);
+
+//*****************************************************************************
+//
+//! \brief Sets the UART module in dormant mode
+//!
+//! Puts USCI in sleep mode Only characters that are preceded by an idle-line
+//! or with address bit set UCRXIFG. In UART mode with automatic baud-rate
+//! detection, only the combination of a break and sync field sets UCRXIFG.
+//!
+//! \param baseAddress is the base address of the EUSCI_A_UART module.
+//!
+//! Modified bits of \b UCAxCTL1 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void EUSCI_A_UART_setDormant(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Re-enables UART module from dormant mode
+//!
+//! Not dormant. All received characters set UCRXIFG.
+//!
+//! \param baseAddress is the base address of the EUSCI_A_UART module.
+//!
+//! Modified bits are \b UCDORM of \b UCAxCTL1 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void EUSCI_A_UART_resetDormant(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Transmits the next byte to be transmitted marked as address
+//! depending on selected multiprocessor mode
+//!
+//! \param baseAddress is the base address of the EUSCI_A_UART module.
+//! \param transmitAddress is the next byte to be transmitted
+//!
+//! Modified bits of \b UCAxTXBUF register and bits of \b UCAxCTL1 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void EUSCI_A_UART_transmitAddress(uint16_t baseAddress,
+ uint8_t transmitAddress);
+
+//*****************************************************************************
+//
+//! \brief Transmit break.
+//!
+//! Transmits a break with the next write to the transmit buffer. In UART mode
+//! with automatic baud-rate detection,
+//! EUSCI_A_UART_AUTOMATICBAUDRATE_SYNC(0x55) must be written into UCAxTXBUF to
+//! generate the required break/sync fields. Otherwise, DEFAULT_SYNC(0x00) must
+//! be written into the transmit buffer. Also ensures module is ready for
+//! transmitting the next data.
+//!
+//! \param baseAddress is the base address of the EUSCI_A_UART module.
+//!
+//! Modified bits of \b UCAxTXBUF register and bits of \b UCAxCTL1 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void EUSCI_A_UART_transmitBreak(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Returns the address of the RX Buffer of the UART for the DMA module.
+//!
+//! Returns the address of the UART RX Buffer. This can be used in conjunction
+//! with the DMA to store the received data directly to memory.
+//!
+//! \param baseAddress is the base address of the EUSCI_A_UART module.
+//!
+//! \return Address of RX Buffer
+//
+//*****************************************************************************
+extern uint32_t EUSCI_A_UART_getReceiveBufferAddress(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Returns the address of the TX Buffer of the UART for the DMA module.
+//!
+//! Returns the address of the UART TX Buffer. This can be used in conjunction
+//! with the DMA to obtain transmitted data directly from memory.
+//!
+//! \param baseAddress is the base address of the EUSCI_A_UART module.
+//!
+//! \return Address of TX Buffer
+//
+//*****************************************************************************
+extern uint32_t EUSCI_A_UART_getTransmitBufferAddress(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Sets the deglitch time
+//!
+//! \param baseAddress is the base address of the EUSCI_A_UART module.
+//! \param deglitchTime is the selected deglitch time
+//! Valid values are:
+//! - \b EUSCI_A_UART_DEGLITCH_TIME_2ns
+//! - \b EUSCI_A_UART_DEGLITCH_TIME_50ns
+//! - \b EUSCI_A_UART_DEGLITCH_TIME_100ns
+//! - \b EUSCI_A_UART_DEGLITCH_TIME_200ns
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void EUSCI_A_UART_selectDeglitchTime(uint16_t baseAddress,
+ uint16_t deglitchTime);
+
+//*****************************************************************************
+//
+// Mark the end of the C bindings section for C++ compilers.
+//
+//*****************************************************************************
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+#endif // __MSP430WARE_EUSCI_A_UART_H__
diff --git a/Apps/FlightSoftware/MotorControl/driverlib/eusci_b_i2c.c b/Apps/FlightSoftware/MotorControl/driverlib/eusci_b_i2c.c
new file mode 100644
index 000000000..143d13311
--- /dev/null
+++ b/Apps/FlightSoftware/MotorControl/driverlib/eusci_b_i2c.c
@@ -0,0 +1,609 @@
+/* --COPYRIGHT--,BSD
+ * Copyright (c) 2017, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * --/COPYRIGHT--*/
+//*****************************************************************************
+//
+// eusci_b_i2c.c - Driver for the eusci_b_i2c Module.
+//
+//*****************************************************************************
+
+//*****************************************************************************
+//
+//! \addtogroup eusci_b_i2c_api eusci_b_i2c
+//! @{
+//
+//*****************************************************************************
+
+#include "inc/hw_memmap.h"
+
+#ifdef __MSP430_HAS_EUSCI_Bx__
+#include "eusci_b_i2c.h"
+
+#include
+
+void EUSCI_B_I2C_initMaster (uint16_t baseAddress,
+ EUSCI_B_I2C_initMasterParam *param
+ )
+{
+ uint16_t preScalarValue;
+
+ //Disable the USCI module and clears the other bits of control register
+ HWREG16(baseAddress + OFS_UCBxCTLW0) = UCSWRST;
+
+ //Configure Automatic STOP condition generation
+ HWREG16(baseAddress + OFS_UCBxCTLW1) &= ~UCASTP_3;
+ HWREG16(baseAddress + OFS_UCBxCTLW1) |= param->autoSTOPGeneration;
+
+ //Byte Count Threshold
+ HWREG16(baseAddress + OFS_UCBxTBCNT) = param->byteCounterThreshold;
+ /*
+ * Configure as I2C master mode.
+ * UCMST = Master mode
+ * UCMODE_3 = I2C mode
+ * UCSYNC = Synchronous mode
+ */
+ HWREG16(baseAddress + OFS_UCBxCTLW0) |= UCMST + UCMODE_3 + UCSYNC;
+
+ //Configure I2C clock source
+ HWREG16(baseAddress + OFS_UCBxCTLW0) |= (param->selectClockSource + UCSWRST);
+
+ /*
+ * Compute the clock divider that achieves the fastest speed less than or
+ * equal to the desired speed. The numerator is biased to favor a larger
+ * clock divider so that the resulting clock is always less than or equal
+ * to the desired clock, never greater.
+ */
+ preScalarValue = (uint16_t)(param->i2cClk / param->dataRate);
+ HWREG16(baseAddress + OFS_UCBxBRW) = preScalarValue;
+}
+
+void EUSCI_B_I2C_initSlave (uint16_t baseAddress,
+ EUSCI_B_I2C_initSlaveParam *param
+ )
+{
+ //Disable the USCI module
+ HWREG16(baseAddress + OFS_UCBxCTLW0) |= UCSWRST;
+
+ //Clear USCI master mode
+ HWREG16(baseAddress + OFS_UCBxCTLW0) &= ~UCMST;
+
+ //Configure I2C as Slave and Synchronous mode
+ HWREG16(baseAddress + OFS_UCBxCTLW0) |= UCMODE_3 + UCSYNC;
+
+ //Set up the slave address.
+ HWREG16(baseAddress + OFS_UCBxI2COA0 + param->slaveAddressOffset)
+ = param->slaveAddress + param->slaveOwnAddressEnable;
+}
+
+void EUSCI_B_I2C_enable (uint16_t baseAddress)
+{
+ //Reset the UCSWRST bit to enable the USCI Module
+ HWREG16(baseAddress + OFS_UCBxCTLW0) &= ~(UCSWRST);
+}
+
+void EUSCI_B_I2C_disable (uint16_t baseAddress)
+{
+ //Set the UCSWRST bit to disable the USCI Module
+ HWREG16(baseAddress + OFS_UCBxCTLW0) |= UCSWRST;
+}
+
+void EUSCI_B_I2C_setSlaveAddress (uint16_t baseAddress,
+ uint8_t slaveAddress
+ )
+{
+ //Set the address of the slave with which the master will communicate.
+ HWREG16(baseAddress + OFS_UCBxI2CSA) = (slaveAddress);
+}
+
+void EUSCI_B_I2C_setMode (uint16_t baseAddress,
+ uint8_t mode
+ )
+{
+ HWREG16(baseAddress + OFS_UCBxCTLW0) &= ~EUSCI_B_I2C_TRANSMIT_MODE;
+ HWREG16(baseAddress + OFS_UCBxCTLW0) |= mode;
+}
+
+uint8_t EUSCI_B_I2C_getMode (uint16_t baseAddress)
+{
+ //Read the I2C mode.
+ return ((HWREG16(baseAddress + OFS_UCBxCTLW0) & UCTR));
+
+}
+
+void EUSCI_B_I2C_slavePutData (uint16_t baseAddress,
+ uint8_t transmitData
+ )
+{
+ //Send single byte data.
+ HWREG16(baseAddress + OFS_UCBxTXBUF) = transmitData;
+}
+
+uint8_t EUSCI_B_I2C_slaveGetData (uint16_t baseAddress)
+{
+ //Read a byte.
+ return (HWREG16(baseAddress + OFS_UCBxRXBUF));
+}
+
+uint16_t EUSCI_B_I2C_isBusBusy (uint16_t baseAddress)
+{
+ //Return the bus busy status.
+ return (HWREG16(baseAddress + OFS_UCBxSTATW) & UCBBUSY);
+}
+
+uint16_t EUSCI_B_I2C_masterIsStopSent (uint16_t baseAddress)
+{
+ return (HWREG16(baseAddress + OFS_UCBxCTLW0) & UCTXSTP);
+}
+
+uint16_t EUSCI_B_I2C_masterIsStartSent (uint16_t baseAddress)
+{
+ return (HWREG16(baseAddress + OFS_UCBxCTLW0) & UCTXSTT);
+}
+
+void EUSCI_B_I2C_enableInterrupt (uint16_t baseAddress,
+ uint16_t mask
+ )
+{
+ //Enable the interrupt masked bit
+ HWREG16(baseAddress + OFS_UCBxIE) |= mask;
+}
+
+void EUSCI_B_I2C_disableInterrupt (uint16_t baseAddress,
+ uint16_t mask
+ )
+{
+ //Disable the interrupt masked bit
+ HWREG16(baseAddress + OFS_UCBxIE) &= ~(mask);
+}
+
+void EUSCI_B_I2C_clearInterrupt (uint16_t baseAddress,
+ uint16_t mask
+ )
+{
+ //Clear the I2C interrupt source.
+ HWREG16(baseAddress + OFS_UCBxIFG) &= ~(mask);
+}
+
+uint16_t EUSCI_B_I2C_getInterruptStatus (uint16_t baseAddress,
+ uint16_t mask
+ )
+{
+ //Return the interrupt status of the request masked bit.
+ return (HWREG16(baseAddress + OFS_UCBxIFG) & mask);
+}
+
+void EUSCI_B_I2C_masterSendSingleByte (uint16_t baseAddress,
+ uint8_t txData
+ )
+{
+ //Store current TXIE status
+ uint16_t txieStatus = HWREG16(baseAddress + OFS_UCBxIE) & UCTXIE;
+
+ //Disable transmit interrupt enable
+ HWREG16(baseAddress + OFS_UCBxIE) &= ~(UCTXIE);
+
+ //Send start condition.
+ HWREG16(baseAddress + OFS_UCBxCTLW0) |= UCTR + UCTXSTT;
+
+ //Poll for transmit interrupt flag.
+ while (!(HWREG16(baseAddress + OFS_UCBxIFG) & UCTXIFG)) ;
+
+ //Send single byte data.
+ HWREG16(baseAddress + OFS_UCBxTXBUF) = txData;
+
+ //Poll for transmit interrupt flag.
+ while (!(HWREG16(baseAddress + OFS_UCBxIFG) & UCTXIFG)) ;
+
+ //Send stop condition.
+ HWREG16(baseAddress + OFS_UCBxCTLW0) |= UCTXSTP;
+
+ //Clear transmit interrupt flag before enabling interrupt again
+ HWREG16(baseAddress + OFS_UCBxIFG) &= ~(UCTXIFG);
+
+ //Reinstate transmit interrupt enable
+ HWREG16(baseAddress + OFS_UCBxIE) |= txieStatus;
+}
+
+uint8_t EUSCI_B_I2C_masterReceiveSingleByte (uint16_t baseAddress)
+{
+ //Set USCI in Receive mode
+ HWREG16(baseAddress + OFS_UCBxCTLW0) &= ~UCTR;
+
+ //Send start condition
+ HWREG16(baseAddress + OFS_UCBxCTLW0) |= UCTXSTT;
+
+ //Poll for start condition transmission
+ while(HWREG16(baseAddress + OFS_UCBxCTLW0) & UCTXSTT);
+
+ //Send stop condition
+ HWREG16(baseAddress + OFS_UCBxCTLW0) |= UCTXSTP;
+
+ //Poll for receive interrupt flag.
+ while (!(HWREG16(baseAddress + OFS_UCBxIFG) & UCRXIFG));
+
+ //Send single byte data.
+ return (HWREG16(baseAddress + OFS_UCBxRXBUF));
+}
+
+bool EUSCI_B_I2C_masterSendSingleByteWithTimeout (uint16_t baseAddress,
+ uint8_t txData,
+ uint32_t timeout
+ )
+{
+ // Creating variable for second timeout scenario
+ uint32_t timeout2 = timeout;
+
+ //Store current TXIE status
+ uint16_t txieStatus = HWREG16(baseAddress + OFS_UCBxIE) & UCTXIE;
+
+ //Disable transmit interrupt enable
+ HWREG16(baseAddress + OFS_UCBxIE) &= ~(UCTXIE);
+
+ //Send start condition.
+ HWREG16(baseAddress + OFS_UCBxCTLW0) |= UCTR + UCTXSTT;
+
+ //Poll for transmit interrupt flag.
+ while ((!(HWREG16(baseAddress + OFS_UCBxIFG) & UCTXIFG)) && --timeout);
+
+ //Check if transfer timed out
+ if (timeout == 0){
+ return (STATUS_FAIL);
+ }
+
+ //Send single byte data.
+ HWREG16(baseAddress + OFS_UCBxTXBUF) = txData;
+
+ //Poll for transmit interrupt flag.
+ while ((!(HWREG16(baseAddress + OFS_UCBxIFG) & UCTXIFG)) && --timeout2);
+
+ //Check if transfer timed out
+ if (timeout2 == 0){
+ return (STATUS_FAIL);
+ }
+
+ //Send stop condition.
+ HWREG16(baseAddress + OFS_UCBxCTLW0) |= UCTXSTP;
+
+ //Clear transmit interrupt flag before enabling interrupt again
+ HWREG16(baseAddress + OFS_UCBxIFG) &= ~(UCTXIFG);
+
+ //Reinstate transmit interrupt enable
+ HWREG16(baseAddress + OFS_UCBxIE) |= txieStatus;
+
+ return (STATUS_SUCCESS);
+}
+
+void EUSCI_B_I2C_masterSendMultiByteStart (uint16_t baseAddress,
+ uint8_t txData
+ )
+{
+ //Store current transmit interrupt enable
+ uint16_t txieStatus = HWREG16(baseAddress + OFS_UCBxIE) & UCTXIE;
+
+ //Disable transmit interrupt enable
+ HWREG16(baseAddress + OFS_UCBxIE) &= ~(UCTXIE);
+
+ //Send start condition.
+ HWREG16(baseAddress + OFS_UCBxCTLW0) |= UCTR + UCTXSTT;
+
+ //Poll for transmit interrupt flag.
+ while (!(HWREG16(baseAddress + OFS_UCBxIFG) & UCTXIFG)) ;
+
+ //Send single byte data.
+ HWREG16(baseAddress + OFS_UCBxTXBUF) = txData;
+
+ //Reinstate transmit interrupt enable
+ HWREG16(baseAddress + OFS_UCBxIE) |= txieStatus;
+}
+
+bool EUSCI_B_I2C_masterSendMultiByteStartWithTimeout (uint16_t baseAddress,
+ uint8_t txData,
+ uint32_t timeout
+ )
+{
+ //Store current transmit interrupt enable
+ uint16_t txieStatus = HWREG16(baseAddress + OFS_UCBxIE) & UCTXIE;
+
+ //Disable transmit interrupt enable
+ HWREG16(baseAddress + OFS_UCBxIE) &= ~(UCTXIE);
+
+ //Send start condition.
+ HWREG16(baseAddress + OFS_UCBxCTLW0) |= UCTR + UCTXSTT;
+
+ //Poll for transmit interrupt flag.
+ while ((!(HWREG16(baseAddress + OFS_UCBxIFG) & UCTXIFG)) && --timeout);
+
+ //Check if transfer timed out
+ if (timeout == 0){
+ return (STATUS_FAIL);
+ }
+
+ //Send single byte data.
+ HWREG16(baseAddress + OFS_UCBxTXBUF) = txData;
+
+ //Reinstate transmit interrupt enable
+ HWREG16(baseAddress + OFS_UCBxIE) |= txieStatus;
+
+ return(STATUS_SUCCESS);
+}
+
+void EUSCI_B_I2C_masterSendMultiByteNext (uint16_t baseAddress,
+ uint8_t txData
+ )
+{
+ //If interrupts are not used, poll for flags
+ if (!(HWREG16(baseAddress + OFS_UCBxIE) & UCTXIE)){
+ //Poll for transmit interrupt flag.
+ while (!(HWREG16(baseAddress + OFS_UCBxIFG) & UCTXIFG)) ;
+ }
+
+ //Send single byte data.
+ HWREG16(baseAddress + OFS_UCBxTXBUF) = txData;
+}
+
+bool EUSCI_B_I2C_masterSendMultiByteNextWithTimeout (uint16_t baseAddress,
+ uint8_t txData,
+ uint32_t timeout
+ )
+{
+ //If interrupts are not used, poll for flags
+ if (!(HWREG16(baseAddress + OFS_UCBxIE) & UCTXIE)){
+ //Poll for transmit interrupt flag.
+ while ((!(HWREG16(baseAddress + OFS_UCBxIFG) & UCTXIFG)) && --timeout);
+
+ //Check if transfer timed out
+ if (timeout == 0){
+ return (STATUS_FAIL);
+ }
+ }
+
+ //Send single byte data.
+ HWREG16(baseAddress + OFS_UCBxTXBUF) = txData;
+
+ return(STATUS_SUCCESS);
+}
+
+void EUSCI_B_I2C_masterSendMultiByteFinish (uint16_t baseAddress,
+ uint8_t txData
+ )
+{
+ //If interrupts are not used, poll for flags
+ if (!(HWREG16(baseAddress + OFS_UCBxIE) & UCTXIE)){
+ //Poll for transmit interrupt flag.
+ while (!(HWREG16(baseAddress + OFS_UCBxIFG) & UCTXIFG)) ;
+ }
+
+ //Send single byte data.
+ HWREG16(baseAddress + OFS_UCBxTXBUF) = txData;
+
+ //Poll for transmit interrupt flag.
+ while (!(HWREG16(baseAddress + OFS_UCBxIFG) & UCTXIFG)) ;
+
+ //Send stop condition.
+ HWREG16(baseAddress + OFS_UCBxCTLW0) |= UCTXSTP;
+}
+
+bool EUSCI_B_I2C_masterSendMultiByteFinishWithTimeout (uint16_t baseAddress,
+ uint8_t txData,
+ uint32_t timeout
+ )
+{
+ uint32_t timeout2 = timeout;
+
+ //If interrupts are not used, poll for flags
+ if (!(HWREG16(baseAddress + OFS_UCBxIE) & UCTXIE)){
+ //Poll for transmit interrupt flag.
+ while ((!(HWREG16(baseAddress + OFS_UCBxIFG) & UCTXIFG)) && --timeout) ;
+
+ //Check if transfer timed out
+ if (timeout == 0){
+ return (STATUS_FAIL);
+ }
+ }
+
+ //Send single byte data.
+ HWREG16(baseAddress + OFS_UCBxTXBUF) = txData;
+
+ //Poll for transmit interrupt flag.
+ while ((!(HWREG16(baseAddress + OFS_UCBxIFG) & UCTXIFG)) && --timeout2) ;
+
+ //Check if transfer timed out
+ if (timeout2 == 0){
+ return (STATUS_FAIL);
+ }
+
+ //Send stop condition.
+ HWREG16(baseAddress + OFS_UCBxCTLW0) |= UCTXSTP;
+
+ return(STATUS_SUCCESS);
+}
+
+void EUSCI_B_I2C_masterSendStart (uint16_t baseAddress)
+{
+ HWREG16(baseAddress + OFS_UCBxCTLW0) |= UCTXSTT;
+}
+
+void EUSCI_B_I2C_masterSendMultiByteStop (uint16_t baseAddress)
+{
+ //If interrupts are not used, poll for flags
+ if (!(HWREG16(baseAddress + OFS_UCBxIE) & UCTXIE)){
+ //Poll for transmit interrupt flag.
+ while (!(HWREG16(baseAddress + OFS_UCBxIFG) & UCTXIFG)) ;
+ }
+
+ //Send stop condition.
+ HWREG16(baseAddress + OFS_UCBxCTLW0) |= UCTXSTP;
+}
+
+bool EUSCI_B_I2C_masterSendMultiByteStopWithTimeout (uint16_t baseAddress,
+ uint32_t timeout)
+{
+ //If interrupts are not used, poll for flags
+ if (!(HWREG16(baseAddress + OFS_UCBxIE) & UCTXIE)){
+ //Poll for transmit interrupt flag.
+ while ((!(HWREG16(baseAddress + OFS_UCBxIFG) & UCTXIFG)) && --timeout) ;
+
+ //Check if transfer timed out
+ if (timeout == 0){
+ return (STATUS_FAIL);
+ }
+ }
+
+ //Send stop condition.
+ HWREG16(baseAddress + OFS_UCBxCTLW0) |= UCTXSTP;
+
+ return (STATUS_SUCCESS);
+}
+
+void EUSCI_B_I2C_masterReceiveStart (uint16_t baseAddress)
+{
+ //Set USCI in Receive mode
+ HWREG16(baseAddress + OFS_UCBxCTLW0) &= ~UCTR;
+ //Send start
+ HWREG16(baseAddress + OFS_UCBxCTLW0) |= UCTXSTT;
+}
+
+uint8_t EUSCI_B_I2C_masterReceiveMultiByteNext (uint16_t baseAddress)
+{
+ return (HWREG16(baseAddress + OFS_UCBxRXBUF));
+}
+
+uint8_t EUSCI_B_I2C_masterReceiveMultiByteFinish (uint16_t baseAddress)
+{
+ //Send stop condition.
+ HWREG16(baseAddress + OFS_UCBxCTLW0) |= UCTXSTP;
+
+ //Wait for Stop to finish
+ while (HWREG16(baseAddress + OFS_UCBxCTLW0) & UCTXSTP)
+
+ // Wait for RX buffer
+ while (!(HWREG16(baseAddress + OFS_UCBxIFG) & UCRXIFG)) ;
+
+ //Capture data from receive buffer after setting stop bit due to
+ //MSP430 I2C critical timing.
+ return (HWREG16(baseAddress + OFS_UCBxRXBUF));
+}
+
+bool EUSCI_B_I2C_masterReceiveMultiByteFinishWithTimeout (uint16_t baseAddress,
+ uint8_t *txData,
+ uint32_t timeout
+ )
+{
+ uint32_t timeout2 = timeout;
+
+ //Send stop condition.
+ HWREG16(baseAddress + OFS_UCBxCTLW0) |= UCTXSTP;
+
+ //Wait for Stop to finish
+ while ((HWREG16(baseAddress + OFS_UCBxCTLW0) & UCTXSTP) && --timeout);
+
+ //Check if transfer timed out
+ if (timeout == 0){
+ return (STATUS_FAIL);
+ }
+
+ // Wait for RX buffer
+ while ((!(HWREG16(baseAddress + OFS_UCBxIFG) & UCRXIFG)) && --timeout2);
+
+ //Check if transfer timed out
+ if (timeout2 == 0){
+ return (STATUS_FAIL);
+ }
+
+ //Capture data from receive buffer after setting stop bit due to
+ //MSP430 I2C critical timing.
+ *txData = (HWREG8(baseAddress + OFS_UCBxRXBUF));
+
+ return (STATUS_SUCCESS);
+}
+
+void EUSCI_B_I2C_masterReceiveMultiByteStop (uint16_t baseAddress)
+{
+ //Send stop condition.
+ HWREG16(baseAddress + OFS_UCBxCTLW0) |= UCTXSTP;
+}
+
+void EUSCI_B_I2C_enableMultiMasterMode(uint16_t baseAddress)
+{
+ HWREG16(baseAddress + OFS_UCBxCTLW0) |= UCSWRST;
+ HWREG16(baseAddress + OFS_UCBxCTLW0) |= UCMM;
+}
+
+void EUSCI_B_I2C_disableMultiMasterMode(uint16_t baseAddress)
+{
+
+ HWREG16(baseAddress + OFS_UCBxCTLW0) |= UCSWRST;
+ HWREG16(baseAddress + OFS_UCBxCTLW0) &= ~UCMM;
+}
+
+uint8_t EUSCI_B_I2C_masterReceiveSingle (uint16_t baseAddress)
+{
+ //Polling RXIFG0 if RXIE is not enabled
+ if(!(HWREG16(baseAddress + OFS_UCBxIE) & UCRXIE0)) {
+ while(!(HWREG16(baseAddress + OFS_UCBxIFG) & UCRXIFG0));
+ }
+
+ //Read a byte.
+ return (HWREG16(baseAddress + OFS_UCBxRXBUF));
+}
+
+uint32_t EUSCI_B_I2C_getReceiveBufferAddress (uint16_t baseAddress)
+{
+ return ( baseAddress + OFS_UCBxRXBUF );
+}
+
+uint32_t EUSCI_B_I2C_getTransmitBufferAddress (uint16_t baseAddress)
+{
+ return ( baseAddress + OFS_UCBxTXBUF );
+}
+void EUSCI_B_I2C_setTimeout(uint16_t baseAddress, uint16_t timeout)
+{
+ uint16_t tempUCBxCTLW0;
+
+ //Save value of UCSWRST bit before we disable eUSCI module
+ tempUCBxCTLW0 = HWREG16(baseAddress + OFS_UCBxCTLW0);
+ //Disable the USCI module
+ HWREG16(baseAddress + OFS_UCBxCTLW0) |= UCSWRST;
+
+ //Set timeout
+ HWREG16(baseAddress + OFS_UCBxCTLW1) = (HWREG16(baseAddress + OFS_UCBxCTLW1) & (~UCCLTO_3)) | timeout;
+
+ //Restore value of UCSWRST bit
+ HWREG16(baseAddress + OFS_UCBxCTLW0) = tempUCBxCTLW0;
+}
+
+#endif
+//*****************************************************************************
+//
+//! Close the doxygen group for eusci_b_i2c_api
+//! @}
+//
+//*****************************************************************************
diff --git a/Apps/FlightSoftware/MotorControl/driverlib/eusci_b_i2c.h b/Apps/FlightSoftware/MotorControl/driverlib/eusci_b_i2c.h
new file mode 100644
index 000000000..869f1a1f3
--- /dev/null
+++ b/Apps/FlightSoftware/MotorControl/driverlib/eusci_b_i2c.h
@@ -0,0 +1,1047 @@
+/* --COPYRIGHT--,BSD
+ * Copyright (c) 2017, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * --/COPYRIGHT--*/
+//*****************************************************************************
+//
+// eusci_b_i2c.h - Driver for the EUSCI_B_I2C Module.
+//
+//*****************************************************************************
+
+#ifndef __MSP430WARE_EUSCI_B_I2C_H__
+#define __MSP430WARE_EUSCI_B_I2C_H__
+
+#include "inc/hw_memmap.h"
+
+#ifdef __MSP430_HAS_EUSCI_Bx__
+
+//*****************************************************************************
+//
+// If building with a C++ compiler, make all of the definitions in this header
+// have a C binding.
+//
+//*****************************************************************************
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+#include "inc/hw_memmap.h"
+//*****************************************************************************
+//
+//! \brief Used in the EUSCI_B_I2C_initMaster() function as the param
+//! parameter.
+//
+//*****************************************************************************
+typedef struct EUSCI_B_I2C_initMasterParam {
+ //! Selects the clocksource. Refer to device specific datasheet for
+ //! available options.
+ //! \n Valid values are:
+ //! - \b EUSCI_B_I2C_CLOCKSOURCE_ACLK
+ //! - \b EUSCI_B_I2C_CLOCKSOURCE_SMCLK
+ uint8_t selectClockSource;
+ //! Is the rate of the clock supplied to the I2C module (the frequency in
+ //! Hz of the clock source specified in selectClockSource).
+ uint32_t i2cClk;
+ //! Setup for selecting data transfer rate.
+ //! \n Valid values are:
+ //! - \b EUSCI_B_I2C_SET_DATA_RATE_400KBPS
+ //! - \b EUSCI_B_I2C_SET_DATA_RATE_100KBPS
+ uint32_t dataRate;
+ //! Sets threshold for automatic STOP or UCSTPIFG
+ uint8_t byteCounterThreshold;
+ //! Sets up the STOP condition generation.
+ //! \n Valid values are:
+ //! - \b EUSCI_B_I2C_NO_AUTO_STOP
+ //! - \b EUSCI_B_I2C_SET_BYTECOUNT_THRESHOLD_FLAG
+ //! - \b EUSCI_B_I2C_SEND_STOP_AUTOMATICALLY_ON_BYTECOUNT_THRESHOLD
+ uint8_t autoSTOPGeneration;
+} EUSCI_B_I2C_initMasterParam;
+
+//*****************************************************************************
+//
+//! \brief Used in the EUSCI_B_I2C_initSlave() function as the param parameter.
+//
+//*****************************************************************************
+typedef struct EUSCI_B_I2C_initSlaveParam {
+ //! 7-bit slave address
+ uint8_t slaveAddress;
+ //! Own address Offset referred to- 'x' value of UCBxI2COAx.
+ //! \n Valid values are:
+ //! - \b EUSCI_B_I2C_OWN_ADDRESS_OFFSET0
+ //! - \b EUSCI_B_I2C_OWN_ADDRESS_OFFSET1
+ //! - \b EUSCI_B_I2C_OWN_ADDRESS_OFFSET2
+ //! - \b EUSCI_B_I2C_OWN_ADDRESS_OFFSET3
+ uint8_t slaveAddressOffset;
+ //! Selects if the specified address is enabled or disabled.
+ //! \n Valid values are:
+ //! - \b EUSCI_B_I2C_OWN_ADDRESS_DISABLE
+ //! - \b EUSCI_B_I2C_OWN_ADDRESS_ENABLE
+ uint32_t slaveOwnAddressEnable;
+} EUSCI_B_I2C_initSlaveParam;
+
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the param parameter for
+// functions: EUSCI_B_I2C_initMaster().
+//
+//*****************************************************************************
+#define EUSCI_B_I2C_NO_AUTO_STOP UCASTP_0
+#define EUSCI_B_I2C_SET_BYTECOUNT_THRESHOLD_FLAG UCASTP_1
+#define EUSCI_B_I2C_SEND_STOP_AUTOMATICALLY_ON_BYTECOUNT_THRESHOLD UCASTP_2
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the param parameter for
+// functions: EUSCI_B_I2C_initMaster().
+//
+//*****************************************************************************
+#define EUSCI_B_I2C_SET_DATA_RATE_400KBPS 400000
+#define EUSCI_B_I2C_SET_DATA_RATE_100KBPS 100000
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the param parameter for
+// functions: EUSCI_B_I2C_initMaster().
+//
+//*****************************************************************************
+#define EUSCI_B_I2C_CLOCKSOURCE_ACLK UCSSEL__ACLK
+#define EUSCI_B_I2C_CLOCKSOURCE_SMCLK UCSSEL__SMCLK
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the param parameter for
+// functions: EUSCI_B_I2C_initSlave().
+//
+//*****************************************************************************
+#define EUSCI_B_I2C_OWN_ADDRESS_OFFSET0 0x00
+#define EUSCI_B_I2C_OWN_ADDRESS_OFFSET1 0x02
+#define EUSCI_B_I2C_OWN_ADDRESS_OFFSET2 0x04
+#define EUSCI_B_I2C_OWN_ADDRESS_OFFSET3 0x06
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the param parameter for
+// functions: EUSCI_B_I2C_initSlave().
+//
+//*****************************************************************************
+#define EUSCI_B_I2C_OWN_ADDRESS_DISABLE 0x00
+#define EUSCI_B_I2C_OWN_ADDRESS_ENABLE UCOAEN
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the mode parameter for
+// functions: EUSCI_B_I2C_setMode() as well as returned by the
+// EUSCI_B_I2C_getMode() function.
+//
+//*****************************************************************************
+#define EUSCI_B_I2C_TRANSMIT_MODE UCTR
+#define EUSCI_B_I2C_RECEIVE_MODE 0x00
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the mask parameter for
+// functions: EUSCI_B_I2C_enableInterrupt(), EUSCI_B_I2C_disableInterrupt(),
+// EUSCI_B_I2C_clearInterrupt(), and EUSCI_B_I2C_getInterruptStatus() as well
+// as returned by the EUSCI_B_I2C_getInterruptStatus() function.
+//
+//*****************************************************************************
+#define EUSCI_B_I2C_NAK_INTERRUPT UCNACKIE
+#define EUSCI_B_I2C_ARBITRATIONLOST_INTERRUPT UCALIE
+#define EUSCI_B_I2C_STOP_INTERRUPT UCSTPIE
+#define EUSCI_B_I2C_START_INTERRUPT UCSTTIE
+#define EUSCI_B_I2C_TRANSMIT_INTERRUPT0 UCTXIE0
+#define EUSCI_B_I2C_TRANSMIT_INTERRUPT1 UCTXIE1
+#define EUSCI_B_I2C_TRANSMIT_INTERRUPT2 UCTXIE2
+#define EUSCI_B_I2C_TRANSMIT_INTERRUPT3 UCTXIE3
+#define EUSCI_B_I2C_RECEIVE_INTERRUPT0 UCRXIE0
+#define EUSCI_B_I2C_RECEIVE_INTERRUPT1 UCRXIE1
+#define EUSCI_B_I2C_RECEIVE_INTERRUPT2 UCRXIE2
+#define EUSCI_B_I2C_RECEIVE_INTERRUPT3 UCRXIE3
+#define EUSCI_B_I2C_BIT9_POSITION_INTERRUPT UCBIT9IE
+#define EUSCI_B_I2C_CLOCK_LOW_TIMEOUT_INTERRUPT UCCLTOIE
+#define EUSCI_B_I2C_BYTE_COUNTER_INTERRUPT UCBCNTIE
+
+//*****************************************************************************
+//
+// The following are values that can be passed toThe following are values that
+// can be returned by the EUSCI_B_I2C_isBusBusy() function.
+//
+//*****************************************************************************
+#define EUSCI_B_I2C_BUS_BUSY UCBBUSY
+#define EUSCI_B_I2C_BUS_NOT_BUSY 0x00
+
+//*****************************************************************************
+//
+// The following are values that can be passed toThe following are values that
+// can be returned by the EUSCI_B_I2C_masterIsStopSent() function.
+//
+//*****************************************************************************
+#define EUSCI_B_I2C_STOP_SEND_COMPLETE 0x00
+#define EUSCI_B_I2C_SENDING_STOP UCTXSTP
+
+//*****************************************************************************
+//
+// The following are values that can be passed toThe following are values that
+// can be returned by the EUSCI_B_I2C_masterIsStartSent() function.
+//
+//*****************************************************************************
+#define EUSCI_B_I2C_START_SEND_COMPLETE 0x00
+#define EUSCI_B_I2C_SENDING_START UCTXSTT
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the timeout parameter for
+// functions: EUSCI_B_I2C_setTimeout().
+//
+//*****************************************************************************
+#define EUSCI_B_I2C_TIMEOUT_DISABLE UCCLTO_0
+#define EUSCI_B_I2C_TIMEOUT_28_MS UCCLTO_1
+#define EUSCI_B_I2C_TIMEOUT_31_MS UCCLTO_2
+#define EUSCI_B_I2C_TIMEOUT_34_MS UCCLTO_3
+
+//*****************************************************************************
+//
+// Prototypes for the APIs.
+//
+//*****************************************************************************
+
+//*****************************************************************************
+//
+//! \brief Initializes the I2C Master block.
+//!
+//! This function initializes operation of the I2C Master block. Upon
+//! successful initialization of the I2C block, this function will have set the
+//! bus speed for the master; however I2C module is still disabled till
+//! EUSCI_B_I2C_enable is invoked.
+//!
+//! \param baseAddress is the base address of the I2C Master module.
+//! \param param is the pointer to the struct for master initialization.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void EUSCI_B_I2C_initMaster(uint16_t baseAddress,
+ EUSCI_B_I2C_initMasterParam *param);
+
+//*****************************************************************************
+//
+//! \brief Initializes the I2C Slave block.
+//!
+//! This function initializes operation of the I2C as a Slave mode. Upon
+//! successful initialization of the I2C blocks, this function will have set
+//! the slave address but the I2C module is still disabled till
+//! EUSCI_B_I2C_enable is invoked.
+//!
+//! \param baseAddress is the base address of the I2C Slave module.
+//! \param param is the pointer to the struct for slave initialization.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void EUSCI_B_I2C_initSlave(uint16_t baseAddress,
+ EUSCI_B_I2C_initSlaveParam *param);
+
+//*****************************************************************************
+//
+//! \brief Enables the I2C block.
+//!
+//! This will enable operation of the I2C block.
+//!
+//! \param baseAddress is the base address of the USCI I2C module.
+//!
+//! Modified bits are \b UCSWRST of \b UCBxCTLW0 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void EUSCI_B_I2C_enable(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Disables the I2C block.
+//!
+//! This will disable operation of the I2C block.
+//!
+//! \param baseAddress is the base address of the USCI I2C module.
+//!
+//! Modified bits are \b UCSWRST of \b UCBxCTLW0 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void EUSCI_B_I2C_disable(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Sets the address that the I2C Master will place on the bus.
+//!
+//! This function will set the address that the I2C Master will place on the
+//! bus when initiating a transaction.
+//!
+//! \param baseAddress is the base address of the USCI I2C module.
+//! \param slaveAddress 7-bit slave address
+//!
+//! Modified bits of \b UCBxI2CSA register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void EUSCI_B_I2C_setSlaveAddress(uint16_t baseAddress,
+ uint8_t slaveAddress);
+
+//*****************************************************************************
+//
+//! \brief Sets the mode of the I2C device
+//!
+//! When the mode parameter is set to EUSCI_B_I2C_TRANSMIT_MODE, the address
+//! will indicate that the I2C module is in send mode; otherwise, the I2C
+//! module is in receive mode.
+//!
+//! \param baseAddress is the base address of the USCI I2C module.
+//! \param mode Mode for the EUSCI_B_I2C module
+//! Valid values are:
+//! - \b EUSCI_B_I2C_TRANSMIT_MODE [Default]
+//! - \b EUSCI_B_I2C_RECEIVE_MODE
+//!
+//! Modified bits are \b UCTR of \b UCBxCTLW0 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void EUSCI_B_I2C_setMode(uint16_t baseAddress,
+ uint8_t mode);
+
+//*****************************************************************************
+//
+//! \brief Gets the mode of the I2C device
+//!
+//! Current I2C transmit/receive mode.
+//!
+//! \param baseAddress is the base address of the I2C module.
+//!
+//! Modified bits are \b UCTR of \b UCBxCTLW0 register.
+//!
+//! \return One of the following:
+//! - \b EUSCI_B_I2C_TRANSMIT_MODE
+//! - \b EUSCI_B_I2C_RECEIVE_MODE
+//! \n indicating the current mode
+//
+//*****************************************************************************
+extern uint8_t EUSCI_B_I2C_getMode(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Transmits a byte from the I2C Module.
+//!
+//! This function will place the supplied data into I2C transmit data register
+//! to start transmission.
+//!
+//! \param baseAddress is the base address of the I2C Slave module.
+//! \param transmitData data to be transmitted from the I2C module
+//!
+//! Modified bits of \b UCBxTXBUF register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void EUSCI_B_I2C_slavePutData(uint16_t baseAddress,
+ uint8_t transmitData);
+
+//*****************************************************************************
+//
+//! \brief Receives a byte that has been sent to the I2C Module.
+//!
+//! This function reads a byte of data from the I2C receive data Register.
+//!
+//! \param baseAddress is the base address of the I2C Slave module.
+//!
+//! \return Returns the byte received from by the I2C module, cast as an
+//! uint8_t.
+//
+//*****************************************************************************
+extern uint8_t EUSCI_B_I2C_slaveGetData(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Indicates whether or not the I2C bus is busy.
+//!
+//! This function returns an indication of whether or not the I2C bus is busy.
+//! This function checks the status of the bus via UCBBUSY bit in UCBxSTAT
+//! register.
+//!
+//! \param baseAddress is the base address of the I2C module.
+//!
+//! \return One of the following:
+//! - \b EUSCI_B_I2C_BUS_BUSY
+//! - \b EUSCI_B_I2C_BUS_NOT_BUSY
+//! \n indicating whether the bus is busy
+//
+//*****************************************************************************
+extern uint16_t EUSCI_B_I2C_isBusBusy(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Indicates whether STOP got sent.
+//!
+//! This function returns an indication of whether or not STOP got sent This
+//! function checks the status of the bus via UCTXSTP bit in UCBxCTL1 register.
+//!
+//! \param baseAddress is the base address of the I2C Master module.
+//!
+//! \return One of the following:
+//! - \b EUSCI_B_I2C_STOP_SEND_COMPLETE
+//! - \b EUSCI_B_I2C_SENDING_STOP
+//! \n indicating whether the stop was sent
+//
+//*****************************************************************************
+extern uint16_t EUSCI_B_I2C_masterIsStopSent(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Indicates whether Start got sent.
+//!
+//! This function returns an indication of whether or not Start got sent This
+//! function checks the status of the bus via UCTXSTT bit in UCBxCTL1 register.
+//!
+//! \param baseAddress is the base address of the I2C Master module.
+//!
+//! \return One of the following:
+//! - \b EUSCI_B_I2C_START_SEND_COMPLETE
+//! - \b EUSCI_B_I2C_SENDING_START
+//! \n indicating whether the start was sent
+//
+//*****************************************************************************
+extern uint16_t EUSCI_B_I2C_masterIsStartSent(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Enables individual I2C interrupt sources.
+//!
+//! Enables the indicated I2C interrupt sources. Only the sources that are
+//! enabled can be reflected to the processor interrupt; disabled sources have
+//! no effect on the processor.
+//!
+//! \param baseAddress is the base address of the I2C module.
+//! \param mask is the bit mask of the interrupt sources to be enabled.
+//! Mask value is the logical OR of any of the following:
+//! - \b EUSCI_B_I2C_NAK_INTERRUPT - Not-acknowledge interrupt
+//! - \b EUSCI_B_I2C_ARBITRATIONLOST_INTERRUPT - Arbitration lost
+//! interrupt
+//! - \b EUSCI_B_I2C_STOP_INTERRUPT - STOP condition interrupt
+//! - \b EUSCI_B_I2C_START_INTERRUPT - START condition interrupt
+//! - \b EUSCI_B_I2C_TRANSMIT_INTERRUPT0 - Transmit interrupt0
+//! - \b EUSCI_B_I2C_TRANSMIT_INTERRUPT1 - Transmit interrupt1
+//! - \b EUSCI_B_I2C_TRANSMIT_INTERRUPT2 - Transmit interrupt2
+//! - \b EUSCI_B_I2C_TRANSMIT_INTERRUPT3 - Transmit interrupt3
+//! - \b EUSCI_B_I2C_RECEIVE_INTERRUPT0 - Receive interrupt0
+//! - \b EUSCI_B_I2C_RECEIVE_INTERRUPT1 - Receive interrupt1
+//! - \b EUSCI_B_I2C_RECEIVE_INTERRUPT2 - Receive interrupt2
+//! - \b EUSCI_B_I2C_RECEIVE_INTERRUPT3 - Receive interrupt3
+//! - \b EUSCI_B_I2C_BIT9_POSITION_INTERRUPT - Bit position 9 interrupt
+//! - \b EUSCI_B_I2C_CLOCK_LOW_TIMEOUT_INTERRUPT - Clock low timeout
+//! interrupt enable
+//! - \b EUSCI_B_I2C_BYTE_COUNTER_INTERRUPT - Byte counter interrupt
+//! enable
+//!
+//! Modified bits of \b UCBxIE register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void EUSCI_B_I2C_enableInterrupt(uint16_t baseAddress,
+ uint16_t mask);
+
+//*****************************************************************************
+//
+//! \brief Disables individual I2C interrupt sources.
+//!
+//! Disables the indicated I2C interrupt sources. Only the sources that are
+//! enabled can be reflected to the processor interrupt; disabled sources have
+//! no effect on the processor.
+//!
+//! \param baseAddress is the base address of the I2C module.
+//! \param mask is the bit mask of the interrupt sources to be disabled.
+//! Mask value is the logical OR of any of the following:
+//! - \b EUSCI_B_I2C_NAK_INTERRUPT - Not-acknowledge interrupt
+//! - \b EUSCI_B_I2C_ARBITRATIONLOST_INTERRUPT - Arbitration lost
+//! interrupt
+//! - \b EUSCI_B_I2C_STOP_INTERRUPT - STOP condition interrupt
+//! - \b EUSCI_B_I2C_START_INTERRUPT - START condition interrupt
+//! - \b EUSCI_B_I2C_TRANSMIT_INTERRUPT0 - Transmit interrupt0
+//! - \b EUSCI_B_I2C_TRANSMIT_INTERRUPT1 - Transmit interrupt1
+//! - \b EUSCI_B_I2C_TRANSMIT_INTERRUPT2 - Transmit interrupt2
+//! - \b EUSCI_B_I2C_TRANSMIT_INTERRUPT3 - Transmit interrupt3
+//! - \b EUSCI_B_I2C_RECEIVE_INTERRUPT0 - Receive interrupt0
+//! - \b EUSCI_B_I2C_RECEIVE_INTERRUPT1 - Receive interrupt1
+//! - \b EUSCI_B_I2C_RECEIVE_INTERRUPT2 - Receive interrupt2
+//! - \b EUSCI_B_I2C_RECEIVE_INTERRUPT3 - Receive interrupt3
+//! - \b EUSCI_B_I2C_BIT9_POSITION_INTERRUPT - Bit position 9 interrupt
+//! - \b EUSCI_B_I2C_CLOCK_LOW_TIMEOUT_INTERRUPT - Clock low timeout
+//! interrupt enable
+//! - \b EUSCI_B_I2C_BYTE_COUNTER_INTERRUPT - Byte counter interrupt
+//! enable
+//!
+//! Modified bits of \b UCBxIE register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void EUSCI_B_I2C_disableInterrupt(uint16_t baseAddress,
+ uint16_t mask);
+
+//*****************************************************************************
+//
+//! \brief Clears I2C interrupt sources.
+//!
+//! The I2C interrupt source is cleared, so that it no longer asserts. The
+//! highest interrupt flag is automatically cleared when an interrupt vector
+//! generator is used.
+//!
+//! \param baseAddress is the base address of the I2C module.
+//! \param mask is a bit mask of the interrupt sources to be cleared.
+//! Mask value is the logical OR of any of the following:
+//! - \b EUSCI_B_I2C_NAK_INTERRUPT - Not-acknowledge interrupt
+//! - \b EUSCI_B_I2C_ARBITRATIONLOST_INTERRUPT - Arbitration lost
+//! interrupt
+//! - \b EUSCI_B_I2C_STOP_INTERRUPT - STOP condition interrupt
+//! - \b EUSCI_B_I2C_START_INTERRUPT - START condition interrupt
+//! - \b EUSCI_B_I2C_TRANSMIT_INTERRUPT0 - Transmit interrupt0
+//! - \b EUSCI_B_I2C_TRANSMIT_INTERRUPT1 - Transmit interrupt1
+//! - \b EUSCI_B_I2C_TRANSMIT_INTERRUPT2 - Transmit interrupt2
+//! - \b EUSCI_B_I2C_TRANSMIT_INTERRUPT3 - Transmit interrupt3
+//! - \b EUSCI_B_I2C_RECEIVE_INTERRUPT0 - Receive interrupt0
+//! - \b EUSCI_B_I2C_RECEIVE_INTERRUPT1 - Receive interrupt1
+//! - \b EUSCI_B_I2C_RECEIVE_INTERRUPT2 - Receive interrupt2
+//! - \b EUSCI_B_I2C_RECEIVE_INTERRUPT3 - Receive interrupt3
+//! - \b EUSCI_B_I2C_BIT9_POSITION_INTERRUPT - Bit position 9 interrupt
+//! - \b EUSCI_B_I2C_CLOCK_LOW_TIMEOUT_INTERRUPT - Clock low timeout
+//! interrupt enable
+//! - \b EUSCI_B_I2C_BYTE_COUNTER_INTERRUPT - Byte counter interrupt
+//! enable
+//!
+//! Modified bits of \b UCBxIFG register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void EUSCI_B_I2C_clearInterrupt(uint16_t baseAddress,
+ uint16_t mask);
+
+//*****************************************************************************
+//
+//! \brief Gets the current I2C interrupt status.
+//!
+//! This returns the interrupt status for the I2C module based on which flag is
+//! passed.
+//!
+//! \param baseAddress is the base address of the I2C module.
+//! \param mask is the masked interrupt flag status to be returned.
+//! Mask value is the logical OR of any of the following:
+//! - \b EUSCI_B_I2C_NAK_INTERRUPT - Not-acknowledge interrupt
+//! - \b EUSCI_B_I2C_ARBITRATIONLOST_INTERRUPT - Arbitration lost
+//! interrupt
+//! - \b EUSCI_B_I2C_STOP_INTERRUPT - STOP condition interrupt
+//! - \b EUSCI_B_I2C_START_INTERRUPT - START condition interrupt
+//! - \b EUSCI_B_I2C_TRANSMIT_INTERRUPT0 - Transmit interrupt0
+//! - \b EUSCI_B_I2C_TRANSMIT_INTERRUPT1 - Transmit interrupt1
+//! - \b EUSCI_B_I2C_TRANSMIT_INTERRUPT2 - Transmit interrupt2
+//! - \b EUSCI_B_I2C_TRANSMIT_INTERRUPT3 - Transmit interrupt3
+//! - \b EUSCI_B_I2C_RECEIVE_INTERRUPT0 - Receive interrupt0
+//! - \b EUSCI_B_I2C_RECEIVE_INTERRUPT1 - Receive interrupt1
+//! - \b EUSCI_B_I2C_RECEIVE_INTERRUPT2 - Receive interrupt2
+//! - \b EUSCI_B_I2C_RECEIVE_INTERRUPT3 - Receive interrupt3
+//! - \b EUSCI_B_I2C_BIT9_POSITION_INTERRUPT - Bit position 9 interrupt
+//! - \b EUSCI_B_I2C_CLOCK_LOW_TIMEOUT_INTERRUPT - Clock low timeout
+//! interrupt enable
+//! - \b EUSCI_B_I2C_BYTE_COUNTER_INTERRUPT - Byte counter interrupt
+//! enable
+//!
+//! \return Logical OR of any of the following:
+//! - \b EUSCI_B_I2C_NAK_INTERRUPT Not-acknowledge interrupt
+//! - \b EUSCI_B_I2C_ARBITRATIONLOST_INTERRUPT Arbitration lost
+//! interrupt
+//! - \b EUSCI_B_I2C_STOP_INTERRUPT STOP condition interrupt
+//! - \b EUSCI_B_I2C_START_INTERRUPT START condition interrupt
+//! - \b EUSCI_B_I2C_TRANSMIT_INTERRUPT0 Transmit interrupt0
+//! - \b EUSCI_B_I2C_TRANSMIT_INTERRUPT1 Transmit interrupt1
+//! - \b EUSCI_B_I2C_TRANSMIT_INTERRUPT2 Transmit interrupt2
+//! - \b EUSCI_B_I2C_TRANSMIT_INTERRUPT3 Transmit interrupt3
+//! - \b EUSCI_B_I2C_RECEIVE_INTERRUPT0 Receive interrupt0
+//! - \b EUSCI_B_I2C_RECEIVE_INTERRUPT1 Receive interrupt1
+//! - \b EUSCI_B_I2C_RECEIVE_INTERRUPT2 Receive interrupt2
+//! - \b EUSCI_B_I2C_RECEIVE_INTERRUPT3 Receive interrupt3
+//! - \b EUSCI_B_I2C_BIT9_POSITION_INTERRUPT Bit position 9 interrupt
+//! - \b EUSCI_B_I2C_CLOCK_LOW_TIMEOUT_INTERRUPT Clock low timeout
+//! interrupt enable
+//! - \b EUSCI_B_I2C_BYTE_COUNTER_INTERRUPT Byte counter interrupt
+//! enable
+//! \n indicating the status of the masked interrupts
+//
+//*****************************************************************************
+extern uint16_t EUSCI_B_I2C_getInterruptStatus(uint16_t baseAddress,
+ uint16_t mask);
+
+//*****************************************************************************
+//
+//! \brief Does single byte transmission from Master to Slave
+//!
+//! This function is used by the Master module to send a single byte. This
+//! function sends a start, then transmits the byte to the slave and then sends
+//! a stop.
+//!
+//! \param baseAddress is the base address of the I2C Master module.
+//! \param txData is the data byte to be transmitted
+//!
+//! Modified bits of \b UCBxTXBUF register, bits of \b UCBxCTLW0 register, bits
+//! of \b UCBxIE register and bits of \b UCBxIFG register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void EUSCI_B_I2C_masterSendSingleByte(uint16_t baseAddress,
+ uint8_t txData);
+
+//*****************************************************************************
+//
+//! \brief Does single byte reception from Slave
+//!
+//! This function is used by the Master module to receive a single byte. This
+//! function sends start and stop, waits for data reception and then receives
+//! the data from the slave
+//!
+//! \param baseAddress is the base address of the I2C Master module.
+//!
+//! Modified bits of \b UCBxTXBUF register, bits of \b UCBxCTLW0 register, bits
+//! of \b UCBxIE register and bits of \b UCBxIFG register.
+//!
+//! \return STATUS_SUCCESS or STATUS_FAILURE of the transmission process.
+//
+//*****************************************************************************
+extern uint8_t EUSCI_B_I2C_masterReceiveSingleByte(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Does single byte transmission from Master to Slave with timeout
+//!
+//! This function is used by the Master module to send a single byte. This
+//! function sends a start, then transmits the byte to the slave and then sends
+//! a stop.
+//!
+//! \param baseAddress is the base address of the I2C Master module.
+//! \param txData is the data byte to be transmitted
+//! \param timeout is the amount of time to wait until giving up
+//!
+//! Modified bits of \b UCBxTXBUF register, bits of \b UCBxCTLW0 register, bits
+//! of \b UCBxIE register and bits of \b UCBxIFG register.
+//!
+//! \return STATUS_SUCCESS or STATUS_FAILURE of the transmission process.
+//
+//*****************************************************************************
+extern bool EUSCI_B_I2C_masterSendSingleByteWithTimeout(uint16_t baseAddress,
+ uint8_t txData,
+ uint32_t timeout);
+
+//*****************************************************************************
+//
+//! \brief Starts multi-byte transmission from Master to Slave
+//!
+//! This function is used by the master module to start a multi byte
+//! transaction.
+//!
+//! \param baseAddress is the base address of the I2C Master module.
+//! \param txData is the first data byte to be transmitted
+//!
+//! Modified bits of \b UCBxTXBUF register, bits of \b UCBxCTLW0 register, bits
+//! of \b UCBxIE register and bits of \b UCBxIFG register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void EUSCI_B_I2C_masterSendMultiByteStart(uint16_t baseAddress,
+ uint8_t txData);
+
+//*****************************************************************************
+//
+//! \brief Starts multi-byte transmission from Master to Slave with timeout
+//!
+//! This function is used by the master module to start a multi byte
+//! transaction.
+//!
+//! \param baseAddress is the base address of the I2C Master module.
+//! \param txData is the first data byte to be transmitted
+//! \param timeout is the amount of time to wait until giving up
+//!
+//! Modified bits of \b UCBxTXBUF register, bits of \b UCBxCTLW0 register, bits
+//! of \b UCBxIE register and bits of \b UCBxIFG register.
+//!
+//! \return STATUS_SUCCESS or STATUS_FAILURE of the transmission process.
+//
+//*****************************************************************************
+extern bool EUSCI_B_I2C_masterSendMultiByteStartWithTimeout(uint16_t baseAddress,
+ uint8_t txData,
+ uint32_t timeout);
+
+//*****************************************************************************
+//
+//! \brief Continues multi-byte transmission from Master to Slave
+//!
+//! This function is used by the Master module continue each byte of a multi-
+//! byte transmission. This function transmits each data byte of a multi-byte
+//! transmission to the slave.
+//!
+//! \param baseAddress is the base address of the I2C Master module.
+//! \param txData is the next data byte to be transmitted
+//!
+//! Modified bits of \b UCBxTXBUF register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void EUSCI_B_I2C_masterSendMultiByteNext(uint16_t baseAddress,
+ uint8_t txData);
+
+//*****************************************************************************
+//
+//! \brief Continues multi-byte transmission from Master to Slave with timeout
+//!
+//! This function is used by the Master module continue each byte of a multi-
+//! byte transmission. This function transmits each data byte of a multi-byte
+//! transmission to the slave.
+//!
+//! \param baseAddress is the base address of the I2C Master module.
+//! \param txData is the next data byte to be transmitted
+//! \param timeout is the amount of time to wait until giving up
+//!
+//! Modified bits of \b UCBxTXBUF register.
+//!
+//! \return STATUS_SUCCESS or STATUS_FAILURE of the transmission process.
+//
+//*****************************************************************************
+extern bool EUSCI_B_I2C_masterSendMultiByteNextWithTimeout(uint16_t baseAddress,
+ uint8_t txData,
+ uint32_t timeout);
+
+//*****************************************************************************
+//
+//! \brief Finishes multi-byte transmission from Master to Slave
+//!
+//! This function is used by the Master module to send the last byte and STOP.
+//! This function transmits the last data byte of a multi-byte transmission to
+//! the slave and then sends a stop.
+//!
+//! \param baseAddress is the base address of the I2C Master module.
+//! \param txData is the last data byte to be transmitted in a multi-byte
+//! transmission
+//!
+//! Modified bits of \b UCBxTXBUF register and bits of \b UCBxCTLW0 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void EUSCI_B_I2C_masterSendMultiByteFinish(uint16_t baseAddress,
+ uint8_t txData);
+
+//*****************************************************************************
+//
+//! \brief Finishes multi-byte transmission from Master to Slave with timeout
+//!
+//! This function is used by the Master module to send the last byte and STOP.
+//! This function transmits the last data byte of a multi-byte transmission to
+//! the slave and then sends a stop.
+//!
+//! \param baseAddress is the base address of the I2C Master module.
+//! \param txData is the last data byte to be transmitted in a multi-byte
+//! transmission
+//! \param timeout is the amount of time to wait until giving up
+//!
+//! Modified bits of \b UCBxTXBUF register and bits of \b UCBxCTLW0 register.
+//!
+//! \return STATUS_SUCCESS or STATUS_FAILURE of the transmission process.
+//
+//*****************************************************************************
+extern bool EUSCI_B_I2C_masterSendMultiByteFinishWithTimeout(uint16_t baseAddress,
+ uint8_t txData,
+ uint32_t timeout);
+
+//*****************************************************************************
+//
+//! \brief This function is used by the Master module to initiate START
+//!
+//! This function is used by the Master module to initiate START
+//!
+//! \param baseAddress is the base address of the I2C Master module.
+//!
+//! Modified bits are \b UCTXSTT of \b UCBxCTLW0 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void EUSCI_B_I2C_masterSendStart(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Send STOP byte at the end of a multi-byte transmission from Master
+//! to Slave
+//!
+//! This function is used by the Master module send STOP at the end of a multi-
+//! byte transmission. This function sends a stop after current transmission is
+//! complete.
+//!
+//! \param baseAddress is the base address of the I2C Master module.
+//!
+//! Modified bits are \b UCTXSTP of \b UCBxCTLW0 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void EUSCI_B_I2C_masterSendMultiByteStop(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Send STOP byte at the end of a multi-byte transmission from Master
+//! to Slave with timeout
+//!
+//! This function is used by the Master module send STOP at the end of a multi-
+//! byte transmission. This function sends a stop after current transmission is
+//! complete.
+//!
+//! \param baseAddress is the base address of the I2C Master module.
+//! \param timeout is the amount of time to wait until giving up
+//!
+//! Modified bits are \b UCTXSTP of \b UCBxCTLW0 register.
+//!
+//! \return STATUS_SUCCESS or STATUS_FAILURE of the transmission process.
+//
+//*****************************************************************************
+extern bool EUSCI_B_I2C_masterSendMultiByteStopWithTimeout(uint16_t baseAddress,
+ uint32_t timeout);
+
+//*****************************************************************************
+//
+//! \brief Starts reception at the Master end
+//!
+//! This function is used by the Master module initiate reception of a single
+//! byte. This function sends a start.
+//!
+//! \param baseAddress is the base address of the I2C Master module.
+//!
+//! Modified bits are \b UCTXSTT of \b UCBxCTLW0 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void EUSCI_B_I2C_masterReceiveStart(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Starts multi-byte reception at the Master end one byte at a time
+//!
+//! This function is used by the Master module to receive each byte of a multi-
+//! byte reception. This function reads currently received byte.
+//!
+//! \param baseAddress is the base address of the I2C Master module.
+//!
+//! \return Received byte at Master end.
+//
+//*****************************************************************************
+extern uint8_t EUSCI_B_I2C_masterReceiveMultiByteNext(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Finishes multi-byte reception at the Master end
+//!
+//! This function is used by the Master module to initiate completion of a
+//! multi-byte reception. This function receives the current byte and initiates
+//! the STOP from master to slave.
+//!
+//! \param baseAddress is the base address of the I2C Master module.
+//!
+//! Modified bits are \b UCTXSTP of \b UCBxCTLW0 register.
+//!
+//! \return Received byte at Master end.
+//
+//*****************************************************************************
+extern uint8_t EUSCI_B_I2C_masterReceiveMultiByteFinish(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Finishes multi-byte reception at the Master end with timeout
+//!
+//! This function is used by the Master module to initiate completion of a
+//! multi-byte reception. This function receives the current byte and initiates
+//! the STOP from master to slave.
+//!
+//! \param baseAddress is the base address of the I2C Master module.
+//! \param txData is a pointer to the location to store the received byte at
+//! master end
+//! \param timeout is the amount of time to wait until giving up
+//!
+//! Modified bits are \b UCTXSTP of \b UCBxCTLW0 register.
+//!
+//! \return STATUS_SUCCESS or STATUS_FAILURE of the reception process
+//
+//*****************************************************************************
+extern bool EUSCI_B_I2C_masterReceiveMultiByteFinishWithTimeout(uint16_t baseAddress,
+ uint8_t *txData,
+ uint32_t timeout);
+
+//*****************************************************************************
+//
+//! \brief Sends the STOP at the end of a multi-byte reception at the Master
+//! end
+//!
+//! This function is used by the Master module to initiate STOP
+//!
+//! \param baseAddress is the base address of the I2C Master module.
+//!
+//! Modified bits are \b UCTXSTP of \b UCBxCTLW0 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void EUSCI_B_I2C_masterReceiveMultiByteStop(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Enables Multi Master Mode
+//!
+//! At the end of this function, the I2C module is still disabled till
+//! EUSCI_B_I2C_enable is invoked
+//!
+//! \param baseAddress is the base address of the I2C module.
+//!
+//! Modified bits are \b UCSWRST and \b UCMM of \b UCBxCTLW0 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void EUSCI_B_I2C_enableMultiMasterMode(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Disables Multi Master Mode
+//!
+//! At the end of this function, the I2C module is still disabled till
+//! EUSCI_B_I2C_enable is invoked
+//!
+//! \param baseAddress is the base address of the I2C module.
+//!
+//! Modified bits are \b UCSWRST and \b UCMM of \b UCBxCTLW0 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void EUSCI_B_I2C_disableMultiMasterMode(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief receives a byte that has been sent to the I2C Master Module.
+//!
+//! This function reads a byte of data from the I2C receive data Register.
+//!
+//! \param baseAddress is the base address of the I2C Master module.
+//!
+//! \return Returns the byte received from by the I2C module, cast as an
+//! uint8_t.
+//
+//*****************************************************************************
+extern uint8_t EUSCI_B_I2C_masterReceiveSingle(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Returns the address of the RX Buffer of the I2C for the DMA module.
+//!
+//! Returns the address of the I2C RX Buffer. This can be used in conjunction
+//! with the DMA to store the received data directly to memory.
+//!
+//! \param baseAddress is the base address of the I2C module.
+//!
+//! \return The address of the I2C RX Buffer
+//
+//*****************************************************************************
+extern uint32_t EUSCI_B_I2C_getReceiveBufferAddress(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Returns the address of the TX Buffer of the I2C for the DMA module.
+//!
+//! Returns the address of the I2C TX Buffer. This can be used in conjunction
+//! with the DMA to obtain transmitted data directly from memory.
+//!
+//! \param baseAddress is the base address of the I2C module.
+//!
+//! \return The address of the I2C TX Buffer
+//
+//*****************************************************************************
+extern uint32_t EUSCI_B_I2C_getTransmitBufferAddress(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Enforces a timeout if the I2C clock is held low longer than a
+//! defined time.
+//!
+//! By using this function, the UCCLTOIFG interrupt will trigger if the clock
+//! is held low longer than this defined time. It is possible to detect the
+//! situation, when a clock is stretched by a master or slave for too long. The
+//! user can then handle this issue by, for example, resetting the eUSCI_B
+//! module. It is possible to select one of three predefined times for the
+//! clock low timeout.
+//!
+//! \param baseAddress is the base address of the I2C module.
+//! \param timeout how long the clock can be low before a timeout triggers.
+//! Enables generation of the UCCLTOIFG interrupt.
+//! Valid values are:
+//! - \b EUSCI_B_I2C_TIMEOUT_DISABLE [Default]
+//! - \b EUSCI_B_I2C_TIMEOUT_28_MS
+//! - \b EUSCI_B_I2C_TIMEOUT_31_MS
+//! - \b EUSCI_B_I2C_TIMEOUT_34_MS
+//!
+//! Modified bits are \b UCCLTO of \b UCBxCTLW1 register; bits \b UCSWRST of \b
+//! UCBxCTLW0 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void EUSCI_B_I2C_setTimeout(uint16_t baseAddress,
+ uint16_t timeout);
+
+//*****************************************************************************
+//
+// Mark the end of the C bindings section for C++ compilers.
+//
+//*****************************************************************************
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+#endif // __MSP430WARE_EUSCI_B_I2C_H__
diff --git a/Apps/FlightSoftware/MotorControl/driverlib/eusci_b_spi.c b/Apps/FlightSoftware/MotorControl/driverlib/eusci_b_spi.c
new file mode 100644
index 000000000..9a41ced3b
--- /dev/null
+++ b/Apps/FlightSoftware/MotorControl/driverlib/eusci_b_spi.c
@@ -0,0 +1,226 @@
+/* --COPYRIGHT--,BSD
+ * Copyright (c) 2017, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * --/COPYRIGHT--*/
+//*****************************************************************************
+//
+// eusci_b_spi.c - Driver for the eusci_b_spi Module.
+//
+//*****************************************************************************
+
+//*****************************************************************************
+//
+//! \addtogroup eusci_b_spi_api eusci_b_spi
+//! @{
+//
+//*****************************************************************************
+
+#include "inc/hw_memmap.h"
+
+#ifdef __MSP430_HAS_EUSCI_Bx__
+#include "eusci_b_spi.h"
+
+#include
+
+void EUSCI_B_SPI_initMaster (uint16_t baseAddress,
+ EUSCI_B_SPI_initMasterParam *param)
+{
+ //Disable the USCI Module
+ HWREG16(baseAddress + OFS_UCBxCTLW0) |= UCSWRST;
+
+ //Reset OFS_UCBxCTLW0 values
+ HWREG16(baseAddress + OFS_UCBxCTLW0) &= ~(UCCKPH + UCCKPL + UC7BIT + UCMSB +
+ UCMST + UCMODE_3 + UCSYNC);
+
+ //Reset OFS_UCBxCTLW0 values
+ HWREG16(baseAddress + OFS_UCBxCTLW0) &= ~(UCSSEL_3);
+
+ //Select Clock
+ HWREG16(baseAddress + OFS_UCBxCTLW0) |= param->selectClockSource;
+
+ HWREG16(baseAddress + OFS_UCBxBRW) =
+ (uint16_t)(param->clockSourceFrequency / param->desiredSpiClock);
+
+ /*
+ * Configure as SPI master mode.
+ * Clock phase select, polarity, msb
+ * UCMST = Master mode
+ * UCSYNC = Synchronous mode
+ * UCMODE_0 = 3-pin SPI
+ */
+ HWREG16(baseAddress + OFS_UCBxCTLW0) |= (
+ param->msbFirst +
+ param->clockPhase +
+ param->clockPolarity +
+ UCMST +
+ UCSYNC +
+ param->spiMode
+ );
+}
+
+void EUSCI_B_SPI_select4PinFunctionality (uint16_t baseAddress,
+ uint8_t select4PinFunctionality
+ )
+{
+ HWREG16(baseAddress + OFS_UCBxCTLW0) &= ~UCSTEM;
+ HWREG16(baseAddress + OFS_UCBxCTLW0) |= select4PinFunctionality;
+}
+
+void EUSCI_B_SPI_changeMasterClock (uint16_t baseAddress,
+ EUSCI_B_SPI_changeMasterClockParam *param)
+{
+ //Disable the USCI Module
+ HWREG16(baseAddress + OFS_UCBxCTLW0) |= UCSWRST;
+
+ HWREG16(baseAddress + OFS_UCBxBRW) =
+ (uint16_t)(param->clockSourceFrequency / param->desiredSpiClock);
+
+ //Reset the UCSWRST bit to enable the USCI Module
+ HWREG16(baseAddress + OFS_UCBxCTLW0) &= ~(UCSWRST);
+}
+
+void EUSCI_B_SPI_initSlave (uint16_t baseAddress, EUSCI_B_SPI_initSlaveParam *param)
+{
+ //Disable USCI Module
+ HWREG16(baseAddress + OFS_UCBxCTLW0) |= UCSWRST;
+
+ //Reset OFS_UCBxCTLW0 register
+ HWREG16(baseAddress + OFS_UCBxCTLW0) &= ~(UCMSB +
+ UC7BIT +
+ UCMST +
+ UCCKPL +
+ UCCKPH +
+ UCMODE_3
+ );
+
+ //Clock polarity, phase select, msbFirst, SYNC, Mode0
+ HWREG16(baseAddress + OFS_UCBxCTLW0) |= (param->clockPhase +
+ param->clockPolarity +
+ param->msbFirst +
+ UCSYNC +
+ param->spiMode
+ );
+}
+
+void EUSCI_B_SPI_changeClockPhasePolarity (uint16_t baseAddress,
+ uint16_t clockPhase,
+ uint16_t clockPolarity
+ )
+{
+ //Disable the USCI Module
+ HWREG16(baseAddress + OFS_UCBxCTLW0) |= UCSWRST;
+
+ HWREG16(baseAddress + OFS_UCBxCTLW0) &= ~(UCCKPH + UCCKPL);
+
+ HWREG16(baseAddress + OFS_UCBxCTLW0) |= (
+ clockPhase +
+ clockPolarity
+ );
+
+ //Reset the UCSWRST bit to enable the USCI Module
+ HWREG16(baseAddress + OFS_UCBxCTLW0) &= ~(UCSWRST);
+}
+
+void EUSCI_B_SPI_transmitData ( uint16_t baseAddress,
+ uint8_t transmitData
+ )
+{
+ HWREG16(baseAddress + OFS_UCBxTXBUF) = transmitData;
+}
+
+uint8_t EUSCI_B_SPI_receiveData (uint16_t baseAddress)
+{
+ return ( HWREG16(baseAddress + OFS_UCBxRXBUF)) ;
+}
+
+void EUSCI_B_SPI_enableInterrupt (uint16_t baseAddress,
+ uint8_t mask
+ )
+{
+ HWREG16(baseAddress + OFS_UCBxIE) |= mask;
+}
+
+void EUSCI_B_SPI_disableInterrupt (uint16_t baseAddress,
+ uint8_t mask
+ )
+{
+ HWREG16(baseAddress + OFS_UCBxIE) &= ~mask;
+}
+
+uint8_t EUSCI_B_SPI_getInterruptStatus (uint16_t baseAddress,
+ uint8_t mask
+ )
+{
+ return ( HWREG16(baseAddress + OFS_UCBxIFG) & mask );
+}
+
+void EUSCI_B_SPI_clearInterrupt (uint16_t baseAddress,
+ uint8_t mask
+ )
+{
+ HWREG16(baseAddress + OFS_UCBxIFG) &= ~mask;
+}
+
+void EUSCI_B_SPI_enable (uint16_t baseAddress)
+{
+ //Reset the UCSWRST bit to enable the USCI Module
+ HWREG16(baseAddress + OFS_UCBxCTLW0) &= ~(UCSWRST);
+}
+
+void EUSCI_B_SPI_disable (uint16_t baseAddress)
+{
+ //Set the UCSWRST bit to disable the USCI Module
+ HWREG16(baseAddress + OFS_UCBxCTLW0) |= UCSWRST;
+}
+
+uint32_t EUSCI_B_SPI_getReceiveBufferAddress (uint16_t baseAddress)
+{
+ return ( baseAddress + OFS_UCBxRXBUF );
+}
+
+uint32_t EUSCI_B_SPI_getTransmitBufferAddress (uint16_t baseAddress)
+{
+ return ( baseAddress + OFS_UCBxTXBUF );
+}
+
+uint16_t EUSCI_B_SPI_isBusy (uint16_t baseAddress)
+{
+ //Return the bus busy status.
+ return (HWREG16(baseAddress + OFS_UCBxSTATW) & UCBUSY);
+}
+
+
+#endif
+//*****************************************************************************
+//
+//! Close the doxygen group for eusci_b_spi_api
+//! @}
+//
+//*****************************************************************************
diff --git a/Apps/FlightSoftware/MotorControl/driverlib/eusci_b_spi.h b/Apps/FlightSoftware/MotorControl/driverlib/eusci_b_spi.h
new file mode 100644
index 000000000..52170d2e3
--- /dev/null
+++ b/Apps/FlightSoftware/MotorControl/driverlib/eusci_b_spi.h
@@ -0,0 +1,526 @@
+/* --COPYRIGHT--,BSD
+ * Copyright (c) 2017, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * --/COPYRIGHT--*/
+//*****************************************************************************
+//
+// eusci_b_spi.h - Driver for the EUSCI_B_SPI Module.
+//
+//*****************************************************************************
+
+#ifndef __MSP430WARE_EUSCI_B_SPI_H__
+#define __MSP430WARE_EUSCI_B_SPI_H__
+
+#include "inc/hw_memmap.h"
+
+#ifdef __MSP430_HAS_EUSCI_Bx__
+
+//*****************************************************************************
+//
+// If building with a C++ compiler, make all of the definitions in this header
+// have a C binding.
+//
+//*****************************************************************************
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+#include "inc/hw_memmap.h"
+//*****************************************************************************
+//
+//! \brief Used in the EUSCI_B_SPI_initMaster() function as the param
+//! parameter.
+//
+//*****************************************************************************
+typedef struct EUSCI_B_SPI_initMasterParam {
+ //! Selects Clock source. Refer to device specific datasheet for available
+ //! options.
+ //! \n Valid values are:
+ //! - \b EUSCI_B_SPI_CLOCKSOURCE_ACLK
+ //! - \b EUSCI_B_SPI_CLOCKSOURCE_SMCLK
+ uint8_t selectClockSource;
+ //! Is the frequency of the selected clock source
+ uint32_t clockSourceFrequency;
+ //! Is the desired clock rate for SPI communication
+ uint32_t desiredSpiClock;
+ //! Controls the direction of the receive and transmit shift register.
+ //! \n Valid values are:
+ //! - \b EUSCI_B_SPI_MSB_FIRST
+ //! - \b EUSCI_B_SPI_LSB_FIRST [Default]
+ uint16_t msbFirst;
+ //! Is clock phase select.
+ //! \n Valid values are:
+ //! - \b EUSCI_B_SPI_PHASE_DATA_CHANGED_ONFIRST_CAPTURED_ON_NEXT [Default]
+ //! - \b EUSCI_B_SPI_PHASE_DATA_CAPTURED_ONFIRST_CHANGED_ON_NEXT
+ uint16_t clockPhase;
+ //! Is clock polarity select
+ //! \n Valid values are:
+ //! - \b EUSCI_B_SPI_CLOCKPOLARITY_INACTIVITY_HIGH
+ //! - \b EUSCI_B_SPI_CLOCKPOLARITY_INACTIVITY_LOW [Default]
+ uint16_t clockPolarity;
+ //! Is SPI mode select
+ //! \n Valid values are:
+ //! - \b EUSCI_B_SPI_3PIN
+ //! - \b EUSCI_B_SPI_4PIN_UCxSTE_ACTIVE_HIGH
+ //! - \b EUSCI_B_SPI_4PIN_UCxSTE_ACTIVE_LOW
+ uint16_t spiMode;
+} EUSCI_B_SPI_initMasterParam;
+
+//*****************************************************************************
+//
+//! \brief Used in the EUSCI_B_SPI_initSlave() function as the param parameter.
+//
+//*****************************************************************************
+typedef struct EUSCI_B_SPI_initSlaveParam {
+ //! Controls the direction of the receive and transmit shift register.
+ //! \n Valid values are:
+ //! - \b EUSCI_B_SPI_MSB_FIRST
+ //! - \b EUSCI_B_SPI_LSB_FIRST [Default]
+ uint16_t msbFirst;
+ //! Is clock phase select.
+ //! \n Valid values are:
+ //! - \b EUSCI_B_SPI_PHASE_DATA_CHANGED_ONFIRST_CAPTURED_ON_NEXT [Default]
+ //! - \b EUSCI_B_SPI_PHASE_DATA_CAPTURED_ONFIRST_CHANGED_ON_NEXT
+ uint16_t clockPhase;
+ //! Is clock polarity select
+ //! \n Valid values are:
+ //! - \b EUSCI_B_SPI_CLOCKPOLARITY_INACTIVITY_HIGH
+ //! - \b EUSCI_B_SPI_CLOCKPOLARITY_INACTIVITY_LOW [Default]
+ uint16_t clockPolarity;
+ //! Is SPI mode select
+ //! \n Valid values are:
+ //! - \b EUSCI_B_SPI_3PIN
+ //! - \b EUSCI_B_SPI_4PIN_UCxSTE_ACTIVE_HIGH
+ //! - \b EUSCI_B_SPI_4PIN_UCxSTE_ACTIVE_LOW
+ uint16_t spiMode;
+} EUSCI_B_SPI_initSlaveParam;
+
+//*****************************************************************************
+//
+//! \brief Used in the EUSCI_B_SPI_changeMasterClock() function as the param
+//! parameter.
+//
+//*****************************************************************************
+typedef struct EUSCI_B_SPI_changeMasterClockParam {
+ //! Is the frequency of the selected clock source
+ uint32_t clockSourceFrequency;
+ //! Is the desired clock rate for SPI communication
+ uint32_t desiredSpiClock;
+} EUSCI_B_SPI_changeMasterClockParam;
+
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the clockPhase parameter for
+// functions: EUSCI_B_SPI_changeClockPhasePolarity(); the param parameter for
+// functions: EUSCI_B_SPI_initMaster(), and EUSCI_B_SPI_initSlave().
+//
+//*****************************************************************************
+#define EUSCI_B_SPI_PHASE_DATA_CHANGED_ONFIRST_CAPTURED_ON_NEXT 0x00
+#define EUSCI_B_SPI_PHASE_DATA_CAPTURED_ONFIRST_CHANGED_ON_NEXT UCCKPH
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the param parameter for
+// functions: EUSCI_B_SPI_initMaster(), and EUSCI_B_SPI_initSlave().
+//
+//*****************************************************************************
+#define EUSCI_B_SPI_MSB_FIRST UCMSB
+#define EUSCI_B_SPI_LSB_FIRST 0x00
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the param parameter for
+// functions: EUSCI_B_SPI_initMaster(), and EUSCI_B_SPI_initSlave(); the
+// clockPolarity parameter for functions:
+// EUSCI_B_SPI_changeClockPhasePolarity().
+//
+//*****************************************************************************
+#define EUSCI_B_SPI_CLOCKPOLARITY_INACTIVITY_HIGH UCCKPL
+#define EUSCI_B_SPI_CLOCKPOLARITY_INACTIVITY_LOW 0x00
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the param parameter for
+// functions: EUSCI_B_SPI_initMaster().
+//
+//*****************************************************************************
+#define EUSCI_B_SPI_CLOCKSOURCE_ACLK UCSSEL__ACLK
+#define EUSCI_B_SPI_CLOCKSOURCE_SMCLK UCSSEL__SMCLK
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the param parameter for
+// functions: EUSCI_B_SPI_initMaster(), and EUSCI_B_SPI_initSlave().
+//
+//*****************************************************************************
+#define EUSCI_B_SPI_3PIN UCMODE_0
+#define EUSCI_B_SPI_4PIN_UCxSTE_ACTIVE_HIGH UCMODE_1
+#define EUSCI_B_SPI_4PIN_UCxSTE_ACTIVE_LOW UCMODE_2
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the select4PinFunctionality
+// parameter for functions: EUSCI_B_SPI_select4PinFunctionality().
+//
+//*****************************************************************************
+#define EUSCI_B_SPI_PREVENT_CONFLICTS_WITH_OTHER_MASTERS 0x00
+#define EUSCI_B_SPI_ENABLE_SIGNAL_FOR_4WIRE_SLAVE UCSTEM
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the mask parameter for
+// functions: EUSCI_B_SPI_enableInterrupt(), EUSCI_B_SPI_disableInterrupt(),
+// EUSCI_B_SPI_getInterruptStatus(), and EUSCI_B_SPI_clearInterrupt() as well
+// as returned by the EUSCI_B_SPI_getInterruptStatus() function.
+//
+//*****************************************************************************
+#define EUSCI_B_SPI_TRANSMIT_INTERRUPT UCTXIE
+#define EUSCI_B_SPI_RECEIVE_INTERRUPT UCRXIE
+
+//*****************************************************************************
+//
+// The following are values that can be passed toThe following are values that
+// can be returned by the EUSCI_B_SPI_isBusy() function.
+//
+//*****************************************************************************
+#define EUSCI_B_SPI_BUSY UCBUSY
+#define EUSCI_B_SPI_NOT_BUSY 0x00
+
+//*****************************************************************************
+//
+// Prototypes for the APIs.
+//
+//*****************************************************************************
+
+//*****************************************************************************
+//
+//! \brief Initializes the SPI Master block.
+//!
+//! Upon successful initialization of the SPI master block, this function will
+//! have set the bus speed for the master, but the SPI Master block still
+//! remains disabled and must be enabled with EUSCI_B_SPI_enable()
+//!
+//! \param baseAddress is the base address of the EUSCI_B_SPI Master module.
+//! \param param is the pointer to struct for master initialization.
+//!
+//! Modified bits are \b UCCKPH, \b UCCKPL, \b UC7BIT, \b UCMSB, \b UCSSELx and
+//! \b UCSWRST of \b UCAxCTLW0 register.
+//!
+//! \return STATUS_SUCCESS
+//
+//*****************************************************************************
+extern void EUSCI_B_SPI_initMaster(uint16_t baseAddress,
+ EUSCI_B_SPI_initMasterParam *param);
+
+//*****************************************************************************
+//
+//! \brief Selects 4Pin Functionality
+//!
+//! This function should be invoked only in 4-wire mode. Invoking this function
+//! has no effect in 3-wire mode.
+//!
+//! \param baseAddress is the base address of the EUSCI_B_SPI module.
+//! \param select4PinFunctionality selects 4 pin functionality
+//! Valid values are:
+//! - \b EUSCI_B_SPI_PREVENT_CONFLICTS_WITH_OTHER_MASTERS
+//! - \b EUSCI_B_SPI_ENABLE_SIGNAL_FOR_4WIRE_SLAVE
+//!
+//! Modified bits are \b UCSTEM of \b UCAxCTLW0 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void EUSCI_B_SPI_select4PinFunctionality(uint16_t baseAddress,
+ uint8_t select4PinFunctionality);
+
+//*****************************************************************************
+//
+//! \brief Initializes the SPI Master clock. At the end of this function call,
+//! SPI module is left enabled.
+//!
+//! \param baseAddress is the base address of the EUSCI_B_SPI module.
+//! \param param is the pointer to struct for master clock setting.
+//!
+//! Modified bits are \b UCSWRST of \b UCAxCTLW0 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void EUSCI_B_SPI_changeMasterClock(uint16_t baseAddress,
+ EUSCI_B_SPI_changeMasterClockParam *param);
+
+//*****************************************************************************
+//
+//! \brief Initializes the SPI Slave block.
+//!
+//! Upon successful initialization of the SPI slave block, this function will
+//! have initialized the slave block, but the SPI Slave block still remains
+//! disabled and must be enabled with EUSCI_B_SPI_enable()
+//!
+//! \param baseAddress is the base address of the EUSCI_B_SPI Slave module.
+//! \param param is the pointer to struct for slave initialization.
+//!
+//! Modified bits are \b UCMSB, \b UCMST, \b UC7BIT, \b UCCKPL, \b UCCKPH, \b
+//! UCMODE and \b UCSWRST of \b UCAxCTLW0 register.
+//!
+//! \return STATUS_SUCCESS
+//
+//*****************************************************************************
+extern void EUSCI_B_SPI_initSlave(uint16_t baseAddress,
+ EUSCI_B_SPI_initSlaveParam *param);
+
+//*****************************************************************************
+//
+//! \brief Changes the SPI clock phase and polarity. At the end of this
+//! function call, SPI module is left enabled.
+//!
+//! \param baseAddress is the base address of the EUSCI_B_SPI module.
+//! \param clockPhase is clock phase select.
+//! Valid values are:
+//! - \b EUSCI_B_SPI_PHASE_DATA_CHANGED_ONFIRST_CAPTURED_ON_NEXT
+//! [Default]
+//! - \b EUSCI_B_SPI_PHASE_DATA_CAPTURED_ONFIRST_CHANGED_ON_NEXT
+//! \param clockPolarity is clock polarity select
+//! Valid values are:
+//! - \b EUSCI_B_SPI_CLOCKPOLARITY_INACTIVITY_HIGH
+//! - \b EUSCI_B_SPI_CLOCKPOLARITY_INACTIVITY_LOW [Default]
+//!
+//! Modified bits are \b UCCKPL, \b UCCKPH and \b UCSWRST of \b UCAxCTLW0
+//! register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void EUSCI_B_SPI_changeClockPhasePolarity(uint16_t baseAddress,
+ uint16_t clockPhase,
+ uint16_t clockPolarity);
+
+//*****************************************************************************
+//
+//! \brief Transmits a byte from the SPI Module.
+//!
+//! This function will place the supplied data into SPI transmit data register
+//! to start transmission.
+//!
+//! \param baseAddress is the base address of the EUSCI_B_SPI module.
+//! \param transmitData data to be transmitted from the SPI module
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void EUSCI_B_SPI_transmitData(uint16_t baseAddress,
+ uint8_t transmitData);
+
+//*****************************************************************************
+//
+//! \brief Receives a byte that has been sent to the SPI Module.
+//!
+//! This function reads a byte of data from the SPI receive data Register.
+//!
+//! \param baseAddress is the base address of the EUSCI_B_SPI module.
+//!
+//! \return Returns the byte received from by the SPI module, cast as an
+//! uint8_t.
+//
+//*****************************************************************************
+extern uint8_t EUSCI_B_SPI_receiveData(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Enables individual SPI interrupt sources.
+//!
+//! Enables the indicated SPI interrupt sources. Only the sources that are
+//! enabled can be reflected to the processor interrupt; disabled sources have
+//! no effect on the processor. Does not clear interrupt flags.
+//!
+//! \param baseAddress is the base address of the EUSCI_B_SPI module.
+//! \param mask is the bit mask of the interrupt sources to be enabled.
+//! Mask value is the logical OR of any of the following:
+//! - \b EUSCI_B_SPI_TRANSMIT_INTERRUPT
+//! - \b EUSCI_B_SPI_RECEIVE_INTERRUPT
+//!
+//! Modified bits of \b UCAxIFG register and bits of \b UCAxIE register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void EUSCI_B_SPI_enableInterrupt(uint16_t baseAddress,
+ uint8_t mask);
+
+//*****************************************************************************
+//
+//! \brief Disables individual SPI interrupt sources.
+//!
+//! Disables the indicated SPI interrupt sources. Only the sources that are
+//! enabled can be reflected to the processor interrupt; disabled sources have
+//! no effect on the processor.
+//!
+//! \param baseAddress is the base address of the EUSCI_B_SPI module.
+//! \param mask is the bit mask of the interrupt sources to be disabled.
+//! Mask value is the logical OR of any of the following:
+//! - \b EUSCI_B_SPI_TRANSMIT_INTERRUPT
+//! - \b EUSCI_B_SPI_RECEIVE_INTERRUPT
+//!
+//! Modified bits of \b UCAxIE register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void EUSCI_B_SPI_disableInterrupt(uint16_t baseAddress,
+ uint8_t mask);
+
+//*****************************************************************************
+//
+//! \brief Gets the current SPI interrupt status.
+//!
+//! This returns the interrupt status for the SPI module based on which flag is
+//! passed.
+//!
+//! \param baseAddress is the base address of the EUSCI_B_SPI module.
+//! \param mask is the masked interrupt flag status to be returned.
+//! Mask value is the logical OR of any of the following:
+//! - \b EUSCI_B_SPI_TRANSMIT_INTERRUPT
+//! - \b EUSCI_B_SPI_RECEIVE_INTERRUPT
+//!
+//! \return Logical OR of any of the following:
+//! - \b EUSCI_B_SPI_TRANSMIT_INTERRUPT
+//! - \b EUSCI_B_SPI_RECEIVE_INTERRUPT
+//! \n indicating the status of the masked interrupts
+//
+//*****************************************************************************
+extern uint8_t EUSCI_B_SPI_getInterruptStatus(uint16_t baseAddress,
+ uint8_t mask);
+
+//*****************************************************************************
+//
+//! \brief Clears the selected SPI interrupt status flag.
+//!
+//! \param baseAddress is the base address of the EUSCI_B_SPI module.
+//! \param mask is the masked interrupt flag to be cleared.
+//! Mask value is the logical OR of any of the following:
+//! - \b EUSCI_B_SPI_TRANSMIT_INTERRUPT
+//! - \b EUSCI_B_SPI_RECEIVE_INTERRUPT
+//!
+//! Modified bits of \b UCAxIFG register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void EUSCI_B_SPI_clearInterrupt(uint16_t baseAddress,
+ uint8_t mask);
+
+//*****************************************************************************
+//
+//! \brief Enables the SPI block.
+//!
+//! This will enable operation of the SPI block.
+//!
+//! \param baseAddress is the base address of the EUSCI_B_SPI module.
+//!
+//! Modified bits are \b UCSWRST of \b UCAxCTLW0 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void EUSCI_B_SPI_enable(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Disables the SPI block.
+//!
+//! This will disable operation of the SPI block.
+//!
+//! \param baseAddress is the base address of the EUSCI_B_SPI module.
+//!
+//! Modified bits are \b UCSWRST of \b UCAxCTLW0 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void EUSCI_B_SPI_disable(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Returns the address of the RX Buffer of the SPI for the DMA module.
+//!
+//! Returns the address of the SPI RX Buffer. This can be used in conjunction
+//! with the DMA to store the received data directly to memory.
+//!
+//! \param baseAddress is the base address of the EUSCI_B_SPI module.
+//!
+//! \return the address of the RX Buffer
+//
+//*****************************************************************************
+extern uint32_t EUSCI_B_SPI_getReceiveBufferAddress(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Returns the address of the TX Buffer of the SPI for the DMA module.
+//!
+//! Returns the address of the SPI TX Buffer. This can be used in conjunction
+//! with the DMA to obtain transmitted data directly from memory.
+//!
+//! \param baseAddress is the base address of the EUSCI_B_SPI module.
+//!
+//! \return the address of the TX Buffer
+//
+//*****************************************************************************
+extern uint32_t EUSCI_B_SPI_getTransmitBufferAddress(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Indicates whether or not the SPI bus is busy.
+//!
+//! This function returns an indication of whether or not the SPI bus is
+//! busy.This function checks the status of the bus via UCBBUSY bit
+//!
+//! \param baseAddress is the base address of the EUSCI_B_SPI module.
+//!
+//! \return One of the following:
+//! - \b EUSCI_B_SPI_BUSY
+//! - \b EUSCI_B_SPI_NOT_BUSY
+//! \n indicating if the EUSCI_B_SPI is busy
+//
+//*****************************************************************************
+extern uint16_t EUSCI_B_SPI_isBusy(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+// Mark the end of the C bindings section for C++ compilers.
+//
+//*****************************************************************************
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+#endif // __MSP430WARE_EUSCI_B_SPI_H__
diff --git a/Apps/FlightSoftware/MotorControl/driverlib/framctl.c b/Apps/FlightSoftware/MotorControl/driverlib/framctl.c
new file mode 100644
index 000000000..cc4bc39b0
--- /dev/null
+++ b/Apps/FlightSoftware/MotorControl/driverlib/framctl.c
@@ -0,0 +1,158 @@
+/* --COPYRIGHT--,BSD
+ * Copyright (c) 2017, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * --/COPYRIGHT--*/
+//*****************************************************************************
+//
+// framctl.c - Driver for the framctl Module.
+//
+//*****************************************************************************
+
+//*****************************************************************************
+//
+//! \addtogroup framctl_api framctl
+//! @{
+//
+//*****************************************************************************
+
+#include "inc/hw_memmap.h"
+
+#ifdef __MSP430_HAS_FRAM__
+#include "framctl.h"
+
+#include
+
+void FRAMCtl_write8(uint8_t *dataPtr,
+ uint8_t *framPtr,
+ uint16_t numberOfBytes
+ )
+{
+ while (numberOfBytes > 0)
+ {
+ //Write to Fram
+ *framPtr++ = *dataPtr++;
+ numberOfBytes--;
+ }
+}
+
+void FRAMCtl_write16(uint16_t *dataPtr,uint16_t *framPtr,
+ uint16_t numberOfWords)
+{
+ while (numberOfWords > 0)
+ {
+ //Write to Fram
+ *framPtr++ = *dataPtr++;
+ numberOfWords--;
+ }
+}
+
+void FRAMCtl_write32(uint32_t *dataPtr,uint32_t *framPtr,
+ uint16_t count)
+{
+ while (count > 0)
+ {
+ //Write to Fram
+ *framPtr++ = *dataPtr++;
+ count--;
+ }
+}
+
+void FRAMCtl_fillMemory32 (uint32_t value,
+ uint32_t *framPtr,
+ uint16_t count
+ )
+{
+ while (count> 0)
+ {
+ //Write to Fram
+ *framPtr++ = value;
+ count--;
+ }
+}
+
+void FRAMCtl_enableInterrupt (uint8_t interruptMask)
+{
+ uint8_t waitSelection;
+
+ waitSelection=(HWREG8(FRAM_BASE + OFS_FRCTL0) & 0xFF);
+ // Clear lock in FRAM control registers
+ HWREG16(FRAM_BASE + OFS_FRCTL0) = FWPW | waitSelection;
+
+ // Enable user selected interrupt sources
+ HWREG16(FRAM_BASE + OFS_GCCTL0) |= interruptMask;
+}
+
+uint8_t FRAMCtl_getInterruptStatus(uint16_t interruptFlagMask)
+{
+ return ( HWREG16(FRAM_BASE + OFS_GCCTL1) & interruptFlagMask );
+}
+
+void FRAMCtl_disableInterrupt(uint16_t interruptMask)
+{
+ uint8_t waitSelection;
+
+ waitSelection=(HWREG8(FRAM_BASE + OFS_FRCTL0) & 0xFF);
+ //Clear lock in FRAM control registers
+ HWREG16(FRAM_BASE + OFS_FRCTL0) = FWPW | waitSelection;
+
+ HWREG16(FRAM_BASE + OFS_GCCTL0) &= ~(interruptMask);
+}
+
+void FRAMCtl_configureWaitStateControl(uint8_t waitState )
+{
+ uint8_t tempVariable = HWREG8(FRAM_BASE + OFS_FRCTL0_L);
+ tempVariable &= ~NWAITS_7;
+ tempVariable |= waitState;
+ HWREG16(FRAM_BASE + OFS_FRCTL0) = ( FWPW | tempVariable );
+}
+
+void FRAMCtl_delayPowerUpFromLPM(uint8_t delayStatus)
+{
+#ifdef FRLPMPWR
+ uint8_t waitSelection;
+
+ waitSelection = (HWREG8(FRAM_BASE + OFS_FRCTL0) & 0xFF);
+
+ // Clear lock in FRAM control registers
+ HWREG16(FRAM_BASE + OFS_FRCTL0) = FWPW | waitSelection;
+
+ HWREG8(FRAM_BASE + OFS_GCCTL0_L) &= ~FRLPMPWR;
+ HWREG8(FRAM_BASE + OFS_GCCTL0_L) |= delayStatus;
+#endif
+}
+
+
+#endif
+//*****************************************************************************
+//
+//! Close the doxygen group for framctl_api
+//! @}
+//
+//*****************************************************************************
diff --git a/Apps/FlightSoftware/MotorControl/driverlib/framctl.h b/Apps/FlightSoftware/MotorControl/driverlib/framctl.h
new file mode 100644
index 000000000..f0810184f
--- /dev/null
+++ b/Apps/FlightSoftware/MotorControl/driverlib/framctl.h
@@ -0,0 +1,303 @@
+/* --COPYRIGHT--,BSD
+ * Copyright (c) 2017, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * --/COPYRIGHT--*/
+//*****************************************************************************
+//
+// framctl.h - Driver for the FRAMCTL Module.
+//
+//*****************************************************************************
+
+#ifndef __MSP430WARE_FRAMCTL_H__
+#define __MSP430WARE_FRAMCTL_H__
+
+#include "inc/hw_memmap.h"
+
+#ifdef __MSP430_HAS_FRAM__
+
+//*****************************************************************************
+//
+// If building with a C++ compiler, make all of the definitions in this header
+// have a C binding.
+//
+//*****************************************************************************
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the interruptMask parameter
+// for functions: FRAMCtl_enableInterrupt(), and FRAMCtl_disableInterrupt().
+//
+//*****************************************************************************
+#define FRAMCTL_PUC_ON_UNCORRECTABLE_BIT UBDRSTEN
+#define FRAMCTL_UNCORRECTABLE_BIT_INTERRUPT UBDIE
+#define FRAMCTL_CORRECTABLE_BIT_INTERRUPT CBDIE
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the interruptFlagMask
+// parameter for functions: FRAMCtl_getInterruptStatus() as well as returned by
+// the FRAMCtl_getInterruptStatus() function.
+//
+//*****************************************************************************
+#define FRAMCTL_ACCESS_TIME_ERROR_FLAG ACCTEIFG
+#define FRAMCTL_UNCORRECTABLE_BIT_FLAG UBDIFG
+#define FRAMCTL_CORRECTABLE_BIT_FLAG CBDIFG
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the waitState parameter for
+// functions: FRAMCtl_configureWaitStateControl().
+//
+//*****************************************************************************
+#define FRAMCTL_ACCESS_TIME_CYCLES_0 NWAITS_0
+#define FRAMCTL_ACCESS_TIME_CYCLES_1 NWAITS_1
+#define FRAMCTL_ACCESS_TIME_CYCLES_2 NWAITS_2
+#define FRAMCTL_ACCESS_TIME_CYCLES_3 NWAITS_3
+#define FRAMCTL_ACCESS_TIME_CYCLES_4 NWAITS_4
+#define FRAMCTL_ACCESS_TIME_CYCLES_5 NWAITS_5
+#define FRAMCTL_ACCESS_TIME_CYCLES_6 NWAITS_6
+#define FRAMCTL_ACCESS_TIME_CYCLES_7 NWAITS_7
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the delayStatus parameter for
+// functions: FRAMCtl_delayPowerUpFromLPM().
+//
+//*****************************************************************************
+#define FRAMCTL_DELAY_FROM_LPM_ENABLE 0x00
+#define FRAMCTL_DELAY_FROM_LPM_DISABLE 0x02
+
+//*****************************************************************************
+//
+// Prototypes for the APIs.
+//
+//*****************************************************************************
+
+//*****************************************************************************
+//
+//! \brief Write data into the fram memory in byte format.
+//!
+//! \param dataPtr is the pointer to the data to be written
+//! \param framPtr is the pointer into which to write the data
+//! \param numberOfBytes is the number of bytes to be written
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void FRAMCtl_write8(uint8_t *dataPtr,
+ uint8_t *framPtr,
+ uint16_t numberOfBytes);
+
+//*****************************************************************************
+//
+//! \brief Write data into the fram memory in word format.
+//!
+//! \param dataPtr is the pointer to the data to be written
+//! \param framPtr is the pointer into which to write the data
+//! \param numberOfWords is the number of words to be written
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void FRAMCtl_write16(uint16_t *dataPtr,
+ uint16_t *framPtr,
+ uint16_t numberOfWords);
+
+//*****************************************************************************
+//
+//! \brief Write data into the fram memory in long format, pass by reference
+//!
+//! \param dataPtr is the pointer to the data to be written
+//! \param framPtr is the pointer into which to write the data
+//! \param count is the number of 32 bit words to be written
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void FRAMCtl_write32(uint32_t *dataPtr,
+ uint32_t *framPtr,
+ uint16_t count);
+
+//*****************************************************************************
+//
+//! \brief Write data into the fram memory in long format, pass by value
+//!
+//! \param value is the value to written to FRAMCTL memory
+//! \param framPtr is the pointer into which to write the data
+//! \param count is the number of 32 bit addresses to fill
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void FRAMCtl_fillMemory32(uint32_t value,
+ uint32_t *framPtr,
+ uint16_t count);
+
+//*****************************************************************************
+//
+//! \brief Enables selected FRAMCtl interrupt sources.
+//!
+//! Enables the indicated FRAMCtl interrupt sources. Only the sources that are
+//! enabled can be reflected to the processor interrupt; disabled sources have
+//! no effect on the processor. Does not clear interrupt flags.
+//!
+//! \param interruptMask is the bit mask of the memory buffer interrupt sources
+//! to be disabled.
+//! Mask value is the logical OR of any of the following:
+//! - \b FRAMCTL_PUC_ON_UNCORRECTABLE_BIT - Enable PUC reset if FRAMCtl
+//! uncorrectable bit error detected.
+//! - \b FRAMCTL_UNCORRECTABLE_BIT_INTERRUPT - Interrupts when an
+//! uncorrectable bit error is detected.
+//! - \b FRAMCTL_CORRECTABLE_BIT_INTERRUPT - Interrupts when a
+//! correctable bit error is detected.
+//!
+//! Modified bits of \b GCCTL0 register and bits of \b FRCTL0 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void FRAMCtl_enableInterrupt(uint8_t interruptMask);
+
+//*****************************************************************************
+//
+//! \brief Returns the status of the selected FRAMCtl interrupt flags.
+//!
+//! \param interruptFlagMask is a bit mask of the interrupt flags status to be
+//! returned.
+//! Mask value is the logical OR of any of the following:
+//! - \b FRAMCTL_ACCESS_TIME_ERROR_FLAG - Interrupt flag is set if a
+//! wrong setting for NPRECHG and NACCESS is set and FRAMCtl access
+//! time is not hold.
+//! - \b FRAMCTL_UNCORRECTABLE_BIT_FLAG - Interrupt flag is set if an
+//! uncorrectable bit error has been detected in the FRAMCtl memory
+//! error detection logic.
+//! - \b FRAMCTL_CORRECTABLE_BIT_FLAG - Interrupt flag is set if a
+//! correctable bit error has been detected and corrected in the
+//! FRAMCtl memory error detection logic.
+//!
+//! \return Logical OR of any of the following:
+//! - \b FRAMCTL_ACCESS_TIME_ERROR_FLAG Interrupt flag is set if a
+//! wrong setting for NPRECHG and NACCESS is set and FRAMCtl access
+//! time is not hold.
+//! - \b FRAMCTL_UNCORRECTABLE_BIT_FLAG Interrupt flag is set if an
+//! uncorrectable bit error has been detected in the FRAMCtl memory
+//! error detection logic.
+//! - \b FRAMCTL_CORRECTABLE_BIT_FLAG Interrupt flag is set if a
+//! correctable bit error has been detected and corrected in the
+//! FRAMCtl memory error detection logic.
+//! \n indicating the status of the masked flags
+//
+//*****************************************************************************
+extern uint8_t FRAMCtl_getInterruptStatus(uint16_t interruptFlagMask);
+
+//*****************************************************************************
+//
+//! \brief Disables selected FRAMCtl interrupt sources.
+//!
+//! Disables the indicated FRAMCtl interrupt sources. Only the sources that
+//! are enabled can be reflected to the processor interrupt; disabled sources
+//! have no effect on the processor.
+//!
+//! \param interruptMask is the bit mask of the memory buffer interrupt sources
+//! to be disabled.
+//! Mask value is the logical OR of any of the following:
+//! - \b FRAMCTL_PUC_ON_UNCORRECTABLE_BIT - Enable PUC reset if FRAMCtl
+//! uncorrectable bit error detected.
+//! - \b FRAMCTL_UNCORRECTABLE_BIT_INTERRUPT - Interrupts when an
+//! uncorrectable bit error is detected.
+//! - \b FRAMCTL_CORRECTABLE_BIT_INTERRUPT - Interrupts when a
+//! correctable bit error is detected.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void FRAMCtl_disableInterrupt(uint16_t interruptMask);
+
+//*****************************************************************************
+//
+//! \brief Configures the access time of the FRAMCtl module
+//!
+//! Configures the access time of the FRAMCtl module.
+//!
+//! \param waitState defines the number of CPU cycles required for access time
+//! defined in the datasheet
+//! Valid values are:
+//! - \b FRAMCTL_ACCESS_TIME_CYCLES_0
+//! - \b FRAMCTL_ACCESS_TIME_CYCLES_1
+//! - \b FRAMCTL_ACCESS_TIME_CYCLES_2
+//! - \b FRAMCTL_ACCESS_TIME_CYCLES_3
+//! - \b FRAMCTL_ACCESS_TIME_CYCLES_4
+//! - \b FRAMCTL_ACCESS_TIME_CYCLES_5
+//! - \b FRAMCTL_ACCESS_TIME_CYCLES_6
+//! - \b FRAMCTL_ACCESS_TIME_CYCLES_7
+//!
+//! Modified bits are \b NWAITS of \b GCCTL0 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void FRAMCtl_configureWaitStateControl(uint8_t waitState);
+
+//*****************************************************************************
+//
+//! \brief Configures when the FRAMCtl module will power up after LPM exit
+//!
+//! Configures when the FRAMCtl module will power up after LPM exit. The module
+//! can either wait until the first FRAMCtl access to power up or power up
+//! immediately after leaving LPM. If FRAMCtl power is disabled, a memory
+//! access will automatically insert wait states to ensure sufficient timing
+//! for the FRAMCtl power-up and access.
+//!
+//! \param delayStatus chooses if FRAMCTL should power up instantly with LPM
+//! exit or to wait until first FRAMCTL access after LPM exit
+//! Valid values are:
+//! - \b FRAMCTL_DELAY_FROM_LPM_ENABLE
+//! - \b FRAMCTL_DELAY_FROM_LPM_DISABLE
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void FRAMCtl_delayPowerUpFromLPM(uint8_t delayStatus);
+
+//*****************************************************************************
+//
+// Mark the end of the C bindings section for C++ compilers.
+//
+//*****************************************************************************
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+#endif // __MSP430WARE_FRAMCTL_H__
diff --git a/Apps/FlightSoftware/MotorControl/driverlib/framctl_a.c b/Apps/FlightSoftware/MotorControl/driverlib/framctl_a.c
new file mode 100644
index 000000000..392825ddf
--- /dev/null
+++ b/Apps/FlightSoftware/MotorControl/driverlib/framctl_a.c
@@ -0,0 +1,176 @@
+/* --COPYRIGHT--,BSD
+ * Copyright (c) 2017, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * --/COPYRIGHT--*/
+//*****************************************************************************
+//
+// framctl_a.c - Driver for the framctl_a Module.
+//
+//*****************************************************************************
+
+//*****************************************************************************
+//
+//! \addtogroup framctl_a_api framctl_a
+//! @{
+//
+//*****************************************************************************
+
+#include "inc/hw_memmap.h"
+
+#ifdef __MSP430_HAS_FRCTL_A__
+#include "framctl_a.h"
+
+#include
+
+void FRAMCtl_A_write8(uint8_t *dataPtr,
+ uint8_t *framPtr,
+ uint16_t numberOfBytes
+ )
+{
+ while (numberOfBytes > 0)
+ {
+ //Write to Fram
+ *framPtr++ = *dataPtr++;
+ numberOfBytes--;
+ }
+}
+
+void FRAMCtl_A_write16(uint16_t *dataPtr,uint16_t *framPtr,
+ uint16_t numberOfWords)
+{
+ while (numberOfWords > 0)
+ {
+ //Write to Fram
+ *framPtr++ = *dataPtr++;
+ numberOfWords--;
+ }
+}
+
+void FRAMCtl_A_write32(uint32_t *dataPtr,uint32_t *framPtr,
+ uint16_t count)
+{
+ while (count > 0)
+ {
+ //Write to Fram
+ *framPtr++ = *dataPtr++;
+ count--;
+ }
+}
+
+void FRAMCtl_A_fillMemory32 (uint32_t value,
+ uint32_t *framPtr,
+ uint16_t count
+ )
+{
+ while (count> 0)
+ {
+ //Write to Fram
+ *framPtr++ = value;
+ count--;
+ }
+}
+
+void FRAMCtl_A_enableInterrupt (uint8_t interruptMask)
+{
+ uint8_t temp = HWREG8(FRCTL_A_BASE + OFS_FRCTL0_L);
+
+ // Clear lock in FRAM control registers
+ HWREG16(FRCTL_A_BASE + OFS_FRCTL0) = FRCTLPW | temp;
+
+ // Enable user selected interrupt sources
+ HWREG16(FRCTL_A_BASE + OFS_GCCTL0) |= interruptMask;
+}
+
+uint8_t FRAMCtl_A_getInterruptStatus(uint16_t interruptFlagMask)
+{
+ return ( HWREG16(FRCTL_A_BASE + OFS_GCCTL1) & interruptFlagMask );
+}
+
+void FRAMCtl_A_disableInterrupt(uint16_t interruptMask)
+{
+ uint8_t temp = HWREG8(FRCTL_A_BASE + OFS_FRCTL0_L);
+
+ //Clear lock in FRAM control registers
+ HWREG16(FRCTL_A_BASE + OFS_FRCTL0) = FRCTLPW | temp;
+
+ HWREG16(FRCTL_A_BASE + OFS_GCCTL0) &= ~(interruptMask);
+}
+
+void FRAMCtl_A_clearInterrupt(uint16_t interruptFlagMask)
+{
+ uint8_t temp = HWREG8(FRCTL_A_BASE + OFS_FRCTL0_L);
+
+ //Clear lock in FRAM control registers
+ HWREG16(FRCTL_A_BASE + OFS_FRCTL0) = FRCTLPW | temp;
+
+ HWREG16(FRCTL_A_BASE + OFS_GCCTL1) &= ~interruptFlagMask;
+}
+
+void FRAMCtl_A_configureWaitStateControl(uint8_t waitState )
+{
+ uint8_t temp = HWREG8(FRCTL_A_BASE + OFS_FRCTL0_L);
+
+ temp &= ~NWAITS_15;
+ temp |= waitState;
+ HWREG16(FRCTL_A_BASE + OFS_FRCTL0) = FRCTLPW | temp;
+}
+
+void FRAMCtl_A_delayPowerUpFromLPM(uint8_t delayStatus)
+{
+ uint8_t temp = HWREG8(FRCTL_A_BASE + OFS_FRCTL0_L);
+
+ // Clear lock in FRAM control registers
+ HWREG16(FRCTL_A_BASE + OFS_FRCTL0) = FRCTLPW | temp;
+
+ HWREG8(FRCTL_A_BASE + OFS_GCCTL0_L) &= ~FRPWR;
+ HWREG8(FRCTL_A_BASE + OFS_GCCTL0_L) |= delayStatus;
+}
+
+void FRAMCtl_A_enableWriteProtection(void)
+{
+ uint8_t temp = HWREG8(FRCTL_A_BASE + OFS_FRCTL0_L);
+ temp |= WPROT;
+ HWREG16(FRCTL_A_BASE + OFS_FRCTL0) = FRCTLPW | temp;
+}
+
+void FRAMCtl_A_disableWriteProtection(void)
+{
+ uint8_t temp = HWREG8(FRCTL_A_BASE + OFS_FRCTL0_L);
+ temp &= ~WPROT;
+ HWREG16(FRCTL_A_BASE + OFS_FRCTL0) = FRCTLPW | temp;
+}
+
+#endif
+//*****************************************************************************
+//
+//! Close the doxygen group for framctl_a_api
+//! @}
+//
+//*****************************************************************************
diff --git a/Apps/FlightSoftware/MotorControl/driverlib/framctl_a.h b/Apps/FlightSoftware/MotorControl/driverlib/framctl_a.h
new file mode 100644
index 000000000..945e0498d
--- /dev/null
+++ b/Apps/FlightSoftware/MotorControl/driverlib/framctl_a.h
@@ -0,0 +1,396 @@
+/* --COPYRIGHT--,BSD
+ * Copyright (c) 2017, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * --/COPYRIGHT--*/
+//*****************************************************************************
+//
+// framctl_a.h - Driver for the FRAMCTL_A Module.
+//
+//*****************************************************************************
+
+#ifndef __MSP430WARE_FRAMCTL_A_H__
+#define __MSP430WARE_FRAMCTL_A_H__
+
+#include "inc/hw_memmap.h"
+
+#ifdef __MSP430_HAS_FRCTL_A__
+
+//*****************************************************************************
+//
+// If building with a C++ compiler, make all of the definitions in this header
+// have a C binding.
+//
+//*****************************************************************************
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the interruptMask parameter
+// for functions: FRAMCtl_A_enableInterrupt(), and
+// FRAMCtl_A_disableInterrupt().
+//
+//*****************************************************************************
+#define FRAMCTL_A_PUC_ON_UNCORRECTABLE_BIT UBDRSTEN
+#define FRAMCTL_A_UNCORRECTABLE_BIT_INTERRUPT UBDIE
+#define FRAMCTL_A_CORRECTABLE_BIT_INTERRUPT CBDIE
+#define FRAMCTL_A_ACCESS_TIME_ERROR_INTERRUPT ACCTEIE
+#define FRAMCTL_A_WRITE_PROTECTION_INTERRUPT WPIE
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the interruptFlagMask
+// parameter for functions: FRAMCtl_A_getInterruptStatus(), and
+// FRAMCtl_A_clearInterrupt() as well as returned by the
+// FRAMCtl_A_getInterruptStatus() function.
+//
+//*****************************************************************************
+#define FRAMCTL_A_ACCESS_TIME_ERROR_FLAG ACCTEIFG
+#define FRAMCTL_A_UNCORRECTABLE_BIT_FLAG UBDIFG
+#define FRAMCTL_A_CORRECTABLE_BIT_FLAG CBDIFG
+#define FRAMCTL_A_WRITE_PROTECTION_FLAG WPIFG
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the waitState parameter for
+// functions: FRAMCtl_A_configureWaitStateControl().
+//
+//*****************************************************************************
+#define FRAMCTL_A_ACCESS_TIME_CYCLES_0 NWAITS_0
+#define FRAMCTL_A_ACCESS_TIME_CYCLES_1 NWAITS_1
+#define FRAMCTL_A_ACCESS_TIME_CYCLES_2 NWAITS_2
+#define FRAMCTL_A_ACCESS_TIME_CYCLES_3 NWAITS_3
+#define FRAMCTL_A_ACCESS_TIME_CYCLES_4 NWAITS_4
+#define FRAMCTL_A_ACCESS_TIME_CYCLES_5 NWAITS_5
+#define FRAMCTL_A_ACCESS_TIME_CYCLES_6 NWAITS_6
+#define FRAMCTL_A_ACCESS_TIME_CYCLES_7 NWAITS_7
+#define FRAMCTL_A_ACCESS_TIME_CYCLES_8 NWAITS_8
+#define FRAMCTL_A_ACCESS_TIME_CYCLES_9 NWAITS_9
+#define FRAMCTL_A_ACCESS_TIME_CYCLES_10 NWAITS_10
+#define FRAMCTL_A_ACCESS_TIME_CYCLES_11 NWAITS_11
+#define FRAMCTL_A_ACCESS_TIME_CYCLES_12 NWAITS_12
+#define FRAMCTL_A_ACCESS_TIME_CYCLES_13 NWAITS_13
+#define FRAMCTL_A_ACCESS_TIME_CYCLES_14 NWAITS_14
+#define FRAMCTL_A_ACCESS_TIME_CYCLES_15 NWAITS_15
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the delayStatus parameter for
+// functions: FRAMCtl_A_delayPowerUpFromLPM().
+//
+//*****************************************************************************
+#define FRAMCTL_A_DELAY_FROM_LPM_ENABLE 0x00
+#define FRAMCTL_A_DELAY_FROM_LPM_DISABLE FRPWR
+
+//*****************************************************************************
+//
+// Prototypes for the APIs.
+//
+//*****************************************************************************
+
+//*****************************************************************************
+//
+//! \brief Write data into the fram memory in byte format.
+//!
+//! \param dataPtr is the pointer to the data to be written
+//! \param framPtr is the pointer into which to write the data
+//! \param numberOfBytes is the number of bytes to be written
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void FRAMCtl_A_write8(uint8_t *dataPtr,
+ uint8_t *framPtr,
+ uint16_t numberOfBytes);
+
+//*****************************************************************************
+//
+//! \brief Write data into the fram memory in word format.
+//!
+//! \param dataPtr is the pointer to the data to be written
+//! \param framPtr is the pointer into which to write the data
+//! \param numberOfWords is the number of words to be written
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void FRAMCtl_A_write16(uint16_t *dataPtr,
+ uint16_t *framPtr,
+ uint16_t numberOfWords);
+
+//*****************************************************************************
+//
+//! \brief Write data into the fram memory in long format, pass by reference
+//!
+//! \param dataPtr is the pointer to the data to be written
+//! \param framPtr is the pointer into which to write the data
+//! \param count is the number of 32 bit words to be written
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void FRAMCtl_A_write32(uint32_t *dataPtr,
+ uint32_t *framPtr,
+ uint16_t count);
+
+//*****************************************************************************
+//
+//! \brief Write data into the fram memory in long format, pass by value
+//!
+//! \param value is the value to written to FRAMCTL_A memory
+//! \param framPtr is the pointer into which to write the data
+//! \param count is the number of 32 bit addresses to fill
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void FRAMCtl_A_fillMemory32(uint32_t value,
+ uint32_t *framPtr,
+ uint16_t count);
+
+//*****************************************************************************
+//
+//! \brief Enables selected FRAMCtl_A interrupt sources.
+//!
+//! Enables the indicated FRAMCtl_A interrupt sources. Only the sources that
+//! are enabled can be reflected to the processor interrupt; disabled sources
+//! have no effect on the processor. Does not clear interrupt flags.
+//!
+//! \param interruptMask is the bit mask of the memory buffer interrupt sources
+//! to be disabled.
+//! Mask value is the logical OR of any of the following:
+//! - \b FRAMCTL_A_PUC_ON_UNCORRECTABLE_BIT - Enable PUC reset if
+//! FRAMCtl_A uncorrectable bit error detected.
+//! - \b FRAMCTL_A_UNCORRECTABLE_BIT_INTERRUPT - Interrupts when an
+//! uncorrectable bit error is detected.
+//! - \b FRAMCTL_A_CORRECTABLE_BIT_INTERRUPT - Interrupts when a
+//! correctable bit error is detected.
+//! - \b FRAMCTL_A_ACCESS_TIME_ERROR_INTERRUPT - Interrupts when an
+//! access time error occurs.
+//! - \b FRAMCTL_A_WRITE_PROTECTION_INTERRUPT - Interrupts when
+//! detecting a write access to FRAM.
+//!
+//! Modified bits of \b GCCTL0 register and bits of \b FRCTL0 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void FRAMCtl_A_enableInterrupt(uint8_t interruptMask);
+
+//*****************************************************************************
+//
+//! \brief Returns the status of the selected FRAMCtl_A interrupt flags.
+//!
+//! \param interruptFlagMask is a bit mask of the interrupt flags status to be
+//! returned.
+//! Mask value is the logical OR of any of the following:
+//! - \b FRAMCTL_A_ACCESS_TIME_ERROR_FLAG - Interrupt flag is set if a
+//! wrong setting for NPRECHG and NACCESS is set and FRAMCtl_A access
+//! time is not hold.
+//! - \b FRAMCTL_A_UNCORRECTABLE_BIT_FLAG - Interrupt flag is set if an
+//! uncorrectable bit error has been detected in the FRAMCtl_A memory
+//! error detection logic.
+//! - \b FRAMCTL_A_CORRECTABLE_BIT_FLAG - Interrupt flag is set if a
+//! correctable bit error has been detected and corrected in the
+//! FRAMCtl_A memory error detection logic.
+//! - \b FRAMCTL_A_WRITE_PROTECTION_FLAG - Interrupt flag is set if a
+//! write access to FRAM memory
+//!
+//! \return Logical OR of any of the following:
+//! - \b FRAMCTL_A_ACCESS_TIME_ERROR_FLAG Interrupt flag is set if a
+//! wrong setting for NPRECHG and NACCESS is set and FRAMCtl_A access
+//! time is not hold.
+//! - \b FRAMCTL_A_UNCORRECTABLE_BIT_FLAG Interrupt flag is set if an
+//! uncorrectable bit error has been detected in the FRAMCtl_A memory
+//! error detection logic.
+//! - \b FRAMCTL_A_CORRECTABLE_BIT_FLAG Interrupt flag is set if a
+//! correctable bit error has been detected and corrected in the
+//! FRAMCtl_A memory error detection logic.
+//! - \b FRAMCTL_A_WRITE_PROTECTION_FLAG Interrupt flag is set if a
+//! write access to FRAM memory
+//! \n indicating the status of the masked flags
+//
+//*****************************************************************************
+extern uint8_t FRAMCtl_A_getInterruptStatus(uint16_t interruptFlagMask);
+
+//*****************************************************************************
+//
+//! \brief Disables selected FRAMCtl_A interrupt sources.
+//!
+//! Disables the indicated FRAMCtl_A interrupt sources. Only the sources that
+//! are enabled can be reflected to the processor interrupt; disabled sources
+//! have no effect on the processor.
+//!
+//! \param interruptMask is the bit mask of the memory buffer interrupt sources
+//! to be disabled.
+//! Mask value is the logical OR of any of the following:
+//! - \b FRAMCTL_A_PUC_ON_UNCORRECTABLE_BIT - Enable PUC reset if
+//! FRAMCtl_A uncorrectable bit error detected.
+//! - \b FRAMCTL_A_UNCORRECTABLE_BIT_INTERRUPT - Interrupts when an
+//! uncorrectable bit error is detected.
+//! - \b FRAMCTL_A_CORRECTABLE_BIT_INTERRUPT - Interrupts when a
+//! correctable bit error is detected.
+//! - \b FRAMCTL_A_ACCESS_TIME_ERROR_INTERRUPT - Interrupts when an
+//! access time error occurs.
+//! - \b FRAMCTL_A_WRITE_PROTECTION_INTERRUPT - Interrupts when
+//! detecting a write access to FRAM.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void FRAMCtl_A_disableInterrupt(uint16_t interruptMask);
+
+//*****************************************************************************
+//
+//! \brief Clears selected FRAMCtl_A interrupt status flag.
+//!
+//! Clears the indicated FRAMCtl_A interrupt status flag. These interrupt
+//! status flag can also be cleared through reading the system reset vector
+//! word SYSRSTIV.
+//!
+//! \param interruptFlagMask is a bit mask of the interrupt flags status to be
+//! cleared.
+//! Mask value is the logical OR of any of the following:
+//! - \b FRAMCTL_A_ACCESS_TIME_ERROR_FLAG - Interrupt flag is set if a
+//! wrong setting for NPRECHG and NACCESS is set and FRAMCtl_A access
+//! time is not hold.
+//! - \b FRAMCTL_A_UNCORRECTABLE_BIT_FLAG - Interrupt flag is set if an
+//! uncorrectable bit error has been detected in the FRAMCtl_A memory
+//! error detection logic.
+//! - \b FRAMCTL_A_CORRECTABLE_BIT_FLAG - Interrupt flag is set if a
+//! correctable bit error has been detected and corrected in the
+//! FRAMCtl_A memory error detection logic.
+//! - \b FRAMCTL_A_WRITE_PROTECTION_FLAG - Interrupt flag is set if a
+//! write access to FRAM memory
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void FRAMCtl_A_clearInterrupt(uint16_t interruptFlagMask);
+
+//*****************************************************************************
+//
+//! \brief Configures the access time of the FRAMCtl_A module
+//!
+//! Configures the access time of the FRAMCtl_A module.
+//!
+//! \param waitState defines the number of CPU cycles required for access time
+//! defined in the datasheet
+//! Valid values are:
+//! - \b FRAMCTL_A_ACCESS_TIME_CYCLES_0
+//! - \b FRAMCTL_A_ACCESS_TIME_CYCLES_1
+//! - \b FRAMCTL_A_ACCESS_TIME_CYCLES_2
+//! - \b FRAMCTL_A_ACCESS_TIME_CYCLES_3
+//! - \b FRAMCTL_A_ACCESS_TIME_CYCLES_4
+//! - \b FRAMCTL_A_ACCESS_TIME_CYCLES_5
+//! - \b FRAMCTL_A_ACCESS_TIME_CYCLES_6
+//! - \b FRAMCTL_A_ACCESS_TIME_CYCLES_7
+//! - \b FRAMCTL_A_ACCESS_TIME_CYCLES_8
+//! - \b FRAMCTL_A_ACCESS_TIME_CYCLES_9
+//! - \b FRAMCTL_A_ACCESS_TIME_CYCLES_10
+//! - \b FRAMCTL_A_ACCESS_TIME_CYCLES_11
+//! - \b FRAMCTL_A_ACCESS_TIME_CYCLES_12
+//! - \b FRAMCTL_A_ACCESS_TIME_CYCLES_13
+//! - \b FRAMCTL_A_ACCESS_TIME_CYCLES_14
+//! - \b FRAMCTL_A_ACCESS_TIME_CYCLES_15
+//!
+//! Modified bits are \b NWAITS of \b GCCTL0 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void FRAMCtl_A_configureWaitStateControl(uint8_t waitState);
+
+//*****************************************************************************
+//
+//! \brief Configures when the FRAMCtl_A module will power up after LPM exit
+//!
+//! Configures when the FRAMCtl_A module will power up after LPM exit. The
+//! module can either wait until the first FRAM access to power up or power up
+//! immediately after leaving LPM. If FRAM power is disabled, the FRAM memory
+//! remains in inactive mode until the FRAM memory is actually accessed. If
+//! FRAM power is enabled, the FRAM wil be immediately powered up (active
+//! mode).
+//!
+//! \param delayStatus chooses if FRAMCTL_A should power up instantly with LPM
+//! exit or to wait until first FRAMCTL_A access after LPM exit
+//! Valid values are:
+//! - \b FRAMCTL_A_DELAY_FROM_LPM_ENABLE
+//! - \b FRAMCTL_A_DELAY_FROM_LPM_DISABLE
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void FRAMCtl_A_delayPowerUpFromLPM(uint8_t delayStatus);
+
+//*****************************************************************************
+//
+//! \brief Enables FRAM write protection
+//!
+//! This function enables FRAM write protection and protect entire FRAM memory
+//! from unintended write. It should be used as temporary protection. The
+//! permanent FRAM memory protection should be done via MPU segments related
+//! APIs.
+//!
+//!
+//! Modified bits are \b WPROT of \b FRCTL0 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void FRAMCtl_A_enableWriteProtection(void);
+
+//*****************************************************************************
+//
+//! \brief Disables FRAM write protection
+//!
+//! Disables the FRAM write protection. Writing to FRAM memory is allowed.
+//!
+//!
+//! Modified bits are \b WPROT of \b FRCTL0 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void FRAMCtl_A_disableWriteProtection(void);
+
+//*****************************************************************************
+//
+// Mark the end of the C bindings section for C++ compilers.
+//
+//*****************************************************************************
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+#endif // __MSP430WARE_FRAMCTL_A_H__
diff --git a/Apps/FlightSoftware/MotorControl/driverlib/gpio.c b/Apps/FlightSoftware/MotorControl/driverlib/gpio.c
new file mode 100644
index 000000000..6f1ba5bd8
--- /dev/null
+++ b/Apps/FlightSoftware/MotorControl/driverlib/gpio.c
@@ -0,0 +1,489 @@
+/* --COPYRIGHT--,BSD
+ * Copyright (c) 2017, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * --/COPYRIGHT--*/
+//*****************************************************************************
+//
+// gpio.c - Driver for the gpio Module.
+//
+//*****************************************************************************
+
+//*****************************************************************************
+//
+//! \addtogroup gpio_api gpio
+//! @{
+//
+//*****************************************************************************
+
+#include "inc/hw_memmap.h"
+
+#if defined(__MSP430_HAS_PORT1_R__) || defined(__MSP430_HAS_PORT2_R__) ||\
+ defined(__MSP430_HAS_PORTA_R__)
+#include "gpio.h"
+
+#include
+
+static const uint16_t GPIO_PORT_TO_BASE[] = {
+ 0x00,
+#if defined(__MSP430_HAS_PORT1_R__)
+ __MSP430_BASEADDRESS_PORT1_R__,
+#elif defined(__MSP430_HAS_PORT1__)
+ __MSP430_BASEADDRESS_PORT1__,
+#else
+ 0xFFFF,
+#endif
+#if defined(__MSP430_HAS_PORT2_R__)
+ __MSP430_BASEADDRESS_PORT2_R__,
+#elif defined(__MSP430_HAS_PORT2__)
+ __MSP430_BASEADDRESS_PORT2__,
+#else
+ 0xFFFF,
+#endif
+#if defined(__MSP430_HAS_PORT3_R__)
+ __MSP430_BASEADDRESS_PORT3_R__,
+#elif defined(__MSP430_HAS_PORT3__)
+ __MSP430_BASEADDRESS_PORT3__,
+#else
+ 0xFFFF,
+#endif
+#if defined(__MSP430_HAS_PORT4_R__)
+ __MSP430_BASEADDRESS_PORT4_R__,
+#elif defined(__MSP430_HAS_PORT4__)
+ __MSP430_BASEADDRESS_PORT4__,
+#else
+ 0xFFFF,
+#endif
+#if defined(__MSP430_HAS_PORT5_R__)
+ __MSP430_BASEADDRESS_PORT5_R__,
+#elif defined(__MSP430_HAS_PORT5__)
+ __MSP430_BASEADDRESS_PORT5__,
+#else
+ 0xFFFF,
+#endif
+#if defined(__MSP430_HAS_PORT6_R__)
+ __MSP430_BASEADDRESS_PORT6_R__,
+#elif defined(__MSP430_HAS_PORT6__)
+ __MSP430_BASEADDRESS_PORT6__,
+#else
+ 0xFFFF,
+#endif
+#if defined(__MSP430_HAS_PORT7_R__)
+ __MSP430_BASEADDRESS_PORT7_R__,
+#elif defined(__MSP430_HAS_PORT7__)
+ __MSP430_BASEADDRESS_PORT7__,
+#else
+ 0xFFFF,
+#endif
+#if defined(__MSP430_HAS_PORT8_R__)
+ __MSP430_BASEADDRESS_PORT8_R__,
+#elif defined(__MSP430_HAS_PORT8__)
+ __MSP430_BASEADDRESS_PORT8__,
+#else
+ 0xFFFF,
+#endif
+#if defined(__MSP430_HAS_PORT9_R__)
+ __MSP430_BASEADDRESS_PORT9_R__,
+#elif defined(__MSP430_HAS_PORT9__)
+ __MSP430_BASEADDRESS_PORT9__,
+#else
+ 0xFFFF,
+#endif
+#if defined(__MSP430_HAS_PORT10_R__)
+ __MSP430_BASEADDRESS_PORT10_R__,
+#elif defined(__MSP430_HAS_PORT10__)
+ __MSP430_BASEADDRESS_PORT10__,
+#else
+ 0xFFFF,
+#endif
+#if defined(__MSP430_HAS_PORT11_R__)
+ __MSP430_BASEADDRESS_PORT11_R__,
+#elif defined(__MSP430_HAS_PORT11__)
+ __MSP430_BASEADDRESS_PORT11__,
+#else
+ 0xFFFF,
+#endif
+ 0xFFFF,
+#if defined(__MSP430_HAS_PORTJ_R__)
+ __MSP430_BASEADDRESS_PORTJ_R__
+#elif defined(__MSP430_HAS_PORTJ__)
+ __MSP430_BASEADDRESS_PORTJ__
+#else
+ 0xFFFF
+#endif
+};
+
+void GPIO_setAsOutputPin(uint8_t selectedPort, uint16_t selectedPins) {
+
+ uint16_t baseAddress = GPIO_PORT_TO_BASE[selectedPort];
+
+ #ifndef NDEBUG
+ if(baseAddress == 0xFFFF) {
+ return;
+ }
+ #endif
+
+ // Shift by 8 if port is even (upper 8-bits)
+ if((selectedPort & 1) ^ 1) {
+ selectedPins <<= 8;
+ }
+
+ HWREG16(baseAddress + OFS_PASEL0) &= ~selectedPins;
+ HWREG16(baseAddress + OFS_PASEL1) &= ~selectedPins;
+ HWREG16(baseAddress + OFS_PADIR) |= selectedPins;
+
+ return;
+}
+
+void GPIO_setAsInputPin(uint8_t selectedPort, uint16_t selectedPins) {
+
+ uint16_t baseAddress = GPIO_PORT_TO_BASE[selectedPort];
+
+ #ifndef NDEBUG
+ if(baseAddress == 0xFFFF) {
+ return;
+ }
+ #endif
+
+ // Shift by 8 if port is even (upper 8-bits)
+ if((selectedPort & 1) ^ 1) {
+ selectedPins <<= 8;
+ }
+
+ HWREG16(baseAddress + OFS_PASEL0) &= ~selectedPins;
+ HWREG16(baseAddress + OFS_PASEL1) &= ~selectedPins;
+ HWREG16(baseAddress + OFS_PADIR) &= ~selectedPins;
+ HWREG16(baseAddress + OFS_PAREN) &= ~selectedPins;
+}
+
+void GPIO_setAsPeripheralModuleFunctionOutputPin(uint8_t selectedPort,
+ uint16_t selectedPins
+ ,uint8_t mode) {
+
+ uint16_t baseAddress = GPIO_PORT_TO_BASE[selectedPort];
+
+ #ifndef NDEBUG
+ if(baseAddress == 0xFFFF) {
+ return;
+ }
+ #endif
+
+ // Shift by 8 if port is even (upper 8-bits)
+ if((selectedPort & 1) ^ 1) {
+ selectedPins <<= 8;
+ }
+
+ HWREG16(baseAddress + OFS_PADIR) |= selectedPins;
+ switch (mode){
+ case GPIO_PRIMARY_MODULE_FUNCTION:
+ HWREG16(baseAddress + OFS_PASEL0) |= selectedPins;
+ HWREG16(baseAddress + OFS_PASEL1) &= ~selectedPins;
+ break;
+ case GPIO_SECONDARY_MODULE_FUNCTION:
+ HWREG16(baseAddress + OFS_PASEL0) &= ~selectedPins;
+ HWREG16(baseAddress + OFS_PASEL1) |= selectedPins;
+ break;
+ case GPIO_TERNARY_MODULE_FUNCTION:
+ HWREG16(baseAddress + OFS_PASEL0) |= selectedPins;
+ HWREG16(baseAddress + OFS_PASEL1) |= selectedPins;
+ break;
+ }
+}
+
+void GPIO_setAsPeripheralModuleFunctionInputPin(uint8_t selectedPort,
+ uint16_t selectedPins
+ ,uint8_t mode) {
+ uint16_t baseAddress = GPIO_PORT_TO_BASE[selectedPort];
+
+ #ifndef NDEBUG
+ if(baseAddress == 0xFFFF) {
+ return;
+ }
+ #endif
+
+ // Shift by 8 if port is even (upper 8-bits)
+ if((selectedPort & 1) ^ 1) {
+ selectedPins <<= 8;
+ }
+
+ HWREG16(baseAddress + OFS_PADIR) &= ~selectedPins;
+ switch (mode){
+ case GPIO_PRIMARY_MODULE_FUNCTION:
+ HWREG16(baseAddress + OFS_PASEL0) |= selectedPins;
+ HWREG16(baseAddress + OFS_PASEL1) &= ~selectedPins;
+ break;
+ case GPIO_SECONDARY_MODULE_FUNCTION:
+ HWREG16(baseAddress + OFS_PASEL0) &= ~selectedPins;
+ HWREG16(baseAddress + OFS_PASEL1) |= selectedPins;
+ break;
+ case GPIO_TERNARY_MODULE_FUNCTION:
+ HWREG16(baseAddress + OFS_PASEL0) |= selectedPins;
+ HWREG16(baseAddress + OFS_PASEL1) |= selectedPins;
+ break;
+ }
+}
+
+void GPIO_setOutputHighOnPin (uint8_t selectedPort,
+ uint16_t selectedPins) {
+
+ uint16_t baseAddress = GPIO_PORT_TO_BASE[selectedPort];
+
+ #ifndef NDEBUG
+ if(baseAddress == 0xFFFF) {
+ return;
+ }
+ #endif
+
+ // Shift by 8 if port is even (upper 8-bits)
+ if((selectedPort & 1) ^ 1) {
+ selectedPins <<= 8;
+ }
+
+ HWREG16(baseAddress + OFS_PAOUT) |= selectedPins;
+}
+
+void GPIO_setOutputLowOnPin (uint8_t selectedPort, uint16_t selectedPins) {
+
+ uint16_t baseAddress = GPIO_PORT_TO_BASE[selectedPort];
+
+ #ifndef NDEBUG
+ if(baseAddress == 0xFFFF) {
+ return;
+ }
+ #endif
+
+ // Shift by 8 if port is even (upper 8-bits)
+ if((selectedPort & 1) ^ 1) {
+ selectedPins <<= 8;
+ }
+
+ HWREG16(baseAddress + OFS_PAOUT) &= ~selectedPins;
+}
+
+void GPIO_toggleOutputOnPin (uint8_t selectedPort, uint16_t selectedPins) {
+
+ uint16_t baseAddress = GPIO_PORT_TO_BASE[selectedPort];
+
+ #ifndef NDEBUG
+ if(baseAddress == 0xFFFF) {
+ return;
+ }
+ #endif
+
+ // Shift by 8 if port is even (upper 8-bits)
+ if((selectedPort & 1) ^ 1) {
+ selectedPins <<= 8;
+ }
+
+ HWREG16(baseAddress + OFS_PAOUT) ^= selectedPins;
+}
+
+void GPIO_setAsInputPinWithPullDownResistor(uint8_t selectedPort,
+ uint16_t selectedPins) {
+
+ uint16_t baseAddress = GPIO_PORT_TO_BASE[selectedPort];
+
+ #ifndef NDEBUG
+ if(baseAddress == 0xFFFF) {
+ return;
+ }
+ #endif
+
+ // Shift by 8 if port is even (upper 8-bits)
+ if((selectedPort & 1) ^ 1) {
+ selectedPins <<= 8;
+ }
+
+ HWREG16(baseAddress + OFS_PASEL0) &= ~selectedPins;
+ HWREG16(baseAddress + OFS_PASEL1) &= ~selectedPins;
+
+ HWREG16(baseAddress + OFS_PADIR) &= ~selectedPins;
+ HWREG16(baseAddress + OFS_PAREN) |= selectedPins;
+ HWREG16(baseAddress + OFS_PAOUT) &= ~selectedPins;
+}
+
+void GPIO_setAsInputPinWithPullUpResistor(uint8_t selectedPort,
+ uint16_t selectedPins) {
+
+ uint16_t baseAddress = GPIO_PORT_TO_BASE[selectedPort];
+
+ #ifndef NDEBUG
+ if(baseAddress == 0xFFFF) {
+ return;
+ }
+ #endif
+
+ // Shift by 8 if port is even (upper 8-bits)
+ if((selectedPort & 1) ^ 1) {
+ selectedPins <<= 8;
+ }
+
+ HWREG16(baseAddress + OFS_PASEL0) &= ~selectedPins;
+ HWREG16(baseAddress + OFS_PASEL1) &= ~selectedPins;
+ HWREG16(baseAddress + OFS_PADIR) &= ~selectedPins;
+ HWREG16(baseAddress + OFS_PAREN) |= selectedPins;
+ HWREG16(baseAddress + OFS_PAOUT) |= selectedPins;
+}
+
+uint8_t GPIO_getInputPinValue(uint8_t selectedPort,
+ uint16_t selectedPins) {
+
+ uint16_t baseAddress = GPIO_PORT_TO_BASE[selectedPort];
+
+ #ifndef NDEBUG
+ if(baseAddress == 0xFFFF) {
+ return;
+ }
+ #endif
+
+ // Shift by 8 if port is even (upper 8-bits)
+ if((selectedPort & 1) ^ 1) {
+ selectedPins <<= 8;
+ }
+
+ uint16_t inputPinValue = HWREG16(baseAddress + OFS_PAIN) & (selectedPins);
+
+ if(inputPinValue > 0){
+ return (GPIO_INPUT_PIN_HIGH);
+ }
+ return (GPIO_INPUT_PIN_LOW);
+}
+
+void GPIO_enableInterrupt(uint8_t selectedPort, uint16_t selectedPins) {
+
+ uint16_t baseAddress = GPIO_PORT_TO_BASE[selectedPort];
+
+ #ifndef NDEBUG
+ if(baseAddress == 0xFFFF) {
+ return;
+ }
+ #endif
+
+ // Shift by 8 if port is even (upper 8-bits)
+ if((selectedPort & 1) ^ 1) {
+ selectedPins <<= 8;
+ }
+
+ HWREG16(baseAddress + OFS_PAIE) |= selectedPins;
+}
+
+void GPIO_disableInterrupt(uint8_t selectedPort, uint16_t selectedPins) {
+
+ uint16_t baseAddress = GPIO_PORT_TO_BASE[selectedPort];
+
+ #ifndef NDEBUG
+ if(baseAddress == 0xFFFF) {
+ return;
+ }
+ #endif
+
+ // Shift by 8 if port is even (upper 8-bits)
+ if((selectedPort & 1) ^ 1) {
+ selectedPins <<= 8;
+ }
+
+ HWREG16(baseAddress + OFS_PAIE) &= ~selectedPins;
+}
+
+uint16_t GPIO_getInterruptStatus(uint8_t selectedPort, uint16_t selectedPins) {
+
+ uint16_t baseAddress = GPIO_PORT_TO_BASE[selectedPort];
+
+ #ifndef NDEBUG
+ if(baseAddress == 0xFFFF) {
+ return;
+ }
+ #endif
+
+ // Shift by 8 if port is even (upper 8-bits)
+ if((selectedPort & 1) ^ 1) {
+ if((baseAddress & 0x1) ^ 0x1)
+ {
+ return (HWREG8(baseAddress + OFS_PAIFG_H) & selectedPins);
+ }
+ else
+ {
+ return (HWREG8(baseAddress + OFS_PAIFG) & selectedPins);
+ }
+ }
+ else {
+ return (HWREG16(baseAddress + OFS_PAIFG) & selectedPins);
+ }
+}
+
+void GPIO_clearInterrupt(uint8_t selectedPort, uint16_t selectedPins) {
+
+ uint16_t baseAddress = GPIO_PORT_TO_BASE[selectedPort];
+
+ #ifndef NDEBUG
+ if(baseAddress == 0xFFFF) {
+ return;
+ }
+ #endif
+
+ // Shift by 8 if port is even (upper 8-bits)
+ if((selectedPort & 1) ^ 1) {
+ selectedPins <<= 8;
+ }
+
+ HWREG16(baseAddress + OFS_PAIFG) &= ~selectedPins;
+}
+
+void GPIO_selectInterruptEdge(uint8_t selectedPort, uint16_t selectedPins,
+ uint8_t edgeSelect) {
+
+ uint16_t baseAddress = GPIO_PORT_TO_BASE[selectedPort];
+
+ #ifndef NDEBUG
+ if(baseAddress == 0xFFFF) {
+ return;
+ }
+ #endif
+
+ // Shift by 8 if port is even (upper 8-bits)
+ if((selectedPort & 1) ^ 1) {
+ selectedPins <<= 8;
+ }
+
+ if (GPIO_LOW_TO_HIGH_TRANSITION == edgeSelect){
+ HWREG16(baseAddress + OFS_PAIES) &= ~selectedPins;
+ }
+ else {
+ HWREG16(baseAddress + OFS_PAIES) |= selectedPins;
+ }
+}
+
+
+#endif
+//*****************************************************************************
+//
+//! Close the doxygen group for gpio_api
+//! @}
+//
+//*****************************************************************************
diff --git a/Apps/FlightSoftware/MotorControl/driverlib/gpio.h b/Apps/FlightSoftware/MotorControl/driverlib/gpio.h
new file mode 100644
index 000000000..537449458
--- /dev/null
+++ b/Apps/FlightSoftware/MotorControl/driverlib/gpio.h
@@ -0,0 +1,1051 @@
+/* --COPYRIGHT--,BSD
+ * Copyright (c) 2017, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * --/COPYRIGHT--*/
+//*****************************************************************************
+//
+// gpio.h - Driver for the GPIO Module.
+//
+//*****************************************************************************
+
+#ifndef __MSP430WARE_GPIO_H__
+#define __MSP430WARE_GPIO_H__
+
+#include "inc/hw_memmap.h"
+
+#if defined(__MSP430_HAS_PORT1_R__) || defined(__MSP430_HAS_PORT2_R__) ||\
+ defined(__MSP430_HAS_PORTA_R__)
+
+//*****************************************************************************
+//
+// If building with a C++ compiler, make all of the definitions in this header
+// have a C binding.
+//
+//*****************************************************************************
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the selectedPort parameter
+// for functions: GPIO_setAsOutputPin(), GPIO_setAsInputPin(),
+// GPIO_setAsPeripheralModuleFunctionOutputPin(),
+// GPIO_setAsPeripheralModuleFunctionInputPin(), GPIO_setOutputHighOnPin(),
+// GPIO_setOutputLowOnPin(), GPIO_toggleOutputOnPin(),
+// GPIO_setAsInputPinWithPullDownResistor(),
+// GPIO_setAsInputPinWithPullUpResistor(), GPIO_getInputPinValue(),
+// GPIO_selectInterruptEdge(), GPIO_enableInterrupt(), GPIO_disableInterrupt(),
+// GPIO_getInterruptStatus(), and GPIO_clearInterrupt().
+//
+//*****************************************************************************
+#define GPIO_PORT_P1 1
+#define GPIO_PORT_P2 2
+#define GPIO_PORT_P3 3
+#define GPIO_PORT_P4 4
+#define GPIO_PORT_P5 5
+#define GPIO_PORT_P6 6
+#define GPIO_PORT_P7 7
+#define GPIO_PORT_P8 8
+#define GPIO_PORT_P9 9
+#define GPIO_PORT_P10 10
+#define GPIO_PORT_P11 11
+#define GPIO_PORT_PA 1
+#define GPIO_PORT_PB 3
+#define GPIO_PORT_PC 5
+#define GPIO_PORT_PD 7
+#define GPIO_PORT_PE 9
+#define GPIO_PORT_PF 11
+#define GPIO_PORT_PJ 13
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the selectedPins parameter
+// for functions: GPIO_setAsOutputPin(), GPIO_setAsInputPin(),
+// GPIO_setAsPeripheralModuleFunctionOutputPin(),
+// GPIO_setAsPeripheralModuleFunctionInputPin(), GPIO_setOutputHighOnPin(),
+// GPIO_setOutputLowOnPin(), GPIO_toggleOutputOnPin(),
+// GPIO_setAsInputPinWithPullDownResistor(),
+// GPIO_setAsInputPinWithPullUpResistor(), GPIO_getInputPinValue(),
+// GPIO_enableInterrupt(), GPIO_disableInterrupt(), GPIO_getInterruptStatus(),
+// GPIO_clearInterrupt(), and GPIO_selectInterruptEdge() as well as returned by
+// the GPIO_getInterruptStatus() function.
+//
+//*****************************************************************************
+#define GPIO_PIN0 (0x0001)
+#define GPIO_PIN1 (0x0002)
+#define GPIO_PIN2 (0x0004)
+#define GPIO_PIN3 (0x0008)
+#define GPIO_PIN4 (0x0010)
+#define GPIO_PIN5 (0x0020)
+#define GPIO_PIN6 (0x0040)
+#define GPIO_PIN7 (0x0080)
+#define GPIO_PIN8 (0x0100)
+#define GPIO_PIN9 (0x0200)
+#define GPIO_PIN10 (0x0400)
+#define GPIO_PIN11 (0x0800)
+#define GPIO_PIN12 (0x1000)
+#define GPIO_PIN13 (0x2000)
+#define GPIO_PIN14 (0x4000)
+#define GPIO_PIN15 (0x8000)
+#define GPIO_PIN_ALL8 (0xFF)
+#define GPIO_PIN_ALL16 (0xFFFF)
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the mode parameter for
+// functions: GPIO_setAsPeripheralModuleFunctionOutputPin(), and
+// GPIO_setAsPeripheralModuleFunctionInputPin().
+//
+//*****************************************************************************
+#define GPIO_PRIMARY_MODULE_FUNCTION (0x01)
+#define GPIO_SECONDARY_MODULE_FUNCTION (0x02)
+#define GPIO_TERNARY_MODULE_FUNCTION (0x03)
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the edgeSelect parameter for
+// functions: GPIO_selectInterruptEdge().
+//
+//*****************************************************************************
+#define GPIO_HIGH_TO_LOW_TRANSITION (0x01)
+#define GPIO_LOW_TO_HIGH_TRANSITION (0x00)
+
+//*****************************************************************************
+//
+// The following are values that can be passed toThe following are values that
+// can be returned by the GPIO_getInputPinValue() function.
+//
+//*****************************************************************************
+#define GPIO_INPUT_PIN_HIGH (0x01)
+#define GPIO_INPUT_PIN_LOW (0x00)
+
+//*****************************************************************************
+//
+// Prototypes for the APIs.
+//
+//*****************************************************************************
+
+//*****************************************************************************
+//
+//! \brief This function configures the selected Pin as output pin
+//!
+//! This function selected pins on a selected port as output pins.
+//!
+//! \param selectedPort is the selected port.
+//! Valid values are:
+//! - \b GPIO_PORT_P1
+//! - \b GPIO_PORT_P2
+//! - \b GPIO_PORT_P3
+//! - \b GPIO_PORT_P4
+//! - \b GPIO_PORT_P5
+//! - \b GPIO_PORT_P6
+//! - \b GPIO_PORT_P7
+//! - \b GPIO_PORT_P8
+//! - \b GPIO_PORT_P9
+//! - \b GPIO_PORT_P10
+//! - \b GPIO_PORT_P11
+//! - \b GPIO_PORT_PA
+//! - \b GPIO_PORT_PB
+//! - \b GPIO_PORT_PC
+//! - \b GPIO_PORT_PD
+//! - \b GPIO_PORT_PE
+//! - \b GPIO_PORT_PF
+//! - \b GPIO_PORT_PJ
+//! \param selectedPins is the specified pin in the selected port.
+//! Mask value is the logical OR of any of the following:
+//! - \b GPIO_PIN0
+//! - \b GPIO_PIN1
+//! - \b GPIO_PIN2
+//! - \b GPIO_PIN3
+//! - \b GPIO_PIN4
+//! - \b GPIO_PIN5
+//! - \b GPIO_PIN6
+//! - \b GPIO_PIN7
+//! - \b GPIO_PIN8
+//! - \b GPIO_PIN9
+//! - \b GPIO_PIN10
+//! - \b GPIO_PIN11
+//! - \b GPIO_PIN12
+//! - \b GPIO_PIN13
+//! - \b GPIO_PIN14
+//! - \b GPIO_PIN15
+//! - \b GPIO_PIN_ALL8
+//! - \b GPIO_PIN_ALL16
+//!
+//! Modified bits of \b PxDIR register and bits of \b PxSEL register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void GPIO_setAsOutputPin(uint8_t selectedPort,
+ uint16_t selectedPins);
+
+//*****************************************************************************
+//
+//! \brief This function configures the selected Pin as input pin
+//!
+//! This function selected pins on a selected port as input pins.
+//!
+//! \param selectedPort is the selected port.
+//! Valid values are:
+//! - \b GPIO_PORT_P1
+//! - \b GPIO_PORT_P2
+//! - \b GPIO_PORT_P3
+//! - \b GPIO_PORT_P4
+//! - \b GPIO_PORT_P5
+//! - \b GPIO_PORT_P6
+//! - \b GPIO_PORT_P7
+//! - \b GPIO_PORT_P8
+//! - \b GPIO_PORT_P9
+//! - \b GPIO_PORT_P10
+//! - \b GPIO_PORT_P11
+//! - \b GPIO_PORT_PA
+//! - \b GPIO_PORT_PB
+//! - \b GPIO_PORT_PC
+//! - \b GPIO_PORT_PD
+//! - \b GPIO_PORT_PE
+//! - \b GPIO_PORT_PF
+//! - \b GPIO_PORT_PJ
+//! \param selectedPins is the specified pin in the selected port.
+//! Mask value is the logical OR of any of the following:
+//! - \b GPIO_PIN0
+//! - \b GPIO_PIN1
+//! - \b GPIO_PIN2
+//! - \b GPIO_PIN3
+//! - \b GPIO_PIN4
+//! - \b GPIO_PIN5
+//! - \b GPIO_PIN6
+//! - \b GPIO_PIN7
+//! - \b GPIO_PIN8
+//! - \b GPIO_PIN9
+//! - \b GPIO_PIN10
+//! - \b GPIO_PIN11
+//! - \b GPIO_PIN12
+//! - \b GPIO_PIN13
+//! - \b GPIO_PIN14
+//! - \b GPIO_PIN15
+//! - \b GPIO_PIN_ALL8
+//! - \b GPIO_PIN_ALL16
+//!
+//! Modified bits of \b PxDIR register, bits of \b PxREN register and bits of
+//! \b PxSEL register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void GPIO_setAsInputPin(uint8_t selectedPort,
+ uint16_t selectedPins);
+
+//*****************************************************************************
+//
+//! \brief This function configures the peripheral module function in the
+//! output direction for the selected pin.
+//!
+//! This function configures the peripheral module function in the output
+//! direction for the selected pin for either primary, secondary or ternary
+//! module function modes. Note that MSP430F5xx/6xx family doesn't support
+//! these function modes.
+//!
+//! \param selectedPort is the selected port.
+//! Valid values are:
+//! - \b GPIO_PORT_P1
+//! - \b GPIO_PORT_P2
+//! - \b GPIO_PORT_P3
+//! - \b GPIO_PORT_P4
+//! - \b GPIO_PORT_P5
+//! - \b GPIO_PORT_P6
+//! - \b GPIO_PORT_P7
+//! - \b GPIO_PORT_P8
+//! - \b GPIO_PORT_P9
+//! - \b GPIO_PORT_P10
+//! - \b GPIO_PORT_P11
+//! - \b GPIO_PORT_PA
+//! - \b GPIO_PORT_PB
+//! - \b GPIO_PORT_PC
+//! - \b GPIO_PORT_PD
+//! - \b GPIO_PORT_PE
+//! - \b GPIO_PORT_PF
+//! - \b GPIO_PORT_PJ
+//! \param selectedPins is the specified pin in the selected port.
+//! Mask value is the logical OR of any of the following:
+//! - \b GPIO_PIN0
+//! - \b GPIO_PIN1
+//! - \b GPIO_PIN2
+//! - \b GPIO_PIN3
+//! - \b GPIO_PIN4
+//! - \b GPIO_PIN5
+//! - \b GPIO_PIN6
+//! - \b GPIO_PIN7
+//! - \b GPIO_PIN8
+//! - \b GPIO_PIN9
+//! - \b GPIO_PIN10
+//! - \b GPIO_PIN11
+//! - \b GPIO_PIN12
+//! - \b GPIO_PIN13
+//! - \b GPIO_PIN14
+//! - \b GPIO_PIN15
+//! - \b GPIO_PIN_ALL8
+//! - \b GPIO_PIN_ALL16
+//! \param mode is the specified mode that the pin should be configured for the
+//! module function.
+//! Valid values are:
+//! - \b GPIO_PRIMARY_MODULE_FUNCTION
+//! - \b GPIO_SECONDARY_MODULE_FUNCTION
+//! - \b GPIO_TERNARY_MODULE_FUNCTION
+//!
+//! Modified bits of \b PxDIR register and bits of \b PxSEL register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void GPIO_setAsPeripheralModuleFunctionOutputPin(uint8_t selectedPort,
+ uint16_t selectedPins,
+ uint8_t mode);
+
+//*****************************************************************************
+//
+//! \brief This function configures the peripheral module function in the input
+//! direction for the selected pin.
+//!
+//! This function configures the peripheral module function in the input
+//! direction for the selected pin for either primary, secondary or ternary
+//! module function modes. Note that MSP430F5xx/6xx family doesn't support
+//! these function modes.
+//!
+//! \param selectedPort is the selected port.
+//! Valid values are:
+//! - \b GPIO_PORT_P1
+//! - \b GPIO_PORT_P2
+//! - \b GPIO_PORT_P3
+//! - \b GPIO_PORT_P4
+//! - \b GPIO_PORT_P5
+//! - \b GPIO_PORT_P6
+//! - \b GPIO_PORT_P7
+//! - \b GPIO_PORT_P8
+//! - \b GPIO_PORT_P9
+//! - \b GPIO_PORT_P10
+//! - \b GPIO_PORT_P11
+//! - \b GPIO_PORT_PA
+//! - \b GPIO_PORT_PB
+//! - \b GPIO_PORT_PC
+//! - \b GPIO_PORT_PD
+//! - \b GPIO_PORT_PE
+//! - \b GPIO_PORT_PF
+//! - \b GPIO_PORT_PJ
+//! \param selectedPins is the specified pin in the selected port.
+//! Mask value is the logical OR of any of the following:
+//! - \b GPIO_PIN0
+//! - \b GPIO_PIN1
+//! - \b GPIO_PIN2
+//! - \b GPIO_PIN3
+//! - \b GPIO_PIN4
+//! - \b GPIO_PIN5
+//! - \b GPIO_PIN6
+//! - \b GPIO_PIN7
+//! - \b GPIO_PIN8
+//! - \b GPIO_PIN9
+//! - \b GPIO_PIN10
+//! - \b GPIO_PIN11
+//! - \b GPIO_PIN12
+//! - \b GPIO_PIN13
+//! - \b GPIO_PIN14
+//! - \b GPIO_PIN15
+//! - \b GPIO_PIN_ALL8
+//! - \b GPIO_PIN_ALL16
+//! \param mode is the specified mode that the pin should be configured for the
+//! module function.
+//! Valid values are:
+//! - \b GPIO_PRIMARY_MODULE_FUNCTION
+//! - \b GPIO_SECONDARY_MODULE_FUNCTION
+//! - \b GPIO_TERNARY_MODULE_FUNCTION
+//!
+//! Modified bits of \b PxDIR register and bits of \b PxSEL register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void GPIO_setAsPeripheralModuleFunctionInputPin(uint8_t selectedPort,
+ uint16_t selectedPins,
+ uint8_t mode);
+
+//*****************************************************************************
+//
+//! \brief This function sets output HIGH on the selected Pin
+//!
+//! This function sets output HIGH on the selected port's pin.
+//!
+//! \param selectedPort is the selected port.
+//! Valid values are:
+//! - \b GPIO_PORT_P1
+//! - \b GPIO_PORT_P2
+//! - \b GPIO_PORT_P3
+//! - \b GPIO_PORT_P4
+//! - \b GPIO_PORT_P5
+//! - \b GPIO_PORT_P6
+//! - \b GPIO_PORT_P7
+//! - \b GPIO_PORT_P8
+//! - \b GPIO_PORT_P9
+//! - \b GPIO_PORT_P10
+//! - \b GPIO_PORT_P11
+//! - \b GPIO_PORT_PA
+//! - \b GPIO_PORT_PB
+//! - \b GPIO_PORT_PC
+//! - \b GPIO_PORT_PD
+//! - \b GPIO_PORT_PE
+//! - \b GPIO_PORT_PF
+//! - \b GPIO_PORT_PJ
+//! \param selectedPins is the specified pin in the selected port.
+//! Mask value is the logical OR of any of the following:
+//! - \b GPIO_PIN0
+//! - \b GPIO_PIN1
+//! - \b GPIO_PIN2
+//! - \b GPIO_PIN3
+//! - \b GPIO_PIN4
+//! - \b GPIO_PIN5
+//! - \b GPIO_PIN6
+//! - \b GPIO_PIN7
+//! - \b GPIO_PIN8
+//! - \b GPIO_PIN9
+//! - \b GPIO_PIN10
+//! - \b GPIO_PIN11
+//! - \b GPIO_PIN12
+//! - \b GPIO_PIN13
+//! - \b GPIO_PIN14
+//! - \b GPIO_PIN15
+//! - \b GPIO_PIN_ALL8
+//! - \b GPIO_PIN_ALL16
+//!
+//! Modified bits of \b PxOUT register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void GPIO_setOutputHighOnPin(uint8_t selectedPort,
+ uint16_t selectedPins);
+
+//*****************************************************************************
+//
+//! \brief This function sets output LOW on the selected Pin
+//!
+//! This function sets output LOW on the selected port's pin.
+//!
+//! \param selectedPort is the selected port.
+//! Valid values are:
+//! - \b GPIO_PORT_P1
+//! - \b GPIO_PORT_P2
+//! - \b GPIO_PORT_P3
+//! - \b GPIO_PORT_P4
+//! - \b GPIO_PORT_P5
+//! - \b GPIO_PORT_P6
+//! - \b GPIO_PORT_P7
+//! - \b GPIO_PORT_P8
+//! - \b GPIO_PORT_P9
+//! - \b GPIO_PORT_P10
+//! - \b GPIO_PORT_P11
+//! - \b GPIO_PORT_PA
+//! - \b GPIO_PORT_PB
+//! - \b GPIO_PORT_PC
+//! - \b GPIO_PORT_PD
+//! - \b GPIO_PORT_PE
+//! - \b GPIO_PORT_PF
+//! - \b GPIO_PORT_PJ
+//! \param selectedPins is the specified pin in the selected port.
+//! Mask value is the logical OR of any of the following:
+//! - \b GPIO_PIN0
+//! - \b GPIO_PIN1
+//! - \b GPIO_PIN2
+//! - \b GPIO_PIN3
+//! - \b GPIO_PIN4
+//! - \b GPIO_PIN5
+//! - \b GPIO_PIN6
+//! - \b GPIO_PIN7
+//! - \b GPIO_PIN8
+//! - \b GPIO_PIN9
+//! - \b GPIO_PIN10
+//! - \b GPIO_PIN11
+//! - \b GPIO_PIN12
+//! - \b GPIO_PIN13
+//! - \b GPIO_PIN14
+//! - \b GPIO_PIN15
+//! - \b GPIO_PIN_ALL8
+//! - \b GPIO_PIN_ALL16
+//!
+//! Modified bits of \b PxOUT register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void GPIO_setOutputLowOnPin(uint8_t selectedPort,
+ uint16_t selectedPins);
+
+//*****************************************************************************
+//
+//! \brief This function toggles the output on the selected Pin
+//!
+//! This function toggles the output on the selected port's pin.
+//!
+//! \param selectedPort is the selected port.
+//! Valid values are:
+//! - \b GPIO_PORT_P1
+//! - \b GPIO_PORT_P2
+//! - \b GPIO_PORT_P3
+//! - \b GPIO_PORT_P4
+//! - \b GPIO_PORT_P5
+//! - \b GPIO_PORT_P6
+//! - \b GPIO_PORT_P7
+//! - \b GPIO_PORT_P8
+//! - \b GPIO_PORT_P9
+//! - \b GPIO_PORT_P10
+//! - \b GPIO_PORT_P11
+//! - \b GPIO_PORT_PA
+//! - \b GPIO_PORT_PB
+//! - \b GPIO_PORT_PC
+//! - \b GPIO_PORT_PD
+//! - \b GPIO_PORT_PE
+//! - \b GPIO_PORT_PF
+//! - \b GPIO_PORT_PJ
+//! \param selectedPins is the specified pin in the selected port.
+//! Mask value is the logical OR of any of the following:
+//! - \b GPIO_PIN0
+//! - \b GPIO_PIN1
+//! - \b GPIO_PIN2
+//! - \b GPIO_PIN3
+//! - \b GPIO_PIN4
+//! - \b GPIO_PIN5
+//! - \b GPIO_PIN6
+//! - \b GPIO_PIN7
+//! - \b GPIO_PIN8
+//! - \b GPIO_PIN9
+//! - \b GPIO_PIN10
+//! - \b GPIO_PIN11
+//! - \b GPIO_PIN12
+//! - \b GPIO_PIN13
+//! - \b GPIO_PIN14
+//! - \b GPIO_PIN15
+//! - \b GPIO_PIN_ALL8
+//! - \b GPIO_PIN_ALL16
+//!
+//! Modified bits of \b PxOUT register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void GPIO_toggleOutputOnPin(uint8_t selectedPort,
+ uint16_t selectedPins);
+
+//*****************************************************************************
+//
+//! \brief This function sets the selected Pin in input Mode with Pull Down
+//! resistor
+//!
+//! This function sets the selected Pin in input Mode with Pull Down resistor.
+//!
+//! \param selectedPort is the selected port.
+//! Valid values are:
+//! - \b GPIO_PORT_P1
+//! - \b GPIO_PORT_P2
+//! - \b GPIO_PORT_P3
+//! - \b GPIO_PORT_P4
+//! - \b GPIO_PORT_P5
+//! - \b GPIO_PORT_P6
+//! - \b GPIO_PORT_P7
+//! - \b GPIO_PORT_P8
+//! - \b GPIO_PORT_P9
+//! - \b GPIO_PORT_P10
+//! - \b GPIO_PORT_P11
+//! - \b GPIO_PORT_PA
+//! - \b GPIO_PORT_PB
+//! - \b GPIO_PORT_PC
+//! - \b GPIO_PORT_PD
+//! - \b GPIO_PORT_PE
+//! - \b GPIO_PORT_PF
+//! - \b GPIO_PORT_PJ
+//! \param selectedPins is the specified pin in the selected port.
+//! Mask value is the logical OR of any of the following:
+//! - \b GPIO_PIN0
+//! - \b GPIO_PIN1
+//! - \b GPIO_PIN2
+//! - \b GPIO_PIN3
+//! - \b GPIO_PIN4
+//! - \b GPIO_PIN5
+//! - \b GPIO_PIN6
+//! - \b GPIO_PIN7
+//! - \b GPIO_PIN8
+//! - \b GPIO_PIN9
+//! - \b GPIO_PIN10
+//! - \b GPIO_PIN11
+//! - \b GPIO_PIN12
+//! - \b GPIO_PIN13
+//! - \b GPIO_PIN14
+//! - \b GPIO_PIN15
+//! - \b GPIO_PIN_ALL8
+//! - \b GPIO_PIN_ALL16
+//!
+//! Modified bits of \b PxDIR register, bits of \b PxOUT register and bits of
+//! \b PxREN register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void GPIO_setAsInputPinWithPullDownResistor(uint8_t selectedPort,
+ uint16_t selectedPins);
+
+//*****************************************************************************
+//
+//! \brief This function sets the selected Pin in input Mode with Pull Up
+//! resistor
+//!
+//! This function sets the selected Pin in input Mode with Pull Up resistor.
+//!
+//! \param selectedPort is the selected port.
+//! Valid values are:
+//! - \b GPIO_PORT_P1
+//! - \b GPIO_PORT_P2
+//! - \b GPIO_PORT_P3
+//! - \b GPIO_PORT_P4
+//! - \b GPIO_PORT_P5
+//! - \b GPIO_PORT_P6
+//! - \b GPIO_PORT_P7
+//! - \b GPIO_PORT_P8
+//! - \b GPIO_PORT_P9
+//! - \b GPIO_PORT_P10
+//! - \b GPIO_PORT_P11
+//! - \b GPIO_PORT_PA
+//! - \b GPIO_PORT_PB
+//! - \b GPIO_PORT_PC
+//! - \b GPIO_PORT_PD
+//! - \b GPIO_PORT_PE
+//! - \b GPIO_PORT_PF
+//! - \b GPIO_PORT_PJ
+//! \param selectedPins is the specified pin in the selected port.
+//! Mask value is the logical OR of any of the following:
+//! - \b GPIO_PIN0
+//! - \b GPIO_PIN1
+//! - \b GPIO_PIN2
+//! - \b GPIO_PIN3
+//! - \b GPIO_PIN4
+//! - \b GPIO_PIN5
+//! - \b GPIO_PIN6
+//! - \b GPIO_PIN7
+//! - \b GPIO_PIN8
+//! - \b GPIO_PIN9
+//! - \b GPIO_PIN10
+//! - \b GPIO_PIN11
+//! - \b GPIO_PIN12
+//! - \b GPIO_PIN13
+//! - \b GPIO_PIN14
+//! - \b GPIO_PIN15
+//! - \b GPIO_PIN_ALL8
+//! - \b GPIO_PIN_ALL16
+//!
+//! Modified bits of \b PxDIR register, bits of \b PxOUT register and bits of
+//! \b PxREN register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void GPIO_setAsInputPinWithPullUpResistor(uint8_t selectedPort,
+ uint16_t selectedPins);
+
+//*****************************************************************************
+//
+//! \brief This function gets the input value on the selected pin
+//!
+//! This function gets the input value on the selected pin.
+//!
+//! \param selectedPort is the selected port.
+//! Valid values are:
+//! - \b GPIO_PORT_P1
+//! - \b GPIO_PORT_P2
+//! - \b GPIO_PORT_P3
+//! - \b GPIO_PORT_P4
+//! - \b GPIO_PORT_P5
+//! - \b GPIO_PORT_P6
+//! - \b GPIO_PORT_P7
+//! - \b GPIO_PORT_P8
+//! - \b GPIO_PORT_P9
+//! - \b GPIO_PORT_P10
+//! - \b GPIO_PORT_P11
+//! - \b GPIO_PORT_PA
+//! - \b GPIO_PORT_PB
+//! - \b GPIO_PORT_PC
+//! - \b GPIO_PORT_PD
+//! - \b GPIO_PORT_PE
+//! - \b GPIO_PORT_PF
+//! - \b GPIO_PORT_PJ
+//! \param selectedPins is the specified pin in the selected port.
+//! Valid values are:
+//! - \b GPIO_PIN0
+//! - \b GPIO_PIN1
+//! - \b GPIO_PIN2
+//! - \b GPIO_PIN3
+//! - \b GPIO_PIN4
+//! - \b GPIO_PIN5
+//! - \b GPIO_PIN6
+//! - \b GPIO_PIN7
+//! - \b GPIO_PIN8
+//! - \b GPIO_PIN9
+//! - \b GPIO_PIN10
+//! - \b GPIO_PIN11
+//! - \b GPIO_PIN12
+//! - \b GPIO_PIN13
+//! - \b GPIO_PIN14
+//! - \b GPIO_PIN15
+//! - \b GPIO_PIN_ALL8
+//! - \b GPIO_PIN_ALL16
+//!
+//! \return One of the following:
+//! - \b GPIO_INPUT_PIN_HIGH
+//! - \b GPIO_INPUT_PIN_LOW
+//! \n indicating the status of the pin
+//
+//*****************************************************************************
+extern uint8_t GPIO_getInputPinValue(uint8_t selectedPort,
+ uint16_t selectedPins);
+
+//*****************************************************************************
+//
+//! \brief This function enables the port interrupt on the selected pin
+//!
+//! This function enables the port interrupt on the selected pin. Please refer
+//! to family user's guide for available ports with interrupt capability.
+//!
+//! \param selectedPort is the selected port.
+//! Valid values are:
+//! - \b GPIO_PORT_P1
+//! - \b GPIO_PORT_P2
+//! - \b GPIO_PORT_P3
+//! - \b GPIO_PORT_P4
+//! - \b GPIO_PORT_P5
+//! - \b GPIO_PORT_P6
+//! - \b GPIO_PORT_P7
+//! - \b GPIO_PORT_P8
+//! - \b GPIO_PORT_P9
+//! - \b GPIO_PORT_P10
+//! - \b GPIO_PORT_P11
+//! - \b GPIO_PORT_PA
+//! - \b GPIO_PORT_PB
+//! - \b GPIO_PORT_PC
+//! - \b GPIO_PORT_PD
+//! - \b GPIO_PORT_PE
+//! - \b GPIO_PORT_PF
+//! - \b GPIO_PORT_PJ
+//! \param selectedPins is the specified pin in the selected port.
+//! Mask value is the logical OR of any of the following:
+//! - \b GPIO_PIN0
+//! - \b GPIO_PIN1
+//! - \b GPIO_PIN2
+//! - \b GPIO_PIN3
+//! - \b GPIO_PIN4
+//! - \b GPIO_PIN5
+//! - \b GPIO_PIN6
+//! - \b GPIO_PIN7
+//! - \b GPIO_PIN8
+//! - \b GPIO_PIN9
+//! - \b GPIO_PIN10
+//! - \b GPIO_PIN11
+//! - \b GPIO_PIN12
+//! - \b GPIO_PIN13
+//! - \b GPIO_PIN14
+//! - \b GPIO_PIN15
+//! - \b GPIO_PIN_ALL8
+//! - \b GPIO_PIN_ALL16
+//!
+//! Modified bits of \b PxIE register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void GPIO_enableInterrupt(uint8_t selectedPort,
+ uint16_t selectedPins);
+
+//*****************************************************************************
+//
+//! \brief This function disables the port interrupt on the selected pin
+//!
+//! This function disables the port interrupt on the selected pin. Please refer
+//! to family user's guide for available ports with interrupt capability.
+//!
+//! \param selectedPort is the selected port.
+//! Valid values are:
+//! - \b GPIO_PORT_P1
+//! - \b GPIO_PORT_P2
+//! - \b GPIO_PORT_P3
+//! - \b GPIO_PORT_P4
+//! - \b GPIO_PORT_P5
+//! - \b GPIO_PORT_P6
+//! - \b GPIO_PORT_P7
+//! - \b GPIO_PORT_P8
+//! - \b GPIO_PORT_P9
+//! - \b GPIO_PORT_P10
+//! - \b GPIO_PORT_P11
+//! - \b GPIO_PORT_PA
+//! - \b GPIO_PORT_PB
+//! - \b GPIO_PORT_PC
+//! - \b GPIO_PORT_PD
+//! - \b GPIO_PORT_PE
+//! - \b GPIO_PORT_PF
+//! - \b GPIO_PORT_PJ
+//! \param selectedPins is the specified pin in the selected port.
+//! Mask value is the logical OR of any of the following:
+//! - \b GPIO_PIN0
+//! - \b GPIO_PIN1
+//! - \b GPIO_PIN2
+//! - \b GPIO_PIN3
+//! - \b GPIO_PIN4
+//! - \b GPIO_PIN5
+//! - \b GPIO_PIN6
+//! - \b GPIO_PIN7
+//! - \b GPIO_PIN8
+//! - \b GPIO_PIN9
+//! - \b GPIO_PIN10
+//! - \b GPIO_PIN11
+//! - \b GPIO_PIN12
+//! - \b GPIO_PIN13
+//! - \b GPIO_PIN14
+//! - \b GPIO_PIN15
+//! - \b GPIO_PIN_ALL8
+//! - \b GPIO_PIN_ALL16
+//!
+//! Modified bits of \b PxIE register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void GPIO_disableInterrupt(uint8_t selectedPort,
+ uint16_t selectedPins);
+
+//*****************************************************************************
+//
+//! \brief This function gets the interrupt status of the selected pin
+//!
+//! This function gets the interrupt status of the selected pin. Please refer
+//! to family user's guide for available ports with interrupt capability.
+//!
+//! \param selectedPort is the selected port.
+//! Valid values are:
+//! - \b GPIO_PORT_P1
+//! - \b GPIO_PORT_P2
+//! - \b GPIO_PORT_P3
+//! - \b GPIO_PORT_P4
+//! - \b GPIO_PORT_P5
+//! - \b GPIO_PORT_P6
+//! - \b GPIO_PORT_P7
+//! - \b GPIO_PORT_P8
+//! - \b GPIO_PORT_P9
+//! - \b GPIO_PORT_P10
+//! - \b GPIO_PORT_P11
+//! - \b GPIO_PORT_PA
+//! - \b GPIO_PORT_PB
+//! - \b GPIO_PORT_PC
+//! - \b GPIO_PORT_PD
+//! - \b GPIO_PORT_PE
+//! - \b GPIO_PORT_PF
+//! - \b GPIO_PORT_PJ
+//! \param selectedPins is the specified pin in the selected port.
+//! Mask value is the logical OR of any of the following:
+//! - \b GPIO_PIN0
+//! - \b GPIO_PIN1
+//! - \b GPIO_PIN2
+//! - \b GPIO_PIN3
+//! - \b GPIO_PIN4
+//! - \b GPIO_PIN5
+//! - \b GPIO_PIN6
+//! - \b GPIO_PIN7
+//! - \b GPIO_PIN8
+//! - \b GPIO_PIN9
+//! - \b GPIO_PIN10
+//! - \b GPIO_PIN11
+//! - \b GPIO_PIN12
+//! - \b GPIO_PIN13
+//! - \b GPIO_PIN14
+//! - \b GPIO_PIN15
+//! - \b GPIO_PIN_ALL8
+//! - \b GPIO_PIN_ALL16
+//!
+//! \return Logical OR of any of the following:
+//! - \b GPIO_PIN0
+//! - \b GPIO_PIN1
+//! - \b GPIO_PIN2
+//! - \b GPIO_PIN3
+//! - \b GPIO_PIN4
+//! - \b GPIO_PIN5
+//! - \b GPIO_PIN6
+//! - \b GPIO_PIN7
+//! - \b GPIO_PIN8
+//! - \b GPIO_PIN9
+//! - \b GPIO_PIN10
+//! - \b GPIO_PIN11
+//! - \b GPIO_PIN12
+//! - \b GPIO_PIN13
+//! - \b GPIO_PIN14
+//! - \b GPIO_PIN15
+//! - \b GPIO_PIN_ALL8
+//! - \b GPIO_PIN_ALL16
+//! \n indicating the interrupt status of the selected pins [Default:
+//! 0]
+//
+//*****************************************************************************
+extern uint16_t GPIO_getInterruptStatus(uint8_t selectedPort,
+ uint16_t selectedPins);
+
+//*****************************************************************************
+//
+//! \brief This function clears the interrupt flag on the selected pin
+//!
+//! This function clears the interrupt flag on the selected pin. Please refer
+//! to family user's guide for available ports with interrupt capability.
+//!
+//! \param selectedPort is the selected port.
+//! Valid values are:
+//! - \b GPIO_PORT_P1
+//! - \b GPIO_PORT_P2
+//! - \b GPIO_PORT_P3
+//! - \b GPIO_PORT_P4
+//! - \b GPIO_PORT_P5
+//! - \b GPIO_PORT_P6
+//! - \b GPIO_PORT_P7
+//! - \b GPIO_PORT_P8
+//! - \b GPIO_PORT_P9
+//! - \b GPIO_PORT_P10
+//! - \b GPIO_PORT_P11
+//! - \b GPIO_PORT_PA
+//! - \b GPIO_PORT_PB
+//! - \b GPIO_PORT_PC
+//! - \b GPIO_PORT_PD
+//! - \b GPIO_PORT_PE
+//! - \b GPIO_PORT_PF
+//! - \b GPIO_PORT_PJ
+//! \param selectedPins is the specified pin in the selected port.
+//! Mask value is the logical OR of any of the following:
+//! - \b GPIO_PIN0
+//! - \b GPIO_PIN1
+//! - \b GPIO_PIN2
+//! - \b GPIO_PIN3
+//! - \b GPIO_PIN4
+//! - \b GPIO_PIN5
+//! - \b GPIO_PIN6
+//! - \b GPIO_PIN7
+//! - \b GPIO_PIN8
+//! - \b GPIO_PIN9
+//! - \b GPIO_PIN10
+//! - \b GPIO_PIN11
+//! - \b GPIO_PIN12
+//! - \b GPIO_PIN13
+//! - \b GPIO_PIN14
+//! - \b GPIO_PIN15
+//! - \b GPIO_PIN_ALL8
+//! - \b GPIO_PIN_ALL16
+//!
+//! Modified bits of \b PxIFG register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void GPIO_clearInterrupt(uint8_t selectedPort,
+ uint16_t selectedPins);
+
+//*****************************************************************************
+//
+//! \brief This function selects on what edge the port interrupt flag should be
+//! set for a transition
+//!
+//! This function selects on what edge the port interrupt flag should be set
+//! for a transition. Values for edgeSelect should be
+//! GPIO_LOW_TO_HIGH_TRANSITION or GPIO_HIGH_TO_LOW_TRANSITION. Please refer to
+//! family user's guide for available ports with interrupt capability.
+//!
+//! \param selectedPort is the selected port.
+//! Valid values are:
+//! - \b GPIO_PORT_P1
+//! - \b GPIO_PORT_P2
+//! - \b GPIO_PORT_P3
+//! - \b GPIO_PORT_P4
+//! - \b GPIO_PORT_P5
+//! - \b GPIO_PORT_P6
+//! - \b GPIO_PORT_P7
+//! - \b GPIO_PORT_P8
+//! - \b GPIO_PORT_P9
+//! - \b GPIO_PORT_P10
+//! - \b GPIO_PORT_P11
+//! - \b GPIO_PORT_PA
+//! - \b GPIO_PORT_PB
+//! - \b GPIO_PORT_PC
+//! - \b GPIO_PORT_PD
+//! - \b GPIO_PORT_PE
+//! - \b GPIO_PORT_PF
+//! - \b GPIO_PORT_PJ
+//! \param selectedPins is the specified pin in the selected port.
+//! Mask value is the logical OR of any of the following:
+//! - \b GPIO_PIN0
+//! - \b GPIO_PIN1
+//! - \b GPIO_PIN2
+//! - \b GPIO_PIN3
+//! - \b GPIO_PIN4
+//! - \b GPIO_PIN5
+//! - \b GPIO_PIN6
+//! - \b GPIO_PIN7
+//! - \b GPIO_PIN8
+//! - \b GPIO_PIN9
+//! - \b GPIO_PIN10
+//! - \b GPIO_PIN11
+//! - \b GPIO_PIN12
+//! - \b GPIO_PIN13
+//! - \b GPIO_PIN14
+//! - \b GPIO_PIN15
+//! - \b GPIO_PIN_ALL8
+//! - \b GPIO_PIN_ALL16
+//! \param edgeSelect specifies what transition sets the interrupt flag
+//! Valid values are:
+//! - \b GPIO_HIGH_TO_LOW_TRANSITION
+//! - \b GPIO_LOW_TO_HIGH_TRANSITION
+//!
+//! Modified bits of \b PxIES register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void GPIO_selectInterruptEdge(uint8_t selectedPort,
+ uint16_t selectedPins,
+ uint8_t edgeSelect);
+
+//*****************************************************************************
+//
+// Mark the end of the C bindings section for C++ compilers.
+//
+//*****************************************************************************
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+#endif // __MSP430WARE_GPIO_H__
diff --git a/Apps/FlightSoftware/MotorControl/driverlib/hspll.c b/Apps/FlightSoftware/MotorControl/driverlib/hspll.c
new file mode 100644
index 000000000..b4b3c2500
--- /dev/null
+++ b/Apps/FlightSoftware/MotorControl/driverlib/hspll.c
@@ -0,0 +1,119 @@
+/* --COPYRIGHT--,BSD
+ * Copyright (c) 2017, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * --/COPYRIGHT--*/
+//*****************************************************************************
+//
+// hspll.c - Driver for the HSPLL Module.
+//
+//*****************************************************************************
+
+//*****************************************************************************
+//
+//! \addtogroup hspll_api hspll
+//! @{
+//
+//*****************************************************************************
+
+#include "inc/hw_memmap.h"
+
+#ifdef __MSP430_HAS_HSPLL__
+#include "hspll.h"
+
+#include
+
+void HSPLL_init(uint16_t baseAddress, HSPLL_initParam *param)
+{
+ assert (param->multiplier > 15);
+ assert (param->multiplier < 40);
+
+ HWREG16(baseAddress + OFS_HSPLLCTL) =
+ (param->multiplier << 10)
+ | param->frequency
+ | param->lockStatus;
+}
+
+void HSPLL_xtalInit(uint16_t baseAddress, HSPLL_xtalInitParam *param)
+{
+ HWREG16(baseAddress + OFS_HSPLLUSSXTLCTL) =
+ param->oscillatorType
+ | param->xtlOutput
+ | param->oscillatorEnable;
+}
+
+uint16_t HSPLL_getInterruptStatus(uint16_t baseAddress)
+{
+ return (HWREG16(baseAddress + OFS_HSPLLRIS) & PLLUNLOCK);
+}
+
+uint16_t HSPLL_getInterruptMaskStatus(uint16_t baseAddress)
+{
+ return (HWREG16(baseAddress + OFS_HSPLLIMSC) & PLLUNLOCK);
+}
+
+void HSPLL_enableInterrupt(uint16_t baseAddress)
+{
+ HWREG16(baseAddress + OFS_HSPLLIMSC) |= PLLUNLOCK;
+}
+
+void HSPLL_disableInterrupt(uint16_t baseAddress)
+{
+ HWREG16(baseAddress + OFS_HSPLLIMSC) &= ~PLLUNLOCK;
+}
+
+void HSPLL_clearInterrupt(uint16_t baseAddress)
+{
+ HWREG16(baseAddress + OFS_HSPLLICR) |= PLLUNLOCK;
+}
+
+void HSPLL_setInterrupt(uint16_t baseAddress)
+{
+ HWREG16(baseAddress + OFS_HSPLLISR) |= PLLUNLOCK;
+}
+
+uint16_t HSPLL_getOscillatorStatus(uint16_t baseAddress)
+{
+ return (HWREG16(baseAddress + OFS_HSPLLUSSXTLCTL) & OSCSTATE);
+}
+
+uint16_t HSPLL_isLocked(uint16_t baseAddress)
+{
+ return (HWREG16(baseAddress + OFS_HSPLLCTL) & PLL_LOCK);
+}
+
+
+#endif
+//*****************************************************************************
+//
+//! Close the doxygen group for hspll_api
+//! @}
+//
+//*****************************************************************************
+
diff --git a/Apps/FlightSoftware/MotorControl/driverlib/hspll.h b/Apps/FlightSoftware/MotorControl/driverlib/hspll.h
new file mode 100644
index 000000000..d20c7bbca
--- /dev/null
+++ b/Apps/FlightSoftware/MotorControl/driverlib/hspll.h
@@ -0,0 +1,328 @@
+/* --COPYRIGHT--,BSD
+ * Copyright (c) 2017, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * --/COPYRIGHT--*/
+//*****************************************************************************
+//
+// hspll.h - Driver for the HSPLL Module.
+//
+//*****************************************************************************
+
+#ifndef __MSP430WARE_HSPLL_H__
+#define __MSP430WARE_HSPLL_H__
+
+#include "inc/hw_memmap.h"
+
+#ifdef __MSP430_HAS_HSPLL__
+
+//*****************************************************************************
+//
+// If building with a C++ compiler, make all of the definitions in this header
+// have a C binding.
+//
+//*****************************************************************************
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+//*****************************************************************************
+//
+// The following are values that can be returned by the
+// HSPLL_getInterruptStatus(), HSPLL_getInterruptMaskStatus() API
+//
+//*****************************************************************************
+#define HSPLL_PLL_STATE_UNCHANGED PLLUNLOCK_0
+#define HSPLL_PLL_STATE_CHANGED_LOCK_TO_UNLOCK PLLUNLOCK_1
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the param parameter for
+// functions: HSPLL_init(); the frequency parameter for
+// functions: HSPLL_init().
+
+//
+//*****************************************************************************
+#define HSPLL_LESSER_OR_EQUAL_TO_6MHZ PLLINFREQ_0
+#define HSPLL_GREATER_THAN_6MHZ PLLINFREQ_1
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the param parameter for
+// functions: HSPLL_init(); the lockStatus parameter for
+// functions: HSPLL_init(). As well as returned by the
+// HSPLL_isLocked() function.
+//
+//*****************************************************************************
+#define HSPLL_UNLOCKED PLL_LOCK_0
+#define HSPLL_LOCKED PLL_LOCK_1
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the param parameter for
+// functions: HSPLL_xtalInit(); the oscillatorType parameter for
+// functions: HSPLL_xtalInit().
+//
+//*****************************************************************************
+#define HSPLL_XTAL_GATING_COUNTER_LENGTH_4096 OSCTYPE_0
+#define HSPLL_XTAL_GATING_COUNTER_LENGTH_512 OSCTYPE_1
+#define HSPLL_XTAL_OSCTYPE_XTAL OSCTYPE__XTAL
+#define HSPLL_XTAL_OSCTYPE_CERAMIC OSCTYPE__CERAMIC
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the param parameter for
+// functions: HSPLL_xtalInit(); the xtlOutput parameter for
+// functions: HSPLL_xtalInit().
+//
+//*****************************************************************************
+#define HSPLL_XTAL_OUTPUT_DISABLE XTOUTOFF_1
+#define HSPLL_XTAL_OUTPUT_ENABLE XTOUTOFF_0
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the param parameter for
+// functions: HSPLL_xtalInit(); the oscillatorEnable parameter for
+// functions: HSPLL_xtalInit().
+//
+//*****************************************************************************
+#define HSPLL_XTAL_ENABLE USSXTEN_1
+#define HSPLL_XTAL_DISABLE USSXTEN_0
+
+//*****************************************************************************
+//
+// The following are values that can be returned by HSPLL_getOscillatorStatus()
+//
+//*****************************************************************************
+#define HSPLL_OSCILLATOR_STABILIZED OSCSTATE_0
+#define HSPLL_OSCILLATOR_NOT_STABILIZED OSCSTATE_1
+
+//*****************************************************************************
+//
+//! \brief Used in the HSPLL_init() function as the param parameter.
+//
+//*****************************************************************************
+typedef struct HSPLL_initParam
+{
+ //! PLL Multiplier
+ //! \n Valid values are 16 thru 39. Default value is 16
+ //! \n Alternative valid values are any OR of PLLM_x_H bits
+ uint16_t multiplier;
+ //! Selects MSB shift from filter out
+ //! - \b HSPLL_LESSER_OR_EQUAL_TO_6MHZ [Default]
+ //! - \b HSPLL_GREATER_THAN_6MHZ
+ uint16_t frequency;
+ //! Selects the output bit resolution
+ //! \n Valid values are:
+ //! - \b HSPLL_UNLOCKED [Default]
+ //! - \b HSPLL_LOCKED
+ uint16_t lockStatus;
+} HSPLL_initParam;
+
+//*****************************************************************************
+//
+//! \brief Used in the HSPLL_xtalInit() function as the param parameter.
+//
+//*****************************************************************************
+typedef struct HSPLL_xtalInitParam
+{
+ //! Selects the oscillator type
+ //! \n Valid values are:
+ //! - \b HSPLL_XTAL_GATING_COUNTER_LENGTH_4096 [Default]
+ //! - \b HSPLL_XTAL_GATING_COUNTER_LENGTH_512
+ //! - \b HSPLL_XTAL_OSCTYPE_XTAL [Default]
+ //! - \b HSPLL_XTAL_OSCTYPE_CERAMIC
+ uint16_t oscillatorType;
+ //! Disables/Enables the oscillator output
+ //! \n Valid values are:
+ //! - \b HSPLL_XTAL_OUTPUT_DISABLE [Default]
+ //! - \b HSPLL_XTAL_OUTPUT_ENABLE
+ uint16_t xtlOutput;
+ //! Selects the Auto Sample Start
+ //! \n Valid values are:
+ //! - \b HSPLL_XTAL_DISABLE [Default]
+ //! - \b HSPLL_XTAL_ENABLE
+ uint16_t oscillatorEnable;
+} HSPLL_xtalInitParam;
+
+//*****************************************************************************
+//
+//! \brief Initializes the HSPLL module
+//!
+//! Initializes the HSPLL module
+//!
+//! \param baseAddress is the base address of the HSPLL module.
+//!
+//! \param params is the pointer to the initialization structure
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void HSPLL_init(uint16_t baseAddress, HSPLL_initParam *param);
+
+//*****************************************************************************
+//
+//! \brief Initializes the HSPLL XTAL module
+//!
+//! Initializes the HSPLL XTAL module
+//!
+//! \param baseAddress is the base address of the HSPLL XTAL module.
+//!
+//! \param params is the pointer to the initialization structure
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void HSPLL_xtalInit(uint16_t baseAddress, HSPLL_xtalInitParam *param);
+
+//*****************************************************************************
+//
+//! \brief Returns the status of the selected interrupt flags.
+//!
+//! Returns the status of the selected interrupt flag.
+//!
+//! \param baseAddress is the base address of the HSPLL module.
+//!
+//! \return \b HSPLL_PLL_STATE_UNCHANGED or
+//! \b HSPLL_PLL_STATE_CHANGED_LOCK_TO_UNLOCK
+//!
+//
+//*****************************************************************************
+extern uint16_t HSPLL_getInterruptStatus(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Returns the mask status of the selected interrupt flags.
+//!
+//! Returns the mask status of the selected interrupt flag.
+//!
+//! \param baseAddress is the base address of the HSPLL module.
+//!
+//! \return \b HSPLL_PLL_STATE_UNCHANGED or
+//! \b HSPLL_PLL_STATE_CHANGED_LOCK_TO_UNLOCK
+//!
+//
+//*****************************************************************************
+extern uint16_t HSPLL_getInterruptMaskStatus(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+///! \brief Enable HSPLL PLLUNLOCK interrupt.
+//!
+//! \param baseAddress is the base address of the HSPLL module.
+//!
+//! Modified registers are HSPLLIMSC
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void HSPLL_enableInterrupt(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+///! \brief Disable HSPLL PLLUNLOCK interrupt.
+//!
+//! \param baseAddress is the base address of the HSPLL module.
+//!
+//! Modified registers are HSPLLIMSC
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void HSPLL_disableInterrupt(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+///! \brief Clear HSPLL PLLUNLOCK interrupt.
+//!
+//! \param baseAddress is the base address of the HSPLL module.
+//!
+//! Modified registers are HSPLLICR
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void HSPLL_clearInterrupt(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+///! \brief Set HSPLL PLLUNLOCK interrupt.
+//!
+//! \param baseAddress is the base address of the HSPLL module.
+//!
+//! Modified registers are HSPLLISR
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void HSPLL_setInterrupt(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Returns the oscillator status
+//!
+//! Returns the oscillator status
+//!
+//! \param baseAddress is the base address of the HSPLL module.
+//!
+//! \return \b HSPLL_OSCILLATOR_STABILIZED or
+//! \b HSPLL_OSCILLATOR_NOT_STABILIZED
+//!
+//
+//*****************************************************************************
+extern uint16_t HSPLL_getOscillatorStatus(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Returns the PLL status
+//!
+//! Returns the PLL status
+//!
+//! \param baseAddress is the base address of the HSPLL module.
+//!
+//! \return \b HSPLL_UNLOCKED or
+//! \b HSPLL_LOCKED
+//!
+//
+//*****************************************************************************
+extern uint16_t HSPLL_isLocked(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+// Mark the end of the C bindings section for C++ compilers.
+//
+//*****************************************************************************
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+#endif // __MSP430WARE_HSPLL_H__
+
diff --git a/Apps/FlightSoftware/MotorControl/driverlib/inc/hw_memmap.h b/Apps/FlightSoftware/MotorControl/driverlib/inc/hw_memmap.h
new file mode 100644
index 000000000..99249941a
--- /dev/null
+++ b/Apps/FlightSoftware/MotorControl/driverlib/inc/hw_memmap.h
@@ -0,0 +1,77 @@
+/* --COPYRIGHT--,BSD
+ * Copyright (c) 2017, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * --/COPYRIGHT--*/
+#ifndef __HW_MEMMAP__
+#define __HW_MEMMAP__
+
+#define __DRIVERLIB_MSP430FR5XX_6XX_FAMILY__
+//*****************************************************************************
+//
+// Include device specific header file
+//
+//*****************************************************************************
+#include
+
+#ifndef __AUTOGENERATED__
+#include "msp430fr5xx_6xxgeneric.h"
+#endif
+
+#include "stdint.h"
+#include "stdbool.h"
+
+//*****************************************************************************
+//
+// SUCCESS and FAILURE for API return value
+//
+//*****************************************************************************
+#define STATUS_SUCCESS 0x01
+#define STATUS_FAIL 0x00
+
+//*****************************************************************************
+//
+// Macro for enabling assert statements for debugging
+//
+//*****************************************************************************
+#define NDEBUG
+
+//*****************************************************************************
+//
+// Macros for hardware access
+//
+//*****************************************************************************
+#define HWREG32(x) \
+ (*((volatile uint32_t *)((uint16_t)x)))
+#define HWREG16(x) \
+ (*((volatile uint16_t *)((uint16_t)x)))
+#define HWREG8(x) \
+ (*((volatile uint8_t *)((uint16_t)x)))
+
+#endif // #ifndef __HW_MEMMAP__
diff --git a/Apps/FlightSoftware/MotorControl/driverlib/inc/version.h b/Apps/FlightSoftware/MotorControl/driverlib/inc/version.h
new file mode 100644
index 000000000..091d1c58a
--- /dev/null
+++ b/Apps/FlightSoftware/MotorControl/driverlib/inc/version.h
@@ -0,0 +1,42 @@
+/* --COPYRIGHT--,BSD
+ * Copyright (c) 2017, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * --/COPYRIGHT--*/
+#ifndef __DRIVERLIB_VERSION__
+ #define DRIVERLIB_VER_MAJOR 2
+ #define DRIVERLIB_VER_MINOR 91
+ #define DRIVERLIB_VER_PATCH 08
+ #define DRIVERLIB_VER_BUILD 00
+#endif
+
+#define getVersion() ((uint32_t)DRIVERLIB_VER_MAJOR<<24 | \
+ (uint32_t)DRIVERLIB_VER_MINOR<<16 | \
+ (uint32_t)DRIVERLIB_VER_PATCH<<8 | \
+ (uint32_t)DRIVERLIB_VER_BUILD)
diff --git a/Apps/FlightSoftware/MotorControl/driverlib/lcd_c.c b/Apps/FlightSoftware/MotorControl/driverlib/lcd_c.c
new file mode 100644
index 000000000..6e10103f6
--- /dev/null
+++ b/Apps/FlightSoftware/MotorControl/driverlib/lcd_c.c
@@ -0,0 +1,439 @@
+/* --COPYRIGHT--,BSD
+ * Copyright (c) 2017, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * --/COPYRIGHT--*/
+//*****************************************************************************
+//
+// lcd_c.c - Driver for the lcd_c Module.
+//
+//*****************************************************************************
+
+//*****************************************************************************
+//
+//! \addtogroup lcd_c_api lcd_c
+//! @{
+//
+//*****************************************************************************
+
+#include "inc/hw_memmap.h"
+
+#ifdef __MSP430_HAS_LCD_C__
+#include "lcd_c.h"
+
+#include
+
+//*****************************************************************************
+//
+// Initialization parameter instance
+//
+//*****************************************************************************
+const LCD_C_initParam LCD_C_INIT_PARAM = {
+ LCD_C_CLOCKSOURCE_ACLK,
+ LCD_C_CLOCKDIVIDER_1,
+ LCD_C_CLOCKPRESCALAR_1,
+ LCD_C_STATIC,
+ LCD_C_STANDARD_WAVEFORMS,
+ LCD_C_SEGMENTS_DISABLED
+};
+
+static void setLCDFunction(uint16_t baseAddress, uint8_t index, uint16_t value)
+{
+ switch(index) {
+ case 0:
+ HWREG16(baseAddress + OFS_LCDCPCTL0) |= value;
+ break;
+ case 1:
+ HWREG16(baseAddress + OFS_LCDCPCTL1) |= value;
+ break;
+ case 2:
+ HWREG16(baseAddress + OFS_LCDCPCTL2) |= value;
+ break;
+ case 3:
+#ifdef LCDS48
+ HWREG16(baseAddress + OFS_LCDCPCTL3) |= value;
+#endif //LCDS48
+ break;
+ default: break;
+ }
+}
+
+void LCD_C_init(uint16_t baseAddress, LCD_C_initParam *initParams)
+{
+ HWREG16(baseAddress + OFS_LCDCCTL0) &= ~LCDON;
+ HWREG16(baseAddress + OFS_LCDCCTL0) &= ~(LCDMX0 | LCDMX1 | LCDMX2 | LCDSSEL
+ | LCDLP | LCDSON | LCDDIV_31);
+
+ HWREG16(baseAddress + OFS_LCDCCTL0) |= initParams->muxRate;
+ HWREG16(baseAddress + OFS_LCDCCTL0) |= initParams->clockSource;
+ HWREG16(baseAddress + OFS_LCDCCTL0) |= initParams->waveforms;
+ HWREG16(baseAddress + OFS_LCDCCTL0) |= initParams->segments;
+ HWREG16(baseAddress + OFS_LCDCCTL0) |= initParams->clockDivider;
+ HWREG16(baseAddress + OFS_LCDCCTL0) |= initParams->clockPrescalar;
+}
+
+void LCD_C_on(uint16_t baseAddress)
+{
+ HWREG16(baseAddress + OFS_LCDCCTL0) |= LCDON;
+}
+
+void LCD_C_off(uint16_t baseAddress)
+{
+ HWREG16(baseAddress + OFS_LCDCCTL0) &= ~LCDON;
+}
+
+void LCD_C_clearInterrupt(uint16_t baseAddress, uint16_t mask)
+{
+ HWREG8(baseAddress + OFS_LCDCCTL1_L) &= ~(mask>>8);
+}
+
+uint16_t LCD_C_getInterruptStatus(uint16_t baseAddress, uint16_t mask)
+{
+ return (HWREG8(baseAddress + OFS_LCDCCTL1_L) & (mask>>8));
+}
+
+void LCD_C_enableInterrupt(uint16_t baseAddress, uint16_t mask)
+{
+ HWREG16(baseAddress + OFS_LCDCCTL1) |= mask;
+}
+
+void LCD_C_disableInterrupt (uint16_t baseAddress, uint16_t mask)
+{
+ HWREG16(baseAddress + OFS_LCDCCTL1) &= ~mask;
+}
+
+ void LCD_C_clearMemory(uint16_t baseAddress)
+ {
+ HWREG16(baseAddress + OFS_LCDCMEMCTL) |= LCDCLRM;
+ }
+
+void LCD_C_clearBlinkingMemory(uint16_t baseAddress)
+{
+ HWREG16(baseAddress + OFS_LCDCMEMCTL) |= LCDCLRBM;
+}
+
+void LCD_C_selectDisplayMemory(uint16_t baseAddress, uint16_t displayMemory)
+{
+ HWREG16(baseAddress + OFS_LCDCMEMCTL) &= ~LCDDISP;
+ HWREG16(baseAddress + OFS_LCDCMEMCTL) |= displayMemory;
+}
+
+void LCD_C_setBlinkingControl (uint16_t baseAddress,
+ uint8_t clockDivider,
+ uint8_t clockPrescalar,
+ uint8_t mode)
+{
+ HWREG16(baseAddress + OFS_LCDCBLKCTL) &= ~(LCDBLKDIV0 | LCDBLKDIV1 | LCDBLKDIV2 |
+ LCDBLKPRE0 | LCDBLKPRE1 | LCDBLKPRE2 |
+ LCDBLKMOD0 | LCDBLKMOD1
+ );
+ HWREG16(baseAddress + OFS_LCDCBLKCTL) |= clockDivider | clockPrescalar | mode;
+}
+
+void LCD_C_enableChargePump(uint16_t baseAddress)
+{
+ HWREG16(baseAddress + OFS_LCDCVCTL) |= LCDCPEN;
+}
+
+void LCD_C_disableChargePump(uint16_t baseAddress)
+{
+ HWREG16(baseAddress + OFS_LCDCVCTL) &= ~LCDCPEN;
+}
+
+void LCD_C_selectBias(uint16_t baseAddress, uint16_t bias)
+{
+ HWREG16(baseAddress + OFS_LCDCCTL0) &= ~LCDON;
+ HWREG16(baseAddress + OFS_LCDCVCTL) &= ~LCD2B;
+
+ HWREG16(baseAddress + OFS_LCDCVCTL) |= bias;
+}
+
+void LCD_C_selectChargePumpReference(uint16_t baseAddress, uint16_t reference)
+{
+ HWREG16(baseAddress + OFS_LCDCCTL0) &= ~LCDON;
+ HWREG16(baseAddress + OFS_LCDCVCTL) &= ~VLCDREF_3;
+
+ HWREG16(baseAddress + OFS_LCDCVCTL) |= reference;
+}
+
+void LCD_C_setVLCDSource(uint16_t baseAddress, uint16_t vlcdSource,
+ uint16_t v2v3v4Source,
+ uint16_t v5Source)
+{
+ HWREG16(baseAddress + OFS_LCDCCTL0) &= ~LCDON;
+ HWREG16(baseAddress + OFS_LCDCVCTL) &= ~VLCDEXT;
+ HWREG16(baseAddress + OFS_LCDCVCTL) &= ~LCDREXT;
+ HWREG16(baseAddress + OFS_LCDCVCTL) &= ~LCDEXTBIAS;
+ HWREG16(baseAddress + OFS_LCDCVCTL) &= ~R03EXT;
+
+ HWREG16(baseAddress + OFS_LCDCVCTL) |= vlcdSource;
+ HWREG16(baseAddress + OFS_LCDCVCTL) |= v2v3v4Source;
+ HWREG16(baseAddress + OFS_LCDCVCTL) |= v5Source;
+}
+
+void LCD_C_setVLCDVoltage(uint16_t baseAddress, uint16_t voltage)
+{
+ HWREG16(baseAddress + OFS_LCDCVCTL) &= ~VLCD_15;
+
+ HWREG16(baseAddress + OFS_LCDCVCTL) |= voltage;
+}
+
+void LCD_C_setPinAsLCDFunction(uint16_t baseAddress, uint8_t pin)
+{
+ HWREG16(baseAddress + OFS_LCDCCTL0) &= ~LCDON;
+
+ uint8_t idx = pin>>4;
+ uint16_t val = 1<<(pin & 0xF);
+
+ setLCDFunction(baseAddress, idx, val);
+}
+
+void LCD_C_setPinAsPortFunction (uint16_t baseAddress, uint8_t pin)
+{
+ HWREG16(baseAddress + OFS_LCDCCTL0) &= ~LCDON;
+
+ uint8_t idx = pin >> 4;
+ uint16_t val = 1 << (pin & 0xF);
+
+ switch(idx) {
+ case 0:
+ HWREG16(baseAddress + OFS_LCDCPCTL0) &= ~val;
+ break;
+ case 1:
+ HWREG16(baseAddress + OFS_LCDCPCTL1) &= ~val;
+ break;
+ case 2:
+ HWREG16(baseAddress + OFS_LCDCPCTL2) &= ~val;
+ break;
+ case 3:
+#ifdef LCDS48
+ HWREG16(baseAddress + OFS_LCDCPCTL3) &= ~val;
+#endif //LCDS48
+ break;
+ default: break;
+ }
+}
+
+void LCD_C_setPinAsLCDFunctionEx(uint16_t baseAddress, uint8_t startPin,
+ uint8_t endPin)
+{
+ uint8_t startIdx = startPin>>4;
+ uint8_t endIdx = endPin>>4;
+ uint8_t startPos = startPin & 0xF;
+ uint8_t endPos = endPin & 0xF;
+ uint16_t val = 0;
+ uint8_t i = 0;
+
+ HWREG16(baseAddress + OFS_LCDCCTL0) &= ~LCDON;
+
+ if (startIdx == endIdx) {
+ val = (0xFFFF>>(15-endPos)) & (0xFFFF<>(15-endPos);
+ setLCDFunction(baseAddress, endIdx, val);
+
+ for (i=endIdx-1; i>startIdx; i--)
+ setLCDFunction(baseAddress, i, 0xFFFF);
+
+ val = 0xFFFF<> 4);
+ }
+ else
+ {
+ return (HWREG8(baseAddress + OFS_LCDM1 + pin / 2) & 0xF);
+ }
+ }
+ else
+ {
+ //5-mux, 6-mux, 7-mux, 8-mux
+ return HWREG8(baseAddress + OFS_LCDM1 + pin);
+ }
+}
+
+void LCD_C_setMemoryWithoutOverwrite(uint16_t baseAddress, uint8_t pin, uint8_t value)
+{
+ uint8_t muxRate = HWREG16(baseAddress + OFS_LCDCCTL0)
+ & (LCDMX2 | LCDMX1 | LCDMX0);
+
+ value |= LCD_C_getMemory(baseAddress, pin);
+
+ // static, 2-mux, 3-mux, 4-mux
+ if(muxRate <= (LCDMX1 | LCDMX0))
+ {
+ if(pin & 1)
+ {
+ HWREG8(baseAddress + OFS_LCDM1 + pin / 2) &= 0x0F;
+ HWREG8(baseAddress + OFS_LCDM1 + pin / 2) |= (value & 0xF) << 4;
+ }
+ else
+ {
+ HWREG8(baseAddress + OFS_LCDM1 + pin / 2) &= 0xF0;
+ HWREG8(baseAddress + OFS_LCDM1 + pin / 2) |= (value & 0xF);
+ }
+ }
+ else
+ {
+ //5-mux, 6-mux, 7-mux, 8-mux
+ HWREG8(baseAddress + OFS_LCDM1 + pin) = value;
+ }
+}
+
+void LCD_C_setBlinkingMemory(uint16_t baseAddress, uint8_t pin, uint8_t value)
+{
+ uint8_t muxRate = HWREG16(baseAddress + OFS_LCDCCTL0)
+ & (LCDMX2 | LCDMX1 | LCDMX0);
+
+ // static, 2-mux, 3-mux, 4-mux
+ if (muxRate <= (LCDMX1 | LCDMX0)) {
+ if (pin & 1) {
+ HWREG8(baseAddress + OFS_LCDBM1 + pin/2) &= 0x0F;
+ HWREG8(baseAddress + OFS_LCDBM1 + pin/2) |= (value & 0xF) << 4;
+ }
+ else {
+ HWREG8(baseAddress + OFS_LCDBM1 + pin/2) &= 0xF0;
+ HWREG8(baseAddress + OFS_LCDBM1 + pin/2) |= (value & 0xF);
+ }
+ }
+ else {
+ //5-mux, 6-mux, 7-mux, 8-mux
+ HWREG8(baseAddress + OFS_LCDBM1 + pin) = value;
+ }
+
+}
+
+uint8_t LCD_C_getBlinkingMemory(uint16_t baseAddress, uint8_t pin)
+{
+ uint8_t muxRate = HWREG16(baseAddress + OFS_LCDCCTL0)
+ & (LCDMX2 | LCDMX1 | LCDMX0);
+
+ // static, 2-mux, 3-mux, 4-mux
+ if(muxRate <= (LCDMX1 | LCDMX0))
+ {
+ if(pin & 1)
+ {
+ return (HWREG8(baseAddress + OFS_LCDBM1 + pin / 2) >> 4);
+ }
+ else
+ {
+ return (HWREG8(baseAddress + OFS_LCDBM1 + pin / 2) & 0xF);
+ }
+ }
+ else
+ {
+ //5-mux, 6-mux, 7-mux, 8-mux
+ return HWREG8(baseAddress + OFS_LCDBM1 + pin);
+ }
+}
+
+void LCD_C_setBlinkingMemoryWithoutOverwrite(uint16_t baseAddress, uint8_t pin, uint8_t value)
+{
+ uint8_t muxRate = HWREG16(baseAddress + OFS_LCDCCTL0)
+ & (LCDMX2 | LCDMX1 | LCDMX0);
+
+ value |= LCD_C_getBlinkingMemory(baseAddress, pin);
+
+ // static, 2-mux, 3-mux, 4-mux
+ if(muxRate <= (LCDMX1 | LCDMX0))
+ {
+ if(pin & 1)
+ {
+ HWREG8(baseAddress + OFS_LCDBM1 + pin / 2) &= 0x0F;
+ HWREG8(baseAddress + OFS_LCDBM1 + pin / 2) |= (value & 0xF) << 4;
+ }
+ else
+ {
+ HWREG8(baseAddress + OFS_LCDBM1 + pin / 2) &= 0xF0;
+ HWREG8(baseAddress + OFS_LCDBM1 + pin / 2) |= (value & 0xF);
+ }
+ }
+ else
+ {
+ //5-mux, 6-mux, 7-mux, 8-mux
+ HWREG8(baseAddress + OFS_LCDBM1 + pin) = value;
+ }
+}
+
+void LCD_C_configChargePump(uint16_t baseAddress, uint16_t syncToClock,
+ uint16_t functionControl)
+{
+ HWREG16(baseAddress + OFS_LCDCCPCTL) &= ~(LCDCPCLKSYNC);
+ HWREG16(baseAddress + OFS_LCDCCPCTL) &= ~(LCDCPDIS7 | LCDCPDIS6 | LCDCPDIS5
+ | LCDCPDIS4 | LCDCPDIS3 | LCDCPDIS2 | LCDCPDIS1 | LCDCPDIS0);
+
+ HWREG16(baseAddress + OFS_LCDCCPCTL) |= syncToClock | functionControl;
+}
+
+
+#endif
+//*****************************************************************************
+//
+//! Close the doxygen group for lcd_c_api
+//! @}
+//
+//*****************************************************************************
diff --git a/Apps/FlightSoftware/MotorControl/driverlib/lcd_c.h b/Apps/FlightSoftware/MotorControl/driverlib/lcd_c.h
new file mode 100644
index 000000000..ad0ede42d
--- /dev/null
+++ b/Apps/FlightSoftware/MotorControl/driverlib/lcd_c.h
@@ -0,0 +1,1379 @@
+/* --COPYRIGHT--,BSD
+ * Copyright (c) 2017, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * --/COPYRIGHT--*/
+//*****************************************************************************
+//
+// lcd_c.h - Driver for the LCD_C Module.
+//
+//*****************************************************************************
+
+#ifndef __MSP430WARE_LCD_C_H__
+#define __MSP430WARE_LCD_C_H__
+
+#include "inc/hw_memmap.h"
+
+#ifdef __MSP430_HAS_LCD_C__
+
+//*****************************************************************************
+//
+// If building with a C++ compiler, make all of the definitions in this header
+// have a C binding.
+//
+//*****************************************************************************
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+#include "inc/hw_memmap.h"
+//*****************************************************************************
+//
+//! \brief Used in the LCD_C_init() function as the initParams parameter.
+//
+//*****************************************************************************
+typedef struct LCD_C_initParam {
+ //! Selects the clock that will be used by the LCD.
+ //! \n Valid values are:
+ //! - \b LCD_C_CLOCKSOURCE_ACLK [Default]
+ //! - \b LCD_C_CLOCKSOURCE_VLOCLK
+ uint16_t clockSource;
+ //! Selects the divider for LCD_frequency.
+ //! \n Valid values are:
+ //! - \b LCD_C_CLOCKDIVIDER_1 [Default]
+ //! - \b LCD_C_CLOCKDIVIDER_2
+ //! - \b LCD_C_CLOCKDIVIDER_3
+ //! - \b LCD_C_CLOCKDIVIDER_4
+ //! - \b LCD_C_CLOCKDIVIDER_5
+ //! - \b LCD_C_CLOCKDIVIDER_6
+ //! - \b LCD_C_CLOCKDIVIDER_7
+ //! - \b LCD_C_CLOCKDIVIDER_8
+ //! - \b LCD_C_CLOCKDIVIDER_9
+ //! - \b LCD_C_CLOCKDIVIDER_10
+ //! - \b LCD_C_CLOCKDIVIDER_11
+ //! - \b LCD_C_CLOCKDIVIDER_12
+ //! - \b LCD_C_CLOCKDIVIDER_13
+ //! - \b LCD_C_CLOCKDIVIDER_14
+ //! - \b LCD_C_CLOCKDIVIDER_15
+ //! - \b LCD_C_CLOCKDIVIDER_16
+ //! - \b LCD_C_CLOCKDIVIDER_17
+ //! - \b LCD_C_CLOCKDIVIDER_18
+ //! - \b LCD_C_CLOCKDIVIDER_19
+ //! - \b LCD_C_CLOCKDIVIDER_20
+ //! - \b LCD_C_CLOCKDIVIDER_21
+ //! - \b LCD_C_CLOCKDIVIDER_22
+ //! - \b LCD_C_CLOCKDIVIDER_23
+ //! - \b LCD_C_CLOCKDIVIDER_24
+ //! - \b LCD_C_CLOCKDIVIDER_25
+ //! - \b LCD_C_CLOCKDIVIDER_26
+ //! - \b LCD_C_CLOCKDIVIDER_27
+ //! - \b LCD_C_CLOCKDIVIDER_28
+ //! - \b LCD_C_CLOCKDIVIDER_29
+ //! - \b LCD_C_CLOCKDIVIDER_30
+ //! - \b LCD_C_CLOCKDIVIDER_31
+ //! - \b LCD_C_CLOCKDIVIDER_32
+ uint16_t clockDivider;
+ //! Selects the prescalar for frequency.
+ //! \n Valid values are:
+ //! - \b LCD_C_CLOCKPRESCALAR_1 [Default]
+ //! - \b LCD_C_CLOCKPRESCALAR_2
+ //! - \b LCD_C_CLOCKPRESCALAR_4
+ //! - \b LCD_C_CLOCKPRESCALAR_8
+ //! - \b LCD_C_CLOCKPRESCALAR_16
+ //! - \b LCD_C_CLOCKPRESCALAR_32
+ uint16_t clockPrescalar;
+ //! Selects LCD mux rate.
+ //! \n Valid values are:
+ //! - \b LCD_C_STATIC [Default]
+ //! - \b LCD_C_2_MUX
+ //! - \b LCD_C_3_MUX
+ //! - \b LCD_C_4_MUX
+ //! - \b LCD_C_5_MUX
+ //! - \b LCD_C_6_MUX
+ //! - \b LCD_C_7_MUX
+ //! - \b LCD_C_8_MUX
+ uint16_t muxRate;
+ //! Selects LCD waveform mode.
+ //! \n Valid values are:
+ //! - \b LCD_C_STANDARD_WAVEFORMS [Default]
+ //! - \b LCD_C_LOW_POWER_WAVEFORMS
+ uint16_t waveforms;
+ //! Sets LCD segment on/off.
+ //! \n Valid values are:
+ //! - \b LCD_C_SEGMENTS_DISABLED [Default]
+ //! - \b LCD_C_SEGMENTS_ENABLED
+ uint16_t segments;
+} LCD_C_initParam;
+
+
+extern const LCD_C_initParam LCD_C_INIT_PARAM;
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the initParams parameter for
+// functions: LCD_C_init().
+//
+//*****************************************************************************
+#define LCD_C_CLOCKSOURCE_ACLK (0x0)
+#define LCD_C_CLOCKSOURCE_VLOCLK (LCDSSEL)
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the initParams parameter for
+// functions: LCD_C_init().
+//
+//*****************************************************************************
+#define LCD_C_CLOCKDIVIDER_1 (LCDDIV_0)
+#define LCD_C_CLOCKDIVIDER_2 (LCDDIV_1)
+#define LCD_C_CLOCKDIVIDER_3 (LCDDIV_2)
+#define LCD_C_CLOCKDIVIDER_4 (LCDDIV_3)
+#define LCD_C_CLOCKDIVIDER_5 (LCDDIV_4)
+#define LCD_C_CLOCKDIVIDER_6 (LCDDIV_5)
+#define LCD_C_CLOCKDIVIDER_7 (LCDDIV_6)
+#define LCD_C_CLOCKDIVIDER_8 (LCDDIV_7)
+#define LCD_C_CLOCKDIVIDER_9 (LCDDIV_8)
+#define LCD_C_CLOCKDIVIDER_10 (LCDDIV_9)
+#define LCD_C_CLOCKDIVIDER_11 (LCDDIV_10)
+#define LCD_C_CLOCKDIVIDER_12 (LCDDIV_11)
+#define LCD_C_CLOCKDIVIDER_13 (LCDDIV_12)
+#define LCD_C_CLOCKDIVIDER_14 (LCDDIV_13)
+#define LCD_C_CLOCKDIVIDER_15 (LCDDIV_14)
+#define LCD_C_CLOCKDIVIDER_16 (LCDDIV_15)
+#define LCD_C_CLOCKDIVIDER_17 (LCDDIV_16)
+#define LCD_C_CLOCKDIVIDER_18 (LCDDIV_17)
+#define LCD_C_CLOCKDIVIDER_19 (LCDDIV_18)
+#define LCD_C_CLOCKDIVIDER_20 (LCDDIV_19)
+#define LCD_C_CLOCKDIVIDER_21 (LCDDIV_20)
+#define LCD_C_CLOCKDIVIDER_22 (LCDDIV_21)
+#define LCD_C_CLOCKDIVIDER_23 (LCDDIV_22)
+#define LCD_C_CLOCKDIVIDER_24 (LCDDIV_23)
+#define LCD_C_CLOCKDIVIDER_25 (LCDDIV_24)
+#define LCD_C_CLOCKDIVIDER_26 (LCDDIV_25)
+#define LCD_C_CLOCKDIVIDER_27 (LCDDIV_26)
+#define LCD_C_CLOCKDIVIDER_28 (LCDDIV_27)
+#define LCD_C_CLOCKDIVIDER_29 (LCDDIV_28)
+#define LCD_C_CLOCKDIVIDER_30 (LCDDIV_29)
+#define LCD_C_CLOCKDIVIDER_31 (LCDDIV_30)
+#define LCD_C_CLOCKDIVIDER_32 (LCDDIV_31)
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the initParams parameter for
+// functions: LCD_C_init().
+//
+//*****************************************************************************
+#define LCD_C_CLOCKPRESCALAR_1 (LCDPRE_0)
+#define LCD_C_CLOCKPRESCALAR_2 (LCDPRE_1)
+#define LCD_C_CLOCKPRESCALAR_4 (LCDPRE_2)
+#define LCD_C_CLOCKPRESCALAR_8 (LCDPRE_3)
+#define LCD_C_CLOCKPRESCALAR_16 (LCDPRE_4)
+#define LCD_C_CLOCKPRESCALAR_32 (LCDPRE_5)
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the initParams parameter for
+// functions: LCD_C_init().
+//
+//*****************************************************************************
+#define LCD_C_STATIC (0x0)
+#define LCD_C_2_MUX (LCDMX0)
+#define LCD_C_3_MUX (LCDMX1)
+#define LCD_C_4_MUX (LCDMX1 | LCDMX0)
+#define LCD_C_5_MUX (LCDMX2)
+#define LCD_C_6_MUX (LCDMX2 | LCDMX0)
+#define LCD_C_7_MUX (LCDMX2 | LCDMX1)
+#define LCD_C_8_MUX (LCDMX2 | LCDMX1 | LCDMX0)
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the initParams parameter for
+// functions: LCD_C_init().
+//
+//*****************************************************************************
+#define LCD_C_STANDARD_WAVEFORMS (0x0)
+#define LCD_C_LOW_POWER_WAVEFORMS (LCDLP)
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the initParams parameter for
+// functions: LCD_C_init().
+//
+//*****************************************************************************
+#define LCD_C_SEGMENTS_DISABLED (0x0)
+#define LCD_C_SEGMENTS_ENABLED (LCDSON)
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the mask parameter for
+// functions: LCD_C_clearInterrupt(), LCD_C_getInterruptStatus(),
+// LCD_C_enableInterrupt(), and LCD_C_disableInterrupt() as well as returned by
+// the LCD_C_getInterruptStatus() function.
+//
+//*****************************************************************************
+#define LCD_C_NO_CAPACITANCE_CONNECTED_INTERRUPT (LCDNOCAPIE)
+#define LCD_C_BLINKING_SEGMENTS_ON_INTERRUPT (LCDBLKONIE)
+#define LCD_C_BLINKING_SEGMENTS_OFF_INTERRUPT (LCDBLKOFFIE)
+#define LCD_C_FRAME_INTERRUPT (LCDFRMIE)
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the displayMemory parameter
+// for functions: LCD_C_selectDisplayMemory().
+//
+//*****************************************************************************
+#define LCD_C_DISPLAYSOURCE_MEMORY (0x0)
+#define LCD_C_DISPLAYSOURCE_BLINKINGMEMORY (LCDDISP)
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the clockDivider parameter
+// for functions: LCD_C_setBlinkingControl().
+//
+//*****************************************************************************
+#define LCD_C_BLINK_FREQ_CLOCK_DIVIDER_1 (0x0)
+#define LCD_C_BLINK_FREQ_CLOCK_DIVIDER_2 (LCDBLKDIV0)
+#define LCD_C_BLINK_FREQ_CLOCK_DIVIDER_3 (LCDBLKDIV1)
+#define LCD_C_BLINK_FREQ_CLOCK_DIVIDER_4 (LCDBLKDIV0 | LCDBLKDIV1)
+#define LCD_C_BLINK_FREQ_CLOCK_DIVIDER_5 (LCDBLKDIV2)
+#define LCD_C_BLINK_FREQ_CLOCK_DIVIDER_6 (LCDBLKDIV2 | LCDBLKDIV0)
+#define LCD_C_BLINK_FREQ_CLOCK_DIVIDER_7 (LCDBLKDIV2 | LCDBLKDIV1)
+#define LCD_C_BLINK_FREQ_CLOCK_DIVIDER_8 (LCDBLKDIV2 | LCDBLKDIV1 | LCDBLKDIV0)
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the clockPrescalar parameter
+// for functions: LCD_C_setBlinkingControl().
+//
+//*****************************************************************************
+#define LCD_C_BLINK_FREQ_CLOCK_PRESCALAR_512 (0x0)
+#define LCD_C_BLINK_FREQ_CLOCK_PRESCALAR_1024 (LCDBLKPRE0)
+#define LCD_C_BLINK_FREQ_CLOCK_PRESCALAR_2048 (LCDBLKPRE1)
+#define LCD_C_BLINK_FREQ_CLOCK_PRESCALAR_4096 (LCDBLKPRE1 | LCDBLKPRE0)
+#define LCD_C_BLINK_FREQ_CLOCK_PRESCALAR_8162 (LCDBLKPRE2)
+#define LCD_C_BLINK_FREQ_CLOCK_PRESCALAR_16384 (LCDBLKPRE2 | LCDBLKPRE0)
+#define LCD_C_BLINK_FREQ_CLOCK_PRESCALAR_32768 (LCDBLKPRE2 | LCDBLKPRE1)
+#define LCD_C_BLINK_FREQ_CLOCK_PRESCALAR_65536 \
+ (LCDBLKPRE2 | LCDBLKPRE1 | LCDBLKPRE0)
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the blinkingMode parameter
+// for functions: LCD_C_setBlinkingControl().
+//
+//*****************************************************************************
+#define LCD_C_BLINK_MODE_DISABLED (LCDBLKMOD_0)
+#define LCD_C_BLINK_MODE_INDIVIDUAL_SEGMENTS (LCDBLKMOD_1)
+#define LCD_C_BLINK_MODE_ALL_SEGMENTS (LCDBLKMOD_2)
+#define LCD_C_BLINK_MODE_SWITCHING_BETWEEN_DISPLAY_CONTENTS (LCDBLKMOD_3)
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the bias parameter for
+// functions: LCD_C_selectBias().
+//
+//*****************************************************************************
+#define LCD_C_BIAS_1_3 (0x0)
+#define LCD_C_BIAS_1_2 (LCD2B)
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the reference parameter for
+// functions: LCD_C_selectChargePumpReference().
+//
+//*****************************************************************************
+#define LCD_C_INTERNAL_REFERENCE_VOLTAGE (VLCDREF_0)
+#define LCD_C_EXTERNAL_REFERENCE_VOLTAGE (VLCDREF_1)
+#define LCD_C_INTERNAL_REFERENCE_VOLTAGE_SWITCHED_TO_EXTERNAL_PIN (VLCDREF_2)
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the vlcdSource parameter for
+// functions: LCD_C_setVLCDSource().
+//
+//*****************************************************************************
+#define LCD_C_VLCD_GENERATED_INTERNALLY (0x0)
+#define LCD_C_VLCD_SOURCED_EXTERNALLY (VLCDEXT)
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the v2v3v4Source parameter
+// for functions: LCD_C_setVLCDSource().
+//
+//*****************************************************************************
+#define LCD_C_V2V3V4_GENERATED_INTERNALLY_NOT_SWITCHED_TO_PINS (0x0)
+#define LCD_C_V2V3V4_GENERATED_INTERNALLY_SWITCHED_TO_PINS (LCDREXT)
+#define LCD_C_V2V3V4_SOURCED_EXTERNALLY (LCDEXTBIAS)
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the v5Source parameter for
+// functions: LCD_C_setVLCDSource().
+//
+//*****************************************************************************
+#define LCD_C_V5_VSS (0x0)
+#define LCD_C_V5_SOURCED_FROM_R03 (R03EXT)
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the voltage parameter for
+// functions: LCD_C_setVLCDVoltage().
+//
+//*****************************************************************************
+#define LCD_C_CHARGEPUMP_DISABLED (0x0)
+#define LCD_C_CHARGEPUMP_VOLTAGE_2_60V_OR_2_17VREF (VLCD0)
+#define LCD_C_CHARGEPUMP_VOLTAGE_2_66V_OR_2_22VREF (VLCD1)
+#define LCD_C_CHARGEPUMP_VOLTAGE_2_72V_OR_2_27VREF (VLCD1 | VLCD0)
+#define LCD_C_CHARGEPUMP_VOLTAGE_2_78V_OR_2_32VREF (VLCD2)
+#define LCD_C_CHARGEPUMP_VOLTAGE_2_84V_OR_2_37VREF (VLCD2 | VLCD0)
+#define LCD_C_CHARGEPUMP_VOLTAGE_2_90V_OR_2_42VREF (VLCD2 | VLCD1)
+#define LCD_C_CHARGEPUMP_VOLTAGE_2_96V_OR_2_47VREF (VLCD2 | VLCD1 | VLCD0)
+#define LCD_C_CHARGEPUMP_VOLTAGE_3_02V_OR_2_52VREF (VLCD3)
+#define LCD_C_CHARGEPUMP_VOLTAGE_3_08V_OR_2_57VREF (VLCD3 | VLCD0)
+#define LCD_C_CHARGEPUMP_VOLTAGE_3_14V_OR_2_62VREF (VLCD3 | VLCD1)
+#define LCD_C_CHARGEPUMP_VOLTAGE_3_20V_OR_2_67VREF (VLCD3 | VLCD1 | VLCD0)
+#define LCD_C_CHARGEPUMP_VOLTAGE_3_26V_OR_2_72VREF (VLCD3 | VLCD2)
+#define LCD_C_CHARGEPUMP_VOLTAGE_3_32V_OR_2_77VREF (VLCD3 | VLCD2 | VLCD0)
+#define LCD_C_CHARGEPUMP_VOLTAGE_3_38V_OR_2_82VREF (VLCD3 | VLCD2 | VLCD1)
+#define LCD_C_CHARGEPUMP_VOLTAGE_3_44V_OR_2_87VREF \
+ (VLCD3 | VLCD2 | VLCD1 | VLCD0)
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the startPin parameter for
+// functions: LCD_C_setPinAsLCDFunctionEx(); the endPin parameter for
+// functions: LCD_C_setPinAsLCDFunctionEx(); the pin parameter for functions:
+// LCD_C_setPinAsLCDFunction(), LCD_C_setPinAsPortFunction(),
+// LCD_C_setMemory(), and LCD_C_setBlinkingMemory().
+//
+//*****************************************************************************
+#define LCD_C_SEGMENT_LINE_0 (0)
+#define LCD_C_SEGMENT_LINE_1 (1)
+#define LCD_C_SEGMENT_LINE_2 (2)
+#define LCD_C_SEGMENT_LINE_3 (3)
+#define LCD_C_SEGMENT_LINE_4 (4)
+#define LCD_C_SEGMENT_LINE_5 (5)
+#define LCD_C_SEGMENT_LINE_6 (6)
+#define LCD_C_SEGMENT_LINE_7 (7)
+#define LCD_C_SEGMENT_LINE_8 (8)
+#define LCD_C_SEGMENT_LINE_9 (9)
+#define LCD_C_SEGMENT_LINE_10 (10)
+#define LCD_C_SEGMENT_LINE_11 (11)
+#define LCD_C_SEGMENT_LINE_12 (12)
+#define LCD_C_SEGMENT_LINE_13 (13)
+#define LCD_C_SEGMENT_LINE_14 (14)
+#define LCD_C_SEGMENT_LINE_15 (15)
+#define LCD_C_SEGMENT_LINE_16 (16)
+#define LCD_C_SEGMENT_LINE_17 (17)
+#define LCD_C_SEGMENT_LINE_18 (18)
+#define LCD_C_SEGMENT_LINE_19 (19)
+#define LCD_C_SEGMENT_LINE_20 (20)
+#define LCD_C_SEGMENT_LINE_21 (21)
+#define LCD_C_SEGMENT_LINE_22 (22)
+#define LCD_C_SEGMENT_LINE_23 (23)
+#define LCD_C_SEGMENT_LINE_24 (24)
+#define LCD_C_SEGMENT_LINE_25 (25)
+#define LCD_C_SEGMENT_LINE_26 (26)
+#define LCD_C_SEGMENT_LINE_27 (27)
+#define LCD_C_SEGMENT_LINE_28 (28)
+#define LCD_C_SEGMENT_LINE_29 (29)
+#define LCD_C_SEGMENT_LINE_30 (30)
+#define LCD_C_SEGMENT_LINE_31 (31)
+#define LCD_C_SEGMENT_LINE_32 (32)
+#define LCD_C_SEGMENT_LINE_33 (33)
+#define LCD_C_SEGMENT_LINE_34 (34)
+#define LCD_C_SEGMENT_LINE_35 (35)
+#define LCD_C_SEGMENT_LINE_36 (36)
+#define LCD_C_SEGMENT_LINE_37 (37)
+#define LCD_C_SEGMENT_LINE_38 (38)
+#define LCD_C_SEGMENT_LINE_39 (39)
+#define LCD_C_SEGMENT_LINE_40 (40)
+#define LCD_C_SEGMENT_LINE_41 (41)
+#define LCD_C_SEGMENT_LINE_42 (42)
+#define LCD_C_SEGMENT_LINE_43 (43)
+#define LCD_C_SEGMENT_LINE_44 (44)
+#define LCD_C_SEGMENT_LINE_45 (45)
+#define LCD_C_SEGMENT_LINE_46 (46)
+#define LCD_C_SEGMENT_LINE_47 (47)
+#define LCD_C_SEGMENT_LINE_48 (48)
+#define LCD_C_SEGMENT_LINE_49 (49)
+#define LCD_C_SEGMENT_LINE_50 (50)
+#define LCD_C_SEGMENT_LINE_51 (51)
+#define LCD_C_SEGMENT_LINE_52 (52)
+#define LCD_C_SEGMENT_LINE_53 (53)
+#define LCD_C_SEGMENT_LINE_54 (54)
+#define LCD_C_SEGMENT_LINE_55 (55)
+#define LCD_C_SEGMENT_LINE_56 (56)
+#define LCD_C_SEGMENT_LINE_57 (57)
+#define LCD_C_SEGMENT_LINE_58 (58)
+#define LCD_C_SEGMENT_LINE_59 (59)
+#define LCD_C_SEGMENT_LINE_60 (60)
+#define LCD_C_SEGMENT_LINE_61 (61)
+#define LCD_C_SEGMENT_LINE_62 (62)
+#define LCD_C_SEGMENT_LINE_63 (63)
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the syncToClock parameter for
+// functions: LCD_C_configChargePump().
+//
+//*****************************************************************************
+#define LCD_C_SYNCHRONIZATION_DISABLED (0x0)
+#define LCD_C_SYNCHRONIZATION_ENABLED (LCDCPCLKSYNC)
+
+//*****************************************************************************
+//
+// Prototypes for the APIs.
+//
+//*****************************************************************************
+
+//*****************************************************************************
+//
+//! \brief Initializes the LCD Module.
+//!
+//! This function initializes the LCD but without turning on. It bascially
+//! setup the clock source, clock divider, clock prescalar, mux rate, low-power
+//! waveform and segments on/off. After calling this function, user can config
+//! charge pump, internal reference voltage and voltage sources.
+//!
+//! \param baseAddress is the base address of the LCD_C module.
+//! \param initParams is the pointer to LCD_InitParam structure. See the
+//! following parameters for each field.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void LCD_C_init(uint16_t baseAddress,
+ LCD_C_initParam *initParams);
+
+//*****************************************************************************
+//
+//! \brief Turns on the LCD module.
+//!
+//! \param baseAddress is the base address of the LCD_C module.
+//!
+//! Modified bits are \b LCDON of \b LCDCTL0 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void LCD_C_on(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Turns off the LCD module.
+//!
+//! \param baseAddress is the base address of the LCD_C module.
+//!
+//! Modified bits are \b LCDON of \b LCDCTL0 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void LCD_C_off(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Clears the LCD interrupt flags.
+//!
+//! \param baseAddress is the base address of the LCD_C module.
+//! \param mask is the masked interrupt flag to be cleared.
+//! Valid values are:
+//! - \b LCD_C_NO_CAPACITANCE_CONNECTED_INTERRUPT
+//! - \b LCD_C_BLINKING_SEGMENTS_ON_INTERRUPT
+//! - \b LCD_C_BLINKING_SEGMENTS_OFF_INTERRUPT
+//! - \b LCD_C_FRAME_INTERRUPT
+//! \n Modified bits are \b LCDCAPIFG, \b LCDBLKONIFG, \b LCDBLKOFFIFG
+//! and \b LCDFRMIFG of \b LCDCTL1 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void LCD_C_clearInterrupt(uint16_t baseAddress,
+ uint16_t mask);
+
+//*****************************************************************************
+//
+//! \brief Gets the LCD interrupt status.
+//!
+//! \param baseAddress is the base address of the LCD_C module.
+//! \param mask is the masked interrupt flags.
+//! Valid values are:
+//! - \b LCD_C_NO_CAPACITANCE_CONNECTED_INTERRUPT
+//! - \b LCD_C_BLINKING_SEGMENTS_ON_INTERRUPT
+//! - \b LCD_C_BLINKING_SEGMENTS_OFF_INTERRUPT
+//! - \b LCD_C_FRAME_INTERRUPT
+//!
+//! \return None
+//! Return Logical OR of any of the following:
+//! - \b LCD_C_NO_CAPACITANCE_CONNECTED_INTERRUPT
+//! - \b LCD_C_BLINKING_SEGMENTS_ON_INTERRUPT
+//! - \b LCD_C_BLINKING_SEGMENTS_OFF_INTERRUPT
+//! - \b LCD_C_FRAME_INTERRUPT
+//! \n indicating the status of the masked interrupts
+//
+//*****************************************************************************
+extern uint16_t LCD_C_getInterruptStatus(uint16_t baseAddress,
+ uint16_t mask);
+
+//*****************************************************************************
+//
+//! \brief Enables LCD interrupt sources.
+//!
+//! \param baseAddress is the base address of the LCD_C module.
+//! \param mask is the interrupts to be enabled.
+//! Valid values are:
+//! - \b LCD_C_NO_CAPACITANCE_CONNECTED_INTERRUPT
+//! - \b LCD_C_BLINKING_SEGMENTS_ON_INTERRUPT
+//! - \b LCD_C_BLINKING_SEGMENTS_OFF_INTERRUPT
+//! - \b LCD_C_FRAME_INTERRUPT
+//! \n Modified bits are \b LCDCAPIE, \b LCDBLKONIE, \b LCDBLKOFFIE and
+//! \b LCDFRMIE of \b LCDCTL1 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void LCD_C_enableInterrupt(uint16_t baseAddress,
+ uint16_t mask);
+
+//*****************************************************************************
+//
+//! \brief Disables LCD interrupt sources.
+//!
+//! \param baseAddress is the base address of the LCD_C module.
+//! \param mask is the interrupts to be disabled.
+//! Valid values are:
+//! - \b LCD_C_NO_CAPACITANCE_CONNECTED_INTERRUPT
+//! - \b LCD_C_BLINKING_SEGMENTS_ON_INTERRUPT
+//! - \b LCD_C_BLINKING_SEGMENTS_OFF_INTERRUPT
+//! - \b LCD_C_FRAME_INTERRUPT
+//! \n Modified bits are \b LCDCAPIE, \b LCDBLKONIE, \b LCDBLKOFFIE and
+//! \b LCDFRMIE of \b LCDCTL1 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void LCD_C_disableInterrupt(uint16_t baseAddress,
+ uint16_t mask);
+
+//*****************************************************************************
+//
+//! \brief Clears all LCD memory registers.
+//!
+//! \param baseAddress is the base address of the LCD_C module.
+//!
+//! Modified bits are \b LCDCLRM of \b LCDMEMCTL register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void LCD_C_clearMemory(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Clears all LCD blinking memory registers.
+//!
+//! \param baseAddress is the base address of the LCD_C module.
+//!
+//! Modified bits are \b LCDCLRBM of \b LCDMEMCTL register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void LCD_C_clearBlinkingMemory(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Selects display memory.
+//!
+//! This function selects display memory either from memory or blinking memory.
+//! Please note if the blinking mode is selected as
+//! LCD_BLINKMODE_INDIVIDUALSEGMENTS or LCD_BLINKMODE_ALLSEGMENTS or mux rate
+//! >=5, display memory can not be changed. If
+//! LCD_BLINKMODE_SWITCHDISPLAYCONTENTS is selected, display memory bit
+//! reflects current displayed memory.
+//!
+//! \param baseAddress is the base address of the LCD_C module.
+//! \param displayMemory is the desired displayed memory.
+//! Valid values are:
+//! - \b LCD_C_DISPLAYSOURCE_MEMORY [Default]
+//! - \b LCD_C_DISPLAYSOURCE_BLINKINGMEMORY
+//! \n Modified bits are \b LCDDISP of \b LCDMEMCTL register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void LCD_C_selectDisplayMemory(uint16_t baseAddress,
+ uint16_t displayMemory);
+
+//*****************************************************************************
+//
+//! \brief Sets the blink settings.
+//!
+//! \param baseAddress is the base address of the LCD_C module.
+//! \param clockDivider is the clock divider for blinking frequency.
+//! Valid values are:
+//! - \b LCD_C_BLINK_FREQ_CLOCK_DIVIDER_1 [Default]
+//! - \b LCD_C_BLINK_FREQ_CLOCK_DIVIDER_2
+//! - \b LCD_C_BLINK_FREQ_CLOCK_DIVIDER_3
+//! - \b LCD_C_BLINK_FREQ_CLOCK_DIVIDER_4
+//! - \b LCD_C_BLINK_FREQ_CLOCK_DIVIDER_5
+//! - \b LCD_C_BLINK_FREQ_CLOCK_DIVIDER_6
+//! - \b LCD_C_BLINK_FREQ_CLOCK_DIVIDER_7
+//! - \b LCD_C_BLINK_FREQ_CLOCK_DIVIDER_8
+//! \n Modified bits are \b LCDBLKDIVx of \b LCDBLKCTL register.
+//! \param clockPrescalar is the clock pre-scalar for blinking frequency.
+//! Valid values are:
+//! - \b LCD_C_BLINK_FREQ_CLOCK_PRESCALAR_512 [Default]
+//! - \b LCD_C_BLINK_FREQ_CLOCK_PRESCALAR_1024
+//! - \b LCD_C_BLINK_FREQ_CLOCK_PRESCALAR_2048
+//! - \b LCD_C_BLINK_FREQ_CLOCK_PRESCALAR_4096
+//! - \b LCD_C_BLINK_FREQ_CLOCK_PRESCALAR_8162
+//! - \b LCD_C_BLINK_FREQ_CLOCK_PRESCALAR_16384
+//! - \b LCD_C_BLINK_FREQ_CLOCK_PRESCALAR_32768
+//! - \b LCD_C_BLINK_FREQ_CLOCK_PRESCALAR_65536
+//! \n Modified bits are \b LCDBLKPREx of \b LCDBLKCTL register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void LCD_C_setBlinkingControl(uint16_t baseAddress,
+ uint8_t clockDivider,
+ uint8_t clockPrescalar,
+ uint8_t mode);
+
+//*****************************************************************************
+//
+//! \brief Enables the charge pump.
+//!
+//! \param baseAddress is the base address of the LCD_C module.
+//!
+//! Modified bits are \b LCDCPEN of \b LCDVCTL register; bits \b LCDON of \b
+//! LCDCTL0 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void LCD_C_enableChargePump(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Disables the charge pump.
+//!
+//! \param baseAddress is the base address of the LCD_C module.
+//!
+//! Modified bits are \b LCDCPEN of \b LCDVCTL register; bits \b LCDON of \b
+//! LCDCTL0 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void LCD_C_disableChargePump(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Selects the bias level.
+//!
+//! \param baseAddress is the base address of the LCD_C module.
+//! \param bias is the select for bias level.
+//! Valid values are:
+//! - \b LCD_C_BIAS_1_3 [Default] - 1/3 bias
+//! - \b LCD_C_BIAS_1_2 - 1/2 bias
+//!
+//! Modified bits are \b LCD2B of \b LCDVCTL register; bits \b LCDON of \b
+//! LCDCTL0 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void LCD_C_selectBias(uint16_t baseAddress,
+ uint16_t bias);
+
+//*****************************************************************************
+//
+//! \brief Selects the charge pump reference.
+//!
+//! The charge pump reference does not support
+//! LCD_C_EXTERNAL_REFERENCE_VOLTAGE,
+//! LCD_C_INTERNAL_REFERENCE_VOLTAGE_SWITCHED_TO_EXTERNAL_PIN when
+//! LCD_C_V2V3V4_SOURCED_EXTERNALLY or
+//! LCD_C_V2V3V4_GENERATED_INTERNALLY_SWITCHED_TO_PINS is selected.
+//!
+//! \param baseAddress is the base address of the LCD_C module.
+//! \param reference is the select for charge pump reference.
+//! Valid values are:
+//! - \b LCD_C_INTERNAL_REFERENCE_VOLTAGE [Default]
+//! - \b LCD_C_EXTERNAL_REFERENCE_VOLTAGE
+//! - \b LCD_C_INTERNAL_REFERENCE_VOLTAGE_SWITCHED_TO_EXTERNAL_PIN
+//!
+//! Modified bits are \b VLCDREFx of \b LCDVCTL register; bits \b LCDON of \b
+//! LCDCTL0 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void LCD_C_selectChargePumpReference(uint16_t baseAddress,
+ uint16_t reference);
+
+//*****************************************************************************
+//
+//! \brief Sets the voltage source for V2/V3/V4 and V5.
+//!
+//! The charge pump reference does not support
+//! LCD_C_EXTERNAL_REFERENCE_VOLTAGE,
+//! LCD_C_INTERNAL_REFERENCE_VOLTAGE_SWITCHED_TO_EXTERNAL_PIN when
+//! LCD_C_V2V3V4_SOURCED_EXTERNALLY or
+//! LCD_C_V2V3V4_GENERATED_INTERNALLY_SWITCHED_TO_PINS is selected.
+//!
+//! \param baseAddress is the base address of the LCD_C module.
+//! \param vlcdSource is the V(LCD) source select.
+//! Valid values are:
+//! - \b LCD_C_VLCD_GENERATED_INTERNALLY [Default]
+//! - \b LCD_C_VLCD_SOURCED_EXTERNALLY
+//! \param v2v3v4Source is the V2/V3/V4 source select.
+//! Valid values are:
+//! - \b LCD_C_V2V3V4_GENERATED_INTERNALLY_NOT_SWITCHED_TO_PINS
+//! [Default]
+//! - \b LCD_C_V2V3V4_GENERATED_INTERNALLY_SWITCHED_TO_PINS
+//! - \b LCD_C_V2V3V4_SOURCED_EXTERNALLY
+//! \param v5Source is the V5 source select.
+//! Valid values are:
+//! - \b LCD_C_V5_VSS [Default]
+//! - \b LCD_C_V5_SOURCED_FROM_R03
+//!
+//! Modified bits are \b VLCDEXT, \b LCDREXT, \b LCDEXTBIAS and \b R03EXT of \b
+//! LCDVCTL register; bits \b LCDON of \b LCDCTL0 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void LCD_C_setVLCDSource(uint16_t baseAddress,
+ uint16_t vlcdSource,
+ uint16_t v2v3v4Source,
+ uint16_t v5Source);
+
+//*****************************************************************************
+//
+//! \brief Selects the charge pump reference.
+//!
+//! Sets LCD charge pump voltage.
+//!
+//! \param baseAddress is the base address of the LCD_C module.
+//! \param voltage is the charge pump select.
+//! Valid values are:
+//! - \b LCD_C_CHARGEPUMP_DISABLED [Default]
+//! - \b LCD_C_CHARGEPUMP_VOLTAGE_2_60V_OR_2_17VREF
+//! - \b LCD_C_CHARGEPUMP_VOLTAGE_2_66V_OR_2_22VREF
+//! - \b LCD_C_CHARGEPUMP_VOLTAGE_2_72V_OR_2_27VREF
+//! - \b LCD_C_CHARGEPUMP_VOLTAGE_2_78V_OR_2_32VREF
+//! - \b LCD_C_CHARGEPUMP_VOLTAGE_2_84V_OR_2_37VREF
+//! - \b LCD_C_CHARGEPUMP_VOLTAGE_2_90V_OR_2_42VREF
+//! - \b LCD_C_CHARGEPUMP_VOLTAGE_2_96V_OR_2_47VREF
+//! - \b LCD_C_CHARGEPUMP_VOLTAGE_3_02V_OR_2_52VREF
+//! - \b LCD_C_CHARGEPUMP_VOLTAGE_3_08V_OR_2_57VREF
+//! - \b LCD_C_CHARGEPUMP_VOLTAGE_3_14V_OR_2_62VREF
+//! - \b LCD_C_CHARGEPUMP_VOLTAGE_3_20V_OR_2_67VREF
+//! - \b LCD_C_CHARGEPUMP_VOLTAGE_3_26V_OR_2_72VREF
+//! - \b LCD_C_CHARGEPUMP_VOLTAGE_3_32V_OR_2_77VREF
+//! - \b LCD_C_CHARGEPUMP_VOLTAGE_3_38V_OR_2_82VREF
+//! - \b LCD_C_CHARGEPUMP_VOLTAGE_3_44V_OR_2_87VREF
+//!
+//! Modified bits are \b VLCDx of \b LCDVCTL register; bits \b LCDON of \b
+//! LCDCTL0 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void LCD_C_setVLCDVoltage(uint16_t baseAddress,
+ uint16_t voltage);
+
+//*****************************************************************************
+//
+//! \brief Sets the LCD Pin as LCD functions.
+//!
+//! \param baseAddress is the base address of the LCD_C module.
+//! \param pin is the select pin set as LCD function.
+//! Valid values are:
+//! - \b LCD_C_SEGMENT_LINE_0
+//! - \b LCD_C_SEGMENT_LINE_1
+//! - \b LCD_C_SEGMENT_LINE_2
+//! - \b LCD_C_SEGMENT_LINE_3
+//! - \b LCD_C_SEGMENT_LINE_4
+//! - \b LCD_C_SEGMENT_LINE_5
+//! - \b LCD_C_SEGMENT_LINE_6
+//! - \b LCD_C_SEGMENT_LINE_7
+//! - \b LCD_C_SEGMENT_LINE_8
+//! - \b LCD_C_SEGMENT_LINE_9
+//! - \b LCD_C_SEGMENT_LINE_10
+//! - \b LCD_C_SEGMENT_LINE_11
+//! - \b LCD_C_SEGMENT_LINE_12
+//! - \b LCD_C_SEGMENT_LINE_13
+//! - \b LCD_C_SEGMENT_LINE_14
+//! - \b LCD_C_SEGMENT_LINE_15
+//! - \b LCD_C_SEGMENT_LINE_16
+//! - \b LCD_C_SEGMENT_LINE_17
+//! - \b LCD_C_SEGMENT_LINE_18
+//! - \b LCD_C_SEGMENT_LINE_19
+//! - \b LCD_C_SEGMENT_LINE_20
+//! - \b LCD_C_SEGMENT_LINE_21
+//! - \b LCD_C_SEGMENT_LINE_22
+//! - \b LCD_C_SEGMENT_LINE_23
+//! - \b LCD_C_SEGMENT_LINE_24
+//! - \b LCD_C_SEGMENT_LINE_25
+//! - \b LCD_C_SEGMENT_LINE_26
+//! - \b LCD_C_SEGMENT_LINE_27
+//! - \b LCD_C_SEGMENT_LINE_28
+//! - \b LCD_C_SEGMENT_LINE_29
+//! - \b LCD_C_SEGMENT_LINE_30
+//! - \b LCD_C_SEGMENT_LINE_31
+//! - \b LCD_C_SEGMENT_LINE_32
+//! - \b LCD_C_SEGMENT_LINE_33
+//! - \b LCD_C_SEGMENT_LINE_34
+//! - \b LCD_C_SEGMENT_LINE_35
+//! - \b LCD_C_SEGMENT_LINE_36
+//! - \b LCD_C_SEGMENT_LINE_37
+//! - \b LCD_C_SEGMENT_LINE_38
+//! - \b LCD_C_SEGMENT_LINE_39
+//! - \b LCD_C_SEGMENT_LINE_40
+//! - \b LCD_C_SEGMENT_LINE_41
+//! - \b LCD_C_SEGMENT_LINE_42
+//! - \b LCD_C_SEGMENT_LINE_43
+//! - \b LCD_C_SEGMENT_LINE_44
+//! - \b LCD_C_SEGMENT_LINE_45
+//! - \b LCD_C_SEGMENT_LINE_46
+//! - \b LCD_C_SEGMENT_LINE_47
+//! - \b LCD_C_SEGMENT_LINE_48
+//! - \b LCD_C_SEGMENT_LINE_49
+//! - \b LCD_C_SEGMENT_LINE_50
+//! - \b LCD_C_SEGMENT_LINE_51
+//! - \b LCD_C_SEGMENT_LINE_52
+//! - \b LCD_C_SEGMENT_LINE_53
+//! - \b LCD_C_SEGMENT_LINE_54
+//! - \b LCD_C_SEGMENT_LINE_55
+//! - \b LCD_C_SEGMENT_LINE_56
+//! - \b LCD_C_SEGMENT_LINE_57
+//! - \b LCD_C_SEGMENT_LINE_58
+//! - \b LCD_C_SEGMENT_LINE_59
+//! - \b LCD_C_SEGMENT_LINE_60
+//! - \b LCD_C_SEGMENT_LINE_61
+//! - \b LCD_C_SEGMENT_LINE_62
+//! - \b LCD_C_SEGMENT_LINE_63
+//!
+//! Modified bits are \b LCDSx of \b LCDPCTLx register; bits \b LCDON of \b
+//! LCDCTL0 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void LCD_C_setPinAsLCDFunction(uint16_t baseAddress,
+ uint8_t pin);
+
+//*****************************************************************************
+//
+//! \brief Sets the LCD Pin as Port functions.
+//!
+//! \param baseAddress is the base address of the LCD_C module.
+//! \param pin is the select pin set as Port function.
+//! Valid values are:
+//! - \b LCD_C_SEGMENT_LINE_0
+//! - \b LCD_C_SEGMENT_LINE_1
+//! - \b LCD_C_SEGMENT_LINE_2
+//! - \b LCD_C_SEGMENT_LINE_3
+//! - \b LCD_C_SEGMENT_LINE_4
+//! - \b LCD_C_SEGMENT_LINE_5
+//! - \b LCD_C_SEGMENT_LINE_6
+//! - \b LCD_C_SEGMENT_LINE_7
+//! - \b LCD_C_SEGMENT_LINE_8
+//! - \b LCD_C_SEGMENT_LINE_9
+//! - \b LCD_C_SEGMENT_LINE_10
+//! - \b LCD_C_SEGMENT_LINE_11
+//! - \b LCD_C_SEGMENT_LINE_12
+//! - \b LCD_C_SEGMENT_LINE_13
+//! - \b LCD_C_SEGMENT_LINE_14
+//! - \b LCD_C_SEGMENT_LINE_15
+//! - \b LCD_C_SEGMENT_LINE_16
+//! - \b LCD_C_SEGMENT_LINE_17
+//! - \b LCD_C_SEGMENT_LINE_18
+//! - \b LCD_C_SEGMENT_LINE_19
+//! - \b LCD_C_SEGMENT_LINE_20
+//! - \b LCD_C_SEGMENT_LINE_21
+//! - \b LCD_C_SEGMENT_LINE_22
+//! - \b LCD_C_SEGMENT_LINE_23
+//! - \b LCD_C_SEGMENT_LINE_24
+//! - \b LCD_C_SEGMENT_LINE_25
+//! - \b LCD_C_SEGMENT_LINE_26
+//! - \b LCD_C_SEGMENT_LINE_27
+//! - \b LCD_C_SEGMENT_LINE_28
+//! - \b LCD_C_SEGMENT_LINE_29
+//! - \b LCD_C_SEGMENT_LINE_30
+//! - \b LCD_C_SEGMENT_LINE_31
+//! - \b LCD_C_SEGMENT_LINE_32
+//! - \b LCD_C_SEGMENT_LINE_33
+//! - \b LCD_C_SEGMENT_LINE_34
+//! - \b LCD_C_SEGMENT_LINE_35
+//! - \b LCD_C_SEGMENT_LINE_36
+//! - \b LCD_C_SEGMENT_LINE_37
+//! - \b LCD_C_SEGMENT_LINE_38
+//! - \b LCD_C_SEGMENT_LINE_39
+//! - \b LCD_C_SEGMENT_LINE_40
+//! - \b LCD_C_SEGMENT_LINE_41
+//! - \b LCD_C_SEGMENT_LINE_42
+//! - \b LCD_C_SEGMENT_LINE_43
+//! - \b LCD_C_SEGMENT_LINE_44
+//! - \b LCD_C_SEGMENT_LINE_45
+//! - \b LCD_C_SEGMENT_LINE_46
+//! - \b LCD_C_SEGMENT_LINE_47
+//! - \b LCD_C_SEGMENT_LINE_48
+//! - \b LCD_C_SEGMENT_LINE_49
+//! - \b LCD_C_SEGMENT_LINE_50
+//! - \b LCD_C_SEGMENT_LINE_51
+//! - \b LCD_C_SEGMENT_LINE_52
+//! - \b LCD_C_SEGMENT_LINE_53
+//! - \b LCD_C_SEGMENT_LINE_54
+//! - \b LCD_C_SEGMENT_LINE_55
+//! - \b LCD_C_SEGMENT_LINE_56
+//! - \b LCD_C_SEGMENT_LINE_57
+//! - \b LCD_C_SEGMENT_LINE_58
+//! - \b LCD_C_SEGMENT_LINE_59
+//! - \b LCD_C_SEGMENT_LINE_60
+//! - \b LCD_C_SEGMENT_LINE_61
+//! - \b LCD_C_SEGMENT_LINE_62
+//! - \b LCD_C_SEGMENT_LINE_63
+//!
+//! Modified bits are \b LCDSx of \b LCDPCTLx register; bits \b LCDON of \b
+//! LCDCTL0 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void LCD_C_setPinAsPortFunction(uint16_t baseAddress,
+ uint8_t pin);
+
+//*****************************************************************************
+//
+//! \brief Sets the LCD pins as LCD function pin.
+//!
+//! This function sets the LCD pins as LCD function pin. Instead of passing the
+//! all the possible pins, it just requires the start pin and the end pin.
+//!
+//! \param baseAddress is the base address of the LCD_C module.
+//! \param startPin is the starting pin to be configed as LCD function pin.
+//! Valid values are:
+//! - \b LCD_C_SEGMENT_LINE_0
+//! - \b LCD_C_SEGMENT_LINE_1
+//! - \b LCD_C_SEGMENT_LINE_2
+//! - \b LCD_C_SEGMENT_LINE_3
+//! - \b LCD_C_SEGMENT_LINE_4
+//! - \b LCD_C_SEGMENT_LINE_5
+//! - \b LCD_C_SEGMENT_LINE_6
+//! - \b LCD_C_SEGMENT_LINE_7
+//! - \b LCD_C_SEGMENT_LINE_8
+//! - \b LCD_C_SEGMENT_LINE_9
+//! - \b LCD_C_SEGMENT_LINE_10
+//! - \b LCD_C_SEGMENT_LINE_11
+//! - \b LCD_C_SEGMENT_LINE_12
+//! - \b LCD_C_SEGMENT_LINE_13
+//! - \b LCD_C_SEGMENT_LINE_14
+//! - \b LCD_C_SEGMENT_LINE_15
+//! - \b LCD_C_SEGMENT_LINE_16
+//! - \b LCD_C_SEGMENT_LINE_17
+//! - \b LCD_C_SEGMENT_LINE_18
+//! - \b LCD_C_SEGMENT_LINE_19
+//! - \b LCD_C_SEGMENT_LINE_20
+//! - \b LCD_C_SEGMENT_LINE_21
+//! - \b LCD_C_SEGMENT_LINE_22
+//! - \b LCD_C_SEGMENT_LINE_23
+//! - \b LCD_C_SEGMENT_LINE_24
+//! - \b LCD_C_SEGMENT_LINE_25
+//! - \b LCD_C_SEGMENT_LINE_26
+//! - \b LCD_C_SEGMENT_LINE_27
+//! - \b LCD_C_SEGMENT_LINE_28
+//! - \b LCD_C_SEGMENT_LINE_29
+//! - \b LCD_C_SEGMENT_LINE_30
+//! - \b LCD_C_SEGMENT_LINE_31
+//! - \b LCD_C_SEGMENT_LINE_32
+//! - \b LCD_C_SEGMENT_LINE_33
+//! - \b LCD_C_SEGMENT_LINE_34
+//! - \b LCD_C_SEGMENT_LINE_35
+//! - \b LCD_C_SEGMENT_LINE_36
+//! - \b LCD_C_SEGMENT_LINE_37
+//! - \b LCD_C_SEGMENT_LINE_38
+//! - \b LCD_C_SEGMENT_LINE_39
+//! - \b LCD_C_SEGMENT_LINE_40
+//! - \b LCD_C_SEGMENT_LINE_41
+//! - \b LCD_C_SEGMENT_LINE_42
+//! - \b LCD_C_SEGMENT_LINE_43
+//! - \b LCD_C_SEGMENT_LINE_44
+//! - \b LCD_C_SEGMENT_LINE_45
+//! - \b LCD_C_SEGMENT_LINE_46
+//! - \b LCD_C_SEGMENT_LINE_47
+//! - \b LCD_C_SEGMENT_LINE_48
+//! - \b LCD_C_SEGMENT_LINE_49
+//! - \b LCD_C_SEGMENT_LINE_50
+//! - \b LCD_C_SEGMENT_LINE_51
+//! - \b LCD_C_SEGMENT_LINE_52
+//! - \b LCD_C_SEGMENT_LINE_53
+//! - \b LCD_C_SEGMENT_LINE_54
+//! - \b LCD_C_SEGMENT_LINE_55
+//! - \b LCD_C_SEGMENT_LINE_56
+//! - \b LCD_C_SEGMENT_LINE_57
+//! - \b LCD_C_SEGMENT_LINE_58
+//! - \b LCD_C_SEGMENT_LINE_59
+//! - \b LCD_C_SEGMENT_LINE_60
+//! - \b LCD_C_SEGMENT_LINE_61
+//! - \b LCD_C_SEGMENT_LINE_62
+//! - \b LCD_C_SEGMENT_LINE_63
+//! \param endPin is the ending pin to be configed as LCD function pin.
+//! Valid values are:
+//! - \b LCD_C_SEGMENT_LINE_0
+//! - \b LCD_C_SEGMENT_LINE_1
+//! - \b LCD_C_SEGMENT_LINE_2
+//! - \b LCD_C_SEGMENT_LINE_3
+//! - \b LCD_C_SEGMENT_LINE_4
+//! - \b LCD_C_SEGMENT_LINE_5
+//! - \b LCD_C_SEGMENT_LINE_6
+//! - \b LCD_C_SEGMENT_LINE_7
+//! - \b LCD_C_SEGMENT_LINE_8
+//! - \b LCD_C_SEGMENT_LINE_9
+//! - \b LCD_C_SEGMENT_LINE_10
+//! - \b LCD_C_SEGMENT_LINE_11
+//! - \b LCD_C_SEGMENT_LINE_12
+//! - \b LCD_C_SEGMENT_LINE_13
+//! - \b LCD_C_SEGMENT_LINE_14
+//! - \b LCD_C_SEGMENT_LINE_15
+//! - \b LCD_C_SEGMENT_LINE_16
+//! - \b LCD_C_SEGMENT_LINE_17
+//! - \b LCD_C_SEGMENT_LINE_18
+//! - \b LCD_C_SEGMENT_LINE_19
+//! - \b LCD_C_SEGMENT_LINE_20
+//! - \b LCD_C_SEGMENT_LINE_21
+//! - \b LCD_C_SEGMENT_LINE_22
+//! - \b LCD_C_SEGMENT_LINE_23
+//! - \b LCD_C_SEGMENT_LINE_24
+//! - \b LCD_C_SEGMENT_LINE_25
+//! - \b LCD_C_SEGMENT_LINE_26
+//! - \b LCD_C_SEGMENT_LINE_27
+//! - \b LCD_C_SEGMENT_LINE_28
+//! - \b LCD_C_SEGMENT_LINE_29
+//! - \b LCD_C_SEGMENT_LINE_30
+//! - \b LCD_C_SEGMENT_LINE_31
+//! - \b LCD_C_SEGMENT_LINE_32
+//! - \b LCD_C_SEGMENT_LINE_33
+//! - \b LCD_C_SEGMENT_LINE_34
+//! - \b LCD_C_SEGMENT_LINE_35
+//! - \b LCD_C_SEGMENT_LINE_36
+//! - \b LCD_C_SEGMENT_LINE_37
+//! - \b LCD_C_SEGMENT_LINE_38
+//! - \b LCD_C_SEGMENT_LINE_39
+//! - \b LCD_C_SEGMENT_LINE_40
+//! - \b LCD_C_SEGMENT_LINE_41
+//! - \b LCD_C_SEGMENT_LINE_42
+//! - \b LCD_C_SEGMENT_LINE_43
+//! - \b LCD_C_SEGMENT_LINE_44
+//! - \b LCD_C_SEGMENT_LINE_45
+//! - \b LCD_C_SEGMENT_LINE_46
+//! - \b LCD_C_SEGMENT_LINE_47
+//! - \b LCD_C_SEGMENT_LINE_48
+//! - \b LCD_C_SEGMENT_LINE_49
+//! - \b LCD_C_SEGMENT_LINE_50
+//! - \b LCD_C_SEGMENT_LINE_51
+//! - \b LCD_C_SEGMENT_LINE_52
+//! - \b LCD_C_SEGMENT_LINE_53
+//! - \b LCD_C_SEGMENT_LINE_54
+//! - \b LCD_C_SEGMENT_LINE_55
+//! - \b LCD_C_SEGMENT_LINE_56
+//! - \b LCD_C_SEGMENT_LINE_57
+//! - \b LCD_C_SEGMENT_LINE_58
+//! - \b LCD_C_SEGMENT_LINE_59
+//! - \b LCD_C_SEGMENT_LINE_60
+//! - \b LCD_C_SEGMENT_LINE_61
+//! - \b LCD_C_SEGMENT_LINE_62
+//! - \b LCD_C_SEGMENT_LINE_63
+//!
+//! Modified bits are \b LCDSx of \b LCDPCTLx register; bits \b LCDON of \b
+//! LCDCTL0 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void LCD_C_setPinAsLCDFunctionEx(uint16_t baseAddress,
+ uint8_t startPin,
+ uint8_t endPin);
+
+//*****************************************************************************
+//
+//! \brief Sets the LCD memory register.
+//!
+//! \param baseAddress is the base address of the LCD_C module.
+//! \param pin is the select pin for setting value.
+//! Valid values are:
+//! - \b LCD_C_SEGMENT_LINE_0
+//! - \b LCD_C_SEGMENT_LINE_1
+//! - \b LCD_C_SEGMENT_LINE_2
+//! - \b LCD_C_SEGMENT_LINE_3
+//! - \b LCD_C_SEGMENT_LINE_4
+//! - \b LCD_C_SEGMENT_LINE_5
+//! - \b LCD_C_SEGMENT_LINE_6
+//! - \b LCD_C_SEGMENT_LINE_7
+//! - \b LCD_C_SEGMENT_LINE_8
+//! - \b LCD_C_SEGMENT_LINE_9
+//! - \b LCD_C_SEGMENT_LINE_10
+//! - \b LCD_C_SEGMENT_LINE_11
+//! - \b LCD_C_SEGMENT_LINE_12
+//! - \b LCD_C_SEGMENT_LINE_13
+//! - \b LCD_C_SEGMENT_LINE_14
+//! - \b LCD_C_SEGMENT_LINE_15
+//! - \b LCD_C_SEGMENT_LINE_16
+//! - \b LCD_C_SEGMENT_LINE_17
+//! - \b LCD_C_SEGMENT_LINE_18
+//! - \b LCD_C_SEGMENT_LINE_19
+//! - \b LCD_C_SEGMENT_LINE_20
+//! - \b LCD_C_SEGMENT_LINE_21
+//! - \b LCD_C_SEGMENT_LINE_22
+//! - \b LCD_C_SEGMENT_LINE_23
+//! - \b LCD_C_SEGMENT_LINE_24
+//! - \b LCD_C_SEGMENT_LINE_25
+//! - \b LCD_C_SEGMENT_LINE_26
+//! - \b LCD_C_SEGMENT_LINE_27
+//! - \b LCD_C_SEGMENT_LINE_28
+//! - \b LCD_C_SEGMENT_LINE_29
+//! - \b LCD_C_SEGMENT_LINE_30
+//! - \b LCD_C_SEGMENT_LINE_31
+//! - \b LCD_C_SEGMENT_LINE_32
+//! - \b LCD_C_SEGMENT_LINE_33
+//! - \b LCD_C_SEGMENT_LINE_34
+//! - \b LCD_C_SEGMENT_LINE_35
+//! - \b LCD_C_SEGMENT_LINE_36
+//! - \b LCD_C_SEGMENT_LINE_37
+//! - \b LCD_C_SEGMENT_LINE_38
+//! - \b LCD_C_SEGMENT_LINE_39
+//! - \b LCD_C_SEGMENT_LINE_40
+//! - \b LCD_C_SEGMENT_LINE_41
+//! - \b LCD_C_SEGMENT_LINE_42
+//! - \b LCD_C_SEGMENT_LINE_43
+//! - \b LCD_C_SEGMENT_LINE_44
+//! - \b LCD_C_SEGMENT_LINE_45
+//! - \b LCD_C_SEGMENT_LINE_46
+//! - \b LCD_C_SEGMENT_LINE_47
+//! - \b LCD_C_SEGMENT_LINE_48
+//! - \b LCD_C_SEGMENT_LINE_49
+//! - \b LCD_C_SEGMENT_LINE_50
+//! - \b LCD_C_SEGMENT_LINE_51
+//! - \b LCD_C_SEGMENT_LINE_52
+//! - \b LCD_C_SEGMENT_LINE_53
+//! - \b LCD_C_SEGMENT_LINE_54
+//! - \b LCD_C_SEGMENT_LINE_55
+//! - \b LCD_C_SEGMENT_LINE_56
+//! - \b LCD_C_SEGMENT_LINE_57
+//! - \b LCD_C_SEGMENT_LINE_58
+//! - \b LCD_C_SEGMENT_LINE_59
+//! - \b LCD_C_SEGMENT_LINE_60
+//! - \b LCD_C_SEGMENT_LINE_61
+//! - \b LCD_C_SEGMENT_LINE_62
+//! - \b LCD_C_SEGMENT_LINE_63
+//! \param value is the designated value for corresponding pin.
+//!
+//! Modified bits are \b MBITx of \b LCDMx register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void LCD_C_setMemory(uint16_t baseAddress,
+ uint8_t pin,
+ uint8_t value);
+
+//*****************************************************************************
+//
+//! \brief Gets the LCD memory register.
+//!
+//!
+//! \return The uint8_t value of the LCD memory register.
+//
+//*****************************************************************************
+extern uint8_t LCD_C_getMemory(uint16_t baseAddress,
+ uint8_t pin);
+
+//*****************************************************************************
+//
+//! \brief Sets the LCD memory register without erasing what is already there.
+//! Uses LCD getMemory() function.
+//!
+//!
+//! Modified bits are \b MBITx of \b LCDMx register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void LCD_C_setMemoryWithoutOverwrite(uint16_t baseAddress,
+ uint8_t pin,
+ uint8_t value);
+
+//*****************************************************************************
+//
+//! \brief Sets the LCD blink memory register.
+//!
+//! \param baseAddress is the base address of the LCD_C module.
+//! \param pin is the select pin for setting value.
+//! Valid values are:
+//! - \b LCD_C_SEGMENT_LINE_0
+//! - \b LCD_C_SEGMENT_LINE_1
+//! - \b LCD_C_SEGMENT_LINE_2
+//! - \b LCD_C_SEGMENT_LINE_3
+//! - \b LCD_C_SEGMENT_LINE_4
+//! - \b LCD_C_SEGMENT_LINE_5
+//! - \b LCD_C_SEGMENT_LINE_6
+//! - \b LCD_C_SEGMENT_LINE_7
+//! - \b LCD_C_SEGMENT_LINE_8
+//! - \b LCD_C_SEGMENT_LINE_9
+//! - \b LCD_C_SEGMENT_LINE_10
+//! - \b LCD_C_SEGMENT_LINE_11
+//! - \b LCD_C_SEGMENT_LINE_12
+//! - \b LCD_C_SEGMENT_LINE_13
+//! - \b LCD_C_SEGMENT_LINE_14
+//! - \b LCD_C_SEGMENT_LINE_15
+//! - \b LCD_C_SEGMENT_LINE_16
+//! - \b LCD_C_SEGMENT_LINE_17
+//! - \b LCD_C_SEGMENT_LINE_18
+//! - \b LCD_C_SEGMENT_LINE_19
+//! - \b LCD_C_SEGMENT_LINE_20
+//! - \b LCD_C_SEGMENT_LINE_21
+//! - \b LCD_C_SEGMENT_LINE_22
+//! - \b LCD_C_SEGMENT_LINE_23
+//! - \b LCD_C_SEGMENT_LINE_24
+//! - \b LCD_C_SEGMENT_LINE_25
+//! - \b LCD_C_SEGMENT_LINE_26
+//! - \b LCD_C_SEGMENT_LINE_27
+//! - \b LCD_C_SEGMENT_LINE_28
+//! - \b LCD_C_SEGMENT_LINE_29
+//! - \b LCD_C_SEGMENT_LINE_30
+//! - \b LCD_C_SEGMENT_LINE_31
+//! - \b LCD_C_SEGMENT_LINE_32
+//! - \b LCD_C_SEGMENT_LINE_33
+//! - \b LCD_C_SEGMENT_LINE_34
+//! - \b LCD_C_SEGMENT_LINE_35
+//! - \b LCD_C_SEGMENT_LINE_36
+//! - \b LCD_C_SEGMENT_LINE_37
+//! - \b LCD_C_SEGMENT_LINE_38
+//! - \b LCD_C_SEGMENT_LINE_39
+//! - \b LCD_C_SEGMENT_LINE_40
+//! - \b LCD_C_SEGMENT_LINE_41
+//! - \b LCD_C_SEGMENT_LINE_42
+//! - \b LCD_C_SEGMENT_LINE_43
+//! - \b LCD_C_SEGMENT_LINE_44
+//! - \b LCD_C_SEGMENT_LINE_45
+//! - \b LCD_C_SEGMENT_LINE_46
+//! - \b LCD_C_SEGMENT_LINE_47
+//! - \b LCD_C_SEGMENT_LINE_48
+//! - \b LCD_C_SEGMENT_LINE_49
+//! - \b LCD_C_SEGMENT_LINE_50
+//! - \b LCD_C_SEGMENT_LINE_51
+//! - \b LCD_C_SEGMENT_LINE_52
+//! - \b LCD_C_SEGMENT_LINE_53
+//! - \b LCD_C_SEGMENT_LINE_54
+//! - \b LCD_C_SEGMENT_LINE_55
+//! - \b LCD_C_SEGMENT_LINE_56
+//! - \b LCD_C_SEGMENT_LINE_57
+//! - \b LCD_C_SEGMENT_LINE_58
+//! - \b LCD_C_SEGMENT_LINE_59
+//! - \b LCD_C_SEGMENT_LINE_60
+//! - \b LCD_C_SEGMENT_LINE_61
+//! - \b LCD_C_SEGMENT_LINE_62
+//! - \b LCD_C_SEGMENT_LINE_63
+//! \param value is the designated value for corresponding blink pin.
+//!
+//! Modified bits are \b MBITx of \b LCDBMx register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void LCD_C_setBlinkingMemory(uint16_t baseAddress,
+ uint8_t pin,
+ uint8_t value);
+
+//*****************************************************************************
+//
+//! \brief Gets the LCD blink memory register.
+//!
+//!
+//! \return The uint8_t value of the LCD blink memory register.
+//
+//*****************************************************************************
+extern uint8_t LCD_C_getBlinkingMemory(uint16_t baseAddress,
+ uint8_t pin);
+
+//*****************************************************************************
+//
+//! \brief Sets the LCD blink memory register without erasing what is already
+//! there. Uses LCD getBlinkingMemory() function.
+//!
+//!
+//! Modified bits are \b MBITx of \b LCDBMx register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void LCD_C_setBlinkingMemoryWithoutOverwrite(uint16_t baseAddress,
+ uint8_t pin,
+ uint8_t value);
+
+//*****************************************************************************
+//
+//! \brief Configs the charge pump for synchronization and disabled capability.
+//!
+//! This function is device-specific. The charge pump clock can be synchronized
+//! to a device-specific clock, and also can be disabled by connected function.
+//!
+//! \param baseAddress is the base address of the LCD_C module.
+//! \param syncToClock is the synchronization select.
+//! Valid values are:
+//! - \b LCD_C_SYNCHRONIZATION_DISABLED [Default]
+//! - \b LCD_C_SYNCHRONIZATION_ENABLED
+//! \param functionControl is the connected function control select. Setting 0
+//! to make connected function not disable charge pump.
+//!
+//! Modified bits are \b MBITx of \b LCDBMx register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void LCD_C_configChargePump(uint16_t baseAddress,
+ uint16_t syncToClock,
+ uint16_t functionControl);
+
+//*****************************************************************************
+//
+// Mark the end of the C bindings section for C++ compilers.
+//
+//*****************************************************************************
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+#endif // __MSP430WARE_LCD_C_H__
diff --git a/Apps/FlightSoftware/MotorControl/driverlib/mpu.c b/Apps/FlightSoftware/MotorControl/driverlib/mpu.c
new file mode 100644
index 000000000..0b49bb035
--- /dev/null
+++ b/Apps/FlightSoftware/MotorControl/driverlib/mpu.c
@@ -0,0 +1,338 @@
+/* --COPYRIGHT--,BSD
+ * Copyright (c) 2017, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * --/COPYRIGHT--*/
+//*****************************************************************************
+//
+// mpu.c - Driver for the mpu Module.
+//
+//*****************************************************************************
+
+//*****************************************************************************
+//
+//! \addtogroup mpu_api mpu
+//! @{
+//
+//*****************************************************************************
+
+#include "inc/hw_memmap.h"
+
+#ifdef __MSP430_HAS_MPU__
+#include "mpu.h"
+
+#include
+
+//*****************************************************************************
+//
+// The following value is used by createTwoSegments, createThreeSegments to
+// check the user has passed a valid segmentation value. This value was
+// obtained from the User's Guide.
+//
+//*****************************************************************************
+#define MPU_MAX_SEG_VALUE 0x13C1
+
+void MPU_initTwoSegments(uint16_t baseAddress,
+ uint16_t seg1boundary,
+ uint8_t seg1accmask,
+ uint8_t seg2accmask
+ )
+{
+ // Write MPU password to allow MPU register configuration
+ HWREG16(baseAddress + OFS_MPUCTL0) = MPUPW | HWREG8(baseAddress + OFS_MPUCTL0);
+
+ // Create two memory segmentations
+ HWREG16(baseAddress + OFS_MPUSEGB1) = seg1boundary;
+ HWREG16(baseAddress + OFS_MPUSEGB2) = seg1boundary;
+
+ // Set access rights based on user's selection for segment1
+ switch (seg1accmask) {
+ case MPU_EXEC|MPU_READ:
+ HWREG16(baseAddress + OFS_MPUSAM) &= ~MPUSEG1WE;
+ HWREG16(baseAddress + OFS_MPUSAM) |= MPUSEG1XE + MPUSEG1RE;
+ break;
+ case MPU_READ|MPU_WRITE:
+ HWREG16(baseAddress + OFS_MPUSAM) &= ~MPUSEG1XE;
+ HWREG16(baseAddress + OFS_MPUSAM) |= MPUSEG1RE + MPUSEG1WE;
+ break;
+ case MPU_READ:
+ HWREG16(baseAddress + OFS_MPUSAM) &= ~(MPUSEG1XE +MPUSEG1WE);
+ HWREG16(baseAddress + OFS_MPUSAM) |= MPUSEG1RE;
+ break;
+ case MPU_EXEC|MPU_READ|MPU_WRITE:
+ HWREG16(baseAddress + OFS_MPUSAM) |= (MPUSEG1XE + MPUSEG1WE + MPUSEG1RE);
+ break;
+ case MPU_NO_READ_WRITE_EXEC:
+ HWREG16(baseAddress + OFS_MPUSAM) &= ~(MPUSEG1XE + MPUSEG1WE + MPUSEG1RE);
+ break;
+ default:
+ break;
+ }
+
+ // Set access rights based on user's selection for segment2
+ switch (seg2accmask) {
+ case MPU_EXEC|MPU_READ:
+ HWREG16(baseAddress + OFS_MPUSAM) &= ~(MPUSEG3WE + MPUSEG2WE);
+ HWREG16(baseAddress + OFS_MPUSAM) |= MPUSEG3XE + MPUSEG3RE +
+ MPUSEG2XE + MPUSEG2RE;
+ break;
+ case MPU_READ|MPU_WRITE:
+ HWREG16(baseAddress + OFS_MPUSAM) &= ~(MPUSEG3XE + MPUSEG2XE);
+ HWREG16(baseAddress + OFS_MPUSAM) |= MPUSEG3RE + MPUSEG3WE +
+ MPUSEG2RE + MPUSEG2WE;
+ break;
+ case MPU_READ:
+ HWREG16(baseAddress + OFS_MPUSAM) &= ~(MPUSEG3XE + MPUSEG3WE +
+ MPUSEG2XE + MPUSEG2WE);
+ HWREG16(baseAddress + OFS_MPUSAM) |= MPUSEG3RE + MPUSEG2RE;
+ break;
+ case MPU_EXEC|MPU_READ|MPU_WRITE:
+ HWREG16(baseAddress + OFS_MPUSAM) |= (MPUSEG3XE + MPUSEG3WE +
+ MPUSEG3RE + MPUSEG2XE + MPUSEG2WE + MPUSEG2RE);
+ break;
+ case MPU_NO_READ_WRITE_EXEC:
+ HWREG16(baseAddress + OFS_MPUSAM) &= ~(MPUSEG3XE + MPUSEG3WE +
+ MPUSEG3RE + MPUSEG2XE + MPUSEG2WE + MPUSEG2RE);
+ break;
+ default:
+ break;
+ }
+
+ //Lock MPU to disable writing to all registers
+ HWREG8(baseAddress + OFS_MPUCTL0_H) = 0x00;
+}
+
+void MPU_initThreeSegments(uint16_t baseAddress,
+ MPU_initThreeSegmentsParam *param)
+{
+ // Write MPU password to allow MPU register configuration
+ HWREG16(baseAddress + OFS_MPUCTL0) = MPUPW | HWREG8(baseAddress + OFS_MPUCTL0);
+
+ // Create two memory segmentations
+ HWREG16(baseAddress + OFS_MPUSEGB1) = param->seg1boundary;
+ HWREG16(baseAddress + OFS_MPUSEGB2) = param->seg2boundary;
+
+ // Set access rights based on user's selection for segment1
+ switch (param->seg1accmask) {
+ case MPU_EXEC|MPU_READ:
+ HWREG16(baseAddress + OFS_MPUSAM) &= ~MPUSEG1WE;
+ HWREG16(baseAddress + OFS_MPUSAM) |= MPUSEG1XE + MPUSEG1RE;
+ break;
+ case MPU_READ|MPU_WRITE:
+ HWREG16(baseAddress + OFS_MPUSAM) &= ~MPUSEG1XE;
+ HWREG16(baseAddress + OFS_MPUSAM) |= MPUSEG1RE + MPUSEG1WE;
+ break;
+ case MPU_READ:
+ HWREG16(baseAddress + OFS_MPUSAM) &= ~(MPUSEG1XE +MPUSEG1WE);
+ HWREG16(baseAddress + OFS_MPUSAM) |= MPUSEG1RE;
+ break;
+ case MPU_EXEC|MPU_READ|MPU_WRITE:
+ HWREG16(baseAddress + OFS_MPUSAM) |= (MPUSEG1XE + MPUSEG1WE + MPUSEG1RE);
+ break;
+ case MPU_NO_READ_WRITE_EXEC:
+ HWREG16(baseAddress + OFS_MPUSAM) &= ~(MPUSEG1XE + MPUSEG1WE + MPUSEG1RE);
+ break;
+ default:
+ break;
+ }
+
+ // Set access rights based on user's selection for segment2
+ switch (param->seg2accmask) {
+ case MPU_EXEC|MPU_READ:
+ HWREG16(baseAddress + OFS_MPUSAM) &= ~MPUSEG2WE;
+ HWREG16(baseAddress + OFS_MPUSAM) |= MPUSEG2XE + MPUSEG2RE;
+ break;
+ case MPU_READ|MPU_WRITE:
+ HWREG16(baseAddress + OFS_MPUSAM) &= ~MPUSEG2XE;
+ HWREG16(baseAddress + OFS_MPUSAM) |= MPUSEG2RE + MPUSEG2WE;
+ break;
+ case MPU_READ:
+ HWREG16(baseAddress + OFS_MPUSAM) &= ~(MPUSEG2XE +MPUSEG2WE);
+ HWREG16(baseAddress + OFS_MPUSAM) |= MPUSEG2RE;
+ break;
+ case MPU_EXEC|MPU_READ|MPU_WRITE:
+ HWREG16(baseAddress + OFS_MPUSAM) |= (MPUSEG2XE + MPUSEG2WE + MPUSEG2RE);
+ break;
+ case MPU_NO_READ_WRITE_EXEC:
+ HWREG16(baseAddress + OFS_MPUSAM) &= ~(MPUSEG2XE + MPUSEG2WE + MPUSEG2RE);
+ break;
+ default:
+ break;
+ }
+
+ // Set access rights based on user's selection for segment3
+ switch (param->seg3accmask) {
+ case MPU_EXEC|MPU_READ:
+ HWREG16(baseAddress + OFS_MPUSAM) &= ~MPUSEG3WE;
+ HWREG16(baseAddress + OFS_MPUSAM) |= MPUSEG3XE + MPUSEG3RE;
+ break;
+ case MPU_READ|MPU_WRITE:
+ HWREG16(baseAddress + OFS_MPUSAM) &= ~MPUSEG3XE;
+ HWREG16(baseAddress + OFS_MPUSAM) |= MPUSEG3RE + MPUSEG3WE;
+ break;
+ case MPU_READ:
+ HWREG16(baseAddress + OFS_MPUSAM) &= ~(MPUSEG3XE +MPUSEG3WE);
+ HWREG16(baseAddress + OFS_MPUSAM) |= MPUSEG3RE;
+ break;
+ case MPU_EXEC|MPU_READ|MPU_WRITE:
+ HWREG16(baseAddress + OFS_MPUSAM) |= (MPUSEG3XE + MPUSEG3WE + MPUSEG3RE);
+ break;
+ case MPU_NO_READ_WRITE_EXEC:
+ HWREG16(baseAddress + OFS_MPUSAM) &= ~(MPUSEG3XE + MPUSEG3WE + MPUSEG3RE);
+ break;
+ default:
+ break;
+ }
+
+ //Lock MPU to disable writing to all registers
+ HWREG8(baseAddress + OFS_MPUCTL0_H) = 0x00;
+}
+
+void MPU_initInfoSegment(uint16_t baseAddress, uint8_t accmask)
+{
+ // Write MPU password to allow MPU register configuration
+ HWREG16(baseAddress + OFS_MPUCTL0) = MPUPW | HWREG8(baseAddress + OFS_MPUCTL0);
+
+ // Set access rights based on user's selection for segment1
+ switch (accmask) {
+ case MPU_EXEC|MPU_READ:
+ HWREG16(baseAddress + OFS_MPUSAM) &= ~MPUSEGIWE;
+ HWREG16(baseAddress + OFS_MPUSAM) |= MPUSEGIXE + MPUSEGIRE;
+ break;
+ case MPU_READ|MPU_WRITE:
+ HWREG16(baseAddress + OFS_MPUSAM) &= ~MPUSEGIXE;
+ HWREG16(baseAddress + OFS_MPUSAM) |= MPUSEGIRE + MPUSEGIWE;
+ break;
+ case MPU_READ:
+ HWREG16(baseAddress + OFS_MPUSAM) &= ~(MPUSEGIXE + MPUSEGIWE);
+ HWREG16(baseAddress + OFS_MPUSAM) |= MPUSEGIRE;
+ break;
+ case MPU_EXEC|MPU_READ|MPU_WRITE:
+ HWREG16(baseAddress + OFS_MPUSAM) |= (MPUSEGIXE + MPUSEGIWE + MPUSEGIRE);
+ break;
+ case MPU_NO_READ_WRITE_EXEC:
+ HWREG16(baseAddress + OFS_MPUSAM) &= ~(MPUSEGIXE + MPUSEGIWE + MPUSEGIRE);
+ break;
+ default:
+ break;
+ }
+
+ //Lock MPU to disable writing to all registers
+ HWREG8(baseAddress + OFS_MPUCTL0_H) = 0x00;
+}
+void MPU_enableNMIevent(uint16_t baseAddress)
+{
+ HWREG16(baseAddress + OFS_MPUCTL0) = MPUPW | MPUSEGIE |
+ HWREG8(baseAddress + OFS_MPUCTL0);
+
+ //Lock MPU to disable writing to all registers
+ HWREG8(baseAddress + OFS_MPUCTL0_H) = 0x00;
+}
+
+void MPU_start(uint16_t baseAddress)
+{
+ HWREG16(baseAddress + OFS_MPUCTL0) = MPUPW | MPUENA | HWREG8(baseAddress + OFS_MPUCTL0);
+
+ //Lock MPU to disable writing to all registers
+ HWREG8(baseAddress + OFS_MPUCTL0_H) = 0x00;
+}
+
+void MPU_enablePUCOnViolation(uint16_t baseAddress,
+ uint16_t segment
+ )
+{
+ HWREG16(baseAddress + OFS_MPUCTL0) = MPUPW | HWREG8(baseAddress + OFS_MPUCTL0);
+ HWREG16(baseAddress + OFS_MPUSAM) |= segment;
+
+ //Lock MPU to disable writing to all registers
+ HWREG8(baseAddress + OFS_MPUCTL0_H) = 0x00;
+}
+
+void MPU_disablePUCOnViolation(uint16_t baseAddress,
+ uint16_t segment
+ )
+{
+ HWREG16(baseAddress + OFS_MPUCTL0) = MPUPW | HWREG8(baseAddress + OFS_MPUCTL0);
+ HWREG16(baseAddress + OFS_MPUSAM) &= ~segment;
+
+ //Lock MPU to disable writing to all registers
+ HWREG8(baseAddress + OFS_MPUCTL0_H) = 0x00;
+}
+
+uint16_t MPU_getInterruptStatus(uint16_t baseAddress,
+ uint16_t memAccFlag
+ )
+{
+ return (HWREG16(baseAddress + OFS_MPUCTL1) & memAccFlag);
+}
+
+uint16_t MPU_clearInterrupt(uint16_t baseAddress,
+ uint16_t memAccFlag
+ )
+{
+
+ HWREG16(baseAddress + OFS_MPUCTL0) = MPUPW | HWREG8(baseAddress + OFS_MPUCTL0);
+ HWREG16(baseAddress + OFS_MPUCTL1) &= ~memAccFlag;
+
+ //Lock MPU to disable writing to all registers
+ HWREG8(baseAddress + OFS_MPUCTL0_H) = 0x00;
+
+ return (HWREG16(baseAddress + OFS_MPUCTL1) & memAccFlag);
+}
+
+uint16_t MPU_clearAllInterrupts(uint16_t baseAddress
+ )
+{
+
+ HWREG16(baseAddress + OFS_MPUCTL0) = MPUPW | HWREG8(baseAddress + OFS_MPUCTL0);
+ HWREG16(baseAddress + OFS_MPUCTL1) &= ~(MPUSEG1IFG + MPUSEG2IFG + MPUSEG3IFG);
+
+ //Lock MPU to disable writing to all registers
+ HWREG8(baseAddress + OFS_MPUCTL0_H) = 0x00;
+
+ return (HWREG16(baseAddress + OFS_MPUCTL1) & (MPUSEG1IFG + MPUSEG2IFG + MPUSEG3IFG));
+}
+
+void MPU_lockMPU(uint16_t baseAddress)
+{
+ HWREG16(baseAddress + OFS_MPUCTL0) = MPUPW | MPULOCK |
+ HWREG8(baseAddress + OFS_MPUCTL0);
+
+ //Lock MPU to disable writing to all registers
+ HWREG8(baseAddress + OFS_MPUCTL0_H) = 0x00;
+}
+
+
+#endif
+//*****************************************************************************
+//
+//! Close the doxygen group for mpu_api
+//! @}
+//
+//*****************************************************************************
diff --git a/Apps/FlightSoftware/MotorControl/driverlib/mpu.h b/Apps/FlightSoftware/MotorControl/driverlib/mpu.h
new file mode 100644
index 000000000..a1f6d2f9c
--- /dev/null
+++ b/Apps/FlightSoftware/MotorControl/driverlib/mpu.h
@@ -0,0 +1,423 @@
+/* --COPYRIGHT--,BSD
+ * Copyright (c) 2017, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * --/COPYRIGHT--*/
+//*****************************************************************************
+//
+// mpu.h - Driver for the MPU Module.
+//
+//*****************************************************************************
+
+#ifndef __MSP430WARE_MPU_H__
+#define __MSP430WARE_MPU_H__
+
+#include "inc/hw_memmap.h"
+
+#ifdef __MSP430_HAS_MPU__
+
+//*****************************************************************************
+//
+// If building with a C++ compiler, make all of the definitions in this header
+// have a C binding.
+//
+//*****************************************************************************
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+#include "inc/hw_memmap.h"
+//*****************************************************************************
+//
+//! \brief Used in the MPU_initThreeSegments() function as the param parameter.
+//
+//*****************************************************************************
+typedef struct MPU_initThreeSegmentsParam {
+ //! Valid values can be found in the Family User's Guide
+ uint16_t seg1boundary;
+ //! Valid values can be found in the Family User's Guide
+ uint16_t seg2boundary;
+ //! Is the bit mask of access right for memory segment 1.
+ //! \n Logical OR of any of the following:
+ //! - \b MPU_READ - Read rights
+ //! - \b MPU_WRITE - Write rights
+ //! - \b MPU_EXEC - Execute rights
+ //! - \b MPU_NO_READ_WRITE_EXEC - no read/write/execute rights
+ uint8_t seg1accmask;
+ //! Is the bit mask of access right for memory segment 2.
+ //! \n Logical OR of any of the following:
+ //! - \b MPU_READ - Read rights
+ //! - \b MPU_WRITE - Write rights
+ //! - \b MPU_EXEC - Execute rights
+ //! - \b MPU_NO_READ_WRITE_EXEC - no read/write/execute rights
+ uint8_t seg2accmask;
+ //! Is the bit mask of access right for memory segment 3.
+ //! \n Logical OR of any of the following:
+ //! - \b MPU_READ - Read rights
+ //! - \b MPU_WRITE - Write rights
+ //! - \b MPU_EXEC - Execute rights
+ //! - \b MPU_NO_READ_WRITE_EXEC - no read/write/execute rights
+ uint8_t seg3accmask;
+} MPU_initThreeSegmentsParam;
+
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the accmask parameter for
+// functions: MPU_initInfoSegment(); the seg2accmask parameter for functions:
+// MPU_initTwoSegments(); the seg1accmask parameter for functions:
+// MPU_initTwoSegments(); the param parameter for functions:
+// MPU_initThreeSegments(), MPU_initThreeSegments(), and
+// MPU_initThreeSegments().
+//
+//*****************************************************************************
+#define MPU_READ MPUSEG1RE
+#define MPU_WRITE MPUSEG1WE
+#define MPU_EXEC MPUSEG1XE
+#define MPU_NO_READ_WRITE_EXEC (0x0000)
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the segment parameter for
+// functions: MPU_enablePUCOnViolation(), and MPU_disablePUCOnViolation().
+//
+//*****************************************************************************
+#define MPU_FIRST_SEG MPUSEG1VS
+#define MPU_SECOND_SEG MPUSEG2VS
+#define MPU_THIRD_SEG MPUSEG3VS
+#define MPU_INFO_SEG MPUSEGIVS
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the memAccFlag parameter for
+// functions: MPU_getInterruptStatus(), and MPU_clearInterrupt() as well as
+// returned by the MPU_getInterruptStatus() function, the
+// MPU_clearAllInterrupts() function and the MPU_clearInterrupt() function.
+//
+//*****************************************************************************
+#define MPU_SEG_1_ACCESS_VIOLATION MPUSEG1IFG
+#define MPU_SEG_2_ACCESS_VIOLATION MPUSEG2IFG
+#define MPU_SEG_3_ACCESS_VIOLATION MPUSEG3IFG
+#define MPU_SEG_INFO_ACCESS_VIOLATION MPUSEGIIFG
+
+//*****************************************************************************
+//
+// Prototypes for the APIs.
+//
+//*****************************************************************************
+
+//*****************************************************************************
+//
+//! \brief Initializes MPU with two memory segments
+//!
+//! This function creates two memory segments in FRAM allowing the user to set
+//! access right to each segment. To set the correct value for seg1boundary,
+//! the user must consult the Device Family User's Guide and provide the MPUSBx
+//! value corresponding to the memory address where the user wants to create
+//! the partition. Consult the "Segment Border Setting" section in the User's
+//! Guide to find the options available for MPUSBx.
+//!
+//! \param baseAddress is the base address of the MPU module.
+//! \param seg1boundary Valid values can be found in the Family User's Guide
+//! \param seg1accmask is the bit mask of access right for memory segment 1.
+//! Mask value is the logical OR of any of the following:
+//! - \b MPU_READ - Read rights
+//! - \b MPU_WRITE - Write rights
+//! - \b MPU_EXEC - Execute rights
+//! - \b MPU_NO_READ_WRITE_EXEC - no read/write/execute rights
+//! \param seg2accmask is the bit mask of access right for memory segment 2
+//! Mask value is the logical OR of any of the following:
+//! - \b MPU_READ - Read rights
+//! - \b MPU_WRITE - Write rights
+//! - \b MPU_EXEC - Execute rights
+//! - \b MPU_NO_READ_WRITE_EXEC - no read/write/execute rights
+//!
+//! Modified bits of \b MPUSAM register, bits of \b MPUSEG register and bits of
+//! \b MPUCTL0 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void MPU_initTwoSegments(uint16_t baseAddress,
+ uint16_t seg1boundary,
+ uint8_t seg1accmask,
+ uint8_t seg2accmask);
+
+//*****************************************************************************
+//
+//! \brief Initializes MPU with three memory segments
+//!
+//! This function creates three memory segments in FRAM allowing the user to
+//! set access right to each segment. To set the correct value for
+//! seg1boundary, the user must consult the Device Family User's Guide and
+//! provide the MPUSBx value corresponding to the memory address where the user
+//! wants to create the partition. Consult the "Segment Border Setting" section
+//! in the User's Guide to find the options available for MPUSBx.
+//!
+//! \param baseAddress is the base address of the MPU module.
+//! \param param is the pointer to struct for initializing three segments.
+//!
+//! Modified bits of \b MPUSAM register, bits of \b MPUSEG register and bits of
+//! \b MPUCTL0 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void MPU_initThreeSegments(uint16_t baseAddress,
+ MPU_initThreeSegmentsParam *param);
+
+//*****************************************************************************
+//
+//! \brief Initializes user information memory segment
+//!
+//! This function initializes user information memory segment with specified
+//! access rights.
+//!
+//! \param baseAddress is the base address of the MPU module.
+//! \param accmask is the bit mask of access right for user information memory
+//! segment.
+//! Mask value is the logical OR of any of the following:
+//! - \b MPU_READ - Read rights
+//! - \b MPU_WRITE - Write rights
+//! - \b MPU_EXEC - Execute rights
+//! - \b MPU_NO_READ_WRITE_EXEC - no read/write/execute rights
+//!
+//! Modified bits of \b MPUSAM register and bits of \b MPUCTL0 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void MPU_initInfoSegment(uint16_t baseAddress,
+ uint8_t accmask);
+
+//*****************************************************************************
+//
+//! \brief The following function enables the NMI Event if a Segment violation
+//! has occurred.
+//!
+//! \param baseAddress is the base address of the MPU module.
+//!
+//! Modified bits of \b MPUCTL0 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void MPU_enableNMIevent(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief The following function enables the MPU module in the device.
+//!
+//! This function needs to be called once all memory segmentation has been
+//! done. If this function is not called the MPU module will not be activated.
+//!
+//! \param baseAddress is the base address of the MPU module.
+//!
+//! Modified bits of \b MPUCTL0 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void MPU_start(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief The following function enables PUC generation when an access
+//! violation has occurred on the memory segment selected by the user.
+//!
+//! Note that only specified segments for PUC generation are enabled. Other
+//! segments for PUC generation are left untouched. Users may call
+//! MPU_enablePUCOnViolation() and MPU_disablePUCOnViolation() to assure that
+//! all the bits will be set and/or cleared.
+//!
+//! \param baseAddress is the base address of the MPU module.
+//! \param segment is the bit mask of memory segment that will generate a PUC
+//! when an access violation occurs.
+//! Mask value is the logical OR of any of the following:
+//! - \b MPU_FIRST_SEG - PUC generation on first memory segment
+//! - \b MPU_SECOND_SEG - PUC generation on second memory segment
+//! - \b MPU_THIRD_SEG - PUC generation on third memory segment
+//! - \b MPU_INFO_SEG - PUC generation on user information memory
+//! segment
+//!
+//! Modified bits of \b MPUSAM register and bits of \b MPUCTL0 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void MPU_enablePUCOnViolation(uint16_t baseAddress,
+ uint16_t segment);
+
+//*****************************************************************************
+//
+//! \brief The following function disables PUC generation when an access
+//! violation has occurred on the memory segment selected by the user.
+//!
+//! Note that only specified segments for PUC generation are disabled. Other
+//! segments for PUC generation are left untouched. Users may call
+//! MPU_enablePUCOnViolation() and MPU_disablePUCOnViolation() to assure that
+//! all the bits will be set and/or cleared.
+//!
+//! \param baseAddress is the base address of the MPU module.
+//! \param segment is the bit mask of memory segment that will NOT generate a
+//! PUC when an access violation occurs.
+//! Mask value is the logical OR of any of the following:
+//! - \b MPU_FIRST_SEG - PUC generation on first memory segment
+//! - \b MPU_SECOND_SEG - PUC generation on second memory segment
+//! - \b MPU_THIRD_SEG - PUC generation on third memory segment
+//! - \b MPU_INFO_SEG - PUC generation on user information memory
+//! segment
+//!
+//! Modified bits of \b MPUSAM register and bits of \b MPUCTL0 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void MPU_disablePUCOnViolation(uint16_t baseAddress,
+ uint16_t segment);
+
+//*****************************************************************************
+//
+//! \brief Returns the memory segment violation flag status requested by the
+//! user.
+//!
+//! \param baseAddress is the base address of the MPU module.
+//! \param memAccFlag is the is the memory access violation flag.
+//! Mask value is the logical OR of any of the following:
+//! - \b MPU_SEG_1_ACCESS_VIOLATION - is set if an access violation in
+//! Main Memory Segment 1 is detected
+//! - \b MPU_SEG_2_ACCESS_VIOLATION - is set if an access violation in
+//! Main Memory Segment 2 is detected
+//! - \b MPU_SEG_3_ACCESS_VIOLATION - is set if an access violation in
+//! Main Memory Segment 3 is detected
+//! - \b MPU_SEG_INFO_ACCESS_VIOLATION - is set if an access violation
+//! in User Information Memory Segment is detected
+//!
+//! \return Logical OR of any of the following:
+//! - \b MPU_SEG_1_ACCESS_VIOLATION is set if an access violation in
+//! Main Memory Segment 1 is detected
+//! - \b MPU_SEG_2_ACCESS_VIOLATION is set if an access violation in
+//! Main Memory Segment 2 is detected
+//! - \b MPU_SEG_3_ACCESS_VIOLATION is set if an access violation in
+//! Main Memory Segment 3 is detected
+//! - \b MPU_SEG_INFO_ACCESS_VIOLATION is set if an access violation in
+//! User Information Memory Segment is detected
+//! \n indicating the status of the masked flags.
+//
+//*****************************************************************************
+extern uint16_t MPU_getInterruptStatus(uint16_t baseAddress,
+ uint16_t memAccFlag);
+
+//*****************************************************************************
+//
+//! \brief Clears the masked interrupt flags
+//!
+//! Returns the memory segment violation flag status requested by the user or
+//! if user is providing a bit mask value, the function will return a value
+//! indicating if all flags were cleared.
+//!
+//! \param baseAddress is the base address of the MPU module.
+//! \param memAccFlag is the is the memory access violation flag.
+//! Mask value is the logical OR of any of the following:
+//! - \b MPU_SEG_1_ACCESS_VIOLATION - is set if an access violation in
+//! Main Memory Segment 1 is detected
+//! - \b MPU_SEG_2_ACCESS_VIOLATION - is set if an access violation in
+//! Main Memory Segment 2 is detected
+//! - \b MPU_SEG_3_ACCESS_VIOLATION - is set if an access violation in
+//! Main Memory Segment 3 is detected
+//! - \b MPU_SEG_INFO_ACCESS_VIOLATION - is set if an access violation
+//! in User Information Memory Segment is detected
+//!
+//! \return Logical OR of any of the following:
+//! - \b MPU_SEG_1_ACCESS_VIOLATION is set if an access violation in
+//! Main Memory Segment 1 is detected
+//! - \b MPU_SEG_2_ACCESS_VIOLATION is set if an access violation in
+//! Main Memory Segment 2 is detected
+//! - \b MPU_SEG_3_ACCESS_VIOLATION is set if an access violation in
+//! Main Memory Segment 3 is detected
+//! - \b MPU_SEG_INFO_ACCESS_VIOLATION is set if an access violation in
+//! User Information Memory Segment is detected
+//! \n indicating the status of the masked flags.
+//
+//*****************************************************************************
+extern uint16_t MPU_clearInterrupt(uint16_t baseAddress,
+ uint16_t memAccFlag);
+
+//*****************************************************************************
+//
+//! \brief Clears all Memory Segment Access Violation Interrupt Flags.
+//!
+//! \param baseAddress is the base address of the MPU module.
+//!
+//! Modified bits of \b MPUCTL1 register.
+//!
+//! \return Logical OR of any of the following:
+//! - \b MPU_SEG_1_ACCESS_VIOLATION is set if an access violation in
+//! Main Memory Segment 1 is detected
+//! - \b MPU_SEG_2_ACCESS_VIOLATION is set if an access violation in
+//! Main Memory Segment 2 is detected
+//! - \b MPU_SEG_3_ACCESS_VIOLATION is set if an access violation in
+//! Main Memory Segment 3 is detected
+//! - \b MPU_SEG_INFO_ACCESS_VIOLATION is set if an access violation in
+//! User Information Memory Segment is detected
+//! \n indicating the status of the interrupt flags.
+//
+//*****************************************************************************
+extern uint16_t MPU_clearAllInterrupts(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Lock MPU to protect from write access.
+//!
+//! Sets MPULOCK to protect MPU from write access on all MPU registers except
+//! MPUCTL1, MPUIPC0 and MPUIPSEGBx until a BOR occurs. MPULOCK bit cannot be
+//! cleared manually. MPU_clearInterrupt() and MPU_clearAllInterrupts() still
+//! can be used after this API is called.
+//!
+//! \param baseAddress is the base address of the MPU module.
+//!
+//! Modified bits are \b MPULOCK of \b MPUCTL1 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void MPU_lockMPU(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+// Mark the end of the C bindings section for C++ compilers.
+//
+//*****************************************************************************
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+#endif // __MSP430WARE_MPU_H__
diff --git a/Apps/FlightSoftware/MotorControl/driverlib/mpy32.c b/Apps/FlightSoftware/MotorControl/driverlib/mpy32.c
new file mode 100644
index 000000000..b377d0d2e
--- /dev/null
+++ b/Apps/FlightSoftware/MotorControl/driverlib/mpy32.c
@@ -0,0 +1,176 @@
+/* --COPYRIGHT--,BSD
+ * Copyright (c) 2017, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * --/COPYRIGHT--*/
+//*****************************************************************************
+//
+// mpy32.c - Driver for the mpy32 Module.
+//
+//*****************************************************************************
+
+//*****************************************************************************
+//
+//! \addtogroup mpy32_api mpy32
+//! @{
+//
+//*****************************************************************************
+
+#include "inc/hw_memmap.h"
+
+#ifdef __MSP430_HAS_MPY32__
+#include "mpy32.h"
+
+#include
+
+void MPY32_setWriteDelay (uint16_t writeDelaySelect)
+{
+ HWREG16(MPY32_BASE + OFS_MPY32CTL0) &= ~(MPYDLY32 + MPYDLYWRTEN);
+ HWREG16(MPY32_BASE + OFS_MPY32CTL0) |= writeDelaySelect;
+}
+
+void MPY32_enableSaturationMode (void)
+{
+ HWREG8(MPY32_BASE + OFS_MPY32CTL0_L) |= MPYSAT;
+}
+
+void MPY32_disableSaturationMode (void)
+{
+ HWREG8(MPY32_BASE + OFS_MPY32CTL0_L) &= ~(MPYSAT);
+}
+
+uint8_t MPY32_getSaturationMode (void)
+{
+ return (HWREG8(MPY32_BASE + OFS_MPY32CTL0_L) &(MPYSAT));
+}
+
+void MPY32_enableFractionalMode (void)
+{
+ HWREG8(MPY32_BASE + OFS_MPY32CTL0_L) |= MPYFRAC;
+}
+
+void MPY32_disableFractionalMode (void)
+{
+ HWREG8(MPY32_BASE + OFS_MPY32CTL0_L) &= ~(MPYFRAC);
+}
+
+uint8_t MPY32_getFractionalMode (void)
+{
+ return (HWREG8(MPY32_BASE + OFS_MPY32CTL0_L) &(MPYFRAC));
+}
+
+void MPY32_setOperandOne8Bit (uint8_t multiplicationType,
+ uint8_t operand)
+{
+ HWREG8(MPY32_BASE + OFS_MPY + multiplicationType) = operand;
+}
+
+void MPY32_setOperandOne16Bit (uint8_t multiplicationType,
+ uint16_t operand)
+{
+ HWREG16(MPY32_BASE + OFS_MPY + multiplicationType) = operand;
+}
+
+void MPY32_setOperandOne24Bit (uint8_t multiplicationType,
+ uint32_t operand)
+{
+ multiplicationType <<= 1;
+ HWREG16(MPY32_BASE + OFS_MPY32L + multiplicationType) = operand;
+ HWREG8(MPY32_BASE + OFS_MPY32H + multiplicationType) = (operand >> 16);
+}
+
+void MPY32_setOperandOne32Bit (uint8_t multiplicationType,
+ uint32_t operand)
+{
+ multiplicationType <<= 1;
+ HWREG16(MPY32_BASE + OFS_MPY32L + multiplicationType) = operand;
+ HWREG16(MPY32_BASE + OFS_MPY32H + multiplicationType) = (operand >> 16);
+}
+
+void MPY32_setOperandTwo8Bit (uint8_t operand)
+{
+ HWREG8(MPY32_BASE + OFS_OP2) = operand;
+}
+
+void MPY32_setOperandTwo16Bit (uint16_t operand)
+{
+ HWREG16(MPY32_BASE + OFS_OP2) = operand;
+}
+
+void MPY32_setOperandTwo24Bit (uint32_t operand)
+{
+ HWREG16(MPY32_BASE + OFS_OP2L) = operand;
+ HWREG8(MPY32_BASE + OFS_OP2H) = (operand >> 16);
+}
+
+void MPY32_setOperandTwo32Bit (uint32_t operand)
+{
+ HWREG16(MPY32_BASE + OFS_OP2L) = operand;
+ HWREG16(MPY32_BASE + OFS_OP2H) = (operand >> 16);
+}
+
+uint64_t MPY32_getResult (void)
+{
+ uint64_t result;
+
+ result = HWREG16(MPY32_BASE + OFS_RES0);
+ result += ((uint64_t)HWREG16(MPY32_BASE + OFS_RES1) << 16);
+ result += ((uint64_t)HWREG16(MPY32_BASE + OFS_RES2) << 32);
+ result += ((uint64_t)HWREG16(MPY32_BASE + OFS_RES3) << 48);
+ return ( result );
+}
+
+uint16_t MPY32_getSumExtension (void)
+{
+ return ( HWREG16(MPY32_BASE + OFS_SUMEXT) );
+}
+
+uint16_t MPY32_getCarryBitValue (void)
+{
+ return ( HWREG16(MPY32_BASE + OFS_MPY32CTL0) | MPYC);
+}
+void MPY32_clearCarryBitValue (void)
+{
+ HWREG16(MPY32_BASE + OFS_MPY32CTL0) &= ~MPYC;
+}
+void MPY32_preloadResult (uint64_t result)
+{
+ HWREG16(MPY32_BASE + OFS_RES0) = (result & 0xFFFF);
+ HWREG16(MPY32_BASE + OFS_RES1) = ((result >> 16) & 0xFFFF);
+ HWREG16(MPY32_BASE + OFS_RES2) = ((result >> 32) & 0xFFFF);
+ HWREG16(MPY32_BASE + OFS_RES3) = ((result >> 48) & 0xFFFF);
+}
+
+#endif
+//*****************************************************************************
+//
+//! Close the doxygen group for mpy32_api
+//! @}
+//
+//*****************************************************************************
diff --git a/Apps/FlightSoftware/MotorControl/driverlib/mpy32.h b/Apps/FlightSoftware/MotorControl/driverlib/mpy32.h
new file mode 100644
index 000000000..a7fc94444
--- /dev/null
+++ b/Apps/FlightSoftware/MotorControl/driverlib/mpy32.h
@@ -0,0 +1,445 @@
+/* --COPYRIGHT--,BSD
+ * Copyright (c) 2017, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * --/COPYRIGHT--*/
+//*****************************************************************************
+//
+// mpy32.h - Driver for the MPY32 Module.
+//
+//*****************************************************************************
+
+#ifndef __MSP430WARE_MPY32_H__
+#define __MSP430WARE_MPY32_H__
+
+#include "inc/hw_memmap.h"
+
+#ifdef __MSP430_HAS_MPY32__
+
+//*****************************************************************************
+//
+// If building with a C++ compiler, make all of the definitions in this header
+// have a C binding.
+//
+//*****************************************************************************
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+#include "inc/hw_memmap.h"
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the writeDelaySelect
+// parameter for functions: MPY32_setWriteDelay().
+//
+//*****************************************************************************
+#define MPY32_WRITEDELAY_OFF (!(MPYDLY32 + MPYDLYWRTEN))
+#define MPY32_WRITEDELAY_32BIT (MPYDLYWRTEN)
+#define MPY32_WRITEDELAY_64BIT (MPYDLY32 + MPYDLYWRTEN)
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the multiplicationType
+// parameter for functions: MPY32_setOperandOne8Bit(),
+// MPY32_setOperandOne16Bit(), MPY32_setOperandOne24Bit(), and
+// MPY32_setOperandOne32Bit().
+//
+//*****************************************************************************
+#define MPY32_MULTIPLY_UNSIGNED (0x00)
+#define MPY32_MULTIPLY_SIGNED (0x02)
+#define MPY32_MULTIPLYACCUMULATE_UNSIGNED (0x04)
+#define MPY32_MULTIPLYACCUMULATE_SIGNED (0x06)
+
+//*****************************************************************************
+//
+// The following are values that can be passed toThe following are values that
+// can be returned by the MPY32_getSaturationMode() function.
+//
+//*****************************************************************************
+#define MPY32_SATURATION_MODE_DISABLED 0x00
+#define MPY32_SATURATION_MODE_ENABLED MPYSAT
+
+//*****************************************************************************
+//
+// The following are values that can be passed toThe following are values that
+// can be returned by the MPY32_getFractionalMode() function.
+//
+//*****************************************************************************
+#define MPY32_FRACTIONAL_MODE_DISABLED 0x00
+#define MPY32_FRACTIONAL_MODE_ENABLED MPYFRAC
+
+//*****************************************************************************
+//
+// Prototypes for the APIs.
+//
+//*****************************************************************************
+
+//*****************************************************************************
+//
+//! \brief Sets the write delay setting for the MPY32 module.
+//!
+//! This function sets up a write delay to the MPY module's registers, which
+//! holds any writes to the registers until all calculations are complete.
+//! There are two different settings, one which waits for 32-bit results to be
+//! ready, and one which waits for 64-bit results to be ready. This prevents
+//! unpredicatble results if registers are changed before the results are
+//! ready.
+//!
+//! \param writeDelaySelect delays the write to any MPY32 register until the
+//! selected bit size of result has been written.
+//! Valid values are:
+//! - \b MPY32_WRITEDELAY_OFF [Default] - writes are not delayed
+//! - \b MPY32_WRITEDELAY_32BIT - writes are delayed until a 32-bit
+//! result is available in the result registers
+//! - \b MPY32_WRITEDELAY_64BIT - writes are delayed until a 64-bit
+//! result is available in the result registers
+//! \n Modified bits are \b MPYDLY32 and \b MPYDLYWRTEN of \b MPY32CTL0
+//! register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void MPY32_setWriteDelay(uint16_t writeDelaySelect);
+
+//*****************************************************************************
+//
+//! \brief Enables Saturation Mode.
+//!
+//! This function enables saturation mode. When this is enabled, the result
+//! read out from the MPY result registers is converted to the most-positive
+//! number in the case of an overflow, or the most-negative number in the case
+//! of an underflow. Please note, that the raw value in the registers does not
+//! reflect the result returned, and if the saturation mode is disabled, then
+//! the raw value of the registers will be returned instead.
+//!
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void MPY32_enableSaturationMode(void);
+
+//*****************************************************************************
+//
+//! \brief Disables Saturation Mode.
+//!
+//! This function disables saturation mode, which allows the raw result of the
+//! MPY result registers to be returned.
+//!
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void MPY32_disableSaturationMode(void);
+
+//*****************************************************************************
+//
+//! \brief Gets the Saturation Mode.
+//!
+//! This function gets the current saturation mode.
+//!
+//!
+//! \return Gets the Saturation Mode
+//! Return one of the following:
+//! - \b MPY32_SATURATION_MODE_DISABLED
+//! - \b MPY32_SATURATION_MODE_ENABLED
+//! \n Gets the Saturation Mode
+//
+//*****************************************************************************
+extern uint8_t MPY32_getSaturationMode(void);
+
+//*****************************************************************************
+//
+//! \brief Enables Fraction Mode.
+//!
+//! This function enables fraction mode.
+//!
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void MPY32_enableFractionalMode(void);
+
+//*****************************************************************************
+//
+//! \brief Disables Fraction Mode.
+//!
+//! This function disables fraction mode.
+//!
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void MPY32_disableFractionalMode(void);
+
+//*****************************************************************************
+//
+//! \brief Gets the Fractional Mode.
+//!
+//! This function gets the current fractional mode.
+//!
+//!
+//! \return Gets the fractional mode
+//! Return one of the following:
+//! - \b MPY32_FRACTIONAL_MODE_DISABLED
+//! - \b MPY32_FRACTIONAL_MODE_ENABLED
+//! \n Gets the Fractional Mode
+//
+//*****************************************************************************
+extern uint8_t MPY32_getFractionalMode(void);
+
+//*****************************************************************************
+//
+//! \brief Sets an 8-bit value into operand 1.
+//!
+//! This function sets the first operand for multiplication and determines what
+//! type of operation should be performed. Once the second operand is set, then
+//! the operation will begin.
+//!
+//! \param multiplicationType is the type of multiplication to perform once the
+//! second operand is set.
+//! Valid values are:
+//! - \b MPY32_MULTIPLY_UNSIGNED
+//! - \b MPY32_MULTIPLY_SIGNED
+//! - \b MPY32_MULTIPLYACCUMULATE_UNSIGNED
+//! - \b MPY32_MULTIPLYACCUMULATE_SIGNED
+//! \param operand is the 8-bit value to load into the 1st operand.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void MPY32_setOperandOne8Bit(uint8_t multiplicationType,
+ uint8_t operand);
+
+//*****************************************************************************
+//
+//! \brief Sets an 16-bit value into operand 1.
+//!
+//! This function sets the first operand for multiplication and determines what
+//! type of operation should be performed. Once the second operand is set, then
+//! the operation will begin.
+//!
+//! \param multiplicationType is the type of multiplication to perform once the
+//! second operand is set.
+//! Valid values are:
+//! - \b MPY32_MULTIPLY_UNSIGNED
+//! - \b MPY32_MULTIPLY_SIGNED
+//! - \b MPY32_MULTIPLYACCUMULATE_UNSIGNED
+//! - \b MPY32_MULTIPLYACCUMULATE_SIGNED
+//! \param operand is the 16-bit value to load into the 1st operand.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void MPY32_setOperandOne16Bit(uint8_t multiplicationType,
+ uint16_t operand);
+
+//*****************************************************************************
+//
+//! \brief Sets an 24-bit value into operand 1.
+//!
+//! This function sets the first operand for multiplication and determines what
+//! type of operation should be performed. Once the second operand is set, then
+//! the operation will begin.
+//!
+//! \param multiplicationType is the type of multiplication to perform once the
+//! second operand is set.
+//! Valid values are:
+//! - \b MPY32_MULTIPLY_UNSIGNED
+//! - \b MPY32_MULTIPLY_SIGNED
+//! - \b MPY32_MULTIPLYACCUMULATE_UNSIGNED
+//! - \b MPY32_MULTIPLYACCUMULATE_SIGNED
+//! \param operand is the 24-bit value to load into the 1st operand.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void MPY32_setOperandOne24Bit(uint8_t multiplicationType,
+ uint32_t operand);
+
+//*****************************************************************************
+//
+//! \brief Sets an 32-bit value into operand 1.
+//!
+//! This function sets the first operand for multiplication and determines what
+//! type of operation should be performed. Once the second operand is set, then
+//! the operation will begin.
+//!
+//! \param multiplicationType is the type of multiplication to perform once the
+//! second operand is set.
+//! Valid values are:
+//! - \b MPY32_MULTIPLY_UNSIGNED
+//! - \b MPY32_MULTIPLY_SIGNED
+//! - \b MPY32_MULTIPLYACCUMULATE_UNSIGNED
+//! - \b MPY32_MULTIPLYACCUMULATE_SIGNED
+//! \param operand is the 32-bit value to load into the 1st operand.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void MPY32_setOperandOne32Bit(uint8_t multiplicationType,
+ uint32_t operand);
+
+//*****************************************************************************
+//
+//! \brief Sets an 8-bit value into operand 2, which starts the multiplication.
+//!
+//! This function sets the second operand of the multiplication operation and
+//! starts the operation.
+//!
+//! \param operand is the 8-bit value to load into the 2nd operand.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void MPY32_setOperandTwo8Bit(uint8_t operand);
+
+//*****************************************************************************
+//
+//! \brief Sets an 16-bit value into operand 2, which starts the
+//! multiplication.
+//!
+//! This function sets the second operand of the multiplication operation and
+//! starts the operation.
+//!
+//! \param operand is the 16-bit value to load into the 2nd operand.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void MPY32_setOperandTwo16Bit(uint16_t operand);
+
+//*****************************************************************************
+//
+//! \brief Sets an 24-bit value into operand 2, which starts the
+//! multiplication.
+//!
+//! This function sets the second operand of the multiplication operation and
+//! starts the operation.
+//!
+//! \param operand is the 24-bit value to load into the 2nd operand.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void MPY32_setOperandTwo24Bit(uint32_t operand);
+
+//*****************************************************************************
+//
+//! \brief Sets an 32-bit value into operand 2, which starts the
+//! multiplication.
+//!
+//! This function sets the second operand of the multiplication operation and
+//! starts the operation.
+//!
+//! \param operand is the 32-bit value to load into the 2nd operand.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void MPY32_setOperandTwo32Bit(uint32_t operand);
+
+//*****************************************************************************
+//
+//! \brief Returns an 64-bit result of the last multiplication operation.
+//!
+//! This function returns all 64 bits of the result registers
+//!
+//!
+//! \return The 64-bit result is returned as a uint64_t type
+//
+//*****************************************************************************
+extern uint64_t MPY32_getResult(void);
+
+//*****************************************************************************
+//
+//! \brief Returns the Sum Extension of the last multiplication operation.
+//!
+//! This function returns the Sum Extension of the MPY module, which either
+//! gives the sign after a signed operation or shows a carry after a multiply-
+//! and-accumulate operation. The Sum Extension acts as a check for overflows
+//! or underflows.
+//!
+//!
+//! \return The value of the MPY32 module Sum Extension.
+//
+//*****************************************************************************
+extern uint16_t MPY32_getSumExtension(void);
+
+//*****************************************************************************
+//
+//! \brief Returns the Carry Bit of the last multiplication operation.
+//!
+//! This function returns the Carry Bit of the MPY module, which either gives
+//! the sign after a signed operation or shows a carry after a multiply- and-
+//! accumulate operation.
+//!
+//!
+//! \return The value of the MPY32 module Carry Bit 0x0 or 0x1.
+//
+//*****************************************************************************
+extern uint16_t MPY32_getCarryBitValue(void);
+
+//*****************************************************************************
+//
+//! \brief Clears the Carry Bit of the last multiplication operation.
+//!
+//! This function clears the Carry Bit of the MPY module
+//!
+//!
+//! \return The value of the MPY32 module Carry Bit 0x0 or 0x1.
+//
+//*****************************************************************************
+extern void MPY32_clearCarryBitValue(void);
+
+//*****************************************************************************
+//
+//! \brief Preloads the result register
+//!
+//! This function Preloads the result register
+//!
+//! \param result value to preload the result register to
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void MPY32_preloadResult(uint64_t result);
+
+//*****************************************************************************
+//
+// Mark the end of the C bindings section for C++ compilers.
+//
+//*****************************************************************************
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+#endif // __MSP430WARE_MPY32_H__
diff --git a/Apps/FlightSoftware/MotorControl/driverlib/mtif.c b/Apps/FlightSoftware/MotorControl/driverlib/mtif.c
new file mode 100644
index 000000000..20c4efe61
--- /dev/null
+++ b/Apps/FlightSoftware/MotorControl/driverlib/mtif.c
@@ -0,0 +1,210 @@
+/* --COPYRIGHT--,BSD
+ * Copyright (c) 2017, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * --/COPYRIGHT--*/
+//*****************************************************************************
+//
+// mtif.c - Driver for the MTIF Module.
+//
+//*****************************************************************************
+
+//*****************************************************************************
+//
+//! \addtogroup mtif_api mtif
+//! @{
+//
+//*****************************************************************************
+
+#include "inc/hw_memmap.h"
+
+#ifdef __MSP430_HAS_MTIF__
+#include "mtif.h"
+
+#include
+
+void MTIF_enablePulseGen(uint16_t baseAddress)
+{
+ HWREG16(baseAddress + OFS_MTIFPGCNF) = (PGPW | PGEN);
+}
+
+void MTIF_disablePulseGen(uint16_t baseAddress)
+{
+ HWREG16(baseAddress + OFS_MTIFPGCNF) = PGPW;
+}
+
+void MTIF_clearPulseGenCounter(uint16_t baseAddress)
+{
+ HWREG16(baseAddress + OFS_MTIFPGCNF) = (PGPW | PGCLR);
+}
+
+void MTIF_setPulseGenPulseGridFreq(uint16_t baseAddress, uint8_t freq)
+{
+ uint8_t state = HWREG8(baseAddress + OFS_MTIFPGCNF_L);
+ state &= ~PGFS;
+ state |= freq;
+ HWREG16(baseAddress + OFS_MTIFPGCNF) = (PGPW | state);
+}
+
+void MTIF_setPulseGenCountNum(uint16_t baseAddress, uint8_t num)
+{
+ HWREG16(baseAddress + OFS_MTIFPGKVAL) = (PGPW | num);
+}
+
+void MTIF_clearPulseKCountUpdateRequest(uint16_t baseAddress)
+{
+ HWREG16(baseAddress + OFS_MTIFPGCTL) = (PGPW | PKUR);
+}
+
+void MTIF_clearPulseGridFreqUpdateRequest(uint16_t baseAddress)
+{
+ HWREG16(baseAddress + OFS_MTIFPGCTL) = (PGPW | PGUR);
+}
+
+void MTIF_setPulseKCountUpdateAck(uint16_t baseAddress)
+{
+ HWREG16(baseAddress + OFS_MTIFPGSR) |= PKUA;
+}
+
+uint16_t MTIF_isPulseKCountUpdated(uint16_t baseAddress)
+{
+ return (HWREG16(baseAddress + OFS_MTIFPGSR) & PKUA);
+}
+
+void MTIF_setPulseGridFreqUpdateAck(uint16_t baseAddress)
+{
+ HWREG16(baseAddress + OFS_MTIFPGSR) |= PGUA;
+}
+
+uint16_t MTIF_isPulseGridFreqUpdated(uint16_t baseAddress)
+{
+ return (HWREG16(baseAddress + OFS_MTIFPGSR) & PGUA);
+}
+
+void MTIF_enablePulseCounter(uint16_t baseAddress)
+{
+ HWREG16(baseAddress + OFS_MTIFPCCNF) = (PCEN | PCPW);
+}
+
+void MTIF_disablePulseCounter(uint16_t baseAddress)
+{
+ HWREG16(baseAddress + OFS_MTIFPCCNF) = PCPW;
+}
+
+void MTIF_clearPulseCounter(uint16_t baseAddress)
+{
+ HWREG16(baseAddress + OFS_MTIFPCCNF) = (PCPW | PCCLR);
+}
+
+uint16_t MTIF_getPulseCount(uint16_t baseAddress)
+{
+ return HWREG16(baseAddress + OFS_MTIFPCR);
+}
+
+void MTIF_setPulseCounterReadRequest(uint16_t baseAddress)
+{
+ HWREG16(baseAddress + OFS_MTIFPCCTL) |= PCRR;
+}
+
+void MTIF_setPulseCounterReadAck(uint16_t baseAddress)
+{
+ HWREG16(baseAddress + OFS_MTIFPCSR) |= PCRA;
+}
+
+uint16_t MTIF_isPulseCounterReadReady(uint16_t baseAddress)
+{
+ return (HWREG16(baseAddress + OFS_MTIFPCSR) & PCRA);
+}
+
+uint16_t MTIF_getPulseCounterOverflow(uint16_t baseAddress)
+{
+ return (HWREG16(baseAddress + OFS_MTIFPCSR) & PCOFL);
+}
+
+void MTIF_ackPulseCounterOverflow(uint16_t baseAddress)
+{
+ HWREG16(baseAddress + OFS_MTIFPCSR) |= PCOFL;
+}
+
+void MTIF_enableTestPortOutput(uint16_t baseAddress)
+{
+ HWREG16(baseAddress + OFS_MTIFTPCTL) = (TPPW |
+ HWREG8(baseAddress + OFS_MTIFTPCTL_L) | TPOE);
+}
+
+void MTIF_disableTestPortOutput(uint16_t baseAddress)
+{
+ uint8_t state = HWREG8(baseAddress + OFS_MTIFTPCTL_L);
+ HWREG16(baseAddress + OFS_MTIFTPCTL) = (TPPW | (state & ~TPOE));
+}
+
+void MTIF_enableTestPortInput(uint16_t baseAddress)
+{
+ HWREG16(baseAddress + OFS_MTIFTPCTL) = (TPPW |
+ HWREG8(baseAddress + OFS_MTIFTPCTL_L) | TPIE);
+}
+
+void MTIF_disableTestPortInput(uint16_t baseAddress)
+{
+ uint8_t state = HWREG8(baseAddress + OFS_MTIFTPCTL_L);
+ HWREG16(baseAddress + OFS_MTIFTPCTL) = (TPPW | (state & ~TPIE));
+}
+
+void MTIF_setPulseGeneratorAsPulseCounterInput(uint16_t baseAddress)
+{
+ uint8_t state = HWREG8(baseAddress + OFS_MTIFTPCTL_L);
+ HWREG16(baseAddress + OFS_MTIFTPCTL) = (TPPW | (state & ~TPISEL));
+}
+
+void MTIF_setTestPortInputTerminalAsPulseCounterInput(uint16_t baseAddress)
+{
+ HWREG16(baseAddress + OFS_MTIFTPCTL) = (TPPW |
+ HWREG8(baseAddress + OFS_MTIFTPCTL_L) | TPISEL);
+}
+
+void MTIF_enableTestPortTerminalActivationBySW(uint16_t baseAddress)
+{
+ uint8_t state = HWREG8(baseAddress + OFS_MTIFTPCTL_L);
+ HWREG16(baseAddress + OFS_MTIFTPCTL) = (TPPW | (state & ~ACTIVATE));
+}
+
+void MTIF_enableTestPortTerminalActivationBySWAndHW(uint16_t baseAddress)
+{
+ HWREG16(baseAddress + OFS_MTIFTPCTL) = (TPPW |
+ HWREG8(baseAddress + OFS_MTIFTPCTL_L) | ACTIVATE);
+}
+
+#endif
+//*****************************************************************************
+//
+//! Close the doxygen group for mtif_api
+//! @}
+//
+//*****************************************************************************
+
diff --git a/Apps/FlightSoftware/MotorControl/driverlib/mtif.h b/Apps/FlightSoftware/MotorControl/driverlib/mtif.h
new file mode 100644
index 000000000..71c257e96
--- /dev/null
+++ b/Apps/FlightSoftware/MotorControl/driverlib/mtif.h
@@ -0,0 +1,563 @@
+/* --COPYRIGHT--,BSD
+ * Copyright (c) 2017, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * --/COPYRIGHT--*/
+//*****************************************************************************
+//
+// mtif.h - Driver for the MTIF Module.
+//
+//*****************************************************************************
+
+#ifndef __MSP430WARE_MTIF_H__
+#define __MSP430WARE_MTIF_H__
+
+#include "inc/hw_memmap.h"
+
+#ifdef __MSP430_HAS_MTIF__
+
+//*****************************************************************************
+//
+// If building with a C++ compiler, make all of the definitions in this header
+// have a C binding.
+//
+//*****************************************************************************
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the freq parameter for
+// functions: MTIF_setPulseGenPulseGridFreq
+//
+//*****************************************************************************
+#define MTIF_PULSE_GRID_FREQUENCY_8HZ PGFS_0
+#define MTIF_PULSE_GRID_FREQUENCY_16HZ PGFS_1
+#define MTIF_PULSE_GRID_FREQUENCY_32HZ PGFS_2
+#define MTIF_PULSE_GRID_FREQUENCY_64HZ PGFS_3
+#define MTIF_PULSE_GRID_FREQUENCY_128HZ PGFS_4
+#define MTIF_PULSE_GRID_FREQUENCY_256HZ PGFS_5
+#define MTIF_PULSE_GRID_FREQUENCY_512HZ PGFS_6
+#define MTIF_PULSE_GRID_FREQUENCY_1024HZ PGFS_7
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the num parameter for
+// functions: MTIF_setPulseGenCountNum
+//
+//*****************************************************************************
+#define MTIF_KVAL_BIT0 KVAL0
+#define MTIF_KVAL_BIT1 KVAL1
+#define MTIF_KVAL_BIT2 KVAL2
+#define MTIF_KVAL_BIT3 KVAL3
+#define MTIF_KVAL_BIT4 KVAL4
+#define MTIF_KVAL_BIT5 KVAL5
+#define MTIF_KVAL_BIT6 KVAL6
+
+//*****************************************************************************
+//
+// The following are values that can be returned by the
+// MTIF_isPulseKCountUpdated() function.
+//
+//*****************************************************************************
+#define MTIF_K_COUNT_IS_UPDATED PKUA
+#define MTIF_K_COUNT_IS_NOT_UPDATED 0x0
+
+//*****************************************************************************
+//
+// The following are values that can be returned by the
+// MTIF_isPulseGridFreqUpdated() function.
+//
+//*****************************************************************************
+#define MTIF_PULSE_GRID_FREQUENCY_IS_UPDATED PGUA
+#define MTIF_PULSE_GRID_FREQUENCY_IS_NOT_UPDATED 0x0
+
+//*****************************************************************************
+//
+// The following are values that can be returned by the
+// MTIF_getPulseCounterOverflow() function.
+//
+//*****************************************************************************
+#define MTIF_PULSE_COUNTER_OVERFLOW PCOFL
+#define MTIF_PULSE_COUNTER_NOT_OVERFLOW 0x0
+
+//*****************************************************************************
+//
+// The following are values that can be returned by the
+// MTIF_isPulseCounterReadReady() function.
+//
+//*****************************************************************************
+#define MTIF_PULSE_COUNTER_READY_TO_READ PCRA
+#define MTIF_PULSE_COUNTER_NOT_READY_TO_READ 0x0
+
+//*****************************************************************************
+//
+// Prototypes for the APIs.
+//
+//*****************************************************************************
+
+//*****************************************************************************
+//
+//! \brief Enables Pulse Generator.
+//!
+//! Enable the PG sub module
+//!
+//! \param baseAddress is the base address of the MTIF module.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void MTIF_enablePulseGen(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Disables Pulse Generator.
+//!
+//! Disable the PG sub module
+//!
+//! \param baseAddress is the base address of the MTIF module.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void MTIF_disablePulseGen(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Pulse Generator pulse counter clear.
+//!
+//! Clears the pulse generator. (PGEN has to be set to one to perform a clear).
+//! Note!: A clear request is being latched and released after the clear
+//! is executed. MTIF_disablePulseGen (PCEN=0) and LFXTOFF=1 will prevent that.
+//! The clear occurs then after the clock is reenabled. Clear reset by PUC.
+//!
+//! \param baseAddress is the base address of the MTIF module.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void MTIF_clearPulseGenCounter(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Pulse Generator pulse grid frequency select.
+//!
+//! This value determines at which time grid pulses are generated.
+//! The pulse generator frame frequency is an 1/256th of this
+//! (PGEN has to be one to perform a change). Reset by PUC.
+//!
+//! \param baseAddress is the base address of the MTIF module.
+//! \param freq is the specified pulse grid frequency select.
+//! Valid values are:
+//! - \b MTIF_PULSE_GRID_FREQUENCY_8HZ
+//! - \b MTIF_PULSE_GRID_FREQUENCY_16HZ
+//! - \b MTIF_PULSE_GRID_FREQUENCY_32HZ
+//! - \b MTIF_PULSE_GRID_FREQUENCY_64HZ
+//! - \b MTIF_PULSE_GRID_FREQUENCY_128HZ
+//! - \b MTIF_PULSE_GRID_FREQUENCY_256HZ
+//! - \b MTIF_PULSE_GRID_FREQUENCY_512HZ
+//! - \b MTIF_PULSE_GRID_FREQUENCY_1024HZ [Default]
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void MTIF_setPulseGenPulseGridFreq(uint16_t baseAddress, uint8_t freq);
+
+//*****************************************************************************
+//
+//! \brief Set Pulse Count Number.
+//!
+//! This register value determines how many pulses are generated withing
+//! 256 periods of the pulse grid frequency(with password protection as in PGCNF).
+//! PGEN has to be one to perform a change. Reset by PUC.
+//!
+//! \param baseAddress is the base address of the MTIF module.
+//! \param num is the logical OR of any of the following:
+//! - \b MTIF_KVAL_BIT0
+//! - \b MTIF_KVAL_BIT1
+//! - \b MTIF_KVAL_BIT2
+//! - \b MTIF_KVAL_BIT3
+//! - \b MTIF_KVAL_BIT4
+//! - \b MTIF_KVAL_BIT5
+//! - \b MTIF_KVAL_BIT6
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void MTIF_setPulseGenCountNum(uint16_t baseAddress, uint8_t num);
+
+//*****************************************************************************
+//
+//! \brief Pulse K-Count Update Request.
+//!
+//! The update of KVAL occurs during the frequency grid slot
+//! 0xff (e.g. in the last 4ms of a second with a pulse grid frequency of
+//! 256Hz). Reset type: PUC
+//!
+//! \param baseAddress is the base address of the MTIF module.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void MTIF_clearPulseKCountUpdateRequest(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Pulse Grid Frequency Update Request.
+//!
+//! The update of PGFS occurs during the frequency grid
+//! slot 0xff (e.g. in the last 4ms of an second with an pulse grid
+//! frequency of 256Hz). Reset type: PUC
+//!
+//! \param baseAddress is the base address of the MTIF module.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void MTIF_clearPulseGridFreqUpdateRequest(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Pulse K-Count Update Acknowledge.
+//!
+//! This acknowledges a PCUR directly after the K-values has been updated.
+//! Reset type: PUC
+//!
+//! \param baseAddress is the base address of the MTIF module.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void MTIF_setPulseKCountUpdateAck(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Is Pulse K-Count Updated?
+//!
+//! This checks whether Pulse K-Count has been updated.
+//! Reset type: PUC
+//!
+//! \param baseAddress is the base address of the MTIF module.
+//!
+//! \return Valid values are:
+//! - \b MTIF_K_COUNT_IS_UPDATED
+//! - \b MTIF_K_COUNT_IS_NOT_UPDATED
+//
+//*****************************************************************************
+extern uint16_t MTIF_isPulseKCountUpdated(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Pulse Grid Frequency Update Acknowledge.
+//!
+//! This acknowledges a PGUR directly after the PGFS has been updated.
+//! Reset type: PUC
+//!
+//! \param baseAddress is the base address of the MTIF module.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void MTIF_setPulseGridFreqUpdateAck(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Is Pulse Pulse Grid Frequency Updated?
+//!
+//! This checks whether Pulse Grid Frequency has been updated.
+//! Reset type: PUC
+//!
+//! \param baseAddress is the base address of the MTIF module.
+//!
+//! \return Valid values are:
+//! - \b MTIF_PULSE_GRID_FREQUENCY_IS_UPDATED
+//! - \b MTIF_PULSE_GRID_FREQUENCY_IS_NOT_UPDATED
+//
+//*****************************************************************************
+extern uint16_t MTIF_isPulseGridFreqUpdated(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief PC sub module enable.
+//!
+//! This bit enables the PC sub module when set to one. Reset type: POR
+//!
+//! \param baseAddress is the base address of the MTIF module.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void MTIF_enablePulseCounter(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief PC sub module disable.
+//!
+//! This bit disables the PC sub module when set to zero. Reset type: POR
+//!
+//! \param baseAddress is the base address of the MTIF module.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void MTIF_disablePulseCounter(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Pulse counter clear.
+//!
+//! Clears the pulse counter (PC has to be disabled to perform a clear).
+//! Note!: A clear request is being latched and released after the clear is executed.
+//! LFXTOFF=1 and PCEN=0 will prevent that. The clear occurs then after the clock
+//! is reenabled. This bit is for triggering only; it's state cannot be read back
+//! Reset type: PUC
+//!
+//! \param baseAddress is the base address of the MTIF module.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void MTIF_clearPulseCounter(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Pulse Counter value register.
+//!
+//! Get count value from the pulse counter.
+//!
+//! \param baseAddress is the base address of the MTIF module.
+//!
+//! \return 16-bit count value from pulse counter
+//
+//*****************************************************************************
+extern uint16_t MTIF_getPulseCount(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Pulse Counter Read Request.
+//!
+//! Requests an update of PCR read register from the actual counter.
+//! Reset type: PUC
+//!
+//! \param baseAddress is the base address of the MTIF module.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void MTIF_setPulseCounterReadRequest(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Pulse counter read acknowledge.
+//!
+//! This acknowledges the update of the PCR register as response to
+//! the PCRR read request. Note!: A read request is being latched.
+//! LFXTOFF=1 and PCEN=0 will prevent that.The read will then be performed and
+//! acknowledged after the clock is reenabled. Reset type: PUC
+//!
+//! \param baseAddress is the base address of the MTIF module.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void MTIF_setPulseCounterReadAck(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Is Pulse Counter value ready to read?.
+//!
+//! This function will let you know if Pulse Counter value is updated and ready
+//! to read as a response to the Pulse Counter Read Request. Reset type: PUC
+//!
+//! \param baseAddress is the base address of the MTIF module.
+//!
+//! \return Valid values are:
+//! - \b MTIF_PULSE_COUNTER_READY_TO_READ
+//! - \b MTIF_PULSE_COUNTER_NOT_READY_TO_READ
+//
+//*****************************************************************************
+extern uint16_t MTIF_isPulseCounterReadReady(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Pulse counter overflow.
+//!
+//! This bit indicates an overflow of the pulse counter when its value changes since
+//! the last read request procedure. It is basically the 17th bit of the counter
+//! Reset type: PUC
+//!
+//! \param baseAddress is the base address of the MTIF module.
+//!
+//! \return Valid values are:
+//! - \b MTIF_PULSE_COUNTER_OVERFLOW
+//! - \b MTIF_PULSE_COUNTER_NOT_OVERFLOW
+//
+//*****************************************************************************
+extern uint16_t MTIF_getPulseCounterOverflow(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Acknowledge pulse counter overflow.
+//!
+//! This function acknowledges an overflow of the pulse counter since
+//! the last read request procedure.
+//! Reset type: PUC
+//!
+//! \param baseAddress is the base address of the MTIF module.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void MTIF_ackPulseCounterOverflow(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Enables test port output.
+//!
+//! Enable the test pulse output. Reset type: POR
+//!
+//! \param baseAddress is the base address of the MTIF module.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void MTIF_enableTestPortOutput(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Disables test port output.
+//!
+//! Disable the test pulse output. Reset type: POR
+//!
+//! \param baseAddress is the base address of the MTIF module.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void MTIF_disableTestPortOutput(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Enables test port input.
+//!
+//! Enable the test input port. Reset type: POR
+//!
+//! \param baseAddress is the base address of the MTIF module.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void MTIF_enableTestPortInput(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Disables test port input.
+//!
+//! Disable the test input port. Reset type: POR
+//!
+//! \param baseAddress is the base address of the MTIF module.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void MTIF_disableTestPortInput(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Test port input select for pulse counter, sourced from pulse generator.
+//!
+//! Pulse generator is used as input for test port of pulse counter
+//! Reset Type: POR
+//!
+//! \param baseAddress is the base address of the MTIF module.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void MTIF_setPulseGeneratorAsPulseCounterInput(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Test port input select for pulse counter, sourced from test port
+//! input terminal.
+//!
+//! Test port input terminal is used as input for test port of pulse counter
+//! Reset Type: POR
+//!
+//! \param baseAddress is the base address of the MTIF module.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void MTIF_setTestPortInputTerminalAsPulseCounterInput(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Test port terminal enable activation by software.
+//!
+//! The test port output is enabled solely by TPOE (enabled if TPOE=1) test port
+//! output enabled.
+//! Reset Type: POR
+//!
+//! \param baseAddress is the base address of the MTIF module.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void MTIF_enableTestPortTerminalActivationBySW(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Test port terminal enable activation by software and hardware.
+//!
+//! The test port output requires both TPOE (enabled if TPOE=1) test port
+//! output enabled, and MTPE pin to be high, to be enabled.
+//! Reset Type: POR
+//!
+//! \param baseAddress is the base address of the MTIF module.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void MTIF_enableTestPortTerminalActivationBySWAndHW(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+// Mark the end of the C bindings section for C++ compilers.
+//
+//*****************************************************************************
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+#endif // __MSP430WARE_MTIF_H__
+
diff --git a/Apps/FlightSoftware/MotorControl/driverlib/pmm.c b/Apps/FlightSoftware/MotorControl/driverlib/pmm.c
new file mode 100644
index 000000000..393fbfee2
--- /dev/null
+++ b/Apps/FlightSoftware/MotorControl/driverlib/pmm.c
@@ -0,0 +1,124 @@
+/* --COPYRIGHT--,BSD
+ * Copyright (c) 2017, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * --/COPYRIGHT--*/
+//*****************************************************************************
+//
+// pmm.c - Driver for the pmm Module.
+//
+//*****************************************************************************
+
+//*****************************************************************************
+//
+//! \addtogroup pmm_api pmm
+//! @{
+//
+//*****************************************************************************
+
+#include "inc/hw_memmap.h"
+
+#ifdef __MSP430_HAS_PMM_FRAM__
+#include "pmm.h"
+
+#include
+
+void PMM_enableSVSH (void)
+{
+ HWREG8(PMM_BASE + OFS_PMMCTL0_H) = PMMPW_H;
+ HWREG8(PMM_BASE + OFS_PMMCTL0_L) |= SVSHE;
+ HWREG8(PMM_BASE + OFS_PMMCTL0_H) = 0x00;
+}
+
+void PMM_disableSVSH (void)
+{
+ HWREG8(PMM_BASE + OFS_PMMCTL0_H) = PMMPW_H;
+ HWREG8(PMM_BASE + OFS_PMMCTL0_L) &= ~SVSHE;
+ HWREG8(PMM_BASE + OFS_PMMCTL0_H) = 0x00;
+}
+
+void PMM_turnOnRegulator (void)
+{
+ HWREG8(PMM_BASE + OFS_PMMCTL0_H) = PMMPW_H;
+ HWREG8(PMM_BASE + OFS_PMMCTL0) &= ~PMMREGOFF;
+ HWREG8(PMM_BASE + OFS_PMMCTL0_H) = 0x00;
+}
+
+void PMM_turnOffRegulator (void)
+{
+ HWREG8(PMM_BASE + OFS_PMMCTL0_H) = PMMPW_H;
+ HWREG8(PMM_BASE + OFS_PMMCTL0) |= PMMREGOFF;
+ HWREG8(PMM_BASE + OFS_PMMCTL0_H) = 0x00;
+}
+
+void PMM_trigPOR (void)
+{
+ HWREG8(PMM_BASE + OFS_PMMCTL0_H) = PMMPW_H;
+ HWREG8(PMM_BASE + OFS_PMMCTL0) |= PMMSWPOR;
+ HWREG8(PMM_BASE + OFS_PMMCTL0_H) = 0x00;
+}
+
+void PMM_trigBOR (void)
+{
+ HWREG8(PMM_BASE + OFS_PMMCTL0_H) = PMMPW_H;
+ HWREG8(PMM_BASE + OFS_PMMCTL0) |= PMMSWBOR;
+ HWREG8(PMM_BASE + OFS_PMMCTL0_H) = 0x00;
+}
+
+void PMM_clearInterrupt (uint16_t mask)
+{
+ HWREG8(PMM_BASE + OFS_PMMCTL0_H) = PMMPW_H;
+ HWREG16(PMM_BASE + OFS_PMMIFG) &= ~mask;
+ HWREG8(PMM_BASE + OFS_PMMCTL0_H) = 0x00;
+}
+
+uint16_t PMM_getInterruptStatus (uint16_t mask)
+{
+ return ( (HWREG16(PMM_BASE + OFS_PMMIFG)) & mask );
+}
+
+void PMM_unlockLPM5 (void)
+{
+ //Direct register access to avoid compiler warning - #10420-D
+ //For FRAM devices, at start up, the GPO power-on default
+ //high-impedance mode needs to be disabled to activate previously
+ //configured port settings. This can be done by clearing the LOCKLPM5
+ //bit in PM5CTL0 register
+
+ PM5CTL0 &= ~LOCKLPM5;
+}
+
+
+#endif
+//*****************************************************************************
+//
+//! Close the doxygen group for pmm_api
+//! @}
+//
+//*****************************************************************************
diff --git a/Apps/FlightSoftware/MotorControl/driverlib/pmm.h b/Apps/FlightSoftware/MotorControl/driverlib/pmm.h
new file mode 100644
index 000000000..12e9edfb6
--- /dev/null
+++ b/Apps/FlightSoftware/MotorControl/driverlib/pmm.h
@@ -0,0 +1,219 @@
+/* --COPYRIGHT--,BSD
+ * Copyright (c) 2017, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * --/COPYRIGHT--*/
+//*****************************************************************************
+//
+// pmm.h - Driver for the PMM Module.
+//
+//*****************************************************************************
+
+#ifndef __MSP430WARE_PMM_H__
+#define __MSP430WARE_PMM_H__
+
+#include "inc/hw_memmap.h"
+
+#ifdef __MSP430_HAS_PMM_FRAM__
+
+//*****************************************************************************
+//
+// If building with a C++ compiler, make all of the definitions in this header
+// have a C binding.
+//
+//*****************************************************************************
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the mask parameter for
+// functions: PMM_clearInterrupt(), and PMM_getInterruptStatus() as well as
+// returned by the PMM_getInterruptStatus() function.
+//
+//*****************************************************************************
+#define PMM_BOR_INTERRUPT PMMBORIFG
+#define PMM_RST_INTERRUPT PMMRSTIFG
+#define PMM_POR_INTERRUPT PMMPORIFG
+#define PMM_SVSH_INTERRUPT SVSHIFG
+#define PMM_LPM5_INTERRUPT PMMLPM5IFG
+#define PMM_ALL (0xA7)
+
+//*****************************************************************************
+//
+// Prototypes for the APIs.
+//
+//*****************************************************************************
+
+//*****************************************************************************
+//
+//! \brief Enables the high-side SVS circuitry
+//!
+//!
+//! Modified bits of \b PMMCTL0 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void PMM_enableSVSH(void);
+
+//*****************************************************************************
+//
+//! \brief Disables the high-side SVS circuitry
+//!
+//!
+//! Modified bits of \b PMMCTL0 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void PMM_disableSVSH(void);
+
+//*****************************************************************************
+//
+//! \brief Makes the low-dropout voltage regulator (LDO) remain ON when going
+//! into LPM 3/4.
+//!
+//!
+//! Modified bits of \b PMMCTL0 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void PMM_turnOnRegulator(void);
+
+//*****************************************************************************
+//
+//! \brief Turns OFF the low-dropout voltage regulator (LDO) when going into
+//! LPM3/4, thus the system will enter LPM3.5 or LPM4.5 respectively
+//!
+//!
+//! Modified bits of \b PMMCTL0 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void PMM_turnOffRegulator(void);
+
+//*****************************************************************************
+//
+//! \brief Calling this function will trigger a software Power On Reset (POR).
+//!
+//!
+//! Modified bits of \b PMMCTL0 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void PMM_trigPOR(void);
+
+//*****************************************************************************
+//
+//! \brief Calling this function will trigger a software Brown Out Rest (BOR).
+//!
+//!
+//! Modified bits of \b PMMCTL0 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void PMM_trigBOR(void);
+
+//*****************************************************************************
+//
+//! \brief Clears interrupt flags for the PMM
+//!
+//! \param mask is the mask for specifying the required flag
+//! Mask value is the logical OR of any of the following:
+//! - \b PMM_BOR_INTERRUPT - Software BOR interrupt
+//! - \b PMM_RST_INTERRUPT - RESET pin interrupt
+//! - \b PMM_POR_INTERRUPT - Software POR interrupt
+//! - \b PMM_SVSH_INTERRUPT - SVS high side interrupt
+//! - \b PMM_LPM5_INTERRUPT - LPM5 indication
+//! - \b PMM_ALL - All interrupts
+//!
+//! Modified bits of \b PMMCTL0 register and bits of \b PMMIFG register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void PMM_clearInterrupt(uint16_t mask);
+
+//*****************************************************************************
+//
+//! \brief Returns interrupt status
+//!
+//! \param mask is the mask for specifying the required flag
+//! Mask value is the logical OR of any of the following:
+//! - \b PMM_BOR_INTERRUPT - Software BOR interrupt
+//! - \b PMM_RST_INTERRUPT - RESET pin interrupt
+//! - \b PMM_POR_INTERRUPT - Software POR interrupt
+//! - \b PMM_SVSH_INTERRUPT - SVS high side interrupt
+//! - \b PMM_LPM5_INTERRUPT - LPM5 indication
+//! - \b PMM_ALL - All interrupts
+//!
+//! \return Logical OR of any of the following:
+//! - \b PMM_BOR_INTERRUPT Software BOR interrupt
+//! - \b PMM_RST_INTERRUPT RESET pin interrupt
+//! - \b PMM_POR_INTERRUPT Software POR interrupt
+//! - \b PMM_SVSH_INTERRUPT SVS high side interrupt
+//! - \b PMM_LPM5_INTERRUPT LPM5 indication
+//! - \b PMM_ALL All interrupts
+//! \n indicating the status of the selected interrupt flags
+//
+//*****************************************************************************
+extern uint16_t PMM_getInterruptStatus(uint16_t mask);
+
+//*****************************************************************************
+//
+//! \brief Unlock LPM5
+//!
+//! LPMx.5 configuration is not locked and defaults to its reset condition.
+//! Disable the GPIO power-on default high-impedance mode to activate
+//! previously configured port settings.
+//!
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void PMM_unlockLPM5(void);
+
+//*****************************************************************************
+//
+// Mark the end of the C bindings section for C++ compilers.
+//
+//*****************************************************************************
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+#endif // __MSP430WARE_PMM_H__
diff --git a/Apps/FlightSoftware/MotorControl/driverlib/ram.c b/Apps/FlightSoftware/MotorControl/driverlib/ram.c
new file mode 100644
index 000000000..85d06ed62
--- /dev/null
+++ b/Apps/FlightSoftware/MotorControl/driverlib/ram.c
@@ -0,0 +1,72 @@
+/* --COPYRIGHT--,BSD
+ * Copyright (c) 2017, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * --/COPYRIGHT--*/
+//*****************************************************************************
+//
+// ram.c - Driver for the ram Module.
+//
+//*****************************************************************************
+
+//*****************************************************************************
+//
+//! \addtogroup ram_api ram
+//! @{
+//
+//*****************************************************************************
+
+#include "inc/hw_memmap.h"
+
+#ifdef __MSP430_HAS_RC_FRAM__
+#include "ram.h"
+
+#include
+
+void RAM_setSectorOff(uint8_t sector, uint8_t mode)
+{
+ uint8_t sectorPos = sector<<1;
+ uint8_t val = HWREG8(RAM_BASE + OFS_RCCTL0_L) & ~(0x3 << sectorPos);
+
+ HWREG16(RAM_BASE + OFS_RCCTL0) = (RCKEY | val | (mode << sectorPos));
+}
+
+uint8_t RAM_getSectorState (uint8_t sector)
+{
+ uint8_t sectorPos = sector<<1;
+ return (HWREG8(RAM_BASE + OFS_RCCTL0_L) & (0x3<> sectorPos;
+}
+
+#endif
+//*****************************************************************************
+//
+//! Close the doxygen group for ram_api
+//! @}
+//
+//*****************************************************************************
diff --git a/Apps/FlightSoftware/MotorControl/driverlib/ram.h b/Apps/FlightSoftware/MotorControl/driverlib/ram.h
new file mode 100644
index 000000000..d13f4fd87
--- /dev/null
+++ b/Apps/FlightSoftware/MotorControl/driverlib/ram.h
@@ -0,0 +1,138 @@
+/* --COPYRIGHT--,BSD
+ * Copyright (c) 2017, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * --/COPYRIGHT--*/
+//*****************************************************************************
+//
+// ram.h - Driver for the RAM Module.
+//
+//*****************************************************************************
+
+#ifndef __MSP430WARE_RAM_H__
+#define __MSP430WARE_RAM_H__
+
+#include "inc/hw_memmap.h"
+
+#ifdef __MSP430_HAS_RC_FRAM__
+
+//*****************************************************************************
+//
+// If building with a C++ compiler, make all of the definitions in this header
+// have a C binding.
+//
+//*****************************************************************************
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the sector parameter for
+// functions: RAM_setSectorOff(), and RAM_getSectorState().
+//
+//*****************************************************************************
+#define RAM_SECTOR0 (0x00)
+#define RAM_SECTOR1 (0x01)
+#define RAM_SECTOR2 (0x02)
+#define RAM_SECTOR3 (0x03)
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the mode parameter for
+// functions: RAM_setSectorOff() as well as returned by the
+// RAM_getSectorState() function.
+//
+//*****************************************************************************
+#define RAM_RETENTION_MODE (0x00)
+#define RAM_OFF_WAKEUP_MODE (RCRS0OFF0)
+#define RAM_OFF_NON_WAKEUP_MODE (RCRS0OFF1)
+
+//*****************************************************************************
+//
+// Prototypes for the APIs.
+//
+//*****************************************************************************
+
+//*****************************************************************************
+//
+//! \brief Set specified RAM sector off
+//!
+//! \param sector is specified sector to be set off.
+//! Valid values are:
+//! - \b RAM_SECTOR0
+//! - \b RAM_SECTOR1
+//! - \b RAM_SECTOR2
+//! - \b RAM_SECTOR3
+//! \param mode is sector off mode
+//! Valid values are:
+//! - \b RAM_RETENTION_MODE
+//! - \b RAM_OFF_WAKEUP_MODE
+//! - \b RAM_OFF_NON_WAKEUP_MODE
+//!
+//! Modified bits of \b RCCTL0 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void RAM_setSectorOff(uint8_t sector,
+ uint8_t mode);
+
+//*****************************************************************************
+//
+//! \brief Get RAM sector ON/OFF status
+//!
+//! \param sector is specified sector
+//! Valid values are:
+//! - \b RAM_SECTOR0
+//! - \b RAM_SECTOR1
+//! - \b RAM_SECTOR2
+//! - \b RAM_SECTOR3
+//!
+//! \return One of the following:
+//! - \b RAM_RETENTION_MODE
+//! - \b RAM_OFF_WAKEUP_MODE
+//! - \b RAM_OFF_NON_WAKEUP_MODE
+//! \n indicating the status of the masked sectors
+//
+//*****************************************************************************
+extern uint8_t RAM_getSectorState(uint8_t sector);
+
+//*****************************************************************************
+//
+// Mark the end of the C bindings section for C++ compilers.
+//
+//*****************************************************************************
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+#endif // __MSP430WARE_RAM_H__
diff --git a/Apps/FlightSoftware/MotorControl/driverlib/ref_a.c b/Apps/FlightSoftware/MotorControl/driverlib/ref_a.c
new file mode 100644
index 000000000..12db0ce74
--- /dev/null
+++ b/Apps/FlightSoftware/MotorControl/driverlib/ref_a.c
@@ -0,0 +1,151 @@
+/* --COPYRIGHT--,BSD
+ * Copyright (c) 2017, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * --/COPYRIGHT--*/
+//*****************************************************************************
+//
+// ref_a.c - Driver for the ref_a Module.
+//
+//*****************************************************************************
+
+//*****************************************************************************
+//
+//! \addtogroup ref_a_api ref_a
+//! @{
+//
+//*****************************************************************************
+
+#include "inc/hw_memmap.h"
+
+#ifdef __MSP430_HAS_REF_A__
+#include "ref_a.h"
+
+#include
+
+void Ref_A_setReferenceVoltage (uint16_t baseAddress,
+ uint8_t referenceVoltageSelect)
+{
+ HWREG8(baseAddress + OFS_REFCTL0_L) &= ~(REFVSEL_3);
+ HWREG8(baseAddress + OFS_REFCTL0_L) |= referenceVoltageSelect;
+}
+
+void Ref_A_disableTempSensor (uint16_t baseAddress)
+{
+ HWREG8(baseAddress + OFS_REFCTL0_L) |= REFTCOFF;
+}
+
+void Ref_A_enableTempSensor (uint16_t baseAddress)
+{
+ HWREG8(baseAddress + OFS_REFCTL0_L) &= ~(REFTCOFF);
+}
+
+void Ref_A_enableReferenceVoltageOutput (uint16_t baseAddress)
+{
+ HWREG8(baseAddress + OFS_REFCTL0_L) |= REFOUT;
+}
+
+void Ref_A_disableReferenceVoltageOutput (uint16_t baseAddress)
+{
+ HWREG8(baseAddress + OFS_REFCTL0_L) &= ~(REFOUT);
+}
+
+void Ref_A_enableReferenceVoltage (uint16_t baseAddress)
+{
+ HWREG8(baseAddress + OFS_REFCTL0_L) |= REFON;
+}
+
+void Ref_A_disableReferenceVoltage (uint16_t baseAddress)
+{
+ HWREG8(baseAddress + OFS_REFCTL0_L) &= ~(REFON);
+}
+
+uint16_t Ref_A_getBandgapMode (uint16_t baseAddress)
+{
+ return (HWREG16((baseAddress) + OFS_REFCTL0) & BGMODE);
+}
+
+bool Ref_A_isBandgapActive (uint16_t baseAddress)
+{
+ if (HWREG16((baseAddress) + OFS_REFCTL0) & REFBGACT){
+ return (REF_A_ACTIVE) ;
+ } else {
+ return (REF_A_INACTIVE) ;
+ }
+}
+
+uint16_t Ref_A_isRefGenBusy (uint16_t baseAddress)
+{
+ return (HWREG16((baseAddress) + OFS_REFCTL0) & REFGENBUSY);
+}
+
+bool Ref_A_isRefGenActive (uint16_t baseAddress)
+{
+ if (HWREG16((baseAddress) + OFS_REFCTL0) & REFGENACT){
+ return (REF_A_ACTIVE) ;
+ } else {
+ return (REF_A_INACTIVE) ;
+ }
+}
+
+bool Ref_A_isBufferedBandgapVoltageReady(uint16_t baseAddress)
+{
+ if (HWREG16((baseAddress) + OFS_REFCTL0) & REFBGRDY){
+ return (REF_A_READY) ;
+ } else {
+ return (REF_A_NOTREADY) ;
+ }
+}
+
+bool Ref_A_isVariableReferenceVoltageOutputReady(uint16_t baseAddress)
+{
+ if (HWREG16((baseAddress) + OFS_REFCTL0) & REFGENRDY){
+ return (REF_A_READY) ;
+ } else {
+ return (REF_A_NOTREADY) ;
+ }
+}
+
+void Ref_A_setReferenceVoltageOneTimeTrigger(uint16_t baseAddress)
+{
+ HWREG8(baseAddress + OFS_REFCTL0_L) |= REFGENOT;
+}
+
+void Ref_A_setBufferedBandgapVoltageOneTimeTrigger(uint16_t baseAddress)
+{
+ HWREG8(baseAddress + OFS_REFCTL0_L) |= REFBGOT;
+}
+
+#endif
+//*****************************************************************************
+//
+//! Close the doxygen group for ref_a_api
+//! @}
+//
+//*****************************************************************************
diff --git a/Apps/FlightSoftware/MotorControl/driverlib/ref_a.h b/Apps/FlightSoftware/MotorControl/driverlib/ref_a.h
new file mode 100644
index 000000000..818a60e7a
--- /dev/null
+++ b/Apps/FlightSoftware/MotorControl/driverlib/ref_a.h
@@ -0,0 +1,412 @@
+/* --COPYRIGHT--,BSD
+ * Copyright (c) 2017, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * --/COPYRIGHT--*/
+//*****************************************************************************
+//
+// ref_a.h - Driver for the REF_A Module.
+//
+//*****************************************************************************
+
+#ifndef __MSP430WARE_REF_A_H__
+#define __MSP430WARE_REF_A_H__
+
+#include "inc/hw_memmap.h"
+
+#ifdef __MSP430_HAS_REF_A__
+
+//*****************************************************************************
+//
+// If building with a C++ compiler, make all of the definitions in this header
+// have a C binding.
+//
+//*****************************************************************************
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the referenceVoltageSelect
+// parameter for functions: Ref_A_setReferenceVoltage().
+//
+//*****************************************************************************
+#define REF_A_VREF1_2V (REFVSEL_0)
+#define REF_A_VREF2_0V (REFVSEL_1)
+#define REF_A_VREF2_5V (REFVSEL_2)
+
+//*****************************************************************************
+//
+// The following are values that can be passed toThe following are values that
+// can be returned by the Ref_A_isBandgapActive() function and the
+// Ref_A_isRefGenActive() function.
+//
+//*****************************************************************************
+#define REF_A_ACTIVE true
+#define REF_A_INACTIVE false
+
+//*****************************************************************************
+//
+// The following are values that can be passed toThe following are values that
+// can be returned by the Ref_A_getBandgapMode() function.
+//
+//*****************************************************************************
+#define REF_A_STATICMODE 0x00
+#define REF_A_SAMPLEMODE BGMODE
+
+//*****************************************************************************
+//
+// The following are values that can be passed toThe following are values that
+// can be returned by the Ref_A_isRefGenBusy() function.
+//
+//*****************************************************************************
+#define REF_A_NOTBUSY 0x00
+#define REF_A_BUSY REFGENBUSY
+
+//*****************************************************************************
+//
+// The following are values that can be passed toThe following are values that
+// can be returned by the Ref_A_isVariableReferenceVoltageOutputReady()
+// function and the Ref_A_isBufferedBandgapVoltageReady() function.
+//
+//*****************************************************************************
+#define REF_A_NOTREADY false
+#define REF_A_READY true
+
+//*****************************************************************************
+//
+// Prototypes for the APIs.
+//
+//*****************************************************************************
+
+//*****************************************************************************
+//
+//! \brief Sets the reference voltage for the voltage generator.
+//!
+//! This function sets the reference voltage generated by the voltage generator
+//! to be used by other peripherals. This reference voltage will only be valid
+//! while the Ref_A module is in control. Please note, if the
+//! Ref_A_isRefGenBusy() returns Ref_A_BUSY, this function will have no effect.
+//!
+//! \param baseAddress is the base address of the REF_A module.
+//! \param referenceVoltageSelect is the desired voltage to generate for a
+//! reference voltage.
+//! Valid values are:
+//! - \b REF_A_VREF1_2V [Default]
+//! - \b REF_A_VREF2_0V
+//! - \b REF_A_VREF2_5V
+//! \n Modified bits are \b REFVSEL of \b REFCTL0 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void Ref_A_setReferenceVoltage(uint16_t baseAddress,
+ uint8_t referenceVoltageSelect);
+
+//*****************************************************************************
+//
+//! \brief Disables the internal temperature sensor to save power consumption.
+//!
+//! This function is used to turn off the internal temperature sensor to save
+//! on power consumption. The temperature sensor is enabled by default. Please
+//! note, that giving ADC12 module control over the Ref_A module, the state of
+//! the temperature sensor is dependent on the controls of the ADC12 module.
+//! Please note, if the Ref_A_isRefGenBusy() returns Ref_A_BUSY, this function
+//! will have no effect.
+//!
+//! \param baseAddress is the base address of the REF_A module.
+//!
+//! Modified bits are \b REFTCOFF of \b REFCTL0 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void Ref_A_disableTempSensor(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Enables the internal temperature sensor.
+//!
+//! This function is used to turn on the internal temperature sensor to use by
+//! other peripherals. The temperature sensor is enabled by default. Please
+//! note, if the Ref_A_isRefGenBusy() returns Ref_A_BUSY, this function will
+//! have no effect.
+//!
+//! \param baseAddress is the base address of the REF_A module.
+//!
+//! Modified bits are \b REFTCOFF of \b REFCTL0 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void Ref_A_enableTempSensor(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Outputs the reference voltage to an output pin.
+//!
+//! This function is used to output the reference voltage being generated to an
+//! output pin. Please note, the output pin is device specific. Please note,
+//! that giving ADC12 module control over the Ref_A module, the state of the
+//! reference voltage as an output to a pin is dependent on the controls of the
+//! ADC12 module. If ADC12_A reference burst is disabled or DAC12_A is enabled,
+//! this output is available continuously. If ADC12_A reference burst is
+//! enabled, this output is available only during an ADC12_A conversion. For
+//! devices with CTSD16, Ref_enableReferenceVoltage() needs to be invoked to
+//! get VREFBG available continuously. Otherwise, VREFBG is only available
+//! externally when a module requests it. Please note, if the
+//! Ref_A_isRefGenBusy() returns Ref_A_BUSY, this function will have no effect.
+//!
+//! \param baseAddress is the base address of the REF_A module.
+//!
+//! Modified bits are \b REFOUT of \b REFCTL0 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void Ref_A_enableReferenceVoltageOutput(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Disables the reference voltage as an output to a pin.
+//!
+//! This function is used to disables the reference voltage being generated to
+//! be given to an output pin. Please note, if the Ref_A_isRefGenBusy() returns
+//! Ref_A_BUSY, this function will have no effect.
+//!
+//! \param baseAddress is the base address of the REF_A module.
+//!
+//! Modified bits are \b REFOUT of \b REFCTL0 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void Ref_A_disableReferenceVoltageOutput(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Enables the reference voltage to be used by peripherals.
+//!
+//! This function is used to enable the generated reference voltage to be used
+//! other peripherals or by an output pin, if enabled. Please note, that giving
+//! ADC12 module control over the Ref_A module, the state of the reference
+//! voltage is dependent on the controls of the ADC12 module. Please note,
+//! ADC10_A does not support the reference request. If the Ref_A_isRefGenBusy()
+//! returns Ref_A_BUSY, this function will have no effect.
+//!
+//! \param baseAddress is the base address of the REF_A module.
+//!
+//! Modified bits are \b REFON of \b REFCTL0 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void Ref_A_enableReferenceVoltage(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Disables the reference voltage.
+//!
+//! This function is used to disable the generated reference voltage. Please
+//! note, if the Ref_A_isRefGenBusy() returns Ref_A_BUSY, this function will
+//! have no effect.
+//!
+//! \param baseAddress is the base address of the REF_A module.
+//!
+//! Modified bits are \b REFON of \b REFCTL0 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void Ref_A_disableReferenceVoltage(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Returns the bandgap mode of the Ref_A module.
+//!
+//! This function is used to return the bandgap mode of the Ref_A module,
+//! requested by the peripherals using the bandgap. If a peripheral requests
+//! static mode, then the bandgap mode will be static for all modules, whereas
+//! if all of the peripherals using the bandgap request sample mode, then that
+//! will be the mode returned. Sample mode allows the bandgap to be active only
+//! when necessary to save on power consumption, static mode requires the
+//! bandgap to be active until no peripherals are using it anymore.
+//!
+//! \param baseAddress is the base address of the REF_A module.
+//!
+//! \return One of the following:
+//! - \b REF_A_STATICMODE if the bandgap is operating in static mode
+//! - \b REF_A_SAMPLEMODE if the bandgap is operating in sample mode
+//! \n indicating the bandgap mode of the module
+//
+//*****************************************************************************
+extern uint16_t Ref_A_getBandgapMode(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Returns the active status of the bandgap in the Ref_A module.
+//!
+//! This function is used to return the active status of the bandgap in the
+//! Ref_A module. If the bandgap is in use by a peripheral, then the status
+//! will be seen as active.
+//!
+//! \param baseAddress is the base address of the REF_A module.
+//!
+//! \return One of the following:
+//! - \b REF_A_ACTIVE if active
+//! - \b REF_A_INACTIVE if not active
+//! \n indicating the bandgap active status of the module
+//
+//*****************************************************************************
+extern bool Ref_A_isBandgapActive(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Returns the busy status of the reference generator in the Ref_A
+//! module.
+//!
+//! This function is used to return the busy status of the reference generator
+//! in the Ref_A module. If the ref generator is in use by a peripheral, then
+//! the status will be seen as busy.
+//!
+//! \param baseAddress is the base address of the REF_A module.
+//!
+//! \return One of the following:
+//! - \b REF_A_NOTBUSY if the reference generator is not being used
+//! - \b REF_A_BUSY if the reference generator is being used,
+//! disallowing changes to be made to the Ref_A module controls
+//! \n indicating the reference generator busy status of the module
+//
+//*****************************************************************************
+extern uint16_t Ref_A_isRefGenBusy(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Returns the active status of the reference generator in the Ref_A
+//! module.
+//!
+//! This function is used to return the active status of the reference
+//! generator in the Ref_A module. If the ref generator is on and ready to use,
+//! then the status will be seen as active.
+//!
+//! \param baseAddress is the base address of the REF_A module.
+//!
+//! \return One of the following:
+//! - \b REF_A_ACTIVE if active
+//! - \b REF_A_INACTIVE if not active
+//! \n indicating the reference generator active status of the module
+//
+//*****************************************************************************
+extern bool Ref_A_isRefGenActive(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Returns the busy status of the reference generator in the Ref_A
+//! module.
+//!
+//! This function is used to return the buys status of the buffered bandgap
+//! voltage in the Ref_A module. If the ref generator is on and ready to use,
+//! then the status will be seen as active.
+//!
+//! \param baseAddress is the base address of the REF_A module.
+//!
+//! \return One of the following:
+//! - \b REF_A_NOTREADY if NOT ready to be used
+//! - \b REF_A_READY if ready to be used
+//! \n indicating the the busy status of the reference generator in the
+//! module
+//
+//*****************************************************************************
+extern bool Ref_A_isBufferedBandgapVoltageReady(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Returns the busy status of the variable reference voltage in the
+//! Ref_A module.
+//!
+//! This function is used to return the busy status of the variable reference
+//! voltage in the Ref_A module. If the ref generator is on and ready to use,
+//! then the status will be seen as active.
+//!
+//! \param baseAddress is the base address of the REF_A module.
+//!
+//! \return One of the following:
+//! - \b REF_A_NOTREADY if NOT ready to be used
+//! - \b REF_A_READY if ready to be used
+//! \n indicating the the busy status of the variable reference voltage
+//! in the module
+//
+//*****************************************************************************
+extern bool Ref_A_isVariableReferenceVoltageOutputReady(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Enables the one-time trigger of the reference voltage.
+//!
+//! Triggers the one-time generation of the variable reference voltage. Once
+//! the reference voltage request is set, this bit is cleared by hardware
+//!
+//! \param baseAddress is the base address of the REF_A module.
+//!
+//! Modified bits are \b REFGENOT of \b REFCTL0 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void Ref_A_setReferenceVoltageOneTimeTrigger(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Enables the one-time trigger of the buffered bandgap voltage.
+//!
+//! Triggers the one-time generation of the buffered bandgap voltage. Once the
+//! buffered bandgap voltage request is set, this bit is cleared by hardware
+//!
+//! \param baseAddress is the base address of the REF_A module.
+//!
+//! Modified bits are \b REFBGOT of \b REFCTL0 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void Ref_A_setBufferedBandgapVoltageOneTimeTrigger(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+// Mark the end of the C bindings section for C++ compilers.
+//
+//*****************************************************************************
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+#endif // __MSP430WARE_REF_A_H__
diff --git a/Apps/FlightSoftware/MotorControl/driverlib/rtc_b.c b/Apps/FlightSoftware/MotorControl/driverlib/rtc_b.c
new file mode 100644
index 000000000..d051ab10f
--- /dev/null
+++ b/Apps/FlightSoftware/MotorControl/driverlib/rtc_b.c
@@ -0,0 +1,268 @@
+/* --COPYRIGHT--,BSD
+ * Copyright (c) 2017, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * --/COPYRIGHT--*/
+//*****************************************************************************
+//
+// rtc_b.c - Driver for the rtc_b Module.
+//
+//*****************************************************************************
+
+//*****************************************************************************
+//
+//! \addtogroup rtc_b_api rtc_b
+//! @{
+//
+//*****************************************************************************
+
+#include "inc/hw_memmap.h"
+
+#ifdef __MSP430_HAS_RTC_B__
+#include "rtc_b.h"
+
+#include
+
+void RTC_B_startClock (uint16_t baseAddress)
+{
+ HWREG8(baseAddress + OFS_RTCCTL01_H) &= ~(RTCHOLD_H);
+}
+
+void RTC_B_holdClock (uint16_t baseAddress)
+{
+ HWREG8(baseAddress + OFS_RTCCTL01_H) |= RTCHOLD_H;
+}
+
+void RTC_B_setCalibrationFrequency (uint16_t baseAddress,
+ uint16_t frequencySelect)
+{
+ HWREG16(baseAddress + OFS_RTCCTL23) &= ~(RTCCALF_3);
+ HWREG16(baseAddress + OFS_RTCCTL23) |= frequencySelect;
+}
+
+void RTC_B_setCalibrationData (uint16_t baseAddress,
+ uint8_t offsetDirection,
+ uint8_t offsetValue)
+{
+ HWREG8(baseAddress + OFS_RTCCTL23_L) = offsetValue + offsetDirection;
+}
+
+void RTC_B_initCalendar (uint16_t baseAddress,
+ Calendar *CalendarTime,
+ uint16_t formatSelect)
+{
+ HWREG8(baseAddress + OFS_RTCCTL01_H) |= RTCHOLD_H;
+
+ HWREG16(baseAddress + OFS_RTCCTL01) &= ~(RTCBCD);
+ HWREG16(baseAddress + OFS_RTCCTL01) |= formatSelect;
+
+ HWREG8(baseAddress + OFS_RTCTIM0_L) = CalendarTime->Seconds;
+ HWREG8(baseAddress + OFS_RTCTIM0_H) = CalendarTime->Minutes;
+ HWREG8(baseAddress + OFS_RTCTIM1_L) = CalendarTime->Hours;
+ HWREG8(baseAddress + OFS_RTCTIM1_H) = CalendarTime->DayOfWeek;
+ HWREG8(baseAddress + OFS_RTCDATE_L) = CalendarTime->DayOfMonth;
+ HWREG8(baseAddress + OFS_RTCDATE_H) = CalendarTime->Month;
+ HWREG16(baseAddress + OFS_RTCYEAR) = CalendarTime->Year;
+}
+
+Calendar RTC_B_getCalendarTime (uint16_t baseAddress)
+{
+ Calendar tempCal;
+
+ while ( !(HWREG16(baseAddress + OFS_RTCCTL01) & RTCRDY) ) ;
+
+ tempCal.Seconds = HWREG8(baseAddress + OFS_RTCTIM0_L);
+ tempCal.Minutes = HWREG8(baseAddress + OFS_RTCTIM0_H);
+ tempCal.Hours = HWREG8(baseAddress + OFS_RTCTIM1_L);
+ tempCal.DayOfWeek = HWREG8(baseAddress + OFS_RTCTIM1_H);
+ tempCal.DayOfMonth = HWREG8(baseAddress + OFS_RTCDATE_L);
+ tempCal.Month = HWREG8(baseAddress + OFS_RTCDATE_H);
+ tempCal.Year = HWREG16(baseAddress + OFS_RTCYEAR);
+
+ return ( tempCal) ;
+}
+
+void RTC_B_configureCalendarAlarm(uint16_t baseAddress,
+ RTC_B_configureCalendarAlarmParam *param)
+{
+ //Each of these is XORed with 0x80 to turn on if an integer is passed,
+ //or turn OFF if RTC_B_ALARM_OFF (0x80) is passed.
+ HWREG8(baseAddress + OFS_RTCAMINHR_L) = (param->minutesAlarm ^ 0x80);
+ HWREG8(baseAddress + OFS_RTCAMINHR_H) = (param->hoursAlarm ^ 0x80);
+ HWREG8(baseAddress + OFS_RTCADOWDAY_L) = (param->dayOfWeekAlarm ^ 0x80);
+ HWREG8(baseAddress + OFS_RTCADOWDAY_H) = (param->dayOfMonthAlarm ^ 0x80);
+}
+void RTC_B_setCalendarEvent (uint16_t baseAddress,
+ uint16_t eventSelect)
+{
+ HWREG16(baseAddress + OFS_RTCCTL01) &= ~(RTCTEV_3); //Reset bits
+ HWREG16(baseAddress + OFS_RTCCTL01) |= eventSelect;
+}
+
+void RTC_B_definePrescaleEvent (uint16_t baseAddress,
+ uint8_t prescaleSelect,
+ uint8_t prescaleEventDivider)
+{
+ HWREG8(baseAddress + OFS_RTCPS0CTL_L + prescaleSelect) &= ~(RT0IP_7);
+ HWREG8(baseAddress + OFS_RTCPS0CTL_L +
+ prescaleSelect) |= prescaleEventDivider;
+}
+
+uint8_t RTC_B_getPrescaleValue (uint16_t baseAddress,
+ uint8_t prescaleSelect)
+{
+ if (RTC_B_PRESCALE_0 == prescaleSelect){
+ return ( HWREG8(baseAddress + OFS_RTCPS_L) );
+ } else if (RTC_B_PRESCALE_1 == prescaleSelect){
+ return ( HWREG8(baseAddress + OFS_RTCPS_H) );
+ } else {
+ return ( 0) ;
+ }
+}
+
+void RTC_B_setPrescaleValue (uint16_t baseAddress,
+ uint8_t prescaleSelect,
+ uint8_t prescaleCounterValue)
+{
+ if (RTC_B_PRESCALE_0 == prescaleSelect){
+ HWREG8(baseAddress + OFS_RTCPS_L) = prescaleCounterValue;
+ } else if (RTC_B_PRESCALE_1 == prescaleSelect){
+ HWREG8(baseAddress + OFS_RTCPS_H) = prescaleCounterValue;
+ }
+}
+
+void RTC_B_enableInterrupt (uint16_t baseAddress,
+ uint8_t interruptMask)
+{
+ if ( interruptMask & (RTCOFIE + RTCTEVIE + RTCAIE + RTCRDYIE) ){
+ HWREG8(baseAddress + OFS_RTCCTL01_L) |=
+ (interruptMask & (RTCOFIE + RTCTEVIE + RTCAIE + RTCRDYIE));
+ }
+
+ if (interruptMask & RTC_B_PRESCALE_TIMER0_INTERRUPT){
+ HWREG8(baseAddress + OFS_RTCPS0CTL) |= RT0PSIE;
+ }
+
+ if (interruptMask & RTC_B_PRESCALE_TIMER1_INTERRUPT){
+ HWREG8(baseAddress + OFS_RTCPS1CTL) |= RT1PSIE;
+ }
+}
+
+void RTC_B_disableInterrupt (uint16_t baseAddress,
+ uint8_t interruptMask)
+{
+ if ( interruptMask & (RTCOFIE + RTCTEVIE + RTCAIE + RTCRDYIE) ){
+ HWREG8(baseAddress + OFS_RTCCTL01_L) &=
+ ~(interruptMask & (RTCOFIE + RTCTEVIE + RTCAIE + RTCRDYIE));
+ }
+
+ if (interruptMask & RTC_B_PRESCALE_TIMER0_INTERRUPT){
+ HWREG8(baseAddress + OFS_RTCPS0CTL) &= ~(RT0PSIE);
+ }
+
+ if (interruptMask & RTC_B_PRESCALE_TIMER1_INTERRUPT){
+ HWREG8(baseAddress + OFS_RTCPS1CTL) &= ~(RT1PSIE);
+ }
+}
+
+uint8_t RTC_B_getInterruptStatus (uint16_t baseAddress,
+ uint8_t interruptFlagMask)
+{
+ uint8_t tempInterruptFlagMask = 0x0000;
+
+ tempInterruptFlagMask |= (HWREG8(baseAddress + OFS_RTCCTL01_L)
+ & ((interruptFlagMask >> 4)
+ & (RTCOFIFG +
+ RTCTEVIFG +
+ RTCAIFG +
+ RTCRDYIFG)));
+
+ tempInterruptFlagMask = tempInterruptFlagMask << 4;
+
+ if (interruptFlagMask & RTC_B_PRESCALE_TIMER0_INTERRUPT){
+ if ( HWREG8(baseAddress + OFS_RTCPS0CTL) & RT0PSIFG){
+ tempInterruptFlagMask |= RTC_B_PRESCALE_TIMER0_INTERRUPT;
+ }
+ }
+
+ if (interruptFlagMask & RTC_B_PRESCALE_TIMER1_INTERRUPT){
+ if ( HWREG8(baseAddress + OFS_RTCPS1CTL) & RT1PSIFG){
+ tempInterruptFlagMask |= RTC_B_PRESCALE_TIMER1_INTERRUPT;
+ }
+ }
+
+ return ( tempInterruptFlagMask) ;
+}
+
+void RTC_B_clearInterrupt (uint16_t baseAddress,
+ uint8_t interruptFlagMask)
+{
+ if ( interruptFlagMask & (RTC_B_TIME_EVENT_INTERRUPT +
+ RTC_B_CLOCK_ALARM_INTERRUPT +
+ RTC_B_CLOCK_READ_READY_INTERRUPT +
+ RTC_B_OSCILLATOR_FAULT_INTERRUPT) ){
+
+ HWREG8(baseAddress + OFS_RTCCTL01_L) &=
+ ~((interruptFlagMask>>4) & (RTCOFIFG +
+ RTCTEVIFG +
+ RTCAIFG +
+ RTCRDYIFG));
+ }
+
+ if (interruptFlagMask & RTC_B_PRESCALE_TIMER0_INTERRUPT){
+ HWREG8(baseAddress + OFS_RTCPS0CTL) &= ~(RT0PSIFG);
+ }
+
+ if (interruptFlagMask & RTC_B_PRESCALE_TIMER1_INTERRUPT){
+ HWREG8(baseAddress + OFS_RTCPS1CTL) &= ~(RT1PSIFG);
+ }
+}
+
+uint16_t RTC_B_convertBCDToBinary (uint16_t baseAddress,
+ uint16_t valueToConvert)
+{
+ HWREG16(baseAddress + OFS_BCD2BIN) = valueToConvert;
+ return ( HWREG16(baseAddress + OFS_BCD2BIN) );
+}
+
+uint16_t RTC_B_convertBinaryToBCD (uint16_t baseAddress,
+ uint16_t valueToConvert)
+{
+ HWREG16(baseAddress + OFS_BIN2BCD) = valueToConvert;
+ return ( HWREG16(baseAddress + OFS_BIN2BCD) );
+}
+
+
+#endif
+//*****************************************************************************
+//
+//! Close the doxygen group for rtc_b_api
+//! @}
+//
+//*****************************************************************************
diff --git a/Apps/FlightSoftware/MotorControl/driverlib/rtc_b.h b/Apps/FlightSoftware/MotorControl/driverlib/rtc_b.h
new file mode 100644
index 000000000..0dead9fec
--- /dev/null
+++ b/Apps/FlightSoftware/MotorControl/driverlib/rtc_b.h
@@ -0,0 +1,633 @@
+/* --COPYRIGHT--,BSD
+ * Copyright (c) 2017, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * --/COPYRIGHT--*/
+//*****************************************************************************
+//
+// rtc_b.h - Driver for the RTC_B Module.
+//
+//*****************************************************************************
+
+#ifndef __MSP430WARE_RTC_B_H__
+#define __MSP430WARE_RTC_B_H__
+
+#include "inc/hw_memmap.h"
+
+#ifdef __MSP430_HAS_RTC_B__
+
+//*****************************************************************************
+//
+// If building with a C++ compiler, make all of the definitions in this header
+// have a C binding.
+//
+//*****************************************************************************
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+#include "inc/hw_memmap.h"
+//*****************************************************************************
+//
+//! \brief Used in the RTC_B_initCalendar() function as the CalendarTime
+//! parameter.
+//
+//*****************************************************************************
+typedef struct Calendar {
+ //! Seconds of minute between 0-59
+ uint8_t Seconds;
+ //! Minutes of hour between 0-59
+ uint8_t Minutes;
+ //! Hour of day between 0-23
+ uint8_t Hours;
+ //! Day of week between 0-6
+ uint8_t DayOfWeek;
+ //! Day of month between 1-31
+ uint8_t DayOfMonth;
+ //! Month between 1-12
+ uint8_t Month;
+ //! Year between 0-4095
+ uint16_t Year;
+} Calendar;
+
+//*****************************************************************************
+//
+//! \brief Used in the RTC_B_configureCalendarAlarm() function as the param
+//! parameter.
+//
+//*****************************************************************************
+typedef struct RTC_B_configureCalendarAlarmParam {
+ //! Is the alarm condition for the minutes.
+ //! \n Valid values are:
+ //! - \b RTC_B_ALARMCONDITION_OFF [Default]
+ uint8_t minutesAlarm;
+ //! Is the alarm condition for the hours.
+ //! \n Valid values are:
+ //! - \b RTC_B_ALARMCONDITION_OFF [Default]
+ uint8_t hoursAlarm;
+ //! Is the alarm condition for the day of week.
+ //! \n Valid values are:
+ //! - \b RTC_B_ALARMCONDITION_OFF [Default]
+ uint8_t dayOfWeekAlarm;
+ //! Is the alarm condition for the day of the month.
+ //! \n Valid values are:
+ //! - \b RTC_B_ALARMCONDITION_OFF [Default]
+ uint8_t dayOfMonthAlarm;
+} RTC_B_configureCalendarAlarmParam;
+
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the frequencySelect parameter
+// for functions: RTC_B_setCalibrationFrequency().
+//
+//*****************************************************************************
+#define RTC_B_CALIBRATIONFREQ_OFF (RTCCALF_0)
+#define RTC_B_CALIBRATIONFREQ_512HZ (RTCCALF_1)
+#define RTC_B_CALIBRATIONFREQ_256HZ (RTCCALF_2)
+#define RTC_B_CALIBRATIONFREQ_1HZ (RTCCALF_3)
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the offsetDirection parameter
+// for functions: RTC_B_setCalibrationData().
+//
+//*****************************************************************************
+#define RTC_B_CALIBRATION_DOWN2PPM (!(RTCCALS))
+#define RTC_B_CALIBRATION_UP4PPM (RTCCALS)
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the formatSelect parameter
+// for functions: RTC_B_initCalendar().
+//
+//*****************************************************************************
+#define RTC_B_FORMAT_BINARY (!(RTCBCD))
+#define RTC_B_FORMAT_BCD (RTCBCD)
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the param parameter for
+// functions: RTC_B_configureCalendarAlarm(), RTC_B_configureCalendarAlarm(),
+// RTC_B_configureCalendarAlarm(), and RTC_B_configureCalendarAlarm().
+//
+//*****************************************************************************
+#define RTC_B_ALARMCONDITION_OFF (0x80)
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the eventSelect parameter for
+// functions: RTC_B_setCalendarEvent().
+//
+//*****************************************************************************
+#define RTC_B_CALENDAREVENT_MINUTECHANGE (RTCTEV_0)
+#define RTC_B_CALENDAREVENT_HOURCHANGE (RTCTEV_1)
+#define RTC_B_CALENDAREVENT_NOON (RTCTEV_2)
+#define RTC_B_CALENDAREVENT_MIDNIGHT (RTCTEV_3)
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the prescaleEventDivider
+// parameter for functions: RTC_B_definePrescaleEvent().
+//
+//*****************************************************************************
+#define RTC_B_PSEVENTDIVIDER_2 (RT0IP_0)
+#define RTC_B_PSEVENTDIVIDER_4 (RT0IP_1)
+#define RTC_B_PSEVENTDIVIDER_8 (RT0IP_2)
+#define RTC_B_PSEVENTDIVIDER_16 (RT0IP_3)
+#define RTC_B_PSEVENTDIVIDER_32 (RT0IP_4)
+#define RTC_B_PSEVENTDIVIDER_64 (RT0IP_5)
+#define RTC_B_PSEVENTDIVIDER_128 (RT0IP_6)
+#define RTC_B_PSEVENTDIVIDER_256 (RT0IP_7)
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the prescaleSelect parameter
+// for functions: RTC_B_definePrescaleEvent(), RTC_B_getPrescaleValue(), and
+// RTC_B_setPrescaleValue().
+//
+//*****************************************************************************
+#define RTC_B_PRESCALE_0 (0x0)
+#define RTC_B_PRESCALE_1 (0x2)
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the interruptMask parameter
+// for functions: RTC_B_enableInterrupt(), and RTC_B_disableInterrupt(); the
+// interruptFlagMask parameter for functions: RTC_B_getInterruptStatus(), and
+// RTC_B_clearInterrupt() as well as returned by the RTC_B_getInterruptStatus()
+// function.
+//
+//*****************************************************************************
+#define RTC_B_TIME_EVENT_INTERRUPT RTCTEVIE
+#define RTC_B_CLOCK_ALARM_INTERRUPT RTCAIE
+#define RTC_B_CLOCK_READ_READY_INTERRUPT RTCRDYIE
+#define RTC_B_PRESCALE_TIMER0_INTERRUPT 0x02
+#define RTC_B_PRESCALE_TIMER1_INTERRUPT 0x01
+#define RTC_B_OSCILLATOR_FAULT_INTERRUPT RTCOFIE
+
+//*****************************************************************************
+//
+// Prototypes for the APIs.
+//
+//*****************************************************************************
+
+//*****************************************************************************
+//
+//! \brief Starts the RTC.
+//!
+//! This function clears the RTC main hold bit to allow the RTC to function.
+//!
+//! \param baseAddress is the base address of the RTC_B module.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void RTC_B_startClock(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Holds the RTC.
+//!
+//! This function sets the RTC main hold bit to disable RTC functionality.
+//!
+//! \param baseAddress is the base address of the RTC_B module.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void RTC_B_holdClock(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Allows and Sets the frequency output to RTCCLK pin for calibration
+//! measurement.
+//!
+//! This function sets a frequency to measure at the RTCCLK output pin. After
+//! testing the set frequency, the calibration could be set accordingly.
+//!
+//! \param baseAddress is the base address of the RTC_B module.
+//! \param frequencySelect is the frequency output to RTCCLK.
+//! Valid values are:
+//! - \b RTC_B_CALIBRATIONFREQ_OFF [Default] - turn off calibration
+//! output
+//! - \b RTC_B_CALIBRATIONFREQ_512HZ - output signal at 512Hz for
+//! calibration
+//! - \b RTC_B_CALIBRATIONFREQ_256HZ - output signal at 256Hz for
+//! calibration
+//! - \b RTC_B_CALIBRATIONFREQ_1HZ - output signal at 1Hz for
+//! calibration
+//! \n Modified bits are \b RTCCALF of \b RTCCTL3 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void RTC_B_setCalibrationFrequency(uint16_t baseAddress,
+ uint16_t frequencySelect);
+
+//*****************************************************************************
+//
+//! \brief Sets the specified calibration for the RTC.
+//!
+//! This function sets the calibration offset to make the RTC as accurate as
+//! possible. The offsetDirection can be either +4-ppm or -2-ppm, and the
+//! offsetValue should be from 1-63 and is multiplied by the direction setting
+//! (i.e. +4-ppm * 8 (offsetValue) = +32-ppm). Please note, when measuring the
+//! frequency after setting the calibration, you will only see a change on the
+//! 1Hz frequency.
+//!
+//! \param baseAddress is the base address of the RTC_B module.
+//! \param offsetDirection is the direction that the calibration offset will
+//! go.
+//! Valid values are:
+//! - \b RTC_B_CALIBRATION_DOWN2PPM - calibrate at steps of -2
+//! - \b RTC_B_CALIBRATION_UP4PPM - calibrate at steps of +4
+//! \n Modified bits are \b RTCCALS of \b RTCCTL2 register.
+//! \param offsetValue is the value that the offset will be a factor of; a
+//! valid value is any integer from 1-63.
+//! \n Modified bits are \b RTCCAL of \b RTCCTL2 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void RTC_B_setCalibrationData(uint16_t baseAddress,
+ uint8_t offsetDirection,
+ uint8_t offsetValue);
+
+//*****************************************************************************
+//
+//! \brief Initializes the settings to operate the RTC in calendar mode
+//!
+//! This function initializes the Calendar mode of the RTC module. To prevent
+//! potential erroneous alarm conditions from occurring, the alarm should be
+//! disabled by clearing the RTCAIE, RTCAIFG and AE bits with APIs:
+//! RTC_B_disableInterrupt(), RTC_B_clearInterrupt() and
+//! RTC_B_configureCalendarAlarm() before calendar initialization.
+//!
+//! \param baseAddress is the base address of the RTC_B module.
+//! \param CalendarTime is the pointer to the structure containing the values
+//! for the Calendar to be initialized to. Valid values should be of
+//! type pointer to Calendar and should contain the following members
+//! and corresponding values: \n\b Seconds between 0-59 \n\b Minutes
+//! between 0-59 \n\b Hours between 0-23 \n\b DayOfWeek between 0-6 \n\b
+//! DayOfMonth between 1-31 \n\b Month between 1-12 \n\b Year between
+//! 0-4095 \n\b NOTE: Values beyond the ones specified may result in
+//! erratic behavior.
+//! \param formatSelect is the format for the Calendar registers to use.
+//! Valid values are:
+//! - \b RTC_B_FORMAT_BINARY [Default]
+//! - \b RTC_B_FORMAT_BCD
+//! \n Modified bits are \b RTCBCD of \b RTCCTL1 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void RTC_B_initCalendar(uint16_t baseAddress,
+ Calendar *CalendarTime,
+ uint16_t formatSelect);
+
+//*****************************************************************************
+//
+//! \brief Returns the Calendar Time stored in the Calendar registers of the
+//! RTC.
+//!
+//! This function returns the current Calendar time in the form of a Calendar
+//! structure. The RTCRDY polling is used in this function to prevent reading
+//! invalid time.
+//!
+//! \param baseAddress is the base address of the RTC_B module.
+//!
+//! \return A Calendar structure containing the current time.
+//
+//*****************************************************************************
+extern Calendar RTC_B_getCalendarTime(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Sets and Enables the desired Calendar Alarm settings.
+//!
+//! This function sets a Calendar interrupt condition to assert the RTCAIFG
+//! interrupt flag. The condition is a logical and of all of the parameters.
+//! For example if the minutes and hours alarm is set, then the interrupt will
+//! only assert when the minutes AND the hours change to the specified setting.
+//! Use the RTC_B_ALARM_OFF for any alarm settings that should not be apart of
+//! the alarm condition.
+//!
+//! \param baseAddress is the base address of the RTC_B module.
+//! \param param is the pointer to struct for calendar alarm configuration.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void RTC_B_configureCalendarAlarm(uint16_t baseAddress,
+ RTC_B_configureCalendarAlarmParam *param);
+
+//*****************************************************************************
+//
+//! \brief Sets a single specified Calendar interrupt condition
+//!
+//! This function sets a specified event to assert the RTCTEVIFG interrupt.
+//! This interrupt is independent from the Calendar alarm interrupt.
+//!
+//! \param baseAddress is the base address of the RTC_B module.
+//! \param eventSelect is the condition selected.
+//! Valid values are:
+//! - \b RTC_B_CALENDAREVENT_MINUTECHANGE - assert interrupt on every
+//! minute
+//! - \b RTC_B_CALENDAREVENT_HOURCHANGE - assert interrupt on every hour
+//! - \b RTC_B_CALENDAREVENT_NOON - assert interrupt when hour is 12
+//! - \b RTC_B_CALENDAREVENT_MIDNIGHT - assert interrupt when hour is 0
+//! \n Modified bits are \b RTCTEV of \b RTCCTL register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void RTC_B_setCalendarEvent(uint16_t baseAddress,
+ uint16_t eventSelect);
+
+//*****************************************************************************
+//
+//! \brief Sets up an interrupt condition for the selected Prescaler.
+//!
+//! This function sets the condition for an interrupt to assert based on the
+//! individual prescalers.
+//!
+//! \param baseAddress is the base address of the RTC_B module.
+//! \param prescaleSelect is the prescaler to define an interrupt for.
+//! Valid values are:
+//! - \b RTC_B_PRESCALE_0
+//! - \b RTC_B_PRESCALE_1
+//! \param prescaleEventDivider is a divider to specify when an interrupt can
+//! occur based on the clock source of the selected prescaler. (Does not
+//! affect timer of the selected prescaler).
+//! Valid values are:
+//! - \b RTC_B_PSEVENTDIVIDER_2 [Default]
+//! - \b RTC_B_PSEVENTDIVIDER_4
+//! - \b RTC_B_PSEVENTDIVIDER_8
+//! - \b RTC_B_PSEVENTDIVIDER_16
+//! - \b RTC_B_PSEVENTDIVIDER_32
+//! - \b RTC_B_PSEVENTDIVIDER_64
+//! - \b RTC_B_PSEVENTDIVIDER_128
+//! - \b RTC_B_PSEVENTDIVIDER_256
+//! \n Modified bits are \b RTxIP of \b RTCPSxCTL register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void RTC_B_definePrescaleEvent(uint16_t baseAddress,
+ uint8_t prescaleSelect,
+ uint8_t prescaleEventDivider);
+
+//*****************************************************************************
+//
+//! \brief Returns the selected prescaler value.
+//!
+//! This function returns the value of the selected prescale counter register.
+//! Note that the counter value should be held by calling RTC_B_holdClock()
+//! before calling this API.
+//!
+//! \param baseAddress is the base address of the RTC_B module.
+//! \param prescaleSelect is the prescaler to obtain the value of.
+//! Valid values are:
+//! - \b RTC_B_PRESCALE_0
+//! - \b RTC_B_PRESCALE_1
+//!
+//! \return The value of the specified prescaler count register
+//
+//*****************************************************************************
+extern uint8_t RTC_B_getPrescaleValue(uint16_t baseAddress,
+ uint8_t prescaleSelect);
+
+//*****************************************************************************
+//
+//! \brief Sets the selected prescaler value.
+//!
+//! This function sets the prescale counter value. Before setting the prescale
+//! counter, it should be held by calling RTC_B_holdClock().
+//!
+//! \param baseAddress is the base address of the RTC_B module.
+//! \param prescaleSelect is the prescaler to set the value for.
+//! Valid values are:
+//! - \b RTC_B_PRESCALE_0
+//! - \b RTC_B_PRESCALE_1
+//! \param prescaleCounterValue is the specified value to set the prescaler to.
+//! Valid values are any integer between 0-255
+//! \n Modified bits are \b RTxPS of \b RTxPS register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void RTC_B_setPrescaleValue(uint16_t baseAddress,
+ uint8_t prescaleSelect,
+ uint8_t prescaleCounterValue);
+
+//*****************************************************************************
+//
+//! \brief Enables selected RTC interrupt sources.
+//!
+//! This function enables the selected RTC interrupt source. Only the sources
+//! that are enabled can be reflected to the processor interrupt; disabled
+//! sources have no effect on the processor. Does not clear interrupt flags.
+//!
+//! \param baseAddress is the base address of the RTC_B module.
+//! \param interruptMask is a bit mask of the interrupts to enable.
+//! Mask value is the logical OR of any of the following:
+//! - \b RTC_B_TIME_EVENT_INTERRUPT - asserts when counter overflows in
+//! counter mode or when Calendar event condition defined by
+//! defineCalendarEvent() is met.
+//! - \b RTC_B_CLOCK_ALARM_INTERRUPT - asserts when alarm condition in
+//! Calendar mode is met.
+//! - \b RTC_B_CLOCK_READ_READY_INTERRUPT - asserts when Calendar
+//! registers are settled.
+//! - \b RTC_B_PRESCALE_TIMER0_INTERRUPT - asserts when Prescaler 0
+//! event condition is met.
+//! - \b RTC_B_PRESCALE_TIMER1_INTERRUPT - asserts when Prescaler 1
+//! event condition is met.
+//! - \b RTC_B_OSCILLATOR_FAULT_INTERRUPT - asserts if there is a
+//! problem with the 32kHz oscillator, while the RTC is running.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void RTC_B_enableInterrupt(uint16_t baseAddress,
+ uint8_t interruptMask);
+
+//*****************************************************************************
+//
+//! \brief Disables selected RTC interrupt sources.
+//!
+//! This function disables the selected RTC interrupt source. Only the sources
+//! that are enabled can be reflected to the processor interrupt; disabled
+//! sources have no effect on the processor.
+//!
+//! \param baseAddress is the base address of the RTC_B module.
+//! \param interruptMask is a bit mask of the interrupts to disable.
+//! Mask value is the logical OR of any of the following:
+//! - \b RTC_B_TIME_EVENT_INTERRUPT - asserts when counter overflows in
+//! counter mode or when Calendar event condition defined by
+//! defineCalendarEvent() is met.
+//! - \b RTC_B_CLOCK_ALARM_INTERRUPT - asserts when alarm condition in
+//! Calendar mode is met.
+//! - \b RTC_B_CLOCK_READ_READY_INTERRUPT - asserts when Calendar
+//! registers are settled.
+//! - \b RTC_B_PRESCALE_TIMER0_INTERRUPT - asserts when Prescaler 0
+//! event condition is met.
+//! - \b RTC_B_PRESCALE_TIMER1_INTERRUPT - asserts when Prescaler 1
+//! event condition is met.
+//! - \b RTC_B_OSCILLATOR_FAULT_INTERRUPT - asserts if there is a
+//! problem with the 32kHz oscillator, while the RTC is running.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void RTC_B_disableInterrupt(uint16_t baseAddress,
+ uint8_t interruptMask);
+
+//*****************************************************************************
+//
+//! \brief Returns the status of the selected interrupts flags.
+//!
+//! This function returns the status of the interrupt flag for the selected
+//! channel.
+//!
+//! \param baseAddress is the base address of the RTC_B module.
+//! \param interruptFlagMask is a bit mask of the interrupt flags to return the
+//! status of.
+//! Mask value is the logical OR of any of the following:
+//! - \b RTC_B_TIME_EVENT_INTERRUPT - asserts when counter overflows in
+//! counter mode or when Calendar event condition defined by
+//! defineCalendarEvent() is met.
+//! - \b RTC_B_CLOCK_ALARM_INTERRUPT - asserts when alarm condition in
+//! Calendar mode is met.
+//! - \b RTC_B_CLOCK_READ_READY_INTERRUPT - asserts when Calendar
+//! registers are settled.
+//! - \b RTC_B_PRESCALE_TIMER0_INTERRUPT - asserts when Prescaler 0
+//! event condition is met.
+//! - \b RTC_B_PRESCALE_TIMER1_INTERRUPT - asserts when Prescaler 1
+//! event condition is met.
+//! - \b RTC_B_OSCILLATOR_FAULT_INTERRUPT - asserts if there is a
+//! problem with the 32kHz oscillator, while the RTC is running.
+//!
+//! \return Logical OR of any of the following:
+//! - \b RTC_B_TIME_EVENT_INTERRUPT asserts when counter overflows in
+//! counter mode or when Calendar event condition defined by
+//! defineCalendarEvent() is met.
+//! - \b RTC_B_CLOCK_ALARM_INTERRUPT asserts when alarm condition in
+//! Calendar mode is met.
+//! - \b RTC_B_CLOCK_READ_READY_INTERRUPT asserts when Calendar
+//! registers are settled.
+//! - \b RTC_B_PRESCALE_TIMER0_INTERRUPT asserts when Prescaler 0 event
+//! condition is met.
+//! - \b RTC_B_PRESCALE_TIMER1_INTERRUPT asserts when Prescaler 1 event
+//! condition is met.
+//! - \b RTC_B_OSCILLATOR_FAULT_INTERRUPT asserts if there is a problem
+//! with the 32kHz oscillator, while the RTC is running.
+//! \n indicating the status of the masked interrupts
+//
+//*****************************************************************************
+extern uint8_t RTC_B_getInterruptStatus(uint16_t baseAddress,
+ uint8_t interruptFlagMask);
+
+//*****************************************************************************
+//
+//! \brief Clears selected RTC interrupt flags.
+//!
+//! This function clears the RTC interrupt flag is cleared, so that it no
+//! longer asserts.
+//!
+//! \param baseAddress is the base address of the RTC_B module.
+//! \param interruptFlagMask is a bit mask of the interrupt flags to be
+//! cleared.
+//! Mask value is the logical OR of any of the following:
+//! - \b RTC_B_TIME_EVENT_INTERRUPT - asserts when counter overflows in
+//! counter mode or when Calendar event condition defined by
+//! defineCalendarEvent() is met.
+//! - \b RTC_B_CLOCK_ALARM_INTERRUPT - asserts when alarm condition in
+//! Calendar mode is met.
+//! - \b RTC_B_CLOCK_READ_READY_INTERRUPT - asserts when Calendar
+//! registers are settled.
+//! - \b RTC_B_PRESCALE_TIMER0_INTERRUPT - asserts when Prescaler 0
+//! event condition is met.
+//! - \b RTC_B_PRESCALE_TIMER1_INTERRUPT - asserts when Prescaler 1
+//! event condition is met.
+//! - \b RTC_B_OSCILLATOR_FAULT_INTERRUPT - asserts if there is a
+//! problem with the 32kHz oscillator, while the RTC is running.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void RTC_B_clearInterrupt(uint16_t baseAddress,
+ uint8_t interruptFlagMask);
+
+//*****************************************************************************
+//
+//! \brief Convert the given BCD value to binary format
+//!
+//! This function converts BCD values to binary format. This API uses the
+//! hardware registers to perform the conversion rather than a software method.
+//!
+//! \param baseAddress is the base address of the RTC_B module.
+//! \param valueToConvert is the raw value in BCD format to convert to Binary.
+//! \n Modified bits are \b BCD2BIN of \b BCD2BIN register.
+//!
+//! \return The binary version of the input parameter
+//
+//*****************************************************************************
+extern uint16_t RTC_B_convertBCDToBinary(uint16_t baseAddress,
+ uint16_t valueToConvert);
+
+//*****************************************************************************
+//
+//! \brief Convert the given binary value to BCD format
+//!
+//! This function converts binary values to BCD format. This API uses the
+//! hardware registers to perform the conversion rather than a software method.
+//!
+//! \param baseAddress is the base address of the RTC_B module.
+//! \param valueToConvert is the raw value in Binary format to convert to BCD.
+//! \n Modified bits are \b BIN2BCD of \b BIN2BCD register.
+//!
+//! \return The BCD version of the valueToConvert parameter
+//
+//*****************************************************************************
+extern uint16_t RTC_B_convertBinaryToBCD(uint16_t baseAddress,
+ uint16_t valueToConvert);
+
+//*****************************************************************************
+//
+// Mark the end of the C bindings section for C++ compilers.
+//
+//*****************************************************************************
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+#endif // __MSP430WARE_RTC_B_H__
diff --git a/Apps/FlightSoftware/MotorControl/driverlib/rtc_c.c b/Apps/FlightSoftware/MotorControl/driverlib/rtc_c.c
new file mode 100644
index 000000000..690a028a4
--- /dev/null
+++ b/Apps/FlightSoftware/MotorControl/driverlib/rtc_c.c
@@ -0,0 +1,376 @@
+/* --COPYRIGHT--,BSD
+ * Copyright (c) 2017, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * --/COPYRIGHT--*/
+//*****************************************************************************
+//
+// rtc_c.c - Driver for the rtc_c Module.
+//
+//*****************************************************************************
+
+//*****************************************************************************
+//
+//! \addtogroup rtc_c_api rtc_c
+//! @{
+//
+//*****************************************************************************
+
+#include "inc/hw_memmap.h"
+
+#ifdef __MSP430_HAS_RTC_C__
+#include "rtc_c.h"
+
+#include
+
+void RTC_C_startClock (uint16_t baseAddress)
+{
+ HWREG8(baseAddress + OFS_RTCCTL0_H) = RTCKEY_H;
+ HWREG8(baseAddress + OFS_RTCCTL13_L) &= ~(RTCHOLD);
+ HWREG8(baseAddress + OFS_RTCCTL0_H) = 0x00;
+}
+
+void RTC_C_holdClock (uint16_t baseAddress)
+{
+ HWREG8(baseAddress + OFS_RTCCTL0_H) = RTCKEY_H;
+ HWREG8(baseAddress + OFS_RTCCTL13_L) |= RTCHOLD;
+ HWREG8(baseAddress + OFS_RTCCTL0_H) = 0x00;
+}
+
+void RTC_C_setCalibrationFrequency (uint16_t baseAddress,
+ uint16_t frequencySelect)
+{
+ HWREG8(baseAddress + OFS_RTCCTL0_H) = RTCKEY_H;
+ HWREG16(baseAddress + OFS_RTCCTL13) &= ~(RTCCALF_3);
+ HWREG16(baseAddress + OFS_RTCCTL13) |= frequencySelect;
+ HWREG8(baseAddress + OFS_RTCCTL0_H) = 0x00;
+}
+
+void RTC_C_setCalibrationData (uint16_t baseAddress,
+ uint8_t offsetDirection,
+ uint8_t offsetValue)
+{
+ HWREG8(baseAddress + OFS_RTCCTL0_H) = RTCKEY_H;
+ HWREG16(baseAddress + OFS_RTCOCAL) = offsetValue + offsetDirection;
+ HWREG8(baseAddress + OFS_RTCCTL0_H) = 0x00;
+}
+
+void RTC_C_initCounter (uint16_t baseAddress,
+ uint16_t clockSelect,
+ uint16_t counterSizeSelect)
+{
+ HWREG8(baseAddress + OFS_RTCCTL0_H) = RTCKEY_H;
+
+ HWREG8(baseAddress + OFS_RTCCTL13) |= RTCHOLD;
+ HWREG8(baseAddress + OFS_RTCCTL13) &= ~(RTCMODE);
+
+ HWREG16(baseAddress + OFS_RTCCTL13) &= ~(RTCSSEL_3 | RTCTEV_3 );
+ HWREG16(baseAddress + OFS_RTCCTL13) |= clockSelect + counterSizeSelect;
+
+ HWREG8(baseAddress + OFS_RTCCTL0_H) = 0x00;
+}
+
+bool RTC_C_setTemperatureCompensation(uint16_t baseAddress,
+ uint16_t offsetDirection,
+ uint8_t offsetValue)
+{
+
+ while(!(HWREG8(baseAddress + OFS_RTCTCMP_H) & RTCTCRDY_H));
+
+ HWREG16(baseAddress + OFS_RTCTCMP) = offsetValue + offsetDirection;
+
+ if(HWREG8(baseAddress + OFS_RTCTCMP_H) & RTCTCOK_H) {
+ return STATUS_SUCCESS;
+ } else {
+ return STATUS_FAIL;
+ }
+}
+
+void RTC_C_initCalendar (uint16_t baseAddress,
+ Calendar *CalendarTime,
+ uint16_t formatSelect)
+{
+
+ HWREG8(baseAddress + OFS_RTCCTL0_H) = RTCKEY_H;
+
+ HWREG8(baseAddress + OFS_RTCCTL13_L) |= RTCHOLD;
+
+ HWREG16(baseAddress + OFS_RTCCTL13_L) &= ~(RTCBCD);
+ HWREG16(baseAddress + OFS_RTCCTL13_L) |= formatSelect;
+
+ HWREG8(baseAddress + OFS_RTCTIM0_L) = CalendarTime->Seconds;
+ HWREG8(baseAddress + OFS_RTCTIM0_H) = CalendarTime->Minutes;
+ HWREG8(baseAddress + OFS_RTCTIM1_L) = CalendarTime->Hours;
+ HWREG8(baseAddress + OFS_RTCTIM1_H) = CalendarTime->DayOfWeek;
+ HWREG8(baseAddress + OFS_RTCDATE_L) = CalendarTime->DayOfMonth;
+ HWREG8(baseAddress + OFS_RTCDATE_H) = CalendarTime->Month;
+ HWREG16(baseAddress + OFS_RTCYEAR) = CalendarTime->Year;
+
+ HWREG8(baseAddress + OFS_RTCCTL0_H) = 0x00;
+}
+
+Calendar RTC_C_getCalendarTime (uint16_t baseAddress)
+{
+ Calendar tempCal;
+
+ while ( !(HWREG8(baseAddress + OFS_RTCCTL13_L) & RTCRDY) ) ;
+
+ tempCal.Seconds = HWREG8(baseAddress + OFS_RTCTIM0_L);
+ tempCal.Minutes = HWREG8(baseAddress + OFS_RTCTIM0_H);
+ tempCal.Hours = HWREG8(baseAddress + OFS_RTCTIM1_L);
+ tempCal.DayOfWeek = HWREG8(baseAddress + OFS_RTCTIM1_H);
+ tempCal.DayOfMonth = HWREG8(baseAddress + OFS_RTCDATE_L);
+ tempCal.Month = HWREG8(baseAddress + OFS_RTCDATE_H);
+ tempCal.Year = HWREG16(baseAddress + OFS_RTCYEAR);
+
+ return ( tempCal) ;
+}
+
+void RTC_C_configureCalendarAlarm(uint16_t baseAddress,
+ RTC_C_configureCalendarAlarmParam *param)
+{
+ //Each of these is XORed with 0x80 to turn on if an integer is passed,
+ //or turn OFF if RTC_C_ALARM_OFF (0x80) is passed.
+ HWREG8(baseAddress + OFS_RTCAMINHR_L) = (param->minutesAlarm ^ 0x80);
+ HWREG8(baseAddress + OFS_RTCAMINHR_H) = (param->hoursAlarm ^ 0x80);
+ HWREG8(baseAddress + OFS_RTCADOWDAY_L) = (param->dayOfWeekAlarm ^ 0x80);
+ HWREG8(baseAddress + OFS_RTCADOWDAY_H) = (param->dayOfMonthAlarm ^ 0x80);
+}
+void RTC_C_setCalendarEvent (uint16_t baseAddress,
+ uint16_t eventSelect)
+{
+ HWREG8(baseAddress + OFS_RTCCTL0_H) = RTCKEY_H;
+ HWREG8(baseAddress + OFS_RTCCTL13_L) &= ~(RTCTEV_3); //Reset bits
+ HWREG8(baseAddress + OFS_RTCCTL13_L) |= eventSelect;
+ HWREG8(baseAddress + OFS_RTCCTL0_H) = 0x00;
+}
+
+uint32_t RTC_C_getCounterValue (uint16_t baseAddress)
+{
+ if ( (HWREG8(baseAddress + OFS_RTCCTL13) & RTCHOLD)
+ || (HWREG8(baseAddress + OFS_RTCPS1CTL) & RT1PSHOLD) ){
+ return ( 0) ;
+ }
+
+ uint32_t counterValue_L = HWREG16(baseAddress + OFS_RTCTIM0);
+ uint32_t counterValue_H = HWREG16(baseAddress + OFS_RTCTIM1);
+ return ( (counterValue_H << 16) + counterValue_L );
+}
+
+void RTC_C_setCounterValue (uint16_t baseAddress,
+ uint32_t counterValue)
+{
+ uint16_t mode = HWREG16(baseAddress + OFS_RTCCTL13) & RTCTEV_3;
+
+ if(mode == RTC_C_COUNTERSIZE_8BIT && counterValue > UINT8_MAX)
+ counterValue = UINT8_MAX;
+ else if(mode == RTC_C_COUNTERSIZE_16BIT && counterValue > UINT16_MAX)
+ counterValue = UINT16_MAX;
+ else if(mode == RTC_C_COUNTERSIZE_24BIT && counterValue > 0xFFFFFF)
+ counterValue = 0xFFFFFF;
+
+ HWREG16(baseAddress + OFS_RTCTIM0) = counterValue;
+ HWREG16(baseAddress + OFS_RTCTIM1) = ( counterValue >> 16 );
+}
+
+void RTC_C_initCounterPrescale (uint16_t baseAddress,
+ uint8_t prescaleSelect,
+ uint16_t prescaleClockSelect,
+ uint16_t prescaleDivider)
+{
+ HWREG8(baseAddress + OFS_RTCCTL0_H) = RTCKEY_H;
+
+ //Reset bits and set clock select
+ HWREG16(baseAddress + OFS_RTCPS0CTL + prescaleSelect) =
+ prescaleClockSelect + prescaleDivider;
+
+ HWREG8(baseAddress + OFS_RTCCTL0_H) = 0x00;
+}
+
+void RTC_C_holdCounterPrescale (uint16_t baseAddress,
+ uint8_t prescaleSelect)
+{
+ HWREG8(baseAddress + OFS_RTCPS0CTL_H + prescaleSelect) |= RT0PSHOLD_H;
+}
+
+void RTC_C_startCounterPrescale (uint16_t baseAddress,
+ uint8_t prescaleSelect)
+{
+ HWREG8(baseAddress + OFS_RTCPS0CTL_H + prescaleSelect) &= ~(RT0PSHOLD_H);
+}
+
+void RTC_C_definePrescaleEvent (uint16_t baseAddress,
+ uint8_t prescaleSelect,
+ uint8_t prescaleEventDivider)
+{
+ HWREG8(baseAddress + OFS_RTCPS0CTL_L + prescaleSelect) &= ~(RT0IP_7);
+ HWREG8(baseAddress + OFS_RTCPS0CTL_L +
+ prescaleSelect) |= prescaleEventDivider;
+}
+
+uint8_t RTC_C_getPrescaleValue (uint16_t baseAddress,
+ uint8_t prescaleSelect)
+{
+ if (RTC_C_PRESCALE_0 == prescaleSelect){
+ return ( HWREG8(baseAddress + OFS_RTCPS_L) );
+ } else if (RTC_C_PRESCALE_1 == prescaleSelect){
+ return ( HWREG8(baseAddress + OFS_RTCPS_H) );
+ } else {
+ return ( 0) ;
+ }
+}
+
+void RTC_C_setPrescaleValue(uint16_t baseAddress,
+ uint8_t prescaleSelect,
+ uint8_t prescaleCounterValue)
+{
+ HWREG8(baseAddress + OFS_RTCCTL0_H) = RTCKEY_H;
+ if (RTC_C_PRESCALE_0 == prescaleSelect){
+ HWREG8(baseAddress + OFS_RTCPS_L) = prescaleCounterValue;
+ } else if (RTC_C_PRESCALE_1 == prescaleSelect){
+ HWREG8(baseAddress + OFS_RTCPS_H) = prescaleCounterValue;
+ }
+ HWREG8(baseAddress + OFS_RTCCTL0_H) = 0x00;
+}
+
+void RTC_C_enableInterrupt (uint16_t baseAddress,
+ uint8_t interruptMask)
+{
+ if ( interruptMask & (RTCOFIE + RTCTEVIE + RTCAIE + RTCRDYIE) ){
+ HWREG8(baseAddress + OFS_RTCCTL0_H) = RTCKEY_H;
+ HWREG8(baseAddress + OFS_RTCCTL0_L) |=
+ (interruptMask & (RTCOFIE + RTCTEVIE + RTCAIE + RTCRDYIE));
+ HWREG8(baseAddress + OFS_RTCCTL0_H) = 0x00;
+ }
+
+ if (interruptMask & RTC_C_PRESCALE_TIMER0_INTERRUPT){
+ HWREG8(baseAddress + OFS_RTCPS0CTL_L) |= RT0PSIE;
+ }
+
+ if (interruptMask & RTC_C_PRESCALE_TIMER1_INTERRUPT){
+ HWREG8(baseAddress + OFS_RTCPS1CTL_L) |= RT1PSIE;
+ }
+}
+
+void RTC_C_disableInterrupt (uint16_t baseAddress,
+ uint8_t interruptMask)
+{
+
+ if ( interruptMask & (RTCOFIE + RTCTEVIE + RTCAIE + RTCRDYIE) ){
+ HWREG8(baseAddress + OFS_RTCCTL0_H) = RTCKEY_H;
+ HWREG8(baseAddress + OFS_RTCCTL0_L) &=
+ ~(interruptMask & (RTCOFIE + RTCTEVIE + RTCAIE + RTCRDYIE));
+ HWREG8(baseAddress + OFS_RTCCTL0_H) = 0x00;
+ }
+
+ if (interruptMask & RTC_C_PRESCALE_TIMER0_INTERRUPT){
+ HWREG8(baseAddress + OFS_RTCPS0CTL_L) &= ~(RT0PSIE);
+ }
+
+ if (interruptMask & RTC_C_PRESCALE_TIMER1_INTERRUPT){
+ HWREG8(baseAddress + OFS_RTCPS1CTL_L) &= ~(RT1PSIE);
+ }
+}
+
+uint8_t RTC_C_getInterruptStatus (uint16_t baseAddress,
+ uint8_t interruptFlagMask)
+{
+ uint8_t tempInterruptFlagMask = 0x0000;
+
+ tempInterruptFlagMask |= (HWREG8(baseAddress + OFS_RTCCTL0_L)
+ & ((interruptFlagMask >> 4)
+ & (RTCOFIFG +
+ RTCTEVIFG +
+ RTCAIFG +
+ RTCRDYIFG)));
+
+ tempInterruptFlagMask = tempInterruptFlagMask << 4;
+
+ if (interruptFlagMask & RTC_C_PRESCALE_TIMER0_INTERRUPT){
+ if ( HWREG8(baseAddress + OFS_RTCPS0CTL_L) & RT0PSIFG){
+ tempInterruptFlagMask |= RTC_C_PRESCALE_TIMER0_INTERRUPT;
+ }
+ }
+
+ if (interruptFlagMask & RTC_C_PRESCALE_TIMER1_INTERRUPT){
+ if ( HWREG8(baseAddress + OFS_RTCPS1CTL_L) & RT1PSIFG){
+ tempInterruptFlagMask |= RTC_C_PRESCALE_TIMER1_INTERRUPT;
+ }
+ }
+
+ return ( tempInterruptFlagMask) ;
+}
+
+void RTC_C_clearInterrupt (uint16_t baseAddress,
+ uint8_t interruptFlagMask)
+{
+
+ if ( interruptFlagMask & (RTC_C_TIME_EVENT_INTERRUPT +
+ RTC_C_CLOCK_ALARM_INTERRUPT +
+ RTC_C_CLOCK_READ_READY_INTERRUPT +
+ RTC_C_OSCILLATOR_FAULT_INTERRUPT) ){
+ HWREG8(baseAddress + OFS_RTCCTL0_H) = RTCKEY_H;
+ HWREG8(baseAddress + OFS_RTCCTL0_L) &=
+ ~((interruptFlagMask>>4) & (RTCOFIFG +
+ RTCTEVIFG +
+ RTCAIFG +
+ RTCRDYIFG));
+ HWREG8(baseAddress + OFS_RTCCTL0_H) = 0x00;
+ }
+
+ if (interruptFlagMask & RTC_C_PRESCALE_TIMER0_INTERRUPT){
+ HWREG8(baseAddress + OFS_RTCPS0CTL_L) &= ~(RT0PSIFG);
+ }
+
+ if (interruptFlagMask & RTC_C_PRESCALE_TIMER1_INTERRUPT){
+ HWREG8(baseAddress + OFS_RTCPS1CTL_L) &= ~(RT1PSIFG);
+ }
+}
+
+uint16_t RTC_C_convertBCDToBinary (uint16_t baseAddress,
+ uint16_t valueToConvert)
+{
+ HWREG16(baseAddress + OFS_BCD2BIN) = valueToConvert;
+ return ( HWREG16(baseAddress + OFS_BCD2BIN) );
+}
+
+uint16_t RTC_C_convertBinaryToBCD (uint16_t baseAddress,
+ uint16_t valueToConvert)
+{
+ HWREG16(baseAddress + OFS_BIN2BCD) = valueToConvert;
+ return ( HWREG16(baseAddress + OFS_BIN2BCD) );
+}
+
+#endif
+//*****************************************************************************
+//
+//! Close the doxygen group for rtc_c_api
+//! @}
+//
+//*****************************************************************************
diff --git a/Apps/FlightSoftware/MotorControl/driverlib/rtc_c.h b/Apps/FlightSoftware/MotorControl/driverlib/rtc_c.h
new file mode 100644
index 000000000..5d2ff4711
--- /dev/null
+++ b/Apps/FlightSoftware/MotorControl/driverlib/rtc_c.h
@@ -0,0 +1,856 @@
+/* --COPYRIGHT--,BSD
+ * Copyright (c) 2017, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * --/COPYRIGHT--*/
+//*****************************************************************************
+//
+// rtc_c.h - Driver for the RTC_C Module.
+//
+//*****************************************************************************
+
+#ifndef __MSP430WARE_RTC_C_H__
+#define __MSP430WARE_RTC_C_H__
+
+#include "inc/hw_memmap.h"
+
+#ifdef __MSP430_HAS_RTC_C__
+
+//*****************************************************************************
+//
+// If building with a C++ compiler, make all of the definitions in this header
+// have a C binding.
+//
+//*****************************************************************************
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+#include "inc/hw_memmap.h"
+//*****************************************************************************
+//
+//! \brief Used in the RTC_C_initCalendar() function as the CalendarTime
+//! parameter.
+//
+//*****************************************************************************
+typedef struct Calendar {
+ //! Seconds of minute between 0-59
+ uint8_t Seconds;
+ //! Minutes of hour between 0-59
+ uint8_t Minutes;
+ //! Hour of day between 0-23
+ uint8_t Hours;
+ //! Day of week between 0-6
+ uint8_t DayOfWeek;
+ //! Day of month between 1-31
+ uint8_t DayOfMonth;
+ //! Month between 1-12
+ uint8_t Month;
+ //! Year between 0-4095
+ uint16_t Year;
+} Calendar;
+
+//*****************************************************************************
+//
+//! \brief Used in the RTC_C_configureCalendarAlarm() function as the param
+//! parameter.
+//
+//*****************************************************************************
+typedef struct RTC_C_configureCalendarAlarmParam {
+ //! Is the alarm condition for the minutes.
+ //! \n Valid values are:
+ //! - \b RTC_C_ALARMCONDITION_OFF [Default]
+ uint8_t minutesAlarm;
+ //! Is the alarm condition for the hours.
+ //! \n Valid values are:
+ //! - \b RTC_C_ALARMCONDITION_OFF [Default]
+ uint8_t hoursAlarm;
+ //! Is the alarm condition for the day of week.
+ //! \n Valid values are:
+ //! - \b RTC_C_ALARMCONDITION_OFF [Default]
+ uint8_t dayOfWeekAlarm;
+ //! Is the alarm condition for the day of the month.
+ //! \n Valid values are:
+ //! - \b RTC_C_ALARMCONDITION_OFF [Default]
+ uint8_t dayOfMonthAlarm;
+} RTC_C_configureCalendarAlarmParam;
+
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the frequencySelect parameter
+// for functions: RTC_C_setCalibrationFrequency().
+//
+//*****************************************************************************
+#define RTC_C_CALIBRATIONFREQ_OFF (RTCCALF_0)
+#define RTC_C_CALIBRATIONFREQ_512HZ (RTCCALF_1)
+#define RTC_C_CALIBRATIONFREQ_256HZ (RTCCALF_2)
+#define RTC_C_CALIBRATIONFREQ_1HZ (RTCCALF_3)
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the offsetDirection parameter
+// for functions: RTC_C_setCalibrationData().
+//
+//*****************************************************************************
+#define RTC_C_CALIBRATION_DOWN1PPM (!(RTCCALS))
+#define RTC_C_CALIBRATION_UP1PPM (RTCCALS)
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the offsetDirection parameter
+// for functions: RTC_C_setTemperatureCompensation().
+//
+//*****************************************************************************
+#define RTC_C_COMPENSATION_DOWN1PPM (!(RTCTCMPS))
+#define RTC_C_COMPENSATION_UP1PPM (RTCTCMPS)
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the clockSelect parameter for
+// functions: RTC_C_initCounter().
+//
+//*****************************************************************************
+#define RTC_C_CLOCKSELECT_32KHZ_OSC (RTCSSEL_0)
+#define RTC_C_CLOCKSELECT_RT1PS (RTCSSEL_2)
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the counterSizeSelect
+// parameter for functions: RTC_C_initCounter().
+//
+//*****************************************************************************
+#define RTC_C_COUNTERSIZE_8BIT (RTCTEV_0)
+#define RTC_C_COUNTERSIZE_16BIT (RTCTEV_1)
+#define RTC_C_COUNTERSIZE_24BIT (RTCTEV_2)
+#define RTC_C_COUNTERSIZE_32BIT (RTCTEV_3)
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the formatSelect parameter
+// for functions: RTC_C_initCalendar().
+//
+//*****************************************************************************
+#define RTC_C_FORMAT_BINARY (!(RTCBCD))
+#define RTC_C_FORMAT_BCD (RTCBCD)
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the param parameter for
+// functions: RTC_C_configureCalendarAlarm(), RTC_C_configureCalendarAlarm(),
+// RTC_C_configureCalendarAlarm(), and RTC_C_configureCalendarAlarm().
+//
+//*****************************************************************************
+#define RTC_C_ALARMCONDITION_OFF (0x80)
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the eventSelect parameter for
+// functions: RTC_C_setCalendarEvent().
+//
+//*****************************************************************************
+#define RTC_C_CALENDAREVENT_MINUTECHANGE (RTCTEV_0)
+#define RTC_C_CALENDAREVENT_HOURCHANGE (RTCTEV_1)
+#define RTC_C_CALENDAREVENT_NOON (RTCTEV_2)
+#define RTC_C_CALENDAREVENT_MIDNIGHT (RTCTEV_3)
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the prescaleDivider parameter
+// for functions: RTC_C_initCounterPrescale().
+//
+//*****************************************************************************
+#define RTC_C_PSDIVIDER_2 (RT0PSDIV_0)
+#define RTC_C_PSDIVIDER_4 (RT0PSDIV_1)
+#define RTC_C_PSDIVIDER_8 (RT0PSDIV_2)
+#define RTC_C_PSDIVIDER_16 (RT0PSDIV_3)
+#define RTC_C_PSDIVIDER_32 (RT0PSDIV_4)
+#define RTC_C_PSDIVIDER_64 (RT0PSDIV_5)
+#define RTC_C_PSDIVIDER_128 (RT0PSDIV_6)
+#define RTC_C_PSDIVIDER_256 (RT0PSDIV_7)
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the prescaleClockSelect
+// parameter for functions: RTC_C_initCounterPrescale().
+//
+//*****************************************************************************
+#define RTC_C_PSCLOCKSELECT_ACLK (RT1SSEL_0)
+#define RTC_C_PSCLOCKSELECT_SMCLK (RT1SSEL_1)
+#define RTC_C_PSCLOCKSELECT_RT0PS (RT1SSEL_2)
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the prescaleEventDivider
+// parameter for functions: RTC_C_definePrescaleEvent().
+//
+//*****************************************************************************
+#define RTC_C_PSEVENTDIVIDER_2 (RT0IP_0)
+#define RTC_C_PSEVENTDIVIDER_4 (RT0IP_1)
+#define RTC_C_PSEVENTDIVIDER_8 (RT0IP_2)
+#define RTC_C_PSEVENTDIVIDER_16 (RT0IP_3)
+#define RTC_C_PSEVENTDIVIDER_32 (RT0IP_4)
+#define RTC_C_PSEVENTDIVIDER_64 (RT0IP_5)
+#define RTC_C_PSEVENTDIVIDER_128 (RT0IP_6)
+#define RTC_C_PSEVENTDIVIDER_256 (RT0IP_7)
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the prescaleSelect parameter
+// for functions: RTC_C_initCounterPrescale(), RTC_C_holdCounterPrescale(),
+// RTC_C_startCounterPrescale(), RTC_C_definePrescaleEvent(),
+// RTC_C_getPrescaleValue(), and RTC_C_setPrescaleValue().
+//
+//*****************************************************************************
+#define RTC_C_PRESCALE_0 (0x0)
+#define RTC_C_PRESCALE_1 (0x2)
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the interruptMask parameter
+// for functions: RTC_C_enableInterrupt(), and RTC_C_disableInterrupt(); the
+// interruptFlagMask parameter for functions: RTC_C_getInterruptStatus(), and
+// RTC_C_clearInterrupt() as well as returned by the RTC_C_getInterruptStatus()
+// function.
+//
+//*****************************************************************************
+#define RTC_C_TIME_EVENT_INTERRUPT RTCTEVIE
+#define RTC_C_CLOCK_ALARM_INTERRUPT RTCAIE
+#define RTC_C_CLOCK_READ_READY_INTERRUPT RTCRDYIE
+#define RTC_C_PRESCALE_TIMER0_INTERRUPT 0x02
+#define RTC_C_PRESCALE_TIMER1_INTERRUPT 0x01
+#define RTC_C_OSCILLATOR_FAULT_INTERRUPT RTCOFIE
+
+//*****************************************************************************
+//
+// Prototypes for the APIs.
+//
+//*****************************************************************************
+
+//*****************************************************************************
+//
+//! \brief Starts the RTC.
+//!
+//! This function clears the RTC main hold bit to allow the RTC to function.
+//!
+//! \param baseAddress is the base address of the RTC_C module.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void RTC_C_startClock(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Holds the RTC.
+//!
+//! This function sets the RTC main hold bit to disable RTC functionality.
+//!
+//! \param baseAddress is the base address of the RTC_C module.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void RTC_C_holdClock(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Allows and Sets the frequency output to RTCCLK pin for calibration
+//! measurement.
+//!
+//! This function sets a frequency to measure at the RTCCLK output pin. After
+//! testing the set frequency, the calibration could be set accordingly.
+//!
+//! \param baseAddress is the base address of the RTC_C module.
+//! \param frequencySelect is the frequency output to RTCCLK.
+//! Valid values are:
+//! - \b RTC_C_CALIBRATIONFREQ_OFF [Default] - turn off calibration
+//! output
+//! - \b RTC_C_CALIBRATIONFREQ_512HZ - output signal at 512Hz for
+//! calibration
+//! - \b RTC_C_CALIBRATIONFREQ_256HZ - output signal at 256Hz for
+//! calibration
+//! - \b RTC_C_CALIBRATIONFREQ_1HZ - output signal at 1Hz for
+//! calibration
+//! \n Modified bits are \b RTCCALF of \b RTCCTL3 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void RTC_C_setCalibrationFrequency(uint16_t baseAddress,
+ uint16_t frequencySelect);
+
+//*****************************************************************************
+//
+//! \brief Sets the specified calibration for the RTC.
+//!
+//! This function sets the calibration offset to make the RTC as accurate as
+//! possible. The offsetDirection can be either +1-ppm or -1-ppm, and the
+//! offsetValue should be from 1-240 and is multiplied by the direction setting
+//! (i.e. +1-ppm * 8 (offsetValue) = +8-ppm).
+//!
+//! \param baseAddress is the base address of the RTC_C module.
+//! \param offsetDirection is the direction that the calibration offset will
+//! go.
+//! Valid values are:
+//! - \b RTC_C_CALIBRATION_DOWN1PPM - calibrate at steps of -1
+//! - \b RTC_C_CALIBRATION_UP1PPM - calibrate at steps of +1
+//! \n Modified bits are \b RTC0CALS of \b RTC0CAL register.
+//! \param offsetValue is the value that the offset will be a factor of; a
+//! valid value is any integer from 1-240.
+//! \n Modified bits are \b RTC0CALx of \b RTC0CAL register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void RTC_C_setCalibrationData(uint16_t baseAddress,
+ uint8_t offsetDirection,
+ uint8_t offsetValue);
+
+//*****************************************************************************
+//
+//! \brief Initializes the settings to operate the RTC in Counter mode.
+//!
+//! This function initializes the Counter mode of the RTC_C. Setting the clock
+//! source and counter size will allow an interrupt from the RTCTEVIFG once an
+//! overflow to the counter register occurs.
+//!
+//! \param baseAddress is the base address of the RTC_C module.
+//! \param clockSelect is the selected clock for the counter mode to use.
+//! Valid values are:
+//! - \b RTC_C_CLOCKSELECT_32KHZ_OSC
+//! - \b RTC_C_CLOCKSELECT_RT1PS
+//! \n Modified bits are \b RTCSSEL of \b RTCCTL1 register.
+//! \param counterSizeSelect is the size of the counter.
+//! Valid values are:
+//! - \b RTC_C_COUNTERSIZE_8BIT [Default]
+//! - \b RTC_C_COUNTERSIZE_16BIT
+//! - \b RTC_C_COUNTERSIZE_24BIT
+//! - \b RTC_C_COUNTERSIZE_32BIT
+//! \n Modified bits are \b RTCTEV of \b RTCCTL1 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void RTC_C_initCounter(uint16_t baseAddress,
+ uint16_t clockSelect,
+ uint16_t counterSizeSelect);
+
+//*****************************************************************************
+//
+//! \brief Sets the specified temperature compensation for the RTC.
+//!
+//! This function sets the calibration offset to make the RTC as accurate as
+//! possible. The offsetDirection can be either +1-ppm or -1-ppm, and the
+//! offsetValue should be from 1-240 and is multiplied by the direction setting
+//! (i.e. +1-ppm * 8 (offsetValue) = +8-ppm).
+//!
+//! \param baseAddress is the base address of the RTC_C module.
+//! \param offsetDirection is the direction that the calibration offset wil go
+//! Valid values are:
+//! - \b RTC_C_COMPENSATION_DOWN1PPM
+//! - \b RTC_C_COMPENSATION_UP1PPM
+//! \n Modified bits are \b RTCTCMPS of \b RTCTCMP register.
+//! \param offsetValue is the value that the offset will be a factor of; a
+//! valid value is any integer from 1-240.
+//! \n Modified bits are \b RTCTCMPx of \b RTCTCMP register.
+//!
+//! \return STATUS_SUCCESS or STATUS_FAILURE of setting the temperature
+//! compensation
+//
+//*****************************************************************************
+extern bool RTC_C_setTemperatureCompensation(uint16_t baseAddress,
+ uint16_t offsetDirection,
+ uint8_t offsetValue);
+
+//*****************************************************************************
+//
+//! \brief Initializes the settings to operate the RTC in calendar mode
+//!
+//! This function initializes the Calendar mode of the RTC module. To prevent
+//! potential erroneous alarm conditions from occurring, the alarm should be
+//! disabled by clearing the RTCAIE, RTCAIFG and AE bits with APIs:
+//! RTC_C_disableInterrupt(), RTC_C_clearInterrupt() and
+//! RTC_C_configureCalendarAlarm() before calendar initialization.
+//!
+//! \param baseAddress is the base address of the RTC_C module.
+//! \param CalendarTime is the pointer to the structure containing the values
+//! for the Calendar to be initialized to. Valid values should be of
+//! type pointer to Calendar and should contain the following members
+//! and corresponding values: \n\b Seconds between 0-59 \n\b Minutes
+//! between 0-59 \n\b Hours between 0-23 \n\b DayOfWeek between 0-6 \n\b
+//! DayOfMonth between 1-31 \n\b Month between 1-12 \n\b Year between
+//! 0-4095 \n\b NOTE: Values beyond the ones specified may result in
+//! erratic behavior.
+//! \param formatSelect is the format for the Calendar registers to use.
+//! Valid values are:
+//! - \b RTC_C_FORMAT_BINARY [Default]
+//! - \b RTC_C_FORMAT_BCD
+//! \n Modified bits are \b RTCBCD of \b RTCCTL1 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void RTC_C_initCalendar(uint16_t baseAddress,
+ Calendar *CalendarTime,
+ uint16_t formatSelect);
+
+//*****************************************************************************
+//
+//! \brief Returns the Calendar Time stored in the Calendar registers of the
+//! RTC.
+//!
+//! This function returns the current Calendar time in the form of a Calendar
+//! structure. The RTCRDY polling is used in this function to prevent reading
+//! invalid time.
+//!
+//! \param baseAddress is the base address of the RTC_C module.
+//!
+//! \return A Calendar structure containing the current time.
+//
+//*****************************************************************************
+extern Calendar RTC_C_getCalendarTime(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Sets and Enables the desired Calendar Alarm settings.
+//!
+//! This function sets a Calendar interrupt condition to assert the RTCAIFG
+//! interrupt flag. The condition is a logical and of all of the parameters.
+//! For example if the minutes and hours alarm is set, then the interrupt will
+//! only assert when the minutes AND the hours change to the specified setting.
+//! Use the RTC_C_ALARM_OFF for any alarm settings that should not be apart of
+//! the alarm condition.
+//!
+//! \param baseAddress is the base address of the RTC_C module.
+//! \param param is the pointer to struct for calendar alarm configuration.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void RTC_C_configureCalendarAlarm(uint16_t baseAddress,
+ RTC_C_configureCalendarAlarmParam *param);
+
+//*****************************************************************************
+//
+//! \brief Sets a single specified Calendar interrupt condition
+//!
+//! This function sets a specified event to assert the RTCTEVIFG interrupt.
+//! This interrupt is independent from the Calendar alarm interrupt.
+//!
+//! \param baseAddress is the base address of the RTC_C module.
+//! \param eventSelect is the condition selected.
+//! Valid values are:
+//! - \b RTC_C_CALENDAREVENT_MINUTECHANGE - assert interrupt on every
+//! minute
+//! - \b RTC_C_CALENDAREVENT_HOURCHANGE - assert interrupt on every hour
+//! - \b RTC_C_CALENDAREVENT_NOON - assert interrupt when hour is 12
+//! - \b RTC_C_CALENDAREVENT_MIDNIGHT - assert interrupt when hour is 0
+//! \n Modified bits are \b RTCTEV of \b RTCCTL register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void RTC_C_setCalendarEvent(uint16_t baseAddress,
+ uint16_t eventSelect);
+
+//*****************************************************************************
+//
+//! \brief Returns the value of the Counter register.
+//!
+//! This function returns the value of the counter register for the RTC_C
+//! module. It will return the 32-bit value no matter the size set during
+//! initialization. The RTC should be held before trying to use this function.
+//!
+//! \param baseAddress is the base address of the RTC_C module.
+//!
+//! \return The raw value of the full 32-bit Counter Register.
+//
+//*****************************************************************************
+extern uint32_t RTC_C_getCounterValue(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Sets the value of the Counter register
+//!
+//! This function sets the counter register of the RTC_C module.
+//!
+//! \param baseAddress is the base address of the RTC_C module.
+//! \param counterValue is the value to set the Counter register to; a valid
+//! value may be any 32-bit integer.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void RTC_C_setCounterValue(uint16_t baseAddress,
+ uint32_t counterValue);
+
+//*****************************************************************************
+//
+//! \brief Initializes the Prescaler for Counter mode.
+//!
+//! This function initializes the selected prescaler for the counter mode in
+//! the RTC_C module. If the RTC is initialized in Calendar mode, then these
+//! are automatically initialized. The Prescalers can be used to divide a clock
+//! source additionally before it gets to the main RTC clock.
+//!
+//! \param baseAddress is the base address of the RTC_C module.
+//! \param prescaleSelect is the prescaler to initialize.
+//! Valid values are:
+//! - \b RTC_C_PRESCALE_0
+//! - \b RTC_C_PRESCALE_1
+//! \param prescaleClockSelect is the clock to drive the selected prescaler.
+//! Valid values are:
+//! - \b RTC_C_PSCLOCKSELECT_ACLK
+//! - \b RTC_C_PSCLOCKSELECT_SMCLK
+//! - \b RTC_C_PSCLOCKSELECT_RT0PS - use Prescaler 0 as source to
+//! Prescaler 1 (May only be used if prescaleSelect is
+//! RTC_C_PRESCALE_1)
+//! \n Modified bits are \b RTxSSEL of \b RTCPSxCTL register.
+//! \param prescaleDivider is the divider for the selected clock source.
+//! Valid values are:
+//! - \b RTC_C_PSDIVIDER_2 [Default]
+//! - \b RTC_C_PSDIVIDER_4
+//! - \b RTC_C_PSDIVIDER_8
+//! - \b RTC_C_PSDIVIDER_16
+//! - \b RTC_C_PSDIVIDER_32
+//! - \b RTC_C_PSDIVIDER_64
+//! - \b RTC_C_PSDIVIDER_128
+//! - \b RTC_C_PSDIVIDER_256
+//! \n Modified bits are \b RTxPSDIV of \b RTCPSxCTL register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void RTC_C_initCounterPrescale(uint16_t baseAddress,
+ uint8_t prescaleSelect,
+ uint16_t prescaleClockSelect,
+ uint16_t prescaleDivider);
+
+//*****************************************************************************
+//
+//! \brief Holds the selected Prescaler.
+//!
+//! This function holds the prescale counter from continuing. This will only
+//! work in counter mode, in Calendar mode, the RTC_C_holdClock() must be used.
+//! In counter mode, if using both prescalers in conjunction with the main RTC
+//! counter, then stopping RT0PS will stop RT1PS, but stopping RT1PS will not
+//! stop RT0PS.
+//!
+//! \param baseAddress is the base address of the RTC_C module.
+//! \param prescaleSelect is the prescaler to hold.
+//! Valid values are:
+//! - \b RTC_C_PRESCALE_0
+//! - \b RTC_C_PRESCALE_1
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void RTC_C_holdCounterPrescale(uint16_t baseAddress,
+ uint8_t prescaleSelect);
+
+//*****************************************************************************
+//
+//! \brief Starts the selected Prescaler.
+//!
+//! This function starts the selected prescale counter. This function will only
+//! work if the RTC is in counter mode.
+//!
+//! \param baseAddress is the base address of the RTC_C module.
+//! \param prescaleSelect is the prescaler to start.
+//! Valid values are:
+//! - \b RTC_C_PRESCALE_0
+//! - \b RTC_C_PRESCALE_1
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void RTC_C_startCounterPrescale(uint16_t baseAddress,
+ uint8_t prescaleSelect);
+
+//*****************************************************************************
+//
+//! \brief Sets up an interrupt condition for the selected Prescaler.
+//!
+//! This function sets the condition for an interrupt to assert based on the
+//! individual prescalers.
+//!
+//! \param baseAddress is the base address of the RTC_C module.
+//! \param prescaleSelect is the prescaler to define an interrupt for.
+//! Valid values are:
+//! - \b RTC_C_PRESCALE_0
+//! - \b RTC_C_PRESCALE_1
+//! \param prescaleEventDivider is a divider to specify when an interrupt can
+//! occur based on the clock source of the selected prescaler. (Does not
+//! affect timer of the selected prescaler).
+//! Valid values are:
+//! - \b RTC_C_PSEVENTDIVIDER_2 [Default]
+//! - \b RTC_C_PSEVENTDIVIDER_4
+//! - \b RTC_C_PSEVENTDIVIDER_8
+//! - \b RTC_C_PSEVENTDIVIDER_16
+//! - \b RTC_C_PSEVENTDIVIDER_32
+//! - \b RTC_C_PSEVENTDIVIDER_64
+//! - \b RTC_C_PSEVENTDIVIDER_128
+//! - \b RTC_C_PSEVENTDIVIDER_256
+//! \n Modified bits are \b RTxIP of \b RTCPSxCTL register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void RTC_C_definePrescaleEvent(uint16_t baseAddress,
+ uint8_t prescaleSelect,
+ uint8_t prescaleEventDivider);
+
+//*****************************************************************************
+//
+//! \brief Returns the selected prescaler value.
+//!
+//! This function returns the value of the selected prescale counter register.
+//! Note that the counter value should be held by calling RTC_C_holdClock()
+//! before calling this API.
+//!
+//! \param baseAddress is the base address of the RTC_C module.
+//! \param prescaleSelect is the prescaler to obtain the value of.
+//! Valid values are:
+//! - \b RTC_C_PRESCALE_0
+//! - \b RTC_C_PRESCALE_1
+//!
+//! \return The value of the specified prescaler count register
+//
+//*****************************************************************************
+extern uint8_t RTC_C_getPrescaleValue(uint16_t baseAddress,
+ uint8_t prescaleSelect);
+
+//*****************************************************************************
+//
+//! \brief Sets the selected Prescaler value.
+//!
+//! This function sets the prescale counter value. Before setting the prescale
+//! counter, it should be held by calling RTC_C_holdClock().
+//!
+//! \param baseAddress is the base address of the RTC_C module.
+//! \param prescaleSelect is the prescaler to set the value for.
+//! Valid values are:
+//! - \b RTC_C_PRESCALE_0
+//! - \b RTC_C_PRESCALE_1
+//! \param prescaleCounterValue is the specified value to set the prescaler to.
+//! Valid values are any integer between 0-255
+//! \n Modified bits are \b RTxPS of \b RTxPS register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void RTC_C_setPrescaleValue(uint16_t baseAddress,
+ uint8_t prescaleSelect,
+ uint8_t prescaleCounterValue);
+
+//*****************************************************************************
+//
+//! \brief Enables selected RTC interrupt sources.
+//!
+//! This function enables the selected RTC interrupt source. Only the sources
+//! that are enabled can be reflected to the processor interrupt; disabled
+//! sources have no effect on the processor. Does not clear interrupt flags.
+//!
+//! \param baseAddress is the base address of the RTC_C module.
+//! \param interruptMask is a bit mask of the interrupts to enable.
+//! Mask value is the logical OR of any of the following:
+//! - \b RTC_C_TIME_EVENT_INTERRUPT - asserts when counter overflows in
+//! counter mode or when Calendar event condition defined by
+//! defineCalendarEvent() is met.
+//! - \b RTC_C_CLOCK_ALARM_INTERRUPT - asserts when alarm condition in
+//! Calendar mode is met.
+//! - \b RTC_C_CLOCK_READ_READY_INTERRUPT - asserts when Calendar
+//! registers are settled.
+//! - \b RTC_C_PRESCALE_TIMER0_INTERRUPT - asserts when Prescaler 0
+//! event condition is met.
+//! - \b RTC_C_PRESCALE_TIMER1_INTERRUPT - asserts when Prescaler 1
+//! event condition is met.
+//! - \b RTC_C_OSCILLATOR_FAULT_INTERRUPT - asserts if there is a
+//! problem with the 32kHz oscillator, while the RTC is running.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void RTC_C_enableInterrupt(uint16_t baseAddress,
+ uint8_t interruptMask);
+
+//*****************************************************************************
+//
+//! \brief Disables selected RTC interrupt sources.
+//!
+//! This function disables the selected RTC interrupt source. Only the sources
+//! that are enabled can be reflected to the processor interrupt; disabled
+//! sources have no effect on the processor.
+//!
+//! \param baseAddress is the base address of the RTC_C module.
+//! \param interruptMask is a bit mask of the interrupts to disable.
+//! Mask value is the logical OR of any of the following:
+//! - \b RTC_C_TIME_EVENT_INTERRUPT - asserts when counter overflows in
+//! counter mode or when Calendar event condition defined by
+//! defineCalendarEvent() is met.
+//! - \b RTC_C_CLOCK_ALARM_INTERRUPT - asserts when alarm condition in
+//! Calendar mode is met.
+//! - \b RTC_C_CLOCK_READ_READY_INTERRUPT - asserts when Calendar
+//! registers are settled.
+//! - \b RTC_C_PRESCALE_TIMER0_INTERRUPT - asserts when Prescaler 0
+//! event condition is met.
+//! - \b RTC_C_PRESCALE_TIMER1_INTERRUPT - asserts when Prescaler 1
+//! event condition is met.
+//! - \b RTC_C_OSCILLATOR_FAULT_INTERRUPT - asserts if there is a
+//! problem with the 32kHz oscillator, while the RTC is running.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void RTC_C_disableInterrupt(uint16_t baseAddress,
+ uint8_t interruptMask);
+
+//*****************************************************************************
+//
+//! \brief Returns the status of the selected interrupts flags.
+//!
+//! This function returns the status of the interrupt flag for the selected
+//! channel.
+//!
+//! \param baseAddress is the base address of the RTC_C module.
+//! \param interruptFlagMask is a bit mask of the interrupt flags to return the
+//! status of.
+//! Mask value is the logical OR of any of the following:
+//! - \b RTC_C_TIME_EVENT_INTERRUPT - asserts when counter overflows in
+//! counter mode or when Calendar event condition defined by
+//! defineCalendarEvent() is met.
+//! - \b RTC_C_CLOCK_ALARM_INTERRUPT - asserts when alarm condition in
+//! Calendar mode is met.
+//! - \b RTC_C_CLOCK_READ_READY_INTERRUPT - asserts when Calendar
+//! registers are settled.
+//! - \b RTC_C_PRESCALE_TIMER0_INTERRUPT - asserts when Prescaler 0
+//! event condition is met.
+//! - \b RTC_C_PRESCALE_TIMER1_INTERRUPT - asserts when Prescaler 1
+//! event condition is met.
+//! - \b RTC_C_OSCILLATOR_FAULT_INTERRUPT - asserts if there is a
+//! problem with the 32kHz oscillator, while the RTC is running.
+//!
+//! \return Logical OR of any of the following:
+//! - \b RTC_C_TIME_EVENT_INTERRUPT asserts when counter overflows in
+//! counter mode or when Calendar event condition defined by
+//! defineCalendarEvent() is met.
+//! - \b RTC_C_CLOCK_ALARM_INTERRUPT asserts when alarm condition in
+//! Calendar mode is met.
+//! - \b RTC_C_CLOCK_READ_READY_INTERRUPT asserts when Calendar
+//! registers are settled.
+//! - \b RTC_C_PRESCALE_TIMER0_INTERRUPT asserts when Prescaler 0 event
+//! condition is met.
+//! - \b RTC_C_PRESCALE_TIMER1_INTERRUPT asserts when Prescaler 1 event
+//! condition is met.
+//! - \b RTC_C_OSCILLATOR_FAULT_INTERRUPT asserts if there is a problem
+//! with the 32kHz oscillator, while the RTC is running.
+//! \n indicating the status of the masked interrupts
+//
+//*****************************************************************************
+extern uint8_t RTC_C_getInterruptStatus(uint16_t baseAddress,
+ uint8_t interruptFlagMask);
+
+//*****************************************************************************
+//
+//! \brief Clears selected RTC interrupt flags.
+//!
+//! This function clears the RTC interrupt flag is cleared, so that it no
+//! longer asserts.
+//!
+//! \param baseAddress is the base address of the RTC_C module.
+//! \param interruptFlagMask is a bit mask of the interrupt flags to be
+//! cleared.
+//! Mask value is the logical OR of any of the following:
+//! - \b RTC_C_TIME_EVENT_INTERRUPT - asserts when counter overflows in
+//! counter mode or when Calendar event condition defined by
+//! defineCalendarEvent() is met.
+//! - \b RTC_C_CLOCK_ALARM_INTERRUPT - asserts when alarm condition in
+//! Calendar mode is met.
+//! - \b RTC_C_CLOCK_READ_READY_INTERRUPT - asserts when Calendar
+//! registers are settled.
+//! - \b RTC_C_PRESCALE_TIMER0_INTERRUPT - asserts when Prescaler 0
+//! event condition is met.
+//! - \b RTC_C_PRESCALE_TIMER1_INTERRUPT - asserts when Prescaler 1
+//! event condition is met.
+//! - \b RTC_C_OSCILLATOR_FAULT_INTERRUPT - asserts if there is a
+//! problem with the 32kHz oscillator, while the RTC is running.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void RTC_C_clearInterrupt(uint16_t baseAddress,
+ uint8_t interruptFlagMask);
+
+//*****************************************************************************
+//
+//! \brief Convert the given BCD value to binary format
+//!
+//! This function converts BCD values to binary format. This API uses the
+//! hardware registers to perform the conversion rather than a software method.
+//!
+//! \param baseAddress is the base address of the RTC_C module.
+//! \param valueToConvert is the raw value in BCD format to convert to Binary.
+//! \n Modified bits are \b BCD2BIN of \b BCD2BIN register.
+//!
+//! \return The binary version of the input parameter
+//
+//*****************************************************************************
+extern uint16_t RTC_C_convertBCDToBinary(uint16_t baseAddress,
+ uint16_t valueToConvert);
+
+//*****************************************************************************
+//
+//! \brief Convert the given binary value to BCD format
+//!
+//! This function converts binary values to BCD format. This API uses the
+//! hardware registers to perform the conversion rather than a software method.
+//!
+//! \param baseAddress is the base address of the RTC_C module.
+//! \param valueToConvert is the raw value in Binary format to convert to BCD.
+//! \n Modified bits are \b BIN2BCD of \b BIN2BCD register.
+//!
+//! \return The BCD version of the valueToConvert parameter
+//
+//*****************************************************************************
+extern uint16_t RTC_C_convertBinaryToBCD(uint16_t baseAddress,
+ uint16_t valueToConvert);
+
+//*****************************************************************************
+//
+// Mark the end of the C bindings section for C++ compilers.
+//
+//*****************************************************************************
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+#endif // __MSP430WARE_RTC_C_H__
diff --git a/Apps/FlightSoftware/MotorControl/driverlib/saph.c b/Apps/FlightSoftware/MotorControl/driverlib/saph.c
new file mode 100644
index 000000000..a1d8269ea
--- /dev/null
+++ b/Apps/FlightSoftware/MotorControl/driverlib/saph.c
@@ -0,0 +1,276 @@
+/* --COPYRIGHT--,BSD
+ * Copyright (c) 2017, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * --/COPYRIGHT--*/
+//*****************************************************************************
+//
+// saph.c - Driver for the SAPH Module.
+//
+//*****************************************************************************
+
+//*****************************************************************************
+//
+//! \addtogroup saph_api saph
+//! @{
+//
+//*****************************************************************************
+
+#include "inc/hw_memmap.h"
+
+#ifdef __MSP430_HAS_SAPH__
+#include "saph.h"
+
+#include
+
+void SAPH_unlock(uint16_t baseAddress)
+{
+ HWREG16(baseAddress + OFS_SAPHKEY) = KEY;
+}
+
+void SAPH_lock(uint16_t baseAddress)
+{
+ HWREG16(baseAddress + OFS_SAPHKEY) = 0;
+}
+
+void SAPH_clearInterrupt(uint16_t baseAddress, uint8_t mask)
+{
+ HWREG16(baseAddress + OFS_SAPHICR) |= mask;
+}
+
+void SAPH_enableInterrupt(uint16_t baseAddress, uint8_t mask)
+{
+ HWREG16(baseAddress + OFS_SAPHIMSC) |= mask;
+}
+
+void SAPH_disableInterrupt(uint16_t baseAddress, uint8_t mask)
+{
+ HWREG16(baseAddress + OFS_SAPHIMSC) &= ~mask;
+}
+
+uint8_t SAPH_getInterruptStatus(uint16_t baseAddress, uint8_t mask)
+{
+ return HWREG16(baseAddress + OFS_SAPHRIS) & mask;
+}
+
+void SAPH_configurePHY(uint16_t baseAddress, SAPH_configPHYParam *config)
+{
+ uint8_t offset = config->channel;
+
+ HWREG16(baseAddress + OFS_SAPHOCTL0) &= ~ ((SAPH_PHY_OUTPUT_ENABLE<outputValue<enableOutput<enableFullPull<enableTermination<outputFunction<<(offset*2);
+
+ HWREG16(baseAddress + OFS_SAPHCH0PUT + offset*6 ) &= ~CH0PUT;
+ HWREG16(baseAddress + OFS_SAPHCH0PUT + offset*6 ) |= config->pullUpTrim;
+
+ HWREG16(baseAddress + OFS_SAPHCH0PDT + offset*6 ) &= ~CH0PDT;
+ HWREG16(baseAddress + OFS_SAPHCH0PDT + offset*6 ) |= config->pullDownTrim;
+
+ HWREG16(baseAddress + OFS_SAPHCH0TT + offset*6 ) &= ~CH0TT;
+ HWREG16(baseAddress + OFS_SAPHCH0TT + offset*6 ) |= config->terminationTrim;
+
+}
+
+void SAPH_configurePHYMultiplexer(uint16_t baseAddress,
+ uint16_t dummyLoad, uint16_t source, uint16_t input)
+{
+ HWREG16(baseAddress + OFS_SAPHICTL0) &= ~(DUMEN | MUXCTL | MUXSEL);
+ HWREG16(baseAddress + OFS_SAPHICTL0) |= dummyLoad | source | input;
+}
+
+void SAPH_configurePHYBias(uint16_t baseAddress, SAPH_configPHYBiasParam * config)
+{
+ uint8_t i = 0;
+ for (i=0; ibiasSwitch[i]<biasPGA | config->biasExcitation
+ | config->enableChargePump | config->enableLeakageCompensation
+ | config->biasSwitchPGA | config->biasSwitchASQ);
+}
+
+void SAPH_configurePPGCount(uint16_t baseAddress, SAPH_configPPGCountParam *config)
+{
+ HWREG16(baseAddress + OFS_SAPHPGC) &= ~(PHIZ | PLEV | PPOL | SPULS | EPULS);
+ HWREG16(baseAddress + OFS_SAPHPGC) |= (config->highImpedance
+ | config->pauseLevel | config->pausePolarity | config->stopPauseCount
+ | config->excitationPulseCount);
+}
+
+void SAPH_setPPGLowPeriod(uint16_t baseAddress, uint16_t period)
+{
+ HWREG16(baseAddress + OFS_SAPHPGLPER) &= ~LPER;
+ HWREG16(baseAddress + OFS_SAPHPGLPER) |= period;
+}
+
+void SAPH_setPPGHighPeriod(uint16_t baseAddress, uint16_t period)
+{
+ HWREG16(baseAddress + OFS_SAPHPGHPER) &= ~HPER;
+ HWREG16(baseAddress + OFS_SAPHPGHPER) |= period;
+}
+
+void SAPH_configurePPG(uint16_t baseAddress, SAPH_configPPGParam *config)
+{
+ HWREG16(baseAddress + OFS_SAPHPGCTL) &= ~(PSCEN | PPGEN | TRSEL_3 | PPGCHSEL | PGSEL);
+ HWREG16(baseAddress + OFS_SAPHPGCTL) |= (config->enablePrescaler | PPGEN |
+ config->triggerSource | config->channelSelect | config->portSelect);
+
+}
+
+void SAPH_triggerPPG(uint16_t baseAddress)
+{
+ HWREG16(baseAddress + OFS_SAPHPPGTRIG) |= PPGTRIG;
+}
+
+void SAPH_stopPPG(uint16_t baseAddress)
+{
+ HWREG16(baseAddress + OFS_SAPHPGCTL) |= PPGSTOP;
+}
+
+void SAPH_configureASQ(uint16_t baseAddress, SAPH_configASQParam *config)
+{
+ HWREG16(baseAddress + OFS_SAPHASCTL0) &= ~(ERABRT | TRIGSEL | ASQTEN | ASQCHSEL);
+ HWREG16(baseAddress + OFS_SAPHASCTL1) &= ~(CHOWN | STDBY | ESOFF | EARLYRB | CHTOG);
+
+ HWREG16(baseAddress + OFS_SAPHASCTL1) |= config->sideOfChannel | config->standByIndication
+ | config->endOfSequence | config->earlyReceiveBias | config->enableChannelToggle;
+ HWREG16(baseAddress + OFS_SAPHASCTL0) |= config->abortOnError | config->triggerSource
+ | config->channelSelect | ASQTEN;
+}
+
+void SAPH_triggerASQ(uint16_t baseAddress)
+{
+ HWREG16(baseAddress + OFS_SAPHASQTRIG) |= ASQTRIG;
+}
+
+void SAPH_stopASQ(uint16_t baseAddress)
+{
+ HWREG16(baseAddress + OFS_SAPHASCTL0) |= ASQSTOP;
+}
+
+uint8_t SAPH_getASQPingCounter(uint16_t baseAddress)
+{
+ return HWREG8(baseAddress + OFS_SAPHASCTL0) & PNGCNT;
+}
+
+void SAPH_configureASQPing(uint16_t baseAddress, SAPH_configASQPingParam *config)
+{
+ HWREG16(baseAddress + OFS_SAPHAPOL) &= ~PCPOL;
+ HWREG16(baseAddress + OFS_SAPHAPOL) |= config->polarity;
+
+ HWREG16(baseAddress + OFS_SAPHAPLEV) &= ~PCPLEV;
+ HWREG16(baseAddress + OFS_SAPHAPLEV) |= config->pauseLevel;
+
+ HWREG16(baseAddress + OFS_SAPHAPHIZ) &= ~PCPHIZ;
+ HWREG16(baseAddress + OFS_SAPHAPHIZ) |= config->pauseHighImpedance;
+}
+
+void SAPH_configureASQTimeBase(uint16_t baseAddress, uint16_t prescalerStartValue)
+{
+ HWREG16(baseAddress + OFS_SAPHTBCTL) &= ~(PSSV);
+ HWREG16(baseAddress + OFS_SAPHTBCTL) |= prescalerStartValue;
+}
+
+void SAPH_startASQTimer(uint16_t baseAddress)
+{
+ HWREG16(baseAddress + OFS_SAPHTBCTL) |= TSTART;
+}
+
+void SAPH_stopASQTimer(uint16_t baseAddress)
+{
+ HWREG16(baseAddress + OFS_SAPHTBCTL) |= TSTOP;
+}
+
+void SAPH_clearASQTimer(uint16_t baseAddress)
+{
+ HWREG16(baseAddress + OFS_SAPHTBCTL) |= TCLR;
+}
+
+void SAPH_configureMode(uint16_t baseAddress, SAPH_configModeParam *config)
+{
+ HWREG16(baseAddress + OFS_SAPHMCNF) &= ~LPBE;
+ HWREG16(baseAddress + OFS_SAPHMCNF) |= config->lowPowerBiasMode;
+
+ HWREG16(baseAddress + OFS_SAPHMCNF) &= ~CPEO;
+ HWREG16(baseAddress + OFS_SAPHMCNF) |= config->chargePump;
+
+ HWREG16(baseAddress + OFS_SAPHMCNF) &= ~BIMP;
+ HWREG16(baseAddress + OFS_SAPHMCNF) |= config->biasImpedance;
+}
+
+void SAPH_enableLowPowerBiasMode(uint16_t baseAddress)
+{
+ HWREG16(baseAddress + OFS_SAPHMCNF) |= LPBE;
+}
+
+void SAPH_disableLowPowerBiasMode(uint16_t baseAddress)
+{
+ HWREG16(baseAddress + OFS_SAPHMCNF) &= ~LPBE;
+}
+
+void SAPH_enableChargePumpAlways(uint16_t baseAddress)
+{
+ HWREG16(baseAddress + OFS_SAPHMCNF) |= CPEO;
+}
+
+void SAPH_enableChargePumpOnAcquisitionOnly(uint16_t baseAddress)
+{
+ HWREG16(baseAddress + OFS_SAPHMCNF) &= ~CPEO;
+}
+
+void SAPH_setBiasGeneratorImpedance(uint16_t baseAddress, uint16_t biasImpedance)
+{
+ HWREG16(baseAddress + OFS_SAPHMCNF) &= ~BIMP;
+ HWREG16(baseAddress + OFS_SAPHMCNF) |= biasImpedance;
+}
+
+#endif
+//*****************************************************************************
+//
+//! Close the doxygen group for saph_api
+//! @}
+//
+//*****************************************************************************
+
diff --git a/Apps/FlightSoftware/MotorControl/driverlib/saph.h b/Apps/FlightSoftware/MotorControl/driverlib/saph.h
new file mode 100644
index 000000000..743bab43f
--- /dev/null
+++ b/Apps/FlightSoftware/MotorControl/driverlib/saph.h
@@ -0,0 +1,1119 @@
+/* --COPYRIGHT--,BSD
+ * Copyright (c) 2017, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * --/COPYRIGHT--*/
+//*****************************************************************************
+//
+// saph.h - Driver for the SAPH Module.
+//
+//*****************************************************************************
+
+#ifndef __MSP430WARE_SAPH_H__
+#define __MSP430WARE_SAPH_H__
+
+#include "inc/hw_memmap.h"
+
+#ifdef __MSP430_HAS_SAPH__
+
+//*****************************************************************************
+//
+// If building with a C++ compiler, make all of the definitions in this header
+// have a C binding.
+//
+//*****************************************************************************
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+//*****************************************************************************
+//
+// The following value specifies how many configurable channels in physcial
+// interface.
+//
+//*****************************************************************************
+#define SAPH_PHY_CHANNEL_COUNT 2
+
+typedef struct _phy_param {
+ //! Is the physical output channel to configure.
+ //! \n Valid values are:
+ //! - \b SAPH_PHY_CHANNEL_1
+ //! - \b SAPH_PHY_CHANNEL_2
+ uint16_t channel;
+ //! Is the channel output value.
+ //! \n Valid values are:
+ //! - \b SAPH_PHY_OUTPUT_HIGH
+ //! - \b SAPH_PHY_OUTPUT_LOW [Default]
+ uint16_t outputValue;
+ //! Is the channel output enable.
+ //! \n Valid values are:
+ //! - \b SAPH_PHY_OUTPUT_ENABLE
+ //! - \b SAPH_PHY_OUTPUT_DISABLE [Default]
+ uint16_t enableOutput;
+ //! Is the channel output full pull enable.
+ //! \n Valid values are:
+ //! - \b SAPH_PHY_FULLPULL_ENABLE
+ //! - \b SAPH_PHY_FULLPULL_DISABLE [Default]
+ uint16_t enableFullPull;
+ //! Is the channel output termination enable.
+ //! \n Valid values are:
+ //! - \b SAPH_PHY_TERMINATION_ENABLE
+ //! - \b SAPH_PHY_TERMINATION_DISABLE [Default]
+ uint16_t enableTermination;
+ //! Is the channel output functional select.
+ //! \n Valid values are:
+ //! - \b SAPH_PHY_OUTPUT_GENERAL_PURPOSE [Default]
+ //! - \b SAPH_PHY_OUTPUT_PULSEGENERATOR_SINGLE_DRIVE
+ //! - \b SAPH_PHY_OUTPUT_PULSEGENERATOR_DIFFERENTIAL_DRIVE
+ uint16_t outputFunction;
+ //! Is the channel pull up trim pattern.
+ uint16_t pullUpTrim;
+ //! Is the channel pull down trim pattern.
+ uint16_t pullDownTrim;
+ //! Is the channel termination trim pattern.
+ uint16_t terminationTrim;
+} SAPH_configPHYParam;
+
+typedef struct _phy_bias {
+ //! Selects the channel for excitation bias switch.
+ //! \n Valid values are:
+ //! - \b SAPH_PHY_BIAS_SWITCH_OPEN [Default]
+ //! - \b SAPH_PHY_BIAS_SWITCH_CLOSED
+ uint16_t biasSwitch[SAPH_PHY_CHANNEL_COUNT];
+ //! Selects PGA bias.
+ //! \n Valid values are:
+ //! - \b SAPH_PHY_PGA_BIAS_GROUNDED
+ //! - \b SAPH_PHY_PGA_BIAS_LOW_VALUE
+ //! - \b SAPH_PHY_PGA_BIAS_NOMINAL_VALUE
+ //! - \b SAPH_PHY_PGA_BIAS_HIGH_VALUE
+ uint16_t biasPGA;
+ //! Selects excitation bias.
+ //! \n Valid values are:
+ //! - \b SAPH_PHY_EXCITATION_BIAS_GROUNDED
+ //! - \b SAPH_PHY_EXCITATION_BIAS_LOW_VALUE
+ //! - \b SAPH_PHY_EXCITATION_BIAS_NOMINAL_VALUE
+ //! - \b SAPH_PHY_EXCITATION_BIAS_HIGH_VALUE
+ uint16_t biasExcitation;
+ //! Enables charge pump during acquisition.
+ //! \n Valid values are:
+ //! - \b SAPH_PHY_MULTIPLEXER_CHARGEPUMP_ENABLE
+ //! - \b SAPH_PHY_MULTIPLEXER_CHARGEPUMP_DISABLE
+ uint16_t enableChargePump;
+ //! Enables line input leakage compensation.
+ //! \n Valid values are:
+ //! - \b SAPH_PHY_LEAKAGE_COMPENSATION_ENABLE
+ //! - \b SAPH_PHY_LEAKAGE_COMPENSATION_DISABLE
+ uint16_t enableLeakageCompensation;
+ //! Selects PGA bias switch open or closed.
+ //! \n Valid values are:
+ //! - \b SAPH_PHY_PGA_BIAS_SWITCH_OPEN
+ //! - \b SAPH_PHY_PGA_BIAS_SWITCH_CLOSED
+ uint16_t biasSwitchPGA;
+ //! Select ASQ bias switch control.
+ //! \n Valid values are:
+ //! - \b SAPH_PHY_BIAS_SWITCH_CONTROLLED_BY_REGISTER
+ //! - \b SAPH_PHY_BIAS_SWITCH_CONTROLLED_BY_ASQ
+ uint16_t biasSwitchASQ;
+} SAPH_configPHYBiasParam;
+
+typedef struct _ppg_count
+{
+ //! Selects high impedance input.
+ //! \n Valid values are:
+ //! - \b SAPH_PPG_HIGH_IMPEDANCE_ON_PAUSE_OUTPUTDRIVE
+ //! - \b SAPH_PPG_HIGH_IMPEDANCE_ON_PAUSE_PLEV
+ uint16_t highImpedance;
+ //! Sets the pause level high or low.
+ //! \n Valid values are:
+ //! - \b SAPH_PPG_PAUSE_LEVEL_LOW
+ //! - \b SAPH_PPG_PAUSE_LEVEL_HIGH
+ uint16_t pauseLevel;
+ //! Sets the pause polarity high or low.
+ //! \n Valid values are:
+ //! - \b SAPH_PPG_PAUSE_POLARITY_HIGH
+ //! - \b SAPH_PPG_PAUSE_POLARITY_LOW
+ uint16_t pausePolarity;
+ //! Sets the stop pulse count.
+ uint16_t stopPauseCount;
+ //! Sets the excitation pulse count.
+ uint16_t excitationPulseCount;
+} SAPH_configPPGCountParam;
+
+typedef struct _ppg_config
+{
+ //! Enables PPG prescaler.
+ //! \n Valid values are:
+ //! - \b SAPH_PPG_PRESCALER_ENABLE
+ //! - \b SAPH_PPG_PRESCALER_DISABLE
+ uint16_t enablePrescaler;
+ //! Selects PPG trigger source.
+ //! \n Valid values are:
+ //! - \b SAPH_PPG_TRIGGER_SOURCE_SOFTWARE
+ //! - \b SAPH_PPG_TRIGGER_SOURCE_ASQ
+ //! - \b SAPH_PPG_TRIGGER_SOURCE_TIMER
+ uint16_t triggerSource;
+ //! Selects PPG channel.
+ //! \n Valid values are:
+ //! - \b SAPH_PPG_CHANNEL_0
+ //! - \b SAPH_PPG_CHANNEL_1
+ uint16_t channelSelect;
+ //! Selects PPG or ASEQ in charge of PHY port.
+ //! \n Valid values are:
+ //! - \b SAPH_PPG_PORT_CHARGED_BY_PPG
+ //! - \b SAPH_PPG_PORT_CHARGED_BY_ASEQ
+ uint16_t portSelect;
+} SAPH_configPPGParam;
+
+typedef struct _asq_config
+{
+ //! Enables ASQ abort on errors if the conversion result is outside of expected
+ //! value or an overflow/underflow condition occured.
+ //! \n Valid values are:
+ //! - \b SAPH_ASQ_ABORT_ON_ERROR_ENABLE
+ //! - \b SAPH_ASQ_ABORT_ON_ERROR_DISABLE
+ uint16_t abortOnError;
+ //! Selects ASQ trigger source.
+ //! \n Valid values are:
+ //! - \b SAPH_ASQ_TRIGGER_SOURCE_SOFTWARE
+ //! - \b SAPH_ASQ_TRIGGER_SOURCE_P_SEQUENCER
+ //! - \b SAPH_ASQ_TRIGGER_SOURCE_TIMER
+ uint16_t triggerSource;
+ //! Selects ASQ channel.
+ //! \n Valid values are:
+ //! - \b SAPH_ASQ_CHANNEL_0
+ //! - \b SAPH_ASQ_CHANNEL_1
+ uint16_t channelSelect;
+ //! Selects pwn channel or opposite side channel to receive.
+ //! \n Valid values are:
+ //! - \b SAPH_ASQ_IDENTICAL_CHANNEL
+ //! - \b SAPH_ASQ_DIFFERENT_CHANNEL
+ uint16_t sideOfChannel;
+ //! Selects standby indication.
+ //! \n Valid values are:
+ //! - \b SAPH_ASQ_STANDBY_INDICATION_POWEROFF
+ //! - \b SAPH_ASQ_STANDBY_INDICATION_STANDBY
+ uint16_t standByIndication;
+ //! Requests OFF in the end of sequence.
+ //! \n Valid values are:
+ //! - \b SAPH_ASQ_END_OF_SEQUENCE_OFF_DISABLE
+ //! - \b SAPH_ASQ_END_OF_SEQUENCE_OFF_ENABLE
+ uint16_t endOfSequence;
+ //! Selects early receive bias generating source.
+ //! \n Valid values are:
+ //! - \b SAPH_ASQ_EARLY_RECEIVE_BIAS_BY_TIMEMARK_C
+ //! - \b SAPH_ASQ_EARLY_RECEIVE_BIAS_BY_TIMEMARK_A
+ uint16_t earlyReceiveBias;
+ //! Enables channel toggle.
+ //! \n Valid values are:
+ //! - \b SAPH_ASQ_TOGGLE_CHANNEL_ENABLE
+ //! - \b SAPH_ASQ_TOGGLE_CHANNEL_DISABLE
+ uint16_t enableChannelToggle;
+} SAPH_configASQParam;
+
+typedef struct _asq_ping_config
+{
+ //! Sets ASQ ping counter for polarity.
+ uint16_t polarity;
+ //! Sets ASQ ping counter for pause level.
+ uint16_t pauseLevel;
+ //! Sets ASQ ping counter for high impedance.
+ uint16_t pauseHighImpedance;
+} SAPH_configASQPingParam;
+
+typedef struct _mcnf_config
+{
+ //! Enables/disables low power bias operation mode.
+ //! \n Valid values are:
+ //! - \b SAPH_LOW_POWER_BIAS_MODE_DISABLE [Default]
+ //! - \b SAPH_LOW_POWER_BIAS_MODE_ENABLE
+ uint16_t lowPowerBiasMode;
+ //! Enables/disables charge pump of the input multiplexer.
+ //! \n Valid values are:
+ //! - \b SAPH_CHARGE_PUMP_ON_SDHS_ASQ_REQUESTS_ONLY [Default]
+ //! - \b SAPH_CHARGE_PUMP_ON_ALWAYS
+ uint16_t chargePump;
+ //! Sets bias impedance for RxBias and TxBias.
+ //! \n Valid values are:
+ //! - \b SAPH_MCNF_500_OHMS_RXBIAS_450_OHMS_TXBIAS
+ //! - \b SAPH_MCNF_900_OHMS_RXBIAS_850_OHMS_TXBIAS
+ //! - \b SAPH_MCNF_1500_OHMS_RXBIAS_1450_OHMS_TXBIAS [Default]
+ //! - \b SAPH_MCNF_2950_OHMS_RXBIAS_2900_OHMS_TXBIAS
+ uint16_t biasImpedance;
+} SAPH_configModeParam;
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the mask parameter for
+// functions: SAPH_clearInterrupt(), SAPH_enableInterrupt(), and
+// SAPH_disableInterrupt() as well as returned by the
+// SAPH_getInterruptStatus() function.
+//
+//*****************************************************************************
+#define SAPH_DATA_ERROR_INTERRUPT DATAERR
+#define SAPH_TIMEMARK_F_TIMEOUT_INTERRUPT TMFTO
+#define SAPH_ACQUISITION_SEQUENCER_DONE_INTERRUPT SEQDN
+#define SAPH_PING_TRANSMIT_DONE_INTERRUPT PNGDN
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the config parameter for
+// functions: SAPH_configurePHY().
+//
+//*****************************************************************************
+#define SAPH_PHY_CHANNEL_1 0
+#define SAPH_PHY_CHANNEL_2 1
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the config parameter for
+// functions: SAPH_configurePHY().
+//
+//*****************************************************************************
+#define SAPH_PHY_OUTPUT_HIGH CH0OUT_1
+#define SAPH_PHY_OUTPUT_LOW CH0OUT_0
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the config parameter for
+// functions: SAPH_configurePHY().
+//
+//*****************************************************************************
+#define SAPH_PHY_OUTPUT_ENABLE CH0OE_1
+#define SAPH_PHY_OUTPUT_DISABLE CH0OE_0
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the config parameter for
+// functions: SAPH_configurePHY().
+//
+//*****************************************************************************
+#define SAPH_PHY_FULLPULL_ENABLE CH0FP_1
+#define SAPH_PHY_FULLPULL_DISABLE CH0FP_0
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the config parameter for
+// functions: SAPH_configurePHY().
+//
+//*****************************************************************************
+#define SAPH_PHY_TERMINATION_ENABLE CH0TERM_1
+#define SAPH_PHY_TERMINATION_DISABLE CH0TERM_0
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the config parameter for
+// functions: SAPH_configurePHY().
+//
+//*****************************************************************************
+#define SAPH_PHY_OUTPUT_GENERAL_PURPOSE PCH0SEL_0
+#define SAPH_PHY_OUTPUT_PULSEGENERATOR_SINGLE_DRIVE PCH0SEL_1
+#define SAPH_PHY_OUTPUT_PULSEGENERATOR_DIFFERENTIAL_DRIVE PCH0SEL_2
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the enableDummyLoad parameter
+// for functions: SAPH_configurePHYMultiplexer().
+//
+//*****************************************************************************
+#define SAPH_PHY_DUMMYLOAD_ENABLE DUMEN_1
+#define SAPH_PHY_DUMMYLOAD_DISABLE DUMEN_0
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the sourceControl parameter
+// for functions: SAPH_configurePHYMultiplexer().
+//
+//*****************************************************************************
+#define SAPH_PHY_SOURCE_CONTROLLED_BY_REGISTER MUXCTL_0
+#define SAPH_PHY_SOURCE_CONTROLLED_BY_ASQ MUXCTL_1
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the inputChannel parameter
+// for functions: SAPH_configurePHYMultiplexer().
+//
+//*****************************************************************************
+#define SAPH_PHY_INPUT_CHANNEL_0 MUXSEL__CH0IN
+#define SAPH_PHY_INPUT_CHANNEL_1 MUXSEL__CH1IN
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the config parameter for
+// functions: SAPH_configurePHYBias().
+//
+//*****************************************************************************
+#define SAPH_PHY_BIAS_SWITCH_OPEN CH0EBSW_0
+#define SAPH_PHY_BIAS_SWITCH_CLOSED CH0EBSW_1
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the config parameter for
+// functions: SAPH_configurePHYBias().
+//
+//*****************************************************************************
+#define SAPH_PHY_PGA_BIAS_GROUNDED PGABIAS_0
+#define SAPH_PHY_PGA_BIAS_LOW_VALUE PGABIAS_1
+#define SAPH_PHY_PGA_BIAS_NOMINAL_VALUE PGABIAS_2
+#define SAPH_PHY_PGA_BIAS_HIGH_VALUE PGABIAS_3
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the config parameter for
+// functions: SAPH_configurePHYBias().
+//
+//*****************************************************************************
+#define SAPH_PHY_EXCITATION_BIAS_GROUNDED EXCBIAS_0
+#define SAPH_PHY_EXCITATION_BIAS_LOW_VALUE EXCBIAS_1
+#define SAPH_PHY_EXCITATION_BIAS_NOMINAL_VALUE EXCBIAS_2
+#define SAPH_PHY_EXCITATION_BIAS_HIGH_VALUE EXCBIAS_3
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the config parameter for
+// functions: SAPH_configurePHYBias().
+//
+//*****************************************************************************
+#define SAPH_PHY_MULTIPLEXER_CHARGEPUMP_ENABLE CPDA_1
+#define SAPH_PHY_MULTIPLEXER_CHARGEPUMP_DISABLE CPDA_0
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the config parameter for
+// functions: SAPH_configurePHYBias().
+//
+//*****************************************************************************
+#define SAPH_PHY_LEAKAGE_COMPENSATION_ENABLE LILC_1
+#define SAPH_PHY_LEAKAGE_COMPENSATION_DISABLE LILC_0
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the config parameter for
+// functions: SAPH_configurePHYBias().
+//
+//*****************************************************************************
+#define SAPH_PHY_PGA_BIAS_SWITCH_OPEN PGABSW_0
+#define SAPH_PHY_PGA_BIAS_SWITCH_CLOSED PGABSW_1
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the config parameter for
+// functions: SAPH_configurePHYBias().
+//
+//*****************************************************************************
+#define SAPH_PHY_BIAS_SWITCH_CONTROLLED_BY_REGISTER ASQBSC_0
+#define SAPH_PHY_BIAS_SWITCH_CONTROLLED_BY_ASQ ASQBSC_1
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the config parameter for
+// functions: SAPH_configurePPGCount().
+//
+//*****************************************************************************
+#define SAPH_PPG_HIGH_IMPEDANCE_ON_PAUSE_HIGH PHIZ_1
+#define SAPH_PPG_HIGH_IMPEDANCE_ON_PAUSE_LOW PHIZ_0
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the config parameter for
+// functions: SAPH_configurePPGCount().
+//
+//*****************************************************************************
+#define SAPH_PPG_PAUSE_LEVEL_HIGH PLEV_1
+#define SAPH_PPG_PAUSE_LEVEL_LOW PLEV_0
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the config parameter for
+// functions: SAPH_configurePPGCount().
+//
+//*****************************************************************************
+#define SAPH_PPG_PAUSE_POLARITY_HIGH PPOL_0
+#define SAPH_PPG_PAUSE_POLARITY_LOW PPOL_1
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the config parameter for
+// functions: SAPH_configurePPG().
+//
+//*****************************************************************************
+#define SAPH_PPG_PRESCALER_ENABLE PSCEN_1
+#define SAPH_PPG_PRESCALER_DISABLE PSCEN_0
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the config parameter for
+// functions: SAPH_configurePPG().
+//
+//*****************************************************************************
+#define SAPH_PPG_TRIGGER_SOURCE_SOFTWARE TRSEL_0
+#define SAPH_PPG_TRIGGER_SOURCE_ASQ TRSEL_1
+#define SAPH_PPG_TRIGGER_SOURCE_TIMER TRSEL_2
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the config parameter for
+// functions: SAPH_configurePPG().
+//
+//*****************************************************************************
+#define SAPH_PPG_CHANNEL_0 PPGCHSEL_0
+#define SAPH_PPG_CHANNEL_1 PPGCHSEL_1
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the config parameter for
+// functions: SAPH_configurePPG().
+//
+//*****************************************************************************
+#define SAPH_PPG_PORT_CHARGED_BY_PPG PGSEL_0
+#define SAPH_PPG_PORT_CHARGED_BY_ASEQ PGSEL_1
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the config parameter for
+// functions: SAPH_configureASQ().
+//
+//*****************************************************************************
+#define SAPH_ASQ_ABORT_ON_ERROR_ENABLE ERABRT_1
+#define SAPH_ASQ_ABORT_ON_ERROR_DISABLE ERABRT_0
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the config parameter for
+// functions: SAPH_configureASQ().
+//
+//*****************************************************************************
+#define SAPH_ASQ_TRIGGER_SOURCE_SOFTWARE TRIGSEL__SWTRIG
+#define SAPH_ASQ_TRIGGER_SOURCE_P_SEQUENCER TRIGSEL__PSQ
+#define SAPH_ASQ_TRIGGER_SOURCE_TIMER TRIGSEL__TIMER
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the config parameter for
+// functions: SAPH_configureASQ().
+//
+//*****************************************************************************
+#define SAPH_ASQ_CHANNEL_0 ASQCHSEL_0
+#define SAPH_ASQ_CHANNEL_1 ASQCHSEL_1
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the config parameter for
+// functions: SAPH_configureASQ().
+//
+//*****************************************************************************
+#define SAPH_ASQ_DIFFERENT_CHANNEL CHOWN_0
+#define SAPH_ASQ_IDENTICAL_CHANNEL CHOWN_1
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the config parameter for
+// functions: SAPH_configureASQ().
+//
+//*****************************************************************************
+#define SAPH_ASQ_STANDBY_INDICATION_POWEROFF STDBY__PWROFF
+#define SAPH_ASQ_STANDBY_INDICATION_STANDBY STDBY__STDBY
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the config parameter for
+// functions: SAPH_configureASQ().
+//
+//*****************************************************************************
+#define SAPH_ASQ_END_OF_SEQUENCE_OFF_DISABLE ESOFF_0
+#define SAPH_ASQ_END_OF_SEQUENCE_OFF_ENABLE ESOFF_1
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the config parameter for
+// functions: SAPH_configureASQ().
+//
+//*****************************************************************************
+#define SAPH_ASQ_EARLY_RECEIVE_BIAS_BY_TIMEMARK_C EARLYRB_0
+#define SAPH_ASQ_EARLY_RECEIVE_BIAS_BY_TIMEMARK_A EARLYRB_1
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the config parameter for
+// functions: SAPH_configureASQ().
+//
+//*****************************************************************************
+#define SAPH_ASQ_TOGGLE_CHANNEL_ENABLE CHTOG_1
+#define SAPH_ASQ_TOGGLE_CHANNEL_DISABLE CHTOG_0
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the config parameter for
+// functions: SAPH_configureMode().
+//
+//*****************************************************************************
+#define SAPH_LOW_POWER_BIAS_MODE_DISABLE LPBE_0
+#define SAPH_LOW_POWER_BIAS_MODE_ENABLE LPBE_1
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the config parameter for
+// functions: SAPH_configureMode().
+//
+//*****************************************************************************
+#define SAPH_CHARGE_PUMP_ON_SDHS_ASQ_REQUESTS_ONLY CPEO_0
+#define SAPH_CHARGE_PUMP_ON_ALWAYS CPEO_1
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the config parameter for
+// functions: SAPH_configureMode().
+//
+//*****************************************************************************
+#define SAPH_MCNF_500_OHMS_RXBIAS_450_OHMS_TXBIAS BIMP_0
+#define SAPH_MCNF_900_OHMS_RXBIAS_850_OHMS_TXBIAS BIMP_1
+#define SAPH_MCNF_1500_OHMS_RXBIAS_1450_OHMS_TXBIAS BIMP_2
+#define SAPH_MCNF_2950_OHMS_RXBIAS_2900_OHMS_TXBIAS BIMP_3
+
+//*****************************************************************************
+//
+// Prototypes for the APIs.
+//
+//*****************************************************************************
+
+//*****************************************************************************
+//
+//! \brief Unlocks certain SAPH registers.
+//!
+//! Unlock SAPH registers with offset address of 0xF or higher. IIDX, MIS, RIS,
+//! IMSC, ICR, ISR, DESCLO, and DESCHI registers are not affected and the
+//! registers are not locked. Utilize this function if those registers need to
+//! be modified.
+//! \n\b NOTE: Most of the SAPH APIs will not work unless SAPH is unlocked.
+//!
+//! \param baseAddress is the base address of the SAPH module.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void SAPH_unlock(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Locks certain SAPH registers.
+//!
+//! Locks SAPH registers with offset address of 0xF or higher. IIDX, MIS, RIS,
+//! IMSC, ICR, ISR, DESCLO, and DESCHI registers are not affected and the
+//! registers are not locked. Utilize this function after SAPH_unlock()
+//! after necessary registers have been modified.
+//! SAPH registers, with the exception of the list in paragraph above, are
+//! locked by default.
+//!
+//! \param baseAddress is the base address of the SAPH module.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void SAPH_lock(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Clears SAPH interrupts.
+//!
+//! The SAPH interrupt source is cleared, so that it no longer asserts. If the
+//! interrupt is not enabled, the corresponding bit in the RIS register bit will
+//! be cleared. If the interrupt is enabled, the corresponding bit both MIS and
+//! RIS registers will be both cleared.
+//!
+//! \param baseAddress is the base address of the SAPH module.
+//! \param mask is the logical OR of any of the following:
+//! - \b SAPH_DATA_ERROR_INTERRUPT - SAPH data error interrupt
+//! - \b SAPH_TIMEMARK_F_TIMEOUT_INTERRUPT - SAPH TMF time out interrupt
+//! - \b SAPH_ACQUISITION_SEQUENCER_DONE_INTERRUPT - SAPH acquistion sequencer done interrupt
+//! - \b SAPH_PING_TRANSMIT_DONE_INTERRUPT - SAPH ping transmit done interrupt
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void SAPH_clearInterrupt(uint16_t baseAddress, uint8_t mask);
+
+//*****************************************************************************
+//
+//! \brief Enables SAPH interrupts.
+//!
+//! Enables the indicated SAPH interrupt sources. Only the sources that are
+//! enabled can be reflected to the processor interrupt; disabled sources have
+//! no effect on the processor. Does not clear interrupt flags.
+//!
+//! \param baseAddress is the base address of the SAPH module.
+//! \param mask is the logical OR of any of the following:
+//! - \b SAPH_DATA_ERROR_INTERRUPT - SAPH data error interrupt
+//! - \b SAPH_TIMEMARK_F_TIMEOUT_INTERRUPT - SAPH TMF time out interrupt
+//! - \b SAPH_ACQUISITION_SEQUENCER_DONE_INTERRUPT - SAPH acquistion sequencer done interrupt
+//! - \b SAPH_PING_TRANSMIT_DONE_INTERRUPT - SAPH ping transmit done interrupt
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void SAPH_enableInterrupt(uint16_t baseAddress, uint8_t mask);
+
+//*****************************************************************************
+//
+//! \brief Disables selected SAPH interrupt sources.
+//!
+//! Disables the indicated SAPH interrupt sources. Only the sources that are
+//! enabled can be reflected to the processor interrupt; disabled sources have
+//! no effect on the processor.
+//!
+//! \param baseAddress is the base address of the SAPH module.
+//! \param mask is the logical OR of any of the following:
+//! - \b SAPH_DATA_ERROR_INTERRUPT - SAPH data error interrupt
+//! - \b SAPH_TIMEMARK_F_TIMEOUT_INTERRUPT - SAPH TMF time out interrupt
+//! - \b SAPH_ACQUISITION_SEQUENCER_DONE_INTERRUPT - SAPH acquistion sequencer done interrupt
+//! - \b SAPH_PING_TRANSMIT_DONE_INTERRUPT - SAPH ping transmit done interrupt
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void SAPH_disableInterrupt(uint16_t baseAddress, uint8_t mask);
+
+//*****************************************************************************
+//
+//! \brief Gets the current SAPH interrupt status.
+//!
+//! This returns the interrupt status for the SAPH module based on which flag
+//! is passed.
+//!
+//! \param baseAddress is the base address of the SAPH module.
+//! \param mask is the logical OR of any of the following:
+//! - \b SAPH_DATA_ERROR_INTERRUPT - SAPH data error interrupt
+//! - \b SAPH_TIMEMARK_F_TIMEOUT_INTERRUPT - SAPH TMF time out interrupt
+//! - \b SAPH_ACQUISITION_SEQUENCER_DONE_INTERRUPT - SAPH acquistion sequencer done interrupt
+//! - \b SAPH_PING_TRANSMIT_DONE_INTERRUPT - SAPH ping transmit done interrupt
+//!
+//! \return Logical OR of any of the following:
+//! - \b SAPH_DATA_ERROR_INTERRUPT - SAPH data error interrupt
+//! - \b SAPH_TIMEMARK_F_TIMEOUT_INTERRUPT - SAPH TMF time out interrupt
+//! - \b SAPH_ACQUISITION_SEQUENCER_DONE_INTERRUPT - SAPH acquistion sequencer done interrupt
+//! - \b SAPH_PING_TRANSMIT_DONE_INTERRUPT - SAPH ping transmit done interrupt
+//
+//*****************************************************************************
+extern uint8_t SAPH_getInterruptStatus(uint16_t baseAddress, uint8_t mask);
+
+//*****************************************************************************
+//
+//! \brief Configures physical interface output and trim values.
+//!
+//! This configures SAPH physical interface:
+//! - channel output
+//! - channel related trim values
+//!
+//! \param baseAddress is the base address of the SAPH module.
+//! \param config is the pointer to the struct for physical interface configuration.
+//!
+//! \return None
+//!
+//*****************************************************************************
+extern void SAPH_configurePHY(uint16_t baseAddress, SAPH_configPHYParam *config);
+
+//*****************************************************************************
+//
+//! \brief Configures physical interface multiplexer.
+//!
+//! This configures SAPH physical interface mutliplexer for dummy load, channel
+//! multiplexer source control and input channel selection.
+//!
+//! \param baseAddress is the base address of the SAPH module.
+//! \param enableDummyLoad indicates whether to enable/disable dummy load on non-
+//! selected multiplexer inputs.
+//! Valid values are:
+//! - \b SAPH_PHY_DUMMYLOAD_ENABLE
+//! - \b SAPH_PHY_DUMMYLOAD_DISABLE [Default]
+//! \param sourceControl selects which controls the multiplexer.
+//! Valid values are:
+//! - \b SAPH_PHY_SOURCE_CONTROLLED_BY_REGISTER [Default]
+//! - \b SAPH_PHY_SOURCE_CONTROLLED_BY_ASQ
+//! \param inputChannel selects input channel.
+//! Valid values are:
+//! - \b SAPH_PHY_INPUT_CHANNEL_0 [Default]
+//! - \b SAPH_PHY_INPUT_CHANNEL_1
+//!
+//! \return None
+//!
+//*****************************************************************************
+extern void SAPH_configurePHYMultiplexer(uint16_t baseAddress,
+ uint16_t enableDummyLoad, uint16_t sourceControl, uint16_t inputChannel);
+
+//*****************************************************************************
+//
+//! \brief Configures physical interface bias.
+//!
+//! This configures SAPH physical interface bias parameters:
+//! - excitation bias switch
+//! - PGA bias
+//! - excitation bias
+//! - charge pump
+//! - line input leakage
+//! - compensation
+//! - ASQ bias
+//!
+//! \param baseAddress is the base address of the SAPH module.
+//! \param config is the pointer to the struct for physical interface bias configuration.
+//!
+//! \return None
+//!
+//*****************************************************************************
+extern void SAPH_configurePHYBias(uint16_t baseAddress,
+ SAPH_configPHYBiasParam *config);
+
+//*****************************************************************************
+//
+//! \brief Configures pulse generator count.
+//!
+//! This configures SAPH pulse generator count:
+//! - high impedance
+//! - pause level
+//! - pause polarity
+//! - stop pulse
+//! - excitation pulse
+//!
+//! \param baseAddress is the base address of the SAPH module.
+//! \param config is the pointer to the struct for pulse generator count configuration.
+//!
+//! \return None
+//!
+//*****************************************************************************
+extern void SAPH_configurePPGCount(uint16_t baseAddress,
+ SAPH_configPPGCountParam *config);
+
+//*****************************************************************************
+//
+//! \brief Sets pulse generator low period.
+//!
+//! The low phase of period of generator pulses defines the length of low phase
+//! of the pulses in units of high speed clocks. The minimum count is two regardless
+//! of the value set in this register.
+//!
+//! \param baseAddress is the base address of the SAPH module.
+//! \param period is the low period value to set.
+//!
+//! \return None
+//!
+//*****************************************************************************
+extern void SAPH_setPPGLowPeriod(uint16_t baseAddress, uint16_t period);
+
+//*****************************************************************************
+//
+//! \brief Sets pulse generator high period.
+//!
+//! The high phase of period of generator pulses defines the length of high phase
+//! of the pulses in units of high speed clocks. The minimum count is two regardless
+//! of the value set in this register.
+//!
+//! \param baseAddress is the base address of the SAPH module.
+//! \param period is the high period value to set.
+//!
+//! \return None
+//!
+//*****************************************************************************
+extern void SAPH_setPPGHighPeriod(uint16_t baseAddress, uint16_t period);
+
+//*****************************************************************************
+//
+//! \brief Configures pulse generator.
+//!
+//! This configures SAPH pulse generator:
+//! - trigger source
+//! - prescaler enable
+//! - channel select
+//! - control select
+//!
+//! \param baseAddress is the base address of the SAPH module.
+//! \param config is the pointer to the struct for pulse generator configuration.
+//!
+//! \return None
+//!
+//*****************************************************************************
+extern void SAPH_configurePPG(uint16_t baseAddress, SAPH_configPPGParam *config);
+
+//*****************************************************************************
+//
+//! \brief Triggers pulse generator.
+//!
+//! This function triggers the pulse generator if SAPH_PPG_TRIGGER_SOURCE_SOFTWARE
+//! is selected as the trigger sourcce.
+//!
+//! \param baseAddress is the base address of the SAPH module.
+//!
+//! \return None
+//!
+//*****************************************************************************
+extern void SAPH_triggerPPG(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Stops pulse generator.
+//!
+//! \param baseAddress is the base address of the SAPH module.
+//!
+//! \return None
+//!
+//*****************************************************************************
+extern void SAPH_stopPPG(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Configures acquisition sequencer.
+//!
+//! This configures SAPH acquisition sequencer:
+//! - trigger source
+//! - abort-on-error control
+//! - channel select
+//! - side of channel to receive
+//! - standby indication
+//! - OFF at end-of-sequence
+//! - early receive bias
+//! - channel toggle
+//!
+//! \param baseAddress is the base address of the SAPH module.
+//! \param config is the pointer to the struct for acquisition sequencer configuration.
+//!
+//! \return None
+//!
+//*****************************************************************************
+extern void SAPH_configureASQ(uint16_t baseAddress, SAPH_configASQParam *config);
+
+//*****************************************************************************
+//
+//! \brief Triggers acquisition sequencer.
+//!
+//! This function triggers the acquisition sequencer if SAPH_ASQ_TRIGGER_SOURCE_SOFTWARE
+//! is selected as the trigger sourcce.
+//!
+//! \param baseAddress is the base address of the SAPH module.
+//!
+//! \return None
+//!
+//*****************************************************************************
+extern void SAPH_triggerASQ(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Stops acquisition sequencer.
+//!
+//! \param baseAddress is the base address of the SAPH module.
+//!
+//! \return None
+//!
+//*****************************************************************************
+extern void SAPH_stopASQ(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Gets ping counter of acquisition sequencer.
+//!
+//! This function returns ping counter which represents the number of acquistion
+//! turns regardless if up/down direction is changed. The acquistion stops if
+//! this count decrements from zero.
+//!
+//! \param baseAddress is the base address of the SAPH module.
+//!
+//! \return None
+//!
+//*****************************************************************************
+extern uint8_t SAPH_getASQPingCounter(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Configures acquisition sequencer ping parameters.
+//!
+//! This configures SAPH acquisition sequencer ping:
+//! - output polarity
+//! - pause level
+//! - pause impedance
+//!
+//! \param baseAddress is the base address of the SAPH module.
+//! \param config is the pointer to the struct for acquisition sequencer ping
+//! configuration.
+//!
+//! \return None
+//!
+//*****************************************************************************
+extern void SAPH_configureASQPing(uint16_t baseAddress,
+ SAPH_configASQPingParam *config);
+
+//*****************************************************************************
+//
+//! \brief Configures acquisition sequencer time base parameters.
+//!
+//! This configures SAPH acquisition sequencer time base parameters:
+//! - power state
+//! - prescaler start value
+//!
+//! \param baseAddress is the base address of the SAPH module.
+//! \param prescalerStartValue is the ASQ prescaler start value.
+//!
+//! \return None
+//!
+//*****************************************************************************
+extern void SAPH_configureASQTimeBase(uint16_t baseAddress,
+ uint16_t prescalerStartValue);
+
+//*****************************************************************************
+//
+//! \brief Starts acquisition timer.
+//!
+//! \param baseAddress is the base address of the SAPH module.
+//!
+//! \return None
+//!
+//*****************************************************************************
+extern void SAPH_startASQTimer(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Stops acquisition timer.
+//!
+//! \param baseAddress is the base address of the SAPH module.
+//!
+//! \return None
+//!
+//*****************************************************************************
+extern void SAPH_stopASQTimer(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Clears acquisition timer.
+//!
+//! \param baseAddress is the base address of the SAPH module.
+//!
+//! \return None
+//!
+//*****************************************************************************
+extern void SAPH_clearASQTimer(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Configures certain mode configuration parameters.
+//!
+//! This configures SAPH:
+//! - bias generator impedance
+//! - charge pump enable timing
+//! - low power bias mode
+//! \n\b NOTE: This will modify all elements of SAPH mode configuration register. If there are elements not specified in the config parameter, the register values will be cleared. There are other SAPH functions to modify these features individually.
+//!
+//! \param baseAddress is the base address of the SAPH module.
+//! \param config is the pointer to the struct for mode configuration.
+//!
+//! \return None
+//!
+//*****************************************************************************
+extern void SAPH_configureMode(uint16_t baseAddress,
+ SAPH_configModeParam *config);
+
+//*****************************************************************************
+//
+//! \brief Enables low power bias operation mode.
+//!
+//! In this mode, the SAPH acquisition sequencer (ASQ) uses the CHxEBSW and PGABSW as auxiliary values to achieve faster channel setting on reactive input loads. The ASQ has full controls over the bias switch multiplexer.
+//! \n\b NOTE: Avoid changing operation mode unless PSQ is in OFF state. Otherwise, it can cause corrupt measurement results and irregular triggers of sub modules by ASQ.
+//!
+//! \param baseAddress is the base address of the SAPH module.
+//!
+//! \return None
+//!
+//*****************************************************************************
+extern void SAPH_enableLowPowerBiasMode(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Disables low power bias operation mode.
+//!
+//! Enters manual bias mode and regular ASQ bias mode. In this configuration, the user controls by the ASQBSW has full control over TxBias and RxBias switches.
+//! \n\b NOTE: Avoid changing operation mode unless PSQ is in OFF state. Otherwise, it can cause corrupt measurement results and irregular triggers of sub modules by ASQ.
+//!
+//! \param baseAddress is the base address of the SAPH module.
+//!
+//! \return None
+//!
+//*****************************************************************************
+extern void SAPH_disableLowPowerBiasMode(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Keeps charge pump of the input multiplexer always on.
+//!
+//! The charge pump of the input multiplexer is on regardless of SDHS and ASQ requests. This setting will override other USS charge pump settings elsewhere.
+//!
+//! \param baseAddress is the base address of the SAPH module.
+//!
+//! \return None
+//!
+//*****************************************************************************
+extern void SAPH_enableChargePumpAlways(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Charge pump of input multiplexer is only turned on by data acquisition.
+//!
+//! The charge pump of the input multiplexer is turned on by SDHS and ASQ related requests only. This will also require the charge pump to be enabled explicitly through other methods [controlled by CPDA bit or SAPH_configurePHYBias()] in the SAPH module.
+//!
+//! \param baseAddress is the base address of the SAPH module.
+//!
+//! \return None
+//!
+//*****************************************************************************
+extern void SAPH_enableChargePumpOnAcquisitionOnly(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Sets impedance of the buffers for RxBias and TxBias.
+//!
+//! While for resistive loads the lowest impedance shows the fastest settling; this is not the case for reactive loads.
+//!
+//! \param baseAddress is the base address of the SAPH module.
+//! \param biasImpedance sets bias impedance for RxBias and TxBias.
+//! Valid values are:
+//! - \b SAPH_MCNF_500_OHMS_RXBIAS_450_OHMS_TXBIAS
+//! - \b SAPH_MCNF_900_OHMS_RXBIAS_850_OHMS_TXBIAS
+//! - \b SAPH_MCNF_1500_OHMS_RXBIAS_1450_OHMS_TXBIAS [Default]
+//! - \b SAPH_MCNF_2950_OHMS_RXBIAS_2900_OHMS_TXBIAS
+//!
+//! \return None
+//!
+//*****************************************************************************
+extern void SAPH_setBiasGeneratorImpedance(uint16_t baseAddress, uint16_t biasImpedance);
+
+//*****************************************************************************
+//
+// Mark the end of the C bindings section for C++ compilers.
+//
+//*****************************************************************************
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+#endif // __MSP430WARE_SAPH_H__
+
diff --git a/Apps/FlightSoftware/MotorControl/driverlib/sdhs.c b/Apps/FlightSoftware/MotorControl/driverlib/sdhs.c
new file mode 100644
index 000000000..4b483f673
--- /dev/null
+++ b/Apps/FlightSoftware/MotorControl/driverlib/sdhs.c
@@ -0,0 +1,199 @@
+/* --COPYRIGHT--,BSD
+ * Copyright (c) 2017, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * --/COPYRIGHT--*/
+//*****************************************************************************
+//
+// sdhs.c - Driver for the SDHS Module.
+//
+//*****************************************************************************
+
+//*****************************************************************************
+//
+//! \addtogroup sdhs_api sdhs
+//! @{
+//
+//*****************************************************************************
+
+#include "inc/hw_memmap.h"
+
+#ifdef __MSP430_HAS_SDHS__
+#include "sdhs.h"
+
+#include
+
+void SDHS_init(uint16_t baseAddress, SDHS_initParam *param)
+{
+ //Unlock Registers
+ HWREG16(baseAddress + OFS_SDHSCTL3) &= ~TRIGEN;
+ HWREG16(baseAddress + OFS_SDHSCTL5) &= ~SDHS_LOCK;
+
+ //Set SDHS Control 0
+ HWREG16(baseAddress + OFS_SDHSCTL0) =
+ param->triggerSourceSelect
+ | param->msbShift
+ | param->outputBitResolution
+ | param->dataFormat
+ | param->dataAlignment
+ | param->interruptDelayGeneration
+ | param->autoSampleStart;
+
+ //Set SDHS Control 1
+ HWREG16(baseAddress + OFS_SDHSCTL1) = param->oversamplingRate;
+
+ //Set SDHS Control 2
+ HWREG16(baseAddress + OFS_SDHSCTL2) =
+ param->dataTransferController
+ | param->windowComparator
+ | param->sampleSizeCounting;
+}
+
+void SDHS_setWindowComp(uint16_t baseAddress, uint16_t highThreshold,
+ uint16_t lowThreshold)
+{
+ uint16_t saveCTL3 = HWREG16(baseAddress + OFS_SDHSCTL3);
+ uint16_t saveCTL5 = HWREG16(baseAddress + OFS_SDHSCTL5);
+
+ //Unlock Registers
+ HWREG16(baseAddress + OFS_SDHSCTL3) &= ~TRIGEN;
+ HWREG16(baseAddress + OFS_SDHSCTL5) &= ~SDHS_LOCK;
+
+ HWREG16(baseAddress + OFS_SDHSWINHITH) = highThreshold;
+ HWREG16(baseAddress + OFS_SDHSWINLOTH) = lowThreshold;
+
+ //Restore CTL3 and CTL5
+ HWREG16(baseAddress + OFS_SDHSCTL3) = saveCTL3;
+ HWREG16(baseAddress + OFS_SDHSCTL5) = saveCTL5;
+}
+
+void SDHS_setTotalSampleSize(uint16_t baseAddress, uint16_t sampleSize)
+{
+ uint16_t saveCTL3 = HWREG16(baseAddress + OFS_SDHSCTL3);
+ uint16_t saveCTL5 = HWREG16(baseAddress + OFS_SDHSCTL5);
+
+ //Unlock Registers
+ HWREG16(baseAddress + OFS_SDHSCTL3) &= ~TRIGEN;
+ HWREG16(baseAddress + OFS_SDHSCTL5) &= ~SDHS_LOCK;
+
+ HWREG16(baseAddress + OFS_SDHSCTL2) = sampleSize - 1;
+}
+
+void SDHS_enableTrigger(uint16_t baseAddress)
+{
+ HWREG16(baseAddress + OFS_SDHSCTL3) |= TRIGEN;
+}
+
+void SDHS_disableTrigger(uint16_t baseAddress)
+{
+ HWREG16(baseAddress + OFS_SDHSCTL3) &= ~TRIGEN;
+}
+
+void SDHS_enable(uint16_t baseAddress)
+{
+ HWREG16(baseAddress + OFS_SDHSCTL4) |= SDHSON;
+}
+
+void SDHS_disable(uint16_t baseAddress)
+{
+ HWREG16(baseAddress + OFS_SDHSCTL4) &= ~SDHSON;
+}
+
+uint16_t SDHS_getInterruptStatus(uint16_t baseAddress, uint16_t interruptMask)
+{
+ return (HWREG16(baseAddress + OFS_SDHSRIS) & interruptMask);
+}
+
+uint16_t SDHS_getInterruptMaskStatus(uint16_t baseAddress, uint16_t interruptMask)
+{
+ return (HWREG16(baseAddress + OFS_SDHSIMSC) & interruptMask);
+}
+
+void SDHS_enableInterrupt(uint16_t baseAddress, uint16_t interruptMask)
+{
+ HWREG16(baseAddress + OFS_SDHSIMSC) |= interruptMask;
+}
+void SDHS_disableInterrupt(uint16_t baseAddress, uint16_t interruptMask)
+{
+ HWREG16(baseAddress + OFS_SDHSIMSC) &= ~interruptMask;
+}
+
+void SDHS_clearInterrupt(uint16_t baseAddress, uint16_t interruptMask)
+{
+ HWREG16(baseAddress + OFS_SDHSICR) |= interruptMask;
+}
+
+void SDHS_setInterrupt(uint16_t baseAddress, uint16_t interruptMask)
+{
+ HWREG16(baseAddress + OFS_SDHSISR) |= interruptMask;
+}
+
+void SDHS_setPGAGain(uint16_t baseAddress, uint16_t gain)
+{
+ assert (gain < 0x40);
+ HWREG16(baseAddress + OFS_SDHSCTL6) = gain;
+}
+
+void SDHS_setModularOptimization(uint16_t baseAddress, uint16_t optimization)
+{
+ assert (optimization < 0x20);
+ HWREG16(baseAddress + OFS_SDHSCTL7) = optimization;
+}
+uint16_t SDHS_getRegisterLockStatus(uint16_t baseAddress)
+{
+ return (HWREG16(baseAddress + OFS_SDHSCTL5) & SDHS_LOCK);
+}
+
+void SDHS_startConversion(uint16_t baseAddress)
+{
+ HWREG16(baseAddress + OFS_SDHSCTL5) |= SSTART;
+}
+
+void SDHS_endConversion(uint16_t baseAddress)
+{
+ HWREG16(baseAddress + OFS_SDHSCTL5) &= ~SSTART;
+}
+
+uint16_t SDHS_getResults(uint16_t baseAddress)
+{
+ return (HWREG16(baseAddress + OFS_SDHSDT));
+}
+
+void SDHS_setDTCDestinationAddress(uint16_t baseAddress, uint16_t address)
+{
+ HWREG16(baseAddress + OFS_SDHSDTCDA) = address;
+}
+#endif
+//*****************************************************************************
+//
+//! Close the doxygen group for sdhs_api
+//! @}
+//
+//*****************************************************************************
+
diff --git a/Apps/FlightSoftware/MotorControl/driverlib/sdhs.h b/Apps/FlightSoftware/MotorControl/driverlib/sdhs.h
new file mode 100644
index 000000000..7896c930c
--- /dev/null
+++ b/Apps/FlightSoftware/MotorControl/driverlib/sdhs.h
@@ -0,0 +1,653 @@
+/* --COPYRIGHT--,BSD
+ * Copyright (c) 2017, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * --/COPYRIGHT--*/
+//*****************************************************************************
+//
+// sdhs.h - Driver for the SDHS Module.
+//
+//*****************************************************************************
+
+#ifndef __MSP430WARE_SDHS_H__
+#define __MSP430WARE_SDHS_H__
+
+#include "inc/hw_memmap.h"
+
+#ifdef __MSP430_HAS_SDHS__
+
+//*****************************************************************************
+//
+// If building with a C++ compiler, make all of the definitions in this header
+// have a C binding.
+//
+//*****************************************************************************
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+#include "inc/hw_memmap.h"
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the interruptMask parameter
+// for functions: SDHS_getInterruptStatus(), SDHS_enableInterrupt(),
+// SDHS_disableInterrupt()
+//
+//*****************************************************************************
+#define SDHS_INCOMPLETE_STOP_INTERRUPT ISTOP
+#define SDHS_WINDOW_LOW_INTERRUPT WINLO
+#define SDHS_WINDOW_HIGH_INTERRUPT WINHI
+#define SDHS_DATA_READY_INTERRUPT DTRDY
+#define SDHS_START_CONVERSION_TRIGGER_INTERRUPT SSTRG
+#define SDHS_ACQUISITION_DONE_INTERRUPT ACQDONE
+#define SDHS_DATA_OVERFLOW_INTERRUPT OVF
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the param parameter for
+// functions: SDHS_init(); the triggerSourceSelect parameter for
+// functions: SDHS_init().
+//
+//*****************************************************************************
+#define SDHS_REGISTER_CONTROL_MODE TRGSRC_0
+#define SDHS_ASQ_CONTROL_MODE TRGSRC_1
+
+//*****************************************************************************
+//
+// The following are values that are returned by SDHS_getRegisterLockStatus()
+//
+//*****************************************************************************
+#define SDHS_REGISTERS_LOCKED SDHS_LOCK_1
+#define SDHS_REGISTERS_UNLOCKED SDHS_LOCK_0
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the param parameter for
+// functions: SDHS_init(); the msbShift parameter for
+// functions: SDHS_init().
+//
+//*****************************************************************************
+#define SDHS_NO_SHIFT SHIFT_0
+#define SDHS_SHIFT_LEFT_1 SHIFT_1
+#define SDHS_SHIFT_LEFT_2 SHIFT_2
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the param parameter for
+// functions: SDHS_init(); the outputBitResolution parameter for
+// functions: SDHS_init().
+//
+//*****************************************************************************
+#define SDHS_OUTPUT_RESOLUTION_12_BIT OBR_0
+#define SDHS_OUTPUT_RESOLUTION_13_BIT OBR_1
+#define SDHS_OUTPUT_RESOLUTION_14_BIT OBR_2
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the param parameter for
+// functions: SDHS_init(); the dataFormat parameter for
+// functions: SDHS_init().
+//
+//*****************************************************************************
+#define SDHS_DATA_FORMAT_TWOS_COMPLEMENT DFMSEL_0
+#define SDHS_DATA_FORMAT_OFFSET_BINARY DFMSEL_1
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the param parameter for
+// functions: SDHS_init(); the dataAlignment parameter for
+// functions: SDHS_init().
+//
+//*****************************************************************************
+#define SDHS_DATA_ALIGNED_RIGHT DALGN_0
+#define SDHS_DATA_ALIGNED_LEFT DALGN_1
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the param parameter for
+// functions: SDHS_init(); the interruptDelayGeneration parameter for
+// functions: SDHS_init().
+//
+//*****************************************************************************
+#define SDHS_DELAY_SAMPLES_0 INTDLY_0
+#define SDHS_DELAY_SAMPLES_1 INTDLY_1
+#define SDHS_DELAY_SAMPLES_2 INTDLY_2
+#define SDHS_DELAY_SAMPLES_3 INTDLY_3
+#define SDHS_DELAY_SAMPLES_4 INTDLY_4
+#define SDHS_DELAY_SAMPLES_5 INTDLY_5
+#define SDHS_DELAY_SAMPLES_6 INTDLY_6
+#define SDHS_DELAY_SAMPLES_7 INTDLY_7
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the param parameter for
+// functions: SDHS_init(); the autoSampleStart parameter for
+// functions: SDHS_init().
+//
+//*****************************************************************************
+#define SDHS_AUTO_SAMPLE_START_ENABLED AUTOSSDIS_0
+#define SDHS_AUTO_SAMPLE_START_DISABLED AUTOSSDIS_1
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the param parameter for
+// functions: SDHS_init(); the oversamplingRate parameter for
+// functions: SDHS_init().
+//
+//*****************************************************************************
+#define SDHS_OVERSAMPLING_RATE_10 OSR_0
+#define SDHS_OVERSAMPLING_RATE_20 OSR_1
+#define SDHS_OVERSAMPLING_RATE_40 OSR_2
+#define SDHS_OVERSAMPLING_RATE_80 OSR_3
+#define SDHS_OVERSAMPLING_RATE_160 OSR_4
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the param parameter for
+// functions: SDHS_init(); the dataTransferController parameter for
+// functions: SDHS_init().
+//
+//*****************************************************************************
+#define SDHS_DATA_TRANSFER_CONTROLLER_ON DTCOFF_0
+#define SDHS_DATA_TRANSFER_CONTROLLER_OFF DTCOFF_1
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the param parameter for
+// functions: SDHS_init(); the windowComparator parameter for
+// functions: SDHS_init().
+//
+//*****************************************************************************
+#define SDHS_WINDOW_COMPARATOR_DISABLE WINCMPEN_0
+#define SDHS_WINDOW_COMPARATOR_ENABLE WINCMPEN_1
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the param parameter for
+// functions: SDHS_init(); the sampleSizeCounting parameter for
+// functions: SDHS_init().
+//
+//*****************************************************************************
+#define SDHS_SMPSZ_USED SMPCTLOFF_0
+#define SDHS_SMPSZ_IGNORED SMPCTLOFF_1
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the optimization parameter for
+// functions: SDHS_setModularOptimization().
+//
+//*****************************************************************************
+#define SDHS_OPTIMIZE_PLL_OUTPUT_FREQUENCY_77_80MHz 0xC
+#define SDHS_OPTIMIZE_PLL_OUTPUT_FREQUENCY_74_77MHz 0xD
+#define SDHS_OPTIMIZE_PLL_OUTPUT_FREQUENCY_71_74MHz 0xE
+#define SDHS_OPTIMIZE_PLL_OUTPUT_FREQUENCY_68_71MHz 0xF
+
+//*****************************************************************************
+//
+//! \brief Used in the SDHS_init() function as the param parameter.
+//
+//*****************************************************************************
+typedef struct SDHS_initParam
+{
+ //! Trigger source select
+ //! \n Valid values are:
+ //! - \B SDHS_REGISTER_CONTROL_MODE [Default]
+ //! - \b SDHS_ASQ_CONTROL_MODE
+ uint16_t triggerSourceSelect;
+ //! Selects MSB shift from filter out
+ //! - \b SDHS_NO_SHIFT [Default]
+ //! - \b SDHS_SHIFT_LEFT_1
+ //! - \b SDHS_SHIFT_LEFT_2
+ uint8_t msbShift;
+ //! Selects the output bit resolution
+ //! \n Valid values are:
+ //! - \b SDHS_OUTPUT_RESOLUTION_12_BIT [Default]
+ //! - \b SDHS_OUTPUT_RESOLUTION_13_BIT
+ //! - \b SDHS_OUTPUT_RESOLUTION_14_BIT
+ uint16_t outputBitResolution;
+ //! Selects the data format
+ //! \n Valid values are:
+ //! - \b SDHS_DATA_FORMAT_TWOS_COMPLEMENT [Default]
+ //! - \b SDHS_DATA_FORMAT_OFFSET_BINARY
+ uint16_t dataFormat;
+ //! Selects the data format
+ //! \n Valid values are:
+ //! - \b SDHS_DATA_ALIGNED_RIGHT [Default]
+ //! - \b SDHS_DATA_ALIGNED_LEFT
+ uint16_t dataAlignment;
+ //! Selects the data format
+ //! \n Valid values are:
+ //! - \b SDHS_DELAY_SAMPLES_0
+ //! - \b SDHS_DELAY_SAMPLES_1 [Default]
+ //! - \b SDHS_DELAY_SAMPLES_2
+ //! - \b SDHS_DELAY_SAMPLES_3
+ //! - \b SDHS_DELAY_SAMPLES_4
+ //! - \b SDHS_DELAY_SAMPLES_5
+ //! - \b SDHS_DELAY_SAMPLES_6
+ //! - \b SDHS_DELAY_SAMPLES_7
+ uint16_t interruptDelayGeneration;
+ //! Selects the Auto Sample Start
+ //! \n Valid values are:
+ //! - \b SDHS_AUTO_SAMPLE_START_DISABLED [Default]
+ //! - \b SDHS_AUTO_SAMPLE_START_ENABLED
+ uint16_t autoSampleStart;
+ //! Selects the Oversampling Rate
+ //! \n Valid values are:
+ //! - \b SDHS_OVERSAMPLING_RATE_10 [Default]
+ //! - \b SDHS_OVERSAMPLING_RATE_20
+ //! - \b SDHS_OVERSAMPLING_RATE_40
+ //! - \b SDHS_OVERSAMPLING_RATE_80
+ //! - \b SDHS_OVERSAMPLING_RATE_160
+ uint16_t oversamplingRate;
+ //! Selects the Data Transfer Controller State
+ //! \n Valid values are:
+ //! - \b SDHS_DATA_TRANSFER_CONTROLLER_ON [Default]
+ //! - \b SDHS_DATA_TRANSFER_CONTROLLER_OFF
+ uint16_t dataTransferController;
+ //! Selects the Window Comparator State
+ //! \n Valid values are:
+ //! - \b SDHS_WINDOW_COMPARATOR_DISABLE [Default]
+ //! - \b SDHS_WINDOW_COMPARATOR_ENABLE
+ uint16_t windowComparator;
+ //! Selects the Sample Size Counting
+ //! \n Valid values are:
+ //! - \b SDHS_SMPSZ_USED [Default]
+ //! - \b SDHS_SMPSZ_IGNORED
+ uint16_t sampleSizeCounting;
+} SDHS_initParam;
+
+//*****************************************************************************
+//
+//! \brief Initializes the SDHS module
+//!
+//! Initializes the SDHS moduleress
+//!
+//! \param baseAddress is the base address of the SDHS module.
+//!
+//! \param params is the pointer to the initialization structure
+//!
+//! At the end of this call the TRIGEN and SDHS_LOCK bits are reset
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void SDHS_init(uint16_t baseAddress, SDHS_initParam *param);
+
+//*****************************************************************************
+//
+//! \brief Returns the status of the selected interrupt flags.
+//!
+//! Returns the status of the selected interrupt flags.
+//!
+//! \param baseAddress is the base address of the SDHS module.
+//! \param interruptMask
+//! Mask value is the logical OR of any of the following:
+//! Valid values are:
+//! - \b SDHS_INCOMPLETE_STOP_INTERRUPT
+//! - \b SDHS_WINDOW_LOW_INTERRUPT
+//! - \b SDHS_WINDOW_HIGH_INTERRUPT
+//! - \b SDHS_DATA_READY_INTERRUPT
+//! - \b SDHS_START_CONVERSION_TRIGGER_INTERRUPT
+//! - \b SDHS_ACQUISITION_DONE_INTERRUPT
+//! - \b SDHS_DATA_OVERFLOW_INTERRUPT
+//! \return Logical OR of any of above valid values for interruptMask
+//! \n indicating the status of the masked flags
+//!
+//
+//*****************************************************************************
+extern uint16_t SDHS_getInterruptStatus(uint16_t baseAddress, uint16_t interruptMask);
+
+//*****************************************************************************
+//
+//! \brief Returns the mask status of the selected interrupt.
+//!
+//! Returns the mask status of the selected interrupt flags.
+//!
+//! \param baseAddress is the base address of the SDHS module.
+//! \param interruptMask
+//! Mask value is the logical OR of any of the following:
+//! Valid values are:
+//! - \b SDHS_INCOMPLETE_STOP_INTERRUPT
+//! - \b SDHS_WINDOW_LOW_INTERRUPT
+//! - \b SDHS_WINDOW_HIGH_INTERRUPT
+//! - \b SDHS_DATA_READY_INTERRUPT
+//! - \b SDHS_START_CONVERSION_TRIGGER_INTERRUPT
+//! - \b SDHS_ACQUISITION_DONE_INTERRUPT
+//! - \b SDHS_DATA_OVERFLOW_INTERRUPT
+//! \return Logical OR of any of above valid values for interruptMask
+//! \n indicating the status of the masked flags
+//!
+//
+//*****************************************************************************
+extern uint16_t SDHS_getInterruptMaskStatus(uint16_t baseAddress, uint16_t interruptMask);
+
+//*****************************************************************************
+//
+//! \brief Clears SDHS selected interrupt flags.
+//!
+//! \param baseAddress is the base address of the SDHS module.
+//! \param interruptMask
+//! Mask value is the logical OR of any of the following:
+//! Valid values are:
+//! - \b SDHS_INCOMPLETE_STOP_INTERRUPT
+//! - \b SDHS_WINDOW_LOW_INTERRUPT
+//! - \b SDHS_WINDOW_HIGH_INTERRUPT
+//! - \b SDHS_DATA_READY_INTERRUPT
+//! - \b SDHS_START_CONVERSION_TRIGGER_INTERRUPT
+//! - \b SDHS_ACQUISITION_DONE_INTERRUPT
+//! - \b SDHS_DATA_OVERFLOW_INTERRUPT
+//!
+//! Modified registers are \b SDHSICR
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void SDHS_clearInterrupt(uint16_t baseAddress, uint16_t interruptMask);
+
+//*****************************************************************************
+//
+//! \brief Enable SDHS selected interrupt masks.
+//!
+//! \param baseAddress is the base address of the SDHS module.
+//! \param interruptMask
+//! Mask value is the logical OR of any of the following:
+//! Valid values are:
+//! - \b SDHS_WINDOW_LOW_INTERRUPT
+//! - \b SDHS_WINDOW_HIGH_INTERRUPT
+//! - \b SDHS_DATA_READY_INTERRUPT
+//! - \b SDHS_START_CONVERSION_TRIGGER_INTERRUPT
+//! - \b SDHS_ACQUISITION_DONE_INTERRUPT
+//! - \b SDHS_DATA_OVERFLOW_INTERRUPT
+//!
+//! Modified registers are SDHSIMSC
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void SDHS_enableInterrupt(uint16_t baseAddress, uint16_t interruptMask);
+
+//*****************************************************************************
+//
+//! \brief Disable SDHS selected interrupt masks.
+//!
+//! \param baseAddress is the base address of the SDHS module.
+//! \param interruptMask
+//! Mask value is the logical OR of any of the following:
+//! Valid values are:
+//! - \b SDHS_WINDOW_LOW_INTERRUPT
+//! - \b SDHS_WINDOW_HIGH_INTERRUPT
+//! - \b SDHS_DATA_READY_INTERRUPT
+//! - \b SDHS_START_CONVERSION_TRIGGER_INTERRUPT
+//! - \b SDHS_ACQUISITION_DONE_INTERRUPT
+//! - \b SDHS_DATA_OVERFLOW_INTERRUPT
+//!
+//! Modified registers are SDHSIMSC
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void SDHS_disableInterrupt(uint16_t baseAddress, uint16_t interruptMask);
+
+//*****************************************************************************
+//
+//! \brief Set SDHS selected interrupts.
+//!
+//! \param baseAddress is the base address of the SDHS module.
+//! \param interruptMask
+//! Mask value is the logical OR of any of the following:
+//! Valid values are:
+//! - \b SDHS_WINDOW_LOW_INTERRUPT
+//! - \b SDHS_WINDOW_HIGH_INTERRUPT
+//! - \b SDHS_DATA_READY_INTERRUPT
+//! - \b SDHS_START_CONVERSION_TRIGGER_INTERRUPT
+//! - \b SDHS_ACQUISITION_DONE_INTERRUPT
+//! - \b SDHS_DATA_OVERFLOW_INTERRUPT
+//!
+//! Modified registers are SDHSISR
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void SDHS_setInterrupt(uint16_t baseAddress, uint16_t interruptMask);
+
+//*****************************************************************************
+//
+//! \brief Sets the high and low threshold for the window comparator feature.
+//!
+//! Sets the high and low threshold for the window comparator feature.
+//!
+//! \param baseAddress is the base address of the SDHS module.
+//! \param highThreshold is the upper bound that could trip an interrupt for
+//! the window comparator.
+//! \param lowThreshold is the lower bound that could trip on interrupt for the
+//! window comparator.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void SDHS_setWindowComp(uint16_t baseAddress, uint16_t highThreshold,
+ uint16_t lowThreshold);
+
+//*****************************************************************************
+//
+//! \brief Sets total sample size
+//!
+//! Note that SDHSCTL2.SMPSZ includes the samples skipped by SDHSCTL0.INTDLY:
+//! - The total number of samples SDHS generates = sampleSize + 1.
+//! - The number of samples SDHS generates via SDHSDT register = sampleSize - INTDLY + 1.
+//! If sampleSize - INTDLY + 1 <= 0, then no data output to SDHSDT register
+//!
+//! \param baseAddress is the base address of the SDHS module.
+//! \param sampleSize is the total number of samples SDHS generates + 1
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void SDHS_setTotalSampleSize(uint16_t baseAddress, uint16_t sampleSize);
+
+//*****************************************************************************
+//
+//! \brief Enables the SDHS Trigger.
+//!
+//! Enables the SDHS Trigger.
+//!
+//! \param baseAddress is the base address of the SDHS module.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void SDHS_enableTrigger(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Disables the SDHS Trigger.
+//!
+//! Disables the SDHS Trigger.
+//!
+//! \param baseAddress is the base address of the SDHS module.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void SDHS_disableTrigger(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Turn On Module
+//!
+//! Turn On Module
+//!
+//! \param baseAddress is the base address of the SDHS module.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void SDHS_enable(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Start Conversion
+//!
+//! Start Conversion
+//!
+//! \param baseAddress is the base address of the SDHS module.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void SDHS_startConversion(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief End Conversion
+//!
+//! End Conversion
+//!
+//! \param baseAddress is the base address of the SDHS module.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void SDHS_endConversion(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Set PGA Gain
+//!
+//! Set PGA Gain
+//!
+//! \param baseAddress is the base address of the SDHS module.
+//!
+//! \param gain is the PGA Gain control value
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void SDHS_setPGAGain(uint16_t baseAddress, uint16_t gain);
+
+//*****************************************************************************
+//
+//! \brief Set Modular Optimization
+//!
+//! Set Modular Optimization. Upper bound of optimization parameter label is non-inclusive.
+//! For example, if your PLL output frequency is 77 MHz, you should select
+//! SDHS_OPTIMIZE_PLL_OUTPUT_FREQUENCY_77_80MHz for optimization parameter.
+//!
+//! \param baseAddress is the base address of the SDHS module.
+//!
+//! \param optimization is the Modular Optimization value
+//! Valid values are:
+//! - \b SDHS_OPTIMIZE_PLL_OUTPUT_FREQUENCY_77_80MHz
+//! - \b SDHS_OPTIMIZE_PLL_OUTPUT_FREQUENCY_74_77MHz
+//! - \b SDHS_OPTIMIZE_PLL_OUTPUT_FREQUENCY_71_74MHz
+//! - \b SDHS_OPTIMIZE_PLL_OUTPUT_FREQUENCY_68_71MHz [Default]
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void SDHS_setModularOptimization(uint16_t baseAddress, uint16_t optimization);
+
+//*****************************************************************************
+//
+//! \brief Turn Off Module
+//!
+//! Turn Off Module
+//!
+//! \param baseAddress is the base address of the SDHS module.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void SDHS_disable(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Returns the contents of the Data Conversion Register
+//!
+//! Returns the contents of the Data Conversion Register.
+//! The sign bit is extended up to the bit 15.
+//!
+//! \param baseAddress is the base address of the SDHS module.
+//!
+//! \return The contents of the Data Conversion Register
+//
+//*****************************************************************************
+extern uint16_t SDHS_getResults(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Returns the lock status of the registers
+//!
+//! Returns the lock status of the registers
+//!
+//! \param baseAddress is the base address of the SDHS module.
+//!
+//! \return \b SDHS_REGISTERS_LOCKED or \b SDHS_REGISTERS_UNLOCKED
+//
+//*****************************************************************************
+extern uint16_t SDHS_getRegisterLockStatus(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Sets the DTC destination address
+//!
+//! Sets the DTC Destination Address
+//!
+//! \param baseAddress is the base address of the SDHS module.
+//!
+//! \param address is the destination address to be set
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void SDHS_setDTCDestinationAddress(uint16_t baseAddress, uint16_t address);
+
+//*****************************************************************************
+//
+// The following are deprecated APIs.
+//
+//*****************************************************************************
+#define SDHS_turnOnModuleinStandaloneMode SDHS_enable
+#define SDHS_turnOffModuleinStandaloneMode SDHS_disable
+#define SDHS_startConversioninStandaloneMode SDHS_startConversion
+
+//*****************************************************************************
+//
+// Mark the end of the C bindings section for C++ compilers.
+//
+//*****************************************************************************
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+#endif // __MSP430WARE_SDHS_H__
+
diff --git a/Apps/FlightSoftware/MotorControl/driverlib/sfr.c b/Apps/FlightSoftware/MotorControl/driverlib/sfr.c
new file mode 100644
index 000000000..53deced67
--- /dev/null
+++ b/Apps/FlightSoftware/MotorControl/driverlib/sfr.c
@@ -0,0 +1,96 @@
+/* --COPYRIGHT--,BSD
+ * Copyright (c) 2017, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * --/COPYRIGHT--*/
+//*****************************************************************************
+//
+// sfr.c - Driver for the sfr Module.
+//
+//*****************************************************************************
+
+//*****************************************************************************
+//
+//! \addtogroup sfr_api sfr
+//! @{
+//
+//*****************************************************************************
+
+#include "inc/hw_memmap.h"
+
+#ifdef __MSP430_HAS_SFR__
+#include "sfr.h"
+
+#include
+
+void SFR_enableInterrupt (uint8_t interruptMask)
+{
+ HWREG8(SFR_BASE + OFS_SFRIE1_L) |= interruptMask;
+}
+
+void SFR_disableInterrupt (uint8_t interruptMask)
+{
+ HWREG8(SFR_BASE + OFS_SFRIE1_L) &= ~(interruptMask);
+}
+
+uint8_t SFR_getInterruptStatus (uint8_t interruptFlagMask)
+{
+ return ( HWREG8(SFR_BASE + OFS_SFRIFG1_L) & interruptFlagMask );
+}
+
+void SFR_clearInterrupt (uint8_t interruptFlagMask)
+{
+ HWREG8(SFR_BASE + OFS_SFRIFG1_L) &= ~(interruptFlagMask);
+}
+
+void SFR_setResetPinPullResistor (uint16_t pullResistorSetup)
+{
+ HWREG8(SFR_BASE + OFS_SFRRPCR_L) &= ~(SYSRSTRE + SYSRSTUP);
+ HWREG8(SFR_BASE + OFS_SFRRPCR_L) |= pullResistorSetup;
+}
+
+void SFR_setNMIEdge (uint16_t edgeDirection)
+{
+ HWREG8(SFR_BASE + OFS_SFRRPCR_L) &= ~(SYSNMIIES);
+ HWREG8(SFR_BASE + OFS_SFRRPCR_L) |= edgeDirection;
+}
+
+void SFR_setResetNMIPinFunction (uint8_t resetPinFunction)
+{
+ HWREG8(SFR_BASE + OFS_SFRRPCR_L) &= ~(SYSNMI);
+ HWREG8(SFR_BASE + OFS_SFRRPCR_L) |= resetPinFunction;
+}
+
+#endif
+//*****************************************************************************
+//
+//! Close the doxygen group for sfr_api
+//! @}
+//
+//*****************************************************************************
diff --git a/Apps/FlightSoftware/MotorControl/driverlib/sfr.h b/Apps/FlightSoftware/MotorControl/driverlib/sfr.h
new file mode 100644
index 000000000..dd9c9b708
--- /dev/null
+++ b/Apps/FlightSoftware/MotorControl/driverlib/sfr.h
@@ -0,0 +1,290 @@
+/* --COPYRIGHT--,BSD
+ * Copyright (c) 2017, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * --/COPYRIGHT--*/
+//*****************************************************************************
+//
+// sfr.h - Driver for the SFR Module.
+//
+//*****************************************************************************
+
+#ifndef __MSP430WARE_SFR_H__
+#define __MSP430WARE_SFR_H__
+
+#include "inc/hw_memmap.h"
+
+#ifdef __MSP430_HAS_SFR__
+
+//*****************************************************************************
+//
+// If building with a C++ compiler, make all of the definitions in this header
+// have a C binding.
+//
+//*****************************************************************************
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the interruptMask parameter
+// for functions: SFR_enableInterrupt(), and SFR_disableInterrupt(); the
+// interruptFlagMask parameter for functions: SFR_getInterruptStatus(), and
+// SFR_clearInterrupt() as well as returned by the SFR_getInterruptStatus()
+// function.
+//
+//*****************************************************************************
+#define SFR_JTAG_OUTBOX_INTERRUPT JMBOUTIE
+#define SFR_JTAG_INBOX_INTERRUPT JMBINIE
+#define SFR_NMI_PIN_INTERRUPT NMIIE
+#define SFR_VACANT_MEMORY_ACCESS_INTERRUPT VMAIE
+#define SFR_OSCILLATOR_FAULT_INTERRUPT OFIE
+#define SFR_WATCHDOG_INTERVAL_TIMER_INTERRUPT WDTIE
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the pullResistorSetup
+// parameter for functions: SFR_setResetPinPullResistor().
+//
+//*****************************************************************************
+#define SFR_RESISTORDISABLE (!(SYSRSTRE + SYSRSTUP))
+#define SFR_RESISTORENABLE_PULLUP (SYSRSTRE + SYSRSTUP)
+#define SFR_RESISTORENABLE_PULLDOWN (SYSRSTRE)
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the edgeDirection parameter
+// for functions: SFR_setNMIEdge().
+//
+//*****************************************************************************
+#define SFR_NMI_RISINGEDGE (!(SYSNMIIES))
+#define SFR_NMI_FALLINGEDGE (SYSNMIIES)
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the resetPinFunction
+// parameter for functions: SFR_setResetNMIPinFunction().
+//
+//*****************************************************************************
+#define SFR_RESETPINFUNC_RESET (!(SYSNMI))
+#define SFR_RESETPINFUNC_NMI (SYSNMI)
+
+//*****************************************************************************
+//
+// Prototypes for the APIs.
+//
+//*****************************************************************************
+
+//*****************************************************************************
+//
+//! \brief Enables selected SFR interrupt sources.
+//!
+//! This function enables the selected SFR interrupt sources. Only the sources
+//! that are enabled can be reflected to the processor interrupt; disabled
+//! sources have no effect on the processor. Does not clear interrupt flags.
+//!
+//! \param interruptMask is the bit mask of interrupts that will be enabled.
+//! Mask value is the logical OR of any of the following:
+//! - \b SFR_JTAG_OUTBOX_INTERRUPT - JTAG outbox interrupt
+//! - \b SFR_JTAG_INBOX_INTERRUPT - JTAG inbox interrupt
+//! - \b SFR_NMI_PIN_INTERRUPT - NMI pin interrupt, if NMI function is
+//! chosen
+//! - \b SFR_VACANT_MEMORY_ACCESS_INTERRUPT - Vacant memory access
+//! interrupt
+//! - \b SFR_OSCILLATOR_FAULT_INTERRUPT - Oscillator fault interrupt
+//! - \b SFR_WATCHDOG_INTERVAL_TIMER_INTERRUPT - Watchdog interval timer
+//! interrupt
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void SFR_enableInterrupt(uint8_t interruptMask);
+
+//*****************************************************************************
+//
+//! \brief Disables selected SFR interrupt sources.
+//!
+//! This function disables the selected SFR interrupt sources. Only the sources
+//! that are enabled can be reflected to the processor interrupt; disabled
+//! sources have no effect on the processor.
+//!
+//! \param interruptMask is the bit mask of interrupts that will be disabled.
+//! Mask value is the logical OR of any of the following:
+//! - \b SFR_JTAG_OUTBOX_INTERRUPT - JTAG outbox interrupt
+//! - \b SFR_JTAG_INBOX_INTERRUPT - JTAG inbox interrupt
+//! - \b SFR_NMI_PIN_INTERRUPT - NMI pin interrupt, if NMI function is
+//! chosen
+//! - \b SFR_VACANT_MEMORY_ACCESS_INTERRUPT - Vacant memory access
+//! interrupt
+//! - \b SFR_OSCILLATOR_FAULT_INTERRUPT - Oscillator fault interrupt
+//! - \b SFR_WATCHDOG_INTERVAL_TIMER_INTERRUPT - Watchdog interval timer
+//! interrupt
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void SFR_disableInterrupt(uint8_t interruptMask);
+
+//*****************************************************************************
+//
+//! \brief Returns the status of the selected SFR interrupt flags.
+//!
+//! This function returns the status of the selected SFR interrupt flags in a
+//! bit mask format matching that passed into the interruptFlagMask parameter.
+//!
+//! \param interruptFlagMask is the bit mask of interrupt flags that the status
+//! of should be returned.
+//! Mask value is the logical OR of any of the following:
+//! - \b SFR_JTAG_OUTBOX_INTERRUPT - JTAG outbox interrupt
+//! - \b SFR_JTAG_INBOX_INTERRUPT - JTAG inbox interrupt
+//! - \b SFR_NMI_PIN_INTERRUPT - NMI pin interrupt, if NMI function is
+//! chosen
+//! - \b SFR_VACANT_MEMORY_ACCESS_INTERRUPT - Vacant memory access
+//! interrupt
+//! - \b SFR_OSCILLATOR_FAULT_INTERRUPT - Oscillator fault interrupt
+//! - \b SFR_WATCHDOG_INTERVAL_TIMER_INTERRUPT - Watchdog interval timer
+//! interrupt
+//!
+//! \return A bit mask of the status of the selected interrupt flags.
+//! Return Logical OR of any of the following:
+//! - \b SFR_JTAG_OUTBOX_INTERRUPT JTAG outbox interrupt
+//! - \b SFR_JTAG_INBOX_INTERRUPT JTAG inbox interrupt
+//! - \b SFR_NMI_PIN_INTERRUPT NMI pin interrupt, if NMI function is
+//! chosen
+//! - \b SFR_VACANT_MEMORY_ACCESS_INTERRUPT Vacant memory access
+//! interrupt
+//! - \b SFR_OSCILLATOR_FAULT_INTERRUPT Oscillator fault interrupt
+//! - \b SFR_WATCHDOG_INTERVAL_TIMER_INTERRUPT Watchdog interval timer
+//! interrupt
+//! \n indicating the status of the masked interrupts
+//
+//*****************************************************************************
+extern uint8_t SFR_getInterruptStatus(uint8_t interruptFlagMask);
+
+//*****************************************************************************
+//
+//! \brief Clears the selected SFR interrupt flags.
+//!
+//! This function clears the status of the selected SFR interrupt flags.
+//!
+//! \param interruptFlagMask is the bit mask of interrupt flags that will be
+//! cleared.
+//! Mask value is the logical OR of any of the following:
+//! - \b SFR_JTAG_OUTBOX_INTERRUPT - JTAG outbox interrupt
+//! - \b SFR_JTAG_INBOX_INTERRUPT - JTAG inbox interrupt
+//! - \b SFR_NMI_PIN_INTERRUPT - NMI pin interrupt, if NMI function is
+//! chosen
+//! - \b SFR_VACANT_MEMORY_ACCESS_INTERRUPT - Vacant memory access
+//! interrupt
+//! - \b SFR_OSCILLATOR_FAULT_INTERRUPT - Oscillator fault interrupt
+//! - \b SFR_WATCHDOG_INTERVAL_TIMER_INTERRUPT - Watchdog interval timer
+//! interrupt
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void SFR_clearInterrupt(uint8_t interruptFlagMask);
+
+//*****************************************************************************
+//
+//! \brief Sets the pull-up/down resistor on the ~RST/NMI pin.
+//!
+//! This function sets the pull-up/down resistors on the ~RST/NMI pin to the
+//! settings from the pullResistorSetup parameter.
+//!
+//! \param pullResistorSetup is the selection of how the pull-up/down resistor
+//! on the ~RST/NMI pin should be setup or disabled.
+//! Valid values are:
+//! - \b SFR_RESISTORDISABLE
+//! - \b SFR_RESISTORENABLE_PULLUP [Default]
+//! - \b SFR_RESISTORENABLE_PULLDOWN
+//! \n Modified bits are \b SYSRSTUP and \b SYSRSTRE of \b SFRRPCR
+//! register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void SFR_setResetPinPullResistor(uint16_t pullResistorSetup);
+
+//*****************************************************************************
+//
+//! \brief Sets the edge direction that will assert an NMI from a signal on the
+//! ~RST/NMI pin if NMI function is active.
+//!
+//! This function sets the edge direction that will assert an NMI from a signal
+//! on the ~RST/NMI pin if the NMI function is active. To activate the NMI
+//! function of the ~RST/NMI use the SFR_setResetNMIPinFunction() passing
+//! SFR_RESETPINFUNC_NMI into the resetPinFunction parameter.
+//!
+//! \param edgeDirection is the direction that the signal on the ~RST/NMI pin
+//! should go to signal an interrupt, if enabled.
+//! Valid values are:
+//! - \b SFR_NMI_RISINGEDGE [Default]
+//! - \b SFR_NMI_FALLINGEDGE
+//! \n Modified bits are \b SYSNMIIES of \b SFRRPCR register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void SFR_setNMIEdge(uint16_t edgeDirection);
+
+//*****************************************************************************
+//
+//! \brief Sets the function of the ~RST/NMI pin.
+//!
+//! This function sets the functionality of the ~RST/NMI pin, whether in reset
+//! mode which will assert a reset if a low signal is observed on that pin, or
+//! an NMI which will assert an interrupt from an edge of the signal dependent
+//! on the setting of the edgeDirection parameter in SFR_setNMIEdge().
+//!
+//! \param resetPinFunction is the function that the ~RST/NMI pin should take
+//! on.
+//! Valid values are:
+//! - \b SFR_RESETPINFUNC_RESET [Default]
+//! - \b SFR_RESETPINFUNC_NMI
+//! \n Modified bits are \b SYSNMI of \b SFRRPCR register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void SFR_setResetNMIPinFunction(uint8_t resetPinFunction);
+
+//*****************************************************************************
+//
+// Mark the end of the C bindings section for C++ compilers.
+//
+//*****************************************************************************
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+#endif // __MSP430WARE_SFR_H__
diff --git a/Apps/FlightSoftware/MotorControl/driverlib/sysctl.c b/Apps/FlightSoftware/MotorControl/driverlib/sysctl.c
new file mode 100644
index 000000000..12731b6b9
--- /dev/null
+++ b/Apps/FlightSoftware/MotorControl/driverlib/sysctl.c
@@ -0,0 +1,131 @@
+/* --COPYRIGHT--,BSD
+ * Copyright (c) 2017, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * --/COPYRIGHT--*/
+//*****************************************************************************
+//
+// sysctl.c - Driver for the sysctl Module.
+//
+//*****************************************************************************
+
+//*****************************************************************************
+//
+//! \addtogroup sysctl_api sysctl
+//! @{
+//
+//*****************************************************************************
+
+#include "inc/hw_memmap.h"
+
+#ifdef __MSP430_HAS_SYS__
+#include "sysctl.h"
+
+#include
+
+void SysCtl_enableDedicatedJTAGPins (void)
+{
+ HWREG8(SYS_BASE + OFS_SYSCTL_L) |= SYSJTAGPIN;
+}
+
+uint8_t SysCtl_getBSLEntryIndication (void)
+{
+ if ( HWREG8(SYS_BASE + OFS_SYSCTL_L) & SYSBSLIND){
+ return (SYSCTL_BSLENTRY_INDICATED) ;
+ } else {
+ return (SYSCTL_BSLENTRY_NOTINDICATED) ;
+ }
+}
+
+void SysCtl_enablePMMAccessProtect (void)
+{
+ HWREG8(SYS_BASE + OFS_SYSCTL_L) |= SYSPMMPE;
+}
+
+void SysCtl_enableRAMBasedInterruptVectors (void)
+{
+ HWREG8(SYS_BASE + OFS_SYSCTL_L) |= SYSRIVECT;
+}
+
+void SysCtl_disableRAMBasedInterruptVectors (void)
+{
+ HWREG8(SYS_BASE + OFS_SYSCTL_L) &= ~(SYSRIVECT);
+}
+
+void SysCtl_initJTAGMailbox (uint8_t mailboxSizeSelect,
+ uint8_t autoClearInboxFlagSelect)
+{
+ HWREG8(SYS_BASE + OFS_SYSJMBC_L) &= ~(JMBCLR1OFF + JMBCLR0OFF + JMBMODE);
+ HWREG8(SYS_BASE + OFS_SYSJMBC_L) |=
+ mailboxSizeSelect + autoClearInboxFlagSelect;
+}
+
+uint8_t SysCtl_getJTAGMailboxFlagStatus (uint8_t mailboxFlagMask)
+{
+ return ( HWREG8(SYS_BASE + OFS_SYSJMBC_L) & mailboxFlagMask);
+}
+
+void SysCtl_clearJTAGMailboxFlagStatus (uint8_t mailboxFlagMask)
+{
+ HWREG8(SYS_BASE + OFS_SYSJMBC_L) &= ~(mailboxFlagMask);
+}
+
+uint16_t SysCtl_getJTAGInboxMessage16Bit (uint8_t inboxSelect)
+{
+ return ( HWREG16(SYS_BASE + OFS_SYSJMBI0 + inboxSelect) );
+}
+
+uint32_t SysCtl_getJTAGInboxMessage32Bit (void)
+{
+ uint32_t JTAGInboxMessageLow = HWREG16(SYS_BASE + OFS_SYSJMBI0);
+ uint32_t JTAGInboxMessageHigh = HWREG16(SYS_BASE + OFS_SYSJMBI1);
+
+ return ( (JTAGInboxMessageHigh << 16) + JTAGInboxMessageLow );
+}
+
+void SysCtl_setJTAGOutgoingMessage16Bit (uint8_t outboxSelect,
+ uint16_t outgoingMessage)
+{
+ HWREG16(SYS_BASE + OFS_SYSJMBO0 + outboxSelect) = outgoingMessage;
+}
+
+void SysCtl_setJTAGOutgoingMessage32Bit (uint32_t outgoingMessage)
+{
+ HWREG16(SYS_BASE + OFS_SYSJMBO0) = (outgoingMessage);
+ HWREG16(SYS_BASE + OFS_SYSJMBO1) = (outgoingMessage >> 16);
+}
+
+
+#endif
+//*****************************************************************************
+//
+//! Close the doxygen group for sysctl_api
+//! @}
+//
+//*****************************************************************************
diff --git a/Apps/FlightSoftware/MotorControl/driverlib/sysctl.h b/Apps/FlightSoftware/MotorControl/driverlib/sysctl.h
new file mode 100644
index 000000000..64f8ab9b0
--- /dev/null
+++ b/Apps/FlightSoftware/MotorControl/driverlib/sysctl.h
@@ -0,0 +1,356 @@
+/* --COPYRIGHT--,BSD
+ * Copyright (c) 2017, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * --/COPYRIGHT--*/
+//*****************************************************************************
+//
+// sysctl.h - Driver for the SYSCTL Module.
+//
+//*****************************************************************************
+
+#ifndef __MSP430WARE_SYSCTL_H__
+#define __MSP430WARE_SYSCTL_H__
+
+#include "inc/hw_memmap.h"
+
+#ifdef __MSP430_HAS_SYS__
+
+//*****************************************************************************
+//
+// If building with a C++ compiler, make all of the definitions in this header
+// have a C binding.
+//
+//*****************************************************************************
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the mailboxSizeSelect
+// parameter for functions: SysCtl_initJTAGMailbox().
+//
+//*****************************************************************************
+#define SYSCTL_JTAGMBSIZE_16BIT (!(JMBMODE))
+#define SYSCTL_JTAGMBSIZE_32BIT (JMBMODE)
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the autoClearInboxFlagSelect
+// parameter for functions: SysCtl_initJTAGMailbox().
+//
+//*****************************************************************************
+#define SYSCTL_JTAGINBOX0AUTO_JTAGINBOX1AUTO (!(JMBCLR0OFF + JMBCLR1OFF))
+#define SYSCTL_JTAGINBOX0AUTO_JTAGINBOX1SW (JMBCLR1OFF)
+#define SYSCTL_JTAGINBOX0SW_JTAGINBOX1AUTO (JMBCLR0OFF)
+#define SYSCTL_JTAGINBOX0SW_JTAGINBOX1SW (JMBCLR0OFF + JMBCLR1OFF)
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the mailboxFlagMask parameter
+// for functions: SysCtl_getJTAGMailboxFlagStatus(), and
+// SysCtl_clearJTAGMailboxFlagStatus().
+//
+//*****************************************************************************
+#define SYSCTL_JTAGOUTBOX_FLAG0 (JMBOUT0FG)
+#define SYSCTL_JTAGOUTBOX_FLAG1 (JMBOUT1FG)
+#define SYSCTL_JTAGINBOX_FLAG0 (JMBIN0FG)
+#define SYSCTL_JTAGINBOX_FLAG1 (JMBIN1FG)
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the inboxSelect parameter for
+// functions: SysCtl_getJTAGInboxMessage16Bit().
+//
+//*****************************************************************************
+#define SYSCTL_JTAGINBOX_0 (0x0)
+#define SYSCTL_JTAGINBOX_1 (0x2)
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the outboxSelect parameter
+// for functions: SysCtl_setJTAGOutgoingMessage16Bit().
+//
+//*****************************************************************************
+#define SYSCTL_JTAGOUTBOX_0 (0x0)
+#define SYSCTL_JTAGOUTBOX_1 (0x2)
+
+//*****************************************************************************
+//
+// The following are values that can be passed toThe following are values that
+// can be returned by the SysCtl_getBSLEntryIndication() function.
+//
+//*****************************************************************************
+#define SYSCTL_BSLENTRY_INDICATED (0x1)
+#define SYSCTL_BSLENTRY_NOTINDICATED (0x0)
+
+//*****************************************************************************
+//
+// Prototypes for the APIs.
+//
+//*****************************************************************************
+
+//*****************************************************************************
+//
+//! \brief Sets the JTAG pins to be exclusively for JTAG until a BOR occurs.
+//!
+//! This function sets the JTAG pins to be exclusively used for the JTAG, and
+//! not to be shared with the GPIO pins. This setting can only be cleared when
+//! a BOR occurs.
+//!
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void SysCtl_enableDedicatedJTAGPins(void);
+
+//*****************************************************************************
+//
+//! \brief Returns the indication of a BSL entry sequence from the Spy-Bi-Wire.
+//!
+//! This function returns the indication of a BSL entry sequence from the Spy-
+//! Bi-Wire.
+//!
+//!
+//! \return One of the following:
+//! - \b SYSCTL_BSLENTRY_INDICATED
+//! - \b SYSCTL_BSLENTRY_NOTINDICATED
+//! \n indicating if a BSL entry sequence was detected
+//
+//*****************************************************************************
+extern uint8_t SysCtl_getBSLEntryIndication(void);
+
+//*****************************************************************************
+//
+//! \brief Enables PMM Access Protection.
+//!
+//! This function enables the PMM Access Protection, which will lock any
+//! changes on the PMM control registers until a BOR occurs.
+//!
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void SysCtl_enablePMMAccessProtect(void);
+
+//*****************************************************************************
+//
+//! \brief Enables RAM-based Interrupt Vectors.
+//!
+//! This function enables RAM-base Interrupt Vectors, which means that
+//! interrupt vectors are generated with the end address at the top of RAM,
+//! instead of the top of the lower 64kB of flash.
+//!
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void SysCtl_enableRAMBasedInterruptVectors(void);
+
+//*****************************************************************************
+//
+//! \brief Disables RAM-based Interrupt Vectors.
+//!
+//! This function disables the interrupt vectors from being generated at the
+//! top of the RAM.
+//!
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void SysCtl_disableRAMBasedInterruptVectors(void);
+
+//*****************************************************************************
+//
+//! \brief Initializes JTAG Mailbox with selected properties.
+//!
+//! This function sets the specified settings for the JTAG Mailbox system. The
+//! settings that can be set are the size of the JTAG messages, and the auto-
+//! clearing of the inbox flags. If the inbox flags are set to auto-clear, then
+//! the inbox flags will be cleared upon reading of the inbox message buffer,
+//! otherwise they will have to be reset by software using the
+//! SYS_clearJTAGMailboxFlagStatus() function.
+//!
+//! \param mailboxSizeSelect is the size of the JTAG Mailboxes, whether 16- or
+//! 32-bits.
+//! Valid values are:
+//! - \b SYSCTL_JTAGMBSIZE_16BIT [Default] - the JTAG messages will take
+//! up only one JTAG mailbox (i. e. an outgoing message will take up
+//! only 1 outbox of the JTAG mailboxes)
+//! - \b SYSCTL_JTAGMBSIZE_32BIT - the JTAG messages will be contained
+//! within both JTAG mailboxes (i. e. an outgoing message will take
+//! up both Outboxes of the JTAG mailboxes)
+//! \n Modified bits are \b JMBMODE of \b SYSJMBC register.
+//! \param autoClearInboxFlagSelect decides how the JTAG inbox flags should be
+//! cleared, whether automatically after the corresponding outbox has
+//! been written to, or manually by software.
+//! Valid values are:
+//! - \b SYSCTL_JTAGINBOX0AUTO_JTAGINBOX1AUTO [Default] - both JTAG
+//! inbox flags will be reset automatically when the corresponding
+//! inbox is read from.
+//! - \b SYSCTL_JTAGINBOX0AUTO_JTAGINBOX1SW - only JTAG inbox 0 flag is
+//! reset automatically, while JTAG inbox 1 is reset with the
+//! - \b SYSCTL_JTAGINBOX0SW_JTAGINBOX1AUTO - only JTAG inbox 1 flag is
+//! reset automatically, while JTAG inbox 0 is reset with the
+//! - \b SYSCTL_JTAGINBOX0SW_JTAGINBOX1SW - both JTAG inbox flags will
+//! need to be reset manually by the
+//! \n Modified bits are \b JMBCLR0OFF and \b JMBCLR1OFF of \b SYSJMBC
+//! register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void SysCtl_initJTAGMailbox(uint8_t mailboxSizeSelect,
+ uint8_t autoClearInboxFlagSelect);
+
+//*****************************************************************************
+//
+//! \brief Returns the status of the selected JTAG Mailbox flags.
+//!
+//! This function will return the status of the selected JTAG Mailbox flags in
+//! bit mask format matching that passed into the mailboxFlagMask parameter.
+//!
+//! \param mailboxFlagMask is the bit mask of JTAG mailbox flags that the
+//! status of should be returned.
+//! Mask value is the logical OR of any of the following:
+//! - \b SYSCTL_JTAGOUTBOX_FLAG0 - flag for JTAG outbox 0
+//! - \b SYSCTL_JTAGOUTBOX_FLAG1 - flag for JTAG outbox 1
+//! - \b SYSCTL_JTAGINBOX_FLAG0 - flag for JTAG inbox 0
+//! - \b SYSCTL_JTAGINBOX_FLAG1 - flag for JTAG inbox 1
+//!
+//! \return A bit mask of the status of the selected mailbox flags.
+//
+//*****************************************************************************
+extern uint8_t SysCtl_getJTAGMailboxFlagStatus(uint8_t mailboxFlagMask);
+
+//*****************************************************************************
+//
+//! \brief Clears the status of the selected JTAG Mailbox flags.
+//!
+//! This function clears the selected JTAG Mailbox flags.
+//!
+//! \param mailboxFlagMask is the bit mask of JTAG mailbox flags that the
+//! status of should be cleared.
+//! Mask value is the logical OR of any of the following:
+//! - \b SYSCTL_JTAGOUTBOX_FLAG0 - flag for JTAG outbox 0
+//! - \b SYSCTL_JTAGOUTBOX_FLAG1 - flag for JTAG outbox 1
+//! - \b SYSCTL_JTAGINBOX_FLAG0 - flag for JTAG inbox 0
+//! - \b SYSCTL_JTAGINBOX_FLAG1 - flag for JTAG inbox 1
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void SysCtl_clearJTAGMailboxFlagStatus(uint8_t mailboxFlagMask);
+
+//*****************************************************************************
+//
+//! \brief Returns the contents of the selected JTAG Inbox in a 16 bit format.
+//!
+//! This function returns the message contents of the selected JTAG inbox. If
+//! the auto clear settings for the Inbox flags were set, then using this
+//! function will automatically clear the corresponding JTAG inbox flag.
+//!
+//! \param inboxSelect is the chosen JTAG inbox that the contents of should be
+//! returned
+//! Valid values are:
+//! - \b SYSCTL_JTAGINBOX_0 - return contents of JTAG inbox 0
+//! - \b SYSCTL_JTAGINBOX_1 - return contents of JTAG inbox 1
+//!
+//! \return The contents of the selected JTAG inbox in a 16 bit format.
+//
+//*****************************************************************************
+extern uint16_t SysCtl_getJTAGInboxMessage16Bit(uint8_t inboxSelect);
+
+//*****************************************************************************
+//
+//! \brief Returns the contents of JTAG Inboxes in a 32 bit format.
+//!
+//! This function returns the message contents of both JTAG inboxes in a 32 bit
+//! format. This function should be used if 32-bit messaging has been set in
+//! the SYS_initJTAGMailbox() function. If the auto clear settings for the
+//! Inbox flags were set, then using this function will automatically clear
+//! both JTAG inbox flags.
+//!
+//!
+//! \return The contents of both JTAG messages in a 32 bit format.
+//
+//*****************************************************************************
+extern uint32_t SysCtl_getJTAGInboxMessage32Bit(void);
+
+//*****************************************************************************
+//
+//! \brief Sets a 16 bit outgoing message in to the selected JTAG Outbox.
+//!
+//! This function sets the outgoing message in the selected JTAG outbox. The
+//! corresponding JTAG outbox flag is cleared after this function, and set
+//! after the JTAG has read the message.
+//!
+//! \param outboxSelect is the chosen JTAG outbox that the message should be
+//! set it.
+//! Valid values are:
+//! - \b SYSCTL_JTAGOUTBOX_0 - set the contents of JTAG outbox 0
+//! - \b SYSCTL_JTAGOUTBOX_1 - set the contents of JTAG outbox 1
+//! \param outgoingMessage is the message to send to the JTAG.
+//! \n Modified bits are \b MSGHI and \b MSGLO of \b SYSJMBOx register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void SysCtl_setJTAGOutgoingMessage16Bit(uint8_t outboxSelect,
+ uint16_t outgoingMessage);
+
+//*****************************************************************************
+//
+//! \brief Sets a 32 bit message in to both JTAG Outboxes.
+//!
+//! This function sets the 32-bit outgoing message in both JTAG outboxes. The
+//! JTAG outbox flags are cleared after this function, and set after the JTAG
+//! has read the message.
+//!
+//! \param outgoingMessage is the message to send to the JTAG.
+//! \n Modified bits are \b MSGHI and \b MSGLO of \b SYSJMBOx register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void SysCtl_setJTAGOutgoingMessage32Bit(uint32_t outgoingMessage);
+
+//*****************************************************************************
+//
+// Mark the end of the C bindings section for C++ compilers.
+//
+//*****************************************************************************
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+#endif // __MSP430WARE_SYSCTL_H__
diff --git a/Apps/FlightSoftware/MotorControl/driverlib/timer_a.c b/Apps/FlightSoftware/MotorControl/driverlib/timer_a.c
new file mode 100644
index 000000000..2c4378609
--- /dev/null
+++ b/Apps/FlightSoftware/MotorControl/driverlib/timer_a.c
@@ -0,0 +1,364 @@
+/* --COPYRIGHT--,BSD
+ * Copyright (c) 2017, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * --/COPYRIGHT--*/
+//*****************************************************************************
+//
+// timer_a.c - Driver for the timer_a Module.
+//
+//*****************************************************************************
+
+//*****************************************************************************
+//
+//! \addtogroup timer_a_api timer_a
+//! @{
+//
+//*****************************************************************************
+
+#include "inc/hw_memmap.h"
+
+#ifdef __MSP430_HAS_TxA7__
+#include "timer_a.h"
+
+#include
+
+void Timer_A_startCounter ( uint16_t baseAddress,
+ uint16_t timerMode
+ )
+{
+ HWREG16(baseAddress + OFS_TAxCTL) &= ~MC_3;
+ HWREG16(baseAddress + OFS_TAxCTL) |= timerMode;
+}
+
+void Timer_A_initContinuousMode (uint16_t baseAddress,
+ Timer_A_initContinuousModeParam *param)
+{
+
+ HWREG16(baseAddress +
+ OFS_TAxCTL) &= ~(TIMER_A_CLOCKSOURCE_INVERTED_EXTERNAL_TXCLK +
+ TIMER_A_UPDOWN_MODE +
+ TIMER_A_DO_CLEAR +
+ TIMER_A_TAIE_INTERRUPT_ENABLE +
+ ID__8
+ );
+ HWREG16(baseAddress + OFS_TAxEX0) &= ~TAIDEX_7;
+
+ HWREG16(baseAddress + OFS_TAxEX0) |= param->clockSourceDivider&0x7;
+ HWREG16(baseAddress + OFS_TAxCTL) |= (param->clockSource +
+ param->timerClear +
+ param->timerInterruptEnable_TAIE +
+ ((param->clockSourceDivider>>3)<<6));
+
+ if(param->startTimer) {
+ HWREG16(baseAddress + OFS_TAxCTL) |= TIMER_A_CONTINUOUS_MODE;
+ }
+}
+
+void Timer_A_initUpMode (uint16_t baseAddress,
+ Timer_A_initUpModeParam *param)
+{
+
+ HWREG16(baseAddress + OFS_TAxCTL) &=
+ ~(TIMER_A_CLOCKSOURCE_INVERTED_EXTERNAL_TXCLK +
+ TIMER_A_UPDOWN_MODE +
+ TIMER_A_DO_CLEAR +
+ TIMER_A_TAIE_INTERRUPT_ENABLE +
+ ID__8
+ );
+ HWREG16(baseAddress + OFS_TAxEX0) &= ~TAIDEX_7;
+
+ HWREG16(baseAddress + OFS_TAxEX0) |= param->clockSourceDivider&0x7;
+ HWREG16(baseAddress + OFS_TAxCTL) |= (param->clockSource +
+ param->timerClear +
+ param->timerInterruptEnable_TAIE +
+ ((param->clockSourceDivider>>3)<<6));
+
+ if (param->startTimer) {
+ HWREG16(baseAddress + OFS_TAxCTL) |= TIMER_A_UP_MODE;
+ }
+
+ if (TIMER_A_CCIE_CCR0_INTERRUPT_ENABLE ==
+ param->captureCompareInterruptEnable_CCR0_CCIE){
+ HWREG16(baseAddress + OFS_TAxCCTL0) |= TIMER_A_CCIE_CCR0_INTERRUPT_ENABLE;
+ } else {
+ HWREG16(baseAddress + OFS_TAxCCTL0) &= ~TIMER_A_CCIE_CCR0_INTERRUPT_ENABLE;
+ }
+
+ HWREG16(baseAddress + OFS_TAxCCR0) = param->timerPeriod;
+}
+
+void Timer_A_initUpDownMode(uint16_t baseAddress,
+ Timer_A_initUpDownModeParam *param)
+{
+ HWREG16(baseAddress + OFS_TAxCTL) &=
+ ~(TIMER_A_CLOCKSOURCE_INVERTED_EXTERNAL_TXCLK +
+ TIMER_A_UPDOWN_MODE +
+ TIMER_A_DO_CLEAR +
+ TIMER_A_TAIE_INTERRUPT_ENABLE +
+ ID__8
+ );
+ HWREG16(baseAddress + OFS_TAxEX0) &= ~TAIDEX_7;
+
+ HWREG16(baseAddress + OFS_TAxEX0) |= param->clockSourceDivider&0x7;
+ HWREG16(baseAddress + OFS_TAxCTL) |= (param->clockSource +
+ param->timerClear +
+ param->timerInterruptEnable_TAIE +
+ ((param->clockSourceDivider>>3)<<6));
+
+ if (param->startTimer) {
+ HWREG16(baseAddress + OFS_TAxCTL) |= TIMER_A_UPDOWN_MODE;
+ }
+
+ if (TIMER_A_CCIE_CCR0_INTERRUPT_ENABLE ==
+ param->captureCompareInterruptEnable_CCR0_CCIE){
+ HWREG16(baseAddress + OFS_TAxCCTL0) |= TIMER_A_CCIE_CCR0_INTERRUPT_ENABLE;
+ } else {
+ HWREG16(baseAddress + OFS_TAxCCTL0) &= ~TIMER_A_CCIE_CCR0_INTERRUPT_ENABLE;
+ }
+
+ HWREG16(baseAddress + OFS_TAxCCR0) = param->timerPeriod;
+}
+
+void Timer_A_initCaptureMode(uint16_t baseAddress,
+ Timer_A_initCaptureModeParam *param)
+{
+ HWREG16(baseAddress + param->captureRegister ) |= CAP;
+
+ HWREG16(baseAddress + param->captureRegister) &=
+ ~(TIMER_A_CAPTUREMODE_RISING_AND_FALLING_EDGE +
+ TIMER_A_CAPTURE_INPUTSELECT_Vcc +
+ TIMER_A_CAPTURE_SYNCHRONOUS +
+ TIMER_A_DO_CLEAR +
+ TIMER_A_TAIE_INTERRUPT_ENABLE +
+ CM_3
+ );
+
+ HWREG16(baseAddress + param->captureRegister) |= (param->captureMode +
+ param->captureInputSelect +
+ param->synchronizeCaptureSource +
+ param->captureInterruptEnable +
+ param->captureOutputMode
+ );
+}
+
+void Timer_A_initCompareMode(uint16_t baseAddress,
+ Timer_A_initCompareModeParam *param)
+{
+ HWREG16(baseAddress + param->compareRegister ) &= ~CAP;
+
+ HWREG16(baseAddress + param->compareRegister) &=
+ ~(TIMER_A_CAPTURECOMPARE_INTERRUPT_ENABLE +
+ TIMER_A_OUTPUTMODE_RESET_SET
+ );
+
+ HWREG16(baseAddress + param->compareRegister) |= (param->compareInterruptEnable +
+ param->compareOutputMode
+ );
+
+ HWREG16(baseAddress + param->compareRegister + OFS_TAxR) = param->compareValue;
+}
+
+void Timer_A_enableInterrupt (uint16_t baseAddress)
+{
+ HWREG16(baseAddress + OFS_TAxCTL) |= TAIE;
+}
+
+void Timer_A_disableInterrupt (uint16_t baseAddress)
+{
+ HWREG16(baseAddress + OFS_TAxCTL) &= ~TAIE;
+}
+
+uint32_t Timer_A_getInterruptStatus (uint16_t baseAddress)
+{
+ return ( HWREG16(baseAddress + OFS_TAxCTL) & TAIFG );
+}
+
+void Timer_A_enableCaptureCompareInterrupt (uint16_t baseAddress,
+ uint16_t captureCompareRegister
+ )
+{
+ HWREG16(baseAddress + captureCompareRegister) |= CCIE;
+}
+
+void Timer_A_disableCaptureCompareInterrupt (uint16_t baseAddress,
+ uint16_t captureCompareRegister
+ )
+{
+ HWREG16(baseAddress + captureCompareRegister) &= ~CCIE;
+}
+
+uint32_t Timer_A_getCaptureCompareInterruptStatus (uint16_t baseAddress,
+ uint16_t captureCompareRegister,
+ uint16_t mask
+ )
+{
+ return ( HWREG16(baseAddress + captureCompareRegister) & mask );
+}
+
+void Timer_A_clear (uint16_t baseAddress)
+{
+ HWREG16(baseAddress + OFS_TAxCTL) |= TACLR;
+}
+
+uint8_t Timer_A_getSynchronizedCaptureCompareInput
+ (uint16_t baseAddress,
+ uint16_t captureCompareRegister,
+ uint16_t synchronized
+ )
+{
+ if (HWREG16(baseAddress + captureCompareRegister) & synchronized){
+ return ( TIMER_A_CAPTURECOMPARE_INPUT_HIGH) ;
+ } else {
+ return ( TIMER_A_CAPTURECOMPARE_INPUT_LOW) ;
+ }
+}
+
+uint8_t Timer_A_getOutputForOutputModeOutBitValue
+ (uint16_t baseAddress,
+ uint16_t captureCompareRegister
+ )
+{
+ if (HWREG16(baseAddress + captureCompareRegister) & OUT){
+ return ( TIMER_A_OUTPUTMODE_OUTBITVALUE_HIGH) ;
+ } else {
+ return ( TIMER_A_OUTPUTMODE_OUTBITVALUE_LOW) ;
+ }
+}
+
+uint16_t Timer_A_getCaptureCompareCount
+ (uint16_t baseAddress,
+ uint16_t captureCompareRegister
+ )
+{
+ return (HWREG16(baseAddress + OFS_TAxR + captureCompareRegister));
+}
+
+void Timer_A_setOutputForOutputModeOutBitValue
+ (uint16_t baseAddress,
+ uint16_t captureCompareRegister,
+ uint8_t outputModeOutBitValue
+ )
+{
+
+ HWREG16(baseAddress + captureCompareRegister) &= ~OUT;
+ HWREG16(baseAddress + captureCompareRegister) |= outputModeOutBitValue;
+}
+
+void Timer_A_outputPWM(uint16_t baseAddress, Timer_A_outputPWMParam *param)
+{
+ HWREG16(baseAddress + OFS_TAxCTL) &=
+ ~( TIMER_A_CLOCKSOURCE_INVERTED_EXTERNAL_TXCLK +
+ TIMER_A_UPDOWN_MODE + TIMER_A_DO_CLEAR +
+ TIMER_A_TAIE_INTERRUPT_ENABLE +
+ ID__8
+ );
+ HWREG16(baseAddress + OFS_TAxEX0) &= ~TAIDEX_7;
+
+ HWREG16(baseAddress + OFS_TAxEX0) |= param->clockSourceDivider&0x7;
+ HWREG16(baseAddress + OFS_TAxCTL) |= (param->clockSource +
+ TIMER_A_UP_MODE +
+ TIMER_A_DO_CLEAR +
+ ((param->clockSourceDivider>>3)<<6));
+
+ HWREG16(baseAddress + OFS_TAxCCR0) = param->timerPeriod;
+
+ HWREG16(baseAddress + OFS_TAxCCTL0) &=
+ ~(TIMER_A_CAPTURECOMPARE_INTERRUPT_ENABLE +
+ TIMER_A_OUTPUTMODE_RESET_SET);
+
+ HWREG16(baseAddress + param->compareRegister) |= param->compareOutputMode;
+
+ HWREG16(baseAddress + param->compareRegister + OFS_TAxR) = param->dutyCycle;
+}
+
+void Timer_A_stop ( uint16_t baseAddress )
+{
+ HWREG16(baseAddress + OFS_TAxCTL) &= ~MC_3;
+}
+
+void Timer_A_setCompareValue ( uint16_t baseAddress,
+ uint16_t compareRegister,
+ uint16_t compareValue
+ )
+{
+ HWREG16(baseAddress + compareRegister + OFS_TAxR) = compareValue;
+}
+
+void Timer_A_setOutputMode(uint16_t baseAddress,
+ uint16_t compareRegister,
+ uint16_t compareOutputMode)
+{
+ uint16_t temp = HWREG16(baseAddress + compareRegister);
+ HWREG16(baseAddress + compareRegister) = temp & ~(OUTMOD_7) | compareOutputMode;
+}
+void Timer_A_clearTimerInterrupt (uint16_t baseAddress)
+{
+ HWREG16(baseAddress + OFS_TAxCTL) &= ~TAIFG;
+}
+
+void Timer_A_clearCaptureCompareInterrupt (uint16_t baseAddress,
+ uint16_t captureCompareRegister
+ )
+{
+ HWREG16(baseAddress + captureCompareRegister) &= ~CCIFG;
+}
+
+uint16_t Timer_A_getCounterValue (uint16_t baseAddress)
+{
+ uint16_t voteOne, voteTwo, res;
+
+ voteTwo = HWREG16(baseAddress + OFS_TAxR);
+
+ do
+ {
+ voteOne = voteTwo;
+ voteTwo = HWREG16(baseAddress + OFS_TAxR);
+
+ if(voteTwo > voteOne) {
+ res = voteTwo - voteOne;
+ } else if(voteOne > voteTwo) {
+ res = voteOne - voteTwo;
+ } else{
+ res = 0;
+ }
+
+ } while ( res > TIMER_A_THRESHOLD);
+
+ return voteTwo;
+}
+
+
+#endif
+//*****************************************************************************
+//
+//! Close the doxygen group for timer_a_api
+//! @}
+//
+//*****************************************************************************
diff --git a/Apps/FlightSoftware/MotorControl/driverlib/timer_a.h b/Apps/FlightSoftware/MotorControl/driverlib/timer_a.h
new file mode 100644
index 000000000..1f8972add
--- /dev/null
+++ b/Apps/FlightSoftware/MotorControl/driverlib/timer_a.h
@@ -0,0 +1,1097 @@
+/* --COPYRIGHT--,BSD
+ * Copyright (c) 2017, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * --/COPYRIGHT--*/
+//*****************************************************************************
+//
+// timer_a.h - Driver for the TIMER_A Module.
+//
+//*****************************************************************************
+
+#ifndef __MSP430WARE_TIMER_A_H__
+#define __MSP430WARE_TIMER_A_H__
+
+#include "inc/hw_memmap.h"
+
+#ifdef __MSP430_HAS_TxA7__
+
+//*****************************************************************************
+//
+// If building with a C++ compiler, make all of the definitions in this header
+// have a C binding.
+//
+//*****************************************************************************
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+#include "inc/hw_memmap.h"
+//*****************************************************************************
+//
+// The following is a parameter used for Timer_A_getCounterValue that
+// determines the maximum difference in counts of the TAxR register for a
+// majority vote.
+//
+//*****************************************************************************
+#define TIMER_A_THRESHOLD 50
+
+//*****************************************************************************
+//
+//! \brief Used in the Timer_A_initContinuousMode() function as the param
+//! parameter.
+//
+//*****************************************************************************
+typedef struct Timer_A_initContinuousModeParam {
+ //! Selects Clock source.
+ //! \n Valid values are:
+ //! - \b TIMER_A_CLOCKSOURCE_EXTERNAL_TXCLK [Default]
+ //! - \b TIMER_A_CLOCKSOURCE_ACLK
+ //! - \b TIMER_A_CLOCKSOURCE_SMCLK
+ //! - \b TIMER_A_CLOCKSOURCE_INVERTED_EXTERNAL_TXCLK
+ uint16_t clockSource;
+ //! Is the desired divider for the clock source
+ //! \n Valid values are:
+ //! - \b TIMER_A_CLOCKSOURCE_DIVIDER_1 [Default]
+ //! - \b TIMER_A_CLOCKSOURCE_DIVIDER_2
+ //! - \b TIMER_A_CLOCKSOURCE_DIVIDER_3
+ //! - \b TIMER_A_CLOCKSOURCE_DIVIDER_4
+ //! - \b TIMER_A_CLOCKSOURCE_DIVIDER_5
+ //! - \b TIMER_A_CLOCKSOURCE_DIVIDER_6
+ //! - \b TIMER_A_CLOCKSOURCE_DIVIDER_7
+ //! - \b TIMER_A_CLOCKSOURCE_DIVIDER_8
+ //! - \b TIMER_A_CLOCKSOURCE_DIVIDER_10
+ //! - \b TIMER_A_CLOCKSOURCE_DIVIDER_12
+ //! - \b TIMER_A_CLOCKSOURCE_DIVIDER_14
+ //! - \b TIMER_A_CLOCKSOURCE_DIVIDER_16
+ //! - \b TIMER_A_CLOCKSOURCE_DIVIDER_20
+ //! - \b TIMER_A_CLOCKSOURCE_DIVIDER_24
+ //! - \b TIMER_A_CLOCKSOURCE_DIVIDER_28
+ //! - \b TIMER_A_CLOCKSOURCE_DIVIDER_32
+ //! - \b TIMER_A_CLOCKSOURCE_DIVIDER_40
+ //! - \b TIMER_A_CLOCKSOURCE_DIVIDER_48
+ //! - \b TIMER_A_CLOCKSOURCE_DIVIDER_56
+ //! - \b TIMER_A_CLOCKSOURCE_DIVIDER_64
+ uint16_t clockSourceDivider;
+ //! Is to enable or disable Timer_A interrupt
+ //! \n Valid values are:
+ //! - \b TIMER_A_TAIE_INTERRUPT_ENABLE
+ //! - \b TIMER_A_TAIE_INTERRUPT_DISABLE [Default]
+ uint16_t timerInterruptEnable_TAIE;
+ //! Decides if Timer_A clock divider, count direction, count need to be
+ //! reset.
+ //! \n Valid values are:
+ //! - \b TIMER_A_DO_CLEAR
+ //! - \b TIMER_A_SKIP_CLEAR [Default]
+ uint16_t timerClear;
+ //! Whether to start the timer immediately
+ bool startTimer;
+} Timer_A_initContinuousModeParam;
+
+//*****************************************************************************
+//
+//! \brief Used in the Timer_A_initCaptureMode() function as the param
+//! parameter.
+//
+//*****************************************************************************
+typedef struct Timer_A_initCaptureModeParam {
+ //! Selects the Capture register being used. Refer to datasheet to ensure
+ //! the device has the capture compare register being used.
+ //! \n Valid values are:
+ //! - \b TIMER_A_CAPTURECOMPARE_REGISTER_0
+ //! - \b TIMER_A_CAPTURECOMPARE_REGISTER_1
+ //! - \b TIMER_A_CAPTURECOMPARE_REGISTER_2
+ //! - \b TIMER_A_CAPTURECOMPARE_REGISTER_3
+ //! - \b TIMER_A_CAPTURECOMPARE_REGISTER_4
+ //! - \b TIMER_A_CAPTURECOMPARE_REGISTER_5
+ //! - \b TIMER_A_CAPTURECOMPARE_REGISTER_6
+ uint16_t captureRegister;
+ //! Is the capture mode selected.
+ //! \n Valid values are:
+ //! - \b TIMER_A_CAPTUREMODE_NO_CAPTURE [Default]
+ //! - \b TIMER_A_CAPTUREMODE_RISING_EDGE
+ //! - \b TIMER_A_CAPTUREMODE_FALLING_EDGE
+ //! - \b TIMER_A_CAPTUREMODE_RISING_AND_FALLING_EDGE
+ uint16_t captureMode;
+ //! Decides the Input Select
+ //! \n Valid values are:
+ //! - \b TIMER_A_CAPTURE_INPUTSELECT_CCIxA
+ //! - \b TIMER_A_CAPTURE_INPUTSELECT_CCIxB
+ //! - \b TIMER_A_CAPTURE_INPUTSELECT_GND
+ //! - \b TIMER_A_CAPTURE_INPUTSELECT_Vcc
+ uint16_t captureInputSelect;
+ //! Decides if capture source should be synchronized with timer clock
+ //! \n Valid values are:
+ //! - \b TIMER_A_CAPTURE_ASYNCHRONOUS [Default]
+ //! - \b TIMER_A_CAPTURE_SYNCHRONOUS
+ uint16_t synchronizeCaptureSource;
+ //! Is to enable or disable timer captureComapre interrupt.
+ //! \n Valid values are:
+ //! - \b TIMER_A_CAPTURECOMPARE_INTERRUPT_DISABLE [Default]
+ //! - \b TIMER_A_CAPTURECOMPARE_INTERRUPT_ENABLE
+ uint16_t captureInterruptEnable;
+ //! Specifies the output mode.
+ //! \n Valid values are:
+ //! - \b TIMER_A_OUTPUTMODE_OUTBITVALUE [Default]
+ //! - \b TIMER_A_OUTPUTMODE_SET
+ //! - \b TIMER_A_OUTPUTMODE_TOGGLE_RESET
+ //! - \b TIMER_A_OUTPUTMODE_SET_RESET
+ //! - \b TIMER_A_OUTPUTMODE_TOGGLE
+ //! - \b TIMER_A_OUTPUTMODE_RESET
+ //! - \b TIMER_A_OUTPUTMODE_TOGGLE_SET
+ //! - \b TIMER_A_OUTPUTMODE_RESET_SET
+ uint16_t captureOutputMode;
+} Timer_A_initCaptureModeParam;
+
+//*****************************************************************************
+//
+//! \brief Used in the Timer_A_initUpDownMode() function as the param
+//! parameter.
+//
+//*****************************************************************************
+typedef struct Timer_A_initUpDownModeParam {
+ //! Selects Clock source.
+ //! \n Valid values are:
+ //! - \b TIMER_A_CLOCKSOURCE_EXTERNAL_TXCLK [Default]
+ //! - \b TIMER_A_CLOCKSOURCE_ACLK
+ //! - \b TIMER_A_CLOCKSOURCE_SMCLK
+ //! - \b TIMER_A_CLOCKSOURCE_INVERTED_EXTERNAL_TXCLK
+ uint16_t clockSource;
+ //! Is the desired divider for the clock source
+ //! \n Valid values are:
+ //! - \b TIMER_A_CLOCKSOURCE_DIVIDER_1 [Default]
+ //! - \b TIMER_A_CLOCKSOURCE_DIVIDER_2
+ //! - \b TIMER_A_CLOCKSOURCE_DIVIDER_3
+ //! - \b TIMER_A_CLOCKSOURCE_DIVIDER_4
+ //! - \b TIMER_A_CLOCKSOURCE_DIVIDER_5
+ //! - \b TIMER_A_CLOCKSOURCE_DIVIDER_6
+ //! - \b TIMER_A_CLOCKSOURCE_DIVIDER_7
+ //! - \b TIMER_A_CLOCKSOURCE_DIVIDER_8
+ //! - \b TIMER_A_CLOCKSOURCE_DIVIDER_10
+ //! - \b TIMER_A_CLOCKSOURCE_DIVIDER_12
+ //! - \b TIMER_A_CLOCKSOURCE_DIVIDER_14
+ //! - \b TIMER_A_CLOCKSOURCE_DIVIDER_16
+ //! - \b TIMER_A_CLOCKSOURCE_DIVIDER_20
+ //! - \b TIMER_A_CLOCKSOURCE_DIVIDER_24
+ //! - \b TIMER_A_CLOCKSOURCE_DIVIDER_28
+ //! - \b TIMER_A_CLOCKSOURCE_DIVIDER_32
+ //! - \b TIMER_A_CLOCKSOURCE_DIVIDER_40
+ //! - \b TIMER_A_CLOCKSOURCE_DIVIDER_48
+ //! - \b TIMER_A_CLOCKSOURCE_DIVIDER_56
+ //! - \b TIMER_A_CLOCKSOURCE_DIVIDER_64
+ uint16_t clockSourceDivider;
+ //! Is the specified Timer_A period
+ uint16_t timerPeriod;
+ //! Is to enable or disable Timer_A interrupt
+ //! \n Valid values are:
+ //! - \b TIMER_A_TAIE_INTERRUPT_ENABLE
+ //! - \b TIMER_A_TAIE_INTERRUPT_DISABLE [Default]
+ uint16_t timerInterruptEnable_TAIE;
+ //! Is to enable or disable Timer_A CCR0 captureComapre interrupt.
+ //! \n Valid values are:
+ //! - \b TIMER_A_CCIE_CCR0_INTERRUPT_ENABLE
+ //! - \b TIMER_A_CCIE_CCR0_INTERRUPT_DISABLE [Default]
+ uint16_t captureCompareInterruptEnable_CCR0_CCIE;
+ //! Decides if Timer_A clock divider, count direction, count need to be
+ //! reset.
+ //! \n Valid values are:
+ //! - \b TIMER_A_DO_CLEAR
+ //! - \b TIMER_A_SKIP_CLEAR [Default]
+ uint16_t timerClear;
+ //! Whether to start the timer immediately
+ bool startTimer;
+} Timer_A_initUpDownModeParam;
+
+//*****************************************************************************
+//
+//! \brief Used in the Timer_A_outputPWM() function as the param parameter.
+//
+//*****************************************************************************
+typedef struct Timer_A_outputPWMParam {
+ //! Selects Clock source.
+ //! \n Valid values are:
+ //! - \b TIMER_A_CLOCKSOURCE_EXTERNAL_TXCLK [Default]
+ //! - \b TIMER_A_CLOCKSOURCE_ACLK
+ //! - \b TIMER_A_CLOCKSOURCE_SMCLK
+ //! - \b TIMER_A_CLOCKSOURCE_INVERTED_EXTERNAL_TXCLK
+ uint16_t clockSource;
+ //! Is the desired divider for the clock source
+ //! \n Valid values are:
+ //! - \b TIMER_A_CLOCKSOURCE_DIVIDER_1 [Default]
+ //! - \b TIMER_A_CLOCKSOURCE_DIVIDER_2
+ //! - \b TIMER_A_CLOCKSOURCE_DIVIDER_3
+ //! - \b TIMER_A_CLOCKSOURCE_DIVIDER_4
+ //! - \b TIMER_A_CLOCKSOURCE_DIVIDER_5
+ //! - \b TIMER_A_CLOCKSOURCE_DIVIDER_6
+ //! - \b TIMER_A_CLOCKSOURCE_DIVIDER_7
+ //! - \b TIMER_A_CLOCKSOURCE_DIVIDER_8
+ //! - \b TIMER_A_CLOCKSOURCE_DIVIDER_10
+ //! - \b TIMER_A_CLOCKSOURCE_DIVIDER_12
+ //! - \b TIMER_A_CLOCKSOURCE_DIVIDER_14
+ //! - \b TIMER_A_CLOCKSOURCE_DIVIDER_16
+ //! - \b TIMER_A_CLOCKSOURCE_DIVIDER_20
+ //! - \b TIMER_A_CLOCKSOURCE_DIVIDER_24
+ //! - \b TIMER_A_CLOCKSOURCE_DIVIDER_28
+ //! - \b TIMER_A_CLOCKSOURCE_DIVIDER_32
+ //! - \b TIMER_A_CLOCKSOURCE_DIVIDER_40
+ //! - \b TIMER_A_CLOCKSOURCE_DIVIDER_48
+ //! - \b TIMER_A_CLOCKSOURCE_DIVIDER_56
+ //! - \b TIMER_A_CLOCKSOURCE_DIVIDER_64
+ uint16_t clockSourceDivider;
+ //! Selects the desired timer period
+ uint16_t timerPeriod;
+ //! Selects the compare register being used. Refer to datasheet to ensure
+ //! the device has the capture compare register being used.
+ //! \n Valid values are:
+ //! - \b TIMER_A_CAPTURECOMPARE_REGISTER_0
+ //! - \b TIMER_A_CAPTURECOMPARE_REGISTER_1
+ //! - \b TIMER_A_CAPTURECOMPARE_REGISTER_2
+ //! - \b TIMER_A_CAPTURECOMPARE_REGISTER_3
+ //! - \b TIMER_A_CAPTURECOMPARE_REGISTER_4
+ //! - \b TIMER_A_CAPTURECOMPARE_REGISTER_5
+ //! - \b TIMER_A_CAPTURECOMPARE_REGISTER_6
+ uint16_t compareRegister;
+ //! Specifies the output mode.
+ //! \n Valid values are:
+ //! - \b TIMER_A_OUTPUTMODE_OUTBITVALUE [Default]
+ //! - \b TIMER_A_OUTPUTMODE_SET
+ //! - \b TIMER_A_OUTPUTMODE_TOGGLE_RESET
+ //! - \b TIMER_A_OUTPUTMODE_SET_RESET
+ //! - \b TIMER_A_OUTPUTMODE_TOGGLE
+ //! - \b TIMER_A_OUTPUTMODE_RESET
+ //! - \b TIMER_A_OUTPUTMODE_TOGGLE_SET
+ //! - \b TIMER_A_OUTPUTMODE_RESET_SET
+ uint16_t compareOutputMode;
+ //! Specifies the dutycycle for the generated waveform
+ uint16_t dutyCycle;
+} Timer_A_outputPWMParam;
+
+//*****************************************************************************
+//
+//! \brief Used in the Timer_A_initUpMode() function as the param parameter.
+//
+//*****************************************************************************
+typedef struct Timer_A_initUpModeParam {
+ //! Selects Clock source.
+ //! \n Valid values are:
+ //! - \b TIMER_A_CLOCKSOURCE_EXTERNAL_TXCLK [Default]
+ //! - \b TIMER_A_CLOCKSOURCE_ACLK
+ //! - \b TIMER_A_CLOCKSOURCE_SMCLK
+ //! - \b TIMER_A_CLOCKSOURCE_INVERTED_EXTERNAL_TXCLK
+ uint16_t clockSource;
+ //! Is the desired divider for the clock source
+ //! \n Valid values are:
+ //! - \b TIMER_A_CLOCKSOURCE_DIVIDER_1 [Default]
+ //! - \b TIMER_A_CLOCKSOURCE_DIVIDER_2
+ //! - \b TIMER_A_CLOCKSOURCE_DIVIDER_3
+ //! - \b TIMER_A_CLOCKSOURCE_DIVIDER_4
+ //! - \b TIMER_A_CLOCKSOURCE_DIVIDER_5
+ //! - \b TIMER_A_CLOCKSOURCE_DIVIDER_6
+ //! - \b TIMER_A_CLOCKSOURCE_DIVIDER_7
+ //! - \b TIMER_A_CLOCKSOURCE_DIVIDER_8
+ //! - \b TIMER_A_CLOCKSOURCE_DIVIDER_10
+ //! - \b TIMER_A_CLOCKSOURCE_DIVIDER_12
+ //! - \b TIMER_A_CLOCKSOURCE_DIVIDER_14
+ //! - \b TIMER_A_CLOCKSOURCE_DIVIDER_16
+ //! - \b TIMER_A_CLOCKSOURCE_DIVIDER_20
+ //! - \b TIMER_A_CLOCKSOURCE_DIVIDER_24
+ //! - \b TIMER_A_CLOCKSOURCE_DIVIDER_28
+ //! - \b TIMER_A_CLOCKSOURCE_DIVIDER_32
+ //! - \b TIMER_A_CLOCKSOURCE_DIVIDER_40
+ //! - \b TIMER_A_CLOCKSOURCE_DIVIDER_48
+ //! - \b TIMER_A_CLOCKSOURCE_DIVIDER_56
+ //! - \b TIMER_A_CLOCKSOURCE_DIVIDER_64
+ uint16_t clockSourceDivider;
+ //! Is the specified Timer_A period. This is the value that gets written
+ //! into the CCR0. Limited to 16 bits[uint16_t]
+ uint16_t timerPeriod;
+ //! Is to enable or disable Timer_A interrupt
+ //! \n Valid values are:
+ //! - \b TIMER_A_TAIE_INTERRUPT_ENABLE
+ //! - \b TIMER_A_TAIE_INTERRUPT_DISABLE [Default]
+ uint16_t timerInterruptEnable_TAIE;
+ //! Is to enable or disable Timer_A CCR0 captureComapre interrupt.
+ //! \n Valid values are:
+ //! - \b TIMER_A_CCIE_CCR0_INTERRUPT_ENABLE
+ //! - \b TIMER_A_CCIE_CCR0_INTERRUPT_DISABLE [Default]
+ uint16_t captureCompareInterruptEnable_CCR0_CCIE;
+ //! Decides if Timer_A clock divider, count direction, count need to be
+ //! reset.
+ //! \n Valid values are:
+ //! - \b TIMER_A_DO_CLEAR
+ //! - \b TIMER_A_SKIP_CLEAR [Default]
+ uint16_t timerClear;
+ //! Whether to start the timer immediately
+ bool startTimer;
+} Timer_A_initUpModeParam;
+
+//*****************************************************************************
+//
+//! \brief Used in the Timer_A_initCompareMode() function as the param
+//! parameter.
+//
+//*****************************************************************************
+typedef struct Timer_A_initCompareModeParam {
+ //! Selects the Capture register being used. Refer to datasheet to ensure
+ //! the device has the capture compare register being used.
+ //! \n Valid values are:
+ //! - \b TIMER_A_CAPTURECOMPARE_REGISTER_0
+ //! - \b TIMER_A_CAPTURECOMPARE_REGISTER_1
+ //! - \b TIMER_A_CAPTURECOMPARE_REGISTER_2
+ //! - \b TIMER_A_CAPTURECOMPARE_REGISTER_3
+ //! - \b TIMER_A_CAPTURECOMPARE_REGISTER_4
+ //! - \b TIMER_A_CAPTURECOMPARE_REGISTER_5
+ //! - \b TIMER_A_CAPTURECOMPARE_REGISTER_6
+ uint16_t compareRegister;
+ //! Is to enable or disable timer captureComapre interrupt.
+ //! \n Valid values are:
+ //! - \b TIMER_A_CAPTURECOMPARE_INTERRUPT_DISABLE [Default]
+ //! - \b TIMER_A_CAPTURECOMPARE_INTERRUPT_ENABLE
+ uint16_t compareInterruptEnable;
+ //! Specifies the output mode.
+ //! \n Valid values are:
+ //! - \b TIMER_A_OUTPUTMODE_OUTBITVALUE [Default]
+ //! - \b TIMER_A_OUTPUTMODE_SET
+ //! - \b TIMER_A_OUTPUTMODE_TOGGLE_RESET
+ //! - \b TIMER_A_OUTPUTMODE_SET_RESET
+ //! - \b TIMER_A_OUTPUTMODE_TOGGLE
+ //! - \b TIMER_A_OUTPUTMODE_RESET
+ //! - \b TIMER_A_OUTPUTMODE_TOGGLE_SET
+ //! - \b TIMER_A_OUTPUTMODE_RESET_SET
+ uint16_t compareOutputMode;
+ //! Is the count to be compared with in compare mode
+ uint16_t compareValue;
+} Timer_A_initCompareModeParam;
+
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the param parameter for
+// functions: Timer_A_initContinuousMode(), Timer_A_initUpMode(),
+// Timer_A_initUpDownMode(), and Timer_A_outputPWM().
+//
+//*****************************************************************************
+#define TIMER_A_CLOCKSOURCE_DIVIDER_1 0x00
+#define TIMER_A_CLOCKSOURCE_DIVIDER_2 0x08
+#define TIMER_A_CLOCKSOURCE_DIVIDER_3 0x02
+#define TIMER_A_CLOCKSOURCE_DIVIDER_4 0x10
+#define TIMER_A_CLOCKSOURCE_DIVIDER_5 0x04
+#define TIMER_A_CLOCKSOURCE_DIVIDER_6 0x05
+#define TIMER_A_CLOCKSOURCE_DIVIDER_7 0x06
+#define TIMER_A_CLOCKSOURCE_DIVIDER_8 0x18
+#define TIMER_A_CLOCKSOURCE_DIVIDER_10 0x0C
+#define TIMER_A_CLOCKSOURCE_DIVIDER_12 0x0D
+#define TIMER_A_CLOCKSOURCE_DIVIDER_14 0x0E
+#define TIMER_A_CLOCKSOURCE_DIVIDER_16 0x0F
+#define TIMER_A_CLOCKSOURCE_DIVIDER_20 0x14
+#define TIMER_A_CLOCKSOURCE_DIVIDER_24 0x15
+#define TIMER_A_CLOCKSOURCE_DIVIDER_28 0x16
+#define TIMER_A_CLOCKSOURCE_DIVIDER_32 0x17
+#define TIMER_A_CLOCKSOURCE_DIVIDER_40 0x1C
+#define TIMER_A_CLOCKSOURCE_DIVIDER_48 0x1D
+#define TIMER_A_CLOCKSOURCE_DIVIDER_56 0x1E
+#define TIMER_A_CLOCKSOURCE_DIVIDER_64 0x1F
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the timerMode parameter for
+// functions: Timer_A_startCounter().
+//
+//*****************************************************************************
+#define TIMER_A_STOP_MODE MC_0
+#define TIMER_A_UP_MODE MC_1
+#define TIMER_A_CONTINUOUS_MODE MC_2
+#define TIMER_A_UPDOWN_MODE MC_3
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the param parameter for
+// functions: Timer_A_initContinuousMode(), Timer_A_initUpMode(), and
+// Timer_A_initUpDownMode().
+//
+//*****************************************************************************
+#define TIMER_A_DO_CLEAR TACLR
+#define TIMER_A_SKIP_CLEAR 0x00
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the param parameter for
+// functions: Timer_A_initContinuousMode(), Timer_A_initUpMode(),
+// Timer_A_initUpDownMode(), and Timer_A_outputPWM().
+//
+//*****************************************************************************
+#define TIMER_A_CLOCKSOURCE_EXTERNAL_TXCLK TASSEL__TACLK
+#define TIMER_A_CLOCKSOURCE_ACLK TASSEL__ACLK
+#define TIMER_A_CLOCKSOURCE_SMCLK TASSEL__SMCLK
+#define TIMER_A_CLOCKSOURCE_INVERTED_EXTERNAL_TXCLK TASSEL__INCLK
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the param parameter for
+// functions: Timer_A_initContinuousMode(), Timer_A_initUpMode(), and
+// Timer_A_initUpDownMode().
+//
+//*****************************************************************************
+#define TIMER_A_TAIE_INTERRUPT_ENABLE TAIE
+#define TIMER_A_TAIE_INTERRUPT_DISABLE 0x00
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the param parameter for
+// functions: Timer_A_initUpMode(), and Timer_A_initUpDownMode().
+//
+//*****************************************************************************
+#define TIMER_A_CCIE_CCR0_INTERRUPT_ENABLE CCIE
+#define TIMER_A_CCIE_CCR0_INTERRUPT_DISABLE 0x00
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the param parameter for
+// functions: Timer_A_initCaptureMode(), and Timer_A_initCompareMode().
+//
+//*****************************************************************************
+#define TIMER_A_CAPTURECOMPARE_INTERRUPT_DISABLE 0x00
+#define TIMER_A_CAPTURECOMPARE_INTERRUPT_ENABLE CCIE
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the param parameter for
+// functions: Timer_A_initCaptureMode().
+//
+//*****************************************************************************
+#define TIMER_A_CAPTURE_INPUTSELECT_CCIxA CCIS_0
+#define TIMER_A_CAPTURE_INPUTSELECT_CCIxB CCIS_1
+#define TIMER_A_CAPTURE_INPUTSELECT_GND CCIS_2
+#define TIMER_A_CAPTURE_INPUTSELECT_Vcc CCIS_3
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the compareOutputMode
+// parameter for functions: Timer_A_setOutputMode(); the param parameter for
+// functions: Timer_A_initCaptureMode(), Timer_A_initCompareMode(), and
+// Timer_A_outputPWM().
+//
+//*****************************************************************************
+#define TIMER_A_OUTPUTMODE_OUTBITVALUE OUTMOD_0
+#define TIMER_A_OUTPUTMODE_SET OUTMOD_1
+#define TIMER_A_OUTPUTMODE_TOGGLE_RESET OUTMOD_2
+#define TIMER_A_OUTPUTMODE_SET_RESET OUTMOD_3
+#define TIMER_A_OUTPUTMODE_TOGGLE OUTMOD_4
+#define TIMER_A_OUTPUTMODE_RESET OUTMOD_5
+#define TIMER_A_OUTPUTMODE_TOGGLE_SET OUTMOD_6
+#define TIMER_A_OUTPUTMODE_RESET_SET OUTMOD_7
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the compareRegister parameter
+// for functions: Timer_A_setCompareValue(), and Timer_A_setOutputMode(); the
+// captureCompareRegister parameter for functions:
+// Timer_A_enableCaptureCompareInterrupt(),
+// Timer_A_disableCaptureCompareInterrupt(),
+// Timer_A_getCaptureCompareInterruptStatus(),
+// Timer_A_getSynchronizedCaptureCompareInput(),
+// Timer_A_getOutputForOutputModeOutBitValue(),
+// Timer_A_getCaptureCompareCount(),
+// Timer_A_setOutputForOutputModeOutBitValue(), and
+// Timer_A_clearCaptureCompareInterrupt(); the param parameter for functions:
+// Timer_A_initCaptureMode(), Timer_A_initCompareMode(), and
+// Timer_A_outputPWM().
+//
+//*****************************************************************************
+#define TIMER_A_CAPTURECOMPARE_REGISTER_0 0x02
+#define TIMER_A_CAPTURECOMPARE_REGISTER_1 0x04
+#define TIMER_A_CAPTURECOMPARE_REGISTER_2 0x06
+#define TIMER_A_CAPTURECOMPARE_REGISTER_3 0x08
+#define TIMER_A_CAPTURECOMPARE_REGISTER_4 0x0A
+#define TIMER_A_CAPTURECOMPARE_REGISTER_5 0x0C
+#define TIMER_A_CAPTURECOMPARE_REGISTER_6 0x0E
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the param parameter for
+// functions: Timer_A_initCaptureMode().
+//
+//*****************************************************************************
+#define TIMER_A_CAPTUREMODE_NO_CAPTURE CM_0
+#define TIMER_A_CAPTUREMODE_RISING_EDGE CM_1
+#define TIMER_A_CAPTUREMODE_FALLING_EDGE CM_2
+#define TIMER_A_CAPTUREMODE_RISING_AND_FALLING_EDGE CM_3
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the param parameter for
+// functions: Timer_A_initCaptureMode().
+//
+//*****************************************************************************
+#define TIMER_A_CAPTURE_ASYNCHRONOUS 0x00
+#define TIMER_A_CAPTURE_SYNCHRONOUS SCS
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the mask parameter for
+// functions: Timer_A_getCaptureCompareInterruptStatus() as well as returned by
+// the Timer_A_getCaptureCompareInterruptStatus() function.
+//
+//*****************************************************************************
+#define TIMER_A_CAPTURE_OVERFLOW COV
+#define TIMER_A_CAPTURECOMPARE_INTERRUPT_FLAG CCIFG
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the synchronized parameter
+// for functions: Timer_A_getSynchronizedCaptureCompareInput().
+//
+//*****************************************************************************
+#define TIMER_A_READ_SYNCHRONIZED_CAPTURECOMPAREINPUT SCCI
+#define TIMER_A_READ_CAPTURE_COMPARE_INPUT CCI
+
+//*****************************************************************************
+//
+// The following are values that can be passed toThe following are values that
+// can be returned by the Timer_A_getSynchronizedCaptureCompareInput()
+// function.
+//
+//*****************************************************************************
+#define TIMER_A_CAPTURECOMPARE_INPUT_HIGH 0x01
+#define TIMER_A_CAPTURECOMPARE_INPUT_LOW 0x00
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the outputModeOutBitValue
+// parameter for functions: Timer_A_setOutputForOutputModeOutBitValue() as well
+// as returned by the Timer_A_getOutputForOutputModeOutBitValue() function.
+//
+//*****************************************************************************
+#define TIMER_A_OUTPUTMODE_OUTBITVALUE_HIGH OUT
+#define TIMER_A_OUTPUTMODE_OUTBITVALUE_LOW 0x00
+
+//*****************************************************************************
+//
+// The following are values that can be passed toThe following are values that
+// can be returned by the Timer_A_getInterruptStatus() function.
+//
+//*****************************************************************************
+#define TIMER_A_INTERRUPT_NOT_PENDING 0x00
+#define TIMER_A_INTERRUPT_PENDING 0x01
+
+//*****************************************************************************
+//
+// Prototypes for the APIs.
+//
+//*****************************************************************************
+
+//*****************************************************************************
+//
+//! \brief Starts Timer_A counter
+//!
+//! This function assumes that the timer has been previously configured using
+//! Timer_A_initContinuousMode, Timer_A_initUpMode or Timer_A_initUpDownMode.
+//!
+//! \param baseAddress is the base address of the TIMER_A module.
+//! \param timerMode mode to put the timer in
+//! Valid values are:
+//! - \b TIMER_A_STOP_MODE
+//! - \b TIMER_A_UP_MODE
+//! - \b TIMER_A_CONTINUOUS_MODE [Default]
+//! - \b TIMER_A_UPDOWN_MODE
+//!
+//! Modified bits of \b TAxCTL register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void Timer_A_startCounter(uint16_t baseAddress,
+ uint16_t timerMode);
+
+//*****************************************************************************
+//
+//! \brief Configures Timer_A in continuous mode.
+//!
+//! \param baseAddress is the base address of the TIMER_A module.
+//! \param param is the pointer to struct for continuous mode initialization.
+//!
+//! Modified bits of \b TAxCTL register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void Timer_A_initContinuousMode(uint16_t baseAddress,
+ Timer_A_initContinuousModeParam *param);
+
+//*****************************************************************************
+//
+//! \brief Configures Timer_A in up mode.
+//!
+//! \param baseAddress is the base address of the TIMER_A module.
+//! \param param is the pointer to struct for up mode initialization.
+//!
+//! Modified bits of \b TAxCTL register, bits of \b TAxCCTL0 register and bits
+//! of \b TAxCCR0 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void Timer_A_initUpMode(uint16_t baseAddress,
+ Timer_A_initUpModeParam *param);
+
+//*****************************************************************************
+//
+//! \brief Configures Timer_A in up down mode.
+//!
+//! \param baseAddress is the base address of the TIMER_A module.
+//! \param param is the pointer to struct for up-down mode initialization.
+//!
+//! Modified bits of \b TAxCTL register, bits of \b TAxCCTL0 register and bits
+//! of \b TAxCCR0 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void Timer_A_initUpDownMode(uint16_t baseAddress,
+ Timer_A_initUpDownModeParam *param);
+
+//*****************************************************************************
+//
+//! \brief Initializes Capture Mode
+//!
+//! \param baseAddress is the base address of the TIMER_A module.
+//! \param param is the pointer to struct for capture mode initialization.
+//!
+//! Modified bits of \b TAxCCTLn register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void Timer_A_initCaptureMode(uint16_t baseAddress,
+ Timer_A_initCaptureModeParam *param);
+
+//*****************************************************************************
+//
+//! \brief Initializes Compare Mode
+//!
+//! \param baseAddress is the base address of the TIMER_A module.
+//! \param param is the pointer to struct for compare mode initialization.
+//!
+//! Modified bits of \b TAxCCRn register and bits of \b TAxCCTLn register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void Timer_A_initCompareMode(uint16_t baseAddress,
+ Timer_A_initCompareModeParam *param);
+
+//*****************************************************************************
+//
+//! \brief Enable timer interrupt
+//!
+//! Does not clear interrupt flags
+//!
+//! \param baseAddress is the base address of the TIMER_A module.
+//!
+//! Modified bits of \b TAxCTL register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void Timer_A_enableInterrupt(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Disable timer interrupt
+//!
+//! \param baseAddress is the base address of the TIMER_A module.
+//!
+//! Modified bits of \b TAxCTL register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void Timer_A_disableInterrupt(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Get timer interrupt status
+//!
+//! \param baseAddress is the base address of the TIMER_A module.
+//!
+//! \return One of the following:
+//! - \b TIMER_A_INTERRUPT_NOT_PENDING
+//! - \b TIMER_A_INTERRUPT_PENDING
+//! \n indicating the Timer_A interrupt status
+//
+//*****************************************************************************
+extern uint32_t Timer_A_getInterruptStatus(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Enable capture compare interrupt
+//!
+//! Does not clear interrupt flags
+//!
+//! \param baseAddress is the base address of the TIMER_A module.
+//! \param captureCompareRegister is the selected capture compare register
+//! Valid values are:
+//! - \b TIMER_A_CAPTURECOMPARE_REGISTER_0
+//! - \b TIMER_A_CAPTURECOMPARE_REGISTER_1
+//! - \b TIMER_A_CAPTURECOMPARE_REGISTER_2
+//! - \b TIMER_A_CAPTURECOMPARE_REGISTER_3
+//! - \b TIMER_A_CAPTURECOMPARE_REGISTER_4
+//! - \b TIMER_A_CAPTURECOMPARE_REGISTER_5
+//! - \b TIMER_A_CAPTURECOMPARE_REGISTER_6
+//!
+//! Modified bits of \b TAxCCTLn register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void Timer_A_enableCaptureCompareInterrupt(uint16_t baseAddress,
+ uint16_t captureCompareRegister);
+
+//*****************************************************************************
+//
+//! \brief Disable capture compare interrupt
+//!
+//! \param baseAddress is the base address of the TIMER_A module.
+//! \param captureCompareRegister is the selected capture compare register
+//! Valid values are:
+//! - \b TIMER_A_CAPTURECOMPARE_REGISTER_0
+//! - \b TIMER_A_CAPTURECOMPARE_REGISTER_1
+//! - \b TIMER_A_CAPTURECOMPARE_REGISTER_2
+//! - \b TIMER_A_CAPTURECOMPARE_REGISTER_3
+//! - \b TIMER_A_CAPTURECOMPARE_REGISTER_4
+//! - \b TIMER_A_CAPTURECOMPARE_REGISTER_5
+//! - \b TIMER_A_CAPTURECOMPARE_REGISTER_6
+//!
+//! Modified bits of \b TAxCCTLn register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void Timer_A_disableCaptureCompareInterrupt(uint16_t baseAddress,
+ uint16_t captureCompareRegister);
+
+//*****************************************************************************
+//
+//! \brief Return capture compare interrupt status
+//!
+//! \param baseAddress is the base address of the TIMER_A module.
+//! \param captureCompareRegister is the selected capture compare register
+//! Valid values are:
+//! - \b TIMER_A_CAPTURECOMPARE_REGISTER_0
+//! - \b TIMER_A_CAPTURECOMPARE_REGISTER_1
+//! - \b TIMER_A_CAPTURECOMPARE_REGISTER_2
+//! - \b TIMER_A_CAPTURECOMPARE_REGISTER_3
+//! - \b TIMER_A_CAPTURECOMPARE_REGISTER_4
+//! - \b TIMER_A_CAPTURECOMPARE_REGISTER_5
+//! - \b TIMER_A_CAPTURECOMPARE_REGISTER_6
+//! \param mask is the mask for the interrupt status
+//! Mask value is the logical OR of any of the following:
+//! - \b TIMER_A_CAPTURE_OVERFLOW
+//! - \b TIMER_A_CAPTURECOMPARE_INTERRUPT_FLAG
+//!
+//! \return Logical OR of any of the following:
+//! - \b TIMER_A_CAPTURE_OVERFLOW
+//! - \b TIMER_A_CAPTURECOMPARE_INTERRUPT_FLAG
+//! \n indicating the status of the masked interrupts
+//
+//*****************************************************************************
+extern uint32_t Timer_A_getCaptureCompareInterruptStatus(uint16_t baseAddress,
+ uint16_t captureCompareRegister,
+ uint16_t mask);
+
+//*****************************************************************************
+//
+//! \brief Reset/Clear the timer clock divider, count direction, count
+//!
+//! \param baseAddress is the base address of the TIMER_A module.
+//!
+//! Modified bits of \b TAxCTL register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void Timer_A_clear(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Get synchronized capturecompare input
+//!
+//! \param baseAddress is the base address of the TIMER_A module.
+//! \param captureCompareRegister
+//! Valid values are:
+//! - \b TIMER_A_CAPTURECOMPARE_REGISTER_0
+//! - \b TIMER_A_CAPTURECOMPARE_REGISTER_1
+//! - \b TIMER_A_CAPTURECOMPARE_REGISTER_2
+//! - \b TIMER_A_CAPTURECOMPARE_REGISTER_3
+//! - \b TIMER_A_CAPTURECOMPARE_REGISTER_4
+//! - \b TIMER_A_CAPTURECOMPARE_REGISTER_5
+//! - \b TIMER_A_CAPTURECOMPARE_REGISTER_6
+//! \param synchronized
+//! Valid values are:
+//! - \b TIMER_A_READ_SYNCHRONIZED_CAPTURECOMPAREINPUT
+//! - \b TIMER_A_READ_CAPTURE_COMPARE_INPUT
+//!
+//! \return One of the following:
+//! - \b TIMER_A_CAPTURECOMPARE_INPUT_HIGH
+//! - \b TIMER_A_CAPTURECOMPARE_INPUT_LOW
+//
+//*****************************************************************************
+extern uint8_t Timer_A_getSynchronizedCaptureCompareInput(uint16_t baseAddress,
+ uint16_t captureCompareRegister,
+ uint16_t synchronized);
+
+//*****************************************************************************
+//
+//! \brief Get output bit for output mode
+//!
+//! \param baseAddress is the base address of the TIMER_A module.
+//! \param captureCompareRegister
+//! Valid values are:
+//! - \b TIMER_A_CAPTURECOMPARE_REGISTER_0
+//! - \b TIMER_A_CAPTURECOMPARE_REGISTER_1
+//! - \b TIMER_A_CAPTURECOMPARE_REGISTER_2
+//! - \b TIMER_A_CAPTURECOMPARE_REGISTER_3
+//! - \b TIMER_A_CAPTURECOMPARE_REGISTER_4
+//! - \b TIMER_A_CAPTURECOMPARE_REGISTER_5
+//! - \b TIMER_A_CAPTURECOMPARE_REGISTER_6
+//!
+//! \return One of the following:
+//! - \b TIMER_A_OUTPUTMODE_OUTBITVALUE_HIGH
+//! - \b TIMER_A_OUTPUTMODE_OUTBITVALUE_LOW
+//
+//*****************************************************************************
+extern uint8_t Timer_A_getOutputForOutputModeOutBitValue(uint16_t baseAddress,
+ uint16_t captureCompareRegister);
+
+//*****************************************************************************
+//
+//! \brief Get current capturecompare count
+//!
+//! \param baseAddress is the base address of the TIMER_A module.
+//! \param captureCompareRegister
+//! Valid values are:
+//! - \b TIMER_A_CAPTURECOMPARE_REGISTER_0
+//! - \b TIMER_A_CAPTURECOMPARE_REGISTER_1
+//! - \b TIMER_A_CAPTURECOMPARE_REGISTER_2
+//! - \b TIMER_A_CAPTURECOMPARE_REGISTER_3
+//! - \b TIMER_A_CAPTURECOMPARE_REGISTER_4
+//! - \b TIMER_A_CAPTURECOMPARE_REGISTER_5
+//! - \b TIMER_A_CAPTURECOMPARE_REGISTER_6
+//!
+//! \return Current count as an uint16_t
+//
+//*****************************************************************************
+extern uint16_t Timer_A_getCaptureCompareCount(uint16_t baseAddress,
+ uint16_t captureCompareRegister);
+
+//*****************************************************************************
+//
+//! \brief Set output bit for output mode
+//!
+//! \param baseAddress is the base address of the TIMER_A module.
+//! \param captureCompareRegister
+//! Valid values are:
+//! - \b TIMER_A_CAPTURECOMPARE_REGISTER_0
+//! - \b TIMER_A_CAPTURECOMPARE_REGISTER_1
+//! - \b TIMER_A_CAPTURECOMPARE_REGISTER_2
+//! - \b TIMER_A_CAPTURECOMPARE_REGISTER_3
+//! - \b TIMER_A_CAPTURECOMPARE_REGISTER_4
+//! - \b TIMER_A_CAPTURECOMPARE_REGISTER_5
+//! - \b TIMER_A_CAPTURECOMPARE_REGISTER_6
+//! \param outputModeOutBitValue is the value to be set for out bit
+//! Valid values are:
+//! - \b TIMER_A_OUTPUTMODE_OUTBITVALUE_HIGH
+//! - \b TIMER_A_OUTPUTMODE_OUTBITVALUE_LOW
+//!
+//! Modified bits of \b TAxCCTLn register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void Timer_A_setOutputForOutputModeOutBitValue(uint16_t baseAddress,
+ uint16_t captureCompareRegister,
+ uint8_t outputModeOutBitValue);
+
+//*****************************************************************************
+//
+//! \brief Generate a PWM with timer running in up mode
+//!
+//! \param baseAddress is the base address of the TIMER_A module.
+//! \param param is the pointer to struct for PWM configuration.
+//!
+//! Modified bits of \b TAxCTL register, bits of \b TAxCCTL0 register, bits of
+//! \b TAxCCR0 register and bits of \b TAxCCTLn register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void Timer_A_outputPWM(uint16_t baseAddress,
+ Timer_A_outputPWMParam *param);
+
+//*****************************************************************************
+//
+//! \brief Stops the timer
+//!
+//! \param baseAddress is the base address of the TIMER_A module.
+//!
+//! Modified bits of \b TAxCTL register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void Timer_A_stop(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Sets the value of the capture-compare register
+//!
+//! \param baseAddress is the base address of the TIMER_A module.
+//! \param compareRegister selects the Capture register being used. Refer to
+//! datasheet to ensure the device has the capture compare register
+//! being used.
+//! Valid values are:
+//! - \b TIMER_A_CAPTURECOMPARE_REGISTER_0
+//! - \b TIMER_A_CAPTURECOMPARE_REGISTER_1
+//! - \b TIMER_A_CAPTURECOMPARE_REGISTER_2
+//! - \b TIMER_A_CAPTURECOMPARE_REGISTER_3
+//! - \b TIMER_A_CAPTURECOMPARE_REGISTER_4
+//! - \b TIMER_A_CAPTURECOMPARE_REGISTER_5
+//! - \b TIMER_A_CAPTURECOMPARE_REGISTER_6
+//! \param compareValue is the count to be compared with in compare mode
+//!
+//! Modified bits of \b TAxCCRn register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void Timer_A_setCompareValue(uint16_t baseAddress,
+ uint16_t compareRegister,
+ uint16_t compareValue);
+
+//*****************************************************************************
+//
+//! \brief Sets the output mode
+//!
+//! Sets the output mode for the timer even the timer is already running.
+//!
+//! \param baseAddress is the base address of the TIMER_A module.
+//! \param compareRegister selects the compare register being used.
+//! Valid values are:
+//! - \b TIMER_A_CAPTURECOMPARE_REGISTER_0
+//! - \b TIMER_A_CAPTURECOMPARE_REGISTER_1
+//! - \b TIMER_A_CAPTURECOMPARE_REGISTER_2
+//! - \b TIMER_A_CAPTURECOMPARE_REGISTER_3
+//! - \b TIMER_A_CAPTURECOMPARE_REGISTER_4
+//! - \b TIMER_A_CAPTURECOMPARE_REGISTER_5
+//! - \b TIMER_A_CAPTURECOMPARE_REGISTER_6
+//! \param compareOutputMode specifies the output mode.
+//! Valid values are:
+//! - \b TIMER_A_OUTPUTMODE_OUTBITVALUE [Default]
+//! - \b TIMER_A_OUTPUTMODE_SET
+//! - \b TIMER_A_OUTPUTMODE_TOGGLE_RESET
+//! - \b TIMER_A_OUTPUTMODE_SET_RESET
+//! - \b TIMER_A_OUTPUTMODE_TOGGLE
+//! - \b TIMER_A_OUTPUTMODE_RESET
+//! - \b TIMER_A_OUTPUTMODE_TOGGLE_SET
+//! - \b TIMER_A_OUTPUTMODE_RESET_SET
+//!
+//! Modified bits are \b OUTMOD of \b TAxCCTLn register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void Timer_A_setOutputMode(uint16_t baseAddress,
+ uint16_t compareRegister,
+ uint16_t compareOutputMode);
+
+//*****************************************************************************
+//
+//! \brief Clears the Timer TAIFG interrupt flag
+//!
+//! \param baseAddress is the base address of the TIMER_A module.
+//!
+//! Modified bits are \b TAIFG of \b TAxCTL register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void Timer_A_clearTimerInterrupt(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Clears the capture-compare interrupt flag
+//!
+//! \param baseAddress is the base address of the TIMER_A module.
+//! \param captureCompareRegister selects the Capture-compare register being
+//! used.
+//! Valid values are:
+//! - \b TIMER_A_CAPTURECOMPARE_REGISTER_0
+//! - \b TIMER_A_CAPTURECOMPARE_REGISTER_1
+//! - \b TIMER_A_CAPTURECOMPARE_REGISTER_2
+//! - \b TIMER_A_CAPTURECOMPARE_REGISTER_3
+//! - \b TIMER_A_CAPTURECOMPARE_REGISTER_4
+//! - \b TIMER_A_CAPTURECOMPARE_REGISTER_5
+//! - \b TIMER_A_CAPTURECOMPARE_REGISTER_6
+//!
+//! Modified bits are \b CCIFG of \b TAxCCTLn register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void Timer_A_clearCaptureCompareInterrupt(uint16_t baseAddress,
+ uint16_t captureCompareRegister);
+
+//*****************************************************************************
+//
+//! \brief Reads the current timer count value
+//!
+//! Reads the current count value of the timer. There is a majority vote system
+//! in place to confirm an accurate value is returned. The TIMER_A_THRESHOLD
+//! #define in the corresponding header file can be modified so that the votes
+//! must be closer together for a consensus to occur.
+//!
+//! \param baseAddress is the base address of the TIMER_A module.
+//!
+//! \return Majority vote of timer count value
+//
+//*****************************************************************************
+extern uint16_t Timer_A_getCounterValue(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+// Mark the end of the C bindings section for C++ compilers.
+//
+//*****************************************************************************
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+#endif // __MSP430WARE_TIMER_A_H__
diff --git a/Apps/FlightSoftware/MotorControl/driverlib/timer_b.c b/Apps/FlightSoftware/MotorControl/driverlib/timer_b.c
new file mode 100644
index 000000000..7d5beab84
--- /dev/null
+++ b/Apps/FlightSoftware/MotorControl/driverlib/timer_b.c
@@ -0,0 +1,398 @@
+/* --COPYRIGHT--,BSD
+ * Copyright (c) 2017, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * --/COPYRIGHT--*/
+//*****************************************************************************
+//
+// timer_b.c - Driver for the timer_b Module.
+//
+//*****************************************************************************
+
+//*****************************************************************************
+//
+//! \addtogroup timer_b_api timer_b
+//! @{
+//
+//*****************************************************************************
+
+#include "inc/hw_memmap.h"
+
+#ifdef __MSP430_HAS_TxB7__
+#include "timer_b.h"
+
+#include
+
+void Timer_B_startCounter ( uint16_t baseAddress,
+ uint16_t timerMode
+ )
+{
+ HWREG16(baseAddress + OFS_TBxCTL) |= timerMode;
+}
+
+void Timer_B_initContinuousMode(uint16_t baseAddress,
+ Timer_B_initContinuousModeParam *param)
+{
+
+ HWREG16(baseAddress +
+ OFS_TBxCTL) &= ~(TIMER_B_CLOCKSOURCE_INVERTED_EXTERNAL_TXCLK +
+ TIMER_B_UPDOWN_MODE +
+ TIMER_B_DO_CLEAR +
+ TIMER_B_TBIE_INTERRUPT_ENABLE +
+ CNTL_3 +
+ ID__8
+ );
+ HWREG16(baseAddress + OFS_TBxEX0) &= ~TBIDEX_7;
+
+ HWREG16(baseAddress + OFS_TBxEX0) |= param->clockSourceDivider&0x7;
+
+ HWREG16(baseAddress + OFS_TBxCTL) |= (param->clockSource +
+ param->timerClear +
+ param->timerInterruptEnable_TBIE +
+ ((param->clockSourceDivider>>3)<<6));
+
+ if(param->startTimer) {
+ HWREG16(baseAddress + OFS_TBxCTL) |= TIMER_B_CONTINUOUS_MODE;
+ }
+}
+
+void Timer_B_initUpMode (uint16_t baseAddress,
+ Timer_B_initUpModeParam *param)
+{
+
+ HWREG16(baseAddress + OFS_TBxCTL) &=
+ ~(TIMER_B_CLOCKSOURCE_INVERTED_EXTERNAL_TXCLK +
+ TIMER_B_UPDOWN_MODE +
+ TIMER_B_DO_CLEAR +
+ TIMER_B_TBIE_INTERRUPT_ENABLE +
+ CNTL_3
+ );
+ HWREG16(baseAddress + OFS_TBxEX0) &= ~TBIDEX_7;
+
+ HWREG16(baseAddress + OFS_TBxEX0) |= param->clockSourceDivider&0x7;
+
+ HWREG16(baseAddress + OFS_TBxCTL) |= (param->clockSource +
+ param->timerClear +
+ param->timerInterruptEnable_TBIE +
+ ((param->clockSourceDivider>>3)<<6));
+
+ if (param->startTimer) {
+ HWREG16(baseAddress + OFS_TBxCTL) |= TIMER_B_UP_MODE;
+ }
+
+ if (TIMER_B_CCIE_CCR0_INTERRUPT_ENABLE ==
+ param->captureCompareInterruptEnable_CCR0_CCIE){
+ HWREG16(baseAddress + OFS_TBxCCTL0) |= TIMER_B_CCIE_CCR0_INTERRUPT_ENABLE;
+ } else {
+ HWREG16(baseAddress + OFS_TBxCCTL0) &= ~TIMER_B_CCIE_CCR0_INTERRUPT_ENABLE;
+ }
+
+ HWREG16(baseAddress + OFS_TBxCCR0) = param->timerPeriod;
+}
+
+void Timer_B_initUpDownMode(uint16_t baseAddress,
+ Timer_B_initUpDownModeParam *param)
+{
+ HWREG16(baseAddress + OFS_TBxCTL) &=
+ ~(TIMER_B_CLOCKSOURCE_INVERTED_EXTERNAL_TXCLK +
+ TIMER_B_UPDOWN_MODE +
+ TIMER_B_DO_CLEAR +
+ TIMER_B_TBIE_INTERRUPT_ENABLE +
+ CNTL_3
+ );
+ HWREG16(baseAddress + OFS_TBxEX0) &= ~TBIDEX_7;
+
+ HWREG16(baseAddress + OFS_TBxEX0) |= param->clockSourceDivider&0x7;
+
+ HWREG16(baseAddress + OFS_TBxCTL) |= (param->clockSource +
+ TIMER_B_STOP_MODE +
+ param->timerClear +
+ param->timerInterruptEnable_TBIE +
+ ((param->clockSourceDivider>>3)<<6));
+
+ if (param->startTimer) {
+ HWREG16(baseAddress + OFS_TBxCTL) |= TIMER_B_UPDOWN_MODE;
+ }
+
+ if (TIMER_B_CCIE_CCR0_INTERRUPT_ENABLE ==
+ param->captureCompareInterruptEnable_CCR0_CCIE){
+ HWREG16(baseAddress + OFS_TBxCCTL0) |= TIMER_B_CCIE_CCR0_INTERRUPT_ENABLE;
+ } else {
+ HWREG16(baseAddress + OFS_TBxCCTL0) &= ~TIMER_B_CCIE_CCR0_INTERRUPT_ENABLE;
+ }
+
+ HWREG16(baseAddress + OFS_TBxCCR0) = param->timerPeriod;
+}
+
+void Timer_B_initCaptureMode(uint16_t baseAddress,
+ Timer_B_initCaptureModeParam *param)
+{
+
+ HWREG16(baseAddress + param->captureRegister ) |= CAP;
+
+ HWREG16(baseAddress + param->captureRegister) &=
+ ~(TIMER_B_CAPTUREMODE_RISING_AND_FALLING_EDGE +
+ TIMER_B_CAPTURE_INPUTSELECT_Vcc +
+ TIMER_B_CAPTURE_SYNCHRONOUS +
+ TIMER_B_DO_CLEAR +
+ TIMER_B_TBIE_INTERRUPT_ENABLE +
+ CM_3
+ );
+
+ HWREG16(baseAddress + param->captureRegister) |= (param->captureMode +
+ param->captureInputSelect +
+ param->synchronizeCaptureSource +
+ param->captureInterruptEnable +
+ param->captureOutputMode
+ );
+}
+
+void Timer_B_initCompareMode(uint16_t baseAddress,
+ Timer_B_initCompareModeParam *param)
+{
+
+ HWREG16(baseAddress + param->compareRegister ) &= ~CAP;
+
+ HWREG16(baseAddress + param->compareRegister) &=
+ ~(TIMER_B_CAPTURECOMPARE_INTERRUPT_ENABLE +
+ TIMER_B_OUTPUTMODE_RESET_SET
+ );
+
+ HWREG16(baseAddress + param->compareRegister) |= (param->compareInterruptEnable +
+ param->compareOutputMode
+ );
+
+ HWREG16(baseAddress + param->compareRegister + OFS_TBxR) = param->compareValue;
+}
+
+void Timer_B_enableInterrupt (uint16_t baseAddress)
+{
+ HWREG16(baseAddress + OFS_TBxCTL) |= TBIE;
+}
+
+void Timer_B_disableInterrupt (uint16_t baseAddress)
+{
+ HWREG16(baseAddress + OFS_TBxCTL) &= ~TBIE;
+}
+
+uint32_t Timer_B_getInterruptStatus (uint16_t baseAddress)
+{
+ return ( HWREG16(baseAddress + OFS_TBxCTL) & TBIFG );
+}
+
+void Timer_B_enableCaptureCompareInterrupt (uint16_t baseAddress,
+ uint16_t captureCompareRegister
+ )
+{
+ HWREG16(baseAddress + captureCompareRegister) |= CCIE;
+}
+
+void Timer_B_disableCaptureCompareInterrupt (uint16_t baseAddress,
+ uint16_t captureCompareRegister
+ )
+{
+ HWREG16(baseAddress + captureCompareRegister) &= ~CCIE;
+}
+
+uint32_t Timer_B_getCaptureCompareInterruptStatus (uint16_t baseAddress,
+ uint16_t captureCompareRegister,
+ uint16_t mask
+ )
+{
+ return ( HWREG16(baseAddress + captureCompareRegister) & mask );
+}
+
+void Timer_B_clear (uint16_t baseAddress)
+{
+ HWREG16(baseAddress + OFS_TBxCTL) |= TBCLR;
+}
+
+uint8_t Timer_B_getSynchronizedCaptureCompareInput
+ (uint16_t baseAddress,
+ uint16_t captureCompareRegister,
+ uint16_t synchronized
+ )
+{
+ if (HWREG16(baseAddress + captureCompareRegister) & synchronized){
+ return ( TIMER_B_CAPTURECOMPARE_INPUT_HIGH) ;
+ } else {
+ return ( TIMER_B_CAPTURECOMPARE_INPUT_LOW) ;
+ }
+}
+
+uint8_t Timer_B_getOutputForOutputModeOutBitValue
+ (uint16_t baseAddress,
+ uint16_t captureCompareRegister
+ )
+{
+
+ if (HWREG16(baseAddress + captureCompareRegister) & OUT){
+ return ( TIMER_B_OUTPUTMODE_OUTBITVALUE_HIGH) ;
+ } else {
+ return ( TIMER_B_OUTPUTMODE_OUTBITVALUE_LOW) ;
+ }
+}
+
+uint16_t Timer_B_getCaptureCompareCount
+ (uint16_t baseAddress,
+ uint16_t captureCompareRegister
+ )
+{
+ return (HWREG16(baseAddress + OFS_TBxR + captureCompareRegister));
+}
+
+void Timer_B_setOutputForOutputModeOutBitValue
+ (uint16_t baseAddress,
+ uint16_t captureCompareRegister,
+ uint8_t outputModeOutBitValue
+ )
+{
+ HWREG16(baseAddress + captureCompareRegister) &= ~OUT;
+ HWREG16(baseAddress + captureCompareRegister) |= outputModeOutBitValue;
+}
+
+void Timer_B_outputPWM(uint16_t baseAddress, Timer_B_outputPWMParam *param)
+{
+
+ HWREG16(baseAddress + OFS_TBxCTL) &=
+ ~( TIMER_B_CLOCKSOURCE_INVERTED_EXTERNAL_TXCLK +
+ TIMER_B_UPDOWN_MODE + TIMER_B_DO_CLEAR +
+ TIMER_B_TBIE_INTERRUPT_ENABLE
+ );
+ HWREG16(baseAddress + OFS_TBxEX0) &= ~TBIDEX_7;
+
+ HWREG16(baseAddress + OFS_TBxEX0) |= param->clockSourceDivider&0x7;
+
+ HWREG16(baseAddress + OFS_TBxCTL) |= (param->clockSource +
+ TIMER_B_UP_MODE +
+ TIMER_B_DO_CLEAR +
+ ((param->clockSourceDivider>>3)<<6));
+
+ HWREG16(baseAddress + OFS_TBxCCR0) = param->timerPeriod;
+
+ HWREG16(baseAddress + OFS_TBxCCTL0) &=
+ ~(TIMER_B_CAPTURECOMPARE_INTERRUPT_ENABLE +
+ TIMER_B_OUTPUTMODE_RESET_SET
+ );
+
+ HWREG16(baseAddress + param->compareRegister) |= param->compareOutputMode;
+
+ HWREG16(baseAddress + param->compareRegister + OFS_TBxR) = param->dutyCycle;
+}
+
+void Timer_B_stop ( uint16_t baseAddress )
+{
+ HWREG16(baseAddress + OFS_TBxCTL) &= ~MC_3;
+}
+
+
+void Timer_B_setCompareValue ( uint16_t baseAddress,
+ uint16_t compareRegister,
+ uint16_t compareValue
+ )
+{
+ HWREG16(baseAddress + compareRegister + OFS_TBxR) = compareValue;
+}
+
+void Timer_B_clearTimerInterrupt (uint16_t baseAddress)
+{
+ HWREG16(baseAddress + OFS_TBxCTL) &= ~TBIFG;
+}
+
+void Timer_B_clearCaptureCompareInterrupt (uint16_t baseAddress,
+ uint16_t captureCompareRegister
+ )
+{
+ HWREG16(baseAddress + captureCompareRegister) &= ~CCIFG;
+}
+
+void Timer_B_selectCounterLength (uint16_t baseAddress,
+ uint16_t counterLength
+ )
+{
+ HWREG16(baseAddress + OFS_TBxCTL) &= ~CNTL_3;
+ HWREG16(baseAddress + OFS_TBxCTL) |= counterLength;
+}
+
+void Timer_B_selectLatchingGroup(uint16_t baseAddress,
+ uint16_t groupLatch)
+{
+ HWREG16(baseAddress + OFS_TBxCTL) &= ~TBCLGRP_3;
+ HWREG16(baseAddress + OFS_TBxCTL) |= groupLatch;
+}
+
+void Timer_B_initCompareLatchLoadEvent(uint16_t baseAddress,
+ uint16_t compareRegister,
+ uint16_t compareLatchLoadEvent
+ )
+{
+ HWREG16(baseAddress + compareRegister) &= ~CLLD_3;
+ HWREG16(baseAddress + compareRegister) |= compareLatchLoadEvent;
+}
+
+uint16_t Timer_B_getCounterValue (uint16_t baseAddress)
+{
+ uint16_t voteOne, voteTwo, res;
+
+ voteTwo = HWREG16(baseAddress + OFS_TBxR);
+
+ do
+ {
+ voteOne = voteTwo;
+ voteTwo = HWREG16(baseAddress + OFS_TBxR);
+
+ if(voteTwo > voteOne) {
+ res = voteTwo - voteOne;
+ } else if(voteOne > voteTwo) {
+ res = voteOne - voteTwo;
+ } else{
+ res = 0;
+ }
+
+ } while ( res > TIMER_B_THRESHOLD);
+
+ return voteTwo;
+}
+
+void Timer_B_setOutputMode(uint16_t baseAddress,
+ uint16_t compareRegister,
+ uint16_t compareOutputMode)
+{
+ uint16_t temp = HWREG16(baseAddress + compareRegister);
+ HWREG16(baseAddress + compareRegister) = temp & ~(OUTMOD_7) | compareOutputMode;
+}
+
+
+#endif
+//*****************************************************************************
+//
+//! Close the doxygen group for timer_b_api
+//! @}
+//
+//*****************************************************************************
diff --git a/Apps/FlightSoftware/MotorControl/driverlib/timer_b.h b/Apps/FlightSoftware/MotorControl/driverlib/timer_b.h
new file mode 100644
index 000000000..106c85d5c
--- /dev/null
+++ b/Apps/FlightSoftware/MotorControl/driverlib/timer_b.h
@@ -0,0 +1,1224 @@
+/* --COPYRIGHT--,BSD
+ * Copyright (c) 2017, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * --/COPYRIGHT--*/
+//*****************************************************************************
+//
+// timer_b.h - Driver for the TIMER_B Module.
+//
+//*****************************************************************************
+
+#ifndef __MSP430WARE_TIMER_B_H__
+#define __MSP430WARE_TIMER_B_H__
+
+#include "inc/hw_memmap.h"
+
+#ifdef __MSP430_HAS_TxB7__
+
+//*****************************************************************************
+//
+// If building with a C++ compiler, make all of the definitions in this header
+// have a C binding.
+//
+//*****************************************************************************
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+#include "inc/hw_memmap.h"
+//*****************************************************************************
+//
+// The following is a parameter used for Timer_B_getCounterValue that
+// determines the maximum difference in counts of the TAxR register for a
+// majority vote.
+//
+//*****************************************************************************
+#define TIMER_B_THRESHOLD 50
+
+//*****************************************************************************
+//
+//! \brief Used in the Timer_B_outputPWM() function as the param parameter.
+//
+//*****************************************************************************
+typedef struct Timer_B_outputPWMParam {
+ //! Selects the clock source
+ //! \n Valid values are:
+ //! - \b TIMER_B_CLOCKSOURCE_EXTERNAL_TXCLK [Default]
+ //! - \b TIMER_B_CLOCKSOURCE_ACLK
+ //! - \b TIMER_B_CLOCKSOURCE_SMCLK
+ //! - \b TIMER_B_CLOCKSOURCE_INVERTED_EXTERNAL_TXCLK
+ uint16_t clockSource;
+ //! Is the divider for Clock source.
+ //! \n Valid values are:
+ //! - \b TIMER_B_CLOCKSOURCE_DIVIDER_1 [Default]
+ //! - \b TIMER_B_CLOCKSOURCE_DIVIDER_2
+ //! - \b TIMER_B_CLOCKSOURCE_DIVIDER_3
+ //! - \b TIMER_B_CLOCKSOURCE_DIVIDER_4
+ //! - \b TIMER_B_CLOCKSOURCE_DIVIDER_5
+ //! - \b TIMER_B_CLOCKSOURCE_DIVIDER_6
+ //! - \b TIMER_B_CLOCKSOURCE_DIVIDER_7
+ //! - \b TIMER_B_CLOCKSOURCE_DIVIDER_8
+ //! - \b TIMER_B_CLOCKSOURCE_DIVIDER_10
+ //! - \b TIMER_B_CLOCKSOURCE_DIVIDER_12
+ //! - \b TIMER_B_CLOCKSOURCE_DIVIDER_14
+ //! - \b TIMER_B_CLOCKSOURCE_DIVIDER_16
+ //! - \b TIMER_B_CLOCKSOURCE_DIVIDER_20
+ //! - \b TIMER_B_CLOCKSOURCE_DIVIDER_24
+ //! - \b TIMER_B_CLOCKSOURCE_DIVIDER_28
+ //! - \b TIMER_B_CLOCKSOURCE_DIVIDER_32
+ //! - \b TIMER_B_CLOCKSOURCE_DIVIDER_40
+ //! - \b TIMER_B_CLOCKSOURCE_DIVIDER_48
+ //! - \b TIMER_B_CLOCKSOURCE_DIVIDER_56
+ //! - \b TIMER_B_CLOCKSOURCE_DIVIDER_64
+ uint16_t clockSourceDivider;
+ //! Selects the desired Timer_B period
+ uint16_t timerPeriod;
+ //! Selects the compare register being used. Refer to datasheet to ensure
+ //! the device has the compare register being used.
+ //! \n Valid values are:
+ //! - \b TIMER_B_CAPTURECOMPARE_REGISTER_0
+ //! - \b TIMER_B_CAPTURECOMPARE_REGISTER_1
+ //! - \b TIMER_B_CAPTURECOMPARE_REGISTER_2
+ //! - \b TIMER_B_CAPTURECOMPARE_REGISTER_3
+ //! - \b TIMER_B_CAPTURECOMPARE_REGISTER_4
+ //! - \b TIMER_B_CAPTURECOMPARE_REGISTER_5
+ //! - \b TIMER_B_CAPTURECOMPARE_REGISTER_6
+ uint16_t compareRegister;
+ //! Specifies the output mode.
+ //! \n Valid values are:
+ //! - \b TIMER_B_OUTPUTMODE_OUTBITVALUE [Default]
+ //! - \b TIMER_B_OUTPUTMODE_SET
+ //! - \b TIMER_B_OUTPUTMODE_TOGGLE_RESET
+ //! - \b TIMER_B_OUTPUTMODE_SET_RESET
+ //! - \b TIMER_B_OUTPUTMODE_TOGGLE
+ //! - \b TIMER_B_OUTPUTMODE_RESET
+ //! - \b TIMER_B_OUTPUTMODE_TOGGLE_SET
+ //! - \b TIMER_B_OUTPUTMODE_RESET_SET
+ uint16_t compareOutputMode;
+ //! Specifies the dutycycle for the generated waveform
+ uint16_t dutyCycle;
+} Timer_B_outputPWMParam;
+
+//*****************************************************************************
+//
+//! \brief Used in the Timer_B_initUpMode() function as the param parameter.
+//
+//*****************************************************************************
+typedef struct Timer_B_initUpModeParam {
+ //! Selects the clock source
+ //! \n Valid values are:
+ //! - \b TIMER_B_CLOCKSOURCE_EXTERNAL_TXCLK [Default]
+ //! - \b TIMER_B_CLOCKSOURCE_ACLK
+ //! - \b TIMER_B_CLOCKSOURCE_SMCLK
+ //! - \b TIMER_B_CLOCKSOURCE_INVERTED_EXTERNAL_TXCLK
+ uint16_t clockSource;
+ //! Is the divider for Clock source.
+ //! \n Valid values are:
+ //! - \b TIMER_B_CLOCKSOURCE_DIVIDER_1 [Default]
+ //! - \b TIMER_B_CLOCKSOURCE_DIVIDER_2
+ //! - \b TIMER_B_CLOCKSOURCE_DIVIDER_3
+ //! - \b TIMER_B_CLOCKSOURCE_DIVIDER_4
+ //! - \b TIMER_B_CLOCKSOURCE_DIVIDER_5
+ //! - \b TIMER_B_CLOCKSOURCE_DIVIDER_6
+ //! - \b TIMER_B_CLOCKSOURCE_DIVIDER_7
+ //! - \b TIMER_B_CLOCKSOURCE_DIVIDER_8
+ //! - \b TIMER_B_CLOCKSOURCE_DIVIDER_10
+ //! - \b TIMER_B_CLOCKSOURCE_DIVIDER_12
+ //! - \b TIMER_B_CLOCKSOURCE_DIVIDER_14
+ //! - \b TIMER_B_CLOCKSOURCE_DIVIDER_16
+ //! - \b TIMER_B_CLOCKSOURCE_DIVIDER_20
+ //! - \b TIMER_B_CLOCKSOURCE_DIVIDER_24
+ //! - \b TIMER_B_CLOCKSOURCE_DIVIDER_28
+ //! - \b TIMER_B_CLOCKSOURCE_DIVIDER_32
+ //! - \b TIMER_B_CLOCKSOURCE_DIVIDER_40
+ //! - \b TIMER_B_CLOCKSOURCE_DIVIDER_48
+ //! - \b TIMER_B_CLOCKSOURCE_DIVIDER_56
+ //! - \b TIMER_B_CLOCKSOURCE_DIVIDER_64
+ uint16_t clockSourceDivider;
+ //! Is the specified Timer_B period. This is the value that gets written
+ //! into the CCR0. Limited to 16 bits[uint16_t]
+ uint16_t timerPeriod;
+ //! Is to enable or disable Timer_B interrupt
+ //! \n Valid values are:
+ //! - \b TIMER_B_TBIE_INTERRUPT_ENABLE
+ //! - \b TIMER_B_TBIE_INTERRUPT_DISABLE [Default]
+ uint16_t timerInterruptEnable_TBIE;
+ //! Is to enable or disable Timer_B CCR0 capture compare interrupt.
+ //! \n Valid values are:
+ //! - \b TIMER_B_CCIE_CCR0_INTERRUPT_ENABLE
+ //! - \b TIMER_B_CCIE_CCR0_INTERRUPT_DISABLE [Default]
+ uint16_t captureCompareInterruptEnable_CCR0_CCIE;
+ //! Decides if Timer_B clock divider, count direction, count need to be
+ //! reset.
+ //! \n Valid values are:
+ //! - \b TIMER_B_DO_CLEAR
+ //! - \b TIMER_B_SKIP_CLEAR [Default]
+ uint16_t timerClear;
+ //! Whether to start the timer immediately
+ bool startTimer;
+} Timer_B_initUpModeParam;
+
+//*****************************************************************************
+//
+//! \brief Used in the Timer_B_initCaptureMode() function as the param
+//! parameter.
+//
+//*****************************************************************************
+typedef struct Timer_B_initCaptureModeParam {
+ //! Selects the capture register being used. Refer to datasheet to ensure
+ //! the device has the capture register being used.
+ //! \n Valid values are:
+ //! - \b TIMER_B_CAPTURECOMPARE_REGISTER_0
+ //! - \b TIMER_B_CAPTURECOMPARE_REGISTER_1
+ //! - \b TIMER_B_CAPTURECOMPARE_REGISTER_2
+ //! - \b TIMER_B_CAPTURECOMPARE_REGISTER_3
+ //! - \b TIMER_B_CAPTURECOMPARE_REGISTER_4
+ //! - \b TIMER_B_CAPTURECOMPARE_REGISTER_5
+ //! - \b TIMER_B_CAPTURECOMPARE_REGISTER_6
+ uint16_t captureRegister;
+ //! Is the capture mode selected.
+ //! \n Valid values are:
+ //! - \b TIMER_B_CAPTUREMODE_NO_CAPTURE [Default]
+ //! - \b TIMER_B_CAPTUREMODE_RISING_EDGE
+ //! - \b TIMER_B_CAPTUREMODE_FALLING_EDGE
+ //! - \b TIMER_B_CAPTUREMODE_RISING_AND_FALLING_EDGE
+ uint16_t captureMode;
+ //! Decides the Input Select
+ //! \n Valid values are:
+ //! - \b TIMER_B_CAPTURE_INPUTSELECT_CCIxA [Default]
+ //! - \b TIMER_B_CAPTURE_INPUTSELECT_CCIxB
+ //! - \b TIMER_B_CAPTURE_INPUTSELECT_GND
+ //! - \b TIMER_B_CAPTURE_INPUTSELECT_Vcc
+ uint16_t captureInputSelect;
+ //! Decides if capture source should be synchronized with Timer_B clock
+ //! \n Valid values are:
+ //! - \b TIMER_B_CAPTURE_ASYNCHRONOUS [Default]
+ //! - \b TIMER_B_CAPTURE_SYNCHRONOUS
+ uint16_t synchronizeCaptureSource;
+ //! Is to enable or disable Timer_B capture compare interrupt.
+ //! \n Valid values are:
+ //! - \b TIMER_B_CAPTURECOMPARE_INTERRUPT_DISABLE [Default]
+ //! - \b TIMER_B_CAPTURECOMPARE_INTERRUPT_ENABLE
+ uint16_t captureInterruptEnable;
+ //! Specifies the output mode.
+ //! \n Valid values are:
+ //! - \b TIMER_B_OUTPUTMODE_OUTBITVALUE [Default]
+ //! - \b TIMER_B_OUTPUTMODE_SET
+ //! - \b TIMER_B_OUTPUTMODE_TOGGLE_RESET
+ //! - \b TIMER_B_OUTPUTMODE_SET_RESET
+ //! - \b TIMER_B_OUTPUTMODE_TOGGLE
+ //! - \b TIMER_B_OUTPUTMODE_RESET
+ //! - \b TIMER_B_OUTPUTMODE_TOGGLE_SET
+ //! - \b TIMER_B_OUTPUTMODE_RESET_SET
+ uint16_t captureOutputMode;
+} Timer_B_initCaptureModeParam;
+
+//*****************************************************************************
+//
+//! \brief Used in the Timer_B_initContinuousMode() function as the param
+//! parameter.
+//
+//*****************************************************************************
+typedef struct Timer_B_initContinuousModeParam {
+ //! Selects the clock source
+ //! \n Valid values are:
+ //! - \b TIMER_B_CLOCKSOURCE_EXTERNAL_TXCLK [Default]
+ //! - \b TIMER_B_CLOCKSOURCE_ACLK
+ //! - \b TIMER_B_CLOCKSOURCE_SMCLK
+ //! - \b TIMER_B_CLOCKSOURCE_INVERTED_EXTERNAL_TXCLK
+ uint16_t clockSource;
+ //! Is the divider for Clock source.
+ //! \n Valid values are:
+ //! - \b TIMER_B_CLOCKSOURCE_DIVIDER_1 [Default]
+ //! - \b TIMER_B_CLOCKSOURCE_DIVIDER_2
+ //! - \b TIMER_B_CLOCKSOURCE_DIVIDER_3
+ //! - \b TIMER_B_CLOCKSOURCE_DIVIDER_4
+ //! - \b TIMER_B_CLOCKSOURCE_DIVIDER_5
+ //! - \b TIMER_B_CLOCKSOURCE_DIVIDER_6
+ //! - \b TIMER_B_CLOCKSOURCE_DIVIDER_7
+ //! - \b TIMER_B_CLOCKSOURCE_DIVIDER_8
+ //! - \b TIMER_B_CLOCKSOURCE_DIVIDER_10
+ //! - \b TIMER_B_CLOCKSOURCE_DIVIDER_12
+ //! - \b TIMER_B_CLOCKSOURCE_DIVIDER_14
+ //! - \b TIMER_B_CLOCKSOURCE_DIVIDER_16
+ //! - \b TIMER_B_CLOCKSOURCE_DIVIDER_20
+ //! - \b TIMER_B_CLOCKSOURCE_DIVIDER_24
+ //! - \b TIMER_B_CLOCKSOURCE_DIVIDER_28
+ //! - \b TIMER_B_CLOCKSOURCE_DIVIDER_32
+ //! - \b TIMER_B_CLOCKSOURCE_DIVIDER_40
+ //! - \b TIMER_B_CLOCKSOURCE_DIVIDER_48
+ //! - \b TIMER_B_CLOCKSOURCE_DIVIDER_56
+ //! - \b TIMER_B_CLOCKSOURCE_DIVIDER_64
+ uint16_t clockSourceDivider;
+ //! Is to enable or disable Timer_B interrupt
+ //! \n Valid values are:
+ //! - \b TIMER_B_TBIE_INTERRUPT_ENABLE
+ //! - \b TIMER_B_TBIE_INTERRUPT_DISABLE [Default]
+ uint16_t timerInterruptEnable_TBIE;
+ //! Decides if Timer_B clock divider, count direction, count need to be
+ //! reset.
+ //! \n Valid values are:
+ //! - \b TIMER_B_DO_CLEAR
+ //! - \b TIMER_B_SKIP_CLEAR [Default]
+ uint16_t timerClear;
+ //! Whether to start the timer immediately
+ bool startTimer;
+} Timer_B_initContinuousModeParam;
+
+//*****************************************************************************
+//
+//! \brief Used in the Timer_B_initUpDownMode() function as the param
+//! parameter.
+//
+//*****************************************************************************
+typedef struct Timer_B_initUpDownModeParam {
+ //! Selects the clock source
+ //! \n Valid values are:
+ //! - \b TIMER_B_CLOCKSOURCE_EXTERNAL_TXCLK [Default]
+ //! - \b TIMER_B_CLOCKSOURCE_ACLK
+ //! - \b TIMER_B_CLOCKSOURCE_SMCLK
+ //! - \b TIMER_B_CLOCKSOURCE_INVERTED_EXTERNAL_TXCLK
+ uint16_t clockSource;
+ //! Is the divider for Clock source.
+ //! \n Valid values are:
+ //! - \b TIMER_B_CLOCKSOURCE_DIVIDER_1 [Default]
+ //! - \b TIMER_B_CLOCKSOURCE_DIVIDER_2
+ //! - \b TIMER_B_CLOCKSOURCE_DIVIDER_3
+ //! - \b TIMER_B_CLOCKSOURCE_DIVIDER_4
+ //! - \b TIMER_B_CLOCKSOURCE_DIVIDER_5
+ //! - \b TIMER_B_CLOCKSOURCE_DIVIDER_6
+ //! - \b TIMER_B_CLOCKSOURCE_DIVIDER_7
+ //! - \b TIMER_B_CLOCKSOURCE_DIVIDER_8
+ //! - \b TIMER_B_CLOCKSOURCE_DIVIDER_10
+ //! - \b TIMER_B_CLOCKSOURCE_DIVIDER_12
+ //! - \b TIMER_B_CLOCKSOURCE_DIVIDER_14
+ //! - \b TIMER_B_CLOCKSOURCE_DIVIDER_16
+ //! - \b TIMER_B_CLOCKSOURCE_DIVIDER_20
+ //! - \b TIMER_B_CLOCKSOURCE_DIVIDER_24
+ //! - \b TIMER_B_CLOCKSOURCE_DIVIDER_28
+ //! - \b TIMER_B_CLOCKSOURCE_DIVIDER_32
+ //! - \b TIMER_B_CLOCKSOURCE_DIVIDER_40
+ //! - \b TIMER_B_CLOCKSOURCE_DIVIDER_48
+ //! - \b TIMER_B_CLOCKSOURCE_DIVIDER_56
+ //! - \b TIMER_B_CLOCKSOURCE_DIVIDER_64
+ uint16_t clockSourceDivider;
+ //! Is the specified Timer_B period
+ uint16_t timerPeriod;
+ //! Is to enable or disable Timer_B interrupt
+ //! \n Valid values are:
+ //! - \b TIMER_B_TBIE_INTERRUPT_ENABLE
+ //! - \b TIMER_B_TBIE_INTERRUPT_DISABLE [Default]
+ uint16_t timerInterruptEnable_TBIE;
+ //! Is to enable or disable Timer_B CCR0 capture compare interrupt.
+ //! \n Valid values are:
+ //! - \b TIMER_B_CCIE_CCR0_INTERRUPT_ENABLE
+ //! - \b TIMER_B_CCIE_CCR0_INTERRUPT_DISABLE [Default]
+ uint16_t captureCompareInterruptEnable_CCR0_CCIE;
+ //! Decides if Timer_B clock divider, count direction, count need to be
+ //! reset.
+ //! \n Valid values are:
+ //! - \b TIMER_B_DO_CLEAR
+ //! - \b TIMER_B_SKIP_CLEAR [Default]
+ uint16_t timerClear;
+ //! Whether to start the timer immediately
+ bool startTimer;
+} Timer_B_initUpDownModeParam;
+
+//*****************************************************************************
+//
+//! \brief Used in the Timer_B_initCompareMode() function as the param
+//! parameter.
+//
+//*****************************************************************************
+typedef struct Timer_B_initCompareModeParam {
+ //! Selects the compare register being used. Refer to datasheet to ensure
+ //! the device has the compare register being used.
+ //! \n Valid values are:
+ //! - \b TIMER_B_CAPTURECOMPARE_REGISTER_0
+ //! - \b TIMER_B_CAPTURECOMPARE_REGISTER_1
+ //! - \b TIMER_B_CAPTURECOMPARE_REGISTER_2
+ //! - \b TIMER_B_CAPTURECOMPARE_REGISTER_3
+ //! - \b TIMER_B_CAPTURECOMPARE_REGISTER_4
+ //! - \b TIMER_B_CAPTURECOMPARE_REGISTER_5
+ //! - \b TIMER_B_CAPTURECOMPARE_REGISTER_6
+ uint16_t compareRegister;
+ //! Is to enable or disable Timer_B capture compare interrupt.
+ //! \n Valid values are:
+ //! - \b TIMER_B_CAPTURECOMPARE_INTERRUPT_DISABLE [Default]
+ //! - \b TIMER_B_CAPTURECOMPARE_INTERRUPT_ENABLE
+ uint16_t compareInterruptEnable;
+ //! Specifies the output mode.
+ //! \n Valid values are:
+ //! - \b TIMER_B_OUTPUTMODE_OUTBITVALUE [Default]
+ //! - \b TIMER_B_OUTPUTMODE_SET
+ //! - \b TIMER_B_OUTPUTMODE_TOGGLE_RESET
+ //! - \b TIMER_B_OUTPUTMODE_SET_RESET
+ //! - \b TIMER_B_OUTPUTMODE_TOGGLE
+ //! - \b TIMER_B_OUTPUTMODE_RESET
+ //! - \b TIMER_B_OUTPUTMODE_TOGGLE_SET
+ //! - \b TIMER_B_OUTPUTMODE_RESET_SET
+ uint16_t compareOutputMode;
+ //! Is the count to be compared with in compare mode
+ uint16_t compareValue;
+} Timer_B_initCompareModeParam;
+
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the param parameter for
+// functions: Timer_B_initContinuousMode(), Timer_B_initUpMode(),
+// Timer_B_initUpDownMode(), and Timer_B_outputPWM().
+//
+//*****************************************************************************
+#define TIMER_B_CLOCKSOURCE_DIVIDER_1 0x00
+#define TIMER_B_CLOCKSOURCE_DIVIDER_2 0x08
+#define TIMER_B_CLOCKSOURCE_DIVIDER_3 0x02
+#define TIMER_B_CLOCKSOURCE_DIVIDER_4 0x10
+#define TIMER_B_CLOCKSOURCE_DIVIDER_5 0x04
+#define TIMER_B_CLOCKSOURCE_DIVIDER_6 0x05
+#define TIMER_B_CLOCKSOURCE_DIVIDER_7 0x06
+#define TIMER_B_CLOCKSOURCE_DIVIDER_8 0x18
+#define TIMER_B_CLOCKSOURCE_DIVIDER_10 0x0C
+#define TIMER_B_CLOCKSOURCE_DIVIDER_12 0x0D
+#define TIMER_B_CLOCKSOURCE_DIVIDER_14 0x0E
+#define TIMER_B_CLOCKSOURCE_DIVIDER_16 0x0F
+#define TIMER_B_CLOCKSOURCE_DIVIDER_20 0x14
+#define TIMER_B_CLOCKSOURCE_DIVIDER_24 0x15
+#define TIMER_B_CLOCKSOURCE_DIVIDER_28 0x16
+#define TIMER_B_CLOCKSOURCE_DIVIDER_32 0x17
+#define TIMER_B_CLOCKSOURCE_DIVIDER_40 0x1C
+#define TIMER_B_CLOCKSOURCE_DIVIDER_48 0x1D
+#define TIMER_B_CLOCKSOURCE_DIVIDER_56 0x1E
+#define TIMER_B_CLOCKSOURCE_DIVIDER_64 0x1F
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the timerMode parameter for
+// functions: Timer_B_startCounter().
+//
+//*****************************************************************************
+#define TIMER_B_STOP_MODE MC_0
+#define TIMER_B_UP_MODE MC_1
+#define TIMER_B_CONTINUOUS_MODE MC_2
+#define TIMER_B_UPDOWN_MODE MC_3
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the param parameter for
+// functions: Timer_B_initContinuousMode(), Timer_B_initUpMode(), and
+// Timer_B_initUpDownMode().
+//
+//*****************************************************************************
+#define TIMER_B_DO_CLEAR TBCLR
+#define TIMER_B_SKIP_CLEAR 0x00
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the param parameter for
+// functions: Timer_B_initContinuousMode(), Timer_B_initUpMode(),
+// Timer_B_initUpDownMode(), and Timer_B_outputPWM().
+//
+//*****************************************************************************
+#define TIMER_B_CLOCKSOURCE_EXTERNAL_TXCLK TBSSEL__TACLK
+#define TIMER_B_CLOCKSOURCE_ACLK TBSSEL__ACLK
+#define TIMER_B_CLOCKSOURCE_SMCLK TBSSEL__SMCLK
+#define TIMER_B_CLOCKSOURCE_INVERTED_EXTERNAL_TXCLK TBSSEL__INCLK
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the param parameter for
+// functions: Timer_B_initContinuousMode(), Timer_B_initUpMode(), and
+// Timer_B_initUpDownMode().
+//
+//*****************************************************************************
+#define TIMER_B_TBIE_INTERRUPT_ENABLE TBIE
+#define TIMER_B_TBIE_INTERRUPT_DISABLE 0x00
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the param parameter for
+// functions: Timer_B_initUpMode(), and Timer_B_initUpDownMode().
+//
+//*****************************************************************************
+#define TIMER_B_CCIE_CCR0_INTERRUPT_ENABLE CCIE
+#define TIMER_B_CCIE_CCR0_INTERRUPT_DISABLE 0x00
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the param parameter for
+// functions: Timer_B_initCaptureMode(), and Timer_B_initCompareMode().
+//
+//*****************************************************************************
+#define TIMER_B_CAPTURECOMPARE_INTERRUPT_DISABLE 0x00
+#define TIMER_B_CAPTURECOMPARE_INTERRUPT_ENABLE CCIE
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the param parameter for
+// functions: Timer_B_initCaptureMode().
+//
+//*****************************************************************************
+#define TIMER_B_CAPTURE_INPUTSELECT_CCIxA CCIS_0
+#define TIMER_B_CAPTURE_INPUTSELECT_CCIxB CCIS_1
+#define TIMER_B_CAPTURE_INPUTSELECT_GND CCIS_2
+#define TIMER_B_CAPTURE_INPUTSELECT_Vcc CCIS_3
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the compareOutputMode
+// parameter for functions: Timer_B_setOutputMode(); the param parameter for
+// functions: Timer_B_initCaptureMode(), Timer_B_initCompareMode(), and
+// Timer_B_outputPWM().
+//
+//*****************************************************************************
+#define TIMER_B_OUTPUTMODE_OUTBITVALUE OUTMOD_0
+#define TIMER_B_OUTPUTMODE_SET OUTMOD_1
+#define TIMER_B_OUTPUTMODE_TOGGLE_RESET OUTMOD_2
+#define TIMER_B_OUTPUTMODE_SET_RESET OUTMOD_3
+#define TIMER_B_OUTPUTMODE_TOGGLE OUTMOD_4
+#define TIMER_B_OUTPUTMODE_RESET OUTMOD_5
+#define TIMER_B_OUTPUTMODE_TOGGLE_SET OUTMOD_6
+#define TIMER_B_OUTPUTMODE_RESET_SET OUTMOD_7
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the compareRegister parameter
+// for functions: Timer_B_setCompareValue(),
+// Timer_B_initCompareLatchLoadEvent(), and Timer_B_setOutputMode(); the
+// captureCompareRegister parameter for functions:
+// Timer_B_enableCaptureCompareInterrupt(),
+// Timer_B_disableCaptureCompareInterrupt(),
+// Timer_B_getCaptureCompareInterruptStatus(),
+// Timer_B_getSynchronizedCaptureCompareInput(),
+// Timer_B_getOutputForOutputModeOutBitValue(),
+// Timer_B_getCaptureCompareCount(),
+// Timer_B_setOutputForOutputModeOutBitValue(), and
+// Timer_B_clearCaptureCompareInterrupt(); the param parameter for functions:
+// Timer_B_initCaptureMode(), Timer_B_initCompareMode(), and
+// Timer_B_outputPWM().
+//
+//*****************************************************************************
+#define TIMER_B_CAPTURECOMPARE_REGISTER_0 0x02
+#define TIMER_B_CAPTURECOMPARE_REGISTER_1 0x04
+#define TIMER_B_CAPTURECOMPARE_REGISTER_2 0x06
+#define TIMER_B_CAPTURECOMPARE_REGISTER_3 0x08
+#define TIMER_B_CAPTURECOMPARE_REGISTER_4 0x0A
+#define TIMER_B_CAPTURECOMPARE_REGISTER_5 0x0C
+#define TIMER_B_CAPTURECOMPARE_REGISTER_6 0x0E
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the param parameter for
+// functions: Timer_B_initCaptureMode().
+//
+//*****************************************************************************
+#define TIMER_B_CAPTUREMODE_NO_CAPTURE CM_0
+#define TIMER_B_CAPTUREMODE_RISING_EDGE CM_1
+#define TIMER_B_CAPTUREMODE_FALLING_EDGE CM_2
+#define TIMER_B_CAPTUREMODE_RISING_AND_FALLING_EDGE CM_3
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the param parameter for
+// functions: Timer_B_initCaptureMode().
+//
+//*****************************************************************************
+#define TIMER_B_CAPTURE_ASYNCHRONOUS 0x00
+#define TIMER_B_CAPTURE_SYNCHRONOUS SCS
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the mask parameter for
+// functions: Timer_B_getCaptureCompareInterruptStatus() as well as returned by
+// the Timer_B_getCaptureCompareInterruptStatus() function.
+//
+//*****************************************************************************
+#define TIMER_B_CAPTURE_OVERFLOW COV
+#define TIMER_B_CAPTURECOMPARE_INTERRUPT_FLAG CCIFG
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the synchronized parameter
+// for functions: Timer_B_getSynchronizedCaptureCompareInput().
+//
+//*****************************************************************************
+#define TIMER_B_READ_SYNCHRONIZED_CAPTURECOMPAREINPUT SCCI
+#define TIMER_B_READ_CAPTURE_COMPARE_INPUT CCI
+
+//*****************************************************************************
+//
+// The following are values that can be passed toThe following are values that
+// can be returned by the Timer_B_getSynchronizedCaptureCompareInput()
+// function.
+//
+//*****************************************************************************
+#define TIMER_B_CAPTURECOMPARE_INPUT_HIGH 0x01
+#define TIMER_B_CAPTURECOMPARE_INPUT_LOW 0x00
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the outputModeOutBitValue
+// parameter for functions: Timer_B_setOutputForOutputModeOutBitValue() as well
+// as returned by the Timer_B_getOutputForOutputModeOutBitValue() function.
+//
+//*****************************************************************************
+#define TIMER_B_OUTPUTMODE_OUTBITVALUE_HIGH OUT
+#define TIMER_B_OUTPUTMODE_OUTBITVALUE_LOW 0x00
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the counterLength parameter
+// for functions: Timer_B_selectCounterLength().
+//
+//*****************************************************************************
+#define TIMER_B_COUNTER_16BIT CNTL_0
+#define TIMER_B_COUNTER_12BIT CNTL_1
+#define TIMER_B_COUNTER_10BIT CNTL_2
+#define TIMER_B_COUNTER_8BIT CNTL_3
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the groupLatch parameter for
+// functions: Timer_B_selectLatchingGroup().
+//
+//*****************************************************************************
+#define TIMER_B_GROUP_NONE TBCLGRP_0
+#define TIMER_B_GROUP_CL12_CL23_CL56 TBCLGRP_1
+#define TIMER_B_GROUP_CL123_CL456 TBCLGRP_2
+#define TIMER_B_GROUP_ALL TBCLGRP_3
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the compareLatchLoadEvent
+// parameter for functions: Timer_B_initCompareLatchLoadEvent().
+//
+//*****************************************************************************
+#define TIMER_B_LATCH_ON_WRITE_TO_TBxCCRn_COMPARE_REGISTER CLLD_0
+#define TIMER_B_LATCH_WHEN_COUNTER_COUNTS_TO_0_IN_UP_OR_CONT_MODE CLLD_1
+#define TIMER_B_LATCH_WHEN_COUNTER_COUNTS_TO_0_IN_UPDOWN_MODE CLLD_2
+#define TIMER_B_LATCH_WHEN_COUNTER_COUNTS_TO_CURRENT_COMPARE_LATCH_VALUE CLLD_3
+
+//*****************************************************************************
+//
+// The following are values that can be passed toThe following are values that
+// can be returned by the Timer_B_getInterruptStatus() function.
+//
+//*****************************************************************************
+#define TIMER_B_INTERRUPT_NOT_PENDING 0x00
+#define TIMER_B_INTERRUPT_PENDING 0x01
+
+//*****************************************************************************
+//
+// Prototypes for the APIs.
+//
+//*****************************************************************************
+
+//*****************************************************************************
+//
+//! \brief Starts Timer_B counter
+//!
+//! This function assumes that the timer has been previously configured using
+//! Timer_B_initContinuousMode, Timer_B_initUpMode or Timer_B_initUpDownMode.
+//!
+//! \param baseAddress is the base address of the TIMER_B module.
+//! \param timerMode selects the mode of the timer
+//! Valid values are:
+//! - \b TIMER_B_STOP_MODE
+//! - \b TIMER_B_UP_MODE
+//! - \b TIMER_B_CONTINUOUS_MODE [Default]
+//! - \b TIMER_B_UPDOWN_MODE
+//!
+//! Modified bits of \b TBxCTL register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void Timer_B_startCounter(uint16_t baseAddress,
+ uint16_t timerMode);
+
+//*****************************************************************************
+//
+//! \brief Configures Timer_B in continuous mode.
+//!
+//! This API does not start the timer. Timer needs to be started when required
+//! using the Timer_B_startCounter API.
+//!
+//! \param baseAddress is the base address of the TIMER_B module.
+//! \param param is the pointer to struct for continuous mode initialization.
+//!
+//! Modified bits of \b TBxCTL register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void Timer_B_initContinuousMode(uint16_t baseAddress,
+ Timer_B_initContinuousModeParam *param);
+
+//*****************************************************************************
+//
+//! \brief Configures Timer_B in up mode.
+//!
+//! This API does not start the timer. Timer needs to be started when required
+//! using the Timer_B_startCounter API.
+//!
+//! \param baseAddress is the base address of the TIMER_B module.
+//! \param param is the pointer to struct for up mode initialization.
+//!
+//! Modified bits of \b TBxCTL register, bits of \b TBxCCTL0 register and bits
+//! of \b TBxCCR0 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void Timer_B_initUpMode(uint16_t baseAddress,
+ Timer_B_initUpModeParam *param);
+
+//*****************************************************************************
+//
+//! \brief Configures Timer_B in up down mode.
+//!
+//! This API does not start the timer. Timer needs to be started when required
+//! using the Timer_B_startCounter API.
+//!
+//! \param baseAddress is the base address of the TIMER_B module.
+//! \param param is the pointer to struct for up-down mode initialization.
+//!
+//! Modified bits of \b TBxCTL register, bits of \b TBxCCTL0 register and bits
+//! of \b TBxCCR0 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void Timer_B_initUpDownMode(uint16_t baseAddress,
+ Timer_B_initUpDownModeParam *param);
+
+//*****************************************************************************
+//
+//! \brief Initializes Capture Mode
+//!
+//! \param baseAddress is the base address of the TIMER_B module.
+//! \param param is the pointer to struct for capture mode initialization.
+//!
+//! Modified bits of \b TBxCCTLn register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void Timer_B_initCaptureMode(uint16_t baseAddress,
+ Timer_B_initCaptureModeParam *param);
+
+//*****************************************************************************
+//
+//! \brief Initializes Compare Mode
+//!
+//! \param baseAddress is the base address of the TIMER_B module.
+//! \param param is the pointer to struct for compare mode initialization.
+//!
+//! Modified bits of \b TBxCCTLn register and bits of \b TBxCCRn register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void Timer_B_initCompareMode(uint16_t baseAddress,
+ Timer_B_initCompareModeParam *param);
+
+//*****************************************************************************
+//
+//! \brief Enable Timer_B interrupt
+//!
+//! Enables Timer_B interrupt. Does not clear interrupt flags.
+//!
+//! \param baseAddress is the base address of the TIMER_B module.
+//!
+//! Modified bits of \b TBxCTL register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void Timer_B_enableInterrupt(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Disable Timer_B interrupt
+//!
+//! \param baseAddress is the base address of the TIMER_B module.
+//!
+//! Modified bits of \b TBxCTL register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void Timer_B_disableInterrupt(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Get Timer_B interrupt status
+//!
+//! \param baseAddress is the base address of the TIMER_B module.
+//!
+//! \return One of the following:
+//! - \b TIMER_B_INTERRUPT_NOT_PENDING
+//! - \b TIMER_B_INTERRUPT_PENDING
+//! \n indicating the status of the Timer_B interrupt
+//
+//*****************************************************************************
+extern uint32_t Timer_B_getInterruptStatus(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Enable capture compare interrupt
+//!
+//! \param baseAddress is the base address of the TIMER_B module.
+//! \param captureCompareRegister selects the capture compare register being
+//! used. Refer to datasheet to ensure the device has the capture
+//! compare register being used.
+//! Valid values are:
+//! - \b TIMER_B_CAPTURECOMPARE_REGISTER_0
+//! - \b TIMER_B_CAPTURECOMPARE_REGISTER_1
+//! - \b TIMER_B_CAPTURECOMPARE_REGISTER_2
+//! - \b TIMER_B_CAPTURECOMPARE_REGISTER_3
+//! - \b TIMER_B_CAPTURECOMPARE_REGISTER_4
+//! - \b TIMER_B_CAPTURECOMPARE_REGISTER_5
+//! - \b TIMER_B_CAPTURECOMPARE_REGISTER_6
+//!
+//! Modified bits of \b TBxCCTLn register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void Timer_B_enableCaptureCompareInterrupt(uint16_t baseAddress,
+ uint16_t captureCompareRegister);
+
+//*****************************************************************************
+//
+//! \brief Disable capture compare interrupt
+//!
+//! \param baseAddress is the base address of the TIMER_B module.
+//! \param captureCompareRegister selects the capture compare register being
+//! used. Refer to datasheet to ensure the device has the capture
+//! compare register being used.
+//! Valid values are:
+//! - \b TIMER_B_CAPTURECOMPARE_REGISTER_0
+//! - \b TIMER_B_CAPTURECOMPARE_REGISTER_1
+//! - \b TIMER_B_CAPTURECOMPARE_REGISTER_2
+//! - \b TIMER_B_CAPTURECOMPARE_REGISTER_3
+//! - \b TIMER_B_CAPTURECOMPARE_REGISTER_4
+//! - \b TIMER_B_CAPTURECOMPARE_REGISTER_5
+//! - \b TIMER_B_CAPTURECOMPARE_REGISTER_6
+//!
+//! Modified bits of \b TBxCCTLn register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void Timer_B_disableCaptureCompareInterrupt(uint16_t baseAddress,
+ uint16_t captureCompareRegister);
+
+//*****************************************************************************
+//
+//! \brief Return capture compare interrupt status
+//!
+//! \param baseAddress is the base address of the TIMER_B module.
+//! \param captureCompareRegister selects the capture compare register being
+//! used. Refer to datasheet to ensure the device has the capture
+//! compare register being used.
+//! Valid values are:
+//! - \b TIMER_B_CAPTURECOMPARE_REGISTER_0
+//! - \b TIMER_B_CAPTURECOMPARE_REGISTER_1
+//! - \b TIMER_B_CAPTURECOMPARE_REGISTER_2
+//! - \b TIMER_B_CAPTURECOMPARE_REGISTER_3
+//! - \b TIMER_B_CAPTURECOMPARE_REGISTER_4
+//! - \b TIMER_B_CAPTURECOMPARE_REGISTER_5
+//! - \b TIMER_B_CAPTURECOMPARE_REGISTER_6
+//! \param mask is the mask for the interrupt status
+//! Mask value is the logical OR of any of the following:
+//! - \b TIMER_B_CAPTURE_OVERFLOW
+//! - \b TIMER_B_CAPTURECOMPARE_INTERRUPT_FLAG
+//!
+//! \return Logical OR of any of the following:
+//! - \b TIMER_B_CAPTURE_OVERFLOW
+//! - \b TIMER_B_CAPTURECOMPARE_INTERRUPT_FLAG
+//! \n indicating the status of the masked interrupts
+//
+//*****************************************************************************
+extern uint32_t Timer_B_getCaptureCompareInterruptStatus(uint16_t baseAddress,
+ uint16_t captureCompareRegister,
+ uint16_t mask);
+
+//*****************************************************************************
+//
+//! \brief Reset/Clear the Timer_B clock divider, count direction, count
+//!
+//! \param baseAddress is the base address of the TIMER_B module.
+//!
+//! Modified bits of \b TBxCTL register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void Timer_B_clear(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Get synchronized capturecompare input
+//!
+//! \param baseAddress is the base address of the TIMER_B module.
+//! \param captureCompareRegister selects the capture compare register being
+//! used. Refer to datasheet to ensure the device has the capture
+//! compare register being used.
+//! Valid values are:
+//! - \b TIMER_B_CAPTURECOMPARE_REGISTER_0
+//! - \b TIMER_B_CAPTURECOMPARE_REGISTER_1
+//! - \b TIMER_B_CAPTURECOMPARE_REGISTER_2
+//! - \b TIMER_B_CAPTURECOMPARE_REGISTER_3
+//! - \b TIMER_B_CAPTURECOMPARE_REGISTER_4
+//! - \b TIMER_B_CAPTURECOMPARE_REGISTER_5
+//! - \b TIMER_B_CAPTURECOMPARE_REGISTER_6
+//! \param synchronized selects the type of capture compare input
+//! Valid values are:
+//! - \b TIMER_B_READ_SYNCHRONIZED_CAPTURECOMPAREINPUT
+//! - \b TIMER_B_READ_CAPTURE_COMPARE_INPUT
+//!
+//! \return One of the following:
+//! - \b TIMER_B_CAPTURECOMPARE_INPUT_HIGH
+//! - \b TIMER_B_CAPTURECOMPARE_INPUT_LOW
+//
+//*****************************************************************************
+extern uint8_t Timer_B_getSynchronizedCaptureCompareInput(uint16_t baseAddress,
+ uint16_t captureCompareRegister,
+ uint16_t synchronized);
+
+//*****************************************************************************
+//
+//! \brief Get output bit for output mode
+//!
+//! \param baseAddress is the base address of the TIMER_B module.
+//! \param captureCompareRegister selects the capture compare register being
+//! used. Refer to datasheet to ensure the device has the capture
+//! compare register being used.
+//! Valid values are:
+//! - \b TIMER_B_CAPTURECOMPARE_REGISTER_0
+//! - \b TIMER_B_CAPTURECOMPARE_REGISTER_1
+//! - \b TIMER_B_CAPTURECOMPARE_REGISTER_2
+//! - \b TIMER_B_CAPTURECOMPARE_REGISTER_3
+//! - \b TIMER_B_CAPTURECOMPARE_REGISTER_4
+//! - \b TIMER_B_CAPTURECOMPARE_REGISTER_5
+//! - \b TIMER_B_CAPTURECOMPARE_REGISTER_6
+//!
+//! \return One of the following:
+//! - \b TIMER_B_OUTPUTMODE_OUTBITVALUE_HIGH
+//! - \b TIMER_B_OUTPUTMODE_OUTBITVALUE_LOW
+//
+//*****************************************************************************
+extern uint8_t Timer_B_getOutputForOutputModeOutBitValue(uint16_t baseAddress,
+ uint16_t captureCompareRegister);
+
+//*****************************************************************************
+//
+//! \brief Get current capturecompare count
+//!
+//! \param baseAddress is the base address of the TIMER_B module.
+//! \param captureCompareRegister selects the capture compare register being
+//! used. Refer to datasheet to ensure the device has the capture
+//! compare register being used.
+//! Valid values are:
+//! - \b TIMER_B_CAPTURECOMPARE_REGISTER_0
+//! - \b TIMER_B_CAPTURECOMPARE_REGISTER_1
+//! - \b TIMER_B_CAPTURECOMPARE_REGISTER_2
+//! - \b TIMER_B_CAPTURECOMPARE_REGISTER_3
+//! - \b TIMER_B_CAPTURECOMPARE_REGISTER_4
+//! - \b TIMER_B_CAPTURECOMPARE_REGISTER_5
+//! - \b TIMER_B_CAPTURECOMPARE_REGISTER_6
+//!
+//! \return Current count as uint16_t
+//
+//*****************************************************************************
+extern uint16_t Timer_B_getCaptureCompareCount(uint16_t baseAddress,
+ uint16_t captureCompareRegister);
+
+//*****************************************************************************
+//
+//! \brief Set output bit for output mode
+//!
+//! \param baseAddress is the base address of the TIMER_B module.
+//! \param captureCompareRegister selects the capture compare register being
+//! used. Refer to datasheet to ensure the device has the capture
+//! compare register being used.
+//! Valid values are:
+//! - \b TIMER_B_CAPTURECOMPARE_REGISTER_0
+//! - \b TIMER_B_CAPTURECOMPARE_REGISTER_1
+//! - \b TIMER_B_CAPTURECOMPARE_REGISTER_2
+//! - \b TIMER_B_CAPTURECOMPARE_REGISTER_3
+//! - \b TIMER_B_CAPTURECOMPARE_REGISTER_4
+//! - \b TIMER_B_CAPTURECOMPARE_REGISTER_5
+//! - \b TIMER_B_CAPTURECOMPARE_REGISTER_6
+//! \param outputModeOutBitValue the value to be set for out bit
+//! Valid values are:
+//! - \b TIMER_B_OUTPUTMODE_OUTBITVALUE_HIGH
+//! - \b TIMER_B_OUTPUTMODE_OUTBITVALUE_LOW
+//!
+//! Modified bits of \b TBxCCTLn register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void Timer_B_setOutputForOutputModeOutBitValue(uint16_t baseAddress,
+ uint16_t captureCompareRegister,
+ uint8_t outputModeOutBitValue);
+
+//*****************************************************************************
+//
+//! \brief Generate a PWM with Timer_B running in up mode
+//!
+//! \param baseAddress is the base address of the TIMER_B module.
+//! \param param is the pointer to struct for PWM configuration.
+//!
+//! Modified bits of \b TBxCCTLn register, bits of \b TBxCTL register, bits of
+//! \b TBxCCTL0 register and bits of \b TBxCCR0 register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void Timer_B_outputPWM(uint16_t baseAddress,
+ Timer_B_outputPWMParam *param);
+
+//*****************************************************************************
+//
+//! \brief Stops the Timer_B
+//!
+//! \param baseAddress is the base address of the TIMER_B module.
+//!
+//! Modified bits of \b TBxCTL register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void Timer_B_stop(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Sets the value of the capture-compare register
+//!
+//! \param baseAddress is the base address of the TIMER_B module.
+//! \param compareRegister selects the compare register being used. Refer to
+//! datasheet to ensure the device has the compare register being used.
+//! Valid values are:
+//! - \b TIMER_B_CAPTURECOMPARE_REGISTER_0
+//! - \b TIMER_B_CAPTURECOMPARE_REGISTER_1
+//! - \b TIMER_B_CAPTURECOMPARE_REGISTER_2
+//! - \b TIMER_B_CAPTURECOMPARE_REGISTER_3
+//! - \b TIMER_B_CAPTURECOMPARE_REGISTER_4
+//! - \b TIMER_B_CAPTURECOMPARE_REGISTER_5
+//! - \b TIMER_B_CAPTURECOMPARE_REGISTER_6
+//! \param compareValue is the count to be compared with in compare mode
+//!
+//! Modified bits of \b TBxCCRn register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void Timer_B_setCompareValue(uint16_t baseAddress,
+ uint16_t compareRegister,
+ uint16_t compareValue);
+
+//*****************************************************************************
+//
+//! \brief Clears the Timer_B TBIFG interrupt flag
+//!
+//! \param baseAddress is the base address of the TIMER_B module.
+//!
+//! Modified bits are \b TBIFG of \b TBxCTL register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void Timer_B_clearTimerInterrupt(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Clears the capture-compare interrupt flag
+//!
+//! \param baseAddress is the base address of the TIMER_B module.
+//! \param captureCompareRegister selects the capture compare register being
+//! used. Refer to datasheet to ensure the device has the capture
+//! compare register being used.
+//! Valid values are:
+//! - \b TIMER_B_CAPTURECOMPARE_REGISTER_0
+//! - \b TIMER_B_CAPTURECOMPARE_REGISTER_1
+//! - \b TIMER_B_CAPTURECOMPARE_REGISTER_2
+//! - \b TIMER_B_CAPTURECOMPARE_REGISTER_3
+//! - \b TIMER_B_CAPTURECOMPARE_REGISTER_4
+//! - \b TIMER_B_CAPTURECOMPARE_REGISTER_5
+//! - \b TIMER_B_CAPTURECOMPARE_REGISTER_6
+//!
+//! Modified bits are \b CCIFG of \b TBxCCTLn register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void Timer_B_clearCaptureCompareInterrupt(uint16_t baseAddress,
+ uint16_t captureCompareRegister);
+
+//*****************************************************************************
+//
+//! \brief Selects Timer_B counter length
+//!
+//! \param baseAddress is the base address of the TIMER_B module.
+//! \param counterLength selects the value of counter length.
+//! Valid values are:
+//! - \b TIMER_B_COUNTER_16BIT [Default]
+//! - \b TIMER_B_COUNTER_12BIT
+//! - \b TIMER_B_COUNTER_10BIT
+//! - \b TIMER_B_COUNTER_8BIT
+//!
+//! Modified bits are \b CNTL of \b TBxCTL register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void Timer_B_selectCounterLength(uint16_t baseAddress,
+ uint16_t counterLength);
+
+//*****************************************************************************
+//
+//! \brief Selects Timer_B Latching Group
+//!
+//! \param baseAddress is the base address of the TIMER_B module.
+//! \param groupLatch selects the latching group.
+//! Valid values are:
+//! - \b TIMER_B_GROUP_NONE [Default]
+//! - \b TIMER_B_GROUP_CL12_CL23_CL56
+//! - \b TIMER_B_GROUP_CL123_CL456
+//! - \b TIMER_B_GROUP_ALL
+//!
+//! Modified bits are \b TBCLGRP of \b TBxCTL register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void Timer_B_selectLatchingGroup(uint16_t baseAddress,
+ uint16_t groupLatch);
+
+//*****************************************************************************
+//
+//! \brief Selects Compare Latch Load Event
+//!
+//! \param baseAddress is the base address of the TIMER_B module.
+//! \param compareRegister selects the compare register being used. Refer to
+//! datasheet to ensure the device has the compare register being used.
+//! Valid values are:
+//! - \b TIMER_B_CAPTURECOMPARE_REGISTER_0
+//! - \b TIMER_B_CAPTURECOMPARE_REGISTER_1
+//! - \b TIMER_B_CAPTURECOMPARE_REGISTER_2
+//! - \b TIMER_B_CAPTURECOMPARE_REGISTER_3
+//! - \b TIMER_B_CAPTURECOMPARE_REGISTER_4
+//! - \b TIMER_B_CAPTURECOMPARE_REGISTER_5
+//! - \b TIMER_B_CAPTURECOMPARE_REGISTER_6
+//! \param compareLatchLoadEvent selects the latch load event
+//! Valid values are:
+//! - \b TIMER_B_LATCH_ON_WRITE_TO_TBxCCRn_COMPARE_REGISTER [Default]
+//! - \b TIMER_B_LATCH_WHEN_COUNTER_COUNTS_TO_0_IN_UP_OR_CONT_MODE
+//! - \b TIMER_B_LATCH_WHEN_COUNTER_COUNTS_TO_0_IN_UPDOWN_MODE
+//! - \b
+//! TIMER_B_LATCH_WHEN_COUNTER_COUNTS_TO_CURRENT_COMPARE_LATCH_VALUE
+//!
+//! Modified bits are \b CLLD of \b TBxCCTLn register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void Timer_B_initCompareLatchLoadEvent(uint16_t baseAddress,
+ uint16_t compareRegister,
+ uint16_t compareLatchLoadEvent);
+
+//*****************************************************************************
+//
+//! \brief Reads the current timer count value
+//!
+//! Reads the current count value of the timer. There is a majority vote system
+//! in place to confirm an accurate value is returned. The Timer_B_THRESHOLD
+//! #define in the associated header file can be modified so that the votes
+//! must be closer together for a consensus to occur.
+//!
+//! \param baseAddress is the base address of the Timer module.
+//!
+//! \return Majority vote of timer count value
+//
+//*****************************************************************************
+extern uint16_t Timer_B_getCounterValue(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Sets the output mode
+//!
+//! Sets the output mode for the timer even the timer is already running.
+//!
+//! \param baseAddress is the base address of the TIMER_B module.
+//! \param compareRegister selects the compare register being used.
+//! Valid values are:
+//! - \b TIMER_B_CAPTURECOMPARE_REGISTER_0
+//! - \b TIMER_B_CAPTURECOMPARE_REGISTER_1
+//! - \b TIMER_B_CAPTURECOMPARE_REGISTER_2
+//! - \b TIMER_B_CAPTURECOMPARE_REGISTER_3
+//! - \b TIMER_B_CAPTURECOMPARE_REGISTER_4
+//! - \b TIMER_B_CAPTURECOMPARE_REGISTER_5
+//! - \b TIMER_B_CAPTURECOMPARE_REGISTER_6
+//! \param compareOutputMode specifies the output mode.
+//! Valid values are:
+//! - \b TIMER_B_OUTPUTMODE_OUTBITVALUE [Default]
+//! - \b TIMER_B_OUTPUTMODE_SET
+//! - \b TIMER_B_OUTPUTMODE_TOGGLE_RESET
+//! - \b TIMER_B_OUTPUTMODE_SET_RESET
+//! - \b TIMER_B_OUTPUTMODE_TOGGLE
+//! - \b TIMER_B_OUTPUTMODE_RESET
+//! - \b TIMER_B_OUTPUTMODE_TOGGLE_SET
+//! - \b TIMER_B_OUTPUTMODE_RESET_SET
+//!
+//! Modified bits are \b OUTMOD of \b TBxCCTLn register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void Timer_B_setOutputMode(uint16_t baseAddress,
+ uint16_t compareRegister,
+ uint16_t compareOutputMode);
+
+//*****************************************************************************
+//
+// Mark the end of the C bindings section for C++ compilers.
+//
+//*****************************************************************************
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+#endif // __MSP430WARE_TIMER_B_H__
diff --git a/Apps/FlightSoftware/MotorControl/driverlib/tlv.c b/Apps/FlightSoftware/MotorControl/driverlib/tlv.c
new file mode 100644
index 000000000..83406efe8
--- /dev/null
+++ b/Apps/FlightSoftware/MotorControl/driverlib/tlv.c
@@ -0,0 +1,239 @@
+/* --COPYRIGHT--,BSD
+ * Copyright (c) 2017, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * --/COPYRIGHT--*/
+//*****************************************************************************
+//
+// tlv.c - Driver for the tlv Module.
+//
+//*****************************************************************************
+
+//*****************************************************************************
+//
+//! \addtogroup tlv_api tlv
+//! @{
+//
+//*****************************************************************************
+
+#include "inc/hw_memmap.h"
+
+#ifdef __MSP430_HAS_TLV__
+#include "tlv.h"
+
+#include
+
+void TLV_getInfo(uint8_t tag,
+ uint8_t instance,
+ uint8_t *length,
+ uint16_t **data_address
+ )
+{
+ // TLV Structure Start Address
+ char *TLV_address = (char *)TLV_START;
+
+ while((TLV_address < (char *)TLV_END)
+ && ((*TLV_address != tag) || instance) // check for tag and instance
+ && (*TLV_address != TLV_TAGEND)) // do range check first
+ {
+ if (*TLV_address == tag)
+ {
+ // repeat till requested instance is reached
+ instance--;
+ }
+ // add (Current TAG address + LENGTH) + 2
+ TLV_address += *(TLV_address + 1) + 2;
+ }
+
+ // Check if Tag match happened..
+ if (*TLV_address == tag)
+ {
+ // Return length = Address + 1
+ *length = *(TLV_address + 1);
+ // Return address of first data/value info = Address + 2
+ *data_address = (uint16_t *)(TLV_address + 2);
+ }
+ // If there was no tag match and the end of TLV structure was reached..
+ else
+ {
+ // Return 0 for TAG not found
+ *length = 0;
+ // Return 0 for TAG not found
+ *data_address = 0;
+ }
+}
+
+uint16_t TLV_getDeviceType()
+{
+ uint16_t *pDeviceType = (uint16_t *)TLV_DEVICE_ID_0;
+ // Return Value from TLV Table
+ return pDeviceType[0];
+}
+
+uint16_t TLV_getMemory(uint8_t instance)
+{
+ uint8_t *pPDTAG;
+ uint8_t bPDTAG_bytes;
+ uint16_t count;
+
+ // set tag for word access comparison
+ instance *= 2;
+
+ // TLV access Function Call
+ // Get Peripheral data pointer
+ TLV_getInfo(TLV_PDTAG,
+ 0,
+ &bPDTAG_bytes,
+ (uint16_t **)&pPDTAG
+ );
+
+ for (count = 0;count <= instance; count += 2)
+ {
+ if (pPDTAG[count] == 0)
+ {
+ // Return 0 if end reached
+ return 0;
+ }
+ if (count == instance)
+ return (pPDTAG[count] | pPDTAG[count+1]<<8);
+ }
+
+ // Return 0: not found
+ return 0;
+}
+
+uint16_t TLV_getPeripheral(uint8_t tag,
+ uint8_t instance
+ )
+{
+ uint8_t *pPDTAG;
+ uint8_t bPDTAG_bytes;
+ uint16_t count = 0;
+ uint16_t pcount = 0;
+
+ // Get Peripheral data pointer
+ TLV_getInfo(TLV_PDTAG,
+ 0,
+ &bPDTAG_bytes,
+ (uint16_t **)&pPDTAG
+ );
+
+ // read memory configuration from TLV to get offset for Peripherals
+ while (TLV_getMemory(count))
+ {
+ count++;
+ }
+ // get number of Peripheral entries
+ pcount = pPDTAG[count * 2 + 1];
+ // inc count to first Periperal
+ count++;
+ // adjust point to first address of Peripheral
+ pPDTAG += count*2;
+ // set counter back to 0
+ count = 0;
+ // align pcount for work comparision
+ pcount *= 2;
+
+ // TLV access Function Call
+ for (count = 0; count <= pcount; count += 2)
+ {
+ if (pPDTAG[count+1] == tag)
+ {
+ // test if required Peripheral is found
+ if (instance > 0)
+ {
+ // test if required instance is found
+ instance--;
+ }
+ else
+ {
+ // Return found data
+ return (pPDTAG[count] | pPDTAG[count + 1] << 8);
+ }
+ }
+ }
+
+ // Return 0: not found
+ return 0;
+}
+
+uint8_t TLV_getInterrupt(uint8_t tag)
+{
+ uint8_t *pPDTAG;
+ uint8_t bPDTAG_bytes;
+ uint16_t count = 0;
+ uint16_t pcount = 0;
+
+ // Get Peripheral data pointer
+ TLV_getInfo(TLV_PDTAG,
+ 0,
+ &bPDTAG_bytes,
+ (uint16_t **)&pPDTAG
+ );
+
+ // read memory configuration from TLV to get offset for Peripherals
+ while (TLV_getMemory(count))
+ {
+ count++;
+ }
+
+ pcount = pPDTAG[count * 2 + 1];
+ // inc count to first Periperal
+ count++;
+ // adjust point to first address of Peripheral
+ pPDTAG += (pcount + count) * 2;
+ // set counter back to 0
+ count = 0;
+
+ // TLV access Function Call
+ for (count = 0; count <= tag; count += 2)
+ {
+ if (pPDTAG[count] == 0)
+ {
+ // Return 0: not found/end of table
+ return 0;
+ }
+ if (count == tag)
+ {
+ // Return found data
+ return (pPDTAG[count]);
+ }
+ }
+
+ // Return 0: not found
+ return 0;
+}
+
+#endif
+//*****************************************************************************
+//
+//! Close the doxygen group for tlv_api
+//! @}
+//
+//*****************************************************************************
diff --git a/Apps/FlightSoftware/MotorControl/driverlib/tlv.h b/Apps/FlightSoftware/MotorControl/driverlib/tlv.h
new file mode 100644
index 000000000..bcfc1e994
--- /dev/null
+++ b/Apps/FlightSoftware/MotorControl/driverlib/tlv.h
@@ -0,0 +1,436 @@
+/* --COPYRIGHT--,BSD
+ * Copyright (c) 2017, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * --/COPYRIGHT--*/
+//*****************************************************************************
+//
+// tlv.h - Driver for the TLV Module.
+//
+//*****************************************************************************
+
+#ifndef __MSP430WARE_TLV_H__
+#define __MSP430WARE_TLV_H__
+
+#include "inc/hw_memmap.h"
+
+#ifdef __MSP430_HAS_TLV__
+
+//*****************************************************************************
+//
+// If building with a C++ compiler, make all of the definitions in this header
+// have a C binding.
+//
+//*****************************************************************************
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+#include "inc/hw_memmap.h"
+//******************************************************************************
+//
+// TLV Data Types
+//
+//******************************************************************************
+struct s_TLV_Die_Record {
+ uint32_t wafer_id;
+ uint16_t die_x_position;
+ uint16_t die_y_position;
+ uint16_t test_results;
+};
+
+struct s_TLV_ADC_Cal_Data {
+ uint16_t adc_gain_factor;
+ int16_t adc_offset;
+ uint16_t adc_ref15_30_temp;
+ uint16_t adc_ref15_85_temp;
+ uint16_t adc_ref20_30_temp;
+ uint16_t adc_ref20_85_temp;
+ uint16_t adc_ref25_30_temp;
+ uint16_t adc_ref25_85_temp;
+};
+
+struct s_TLV_Timer_D_Cal_Data {
+ uint16_t TDH0CTL1_64;
+ uint16_t TDH0CTL1_128;
+ uint16_t TDH0CTL1_200;
+ uint16_t TDH0CTL1_256;
+};
+
+struct s_TLV_REF_Cal_Data {
+ uint16_t ref_ref15;
+ uint16_t ref_ref20;
+ uint16_t ref_ref25;
+};
+
+struct s_Peripheral_Memory_Data {
+ uint16_t memory_1;
+ uint16_t memory_2;
+ uint16_t memory_3;
+ uint16_t memory_4;
+};
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the tag parameter for
+// functions: TLV_getInfo().
+//
+//*****************************************************************************
+#define TLV_TAG_LDTAG TLV_LDTAG
+#define TLV_TAG_PDTAG TLV_PDTAG
+#define TLV_TAG_Reserved3 TLV_Reserved3
+#define TLV_TAG_Reserved4 TLV_Reserved4
+#define TLV_TAG_BLANK TLV_BLANK
+#define TLV_TAG_Reserved6 TLV_Reserved6
+#define TLV_TAG_Reserved7 TLV_Reserved7
+#define TLV_TAG_TAGEND TLV_TAGEND
+#define TLV_TAG_TAGEXT TLV_TAGEXT
+#define TLV_TAG_TIMER_D_CAL TLV_TIMERDCAL
+#define TLV_DEVICE_ID_0 0x1A04
+#define TLV_DEVICE_ID_1 0x1A05
+#define TLV_TAG_DIERECORD TLV_DIERECORD
+#define TLV_TAG_ADCCAL TLV_ADCCAL
+#define TLV_TAG_ADC12CAL TLV_ADC12CAL
+#define TLV_TAG_ADC10CAL TLV_ADC10CAL
+#define TLV_TAG_REFCAL TLV_REFCAL
+#define TLV_TAG_CTSD16CAL 0x1D
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the tag parameter for
+// functions: TLV_getPeripheral().
+//
+//*****************************************************************************
+#define TLV_PID_NO_MODULE (0x00)
+#define TLV_PID_PORTMAPPING (0x10)
+#define TLV_PID_MSP430CPUXV2 (0x23)
+#define TLV_PID_JTAG (0x09)
+#define TLV_PID_SBW (0x0F)
+#define TLV_PID_EEM_XS (0x02)
+#define TLV_PID_EEM_S (0x03)
+#define TLV_PID_EEM_M (0x04)
+#define TLV_PID_EEM_L (0x05)
+#define TLV_PID_PMM (0x30)
+#define TLV_PID_PMM_FR (0x32)
+#define TLV_PID_FCTL (0x39)
+#define TLV_PID_CRC16 (0x3C)
+#define TLV_PID_CRC16_RB (0x3D)
+#define TLV_PID_WDT_A (0x40)
+#define TLV_PID_SFR (0x41)
+#define TLV_PID_SYS (0x42)
+#define TLV_PID_RAMCTL (0x44)
+#define TLV_PID_DMA_1 (0x46)
+#define TLV_PID_DMA_3 (0x47)
+#define TLV_PID_UCS (0x48)
+#define TLV_PID_DMA_6 (0x4A)
+#define TLV_PID_DMA_2 (0x4B)
+#define TLV_PID_PORT1_2 (0x51)
+#define TLV_PID_PORT3_4 (0x52)
+#define TLV_PID_PORT5_6 (0x53)
+#define TLV_PID_PORT7_8 (0x54)
+#define TLV_PID_PORT9_10 (0x55)
+#define TLV_PID_PORT11_12 (0x56)
+#define TLV_PID_PORTU (0x5E)
+#define TLV_PID_PORTJ (0x5F)
+#define TLV_PID_TA2 (0x60)
+#define TLV_PID_TA3 (0x61)
+#define TLV_PID_TA5 (0x62)
+#define TLV_PID_TA7 (0x63)
+#define TLV_PID_TB3 (0x65)
+#define TLV_PID_TB5 (0x66)
+#define TLV_PID_TB7 (0x67)
+#define TLV_PID_RTC (0x68)
+#define TLV_PID_BT_RTC (0x69)
+#define TLV_PID_BBS (0x6A)
+#define TLV_PID_RTC_B (0x6B)
+#define TLV_PID_TD2 (0x6C)
+#define TLV_PID_TD3 (0x6D)
+#define TLV_PID_TD5 (0x6E)
+#define TLV_PID_TD7 (0x6F)
+#define TLV_PID_TEC (0x70)
+#define TLV_PID_RTC_C (0x71)
+#define TLV_PID_AES (0x80)
+#define TLV_PID_MPY16 (0x84)
+#define TLV_PID_MPY32 (0x85)
+#define TLV_PID_MPU (0x86)
+#define TLV_PID_USCI_AB (0x90)
+#define TLV_PID_USCI_A (0x91)
+#define TLV_PID_USCI_B (0x92)
+#define TLV_PID_EUSCI_A (0x94)
+#define TLV_PID_EUSCI_B (0x95)
+#define TLV_PID_REF (0xA0)
+#define TLV_PID_COMP_B (0xA8)
+#define TLV_PID_COMP_D (0xA9)
+#define TLV_PID_USB (0x98)
+#define TLV_PID_LCD_B (0xB1)
+#define TLV_PID_LCD_C (0xB2)
+#define TLV_PID_DAC12_A (0xC0)
+#define TLV_PID_SD16_B_1 (0xC8)
+#define TLV_PID_SD16_B_2 (0xC9)
+#define TLV_PID_SD16_B_3 (0xCA)
+#define TLV_PID_SD16_B_4 (0xCB)
+#define TLV_PID_SD16_B_5 (0xCC)
+#define TLV_PID_SD16_B_6 (0xCD)
+#define TLV_PID_SD16_B_7 (0xCE)
+#define TLV_PID_SD16_B_8 (0xCF)
+#define TLV_PID_ADC12_A (0xD1)
+#define TLV_PID_ADC10_A (0xD3)
+#define TLV_PID_ADC10_B (0xD4)
+#define TLV_PID_SD16_A (0xD8)
+#define TLV_PID_TI_BSL (0xFC)
+
+//*****************************************************************************
+//
+// Prototypes for the APIs.
+//
+//*****************************************************************************
+
+//*****************************************************************************
+//
+//! \brief Gets TLV Info
+//!
+//! The TLV structure uses a tag or base address to identify segments of the
+//! table where information is stored. Some examples of TLV tags are Peripheral
+//! Descriptor, Interrupts, Info Block and Die Record. This function retrieves
+//! the value of a tag and the length of the tag.
+//!
+//! \param tag represents the tag for which the information needs to be
+//! retrieved.
+//! Valid values are:
+//! - \b TLV_TAG_LDTAG
+//! - \b TLV_TAG_PDTAG
+//! - \b TLV_TAG_Reserved3
+//! - \b TLV_TAG_Reserved4
+//! - \b TLV_TAG_BLANK
+//! - \b TLV_TAG_Reserved6
+//! - \b TLV_TAG_Reserved7
+//! - \b TLV_TAG_TAGEND
+//! - \b TLV_TAG_TAGEXT
+//! - \b TLV_TAG_TIMER_D_CAL
+//! - \b TLV_DEVICE_ID_0
+//! - \b TLV_DEVICE_ID_1
+//! - \b TLV_TAG_DIERECORD
+//! - \b TLV_TAG_ADCCAL
+//! - \b TLV_TAG_ADC12CAL
+//! - \b TLV_TAG_ADC10CAL
+//! - \b TLV_TAG_REFCAL
+//! - \b TLV_TAG_CTSD16CAL
+//! \param instance In some cases a specific tag may have more than one
+//! instance. For example there may be multiple instances of timer
+//! calibration data present under a single Timer Cal tag. This variable
+//! specifies the instance for which information is to be retrieved (0,
+//! 1, etc.). When only one instance exists; 0 is passed.
+//! \param length Acts as a return through indirect reference. The function
+//! retrieves the value of the TLV tag length. This value is pointed to
+//! by *length and can be used by the application level once the
+//! function is called. If the specified tag is not found then the
+//! pointer is null 0.
+//! \param data_address acts as a return through indirect reference. Once the
+//! function is called data_address points to the pointer that holds the
+//! value retrieved from the specified TLV tag. If the specified tag is
+//! not found then the pointer is null 0.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void TLV_getInfo(uint8_t tag,
+ uint8_t instance,
+ uint8_t *length,
+ uint16_t **data_address);
+
+//*****************************************************************************
+//
+//! \brief Retrieves the unique device ID from the TLV structure.
+//!
+//!
+//! \return The device ID is returned as type uint16_t.
+//
+//*****************************************************************************
+extern uint16_t TLV_getDeviceType(void);
+
+//*****************************************************************************
+//
+//! \brief Gets memory information
+//!
+//! The Peripheral Descriptor tag is split into two portions a list of the
+//! available flash memory blocks followed by a list of available peripherals.
+//! This function is used to parse through the first portion and calculate the
+//! total flash memory available in a device. The typical usage is to call the
+//! TLV_getMemory which returns a non-zero value until the entire memory list
+//! has been parsed. When a zero is returned, it indicates that all the memory
+//! blocks have been counted and the next address holds the beginning of the
+//! device peripheral list.
+//!
+//! \param instance In some cases a specific tag may have more than one
+//! instance. This variable specifies the instance for which information
+//! is to be retrieved (0, 1 etc). When only one instance exists; 0 is
+//! passed.
+//!
+//! \return The returned value is zero if the end of the memory list is
+//! reached.
+//
+//*****************************************************************************
+extern uint16_t TLV_getMemory(uint8_t instance);
+
+//*****************************************************************************
+//
+//! \brief Gets peripheral information from the TLV
+//!
+//! he Peripheral Descriptor tag is split into two portions a list of the
+//! available flash memory blocks followed by a list of available peripherals.
+//! This function is used to parse through the second portion and can be used
+//! to check if a specific peripheral is present in a device. The function
+//! calls TLV_getPeripheral() recursively until the end of the memory list and
+//! consequently the beginning of the peripheral list is reached. <
+//!
+//! \param tag represents represents the tag for a specific peripheral for
+//! which the information needs to be retrieved. In the header file tlv.
+//! h specific peripheral tags are pre-defined, for example USCIA_B and
+//! TA0 are defined as TLV_PID_USCI_AB and TLV_PID_TA2 respectively.
+//! Valid values are:
+//! - \b TLV_PID_NO_MODULE - No Module
+//! - \b TLV_PID_PORTMAPPING - Port Mapping
+//! - \b TLV_PID_MSP430CPUXV2 - MSP430CPUXV2
+//! - \b TLV_PID_JTAG - JTAG
+//! - \b TLV_PID_SBW - SBW
+//! - \b TLV_PID_EEM_XS - EEM X-Small
+//! - \b TLV_PID_EEM_S - EEM Small
+//! - \b TLV_PID_EEM_M - EEM Medium
+//! - \b TLV_PID_EEM_L - EEM Large
+//! - \b TLV_PID_PMM - PMM
+//! - \b TLV_PID_PMM_FR - PMM FRAM
+//! - \b TLV_PID_FCTL - Flash
+//! - \b TLV_PID_CRC16 - CRC16
+//! - \b TLV_PID_CRC16_RB - CRC16 Reverse
+//! - \b TLV_PID_WDT_A - WDT_A
+//! - \b TLV_PID_SFR - SFR
+//! - \b TLV_PID_SYS - SYS
+//! - \b TLV_PID_RAMCTL - RAMCTL
+//! - \b TLV_PID_DMA_1 - DMA 1
+//! - \b TLV_PID_DMA_3 - DMA 3
+//! - \b TLV_PID_UCS - UCS
+//! - \b TLV_PID_DMA_6 - DMA 6
+//! - \b TLV_PID_DMA_2 - DMA 2
+//! - \b TLV_PID_PORT1_2 - Port 1 + 2 / A
+//! - \b TLV_PID_PORT3_4 - Port 3 + 4 / B
+//! - \b TLV_PID_PORT5_6 - Port 5 + 6 / C
+//! - \b TLV_PID_PORT7_8 - Port 7 + 8 / D
+//! - \b TLV_PID_PORT9_10 - Port 9 + 10 / E
+//! - \b TLV_PID_PORT11_12 - Port 11 + 12 / F
+//! - \b TLV_PID_PORTU - Port U
+//! - \b TLV_PID_PORTJ - Port J
+//! - \b TLV_PID_TA2 - Timer A2
+//! - \b TLV_PID_TA3 - Timer A1
+//! - \b TLV_PID_TA5 - Timer A5
+//! - \b TLV_PID_TA7 - Timer A7
+//! - \b TLV_PID_TB3 - Timer B3
+//! - \b TLV_PID_TB5 - Timer B5
+//! - \b TLV_PID_TB7 - Timer B7
+//! - \b TLV_PID_RTC - RTC
+//! - \b TLV_PID_BT_RTC - BT + RTC
+//! - \b TLV_PID_BBS - Battery Backup Switch
+//! - \b TLV_PID_RTC_B - RTC_B
+//! - \b TLV_PID_TD2 - Timer D2
+//! - \b TLV_PID_TD3 - Timer D1
+//! - \b TLV_PID_TD5 - Timer D5
+//! - \b TLV_PID_TD7 - Timer D7
+//! - \b TLV_PID_TEC - Timer Event Control
+//! - \b TLV_PID_RTC_C - RTC_C
+//! - \b TLV_PID_AES - AES
+//! - \b TLV_PID_MPY16 - MPY16
+//! - \b TLV_PID_MPY32 - MPY32
+//! - \b TLV_PID_MPU - MPU
+//! - \b TLV_PID_USCI_AB - USCI_AB
+//! - \b TLV_PID_USCI_A - USCI_A
+//! - \b TLV_PID_USCI_B - USCI_B
+//! - \b TLV_PID_EUSCI_A - eUSCI_A
+//! - \b TLV_PID_EUSCI_B - eUSCI_B
+//! - \b TLV_PID_REF - Shared Reference
+//! - \b TLV_PID_COMP_B - COMP_B
+//! - \b TLV_PID_COMP_D - COMP_D
+//! - \b TLV_PID_USB - USB
+//! - \b TLV_PID_LCD_B - LCD_B
+//! - \b TLV_PID_LCD_C - LCD_C
+//! - \b TLV_PID_DAC12_A - DAC12_A
+//! - \b TLV_PID_SD16_B_1 - SD16_B 1 Channel
+//! - \b TLV_PID_SD16_B_2 - SD16_B 2 Channel
+//! - \b TLV_PID_SD16_B_3 - SD16_B 3 Channel
+//! - \b TLV_PID_SD16_B_4 - SD16_B 4 Channel
+//! - \b TLV_PID_SD16_B_5 - SD16_B 5 Channel
+//! - \b TLV_PID_SD16_B_6 - SD16_B 6 Channel
+//! - \b TLV_PID_SD16_B_7 - SD16_B 7 Channel
+//! - \b TLV_PID_SD16_B_8 - SD16_B 8 Channel
+//! - \b TLV_PID_ADC12_A - ADC12_A
+//! - \b TLV_PID_ADC10_A - ADC10_A
+//! - \b TLV_PID_ADC10_B - ADC10_B
+//! - \b TLV_PID_SD16_A - SD16_A
+//! - \b TLV_PID_TI_BSL - BSL
+//! \param instance In some cases a specific tag may have more than one
+//! instance. For example a device may have more than a single USCI
+//! module, each of which is defined by an instance number 0, 1, 2, etc.
+//! When only one instance exists; 0 is passed.
+//!
+//! \return The returned value is zero if the specified tag value (peripheral)
+//! is not available in the device.
+//
+//*****************************************************************************
+extern uint16_t TLV_getPeripheral(uint8_t tag,
+ uint8_t instance);
+
+//*****************************************************************************
+//
+//! \brief Get interrupt information from the TLV
+//!
+//! This function is used to retrieve information on available interrupt
+//! vectors. It allows the user to check if a specific interrupt vector is
+//! defined in a given device.
+//!
+//! \param tag represents the tag for the interrupt vector. Interrupt vector
+//! tags number from 0 to N depending on the number of available
+//! interrupts. Refer to the device datasheet for a list of available
+//! interrupts.
+//!
+//! \return The returned value is zero is the specified interrupt vector is not
+//! defined.
+//
+//*****************************************************************************
+extern uint8_t TLV_getInterrupt(uint8_t tag);
+
+//*****************************************************************************
+//
+// Mark the end of the C bindings section for C++ compilers.
+//
+//*****************************************************************************
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+#endif // __MSP430WARE_TLV_H__
diff --git a/Apps/FlightSoftware/MotorControl/driverlib/uups.c b/Apps/FlightSoftware/MotorControl/driverlib/uups.c
new file mode 100644
index 000000000..85e007768
--- /dev/null
+++ b/Apps/FlightSoftware/MotorControl/driverlib/uups.c
@@ -0,0 +1,130 @@
+/* --COPYRIGHT--,BSD
+ * Copyright (c) 2017, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * --/COPYRIGHT--*/
+//*****************************************************************************
+//
+// uups.c - Driver for the UUPS Module.
+//
+//*****************************************************************************
+
+//*****************************************************************************
+//
+//! \addtogroup uups_api uups
+//! @{
+//
+//*****************************************************************************
+
+#include "inc/hw_memmap.h"
+
+#ifdef __MSP430_HAS_UUPS__
+#include "uups.h"
+
+#include
+
+void UUPS_clearInterrupt(uint16_t baseAddress, uint8_t mask)
+{
+ HWREG16(baseAddress + OFS_UUPSICR) |= mask;
+}
+
+void UUPS_enableInterrupt(uint16_t baseAddress, uint8_t mask)
+{
+ HWREG16(baseAddress + OFS_UUPSIMSC) |= mask;
+}
+
+void UUPS_disableInterrupt(uint16_t baseAddress, uint8_t mask)
+{
+ HWREG16(baseAddress + OFS_UUPSIMSC) &= ~mask;
+}
+
+uint8_t UUPS_getInterruptStatus(uint16_t baseAddress, uint16_t mask)
+{
+ return HWREG16(baseAddress + OFS_UUPSRIS) & mask;
+}
+
+void UUPS_stopMeasurement(uint16_t baseAddress)
+{
+ HWREG16(baseAddress + OFS_UUPSCTL) |= USSSTOP;
+}
+
+void UUPS_turnOffPower(uint16_t baseAddress)
+{
+ HWREG16(baseAddress + OFS_UUPSCTL) |= USSPWRDN;
+}
+
+void UUPS_turnOnPower(uint16_t baseAddress, uint16_t triggerSource)
+{
+ HWREG16(baseAddress + OFS_UUPSCTL) |= (triggerSource | USSPWRUP);
+}
+
+void UUPS_enableASQ(uint16_t baseAddress)
+{
+ HWREG16(baseAddress + OFS_UUPSCTL) |= ASQEN;
+}
+
+uint8_t UUPS_getPowerModeStatus(uint16_t baseAddress)
+{
+ return HWREG16(baseAddress + OFS_UUPSCTL) & UPSTATE;
+}
+
+uint8_t UUPS_isBusy(uint16_t baseAddress)
+{
+ return HWREG16(baseAddress + OFS_UUPSCTL) & USS_BUSY;
+}
+
+uint8_t UUPS_isLDOReady(uint16_t baseAddress)
+{
+ return HWREG16(baseAddress + OFS_UUPSCTL) & LDORDY;
+}
+
+void UUPS_setLowPowerBiasHoldOffDelay(uint16_t baseAddress, uint16_t holdOffDelay)
+{
+ HWREG16(baseAddress + OFS_UUPSCTL) &= ~LBHDEL;
+ HWREG16(baseAddress + OFS_UUPSCTL) |= holdOffDelay;
+}
+
+void UUPS_holdUSSInResetState(uint16_t baseAddress)
+{
+ HWREG16(baseAddress + OFS_UUPSCTL) |= USSSWRST;
+}
+
+void UUPS_releaseUSSFromResetState(uint16_t baseAddress)
+{
+ HWREG16(baseAddress + OFS_UUPSCTL) &= ~USSSWRST;
+}
+
+#endif
+//*****************************************************************************
+//
+//! Close the doxygen group for uups_api
+//! @}
+//
+//*****************************************************************************
+
diff --git a/Apps/FlightSoftware/MotorControl/driverlib/uups.h b/Apps/FlightSoftware/MotorControl/driverlib/uups.h
new file mode 100644
index 000000000..a71cb2161
--- /dev/null
+++ b/Apps/FlightSoftware/MotorControl/driverlib/uups.h
@@ -0,0 +1,381 @@
+/* --COPYRIGHT--,BSD
+ * Copyright (c) 2017, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * --/COPYRIGHT--*/
+//*****************************************************************************
+//
+// uups.h - Driver for the UUPS Module.
+//
+//*****************************************************************************
+
+#ifndef __MSP430WARE_UUPS_H__
+#define __MSP430WARE_UUPS_H__
+
+#include "inc/hw_memmap.h"
+
+#ifdef __MSP430_HAS_UUPS__
+
+//*****************************************************************************
+//
+// If building with a C++ compiler, make all of the definitions in this header
+// have a C binding.
+//
+//*****************************************************************************
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the mask parameter for
+// functions: UUPS_clearInterrupt(), UUPS_enableInterrupt() and
+// UUPS_disableInterrupt() well as returned by the UUPS_getInterruptStatus()
+// function.
+//
+//*****************************************************************************
+#define UUPS_POWER_REQUEST_IGNORE_INTERRUPT PREQIG
+#define UUPS_POWER_UP_TIMEOUT_INTERRUPT PTMOUT
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the powerMode parameter for
+// functions: UUPS_gotoPowerMode() as well as returned by the
+// UUPS_getPowerModeStatus() function.
+//
+//*****************************************************************************
+#define UUPS_POWERMODE_OFF UPSTATE_0
+#define UUPS_POWERMODE_STANDBY UPSTATE_1
+#define UUPS_POWERMODE_TRANSITION UPSTATE_2
+#define UUPS_POWERMODE_READY UPSTATE_3
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the triggerSource parameter for
+// functions: UUPS_turnOnPower().
+//
+//*****************************************************************************
+#define UUPS_POWERUP_TRIGGER_SOURCE_USSPWRUP USSPWRUPSEL_0
+#define UUPS_POWERUP_TRIGGER_SOURCE_RTC USSPWRUPSEL_1
+#define UUPS_POWERUP_TRIGGER_SOURCE_TIMER USSPWRUPSEL_2
+#define UUPS_POWERUP_TRIGGER_SOURCE_EXTERNAL USSPWRUPSEL_3
+
+//*****************************************************************************
+//
+// The following are values that can be returned by the UUPS_isBusy() function.
+//
+//*****************************************************************************
+#define UUPS_BUSY USS_BUSY
+#define UUPS_NOT_BUSY 0x0
+
+//*****************************************************************************
+//
+// The following are values that can be returned by the UUPS_isLDOReady() function.
+//
+//*****************************************************************************
+#define UUPS_LDO_READY LDORDY
+#define UUPS_LDO_NOT_READY 0x0
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the holdOffDelay parameter for functions: UUPS_setLowPowerBiasHoldOffDelay().
+//
+//*****************************************************************************
+#define UUPS_HOLD_OFF_DELAY_ADDITIONAL_NONE LBHDEL_0
+#define UUPS_HOLD_OFF_DELAY_ADDITIONAL_512_REFCLKS LBHDEL_1
+#define UUPS_HOLD_OFF_DELAY_ADDITIONAL_1024_REFCLKS LBHDEL_2
+#define UUPS_HOLD_OFF_DELAY_ADDITIONAL_1536_REFCLKS LBHDEL_3
+#define UUPS_HOLD_OFF_DELAY_ADDITIONAL_100_US LBHDEL_1
+#define UUPS_HOLD_OFF_DELAY_ADDITIONAL_200_US LBHDEL_2
+#define UUPS_HOLD_OFF_DELAY_ADDITIONAL_300_US LBHDEL_3
+
+//*****************************************************************************
+//
+// Prototypes for the APIs.
+//
+//*****************************************************************************
+
+//*****************************************************************************
+//
+//! \brief Clears UUPS interrupts.
+//!
+//! The UUPS interrupt source is cleared, so that it no longer asserts. If the
+//! interrupt is not enabled, the corresponding bit in the RIS register bit will
+//! be cleared. If the interrupt is enabled, the corresponding bit both MIS and
+//! RIS registers will be both cleared.
+//!
+//! \param baseAddress is the base address of the UUPS module.
+//! \param mask is the logical OR of any of the following:
+//! - \b UUPS_POWER_REQUEST_IGNORE_INTERRUPT - UUPS power request ignored interrupt
+//! - \b UUPS_POWER_UP_TIMEOUT_INTERRUPT - UUPS power up time out interrupt
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void UUPS_clearInterrupt(uint16_t baseAddress, uint8_t mask);
+
+//*****************************************************************************
+//
+//! \brief Enables UUPS interrupts.
+//!
+//! Enables the indicated UUPS interrupt sources. Only the sources that are
+//! enabled can be reflected to the processor interrupt; disabled sources have
+//! no effect on the processor. Does not clear interrupt flags.
+//!
+//! \param baseAddress is the base address of the UUPS module.
+//! \param mask is the logical OR of any of the following:
+//! - \b UUPS_POWER_REQUEST_IGNORE_INTERRUPT - UUPS power request ignored interrupt
+//! - \b UUPS_POWER_UP_TIMEOUT_INTERRUPT - UUPS power up time out interrupt
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void UUPS_enableInterrupt(uint16_t baseAddress, uint8_t mask);
+
+//*****************************************************************************
+//
+//! \brief Disables selected UUPS interrupt sources.
+//!
+//! Disables the indicated UUPS interrupt sources. Only the sources that are
+//! enabled can be reflected to the processor interrupt; disabled sources have
+//! no effect on the processor.
+//!
+//! \param baseAddress is the base address of the UUPS module.
+//! \param mask is the logical OR of any of the following:
+//! - \b UUPS_POWER_REQUEST_IGNORE_INTERRUPT - UUPS power request ignored interrupt
+//! - \b UUPS_POWER_UP_TIMEOUT_INTERRUPT - UUPS power up time out interrupt
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void UUPS_disableInterrupt(uint16_t baseAddress, uint8_t mask);
+
+//*****************************************************************************
+//
+//! \brief Gets the current UUPS interrupt status.
+//!
+//! This returns the interrupt status for the UUPS module based on which flag
+//! is passed.
+//!
+//! \param baseAddress is the base address of the UUPS module.
+//! \param mask is the logical OR of any of the following:
+//! - \b UUPS_POWER_REQUEST_IGNORE_INTERRUPT - UUPS power request ignored interrupt
+//! - \b UUPS_POWER_UP_TIMEOUT_INTERRUPT - UUPS power up time out interrupt
+//!
+//! \return Logical OR of any of the following:
+//! - \b UUPS_POWER_REQUEST_IGNORE_INTERRUPT - UUPS power request ignored interrupt
+//! - \b UUPS_POWER_UP_TIMEOUT_INTERRUPT - UUPS power up time out interrupt
+//
+//*****************************************************************************
+extern uint8_t UUPS_getInterruptStatus(uint16_t baseAddress, uint16_t mask);
+
+//*****************************************************************************
+//
+//! \brief Stops USS measurement.
+//!
+//! This stops the USS current measurement.
+//!
+//! \param baseAddress is the base address of the UUPS module.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void UUPS_stopMeasurement(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Turns down USS power.
+//!
+//! This stops the current measurement and turn off USS module.
+//!
+//! \param baseAddress is the base address of the UUPS module.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void UUPS_turnOffPower(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Turns on USS power and PLL.
+//!
+//! This turns on USS power and PLL with specified power-up trigger source. When
+//! an external trigger source is selected, this function has no effect.
+//!
+//! \param baseAddress is the base address of the UUPS module.
+//! \param triggerSource is the specified power-up trigger source.
+//! Valid values are:
+//! - \b UUPS_POWERUP_TRIGGER_SOURCE_USSPWRUP
+//! - \b UUPS_POWERUP_TRIGGER_SOURCE_RTC
+//! - \b UUPS_POWERUP_TRIGGER_SOURCE_TIMER
+//! - \b UUPS_POWERUP_TRIGGER_SOURCE_EXTERNAL
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void UUPS_turnOnPower(uint16_t baseAddress, uint16_t triggerSource);
+
+//*****************************************************************************
+//
+//! \brief Enables USS acquistion sequencer (ASQ).
+//!
+//! This enable the USS acquistion sequencer (ASQ). ASQ must be enabled before
+//! applying a USS_PWRREQ signal.
+//!
+//! \param baseAddress is the base address of the UUPS module.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void UUPS_enableASQ(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Goes to the specified power mode.
+//!
+//! This function makes USS go to the specified power mode.
+//!
+//! \param baseAddress is the base address of the UUPS module.
+//! \param powerMode is the desired power mode to go to.
+//!
+//! \return None
+//
+//*****************************************************************************
+//extern void UUPS_gotoPowerMode(uint8_t powerMode);
+
+//*****************************************************************************
+//
+//! \brief Gets current USS power mode status.
+//!
+//! This gets current USS power mode status.
+//!
+//! \param baseAddress is the base address of the UUPS module.
+//!
+//! \return Any of the following:
+//! - \b UUPS_POWERMODE_OFF
+//! - \b UUPS_POWERMODE_READY
+//! - \b UUPS_POWERMODE_STANDBY
+//! - \b UUPS_POWERMODE_TIMEOUT
+//
+//*****************************************************************************
+extern uint8_t UUPS_getPowerModeStatus(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Returns current USS busy status.
+//!
+//! This returns current USS busy status depending on whether USS is performing
+//! a measurement.
+//!
+//! \param baseAddress is the base address of the UUPS module.
+//!
+//! \return UUPS_BUSY or UUPS_NOT_BUSY
+//
+//*****************************************************************************
+extern uint8_t UUPS_isBusy(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Returns whether USS LDO is ready.
+//!
+//! This returns USS LDO ready status.
+//!
+//! \param baseAddress is the base address of the UUPS module.
+//!
+//! \return UUPS_LDO_READY or UUPS_LDO_NOT_READY
+//
+//*****************************************************************************
+extern uint8_t UUPS_isLDOReady(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Sets the low power bias hold off delay.
+//!
+//! Defines the duration of the hold off delay for low power bias mode. Low power bias mode can be enabled from SAPH module.
+//! The hold off delay is inserted from "OFF state" to "READY state" and from "STANDBY state" to "READY state".
+//! Affects extra delay in Register Mode and Auto Mode.
+//! Reset type: PUC
+//!
+//! \param baseAddress is the base address of the UUPS module.
+//! \param holdOffDelay is the desired amount of additional hold off delay. 512 REFCLKS = ~100us, 1024 REFCLKS = ~200us, 1536 REFCLKS = ~300us. They map to the same values.
+//! Valid values are:
+//! - \b UUPS_HOLD_OFF_DELAY_ADDITIONAL_NONE
+//! - \b UUPS_HOLD_OFF_DELAY_ADDITIONAL_512_REFCLKS
+//! - \b UUPS_HOLD_OFF_DELAY_ADDITIONAL_1024_REFCLKS
+//! - \b UUPS_HOLD_OFF_DELAY_ADDITIONAL_1536_REFCLKS
+//! - \b UUPS_HOLD_OFF_DELAY_ADDITIONAL_100_US
+//! - \b UUPS_HOLD_OFF_DELAY_ADDITIONAL_200_US
+//! - \b UUPS_HOLD_OFF_DELAY_ADDITIONAL_300_US
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void UUPS_setLowPowerBiasHoldOffDelay(uint16_t baseAddress, uint16_t holdOffDelay);
+
+//*****************************************************************************
+//
+//! \brief Hold USS (and sub modules) logic in reset state.
+//!
+//! Useful if HSPLL gets stuck. Cycle USS into reset state with this function, and then release from reset state with UUPS_releaseUSSFromResetState.
+//! USS is default released from reset, and ready for operation (still required to be powered up).
+//!
+//! \param baseAddress is the base address of the UUPS module.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void UUPS_holdUSSInResetState(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Release USS (and sub modules) from reset state for operation.
+//!
+//! Useful if HSPLL gets stuck. Cycle USS into reset state with this UUPS_holdUSSInResetState, and then release from reset state with this function.
+//! USS is default released from reset, and ready for operation (still required to be powered up).
+//!
+//! \param baseAddress is the base address of the UUPS module.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void UUPS_releaseUSSFromResetState(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+// Mark the end of the C bindings section for C++ compilers.
+//
+//*****************************************************************************
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+#endif // __MSP430WARE_UUPS_H__
+
diff --git a/Apps/FlightSoftware/MotorControl/driverlib/wdt_a.c b/Apps/FlightSoftware/MotorControl/driverlib/wdt_a.c
new file mode 100644
index 000000000..c15ae7b1e
--- /dev/null
+++ b/Apps/FlightSoftware/MotorControl/driverlib/wdt_a.c
@@ -0,0 +1,102 @@
+/* --COPYRIGHT--,BSD
+ * Copyright (c) 2017, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * --/COPYRIGHT--*/
+//*****************************************************************************
+//
+// wdt_a.c - Driver for the wdt_a Module.
+//
+//*****************************************************************************
+
+//*****************************************************************************
+//
+//! \addtogroup wdt_a_api wdt_a
+//! @{
+//
+//*****************************************************************************
+
+#include "inc/hw_memmap.h"
+
+#ifdef __MSP430_HAS_WDT_A__
+#include "wdt_a.h"
+
+#include
+
+void WDT_A_hold (uint16_t baseAddress)
+{
+ // Set Hold bit
+ uint8_t newWDTStatus =
+ ((HWREG16(baseAddress + OFS_WDTCTL) & 0x00FF) | WDTHOLD);
+
+ HWREG16(baseAddress + OFS_WDTCTL) = WDTPW + newWDTStatus;
+}
+
+void WDT_A_start (uint16_t baseAddress)
+{
+ // Reset Hold bit
+ uint8_t newWDTStatus =
+ ((HWREG16(baseAddress + OFS_WDTCTL) & 0x00FF) & ~(WDTHOLD));
+
+ HWREG16(baseAddress + OFS_WDTCTL) = WDTPW + newWDTStatus;
+}
+
+void WDT_A_resetTimer (uint16_t baseAddress)
+{
+ // Set Counter Clear bit
+ uint8_t newWDTStatus =
+ ((HWREG16(baseAddress + OFS_WDTCTL) & 0x00FF) | WDTCNTCL);
+
+ HWREG16(baseAddress + OFS_WDTCTL) = WDTPW + newWDTStatus;
+}
+
+void WDT_A_initWatchdogTimer (uint16_t baseAddress,
+ uint8_t clockSelect,
+ uint8_t clockDivider)
+{
+ HWREG16(baseAddress + OFS_WDTCTL) =
+ WDTPW + WDTCNTCL + WDTHOLD + clockSelect + clockDivider;
+}
+
+void WDT_A_initIntervalTimer (uint16_t baseAddress,
+ uint8_t clockSelect,
+ uint8_t clockDivider)
+{
+ HWREG16(baseAddress + OFS_WDTCTL) =
+ WDTPW + WDTCNTCL + WDTHOLD + WDTTMSEL + clockSelect + clockDivider;
+}
+
+
+#endif
+//*****************************************************************************
+//
+//! Close the doxygen group for wdt_a_api
+//! @}
+//
+//*****************************************************************************
diff --git a/Apps/FlightSoftware/MotorControl/driverlib/wdt_a.h b/Apps/FlightSoftware/MotorControl/driverlib/wdt_a.h
new file mode 100644
index 000000000..58089f4b4
--- /dev/null
+++ b/Apps/FlightSoftware/MotorControl/driverlib/wdt_a.h
@@ -0,0 +1,210 @@
+/* --COPYRIGHT--,BSD
+ * Copyright (c) 2017, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * --/COPYRIGHT--*/
+//*****************************************************************************
+//
+// wdt_a.h - Driver for the WDT_A Module.
+//
+//*****************************************************************************
+
+#ifndef __MSP430WARE_WDT_A_H__
+#define __MSP430WARE_WDT_A_H__
+
+#include "inc/hw_memmap.h"
+
+#ifdef __MSP430_HAS_WDT_A__
+
+//*****************************************************************************
+//
+// If building with a C++ compiler, make all of the definitions in this header
+// have a C binding.
+//
+//*****************************************************************************
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the clockSelect parameter for
+// functions: WDT_A_initWatchdogTimer(), and WDT_A_initIntervalTimer().
+//
+//*****************************************************************************
+#define WDT_A_CLOCKSOURCE_SMCLK (WDTSSEL_0)
+#define WDT_A_CLOCKSOURCE_ACLK (WDTSSEL_1)
+#define WDT_A_CLOCKSOURCE_VLOCLK (WDTSSEL_2)
+#define WDT_A_CLOCKSOURCE_XCLK (WDTSSEL_3)
+
+//*****************************************************************************
+//
+// The following are values that can be passed to the clockDivider parameter
+// for functions: WDT_A_initWatchdogTimer(), and WDT_A_initIntervalTimer().
+//
+//*****************************************************************************
+#define WDT_A_CLOCKDIVIDER_2G (WDTIS_0)
+#define WDT_A_CLOCKDIVIDER_128M (WDTIS_1)
+#define WDT_A_CLOCKDIVIDER_8192K (WDTIS_2)
+#define WDT_A_CLOCKDIVIDER_512K (WDTIS_3)
+#define WDT_A_CLOCKDIVIDER_32K (WDTIS_4)
+#define WDT_A_CLOCKDIVIDER_8192 (WDTIS_5)
+#define WDT_A_CLOCKDIVIDER_512 (WDTIS_6)
+#define WDT_A_CLOCKDIVIDER_64 (WDTIS_7)
+
+//*****************************************************************************
+//
+// Prototypes for the APIs.
+//
+//*****************************************************************************
+
+//*****************************************************************************
+//
+//! \brief Holds the Watchdog Timer.
+//!
+//! This function stops the watchdog timer from running, that way no interrupt
+//! or PUC is asserted.
+//!
+//! \param baseAddress is the base address of the WDT_A module.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void WDT_A_hold(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Starts the Watchdog Timer.
+//!
+//! This function starts the watchdog timer functionality to start counting
+//! again.
+//!
+//! \param baseAddress is the base address of the WDT_A module.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void WDT_A_start(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Resets the timer counter of the Watchdog Timer.
+//!
+//! This function resets the watchdog timer to 0x0000h.
+//!
+//! \param baseAddress is the base address of the WDT_A module.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void WDT_A_resetTimer(uint16_t baseAddress);
+
+//*****************************************************************************
+//
+//! \brief Sets the clock source for the Watchdog Timer in watchdog mode.
+//!
+//! This function sets the watchdog timer in watchdog mode, which will cause a
+//! PUC when the timer overflows. When in the mode, a PUC can be avoided with a
+//! call to WDT_A_resetTimer() before the timer runs out.
+//!
+//! \param baseAddress is the base address of the WDT_A module.
+//! \param clockSelect is the clock source that the watchdog timer will use.
+//! Valid values are:
+//! - \b WDT_A_CLOCKSOURCE_SMCLK [Default]
+//! - \b WDT_A_CLOCKSOURCE_ACLK
+//! - \b WDT_A_CLOCKSOURCE_VLOCLK
+//! - \b WDT_A_CLOCKSOURCE_XCLK
+//! \n Modified bits are \b WDTSSEL of \b WDTCTL register.
+//! \param clockDivider is the divider of the clock source, in turn setting the
+//! watchdog timer interval.
+//! Valid values are:
+//! - \b WDT_A_CLOCKDIVIDER_2G
+//! - \b WDT_A_CLOCKDIVIDER_128M
+//! - \b WDT_A_CLOCKDIVIDER_8192K
+//! - \b WDT_A_CLOCKDIVIDER_512K
+//! - \b WDT_A_CLOCKDIVIDER_32K [Default]
+//! - \b WDT_A_CLOCKDIVIDER_8192
+//! - \b WDT_A_CLOCKDIVIDER_512
+//! - \b WDT_A_CLOCKDIVIDER_64
+//! \n Modified bits are \b WDTIS and \b WDTHOLD of \b WDTCTL register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void WDT_A_initWatchdogTimer(uint16_t baseAddress,
+ uint8_t clockSelect,
+ uint8_t clockDivider);
+
+//*****************************************************************************
+//
+//! \brief Sets the clock source for the Watchdog Timer in timer interval mode.
+//!
+//! This function sets the watchdog timer as timer interval mode, which will
+//! assert an interrupt without causing a PUC.
+//!
+//! \param baseAddress is the base address of the WDT_A module.
+//! \param clockSelect is the clock source that the watchdog timer will use.
+//! Valid values are:
+//! - \b WDT_A_CLOCKSOURCE_SMCLK [Default]
+//! - \b WDT_A_CLOCKSOURCE_ACLK
+//! - \b WDT_A_CLOCKSOURCE_VLOCLK
+//! - \b WDT_A_CLOCKSOURCE_XCLK
+//! \n Modified bits are \b WDTSSEL of \b WDTCTL register.
+//! \param clockDivider is the divider of the clock source, in turn setting the
+//! watchdog timer interval.
+//! Valid values are:
+//! - \b WDT_A_CLOCKDIVIDER_2G
+//! - \b WDT_A_CLOCKDIVIDER_128M
+//! - \b WDT_A_CLOCKDIVIDER_8192K
+//! - \b WDT_A_CLOCKDIVIDER_512K
+//! - \b WDT_A_CLOCKDIVIDER_32K [Default]
+//! - \b WDT_A_CLOCKDIVIDER_8192
+//! - \b WDT_A_CLOCKDIVIDER_512
+//! - \b WDT_A_CLOCKDIVIDER_64
+//! \n Modified bits are \b WDTIS and \b WDTHOLD of \b WDTCTL register.
+//!
+//! \return None
+//
+//*****************************************************************************
+extern void WDT_A_initIntervalTimer(uint16_t baseAddress,
+ uint8_t clockSelect,
+ uint8_t clockDivider);
+
+//*****************************************************************************
+//
+// Mark the end of the C bindings section for C++ compilers.
+//
+//*****************************************************************************
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+#endif // __MSP430WARE_WDT_A_H__
diff --git a/Apps/FlightSoftware/MotorControl/i2c.c b/Apps/FlightSoftware/MotorControl/i2c.c
index cf9f856bb..e528c20b9 100644
--- a/Apps/FlightSoftware/MotorControl/i2c.c
+++ b/Apps/FlightSoftware/MotorControl/i2c.c
@@ -1,5 +1,6 @@
#include "i2c.h"
+// variables for i2c fucntionality
volatile uint8_t g_rxBuffer[I2C_RX_BUFFER_MAX_SIZE];
volatile uint8_t g_txBuffer[I2C_TX_BUFFER_MAX_SIZE];
volatile uint8_t g_rxBufferIdx;
@@ -9,8 +10,9 @@ volatile uint8_t g_txByteCtr;
volatile I2cMode g_slaveMode;
volatile uint8_t g_i2cSlaveAddress;
volatile uint8_t g_readRegAddr;
+volatile uint8_t g_i2cCmdLength[MAX_NB_CMDS];
-
+// external variables that are written and read to
extern volatile _iq g_currentSpeed;
extern volatile int32_t g_currentPosition;
extern volatile int32_t g_targetPosition;
@@ -20,8 +22,9 @@ extern volatile uint16_t g_maxSpeed;
extern uint8_t g_statusRegister;
extern uint8_t g_controlRegister;
extern uint8_t g_faultRegister;
-
-volatile uint8_t g_i2cCmdLength[MAX_NB_CMDS];
+extern uint32_t g_drivingTimeoutCtr;
+extern uint16_t g_accelRate, g_decelRate;
+extern CmdState g_cmdState;
/**
@@ -29,6 +32,7 @@ volatile uint8_t g_i2cCmdLength[MAX_NB_CMDS];
*/
inline void disableI2cRxInterrupt(void){
UCB0IE &= ~UCRXIE;
+// return;
}
@@ -45,6 +49,7 @@ inline void enableI2cRxInterrupt(void){
*/
inline void disableI2cTxInterrupt(void){
UCB0IE &= ~UCTXIE;
+// return;
}
@@ -63,8 +68,8 @@ inline void enableI2cTxInterrupt(void){
* @param dest The destination
* @param[in] size The size
*/
-inline void copyArray(uint8_t *source, uint8_t *dest, uint8_t size){
- uint8_t copyIndex = 0;
+void copyArray(uint8_t *source, uint8_t *dest, int size){
+ volatile int copyIndex = 0;
for (copyIndex = 0; copyIndex < size; copyIndex++){
dest[copyIndex] = source[copyIndex];
}
@@ -101,6 +106,15 @@ inline void i2cSlaveProcessCmd(const uint8_t cmd){
disableI2cRxInterrupt();
enableI2cTxInterrupt();
break;
+ case CURRENT_SPEED:
+ g_slaveMode = TX_DATA_MODE;
+ g_txByteCtr = g_i2cCmdLength[cmd];
+ int16_t speed_info = (int16_t)(g_currentSpeed >> 7); // 7 LSBs are 0s, 16 MSBs are too
+ //Fill out the TransmitBuffer
+ copyArray((uint8_t*)&speed_info, (uint8_t*)g_txBuffer, g_txByteCtr);
+ disableI2cRxInterrupt();
+ enableI2cTxInterrupt();
+ break;
case MOTOR_CURRENT:
g_slaveMode = TX_DATA_MODE;
g_txByteCtr = g_i2cCmdLength[cmd];
@@ -120,6 +134,13 @@ inline void i2cSlaveProcessCmd(const uint8_t cmd){
case FAULT_REGISTER:
g_slaveMode = TX_DATA_MODE;
g_txByteCtr = g_i2cCmdLength[cmd];
+
+ //update g_faultRegister with if there is fault in motor driver
+ if(read_driver_fault())
+ g_faultRegister |= DRIVER_FAULT;
+ else
+ g_faultRegister &= ~DRIVER_FAULT;
+
//Fill out the TransmitBuffer
copyArray((uint8_t*)&g_faultRegister, (uint8_t*)g_txBuffer, g_txByteCtr);
disableI2cRxInterrupt();
@@ -128,7 +149,7 @@ inline void i2cSlaveProcessCmd(const uint8_t cmd){
//-----------------------------------------------------------------
// Commands requesting to process some more data from master
//-----------------------------------------------------------------
- case RELATIVE_TARGET_POSITION:
+ case TARGET_POSITION:
case TARGET_SPEED:
case P_CURRENT:
case I_CURRENT:
@@ -163,45 +184,87 @@ inline void i2cSlaveTransactionDone(const uint8_t cmd){
case STATUS_REGISTER:
case FAULT_REGISTER:
break;
- case RELATIVE_TARGET_POSITION:
+ case TARGET_POSITION:
copyArray((uint8_t*)g_rxBuffer,
(uint8_t*)&g_targetPosition,
sizeof(g_targetPosition));
- g_currentPosition = 0; // reset current position
+ g_currentPosition = 0; // reset because target pos is relative
+ g_statusRegister &= ~POSITION_CONVERGED; // likely no longer converged (if still converged, control loop will correct for that)
+ g_drivingTimeoutCtr = 0; //reset timeout counter
+ g_faultRegister = 0; // reset fault register
break;
case TARGET_SPEED:
+ {
copyArray((uint8_t*)g_rxBuffer,
(uint8_t*)&g_maxSpeed,
sizeof(g_maxSpeed));
- if(g_maxSpeed > MAX_TARGET_SPEED) g_maxSpeed = MAX_TARGET_SPEED;
break;
+ }
case P_CURRENT:
- copyArray((uint8_t*)g_rxBuffer,
- (uint8_t*)&g_piCur.Kp,
- sizeof(g_piCur.Kp));
+ {
+ // This conversion has been verified to be working as of 5-1-2021
+ copyArray((uint8_t*)g_rxBuffer,
+ (uint8_t*)&g_piCur.Kp,
+ sizeof(g_piCur.Kp));
break;
+ }
case I_CURRENT:
- copyArray((uint8_t*)g_rxBuffer,
- (uint8_t*)&g_piCur.Ki,
- sizeof(g_piCur.Ki));
- break;
+ {
+ copyArray((uint8_t*)g_rxBuffer,
+ (uint8_t*)&g_piCur.Ki,
+ sizeof(g_piCur.Ki ));
+ break;
+ }
case P_SPEED:
- copyArray((uint8_t*)g_rxBuffer,
- (uint8_t*)&g_piSpd.Kp,
- sizeof(g_piSpd.Kp));
+ {
+ copyArray((uint8_t*)g_rxBuffer,
+ (uint8_t*)&g_piSpd.Kp,
+ sizeof(g_piSpd.Kp ));
break;
+ }
case I_SPEED:
- copyArray((uint8_t*)g_rxBuffer,
- (uint8_t*)&g_piSpd.Ki,
- sizeof(g_piSpd.Ki));
- break;
+ {
+ copyArray((uint8_t*)g_rxBuffer,
+ (uint8_t*)&g_piSpd.Ki,
+ sizeof(g_piSpd.Ki ));
+ break;
+ }
case CONTROL_REGISTER:
copyArray((uint8_t*)g_rxBuffer,
(uint8_t*)&g_controlRegister,
sizeof(g_controlRegister));
+
+ // update status register if told to drive in open loop
+ if(g_controlRegister & DRIVE_OPEN_LOOP){
+ g_statusRegister |= DRIVE_OPEN_LOOP;
+ }
+
+ if(g_controlRegister & CLEAR_DRIVER_FAULT){
+ clear_driver_fault();
+ g_statusRegister |= CLEAR_DRIVER_FAULT; // indicates an attempt to clear fault was made
+ }
+ // update state machine if requested
+ if(g_controlRegister & STATE_MACHINE_DISABLE){
+ g_cmdState = DISABLE;
+ updateStateMachine();
+ g_statusRegister |= STATE_MACHINE_DISABLE; // status reg bit 3: 1 if in disable state, 0 if not
+ } else if (g_controlRegister & STATE_MACHINE_RUN){
+ g_cmdState = RUN;
+ updateStateMachine();
+ g_statusRegister &= ~STATE_MACHINE_DISABLE;
+ }
+
break;
- case ACC_RATE: // TODO : add support for these
+ case ACC_RATE: //TODO: flesh these out
+ copyArray((uint8_t*)g_rxBuffer,
+ (uint8_t*)&g_accelRate,
+ sizeof(g_accelRate));
+ break;
case DEC_RATE:
+ copyArray((uint8_t*)g_rxBuffer,
+ (uint8_t*)&g_decelRate,
+ sizeof(g_decelRate));
+ break;
default:
break;
}
@@ -209,12 +272,13 @@ inline void i2cSlaveTransactionDone(const uint8_t cmd){
/**
- * @brief Initializes the command length.
+ * @brief Initializes the command length
+ * (expected # of bytes to read/write for each register)
*/
void initializeCmdLength(){
g_i2cCmdLength[I2C_ADDRESS] = 1;
- g_i2cCmdLength[RELATIVE_TARGET_POSITION] = 4;
- g_i2cCmdLength[TARGET_SPEED] = 2;
+ g_i2cCmdLength[TARGET_POSITION] = 4;
+ g_i2cCmdLength[TARGET_SPEED] = 1;
g_i2cCmdLength[CURRENT_POSITION] = 4;
g_i2cCmdLength[CURRENT_SPEED] = 2;
g_i2cCmdLength[MOTOR_CURRENT] = 4;
@@ -246,7 +310,7 @@ void initializeI2cModule(){
param.slaveAddress = I2C_SLAVE_ADDRESS;
param.slaveAddress |= (READ_ADDR1) ? 0x01 : 0x00;
param.slaveAddress |= (READ_ADDR2) ? 0x02 : 0x00;
- g_i2cSlaveAddress = param.slaveAddress;
+ g_i2cSlaveAddress = param.slaveAddress; // [DEBUG]
param.slaveAddressOffset = EUSCI_B_I2C_OWN_ADDRESS_OFFSET0;
param.slaveOwnAddressEnable = EUSCI_B_I2C_OWN_ADDRESS_ENABLE;
EUSCI_B_I2C_initSlave(EUSCI_B0_BASE, ¶m);
@@ -287,13 +351,17 @@ __interrupt void USCI_B0_ISR(void){
case USCI_I2C_UCRXIFG1: break; // Vector 18: RXIFG1
case USCI_I2C_UCTXIFG1: break; // Vector 20: TXIFG1
case USCI_I2C_UCRXIFG0: // Vector 22: RXIFG0
+ {
rxBuf = UCB0RXBUF;
switch(g_slaveMode){
case RX_REG_ADDRESS_MODE:
+ // switch state based on which register master wants to interact with (all read only OR write only)
+ TB0CCTL0 = 0x0000; // Turn off timer interrupt
g_readRegAddr = rxBuf;
i2cSlaveProcessCmd(g_readRegAddr);
break;
case RX_DATA_MODE:
+ // master is writing bytes to us
g_rxBuffer[g_rxBufferIdx++] = rxBuf;
g_rxByteCtr--;
if(g_rxByteCtr == 0){
@@ -302,15 +370,18 @@ __interrupt void USCI_B0_ISR(void){
disableI2cTxInterrupt();
enableI2cRxInterrupt();
i2cSlaveTransactionDone(g_readRegAddr);
+ TB0CCTL0 = CCIE; // turn timer interrupt back on
}
break;
default:
break;
}
break;
+ }
case USCI_I2C_UCTXIFG0: // Vector 24: TXIFG0
switch(g_slaveMode){
case TX_DATA_MODE:
+ // master is reading bytes from us
UCB0TXBUF = g_txBuffer[g_txBufferIdx++];
g_txByteCtr--;
if(g_txByteCtr == 0){
@@ -318,12 +389,14 @@ __interrupt void USCI_B0_ISR(void){
disableI2cTxInterrupt();
enableI2cRxInterrupt();
i2cSlaveTransactionDone(g_readRegAddr);
+ TB0CCTL0 = CCIE; // turn timer interrupt back on
}
break;
default:
break;
}
break;
- default: break;
+ default:
+ break;
}
}
diff --git a/Apps/FlightSoftware/MotorControl/i2c.h b/Apps/FlightSoftware/MotorControl/i2c.h
index a08ce76ea..6b5572455 100644
--- a/Apps/FlightSoftware/MotorControl/i2c.h
+++ b/Apps/FlightSoftware/MotorControl/i2c.h
@@ -13,8 +13,9 @@
#define I2C_PACKET_HEADER 0xAA
typedef enum I2cRegisterIds{
+
I2C_ADDRESS = 0,
- RELATIVE_TARGET_POSITION = 1,
+ TARGET_POSITION = 1,
TARGET_SPEED = 2,
CURRENT_POSITION = 3,
CURRENT_SPEED = 4,
@@ -28,6 +29,7 @@ typedef enum I2cRegisterIds{
CONTROL_REGISTER = 12,
STATUS_REGISTER = 13,
FAULT_REGISTER = 14,
+ CLEAR_FAULT_REGISTER = 15,
MAX_NB_CMDS = 15
}I2cRegisterIds;
@@ -43,16 +45,6 @@ typedef enum I2cMode{
TIMEOUT_MODE
}I2cMode;
-
-typedef struct I2cPacket{
- uint8_t header;
- uint8_t dataSize;
- uint8_t regId;
- uint8_t data[I2C_MAX_DATA_SIZE];
-
-}I2cPacket;
-
-bool readI2cData(I2cPacket *pckt);
void initializeI2cModule();
#endif /* I2C_H_ */
diff --git a/Apps/FlightSoftware/MotorControl/impulse.h b/Apps/FlightSoftware/MotorControl/impulse.h
index aeed09c26..902ffb981 100644
--- a/Apps/FlightSoftware/MotorControl/impulse.h
+++ b/Apps/FlightSoftware/MotorControl/impulse.h
@@ -10,6 +10,7 @@ typedef struct { uint16_t Period; // Input: Period of output impulse in a numb
IMPULSE Macro Definition
------------------------------------------------------------------------------*/
+// this macro is used to kick-start closed loop control; doesn't need to be as fast
#define IMPULSE_MACRO(v) \
\
v.Out = 0x00; /* Always clear impulse output at entry*/ \
@@ -21,4 +22,18 @@ typedef struct { uint16_t Period; // Input: Period of output impulse in a numb
v.Counter = 0; /* Reset counter*/ \
}
+// this macro is for fully open-loop control
+// ticks through commutations faster (by skipping half of them), allows for open loop
+// speed to be twice as fast
+#define OPEN_LOOP_IMPULSE_MACRO(v) \
+ \
+ v.Out = 0x00; /* Always clear impulse output at entry*/ \
+ v.Counter+=2; /* Increment the skip counter*/ \
+ \
+ if (v.Counter >= v.Period) \
+ { \
+ v.Out = 0xff; \
+ v.Counter = 0; /* Reset counter*/ \
+ }
+
#endif // __IMPULSE_H__
diff --git a/Apps/FlightSoftware/MotorControl/main.c b/Apps/FlightSoftware/MotorControl/main.c
index af395b1b4..971e80b5c 100644
--- a/Apps/FlightSoftware/MotorControl/main.c
+++ b/Apps/FlightSoftware/MotorControl/main.c
@@ -1,3 +1,10 @@
+// [DEBUG] Switches
+//#define IRIS_ALL_OFF
+//#define IRIS_CLEAR_FAULT
+//#define IRIS_SPIN_MOTOR
+//#define IRIS_SPIN_MOTOR_REVERSE
+//#define IRIS_SPIN_MOTOR_INDEF
+
#include "main.h"
_iq g_currentPhaseA;
@@ -37,17 +44,26 @@ volatile MOD6CNT g_mod6cnt;
volatile bool g_closedLoop;
volatile bool g_targetReached;
-volatile int16_t g_maxSpeed;
+volatile uint8_t g_maxSpeed;
volatile StateMachine g_state;
volatile CmdState g_cmdState;
+volatile uint16_t g_accelRate;
+volatile uint16_t g_decelRate;
+
volatile int8_t g_targetDirection;
volatile int8_t g_oldTargetDirection;
uint8_t g_statusRegister;
-uint8_t g_controlRegister;
-uint8_t g_faultRegister;
+volatile uint8_t g_controlRegister;
+volatile uint8_t g_faultRegister;
+volatile uint32_t g_drivingTimeoutCtr;
+uint8_t g_errorCounter= 0; // incremented every time inner control loop is reached and motor is acting strange
+ // if it exceeds ERROR_ITERATION_THRESHOLD then motor is stopped
+
+// timing debug
+bool g_readSensors = false;
/**
@@ -56,7 +72,7 @@ uint8_t g_faultRegister;
void initializePwmModules(){
//Start Timer
Timer_B_initUpDownModeParam initUpDownParam = {0};
- initUpDownParam.clockSource = TIMER_B_CLOCKSOURCE_SMCLK; // 16 MHz
+ initUpDownParam.clockSource = TIMER_B_CLOCKSOURCE_SMCLK; // 16 MHz, or maybe 8..
initUpDownParam.clockSourceDivider = TIMER_B_CLOCKSOURCE_DIVIDER_1;
initUpDownParam.timerPeriod = PWM_PERIOD_TICKS;
initUpDownParam.timerInterruptEnable_TBIE = TIMER_B_TBIE_INTERRUPT_DISABLE;
@@ -218,9 +234,10 @@ inline void disableGateDriver(){
* @return The speed.
*/
inline _iq getSpeed(){
- // Normalize speed to -128 ticks < diff < 128 to -1.0 < diff < +1.0
+ // Normalize speed to -128 ticks < diff < 127 to -1.0 < diff < +1.0
// 255 ticks per (PI_SPD_CONTROL_PRESCALER * PWM_PERIOD_TICKS) represents 9.600 eRPM
- g_currentSpeed = (g_currentPosition - g_oldPosition) << 8;
+ int32_t deltaPos = _IQsat(g_currentPosition - g_oldPosition, 256, -256);
+ g_currentSpeed = deltaPos << 7;
g_oldPosition = g_currentPosition;
return g_currentSpeed;
}
@@ -302,7 +319,7 @@ void currentOffsetCalibration(){
* @param[in] commutation The commutation
* @param[in] dutyCycle The duty cycle
*/
-inline void pwmGenerator(const uint8_t commutation, _iq dutyCycle){
+void pwmGenerator(const uint8_t commutation, _iq dutyCycle){
uint16_t dc; //duty cycle
uint16_t dcCmpl; //complement
@@ -464,10 +481,9 @@ inline void disable(){
*/
inline void run(){
if(g_state == RUNNING) return; // already in RUNNING, nothing to do
-
__disable_interrupt();
enableGateDriver();
- //g_targetPosition = i2c;
+// g_targetPosition = 20000; // [DEBUG]
g_targetDirection = (g_targetPosition - g_currentPosition>= 0) ? 1 : -1;
g_currentPosition = 0;
g_targetReached = false;
@@ -475,27 +491,14 @@ inline void run(){
__enable_interrupt();
}
-/**
- * @brief Enter stop state
- */
-inline void stop(){
- if(g_state == STOPPED) return; // already in STOPPED, nothing to do
-
- __disable_interrupt();
- g_targetPosition = g_targetPosition - g_currentPosition;
- g_state = STOPPED;
- __enable_interrupt();
-}
-
/**
* @brief Update the drive state machine
*/
-inline void updateStateMachine(){
+void updateStateMachine(){
switch(g_cmdState){
case RUN:
switch(g_state){
- case STOPPED:
case IDLE:
run();
break;
@@ -505,22 +508,9 @@ inline void updateStateMachine(){
break;
}
break;
- case STOP:
- switch(g_state){
- case RUNNING:
- stop();
- break;
- case UNINITIALIZED:
- case IDLE:
- case STOPPED:
- default:
- break;
- }
- break;
case DISABLE:
switch(g_state){
case RUNNING:
- case STOPPED:
disable();
break;
case UNINITIALIZED:
@@ -536,6 +526,35 @@ inline void updateStateMachine(){
g_cmdState = NO_CMD;
}
+/**
+ * @brief Clears the DRV8304 Driver Fault Register.
+ */
+inline void clear_driver_fault_register(){
+ // Pull high first so you can then pull it low:
+ GPIO_setOutputHighOnPin(GPIO_PORT_PJ, GPIO_PIN0);
+ __delay_cycles(1600000); // 100 ms
+ // Reset Fault Register by pulsing ENABLE for 5-32us (18.5us):
+ GPIO_setOutputLowOnPin(GPIO_PORT_PJ, GPIO_PIN0);
+ __delay_cycles(296); // 18.5 us
+ GPIO_setOutputHighOnPin(GPIO_PORT_PJ, GPIO_PIN0);
+}
+
+inline void clear_driver_fault(){
+ // Pull high first so you can then pull it low:
+ GPIO_setOutputHighOnPin(GPIO_PORT_PJ, GPIO_PIN0);
+ __delay_cycles(1600000); // 100 ms
+ // Reset Fault Register by pulsing ENABLE for 5-32us (18.5us):
+ GPIO_setOutputLowOnPin(GPIO_PORT_PJ, GPIO_PIN0);
+ __delay_cycles(296); // 18.5 us
+ GPIO_setOutputHighOnPin(GPIO_PORT_PJ, GPIO_PIN0);
+}
+/**
+ * @brief Reads the whether the DRV8304 driver is in a "fault condition" (and should be cleared). Active low.
+ */
+inline bool read_driver_fault(){
+ return !(PJIN & 0x02);
+}
+
/**
* @brief main function
@@ -547,13 +566,22 @@ void main(void){
initializeGpios();
+#ifdef IRIS_CLEAR_FAULT
+ clear_driver_fault_register();
+#endif
+
+#ifndef IRIS_ALL_OFF
+
//Set DCO frequency to 16MHz
CS_setDCOFreq(CS_DCORSEL_1, CS_DCOFSEL_4);
CS_initClockSignal(CS_SMCLK,CS_DCOCLK_SELECT,CS_CLOCK_DIVIDER_1);
CS_initClockSignal(CS_MCLK,CS_DCOCLK_SELECT,CS_CLOCK_DIVIDER_1);
- // Initialize global variables
+ // ==========================================
+ // Initialize global variables
+ // ==========================================
+ // sensor-related variables (current & hall/encoder)
g_currentOffsetPhaseA = 0;
g_currentOffsetPhaseB = 0;
g_currentOffsetPhaseC = 0;
@@ -563,14 +591,25 @@ void main(void){
g_currentPosition = 0;
g_oldPosition = g_currentPosition;
g_targetPosition = 0;
+ g_drivingTimeoutCtr = 0;
+#ifdef IRIS_SPIN_MOTOR
+ g_targetPosition = 8500;//9750; // [DEBUG]
+#endif
+#ifdef IRIS_SPIN_MOTOR_REVERSE
+ g_targetPosition = -9750;
+#endif
+#ifdef IRIS_SPIN_MOTOR_INDEF
+ g_targetPosition = 1000000; //approx 100 revolutions
+#endif
+
+ // software control related variables (rate groups, internal state machine)
g_controlPrescaler = PI_SPD_CONTROL_PRESCALER;
g_closedLoop = false;
- g_state = UNINITIALIZED;
- g_currentRefTest = _IQ(0.05);
- g_speedRefTest = _IQ(0.0);
-
- g_feedforwardFW = _IQ(0.07);
+ g_state = RUNNING;
+ g_cmdState = NO_CMD;
+ g_controlRegister = 0; // see main.h for bits
+ // motor controller related variables (PI contorllers for speed and current)
g_maxSpeed = MAX_TARGET_SPEED;
g_openLoopTorque = _IQ(OPEN_LOOP_TORQUE);
@@ -585,140 +624,267 @@ void main(void){
g_piCur.Kp = _IQ(KP_CUR);
g_piCur.Ki = _IQ(KI_CUR);
- //g_piSpd.Ref = _IQ(0.1);
g_closeLoopThreshold = _IQ(CLOSE_LOOP_THRESHOLD);
+ g_closedLoop = false;
+
+ // initialize hardware components
initializeI2cModule();
initializePwmModules();
initializeAdcModule();
initializeHallInterface();
- __bis_SR_register(GIE);
+ __bis_SR_register(GIE); // enable interrupts (timer & i2c)
currentOffsetCalibration();
- enableGateDriver(); // TODO <<<< remove this line
+ enableGateDriver(); // get ready to move
+
+
+#else
+ disableGateDriver();
+ asm(" NOP");
+#endif
+
while(1){
- g_closedLoop = (_IQabs(g_currentSpeed) > g_closeLoopThreshold && !g_targetReached) ? true : false;
-
- if(g_piSpd.w1){
- __disable_interrupt();
- g_piSpd.i1 = 0;
- g_piSpd.ui = 0;
- g_piSpd.v1 = 0;
- __enable_interrupt();
- }
-
- if(g_piCur.w1){
- __disable_interrupt();
- g_piCur.i1 = 0;
- g_piCur.ui = 0;
- g_piCur.v1 = 0;
- __enable_interrupt();
- }
-
- //updateStateMachine();
+ // check if target reached
+ if (_IQabs(g_targetPosition - g_currentPosition) < 100) {
+ // target has been reached
+ g_targetReached = true;
+ g_statusRegister |= POSITION_CONVERGED;
+ // turn off output
+ _iq output = _IQ(0.0);
+ pwmGenerator(g_commState, output);
+ } else {
+ // target not reached yet
+ g_targetReached = false;
+ g_statusRegister &= ~POSITION_CONVERGED;
+ }
+
+ // check if driving in open or closed loop, act accordingly
+ if (g_controlRegister & DRIVE_OPEN_LOOP && g_controlRegister & EXECUTE_COMMAND) {
+ //driving open loop
+
+ // target position sets direction motor drives in
+ g_targetDirection = (g_targetPosition - g_currentPosition >= 0) ? 1 : -1;
+
+ if(!g_targetReached){
+ // Iterate through commutations & apply impulse to desired motor windings
+ OPEN_LOOP_IMPULSE_MACRO(g_impulse);
+ if(g_impulse.Out){
+ MOD6CNT_MACRO(g_mod6cnt);
+ g_commState = (g_targetDirection > 0) ? g_mod6cnt.Counter : 5 - g_mod6cnt.Counter;
+ }
+
+
+ _iq output;
+ if(g_controlRegister & OPEN_LOOP_TORQUE_OVERRIDE)
+ output = _IQ(g_maxSpeed / MAX_TARGET_SPEED); // apply user specified output
+ else
+ output = _IQ(0.3); // apply constant output
+
+ // apply output as PWM
+ if(g_targetDirection > 0) {
+ pwmGenerator(g_commState, output);
+ } else{
+ pwmGenerator(g_commState, -output);
+ }
+
+ }
+
+ // control loop - updates current position with speed estimate & ticks timeout counter
+ if (g_controlPrescaler<=0){
+ g_controlPrescaler = PI_SPD_CONTROL_PRESCALER;
+ g_currentPosition += g_targetDirection * OPEN_LOOP_SPEED;
+
+ if(!g_targetReached)
+ g_drivingTimeoutCtr++;
+ }
+
+ } else if (g_controlRegister & EXECUTE_COMMAND){
+ // driving closed loop
+
+ if(g_readSensors){
+ // update sensor (Hall & current) readings
+ g_readSensors = false;
+
+ // measure hall sensors
+ readHallSensor();
+
+ // Execute macro to generate ramp up
+ if(g_closedLoop == false && g_targetReached == false){
+ IMPULSE_MACRO(g_impulse);
+ if(g_impulse.Out){
+ MOD6CNT_MACRO(g_mod6cnt);
+ g_commState = (g_targetDirection > 0) ? g_mod6cnt.Counter : 5 - g_mod6cnt.Counter;
+ }
+ }
+ else{
+ g_commState = g_hallMap[g_hallSensor.Pattern];
+ }
+
+ // update current position based on hall sensor readings
+ if(g_hallSensor.Event){
+ if(g_hallMap[g_hallSensor.Pattern] == 5 && g_oldCommState == 0){
+ g_currentPosition--;
+ }
+ else if(g_hallMap[g_hallSensor.Pattern] == 0 && g_oldCommState == 5){
+ g_currentPosition++;
+ }
+ else if(g_hallMap[g_hallSensor.Pattern] > g_oldCommState){
+ g_currentPosition++;
+ }
+ else{
+ g_currentPosition--;
+ }
+ g_oldCommState = g_hallMap[g_hallSensor.Pattern];
+ }
+
+ // update current readings
+ // Prepare ADC conversion for next round
+ HWREG8(ADC12_B_BASE + OFS_ADC12CTL0_L) &= ~(ADC12ENC);
+ HWREG8(ADC12_B_BASE + OFS_ADC12CTL0_L) |= ADC12ENC + ADC12SC;
+ // Remove offset
+ g_currentPhaseA = HWREG16(ADC12_B_BASE + (OFS_ADC12MEM0 + ADC12_B_MEMORY_0)) - g_currentOffsetPhaseA;
+ g_currentPhaseB = HWREG16(ADC12_B_BASE + (OFS_ADC12MEM0 + ADC12_B_MEMORY_1)) - g_currentOffsetPhaseB;
+ g_currentPhaseC = HWREG16(ADC12_B_BASE + (OFS_ADC12MEM0 + ADC12_B_MEMORY_2)) - g_currentOffsetPhaseC;
+ }
+
+ // inner control loop (current), apply output as PWM duty cycle
+ // Normalize current values from -2047 < adc < +2048 to iq15 --> -1.0 < adc < 1.0 and convert to iq format
+ g_piCur.Fbk = (g_currentPhaseA + g_currentPhaseB + g_currentPhaseC) << 4;
+ g_piCur.Ref = g_piSpd.Out;
+
+ PI_MACRO(g_piCur);
+
+ // check if we can pivot to closed loop control
+ g_closedLoop = (_IQabs(g_currentSpeed) > g_closeLoopThreshold && !g_targetReached) ? true : false;
+
+ // apply constant torque if still in open loop
+ if(g_closedLoop == false && g_targetReached == false){
+ g_piCur.i1 = 0;
+ g_piCur.ui = 0;
+ g_piSpd.i1 = 0;
+ g_piSpd.ui = 0;
+ g_piCur.Out = g_openLoopTorque;
+ if(_IQabs(g_currentSpeed) > g_closeLoopThreshold){
+ g_closedLoop = true;
+ }
+ }
+ // set integrator and output to 0 if target is reached
+ if(g_targetReached == true){
+ g_piCur.i1 = 0;
+ g_piCur.ui = 0;
+ g_piSpd.i1 = 0;
+ g_piSpd.ui = 0;
+ g_piCur.Out = 0;
+ g_closedLoop = false;
+ }
+// if controllers are saturated, reset its integrator & output
+ if(g_piSpd.w1){
+ __disable_interrupt();
+ g_piSpd.i1 = 0; // full wipe of integrator causes jumpy stop-start behavior
+ g_piSpd.ui = 0;
+ g_piSpd.v1 = 0;
+ __enable_interrupt();
+ }
+ if(g_piCur.w1){
+ __disable_interrupt();
+ g_piCur.i1 = _IQ(0.5); // full wipe of integrator causes jumpy stop-start behavior
+ g_piCur.ui = 0;
+ g_piCur.v1 = 0;
+ __enable_interrupt();
+ }
+
+ // apply duty cycle based on current PI controller's output
+ pwmGenerator(g_commState, g_piCur.Out);
+
+ // outer control loop (speed)
+ if(g_controlPrescaler <= 0){
+
+ g_targetDirection = (g_targetPosition - g_currentPosition >= 0) ? 1 : -1;
+
+ if(g_targetDirection > 0) g_piSpd.Ref = g_maxSpeed << 8;
+ else g_piSpd.Ref = -g_maxSpeed << 8;
+
+ // check for errors in controller operation
+ if (g_currentPosition == g_oldPosition && !g_targetReached){
+ // position isn't updating; hall sensors likely not powered or broken
+ g_errorCounter++;
+ g_faultRegister |= POSITION_NO_CHANGE;
+ } else if ( (g_currentPosition - g_oldPosition)*g_targetDirection < 0 && !g_targetReached){
+ // moving in wrong direction
+ g_errorCounter++;
+ g_faultRegister |= DRIVING_WRONG_DIRECTION;
+ } else {
+ // operating normally; no error
+ g_statusRegister &= ~CONTROLLER_ERROR;
+ g_errorCounter = 0; // reset error counter
+ g_faultRegister &= ~(POSITION_NO_CHANGE & DRIVING_WRONG_DIRECTION); //clear faults in register
+ }
+
+ // errors on last ERROR_ITERATION_THRESHOLD time steps; time to stop trying to drive motor
+ if(g_errorCounter >= ERROR_ITERATION_THRESHOLD){
+ if (g_controlRegister & OVERRIDE_FAULT_DETECTION == 0x00) //check if we should stop controller given fault
+ g_targetPosition = g_currentPosition = 0; //stop controller
+ g_statusRegister |= CONTROLLER_ERROR; // add flag to status register
+ }
+
+ g_piSpd.Fbk = getSpeed();
+ PI_MACRO(g_piSpd);
+
+ // rest control prescaler & tick timeout counter
+ g_controlPrescaler = PI_SPD_CONTROL_PRESCALER;
+ if(!g_targetReached)
+ g_drivingTimeoutCtr++;
+ }
+ }
+
+ // check if motor has taken too long to converge, act accordingly if so
+ if(g_drivingTimeoutCtr > DRIVING_TIMEOUT_THRESHOLD){
+ g_targetReached = true;
+ g_targetPosition = g_currentPosition; // so motor won't flip g_targetReached again
+ g_faultRegister |= DRIVING_TIMEOUT;
+ g_statusRegister |= (POSITION_CONVERGED | CONTROLLER_ERROR);
+ g_drivingTimeoutCtr = 0;
+ }
}
}
/**
- * @brief Main control loop
+ * @brief Timer interrupt that sets rate for controller and indicates when to read sensors again
*/
+#ifndef IRIS_ALL_OFF
+
#pragma CODE_SECTION(TIMER0_B0_ISR, ".TI.ramfunc")
#pragma vector=TIMER0_B0_VECTOR
__interrupt void TIMER0_B0_ISR (void){
- // Prepare ADC conversion for next round
- HWREG8(ADC12_B_BASE + OFS_ADC12CTL0_L) &= ~(ADC12ENC);
- HWREG8(ADC12_B_BASE + OFS_ADC12CTL0_L) |= ADC12ENC + ADC12SC;
-
- if(g_calibrating){
- g_currentOffsetPhaseA = HWREG16(ADC12_B_BASE + (OFS_ADC12MEM0 + ADC12_B_MEMORY_0));
- g_currentOffsetPhaseB = HWREG16(ADC12_B_BASE + (OFS_ADC12MEM0 + ADC12_B_MEMORY_1));
- g_currentOffsetPhaseC = HWREG16(ADC12_B_BASE + (OFS_ADC12MEM0 + ADC12_B_MEMORY_2));
- g_calibrationDone = true;
- }
-
- if(!g_calibrationDone) return;
-
- readHallSensor();
- //if(g_hallSensor.error) return;
-
- // Execute macro to generate ramp up
- if(g_closedLoop == false && g_targetReached == false){
- IMPULSE_MACRO(g_impulse);
- if(g_impulse.Out){
- MOD6CNT_MACRO(g_mod6cnt);
- g_commState = (g_targetDirection > 0) ? g_mod6cnt.Counter : 5 - g_mod6cnt.Counter;
- }
- }
- else{
- g_commState = g_hallMap[g_hallSensor.Pattern];
- }
-
- if(g_hallSensor.Event){
- if(g_hallMap[g_hallSensor.Pattern] == 5 && g_oldCommState == 0){
- g_currentPosition--;
- }
- else if(g_hallMap[g_hallSensor.Pattern] == 0 && g_oldCommState == 5){
- g_currentPosition++;
- }
- else if(g_hallMap[g_hallSensor.Pattern] > g_oldCommState){
- g_currentPosition++;
- }
- else{
- g_currentPosition--;
- }
- g_oldCommState = g_hallMap[g_hallSensor.Pattern];
- }
- if(g_controlPrescaler == 0){
- g_controlPrescaler = PI_SPD_CONTROL_PRESCALER;
+ // calibrate ADC for current readings
+ if(g_calibrating){
+ // Prepare ADC conversion for next round
+ HWREG8(ADC12_B_BASE + OFS_ADC12CTL0_L) &= ~(ADC12ENC);
+ HWREG8(ADC12_B_BASE + OFS_ADC12CTL0_L) |= ADC12ENC + ADC12SC;
- // Normalize from -255 ~ + 255 to -1.0 ~ 1.0
- g_targetReached = (_IQabs(g_targetPosition - g_currentPosition) < 5) ? true : false;
- if(g_targetReached == false){
- g_piSpd.Ref = (_IQsat(g_targetPosition - g_currentPosition, g_maxSpeed, -g_maxSpeed)) << 8;
+ g_currentOffsetPhaseA = HWREG16(ADC12_B_BASE + (OFS_ADC12MEM0 + ADC12_B_MEMORY_0));
+ g_currentOffsetPhaseB = HWREG16(ADC12_B_BASE + (OFS_ADC12MEM0 + ADC12_B_MEMORY_1));
+ g_currentOffsetPhaseC = HWREG16(ADC12_B_BASE + (OFS_ADC12MEM0 + ADC12_B_MEMORY_2));
+ g_calibrationDone = true;
}
- else{
- g_piSpd.Ref = 0;
- }
-
- g_targetDirection = (g_targetPosition - g_currentPosition >= 0) ? 1 : -1;
- g_piSpd.Fbk = getSpeed();
-
- PI_MACRO(g_piSpd);
- }
+ if(!g_calibrationDone) return; // wait for calibration to finish
- g_controlPrescaler = g_controlPrescaler -1;
+ g_readSensors=true; // read sensors (hall/encoders & current) again every time this interrupts fires
- // Remove offset
- g_currentPhaseA = HWREG16(ADC12_B_BASE + (OFS_ADC12MEM0 + ADC12_B_MEMORY_0)) - g_currentOffsetPhaseA;
- g_currentPhaseB = HWREG16(ADC12_B_BASE + (OFS_ADC12MEM0 + ADC12_B_MEMORY_1)) - g_currentOffsetPhaseB;
- g_currentPhaseC = HWREG16(ADC12_B_BASE + (OFS_ADC12MEM0 + ADC12_B_MEMORY_2)) - g_currentOffsetPhaseC;
+ // without conditional can get huge and negative
+ if(g_controlPrescaler>0)
+ g_controlPrescaler = g_controlPrescaler -1;
- // Normalize current values from -2047 < adc < +2048 to iq15 --> -1.0 < adc < 1.0 and convert to iq format
- g_piCur.Fbk = (g_currentPhaseA + g_currentPhaseB + g_currentPhaseC) << 4;
- // Compense motor direction.
- if(g_targetDirection < 0){
- g_piCur.Ref = g_piSpd.Out - _IQ15mpy_inline(g_feedforwardFW, g_piSpd.Fbk);
- }
- else{
- g_piCur.Ref = g_piSpd.Out;
- }
- PI_MACRO(g_piCur);
-
- if(g_closedLoop == false){
- g_piCur.i1 = 0;
- g_piCur.ui = 0;
- g_piSpd.i1 = 0;
- g_piSpd.ui = 0;
- g_piCur.Out = g_openLoopTorque;
- }
+ return;
- // If target is reached no need to move
- pwmGenerator(g_commState, g_piCur.Out);
}
+
+#endif
diff --git a/Apps/FlightSoftware/MotorControl/main.h b/Apps/FlightSoftware/MotorControl/main.h
index d738b7a40..af5814871 100644
--- a/Apps/FlightSoftware/MotorControl/main.h
+++ b/Apps/FlightSoftware/MotorControl/main.h
@@ -13,26 +13,63 @@
#include "mod6_cnt.h"
#include "impulse.h"
-#define PWM_PERIOD_TICKS 512 // 15.6 KHz @ 16MHz
+/* ============================================
+ * Bits of Registers
+ * ============================================
+ */
+// bits of control register
+#define DRIVE_OPEN_LOOP 1 // first bit of control reg; drive only in open loop if set to 1
+#define CLEAR_DRIVER_FAULT 2 // second bit indicates request to try to clear fault in motor driver
+#define STATE_MACHINE_DISABLE 4
+#define STATE_MACHINE_RUN 8
+#define OVERRIDE_FAULT_DETECTION 16 // don't reset current & desired position if abnormal behavior detected
+#define EXECUTE_COMMAND 32 // actually drive to command
+#define OPEN_LOOP_TORQUE_OVERRIDE 64 // use g_maxSpeed/MAX_TARGET_SPEED to calculate open loop PWM cycle (instead of constant at 0.3)
+
+// bits of status register (shares 1,2,4 with control register)
+#define POSITION_CONVERGED 8
+#define CONTROLLER_ERROR 16 // indicates something has gone awry with position controller; will not converge
+
+// bits of fault register
+#define DRIVER_FAULT 1 // for if there is a fault in the DRV8304 motor drivers
+#define POSITION_NO_CHANGE 2 // for if position is not changing at all; could be dead hall sensors
+#define DRIVING_WRONG_DIRECTION 4 // for if motor is driving in wrong direction
+#define DRIVING_TIMEOUT 8 // for if motor does not converge in time defined by DRIVING_TIMEOUT_THRESHOLD
+
+#define ERROR_ITERATION_THRESHOLD 10 // how many iterations motor performance must be funky before driving is stopped
+#define PWM_PERIOD_TICKS 512 // 15.6 KHz @ 16MHz
#define PWM_HALF_PERIOD_TICKS 256
-#define PI_SPD_CONTROL_PRESCALER 1000 // 15.6 Hz, speed control
+#define PI_SPD_CONTROL_PRESCALER 1000 // 15.6 Hz, speed control
+#define OPEN_LOOP_SPEED 3 // estimate of rotational distance (in hall sensor ticks) covered in 1/15.6 [sec] by motor when in open loop
+#define DRIVING_TIMEOUT_THRESHOLD 1872 // how much time in 1/15.6 [sec] before stopping driving (1872 = ~120 seconds)
-#define KP_SPD 0.3
-#define KI_SPD 0.001
+/* ============================================
+ * Constants
+ * ============================================
+ */
+#define KP_SPD 1.0
+#define KI_SPD 0.0009
#define KP_CUR 0.95
-#define KI_CUR 0.001
+#define KI_CUR 0.002
-#define OPEN_LOOP_TORQUE 0.1 // Normalized to 1.0, 1.0 being maximum current system can produce
-#define PERIOD_IMPULSE 150
+#define OPEN_LOOP_TORQUE 0.1 // for kick-starting into closed loop (normalized to 1.0, 1.0 being maximum current system can produce)
+#define PERIOD_IMPULSE 150 // ^ also used to kick-start, see impulse.h for details
#define CLOSE_LOOP_THRESHOLD 0.01 // Close loop threshold from open to close loop
+ // -> threshold for current speed
+#define OPEN_LOOP_TICKS 10 // distance in hall sensor ticks motor covers in open loop mode per 1/15.6 sec
-#define ONE_OVER_4096 0.0002441
-
-#define MAX_TARGET_SPEED 100
-#define MIN_TARGET_SPEED -MAX_TARGET_SPEED
+#define MAX_TARGET_SPEED 100U // used to initialize g_maxSpeed
+/* ============================================
+ * Function/struct/enum definitions
+ * ============================================
+ */
inline _iq _IQ15mpy_inline(_iq,_iq);
+inline bool read_driver_fault();
+inline void clear_driver_fault();
+void updateStateMachine();
+
typedef struct HallSensor{
uint8_t Pattern;
uint8_t OldPattern;
@@ -43,8 +80,7 @@ typedef struct HallSensor{
typedef enum StateMachine{
UNINITIALIZED,
IDLE,
- RUNNING,
- STOPPED
+ RUNNING
}StateMachine;
typedef enum CmdState{
diff --git a/Apps/FlightSoftware/MotorControl/mod6_cnt.h b/Apps/FlightSoftware/MotorControl/mod6_cnt.h
index 59765a3df..c8a967075 100644
--- a/Apps/FlightSoftware/MotorControl/mod6_cnt.h
+++ b/Apps/FlightSoftware/MotorControl/mod6_cnt.h
@@ -15,4 +15,11 @@ typedef struct { uint8_t Counter; // Output: Modulo 6 counter output - Q0 (
else \
v.Counter += 1; /* Otherwise, increment by 1 */ \
-#endif // __MOD_6CNT_H__
+
+#define OPEN_LOOP_MOD6CNT_MACRO(v) \
+ if (v.Counter >= 5) /* Reset the counter when it is 5 */ \
+ v.Counter = 0; \
+ else \
+ v.Counter += 2; /* Otherwise, increment by 1 */ \
+
+#endif // __MOD_6CNT_H__
diff --git a/Apps/FlightSoftware/MotorControl/pi.h b/Apps/FlightSoftware/MotorControl/pi.h
index 4c98d0d79..f9bdefae8 100644
--- a/Apps/FlightSoftware/MotorControl/pi.h
+++ b/Apps/FlightSoftware/MotorControl/pi.h
@@ -23,14 +23,14 @@ typedef struct { _iq Ref; // Input: reference set-point
#define PI_MACRO(v) \
\
/* proportional term */ \
- v.up = _IQ15mpy_inline(v.Kp, (v.Ref - v.Fbk)); \
+ v.up = v.Ref - v.Fbk; \
\
/* integral term */ \
v.ui = (v.Out == v.v1)?(_IQ15mpy_inline(v.Ki, v.up)+ v.i1) : v.i1; \
v.i1 = v.ui; \
\
/* control output */ \
- v.v1 = v.up + v.ui; \
+ v.v1 = _IQ15mpy_inline(v.Kp, v.up) + v.ui; \
v.Out = _IQsat(v.v1, v.Umax, v.Umin); \
v.w1 = (v.v1 != v.Out) ? 1 : 0;
diff --git a/Apps/FlightSoftware/MotorControl/targetConfigs/MSP430FR5994.ccxml b/Apps/FlightSoftware/MotorControl/targetConfigs/MSP430FR5994.ccxml
new file mode 100644
index 000000000..018dc74c9
--- /dev/null
+++ b/Apps/FlightSoftware/MotorControl/targetConfigs/MSP430FR5994.ccxml
@@ -0,0 +1,12 @@
+
+
+
+
+
+
+
+
+
+
+
+
diff --git a/Apps/FlightSoftware/MotorControl/targetConfigs/readme.txt b/Apps/FlightSoftware/MotorControl/targetConfigs/readme.txt
new file mode 100644
index 000000000..d783fef4d
--- /dev/null
+++ b/Apps/FlightSoftware/MotorControl/targetConfigs/readme.txt
@@ -0,0 +1,9 @@
+The 'targetConfigs' folder contains target-configuration (.ccxml) files, automatically generated based
+on the device and connection settings specified in your project on the Properties > General page.
+
+Please note that in automatic target-configuration management, changes to the project's device and/or
+connection settings will either modify an existing or generate a new target-configuration file. Thus,
+if you manually edit these auto-generated files, you may need to re-apply your changes. Alternatively,
+you may create your own target-configuration file for this project and manage it manually. You can
+always switch back to automatic target-configuration management by checking the "Manage the project's
+target-configuration automatically" checkbox on the project's Properties > General page.
\ No newline at end of file