diff --git a/lib/functions/compilation/kernel-debs.sh b/lib/functions/compilation/kernel-debs.sh
index 66ee3de6b1a8..f7529e58ca8c 100644
--- a/lib/functions/compilation/kernel-debs.sh
+++ b/lib/functions/compilation/kernel-debs.sh
@@ -335,6 +335,17 @@ function kernel_package_callback_linux_dtb() {
 	mkdir -p "${package_directory}/boot/"
 	run_host_command_logged cp -rp "${tmp_kernel_install_dirs[INSTALL_DTBS_PATH]}" "${package_directory}/boot/dtb-${kernel_version_family}"
 
+	# Copy overlays from device tree base dirs to overlay sub dirs
+	declare dtbo="" overlay_dir=""
+	find "${package_directory}/boot/dtb-${kernel_version_family}" -type d -name 'overlay' -prune -o -type f -name '*.dtbo' -print | while read -r dtbo; do
+		overlay_dir="$(dirname "${dtbo}")/overlay"
+		[[ -d "${overlay_dir}" ]] || run_host_command_logged mkdir -v "${overlay_dir}"
+		[[ ! -f "${overlay_dir}/$(basename "${dtbo}")" ]] || display_alert "Overwriting overlay '${overlay_dir}/$(basename "${dtbo}")' with '${dtbo}'" "wrn"
+		run_host_command_logged mv -v "${dtbo}" "${overlay_dir}/"
+		[[ ! -f "${dtbo%.dtbo}.readme" ]] || run_host_command_logged mv -v "${dtbo%.dtbo}.readme" "${overlay_dir}/"
+		[[ ! -f "${dtbo%.dtbo}.scr" ]] || run_host_command_logged mv -v "${dtbo%.dtbo}.scr" "${overlay_dir}/"
+	done
+
 	# Generate a control file
 	cat <<- CONTROL_FILE > "${package_DEBIAN_dir}/control"
 		Version: ${artifact_version}
diff --git a/lib/tools/common/dt_makefile_patcher.py b/lib/tools/common/dt_makefile_patcher.py
index 9470a8556fe6..2339fa28609c 100644
--- a/lib/tools/common/dt_makefile_patcher.py
+++ b/lib/tools/common/dt_makefile_patcher.py
@@ -329,3 +329,135 @@ def auto_patch_all_dt_makefiles(autopatcher_params: AutoPatcherParams) -> list[A
 			log.info(f"Committed changes to git: {commit.hexsha} for {one_autopatch_config.directory}")
 			log.info(f"Done with Makefile autopatch commit for {one_autopatch_config.directory}.")
 	return ret_desc_list
+
+
+def auto_patch_overlays(autopatcher_params: AutoPatcherParams) -> list[AutomaticPatchDescription]:
+	ret_desc_list: list[AutomaticPatchDescription] = []
+
+	# for each config ...
+	for config in autopatcher_params.pconfig.auto_patch_overlays_configs:
+		log.warning(f"Autopatching overlays in '{config.target}' from '{config.source}' ...")
+
+		desc = AutomaticPatchDescription()
+		desc.name = "Armbian overlays auto-patch"
+		desc.description = f"Armbian overlays AutoPatch for {config.target}"
+
+		# obtain full overlays target directory path
+		target: str = os.path.join(autopatcher_params.git_work_dir, config.target)
+		if not os.path.isdir(target):
+			raise ValueError(f"overlays target path '{target}' is not a directory")
+
+		# obtain full Makefile path
+		makefile: str = os.path.join(target, "Makefile")
+		if not os.path.isfile(makefile):
+			raise ValueError(f"overlays target Makefile '{makefile}' is not a file")
+		desc.files.append(makefile)
+
+		# patch Makefile to build all (base) device trees with symbols
+		log.debug(f"Patching {makefile} to build all (base) device trees with symbols ...")
+		with open(makefile, "a") as f:
+			f.write("\nDTC_FLAGS += $(if $(filter %.dtb,$(patsubst $(obj)/%,%,$@)), -@)")
+
+		# patch Makefile to support overlay fixup scripts
+		log.debug(f"Patching {makefile} to support compiling overlay fixup scripts ...")
+		with open(makefile, "a") as f:
+			f.write(
+				"\nquiet_cmd_scr = MKIMAGE $@"
+				"\ncmd_scr = mkimage -C none -A $(ARCH) -T script -d $< $@"
+				"\n$(obj)/%.scr: $(src)/%.scr-cmd FORCE"
+				"\n\t$(call if_changed,scr)"
+			)
+
+		# patch Makefile to support testing whether an overlay merges into a defined base
+		log.debug(f"Patching {makefile} to support optional overlay tests against base device trees ...")
+		with open(makefile, "a") as f:
+			f.write(
+				"\nquiet_cmd_overlay_test = DTBOTEST $@"
+				"\ncmd_overlay_test = fdtoverlay -i $(filter %.dtb,$^) -o /dev/null -v $(filter %.dtbo,$^)"
+				"\n$(obj)/%.dtbotest: FORCE"
+				"\n\t$(call cmd,overlay_test)"
+			)
+
+		# for each patch type (core or user) ...
+		for type in autopatcher_params.root_types_order:
+			dirs: list[str] = autopatcher_params.root_dirs_by_root_type[type]
+
+			# for each patch source dir ...
+			for dir in dirs:
+				source: str = os.path.join(dir.abs_dir, config.source)
+				if not os.path.isdir(source):
+					continue
+
+				log.info(f"Will copy from '{source}' to {target} ...")
+
+				# get a list of dtso files in the source directory
+				dtsos: list[str] = [
+					os.path.join(source, f) for f in os.listdir(source)
+					if f.endswith(".dtso")
+					and os.path.isfile(os.path.join(source, f))
+				]
+
+				# for each dtso file ...
+				for dtso in dtsos:
+					log.info(f"Copying '{dtso}' to '{target}' ...")
+					name: str = os.path.basename(dtso)[:-5]  # overlay name without .dtso extension
+					target_dtso: str = os.path.join(target, name + ".dtso")
+
+					# emit a warning if dtso already exists in target
+					if os.path.exists(target_dtso):
+						desc.overwrites.append(target_dtso)
+						log.warning(f"Target file '{target_dtso}' already exists; will overwrite it; consider if it should be removed.")
+
+					# copy dtso
+					shutil.copyfile(dtso, target_dtso)
+					desc.files.append(target_dtso)
+
+					# patch Makefile to build dtbo
+					log.info(f"Patching '{makefile}' for '{name}.dtbo' ...")
+					with open(makefile, "a") as f:
+						# add as -y as we know this CONFIG_ARCH is enabled, else these patches wouldn't be processed in the first place
+						f.write(f"\ndtb-y += {name}.dtbo")
+
+					# add optional test against base device trees if given
+					bases: str = dtso[:-5] + ".bases"
+					if os.path.isfile(bases):
+						log.info(f"Reading '{bases}' for base device trees to test '{name}.dtbo' against ...")
+						with open(bases, "r") as f:
+							for base in f:
+								base = base.strip()
+								log.info(f"Patching '{makefile}' to test '{name}.dtbo' against '{base}.dtb' ...")
+								if not os.path.isfile(os.path.join(target, base + ".dts")):
+									raise ValueError(f"base device tree '{base}.dts' to test '{name}.dtbo' against is not a file")
+								with open(makefile, "a") as mf:
+									mf.write(
+										f"\n$(obj)/{base}+{name}.dtbotest: $(obj)/{base}.dtb $(obj)/{name}.dtbo"
+										f"\nalways-y += {base}+{name}.dtbotest"
+									)
+
+					# add overlay readme if given
+					readme: str = dtso[:-5] + ".readme"
+					if os.path.isfile(readme):
+						log.info(f"Copying '{readme}' to '{target}' ...")
+						target_readme: str = os.path.join(target, name + ".readme")
+						shutil.copyfile(readme, target_readme)
+						desc.files.append(target_readme)
+						# patch Makefile
+						log.info(f"Patching '{makefile}' for '{name}.readme' ...")
+						with open(makefile, "a") as f:
+							f.write(f"\ndtb-y += {name}.readme")
+
+					# add overlay fixup script if given
+					fixup: str = dtso[:-5] + ".scr-cmd"
+					if os.path.isfile(fixup):
+						log.info(f"Copying '{fixup}' to '{target}' ...")
+						target_fixup: str = os.path.join(target, name + ".scr-cmd")
+						shutil.copyfile(fixup, target_fixup)
+						desc.files.append(target_fixup)
+						# patch Makefile
+						log.info(f"Patching '{makefile}' for '{name}.scr' ...")
+						with open(makefile, "a") as f:
+							f.write(f"\ndtb-y += {name}.scr")
+
+		ret_desc_list.append(desc)
+
+	return ret_desc_list
diff --git a/lib/tools/common/patching_config.py b/lib/tools/common/patching_config.py
index e1be35e79775..e4ee910b6309 100644
--- a/lib/tools/common/patching_config.py
+++ b/lib/tools/common/patching_config.py
@@ -23,6 +23,15 @@ def __str__(self):
 		return f"PatchingAutoPatchMakefileDTConfig(config-var={self.config_var}, directory={self.directory}, incremental={self.incremental})"
 
 
+class PatchingAutoPatchOverlaysConfig:
+	def __init__(self, data: dict):
+		self.source: str = data.get("source", None)
+		self.target: str = data.get("target", None)
+
+	def __str__(self):
+		return f"PatchingAutoPatchOverlaysConfig(source={self.source}, target={self.target})"
+
+
 class PatchingDTSDirectoryConfig:
 	def __init__(self, data: dict):
 		self.source: str = data.get("source", None)
@@ -68,6 +77,12 @@ def __init__(self, yaml_config_file_paths: list[str]):
 		]
 		self.has_autopatch_makefile_dt_configs: bool = len(self.autopatch_makefile_dt_configs) > 0
 
+		# Overlays auto-patch config
+		self.auto_patch_overlays_configs: list[PatchingAutoPatchOverlaysConfig] = [
+			PatchingAutoPatchOverlaysConfig(data) for data in self.yaml_config.get("auto-patch-overlays", [])
+		]
+		self.has_auto_patch_overlays_configs: bool = len(self.auto_patch_overlays_configs) > 0
+  
 		# DTS directories to copy config
 		self.dts_directories: list[PatchingDTSDirectoryConfig] = [
 			PatchingDTSDirectoryConfig(data) for data in self.yaml_config.get("dts-directories", [])
diff --git a/lib/tools/patching.py b/lib/tools/patching.py
index d14c53f6987c..7f0a6b19a2b1 100755
--- a/lib/tools/patching.py
+++ b/lib/tools/patching.py
@@ -347,6 +347,10 @@
 	if pconfig.has_autopatch_makefile_dt_configs:
 		autopatcher_descriptions.extend(dt_makefile_patcher.auto_patch_all_dt_makefiles(autopatcher_params))
 
+	# Autopatch the overlays according to the config
+	if pconfig.has_auto_patch_overlays_configs:
+		autopatcher_descriptions.extend(dt_makefile_patcher.auto_patch_overlays(autopatcher_params))
+
 	if rewrite_patches_in_place:
 		# Now; we need to write the patches to files.
 		# loop over the patches, and group them by the parent; the parent is the PatchFileInDir object.
diff --git a/patch/kernel/archive/rockchip64-7.0/0000.patching_config.yaml b/patch/kernel/archive/rockchip64-7.0/0000.patching_config.yaml
index f1f7ca42c601..417e0d20284d 100644
--- a/patch/kernel/archive/rockchip64-7.0/0000.patching_config.yaml
+++ b/patch/kernel/archive/rockchip64-7.0/0000.patching_config.yaml
@@ -15,12 +15,6 @@ config: # This is file 'patch/kernel/archive/rockchip64-6.19/0000.patching_confi
   dts-directories:
     - { source: "dt", target: "arch/arm64/boot/dts/rockchip" }
 
-  # every file in these directories will be copied as-is to the build tree; later ones overwrite earlier ones
-  # This is meant as a way to have overlays, bare, in a directory, without having to null-patch them in.
-  # @TODO need a solution to auto-Makefile the overlays as well
-  overlay-directories:
-    - { source: "overlay", target: "arch/arm64/boot/dts/rockchip/overlay" }
-
   # the Makefile in each of these directories will be magically patched to include the dts files copied
   #  or patched-in; overlay subdir will be included "-y" if it exists.
   # No more Makefile patching needed, yay!
@@ -28,6 +22,9 @@ config: # This is file 'patch/kernel/archive/rockchip64-6.19/0000.patching_confi
   auto-patch-dt-makefile:
     - { directory: "arch/arm64/boot/dts/rockchip", config-var: "CONFIG_ARCH_ROCKCHIP", add-only: true }
 
+  auto-patch-overlays:
+    - { source: "overlay", target: "arch/arm64/boot/dts/rockchip" }
+
   # configuration for when applying patches to git / auto-rewriting patches (development cycle helpers)
   patches-to-git:
     do-not-commit-files:
diff --git a/patch/kernel/archive/rockchip64-7.0/general-add-overlay-compilation-support.patch b/patch/kernel/archive/rockchip64-7.0/general-add-overlay-compilation-support.patch
deleted file mode 100644
index 4191971fcda9..000000000000
--- a/patch/kernel/archive/rockchip64-7.0/general-add-overlay-compilation-support.patch
+++ /dev/null
@@ -1,66 +0,0 @@
-From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
-From: Paolo Sabatino <paolo.sabatino@gmail.com>
-Date: Wed, 2 Oct 2024 19:30:34 +0300
-Subject: compile .scr and install overlays in right path
-
----
- scripts/Makefile.dtbinst | 13 +++++++++-
- scripts/Makefile.dtbs    |  8 +++++-
- 2 files changed, 19 insertions(+), 2 deletions(-)
-
-diff --git a/scripts/Makefile.dtbinst b/scripts/Makefile.dtbinst
-index 111111111111..222222222222 100644
---- a/scripts/Makefile.dtbinst
-+++ b/scripts/Makefile.dtbinst
-@@ -33,7 +33,18 @@ endef
- 
- $(foreach d, $(sort $(dir $(dtbs))), $(eval $(call gen_install_rules,$(d))))
- 
--dtbs := $(notdir $(dtbs))
-+# Very convoluted way to flatten all the device tree
-+# directories, but keep the "/overlay/" directory
-+
-+# topmost directory (ie: from rockchip/overlay/rk322x-emmc.dtbo extracts rockchip)
-+topmost_dir = $(firstword $(subst /, ,$(dtbs)))
-+# collect dtbs entries which starts with "$topmost_dir/overlay/", then remove "$topmost_dir"
-+dtbs_overlays = $(subst $(topmost_dir)/,,$(filter $(topmost_dir)/overlay/%, $(dtbs)))
-+# collect the non-overlay dtbs
-+dtbs_regular = $(filter-out $(topmost_dir)/overlay/%, $(dtbs))
-+# compose the dtbs variable flattening all the non-overlays entries
-+# and appending the overlays entries
-+dtbs := $(notdir $(dtbs_regular)) $(dtbs_overlays)
- 
- endif # CONFIG_ARCH_WANT_FLAT_DTB_INSTALL
- 
-diff --git a/scripts/Makefile.dtbs b/scripts/Makefile.dtbs
-index 111111111111..222222222222 100644
---- a/scripts/Makefile.dtbs
-+++ b/scripts/Makefile.dtbs
-@@ -131,17 +131,23 @@ dtc-tmp = $(subst $(comma),_,$(dot-target).dts.tmp)
- quiet_cmd_dtc = DTC $(quiet_dtb_check_tag) $@
-       cmd_dtc = \
- 	$(HOSTCC) -E $(dtc_cpp_flags) -x assembler-with-cpp -o $(dtc-tmp) $< ; \
--	$(DTC) -o $@ -b 0 $(addprefix -i,$(dir $<) $(DTC_INCLUDE)) \
-+	$(DTC) -@ -o $@ -b 0 $(addprefix -i,$(dir $<) $(DTC_INCLUDE)) \
- 	       $(DTC_FLAGS) -d $(depfile).dtc.tmp $(dtc-tmp) ; \
- 	cat $(depfile).pre.tmp $(depfile).dtc.tmp > $(depfile) \
- 	$(cmd_dtb_check)
- 
-+quiet_cmd_scr = MKIMAGE $@
-+cmd_scr = mkimage -C none -A $(ARCH) -T script -d $< $@
-+
- $(obj)/%.dtb: $(obj)/%.dts $(DTC) $(DT_TMP_SCHEMA) FORCE
- 	$(call if_changed_dep,dtc)
- 
- $(obj)/%.dtbo: $(src)/%.dtso $(DTC) FORCE
- 	$(call if_changed_dep,dtc)
- 
-+$(obj)/%.scr: $(src)/%.scr-cmd FORCE
-+	$(call if_changed,scr)
-+
- # targets
- # ---------------------------------------------------------------------------
- 
--- 
-Armbian
-
diff --git a/patch/kernel/archive/rockchip64-7.0/general-rockchip-overlays.patch b/patch/kernel/archive/rockchip64-7.0/general-rockchip-overlays.patch
deleted file mode 100644
index 0353dadf9805..000000000000
--- a/patch/kernel/archive/rockchip64-7.0/general-rockchip-overlays.patch
+++ /dev/null
@@ -1,30 +0,0 @@
-From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
-From: Martin Ayotte <martinayotte@yahoo.ca>
-Date: Wed, 5 Dec 2018 15:00:44 -0500
-Subject: add overlays framework for rockchip (scripts/Makefile.build only)
-
-- rpardini: real overlays are now bare in "overlay" directory and are handled
-  directly by the patching scripts. No more null-patching of overlays.
-
-Signed-off-by: Werner <werner@armbian.com>
----
- scripts/Makefile.build | 3 +++
- 1 file changed, 3 insertions(+)
-
-diff --git a/scripts/Makefile.build b/scripts/Makefile.build
-index 111111111111..222222222222 100644
---- a/scripts/Makefile.build
-+++ b/scripts/Makefile.build
-@@ -107,6 +107,9 @@ always-y += $(hostprogs-always-y) $(hostprogs-always-m)
- userprogs += $(userprogs-always-y) $(userprogs-always-m)
- always-y += $(userprogs-always-y) $(userprogs-always-m)
- 
-+# Overlay targets
-+extra-y                                += $(dtbo-y) $(scr-y) $(dtbotxt-y)
-+
- # Add subdir path
- 
- ifneq ($(obj),.)
--- 
-Armbian
-
diff --git a/patch/kernel/archive/rockchip64-7.0/overlay/Makefile b/patch/kernel/archive/rockchip64-7.0/overlay/Makefile
deleted file mode 100644
index 15db6eebd9af..000000000000
--- a/patch/kernel/archive/rockchip64-7.0/overlay/Makefile
+++ /dev/null
@@ -1,128 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0
-dtbo-$(CONFIG_ARCH_ROCKCHIP) += \
-	hinlink-h88k-240x135-lcd.dtbo \
-	rk35xx-radxa-zero-3w-ext-ant.dtbo \
-	rk3308-uart1.dtbo rk3308-uart2.dtbo rk3308-uart3.dtbo \
-	rk3308-otg-host.dtbo \
-	rk3308-s0-ext-antenna.dtbo \
-	rk3308-b@1.3ghz.dtbo \
-	rk3308-bs.dtbo rk3308-bs@1.3ghz.dtbo \
-	rk3308-pcm5102a.dtbo \
-	rockchip-dusun-010r-rp3328b.dtbo \
-	rockchip-sakurapi-rk3308b-ws2812.dtbo \
-	rockchip-rockpi4cplus-usb-host.dtbo \
-	rockchip-rockpro64-lcd.dtbo \
-	rockchip-rk3318-box-cpu-hs.dtbo \
-	rockchip-rk3318-box-emmc-ddr.dtbo \
-	rockchip-rk3318-box-emmc-hs200.dtbo \
-	rockchip-rk3318-box-led-conf1.dtbo \
-	rockchip-rk3318-box-led-conf2.dtbo \
-	rockchip-rk3318-box-led-conf3.dtbo \
-	rockchip-rk3318-box-led-conf4.dtbo \
-	rockchip-rk3318-box-led-conf5.dtbo \
-	rockchip-rk3318-box-led-conf6.dtbo \
-	rockchip-rk3318-box-led-conf7.dtbo \
-	rockchip-rk3318-box-wlan-ap6330.dtbo \
-	rockchip-rk3318-box-wlan-ap6334.dtbo \
-	rockchip-rk3318-box-wlan-ext.dtbo \
-	rockchip-rk3328-i2c0.dtbo \
-	rockchip-rk3328-i2s1-pcm5102.dtbo \
-	rockchip-rk3328-mksklipad50-enable-rtc-end1.dtbo \
-	rockchip-rk3328-mksklipad50-enable-v4l2.dtbo \
-	rockchip-rk3328-mkspi-disable-lcd-spi.dtbo \
-	rockchip-rk3328-opp-1.4ghz.dtbo \
-	rockchip-rk3328-opp-1.5ghz.dtbo \
-	rockchip-rk3328-spi-spidev.dtbo \
-	rockchip-rk3328-uart1.dtbo \
-	rockchip-rk3399-dwc3-0-host.dtbo \
-	rockchip-rk3399-i2c7.dtbo \
-	rockchip-rk3399-i2c8.dtbo \
-	rockchip-rk3399-helios64-cpu-stability.dtbo \
-	rockchip-rk3399-opp-2ghz.dtbo \
-	rockchip-rk3399-pcie-gen2.dtbo \
-	rockchip-rk3399-spi-jedec-nor.dtbo \
-	rockchip-rk3399-spi-spidev.dtbo \
-	rockchip-rk3399-uart4.dtbo \
-	rockchip-rk3399-w1-gpio.dtbo \
-	rockchip-rk3566-sata2.dtbo \
-	rockchip-rk3566-i2c2-m1.dtbo \
-	rockchip-rk3566-i2c3-m0.dtbo \
-	rockchip-rk3566-i2c4-m0.dtbo \
-	rockchip-rk3566-pwm7.dtbo \
-	rockchip-rk3566-pwm11-m1.dtbo \
-	rockchip-rk3566-pwm15-m1.dtbo \
-	rockchip-rk3566-spi3-m0-cs0-spidev.dtbo \
-	rockchip-rk3566-uart3-m0.dtbo \
-	rockchip-rk3566-uart7-m2.dtbo \
-	rockchip-rk3566-uart9-m2.dtbo \
-	rockchip-rk3568-nanopi-r5c-leds.dtbo \
-	rockchip-rk3568-nanopi-r5s-leds.dtbo \
-	rockchip-rk3568-hk-i2c0.dtbo \
-	rockchip-rk3568-hk-i2c1.dtbo \
-	rockchip-rk3568-hk-pwm1.dtbo \
-	rockchip-rk3568-hk-pwm2.dtbo \
-	rockchip-rk3568-hk-pwm9.dtbo \
-	rockchip-rk3568-hk-spi-spidev.dtbo \
-	rockchip-rk3568-hk-uart0.dtbo \
-	rockchip-rk3568-hk-uart0-rts_cts.dtbo \
-	rockchip-rk3568-hk-uart1.dtbo \
-	rockchip-rk3568-rock-3a-disable-uart2.dtbo \
-	rockchip-rk3588-fanctrl.dtbo \
-	rockchip-rk3588-rock-5-itx-pwm-fan.dtbo \
-	rockchip-rk3588-sata0.dtbo \
-	rockchip-rk3588-sata1.dtbo \
-	rockchip-rk3588-sata2.dtbo \
-	rockchip-rk3588-hdmirx.dtbo \
-	rockchip-rk3588-i2c8-m2.dtbo \
-	rockchip-rk3588-pwm0-m0.dtbo \
-	rockchip-rk3588-pwm0-m1.dtbo \
-	rockchip-rk3588-pwm0-m2.dtbo \
-	rockchip-rk3588-pwm1-m0.dtbo \
-	rockchip-rk3588-pwm1-m1.dtbo \
-	rockchip-rk3588-pwm1-m2.dtbo \
-	rockchip-rk3588-pwm2-m1.dtbo \
-	rockchip-rk3588-pwm3-m0.dtbo \
-	rockchip-rk3588-pwm3-m1.dtbo \
-	rockchip-rk3588-pwm3-m2.dtbo \
-	rockchip-rk3588-pwm3-m3.dtbo \
-	rockchip-rk3588-pwm5-m2.dtbo \
-	rockchip-rk3588-pwm6-m0.dtbo \
-	rockchip-rk3588-pwm6-m2.dtbo \
-	rockchip-rk3588-pwm7-m0.dtbo \
-	rockchip-rk3588-pwm7-m3.dtbo \
-	rockchip-rk3588-pwm8-m0.dtbo \
-	rockchip-rk3588-pwm10-m0.dtbo \
-	rockchip-rk3588-pwm11-m0.dtbo \
-	rockchip-rk3588-pwm11-m1.dtbo \
-	rockchip-rk3588-pwm12-m0.dtbo \
-	rockchip-rk3588-pwm13-m0.dtbo \
-	rockchip-rk3588-pwm13-m2.dtbo \
-	rockchip-rk3588-pwm14-m0.dtbo \
-	rockchip-rk3588-pwm14-m1.dtbo \
-	rockchip-rk3588-pwm14-m2.dtbo \
-	rockchip-rk3588-pwm15-m0.dtbo \
-	rockchip-rk3588-pwm15-m1.dtbo \
-	rockchip-rk3588-pwm15-m2.dtbo \
-	rockchip-rk3588-pwm15-m3.dtbo \
-	rockchip-rk3588-uart1-m1.dtbo \
-	rockchip-rk3588-uart3-m1.dtbo \
-	rockchip-rk3588-uart4-m2.dtbo \
-	rockchip-rk3588-uart6-m1.dtbo \
-	rockchip-rk3588-uart7-m2.dtbo \
-	rockchip-rk3588-uart8-m1.dtbo \
-	rockchip-rk3588-rkvenc-overlay.dtbo \
-	rockchip-rk3588-nanopi-m6-spi-nor-flash.dtbo \
-	rockchip-rk3588-nanopi-m6-display-dsi1-yx35.dtbo \
-	rockchip-rk3588-nanopc-t6-mmc-frequency.dtbo \
-	rockchip-rk3588-odroidm2-weather-board-zero.dtbo \
-	rockchip-rk3588-odroidm2-display-vu8s.dtbo
-
-scr-$(CONFIG_ARCH_ROCKCHIP) += \
-       rockchip-fixup.scr
-
-dtbotxt-$(CONFIG_ARCH_ROCKCHIP) += \
-       README.rockchip-overlays
-
-dtb-y += $(dtbo-y) $(scr-y) $(dtbotxt-y)
-
-clean-files    := *.dtbo *.scr
diff --git a/patch/kernel/archive/rockchip64-7.0/overlay/README.rockchip-overlays b/patch/kernel/archive/rockchip64-7.0/overlay/README.rockchip-overlays
deleted file mode 100644
index 2764920057b8..000000000000
--- a/patch/kernel/archive/rockchip64-7.0/overlay/README.rockchip-overlays
+++ /dev/null
@@ -1,311 +0,0 @@
-This document describes overlays provided in the kernel packages
-For generic Armbian overlays documentation please see
-https://docs.armbian.com/User-Guide_Armbian_overlays/
-
-### Platform:
-
-rockchip (Rockchip)
-
-### Provided overlays:
-
-- i2c7, i2c8, pcie-gen2, spi-spidev, uart4, w1-gpio
-- rk3399-helios64-cpu-stability (Helios64 only)
-
-for RK3308:
-- b@1,3ghz, bs, bs-1.3ghz, otg-host, uart1, uart2, uart3, s0-ext-antenna
-
-### Overlay details:
-
-### mksklipad-enable-rtc-end1
-
-Enables end1 ethernet adapter, which also makes rtc work better.
-There is no physical port for end1, so this overlay is merely for
-testing the rtc.
-The rtc still tends to stall sometimes. In the original makerbase
-image, the rtc was completely unusable though.
-
-### mksklipad-enable-v4l2
-
-Enables the video4linux devices /dev/video[012] /dev/media[01]
-Not sure, if they are of any use.
-
-### mkspi-disable-lcd-spi
-
-DTBO to disable spi_for_{lcd,touch} when enabling uart1
-
-### i2c7
-
-Activates TWI/I2C bus 7
-
-I2C7 pins (SCL, SDA): GPIO2-B0, GPIO2-A7 GPIO1-C5, GPIO1-C4
-
-### i2c8
-
-Activates TWI/I2C bus 8
-
-I2C8 pins (SCL, SDA): GPIO1-C5, GPIO1-C4
-
-### pcie-gen2
-
-Enables PCIe Gen2 link speed on RK3399.
-WARNING! Not officially supported by Rockchip!!!
-
-### rk3328-i2c0
-
-Activates TWI/I2C bus 0
-
-I2C0 (SCL, SDA): GPIO2-D0, GPIO2-D1
-
-### rk3328-uart1
-
-Activates UART1
-
-UART1 pins (RX, TX): GPIO3_A6, GPIO3_A4
-
-### rk3328-opp-1.4ghz
-
-Adds the 1.4GHz opp for overclocking
-WARNING! Not officially supported by Rockchip!!!
-
-### rk3328-opp-1.5ghz
-
-Adds the 1.5GHz opp for overclocking
-WARNING! Not officially supported by Rockchip!!!
-
-### rk3399-helios64-cpu-stability
-
-Opt-in workaround for reported instability of the Helios64 NAS (Kobol)
-under sustained CPU load. Raises the A72 big-cluster vcore by +75 mV on
-opp00..opp06 (408 MHz .. 1608 MHz): 0.900 / 0.900 / 0.900 / 0.950 /
-1.025 / 1.100 / 1.175 V respectively (mainline rk3399-op1-opp.dtsi:
-0.825 / 0.825 / 0.825 / 0.875 / 0.950 / 1.025 / 1.100 V). The 1.8 GHz
-top step is left at the mainline 1.20 V. Not enabled by default.
-
-Origin: empirical workaround from the Armbian forum (topics 30074 and
-58597, by prahal and ebin-dev); no upstream patch exists. Apply only if
-you observe random crashes or hangs on a Helios64.
-
-### rk3399-opp-2ghz
-
-Adds the 2GHz big and 1.5 GHz LITTLE opps for overclocking
-WARNING! Not officially supported by Rockchip!!!
-
-### rockpi4cplus-usb-host
-
-Switches the top USB 3.0 port to host mode.
-WARNING! Not officially supported by Rockchip!!!
-
-### spi-jedec-nor
-
-Activates MTD support for JEDEC compatible SPI NOR flash chips on SPI bus
-supported by the kernel SPI NOR driver
-
-SPI 0 pins (MOSI, MISO, SCK, CS): GPIO3_A5, GPIO3_A4, GPIO3_A6, GPIO3_A7
-SPI 1 pins (MOSI, MISO, SCK, CS): GPIO1_A7, GPIO1_B0, GPIO1_B1, GPIO1_B2
-SPI 2 pins (MOSI, MISO, SCK, CS): GPIO1_C0, GPIO1_B7, GPIO1_C1, GPIO1_C2
-SPI 3 pins (MOSI, MISO, SCK, CS): GPIO2_B2, GPIO2_B1, GPIO2_B3, GPIO2_B4
-
-Parameters:
-
-param_spinor_spi_bus (int)
-	SPI bus to activate SPI NOR flash support on
-	Required
-	Supported values: 0, 1, 2
-
-param_spinor_max_freq (int)
-	Maximum SPI frequency
-	Optional
-	Default: 1000000
-	Range: 3000 - 100000000
-
-### spi-spidev
-
-Activates SPIdev device node (/dev/spidevX.Y) for userspace SPI access,
-where X is the bus number and Y is the CS number
-
-SPI 0 pins (MOSI, MISO, SCK, CS): GPIO3_A5, GPIO3_A4, GPIO3_A6, GPIO3_A7
-SPI 1 pins (MOSI, MISO, SCK, CS): GPIO1_A7, GPIO1_B0, GPIO1_B1, GPIO1_B2
-SPI 2 pins (MOSI, MISO, SCK, CS): GPIO1_C0, GPIO1_B7, GPIO1_C1, GPIO1_C2
-SPI 3 pins (MOSI, MISO, SCK, CS): GPIO2_B2, GPIO2_B1, GPIO2_B3, GPIO2_B4
-
-Parameters:
-
-param_spidev_spi_bus (int)
-	SPI bus to activate SPIdev support on
-	Required
-	Supported values: 0, 1
-
-param_spidev_spi_cs (int)
-	SPI chip select number
-	Optional
-	Default: 0
-	Supported values: 0, 1
-	Using chip select 1 requires using "spi-add-cs1" overlay
-
-param_spidev_max_freq (int)
-	Maximum SPIdev frequency
-	Optional
-	Default: 1000000
-	Range: 3000 - 100000000
-
-### uart4
-
-Activates UART4
-
-UART4 pins (RX, TX): GPIO1_A7, GPIO1_B0
-
-Notice: UART4 cannot be activated together with SPI1 - they share the sam pins.
-Enabling this overlay disables SPI1.
-
-### dwc3-0-host
-
-Forces port 0 of the DesignWare xHCI controller to host mode.
-
-This can be used on plaforms such as NanoPC-T4, where devices plugged into the
-USB-C port may not be detected otherwise.
-
-### w1-gpio
-
-Activates 1-Wire GPIO master
-Requires an external pull-up resistor on the data pin
-or enabling the internal pull-up
-
-### rk3318-box-led-conf1
-
-Generic default led/gpio configuration for rk3318 tv box boards.
-Does not enable any specific or peculiar hardware.
-
-### rk3318-box-led-conf2
-
-Activates led/gpio configuration for rk3318 tv box boards withs signature
-X88_PRO_B and clones
-
-### rk3318-box-led-conf3
-
-This device tree overlay is suitable for MXQ-RK3328-D4_A board which
-has an integrated PMIC (RK805). The dtbo is very important to achieve
-1.3 Ghz speed for CPU and stable voltages for other parts of the
-system. Also enables gpio leds and keys.
-
-### rk3318-box-led-conf4
-
-Generic rk3318-box configuration but with sdio chip on sdmmc-ext connector
-
-### rk3318-box-led-conf5
-
-Configuration for rk3318 boards with with signature YX_RK3328 and clones.
-
-### rk3318-box-led-conf6
-
-Configuration for rk3318 boards with with signature T98_RK3318 and clones.
-Seen in commercial tv boxes like Hongtop H50.
-
-### rk3318-box-led-conf7
-
-Configuration for rk3318 boards with with signature T9_RK3318 and clones.
-Seen in commercial tv boxes like T9 Sunwell 3318.
-
-### rk3318-box-emmc-ddr
-
-Activates eMMC DDR capability for rk3318 tv box boards. Probably all the eMMC chips
-nowadays support DDR mode, but its reliability heavily depends upon the quality
-of board wiring
-
-### rk3318-box-emmc-hs200
-
-Activates eMMC HS200 capability for rk3318 tv box boards.
-It should in autodetect mode, but some board have faulty or cheap circuitry that
-enable the mode but then it doesn't work correctly.
-
-### rk3318-box-wlan-ap6334
-
-Set up additional device tree bits to properly support ap6334 (broadcom BCM4334)
-wifi chip and clones
-
-### rk3318-box-wlan-ext
-
-Use sdmmc_ext device for sdio devices, enabled wifi on some boards (notably
-X88 Pro) which have wifi chip attached to sdmmc_ext controller.
-
-### rk3318-box-wlan-ap6330
-
-Set up additional device tree bits properly support ap6330 (broaccom BCM4330)
-wifi + bt chip and clones.
-
-### rk3318-box-cpu-hs
-
-Enable additional cpu "high-speed" bins up to 1.3ghz
-
-
-**********************************
-RK3308 OTG USB mode  (14 Sep 2025):
-
-Most Armbian RK3308 kernels configured the OTG port to operate in peripheral mode by default
-To configure the OTG USB port as an additional host port:
-###  rk3308-otg-host
-
-
-**********************************
-RK3308 enable uart  (31 Oct 2025):
-
-###  rk3308-uart1
-###  rk3308-uart2
-###  rk3308-uart3
-
-
-**********************************
-Details for Rock Pi-S overlays  (14 Sep 2025):
-
-Older V1.1 and V1.2 boards use the B variant of the RK3308.
-Some V1.3 boards manufactured after October 2023 also use the B variant.
-To overclock the RK3308B, apply:
-###  rk3308-b@1.3ghz
-
-V1.3 boards produced during 2022 and most of 2023 use the lower voltage
-B-S variant of the RK3308.
-Per Radxa, these chips will be marked RK3308BS instead of RK3308B
-All boards utilizing the RK3308B-S part should apply the:
-###  rk3308-bs
-overlay to operate at the appropriate (lower) the core voltage.
-This overlay also enables operation at 1.1Ghz.
-
-Optionally, boards utilizing the RK3308B-S parts may add the
-###  rk3308-bs@1.3ghz
-to overclock the B-S CPU to 1.3Ghz.
-Apply the rk3308-bs@1.3Ghz overlay  *after applying*  rk3308-bs
-
-Applying the *-bs overlays to the B variant of the SOC may result in
-unstable operation due to undervolting.
-Applying the rk3308-b@1.3ghz to a BS variant chip consumes more power and
-has the potential to damage the SOC due to overvolting.
-
-
-**********************************
-Details for Rock S0 overlays  (10 Apr 2024):
-
-By default, the internal WiFi selects its internal chip antenna.
-This antenna is so noisy as to be nearly unusable.
-The external antenna, fortunately, works quite well.
-Connect an external WiFi antenna and select it with:
-###  rk3308-s0-ext-antenna
-
-All Rock S0 boards use the RK3308B chip.
-The:
-###  rk3308-b@1.3ghz
-overlay enables (overclocked) operation at 1.3ghz
-1.3Ghz operation appears stable on the two boards I've tested.
-
-The legacy kernel is not supported on the Rock S0
-
-Enable pcm5102a analog codec connected to i2s0 bus:
-### rk3308-pcm5102a
-
-**********************************
-Details for NanoPC-T6 overlays  (11 Oct 2025):
-
-### rockchip-rk3588-nanopc-t6-mmc-frequency
-
-Some NanoPC-T6 boards use a A3A444 eMMC chip. Under heavy I/O load when running
-in HS400 mode, this will often result in I/O errors.
-Reducing the eMMC frequency from the default 200000000 Hz to 150000000 Hz improves
-stability and eliminates the I/O errors.
diff --git a/patch/kernel/archive/rockchip64-7.0/overlay/rk3308-b@1.3ghz.readme b/patch/kernel/archive/rockchip64-7.0/overlay/rk3308-b@1.3ghz.readme
new file mode 100644
index 000000000000..e3fc220fbdc2
--- /dev/null
+++ b/patch/kernel/archive/rockchip64-7.0/overlay/rk3308-b@1.3ghz.readme
@@ -0,0 +1,16 @@
+### rk3308-b@1.3ghz (14 Sep 2025)
+
+Older ROCK Pi S V1.1 and V1.2 and all ROCK S0 boards use the B variant of the RK3308.
+Some V1.3 boards manufactured after October 2023 also use the B variant.
+
+ROCK Pi S V1.3 boards produced during 2022 and most of 2023 use
+the lower voltage BS variant of the RK3308.
+Per Radxa, these chips will be marked RK3308BS instead of RK3308B
+All boards utilizing the RK3308BS part should apply the rk3388-bs
+overlay to operate at the appropriate (lower) the core voltage,
+which also enables operation at 1.1Ghz.
+
+This rk3308-b@1.3ghz overlay overclocks the B variant CPU to 1.3Ghz.
+
+Applying this overlay to the BS variant the SoC consumes more power and
+has the potential to damage the SoC due to overvolting.
diff --git a/patch/kernel/archive/rockchip64-7.0/overlay/rk3308-bs.dtso b/patch/kernel/archive/rockchip64-7.0/overlay/rk3308-bs.dtso
index 978f67947380..e61d94f1bd69 100644
--- a/patch/kernel/archive/rockchip64-7.0/overlay/rk3308-bs.dtso
+++ b/patch/kernel/archive/rockchip64-7.0/overlay/rk3308-bs.dtso
@@ -1,6 +1,3 @@
-//Adjustments for Rockchip RK3308-BS suffix SOC
-//https://dl.radxa.com/rockpis/docs/sw/RK3308B-S&RK3308H-S_Software_Compatibility_Introduction_V1.0.0_20211016.pdf
-
 /dts-v1/;
 /plugin/;
 
diff --git a/patch/kernel/archive/rockchip64-7.0/overlay/rk3308-bs.readme b/patch/kernel/archive/rockchip64-7.0/overlay/rk3308-bs.readme
new file mode 100644
index 000000000000..e87ce487d128
--- /dev/null
+++ b/patch/kernel/archive/rockchip64-7.0/overlay/rk3308-bs.readme
@@ -0,0 +1,16 @@
+### rk3308-bs (14 Sep 2025)
+
+Older ROCK Pi S V1.1 and V1.2 and all ROCK S0 boards use the B variant of the RK3308.
+Some V1.3 boards manufactured after October 2023 also use the B variant.
+
+ROCK Pi S V1.3 boards produced during 2022 and most of 2023 use
+the lower voltage BS variant of the RK3308.
+Per Radxa, these chips will be marked RK3308BS instead of RK3308B
+All boards utilizing the RK3308BS part should apply the rk3388-bs
+overlay to operate at the appropriate (lower) the core voltage,
+which also enables operation at 1.1Ghz.
+
+Applying this overlay to the B variant of the SoC may result in
+unstable operation due to undervolting.
+
+https://dl.radxa.com/rockpis/docs/sw/RK3308B-S&RK3308H-S_Software_Compatibility_Introduction_V1.0.0_20211016.pdf
diff --git a/patch/kernel/archive/rockchip64-7.0/overlay/rk3308-bs@1.3ghz.dtso b/patch/kernel/archive/rockchip64-7.0/overlay/rk3308-bs@1.3ghz.dtso
index 3fae0dd2363f..6d4f69e1c3e8 100644
--- a/patch/kernel/archive/rockchip64-7.0/overlay/rk3308-bs@1.3ghz.dtso
+++ b/patch/kernel/archive/rockchip64-7.0/overlay/rk3308-bs@1.3ghz.dtso
@@ -1,6 +1,3 @@
-//Overclock the Rockchip RK3308-BS suffix SOC to 1.3 Ghz
-//  assumes rk3308bs-rock-pi-s.dts overlay has already been added
-
 /dts-v1/;
 /plugin/;
 
@@ -8,6 +5,32 @@
 	fragment@0 {
 		target = <&cpu0_opp_table>;
 		__overlay__ {
+			opp-408000000 {
+				opp-hz = /bits/ 64 <408000000>;
+				opp-microvolt = <850000 850000 1200000>;
+				clock-latency-ns = <40000>;
+				opp-suspend;
+			};
+			opp-600000000 {
+				opp-hz = /bits/ 64 <600000000>;
+				opp-microvolt = <900000 900000 1200000>;
+				clock-latency-ns = <40000>;
+			};
+			opp-816000000 {
+				opp-hz = /bits/ 64 <816000000>;
+				opp-microvolt = <1000000 1000000 1200000>;
+				clock-latency-ns = <40000>;
+			};
+			opp-1008000000 {
+				opp-hz = /bits/ 64 <1008000000>;
+				opp-microvolt = <1125000 1125000 1200000>;
+				clock-latency-ns = <40000>;
+			};
+			opp-1104000000 {
+				opp-hz = /bits/ 64 <1104000000>;
+				opp-microvolt = <1200000 1200000 1200000>;
+				clock-latency-ns = <40000>;
+			};
 			//the following are unsupported, overclocked operating points
 			opp-1200000000 {
 				opp-hz = /bits/ 64 <1200000000>;
diff --git a/patch/kernel/archive/rockchip64-7.0/overlay/rk3308-bs@1.3ghz.readme b/patch/kernel/archive/rockchip64-7.0/overlay/rk3308-bs@1.3ghz.readme
new file mode 100644
index 000000000000..5a5f68a2f01f
--- /dev/null
+++ b/patch/kernel/archive/rockchip64-7.0/overlay/rk3308-bs@1.3ghz.readme
@@ -0,0 +1,18 @@
+### rk3308-bs@1.3ghz (14 Sep 2025)
+
+Older ROCK Pi S V1.1 and V1.2 and all ROCK S0 boards use the B variant of the RK3308.
+Some V1.3 boards manufactured after October 2023 also use the B variant.
+
+ROCK Pi S V1.3 boards produced during 2022 and most of 2023 use
+the lower voltage BS variant of the RK3308.
+Per Radxa, these chips will be marked RK3308BS instead of RK3308B
+All boards utilizing the RK3308BS part should apply the rk3388-bs
+overlay to operate at the appropriate (lower) the core voltage,
+which also enables operation at 1.1Ghz.
+
+This rk3308-bs@1.3ghz overlay additionally overclocks the B-S CPU to 1.3Ghz.
+
+Applying this overlay to the B variant of the SoC may result in
+unstable operation due to undervolting.
+
+https://dl.radxa.com/rockpis/docs/sw/RK3308B-S&RK3308H-S_Software_Compatibility_Introduction_V1.0.0_20211016.pdf
diff --git a/patch/kernel/archive/rockchip64-7.0/overlay/rk3308-otg-host.readme b/patch/kernel/archive/rockchip64-7.0/overlay/rk3308-otg-host.readme
new file mode 100644
index 000000000000..2d99a25b03e3
--- /dev/null
+++ b/patch/kernel/archive/rockchip64-7.0/overlay/rk3308-otg-host.readme
@@ -0,0 +1,6 @@
+###  rk3308-otg-host
+
+RK3308 OTG USB mode  (14 Sep 2025):
+
+Most Armbian RK3308 kernels configured the OTG port to operate in peripheral mode by default
+Use this overlay to configure the OTG USB port as an additional host port.
diff --git a/patch/kernel/archive/rockchip64-7.0/overlay/rk3308-pcm5102a.dtso b/patch/kernel/archive/rockchip64-7.0/overlay/rk3308-pcm5102a.dtso
index 100abadbcef2..24b382d0f558 100644
--- a/patch/kernel/archive/rockchip64-7.0/overlay/rk3308-pcm5102a.dtso
+++ b/patch/kernel/archive/rockchip64-7.0/overlay/rk3308-pcm5102a.dtso
@@ -1,5 +1,3 @@
-// Enable PCM510x
-
 #include <dt-bindings/clock/rk3308-cru.h>
 
 /dts-v1/;
diff --git a/patch/kernel/archive/rockchip64-7.0/overlay/rk3308-pcm5102a.readme b/patch/kernel/archive/rockchip64-7.0/overlay/rk3308-pcm5102a.readme
new file mode 100644
index 000000000000..6aa30f93347e
--- /dev/null
+++ b/patch/kernel/archive/rockchip64-7.0/overlay/rk3308-pcm5102a.readme
@@ -0,0 +1,3 @@
+### rk3308-pcm5102a (10 Apr 2024)
+
+Enables pcm5102a analog codec connected to i2s0 bus
\ No newline at end of file
diff --git a/patch/kernel/archive/rockchip64-7.0/overlay/rk3308-s0-ext-antenna.readme b/patch/kernel/archive/rockchip64-7.0/overlay/rk3308-s0-ext-antenna.readme
new file mode 100644
index 000000000000..ade5300287b5
--- /dev/null
+++ b/patch/kernel/archive/rockchip64-7.0/overlay/rk3308-s0-ext-antenna.readme
@@ -0,0 +1,8 @@
+###  rk3308-s0-ext-antenna (10 Apr 2024)
+
+By default, the internal WiFi of the ROCK S0 selects
+its internal chip antenna.
+This antenna is so noisy as to be nearly unusable.
+The external antenna, fortunately, works quite well.
+Connect an external WiFi antenna and select it with
+this overlay.
diff --git a/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-fixup.scr-cmd b/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-fixup.scr-cmd
deleted file mode 100644
index c6cd5d8abde1..000000000000
--- a/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-fixup.scr-cmd
+++ /dev/null
@@ -1,65 +0,0 @@
-# overlays fixup script
-# implements (or rather substitutes) overlay arguments functionality
-# using u-boot scripting, environment variables and "fdt" command
-
-setenv decompose_pin 'setexpr tmp_pinctrl sub "GPIO(0|1|2|3|4)_\\S\\d+" "\\1";
-setexpr tmp_bank sub "GPIO\\d_(\\S)\\d+" "\\1";
-test "${tmp_bank}" = "A" && setenv tmp_bank 0;
-test "${tmp_bank}" = "B" && setenv tmp_bank 1;
-test "${tmp_bank}" = "C" && setenv tmp_bank 2;
-test "${tmp_bank}" = "D" && setenv tmp_bank 3;
-setexpr tmp_pin sub "GPIO\\d_\\S(\\d+)" "\\1";
-setexpr tmp_bank ${tmp_bank} * 8;
-setexpr tmp_pin ${tmp_bank} + ${tmp_pin}'
-
-if test -n "${param_spidev_max_freq}"; then
-    fdt set /spi@fe610000/spidev spi-max-frequency "<${param_spidev_max_freq}>"
-fi
-
-if test -n "${param_spinor_spi_bus}"; then
-	test "${param_spinor_spi_bus}" = "0" && setenv tmp_spi_path "spi@ff1c0000"
-	test "${param_spinor_spi_bus}" = "1" && setenv tmp_spi_path "spi@ff1d0000"
-	test "${param_spinor_spi_bus}" = "2" && setenv tmp_spi_path "spi@ff1e0000"
-	test "${param_spinor_spi_bus}" = "3" && setenv tmp_spi_path "spi@ff1f0000"
-	fdt set /${tmp_spi_path} status "okay"
-	fdt set /${tmp_spi_path}/spiflash@0 status "okay"
-	if test -n "${param_spinor_max_freq}"; then
-		fdt set /${tmp_spi_path}/spiflash@0 spi-max-frequency "<${param_spinor_max_freq}>"
-	fi
-	if test "${param_spinor_spi_cs}" = "1"; then
-		fdt set /${tmp_spi_path}/spiflash@0 reg "<1>"
-	fi
-	env delete tmp_spi_path
-fi
-
-if test -n "${param_spidev_spi_bus}"; then
-	test "${param_spidev_spi_bus}" = "0" && setenv tmp_spi_path "spi@ff1c0000"
-	test "${param_spidev_spi_bus}" = "1" && setenv tmp_spi_path "spi@ff1d0000"
-	test "${param_spidev_spi_bus}" = "2" && setenv tmp_spi_path "spi@ff1e0000"
-	test "${param_spidev_spi_bus}" = "3" && setenv tmp_spi_path "spi@ff1f0000"
-	fdt set /${tmp_spi_path} status "okay"
-	fdt set /${tmp_spi_path}/spidev status "okay"
-	if test -n "${param_spidev_max_freq}"; then
-		fdt set /${tmp_spi_path}/spidev spi-max-frequency "<${param_spidev_max_freq}>"
-	fi
-	if test "${param_spidev_spi_cs}" = "1"; then
-		fdt set /${tmp_spi_path}/spidev reg "<1>";
-	fi
-fi
-
-if test -n "${param_w1_pin}"; then
-	setenv tmp_pinctrl "${param_w1_pin}"
-	setenv tmp_bank "${param_w1_pin}"
-	setenv tmp_pin "${param_w1_pin}"
-	run decompose_pin
-	#echo "${param_w1_pin} ---> pinctrl = ${tmp_pinctrl}"
-	#echo "${param_w1_pin} ---> bank = ${tmp_bank}"
-	#echo "${param_w1_pin} ---> pin = ${tmp_pin}"
-	fdt get value tmp_pinctrl /__symbols__	gpio${tmp_pinctrl}
-	#echo "${param_w1_pin} ---> tmp_pinctrl = ${tmp_pinctrl}"
-	fdt get value tmp_phandle ${tmp_pinctrl} phandle
-	#echo "${param_w1_pin} ---> tmp_phandle = ${tmp_phandle}"
-	fdt set /onewire@0 gpios "<${tmp_phandle} 0x000000${tmp_pin} 0 0>"
-	env delete tmp_pinctrl tmp_bank tmp_pin tmp_phandle
-fi
-
diff --git a/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3318-box-cpu-hs.readme b/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3318-box-cpu-hs.readme
new file mode 100644
index 000000000000..7e938346db15
--- /dev/null
+++ b/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3318-box-cpu-hs.readme
@@ -0,0 +1,3 @@
+### rk3318-box-cpu-hs
+
+Enable additional cpu "high-speed" bins up to 1.3ghz
diff --git a/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3318-box-emmc-ddr.readme b/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3318-box-emmc-ddr.readme
new file mode 100644
index 000000000000..05b594ca2fe9
--- /dev/null
+++ b/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3318-box-emmc-ddr.readme
@@ -0,0 +1,5 @@
+### rk3318-box-emmc-ddr
+
+Activates eMMC DDR capability for rk3318 tv box boards. Probably all the eMMC chips
+nowadays support DDR mode, but its reliability heavily depends upon the quality
+of board wiring
diff --git a/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3318-box-emmc-hs200.readme b/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3318-box-emmc-hs200.readme
new file mode 100644
index 000000000000..c1730090740f
--- /dev/null
+++ b/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3318-box-emmc-hs200.readme
@@ -0,0 +1,5 @@
+### rk3318-box-emmc-hs200
+
+Activates eMMC HS200 capability for rk3318 tv box boards.
+It should in autodetect mode, but some board have faulty or cheap circuitry that
+enable the mode but then it doesn't work correctly.
diff --git a/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3318-box-led-conf1.readme b/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3318-box-led-conf1.readme
new file mode 100644
index 000000000000..b0f8ef89de53
--- /dev/null
+++ b/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3318-box-led-conf1.readme
@@ -0,0 +1,4 @@
+### rk3318-box-led-conf1
+
+Generic default led/gpio configuration for rk3318 tv box boards.
+Does not enable any specific or peculiar hardware.
diff --git a/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3318-box-led-conf2.readme b/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3318-box-led-conf2.readme
new file mode 100644
index 000000000000..d4b823bb9a2a
--- /dev/null
+++ b/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3318-box-led-conf2.readme
@@ -0,0 +1,4 @@
+### rk3318-box-led-conf2
+
+Activates led/gpio configuration for rk3318 tv box boards with signature
+X88_PRO_B and clones
diff --git a/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3318-box-led-conf3.readme b/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3318-box-led-conf3.readme
new file mode 100644
index 000000000000..0472be17067b
--- /dev/null
+++ b/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3318-box-led-conf3.readme
@@ -0,0 +1,6 @@
+### rk3318-box-led-conf3
+
+This device tree overlay is suitable for MXQ-RK3328-D4_A board which
+has an integrated PMIC (RK805). The dtbo is very important to achieve
+1.3 Ghz speed for CPU and stable voltages for other parts of the
+system. Also enables gpio leds and keys.
diff --git a/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3318-box-led-conf4.readme b/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3318-box-led-conf4.readme
new file mode 100644
index 000000000000..a995c4966cc0
--- /dev/null
+++ b/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3318-box-led-conf4.readme
@@ -0,0 +1,3 @@
+### rk3318-box-led-conf4
+
+Generic rk3318-box configuration but with sdio chip on sdmmc-ext connector
diff --git a/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3318-box-led-conf5.readme b/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3318-box-led-conf5.readme
new file mode 100644
index 000000000000..d93bfe3556ea
--- /dev/null
+++ b/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3318-box-led-conf5.readme
@@ -0,0 +1,3 @@
+### rk3318-box-led-conf5
+
+Configuration for rk3318 boards with with signature YX_RK3328 and clones.
diff --git a/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3318-box-led-conf6.readme b/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3318-box-led-conf6.readme
new file mode 100644
index 000000000000..c346128ce5a7
--- /dev/null
+++ b/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3318-box-led-conf6.readme
@@ -0,0 +1,4 @@
+### rk3318-box-led-conf6
+
+Configuration for rk3318 boards with with signature T98_RK3318 and clones.
+Seen in commercial tv boxes like Hongtop H50.
diff --git a/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3318-box-led-conf7.readme b/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3318-box-led-conf7.readme
new file mode 100644
index 000000000000..e928f046bd22
--- /dev/null
+++ b/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3318-box-led-conf7.readme
@@ -0,0 +1,4 @@
+### rk3318-box-led-conf7
+
+Configuration for rk3318 boards with with signature T9_RK3318 and clones.
+Seen in commercial tv boxes like T9 Sunwell 3318.
diff --git a/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3318-box-wlan-ap6330.readme b/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3318-box-wlan-ap6330.readme
new file mode 100644
index 000000000000..bff70f56dfd2
--- /dev/null
+++ b/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3318-box-wlan-ap6330.readme
@@ -0,0 +1,4 @@
+### rk3318-box-wlan-ap6330
+
+Set up additional device tree bits properly support ap6330 (broaccom BCM4330)
+wifi + bt chip and clones.
diff --git a/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3318-box-wlan-ap6334.readme b/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3318-box-wlan-ap6334.readme
new file mode 100644
index 000000000000..cedad4369ee4
--- /dev/null
+++ b/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3318-box-wlan-ap6334.readme
@@ -0,0 +1,4 @@
+### rk3318-box-wlan-ap6334
+
+Set up additional device tree bits to properly support ap6334 (broadcom BCM4334)
+wifi chip and clones
diff --git a/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3318-box-wlan-ext.readme b/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3318-box-wlan-ext.readme
new file mode 100644
index 000000000000..9cfdfd8ab789
--- /dev/null
+++ b/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3318-box-wlan-ext.readme
@@ -0,0 +1,4 @@
+### rk3318-box-wlan-ext
+
+Use sdmmc_ext device for sdio devices, enabled wifi on some boards (notably
+X88 Pro) which have wifi chip attached to sdmmc_ext controller.
diff --git a/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3328-i2c0.readme b/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3328-i2c0.readme
new file mode 100644
index 000000000000..c7907333e0cf
--- /dev/null
+++ b/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3328-i2c0.readme
@@ -0,0 +1,5 @@
+### rk3328-i2c0
+
+Activates TWI/I2C bus 0
+
+I2C0 (SCL, SDA): GPIO2-D0, GPIO2-D1
diff --git a/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3328-mksklipad50-enable-rtc-end1.readme b/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3328-mksklipad50-enable-rtc-end1.readme
new file mode 100644
index 000000000000..89afe55263c8
--- /dev/null
+++ b/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3328-mksklipad50-enable-rtc-end1.readme
@@ -0,0 +1,7 @@
+### mksklipad50-enable-rtc-end1
+
+Enables end1 ethernet adapter, which also makes rtc work better.
+There is no physical port for end1, so this overlay is merely for
+testing the rtc.
+The rtc still tends to stall sometimes. In the original makerbase
+image, the rtc was completely unusable though.
diff --git a/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3328-mksklipad50-enable-v4l2.readme b/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3328-mksklipad50-enable-v4l2.readme
new file mode 100644
index 000000000000..909e884ec44a
--- /dev/null
+++ b/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3328-mksklipad50-enable-v4l2.readme
@@ -0,0 +1,4 @@
+### mksklipad50-enable-v4l2
+
+Enables the video4linux devices /dev/video[012] /dev/media[01]
+Not sure, if they are of any use.
diff --git a/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3328-mkspi-disable-lcd-spi.readme b/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3328-mkspi-disable-lcd-spi.readme
new file mode 100644
index 000000000000..5fc2f580d126
--- /dev/null
+++ b/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3328-mkspi-disable-lcd-spi.readme
@@ -0,0 +1,3 @@
+### mkspi-disable-lcd-spi
+
+DTBO to disable spi_for_{lcd,touch} when enabling uart1
diff --git a/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3328-opp-1.4ghz.readme b/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3328-opp-1.4ghz.readme
new file mode 100644
index 000000000000..1c518ab4e12e
--- /dev/null
+++ b/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3328-opp-1.4ghz.readme
@@ -0,0 +1,4 @@
+### rk3328-opp-1.4ghz
+
+Adds the 1.4GHz opp for overclocking
+WARNING! Not officially supported by Rockchip!!!
diff --git a/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3328-opp-1.5ghz.readme b/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3328-opp-1.5ghz.readme
new file mode 100644
index 000000000000..355dddd69f98
--- /dev/null
+++ b/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3328-opp-1.5ghz.readme
@@ -0,0 +1,4 @@
+### rk3328-opp-1.5ghz
+
+Adds the 1.5GHz opp for overclocking
+WARNING! Not officially supported by Rockchip!!!
diff --git a/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3328-uart1.readme b/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3328-uart1.readme
new file mode 100644
index 000000000000..f2ed61f720c0
--- /dev/null
+++ b/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3328-uart1.readme
@@ -0,0 +1,5 @@
+### rk3328-uart1
+
+Activates UART1
+
+UART1 pins (RX, TX): GPIO3_A6, GPIO3_A4
diff --git a/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3399-dwc3-0-host.readme b/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3399-dwc3-0-host.readme
new file mode 100644
index 000000000000..1f6981aee145
--- /dev/null
+++ b/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3399-dwc3-0-host.readme
@@ -0,0 +1,6 @@
+### dwc3-0-host
+
+Forces port 0 of the DesignWare xHCI controller to host mode.
+
+This can be used on plaforms such as NanoPC-T4, where devices plugged into the
+USB-C port may not be detected otherwise.
diff --git a/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3399-helios64-cpu-stability.readme b/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3399-helios64-cpu-stability.readme
new file mode 100644
index 000000000000..bfaf5afe6fbd
--- /dev/null
+++ b/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3399-helios64-cpu-stability.readme
@@ -0,0 +1,12 @@
+### rk3399-helios64-cpu-stability
+
+Opt-in workaround for reported instability of the Helios64 NAS (Kobol)
+under sustained CPU load. Raises the A72 big-cluster vcore by +75 mV on
+opp00..opp06 (408 MHz .. 1608 MHz): 0.900 / 0.900 / 0.900 / 0.950 /
+1.025 / 1.100 / 1.175 V respectively (mainline rk3399-op1-opp.dtsi:
+0.825 / 0.825 / 0.825 / 0.875 / 0.950 / 1.025 / 1.100 V). The 1.8 GHz
+top step is left at the mainline 1.20 V. Not enabled by default.
+
+Origin: empirical workaround from the Armbian forum (topics 30074 and
+58597, by prahal and ebin-dev); no upstream patch exists. Apply only if
+you observe random crashes or hangs on a Helios64.
diff --git a/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3399-i2c7.readme b/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3399-i2c7.readme
new file mode 100644
index 000000000000..6c2998284c3b
--- /dev/null
+++ b/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3399-i2c7.readme
@@ -0,0 +1,5 @@
+### i2c7
+
+Activates TWI/I2C bus 7
+
+I2C7 pins (SCL, SDA): GPIO2-B0, GPIO2-A7 GPIO1-C5, GPIO1-C4
diff --git a/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3399-i2c8.readme b/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3399-i2c8.readme
new file mode 100644
index 000000000000..0932782dca73
--- /dev/null
+++ b/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3399-i2c8.readme
@@ -0,0 +1,5 @@
+### i2c8
+
+Activates TWI/I2C bus 8
+
+I2C8 pins (SCL, SDA): GPIO1-C5, GPIO1-C4
diff --git a/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3399-opp-2ghz.readme b/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3399-opp-2ghz.readme
new file mode 100644
index 000000000000..6f252b53e169
--- /dev/null
+++ b/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3399-opp-2ghz.readme
@@ -0,0 +1,4 @@
+### rk3399-opp-2ghz
+
+Adds the 2GHz big and 1.5 GHz LITTLE opps for overclocking
+WARNING! Not officially supported by Rockchip!!!
diff --git a/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3399-pcie-gen2.readme b/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3399-pcie-gen2.readme
new file mode 100644
index 000000000000..0ce2d264f725
--- /dev/null
+++ b/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3399-pcie-gen2.readme
@@ -0,0 +1,4 @@
+### pcie-gen2
+
+Enables PCIe Gen2 link speed on RK3399.
+WARNING! Not officially supported by Rockchip!!!
diff --git a/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3399-spi-jedec-nor.bases b/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3399-spi-jedec-nor.bases
new file mode 100644
index 000000000000..734ad11e857b
--- /dev/null
+++ b/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3399-spi-jedec-nor.bases
@@ -0,0 +1,13 @@
+rk3399-nanopc-t4
+rk3399-nanopi-m4
+rk3399-nanopi-m4v2
+rk3399-nanopi-neo4
+rk3399-nanopi-r4s
+rk3399-orangepi-4
+rk3399-orangepi-4-lts
+rk3399-pinebook-pro
+rk3399-rock-4c-plus
+rk3399-rock-4se
+rk3399-rock-pi-4b
+rk3399-rockpro64
+rk3399-tinker-2
diff --git a/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3399-spi-jedec-nor.dtso b/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3399-spi-jedec-nor.dtso
index c4b1f36f9b09..a365a3902e02 100644
--- a/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3399-spi-jedec-nor.dtso
+++ b/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3399-spi-jedec-nor.dtso
@@ -1,72 +1,46 @@
 /dts-v1/;
 /plugin/;
 
-/ {
-	compatible = "rockchip,rk3399";
-
-	fragment@0 {
-		target-path = "/aliases";
-		__overlay__ {
-			spi0 = "/spi@ff1c0000";
-			spi1 = "/spi@ff1d0000";
-			spi2 = "/spi@ff1e0000";
-			spi3 = "/spi@ff1f0000";
-		};
-	};
-
-	fragment@1 {
-		target = <&spi0>;
-		__overlay__ {
-			#address-cells = <1>;
-			#size-cells = <0>;
-			spiflash@0 {
-				compatible = "jedec,spi-nor";
-				reg = <0>;
-				spi-max-frequency = <10000000>;
-				status = "disabled";
-			};
-		};
-	};
+&spi0 {
+	#address-cells = <1>; 
+	#size-cells = <0>; 
+	spiflash@0 { 
+		compatible = "jedec,spi-nor"; 
+		reg = <0>; 
+		spi-max-frequency = <10000000>; 
+		status = "disabled"; 
+	}; 
+};
 
-	fragment@2 {
-		target = <&spi1>;
-		__overlay__ {
-			#address-cells = <1>;
-			#size-cells = <0>;
-			spiflash@0 {
-				compatible = "jedec,spi-nor";
-				reg = <0>;
-				spi-max-frequency = <10000000>;
-				status = "disabled";
-			};
-		};
-	};
+&spi1 {
+	#address-cells = <1>; 
+	#size-cells = <0>; 
+	spiflash@0 { 
+		compatible = "jedec,spi-nor"; 
+		reg = <0>; 
+		spi-max-frequency = <10000000>; 
+		status = "disabled"; 
+	}; 
+};
 
-	fragment@3 {
-		target = <&spi2>;
-		__overlay__ {
-			#address-cells = <1>;
-			#size-cells = <0>;
-			spiflash@0 {
-				compatible = "jedec,spi-nor";
-				reg = <0>;
-				spi-max-frequency = <10000000>;
-				status = "disabled";
-			};
-		};
-	};
+&spi2 {
+	#address-cells = <1>; 
+	#size-cells = <0>; 
+	spiflash@0 { 
+		compatible = "jedec,spi-nor"; 
+		reg = <0>; 
+		spi-max-frequency = <10000000>; 
+		status = "disabled"; 
+	}; 
+};
 
-	fragment@4 {
-		target = <&spi3>;
-		__overlay__ {
-			#address-cells = <1>;
-			#size-cells = <0>;
-			spiflash@0 {
-				compatible = "jedec,spi-nor";
-				reg = <0>;
-				spi-max-frequency = <10000000>;
-				status = "disabled";
-			};
-		};
-	};
+&spi3 {
+	#address-cells = <1>; 
+	#size-cells = <0>; 
+	spiflash@0 { 
+		compatible = "jedec,spi-nor"; 
+		reg = <0>; 
+		spi-max-frequency = <10000000>; 
+		status = "disabled"; 
+	}; 
 };
diff --git a/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3399-spi-jedec-nor.readme b/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3399-spi-jedec-nor.readme
new file mode 100644
index 000000000000..7d903b083f77
--- /dev/null
+++ b/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3399-spi-jedec-nor.readme
@@ -0,0 +1,22 @@
+### spi-jedec-nor
+
+Activates MTD support for JEDEC compatible SPI NOR flash chips on SPI bus
+supported by the kernel SPI NOR driver
+
+SPI 0 pins (MOSI, MISO, SCK, CS): GPIO3_A5, GPIO3_A4, GPIO3_A6, GPIO3_A7
+SPI 1 pins (MOSI, MISO, SCK, CS): GPIO1_A7, GPIO1_B0, GPIO1_B1, GPIO1_B2
+SPI 2 pins (MOSI, MISO, SCK, CS): GPIO1_C0, GPIO1_B7, GPIO1_C1, GPIO1_C2
+SPI 3 pins (MOSI, MISO, SCK, CS): GPIO2_B2, GPIO2_B1, GPIO2_B3, GPIO2_B4
+
+Parameters:
+
+param_spinor_spi_bus (int)
+	SPI bus to activate SPI NOR flash support on
+	Required
+	Range: 0 - 3
+
+param_spinor_max_freq (int)
+	Maximum SPI frequency in Hz
+	Optional
+	Default: 10000000
+	Range: 3000 - 100000000
diff --git a/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3399-spi-jedec-nor.scr-cmd b/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3399-spi-jedec-nor.scr-cmd
new file mode 100644
index 000000000000..27453ca5bb22
--- /dev/null
+++ b/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3399-spi-jedec-nor.scr-cmd
@@ -0,0 +1,16 @@
+if test -n "${param_spinor_spi_bus}"; then
+	fdt get value tmp_spi_path /__symbols__	spi${param_spinor_spi_bus}
+	echo "---> spi${param_spinor_spi_bus} path = ${tmp_spi_path}"
+
+	fdt set ${tmp_spi_path} status "okay"
+	fdt set ${tmp_spi_path}/spiflash@0 status "okay"
+
+	if test -n "${param_spinor_max_freq}"; then
+		fdt set ${tmp_spi_path}/spiflash@0 spi-max-frequency "<${param_spinor_max_freq}>"
+	fi
+
+	if test "${param_spinor_spi_cs}" = "1"; then
+		fdt set ${tmp_spi_path}/spiflash@0 reg "<1>"
+	fi
+	env delete tmp_spi_path
+fi
diff --git a/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3399-spi-spidev.bases b/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3399-spi-spidev.bases
new file mode 100644
index 000000000000..734ad11e857b
--- /dev/null
+++ b/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3399-spi-spidev.bases
@@ -0,0 +1,13 @@
+rk3399-nanopc-t4
+rk3399-nanopi-m4
+rk3399-nanopi-m4v2
+rk3399-nanopi-neo4
+rk3399-nanopi-r4s
+rk3399-orangepi-4
+rk3399-orangepi-4-lts
+rk3399-pinebook-pro
+rk3399-rock-4c-plus
+rk3399-rock-4se
+rk3399-rock-pi-4b
+rk3399-rockpro64
+rk3399-tinker-2
diff --git a/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3399-spi-spidev.dtso b/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3399-spi-spidev.dtso
index 53f074096308..c273685ff404 100644
--- a/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3399-spi-spidev.dtso
+++ b/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3399-spi-spidev.dtso
@@ -1,72 +1,46 @@
 /dts-v1/;
 /plugin/;
 
-/ {
-	compatible = "rockchip,rk3399";
-
-	fragment@0 {
-		target-path = "/aliases";
-		__overlay__ {
-			spi0 = "/spi@ff1c0000";
-			spi1 = "/spi@ff1d0000";
-			spi2 = "/spi@ff1e0000";
-			spi3 = "/spi@ff1f0000";
-		};
-	};
-
-	fragment@1 {
-		target = <&spi0>;
-		__overlay__ {
-			#address-cells = <1>;
-			#size-cells = <0>;
-			spidev {
-				compatible = "armbian,spi-dev";
-				status = "disabled";
-				reg = <0>;
-				spi-max-frequency = <10000000>;
-			};
-		};
-	};
+&spi0 {
+	#address-cells = <1>; 
+	#size-cells = <0>; 
+	spidev { 
+		compatible = "armbian,spi-dev"; 
+		reg = <0>; 
+		spi-max-frequency = <10000000>; 
+		status = "disabled"; 
+	}; 
+};
 
-	fragment@2 {
-		target = <&spi1>;
-		__overlay__ {
-			#address-cells = <1>;
-			#size-cells = <0>;
-			spidev {
-				compatible = "armbian,spi-dev";
-				status = "disabled";
-				reg = <0>;
-				spi-max-frequency = <10000000>;
-			};
-		};
-	};
+&spi1 {
+	#address-cells = <1>; 
+	#size-cells = <0>; 
+	spidev { 
+		compatible = "armbian,spi-dev"; 
+		reg = <0>; 
+		spi-max-frequency = <10000000>; 
+		status = "disabled"; 
+	}; 
+};
 
-	fragment@3 {
-		target = <&spi2>;
-		__overlay__ {
-			#address-cells = <1>;
-			#size-cells = <0>;
-			spidev {
-				compatible = "armbian,spi-dev";
-				status = "disabled";
-				reg = <0>;
-				spi-max-frequency = <10000000>;
-			};
-		};
-	};
+&spi2 {
+	#address-cells = <1>; 
+	#size-cells = <0>; 
+	spidev { 
+		compatible = "armbian,spi-dev"; 
+		reg = <0>; 
+		spi-max-frequency = <10000000>; 
+		status = "disabled"; 
+	}; 
+};
 
-	fragment@4 {
-		target = <&spi3>;
-		__overlay__ {
-			#address-cells = <1>;
-			#size-cells = <0>;
-			spidev {
-				compatible = "armbian,spi-dev";
-				status = "disabled";
-				reg = <0>;
-				spi-max-frequency = <10000000>;
-			};
-		};
-	};
+&spi3 {
+	#address-cells = <1>; 
+	#size-cells = <0>; 
+	spidev { 
+		compatible = "armbian,spi-dev"; 
+		reg = <0>; 
+		spi-max-frequency = <10000000>; 
+		status = "disabled"; 
+	}; 
 };
diff --git a/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3399-spi-spidev.readme b/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3399-spi-spidev.readme
new file mode 100644
index 000000000000..04dd4d066b92
--- /dev/null
+++ b/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3399-spi-spidev.readme
@@ -0,0 +1,29 @@
+### spi-spidev
+
+Activates SPIdev device node (/dev/spidevX.Y) for userspace SPI access,
+where X is the bus number and Y is the CS number
+
+SPI 0 pins (MOSI, MISO, SCK, CS): GPIO3_A5, GPIO3_A4, GPIO3_A6, GPIO3_A7
+SPI 1 pins (MOSI, MISO, SCK, CS): GPIO1_A7, GPIO1_B0, GPIO1_B1, GPIO1_B2
+SPI 2 pins (MOSI, MISO, SCK, CS): GPIO1_C0, GPIO1_B7, GPIO1_C1, GPIO1_C2
+SPI 3 pins (MOSI, MISO, SCK, CS): GPIO2_B2, GPIO2_B1, GPIO2_B3, GPIO2_B4
+
+Parameters:
+
+param_spidev_spi_bus (int)
+	SPI bus to activate SPIdev support on
+	Required
+	Range: 0 - 3
+
+param_spidev_max_freq (int)
+	Maximum SPIdev frequency in Hz
+	Optional
+	Default: 10000000
+	Range: 3000 - 100000000
+
+param_spidev_spi_cs (int)
+	SPI chip select number
+	Optional
+	Default: 0
+	Supported values: 0, 1
+	Using chip select 1 requires using "spi-add-cs1" overlay
diff --git a/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3399-spi-spidev.scr-cmd b/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3399-spi-spidev.scr-cmd
new file mode 100644
index 000000000000..1add5000275b
--- /dev/null
+++ b/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3399-spi-spidev.scr-cmd
@@ -0,0 +1,16 @@
+if test -n "${param_spidev_spi_bus}"; then
+	fdt get value tmp_spi_path /__symbols__	spi${param_spidev_spi_bus}
+	echo "---> spi${param_spidev_spi_bus} path = ${tmp_spi_path}"
+
+	fdt set ${tmp_spi_path} status "okay"
+	fdt set ${tmp_spi_path}/spidev status "okay"
+
+	if test -n "${param_spidev_max_freq}"; then
+		fdt set ${tmp_spi_path}/spidev spi-max-frequency "<${param_spidev_max_freq}>"
+	fi
+
+	if test "${param_spidev_spi_cs}" = "1"; then
+		fdt set ${tmp_spi_path}/spidev reg "<1>";
+	fi
+	env delete tmp_spi_path
+fi
diff --git a/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3399-uart4.readme b/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3399-uart4.readme
new file mode 100644
index 000000000000..1c0e5cba460a
--- /dev/null
+++ b/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3399-uart4.readme
@@ -0,0 +1,8 @@
+### uart4
+
+Activates UART4
+
+UART4 pins (RX, TX): GPIO1_A7, GPIO1_B0
+
+Notice: UART4 cannot be activated together with SPI1 - they share the sam pins.
+Enabling this overlay disables SPI1.
diff --git a/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3399-w1-gpio.bases b/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3399-w1-gpio.bases
new file mode 100644
index 000000000000..734ad11e857b
--- /dev/null
+++ b/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3399-w1-gpio.bases
@@ -0,0 +1,13 @@
+rk3399-nanopc-t4
+rk3399-nanopi-m4
+rk3399-nanopi-m4v2
+rk3399-nanopi-neo4
+rk3399-nanopi-r4s
+rk3399-orangepi-4
+rk3399-orangepi-4-lts
+rk3399-pinebook-pro
+rk3399-rock-4c-plus
+rk3399-rock-4se
+rk3399-rock-pi-4b
+rk3399-rockpro64
+rk3399-tinker-2
diff --git a/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3399-w1-gpio.dtso b/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3399-w1-gpio.dtso
index bfbc16adcc9d..ce0fcad283dc 100644
--- a/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3399-w1-gpio.dtso
+++ b/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3399-w1-gpio.dtso
@@ -1,20 +1,11 @@
-// Definitions for w1-gpio module (without external pullup)
 /dts-v1/;
 /plugin/;
 
-/ {
-	compatible = "rockchip,rk3399";
-
-	fragment@0 {
-		target-path = "/";
-		__overlay__ {
-
-			w1: onewire@0 {
-				compatible = "w1-gpio";
-				pinctrl-names = "default";
-				gpios = <&gpio1 4 0 0xae>; // GPIO1_A4
-				status = "okay";
-			};
-		};
+&{/} {
+	onewire@0 {
+		compatible = "w1-gpio";
+		pinctrl-names = "default";
+		gpios = <&gpio1 4 0 0xae>; // GPIO1_A4
+		status = "okay";
 	};
 };
diff --git a/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3399-w1-gpio.readme b/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3399-w1-gpio.readme
new file mode 100644
index 000000000000..cdcfcfcaabbf
--- /dev/null
+++ b/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3399-w1-gpio.readme
@@ -0,0 +1,12 @@
+### w1-gpio
+
+Activates 1-Wire GPIO master
+Requires an external pull-up resistor on the data pin
+or enabling the internal pull-up
+
+Parameters:
+
+param_w1_pin (str)
+	GPIO pin for the 1-wire data line
+	Optional
+	Default: GPIO1_A4
diff --git a/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3399-w1-gpio.scr-cmd b/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3399-w1-gpio.scr-cmd
new file mode 100644
index 000000000000..d8422ad5d31c
--- /dev/null
+++ b/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3399-w1-gpio.scr-cmd
@@ -0,0 +1,33 @@
+if test -n "${param_w1_pin}"; then
+	echo "Processing 1-wire parameter param_w1_pin=${param_w1_pin}"
+
+	setenv tmp_pinctrl "${param_w1_pin}"
+	setexpr tmp_pinctrl sub "GPIO(0|1|2|3|4)_\\S\\d+" "\\1";
+	echo "---> pinctrl (int) = ${tmp_pinctrl}"
+
+	fdt get value tmp_pinctrl /__symbols__	gpio${tmp_pinctrl}
+	echo "---> pinctrl (path) = ${tmp_pinctrl}"
+
+	fdt get value tmp_phandle ${tmp_pinctrl} phandle
+	echo "---> phandle = ${tmp_phandle}"
+
+	setenv tmp_bank "${param_w1_pin}"
+	setexpr tmp_bank sub "GPIO\\d_(\\S)\\d+" "\\1";
+	echo "---> bank = ${tmp_bank}"
+
+	test "${tmp_bank}" = "A" && setenv tmp_bank 0;
+	test "${tmp_bank}" = "B" && setenv tmp_bank 1;
+	test "${tmp_bank}" = "C" && setenv tmp_bank 2;
+	test "${tmp_bank}" = "D" && setenv tmp_bank 3;
+	setexpr tmp_bank ${tmp_bank} * 8;
+	echo "---> bank (int) = ${tmp_bank}"
+
+	setenv tmp_pin "${param_w1_pin}"
+	setexpr tmp_pin sub "GPIO\\d_\\S(\\d+)" "\\1";
+	setexpr tmp_pin ${tmp_bank} + ${tmp_pin}
+	echo "---> pin (int) = ${tmp_pin}"
+
+	echo "---> gpios = <${tmp_phandle} ${tmp_pin} 0 0>"
+	fdt set /onewire@0 gpios "<${tmp_phandle} ${tmp_pin} 0 0>"
+	env delete tmp_pinctrl tmp_bank tmp_pin tmp_phandle
+fi
diff --git a/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3588-nanopc-t6-mmc-frequency.readme b/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3588-nanopc-t6-mmc-frequency.readme
new file mode 100644
index 000000000000..23b43469ba55
--- /dev/null
+++ b/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rk3588-nanopc-t6-mmc-frequency.readme
@@ -0,0 +1,6 @@
+### rockchip-rk3588-nanopc-t6-mmc-frequency (11 Oct 2025)
+
+Some NanoPC-T6 boards use a A3A444 eMMC chip. Under heavy I/O load when running
+in HS400 mode, this will often result in I/O errors.
+Reducing the eMMC frequency from the default 200000000 Hz to 150000000 Hz improves
+stability and eliminates the I/O errors.
diff --git a/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rockpi4cplus-usb-host.dtso b/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rockpi4cplus-usb-host.dtso
deleted file mode 100644
index 654ae888f5c4..000000000000
--- a/patch/kernel/archive/rockchip64-7.0/overlay/rockchip-rockpi4cplus-usb-host.dtso
+++ /dev/null
@@ -1,16 +0,0 @@
-//For RockPI 4C+:  Change the top USB3.0 port to host mode
-
-/dts-v1/;
-/plugin/;
-
-/ {
-	compatible = "radxa,rockpi4c-plus", "radxa,rockpi4", "rockchip,rk3399";
-
-	fragment@0 {
-		target = <&usbdrd_dwc3_0>;
-		__overlay__ {
-			dr_mode = "host";
-		};
-	};
-};
-