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fix.c
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526 lines (448 loc) · 27 KB
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/**********************************************************************************************************************
* \file fix.c
* \copyright Copyright (C) Infineon Technologies AG 2026
*
* Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of
* business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use
* are agreed, use of this file is subject to following:
*
* Boost Software License - Version 1.0 - August 17th, 2003
*
* Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and
* accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute,
* and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the
* Software is furnished to do so, all subject to the following:
*
* The copyright notices in the Software and this entire statement, including the above license grant, this restriction
* and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all
* derivative works of the Software, unless such copies or derivative works are solely in the form of
* machine-executable object code generated by a source language processor.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE
* WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE
* COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN
* CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
* IN THE SOFTWARE.
*********************************************************************************************************************/
/* THIS FILE INCLUDES MISSING FUNCTION DEFINITIONS FOR THE CURRENT GRAPHICS DRIVER/UTILITY LIBRARY.
!!!!!!!!!!!!!!!!!!!!!!!! REMOVE THIS WHEN IT IS FIXED IN THE LIBRARIES !!!!!!!!!!!!!!!!!!!!!!!! */
/*********************************************************************************************************************/
/*-----------------------------------------------------Includes------------------------------------------------------*/
/*********************************************************************************************************************/
#include <stdint.h>
#include "cy_pdl.h"
#include "cy_device_headers.h"
#include "cy_gpio.h"
#include "cycfg_peripherals.h"
/*********************************************************************************************************************/
/*------------------------------------------------------Macros-------------------------------------------------------*/
/*********************************************************************************************************************/
#if defined (CY_DEVICE_TVIIC2D4M)
#define CY_DISP1_CLK_PORT GPIO_PRT16
#define CY_DISP1_CLK_PIN 2
#define CY_DISP1_CLK_PIN_MUX P16_2_VIDEOSS0_TTL_DSP1_CLOCK // PCLK
#define CY_DISP1_CTRL0_PORT GPIO_PRT16
#define CY_DISP1_CTRL0_PIN 3
#define CY_DISP1_CTRL0_PIN_MUX P16_3_VIDEOSS0_TTL_DSP1_CONTROL0 // LVALID
#define CY_DISP1_CTRL1_PORT GPIO_PRT16
#define CY_DISP1_CTRL1_PIN 4
#define CY_DISP1_CTRL1_PIN_MUX P16_4_VIDEOSS0_TTL_DSP1_CONTROL1 // VSYNC
#define CY_DISP1_CTRL2_PORT GPIO_PRT16
#define CY_DISP1_CTRL2_PIN 5
#define CY_DISP1_CTRL2_PIN_MUX P16_5_VIDEOSS0_TTL_DSP1_CONTROL2 // DE
#define CY_DISP1_DATA_A0_0_PORT GPIO_PRT16
#define CY_DISP1_DATA_A0_0_PIN 1
#define CY_DISP1_DATA_A0_0_PIN_MUX P16_1_VIDEOSS0_TTL_DSP1_DATA_A00 // RED0
#define CY_DISP1_DATA_A0_1_PORT GPIO_PRT15
#define CY_DISP1_DATA_A0_1_PIN 7
#define CY_DISP1_DATA_A0_1_PIN_MUX P15_7_VIDEOSS0_TTL_DSP1_DATA_A01 // RED2
#define CY_DISP1_DATA_A0_2_PORT GPIO_PRT15
#define CY_DISP1_DATA_A0_2_PIN 5
#define CY_DISP1_DATA_A0_2_PIN_MUX P15_5_VIDEOSS0_TTL_DSP1_DATA_A02 // RED4
#define CY_DISP1_DATA_A0_3_PORT GPIO_PRT15
#define CY_DISP1_DATA_A0_3_PIN 3
#define CY_DISP1_DATA_A0_3_PIN_MUX P15_3_VIDEOSS0_TTL_DSP1_DATA_A03 // RED6
#define CY_DISP1_DATA_A0_4_PORT GPIO_PRT15
#define CY_DISP1_DATA_A0_4_PIN 1
#define CY_DISP1_DATA_A0_4_PIN_MUX P15_1_VIDEOSS0_TTL_DSP1_DATA_A04 // GREEN0
#define CY_DISP1_DATA_A0_5_PORT GPIO_PRT14
#define CY_DISP1_DATA_A0_5_PIN 7
#define CY_DISP1_DATA_A0_5_PIN_MUX P14_7_VIDEOSS0_TTL_DSP1_DATA_A05 // GREEN2
#define CY_DISP1_DATA_A0_6_PORT GPIO_PRT14
#define CY_DISP1_DATA_A0_6_PIN 5
#define CY_DISP1_DATA_A0_6_PIN_MUX P14_5_VIDEOSS0_TTL_DSP1_DATA_A06 // GREEN4
#define CY_DISP1_DATA_A0_7_PORT GPIO_PRT14
#define CY_DISP1_DATA_A0_7_PIN 3
#define CY_DISP1_DATA_A0_7_PIN_MUX P14_3_VIDEOSS0_TTL_DSP1_DATA_A07 // GREEN6
#define CY_DISP1_DATA_A0_8_PORT GPIO_PRT14
#define CY_DISP1_DATA_A0_8_PIN 1
#define CY_DISP1_DATA_A0_8_PIN_MUX P14_1_VIDEOSS0_TTL_DSP1_DATA_A08 // BLUE0
#define CY_DISP1_DATA_A0_9_PORT GPIO_PRT13
#define CY_DISP1_DATA_A0_9_PIN 7
#define CY_DISP1_DATA_A0_9_PIN_MUX P13_7_VIDEOSS0_TTL_DSP1_DATA_A09 // BLUE2
#define CY_DISP1_DATA_A0_10_PORT GPIO_PRT13
#define CY_DISP1_DATA_A0_10_PIN 5
#define CY_DISP1_DATA_A0_10_PIN_MUX P13_5_VIDEOSS0_TTL_DSP1_DATA_A010// BLUE4
#define CY_DISP1_DATA_A0_11_PORT GPIO_PRT13
#define CY_DISP1_DATA_A0_11_PIN 3
#define CY_DISP1_DATA_A0_11_PIN_MUX P13_3_VIDEOSS0_TTL_DSP1_DATA_A011// BLUE6
#define CY_DISP1_DATA_A1_0_PORT GPIO_PRT16
#define CY_DISP1_DATA_A1_0_PIN 0
#define CY_DISP1_DATA_A1_0_PIN_MUX P16_0_VIDEOSS0_TTL_DSP1_DATA_A10 // RED1
#define CY_DISP1_DATA_A1_1_PORT GPIO_PRT15
#define CY_DISP1_DATA_A1_1_PIN 6
#define CY_DISP1_DATA_A1_1_PIN_MUX P15_6_VIDEOSS0_TTL_DSP1_DATA_A11 // RED3
#define CY_DISP1_DATA_A1_2_PORT GPIO_PRT15
#define CY_DISP1_DATA_A1_2_PIN 4
#define CY_DISP1_DATA_A1_2_PIN_MUX P15_4_VIDEOSS0_TTL_DSP1_DATA_A12 // RED5
#define CY_DISP1_DATA_A1_3_PORT GPIO_PRT15
#define CY_DISP1_DATA_A1_3_PIN 2
#define CY_DISP1_DATA_A1_3_PIN_MUX P15_2_VIDEOSS0_TTL_DSP1_DATA_A13 // RED7
#define CY_DISP1_DATA_A1_4_PORT GPIO_PRT15
#define CY_DISP1_DATA_A1_4_PIN 0
#define CY_DISP1_DATA_A1_4_PIN_MUX P15_0_VIDEOSS0_TTL_DSP1_DATA_A14 // GREEN1
#define CY_DISP1_DATA_A1_5_PORT GPIO_PRT14
#define CY_DISP1_DATA_A1_5_PIN 6
#define CY_DISP1_DATA_A1_5_PIN_MUX P14_6_VIDEOSS0_TTL_DSP1_DATA_A15 // GREEN3
#define CY_DISP1_DATA_A1_6_PORT GPIO_PRT14
#define CY_DISP1_DATA_A1_6_PIN 4
#define CY_DISP1_DATA_A1_6_PIN_MUX P14_4_VIDEOSS0_TTL_DSP1_DATA_A16 // GREEN5
#define CY_DISP1_DATA_A1_7_PORT GPIO_PRT14
#define CY_DISP1_DATA_A1_7_PIN 2
#define CY_DISP1_DATA_A1_7_PIN_MUX P14_2_VIDEOSS0_TTL_DSP1_DATA_A17 // GREEN7
#define CY_DISP1_DATA_A1_8_PORT GPIO_PRT14
#define CY_DISP1_DATA_A1_8_PIN 0
#define CY_DISP1_DATA_A1_8_PIN_MUX P14_0_VIDEOSS0_TTL_DSP1_DATA_A18 // BLUE1
#define CY_DISP1_DATA_A1_9_PORT GPIO_PRT13
#define CY_DISP1_DATA_A1_9_PIN 6
#define CY_DISP1_DATA_A1_9_PIN_MUX P13_6_VIDEOSS0_TTL_DSP1_DATA_A19 // BLUE3
#define CY_DISP1_DATA_A1_10_PORT GPIO_PRT13
#define CY_DISP1_DATA_A1_10_PIN 4
#define CY_DISP1_DATA_A1_10_PIN_MUX P13_4_VIDEOSS0_TTL_DSP1_DATA_A110// BLUE5
#define CY_DISP1_DATA_A1_11_PORT GPIO_PRT13
#define CY_DISP1_DATA_A1_11_PIN 2
#define CY_DISP1_DATA_A1_11_PIN_MUX P13_2_VIDEOSS0_TTL_DSP1_DATA_A111// BLUE7
#elif defined(CY_DEVICE_TVIIC2D6M)
/* PCLK */
#define CY_DISP1_CLK_PORT GPIO_PRT21
#define CY_DISP1_CLK_PIN 1
#define CY_DISP1_CLK_PIN_MUX P21_1_VIDEOSS0_TTL_DSP1_CLOCK
/* HSYNC */
#define CY_DISP1_CTRL0_PORT GPIO_PRT20
#define CY_DISP1_CTRL0_PIN 6
#define CY_DISP1_CTRL0_PIN_MUX P20_6_VIDEOSS0_TTL_DSP1_CONTROL0
/* VSYNC */
#define CY_DISP1_CTRL1_PORT GPIO_PRT20
#define CY_DISP1_CTRL1_PIN 7
#define CY_DISP1_CTRL1_PIN_MUX P20_7_VIDEOSS0_TTL_DSP1_CONTROL1
/* DE */
#define CY_DISP1_CTRL2_PORT GPIO_PRT21
#define CY_DISP1_CTRL2_PIN 0
#define CY_DISP1_CTRL2_PIN_MUX P21_0_VIDEOSS0_TTL_DSP1_CONTROL2
/* Red 0 */
#define CY_DISP1_DATA_A0_0_PORT GPIO_PRT16
#define CY_DISP1_DATA_A0_0_PIN 7
#define CY_DISP1_DATA_A0_0_PIN_MUX P16_7_VIDEOSS0_TTL_DSP1_DATA_A00
/* Red 1 */
#define CY_DISP1_DATA_A1_0_PORT GPIO_PRT17
#define CY_DISP1_DATA_A1_0_PIN 0
#define CY_DISP1_DATA_A1_0_PIN_MUX P17_0_VIDEOSS0_TTL_DSP1_DATA_A10
/* Red 2 */
#define CY_DISP1_DATA_A0_1_PORT GPIO_PRT18
#define CY_DISP1_DATA_A0_1_PIN 0
#define CY_DISP1_DATA_A0_1_PIN_MUX P18_0_VIDEOSS0_TTL_DSP1_DATA_A01
/* Red 3 */
#define CY_DISP1_DATA_A1_1_PORT GPIO_PRT18
#define CY_DISP1_DATA_A1_1_PIN 1
#define CY_DISP1_DATA_A1_1_PIN_MUX P18_1_VIDEOSS0_TTL_DSP1_DATA_A11
/* Red 4 */
#define CY_DISP1_DATA_A0_2_PORT GPIO_PRT18
#define CY_DISP1_DATA_A0_2_PIN 2
#define CY_DISP1_DATA_A0_2_PIN_MUX P18_2_VIDEOSS0_TTL_DSP1_DATA_A02
/* Red 5 */
#define CY_DISP1_DATA_A1_2_PORT GPIO_PRT18
#define CY_DISP1_DATA_A1_2_PIN 3
#define CY_DISP1_DATA_A1_2_PIN_MUX P18_3_VIDEOSS0_TTL_DSP1_DATA_A12
/* Red 6 */
#define CY_DISP1_DATA_A0_3_PORT GPIO_PRT18
#define CY_DISP1_DATA_A0_3_PIN 4
#define CY_DISP1_DATA_A0_3_PIN_MUX P18_4_VIDEOSS0_TTL_DSP1_DATA_A03
/* Red 7 */
#define CY_DISP1_DATA_A1_3_PORT GPIO_PRT18
#define CY_DISP1_DATA_A1_3_PIN 5
#define CY_DISP1_DATA_A1_3_PIN_MUX P18_5_VIDEOSS0_TTL_DSP1_DATA_A13
/* Green 0 */
#define CY_DISP1_DATA_A0_4_PORT GPIO_PRT18
#define CY_DISP1_DATA_A0_4_PIN 6
#define CY_DISP1_DATA_A0_4_PIN_MUX P18_6_VIDEOSS0_TTL_DSP1_DATA_A04
/* Green 1 */
#define CY_DISP1_DATA_A1_4_PORT GPIO_PRT18
#define CY_DISP1_DATA_A1_4_PIN 7
#define CY_DISP1_DATA_A1_4_PIN_MUX P18_7_VIDEOSS0_TTL_DSP1_DATA_A14
/* Green 2 */
#define CY_DISP1_DATA_A0_5_PORT GPIO_PRT19
#define CY_DISP1_DATA_A0_5_PIN 0
#define CY_DISP1_DATA_A0_5_PIN_MUX P19_0_VIDEOSS0_TTL_DSP1_DATA_A05
/* Green 3 */
#define CY_DISP1_DATA_A1_5_PORT GPIO_PRT19
#define CY_DISP1_DATA_A1_5_PIN 1
#define CY_DISP1_DATA_A1_5_PIN_MUX P19_1_VIDEOSS0_TTL_DSP1_DATA_A15
/* Green 4 */
#define CY_DISP1_DATA_A0_6_PORT GPIO_PRT19
#define CY_DISP1_DATA_A0_6_PIN 2
#define CY_DISP1_DATA_A0_6_PIN_MUX P19_2_VIDEOSS0_TTL_DSP1_DATA_A06
/* Green 5 */
#define CY_DISP1_DATA_A1_6_PORT GPIO_PRT19
#define CY_DISP1_DATA_A1_6_PIN 3
#define CY_DISP1_DATA_A1_6_PIN_MUX P19_3_VIDEOSS0_TTL_DSP1_DATA_A16
/* Green 6 */
#define CY_DISP1_DATA_A0_7_PORT GPIO_PRT19
#define CY_DISP1_DATA_A0_7_PIN 4
#define CY_DISP1_DATA_A0_7_PIN_MUX P19_4_VIDEOSS0_TTL_DSP1_DATA_A07
/* Green 7 */
#define CY_DISP1_DATA_A1_7_PORT GPIO_PRT19
#define CY_DISP1_DATA_A1_7_PIN 5
#define CY_DISP1_DATA_A1_7_PIN_MUX P19_5_VIDEOSS0_TTL_DSP1_DATA_A17
/* Blue 0 */
#define CY_DISP1_DATA_A0_8_PORT GPIO_PRT19
#define CY_DISP1_DATA_A0_8_PIN 6
#define CY_DISP1_DATA_A0_8_PIN_MUX P19_6_VIDEOSS0_TTL_DSP1_DATA_A08
/* Blue 1 */
#define CY_DISP1_DATA_A1_8_PORT GPIO_PRT19
#define CY_DISP1_DATA_A1_8_PIN 7
#define CY_DISP1_DATA_A1_8_PIN_MUX P19_7_VIDEOSS0_TTL_DSP1_DATA_A18
/* Blue 2 */
#define CY_DISP1_DATA_A0_9_PORT GPIO_PRT20
#define CY_DISP1_DATA_A0_9_PIN 0
#define CY_DISP1_DATA_A0_9_PIN_MUX P20_0_VIDEOSS0_TTL_DSP1_DATA_A09
/* Blue 3 */
#define CY_DISP1_DATA_A1_9_PORT GPIO_PRT20
#define CY_DISP1_DATA_A1_9_PIN 1
#define CY_DISP1_DATA_A1_9_PIN_MUX P20_1_VIDEOSS0_TTL_DSP1_DATA_A19
/* Blue 4 */
#define CY_DISP1_DATA_A0_10_PORT GPIO_PRT20
#define CY_DISP1_DATA_A0_10_PIN 2
#define CY_DISP1_DATA_A0_10_PIN_MUX P20_2_VIDEOSS0_TTL_DSP1_DATA_A010
/* Blue 5 */
#define CY_DISP1_DATA_A1_10_PORT GPIO_PRT20
#define CY_DISP1_DATA_A1_10_PIN 3
#define CY_DISP1_DATA_A1_10_PIN_MUX P20_3_VIDEOSS0_TTL_DSP1_DATA_A110
/* Blue 6 */
#define CY_DISP1_DATA_A0_11_PORT GPIO_PRT20
#define CY_DISP1_DATA_A0_11_PIN 4
#define CY_DISP1_DATA_A0_11_PIN_MUX P20_4_VIDEOSS0_TTL_DSP1_DATA_A011
/* Blue 7 */
#define CY_DISP1_DATA_A1_11_PORT GPIO_PRT20
#define CY_DISP1_DATA_A1_11_PIN 5
#define CY_DISP1_DATA_A1_11_PIN_MUX P20_5_VIDEOSS0_TTL_DSP1_DATA_A111
#endif
typedef enum
{
Display0,
Display1,
Capture0,
Smif0,
Smif1,
BlDisp0,
BlDisp1,
BlFpd0,
BlFpd1,
Button,
} en_portpin_group_t;
typedef struct
{
en_portpin_group_t enGroup;
GPIO_PRT_Type* pstcPort;
uint8_t u8Pin;
en_hsiom_sel_t enMuxCfg;
uint8_t u8DriveMode;
uint8_t u8GpioOutVal;
} stc_portpin_cfg_t;
typedef enum
{
Fpdlink0 = 0, /**< FPD-Link instance #0 */
#ifdef VIDEOSS0_FPDLINK1
Fpdlink1 = 1, /**< FPD-Link instance #1 */
FpdlinkDual01 = 128, /**< FPD-Link instance #0 and #1 in dual pixel mode */
#endif
} cy_fpdlink_en_instance_t;
typedef enum
{
CY_FPDLINK_SUCCESS = 0x00u, /**< Returned successful */
CY_FPDLINK_ERROR = 0x01u, /**< General error */
CY_FPDLINK_BAD_PARAM = 0x02u, /**< Bad parameter was passed */
} cy_fpdlink_en_result_t;
typedef enum
{
FpdlinkLsbFirst = 0, /**< LSB is sent first */
FpdlinkMsbFirst = 1, /**< MSB is sent first (default)*/
} cy_fpdlink_en_bit_order_t;
typedef enum
{
FpdlinkCurrent2m40 = 0, /**< 2.40 mA */
FpdlinkCurrent2m72 = 1, /**< 2.72 mA */
FpdlinkCurrent2m88 = 2, /**< 2.88 mA */
FpdlinkCurrent3m20 = 3, /**< 3.20 mA */
FpdlinkCurrent3m36 = 4, /**< 3.36 mA (default) */
FpdlinkCurrent3m68 = 5, /**< 3.68 mA */
FpdlinkCurrent3m84 = 6, /**< 3.84 mA */
FpdlinkCurrent4m32 = 7, /**< 4.32 mA */
} cy_fpdlink_en_current_t;
typedef enum
{
FpdlinkPllOutDiv1 = 0, /**< Divide by 1 */
FpdlinkPllOutDiv2 = 1, /**< Divide by 2 */
FpdlinkPllOutDiv4 = 2, /**< Divide by 4 */
FpdlinkPllOutDiv8 = 3, /**< Divide by 8 */
} cy_fpdlink_en_pll_out_div_t;
typedef enum
{
FpdlinkPllBandwidthDefault = 0, /**< Default */
FpdlinkPllBandwidthLowA = 1, /**< Lower bandwidth */
FpdlinkPllBandwidthLowB = 2, /**< Lower bandwidth */
FpdlinkPllBandwidthLess800kHz = 3, /**< Less than 800 kHz */
} cy_fpdlink_en_pll_bandwidth_t;
typedef struct
{
cy_fpdlink_en_bit_order_t enBitOrder; /**< Bit order */
cy_fpdlink_en_current_t enCurrent; /**< Output driver current */
cy_fpdlink_en_pll_out_div_t enPllOutDiv; /**< PLL output divider */
cy_fpdlink_en_pll_bandwidth_t enPllBandwidth; /**< PLL bandwidth */
uint32_t u32PllLockTimeout; /**< Simple timeout count value (0: indefinite waiting for PLL lock) */
} cy_fpdlink_stc_cfg_t;
/*********************************************************************************************************************/
/*-------------------------------------------------Global variables--------------------------------------------------*/
/*********************************************************************************************************************/
/*********************************************************************************************************************/
/*--------------------------------------------Private Variables/Constants--------------------------------------------*/
/*********************************************************************************************************************/
static const stc_portpin_cfg_t rgbPinsCfg[] =
{
{ .enGroup = Display1, .pstcPort = CY_DISP1_CLK_PORT, .u8Pin = CY_DISP1_CLK_PIN, .enMuxCfg = CY_DISP1_CLK_PIN_MUX, .u8DriveMode = CY_GPIO_DM_STRONG, .u8GpioOutVal = 0 },
{ .enGroup = Display1, .pstcPort = CY_DISP1_CTRL0_PORT, .u8Pin = CY_DISP1_CTRL0_PIN, .enMuxCfg = CY_DISP1_CTRL0_PIN_MUX, .u8DriveMode = CY_GPIO_DM_STRONG, .u8GpioOutVal = 0 },
{ .enGroup = Display1, .pstcPort = CY_DISP1_CTRL1_PORT, .u8Pin = CY_DISP1_CTRL1_PIN, .enMuxCfg = CY_DISP1_CTRL1_PIN_MUX, .u8DriveMode = CY_GPIO_DM_STRONG, .u8GpioOutVal = 0 },
{ .enGroup = Display1, .pstcPort = CY_DISP1_CTRL2_PORT, .u8Pin = CY_DISP1_CTRL2_PIN, .enMuxCfg = CY_DISP1_CTRL2_PIN_MUX, .u8DriveMode = CY_GPIO_DM_STRONG, .u8GpioOutVal = 0 },
{ .enGroup = Display1, .pstcPort = CY_DISP1_DATA_A0_0_PORT, .u8Pin = CY_DISP1_DATA_A0_0_PIN, .enMuxCfg = CY_DISP1_DATA_A0_0_PIN_MUX, .u8DriveMode = CY_GPIO_DM_STRONG, .u8GpioOutVal = 0 },
{ .enGroup = Display1, .pstcPort = CY_DISP1_DATA_A0_1_PORT, .u8Pin = CY_DISP1_DATA_A0_1_PIN, .enMuxCfg = CY_DISP1_DATA_A0_1_PIN_MUX, .u8DriveMode = CY_GPIO_DM_STRONG, .u8GpioOutVal = 0 },
{ .enGroup = Display1, .pstcPort = CY_DISP1_DATA_A0_2_PORT, .u8Pin = CY_DISP1_DATA_A0_2_PIN, .enMuxCfg = CY_DISP1_DATA_A0_2_PIN_MUX, .u8DriveMode = CY_GPIO_DM_STRONG, .u8GpioOutVal = 0 },
{ .enGroup = Display1, .pstcPort = CY_DISP1_DATA_A0_3_PORT, .u8Pin = CY_DISP1_DATA_A0_3_PIN, .enMuxCfg = CY_DISP1_DATA_A0_3_PIN_MUX, .u8DriveMode = CY_GPIO_DM_STRONG, .u8GpioOutVal = 0 },
{ .enGroup = Display1, .pstcPort = CY_DISP1_DATA_A0_4_PORT, .u8Pin = CY_DISP1_DATA_A0_4_PIN, .enMuxCfg = CY_DISP1_DATA_A0_4_PIN_MUX, .u8DriveMode = CY_GPIO_DM_STRONG, .u8GpioOutVal = 0 },
{ .enGroup = Display1, .pstcPort = CY_DISP1_DATA_A0_5_PORT, .u8Pin = CY_DISP1_DATA_A0_5_PIN, .enMuxCfg = CY_DISP1_DATA_A0_5_PIN_MUX, .u8DriveMode = CY_GPIO_DM_STRONG, .u8GpioOutVal = 0 },
{ .enGroup = Display1, .pstcPort = CY_DISP1_DATA_A0_6_PORT, .u8Pin = CY_DISP1_DATA_A0_6_PIN, .enMuxCfg = CY_DISP1_DATA_A0_6_PIN_MUX, .u8DriveMode = CY_GPIO_DM_STRONG, .u8GpioOutVal = 0 },
{ .enGroup = Display1, .pstcPort = CY_DISP1_DATA_A0_7_PORT, .u8Pin = CY_DISP1_DATA_A0_7_PIN, .enMuxCfg = CY_DISP1_DATA_A0_7_PIN_MUX, .u8DriveMode = CY_GPIO_DM_STRONG, .u8GpioOutVal = 0 },
{ .enGroup = Display1, .pstcPort = CY_DISP1_DATA_A0_8_PORT, .u8Pin = CY_DISP1_DATA_A0_8_PIN, .enMuxCfg = CY_DISP1_DATA_A0_8_PIN_MUX, .u8DriveMode = CY_GPIO_DM_STRONG, .u8GpioOutVal = 0 },
{ .enGroup = Display1, .pstcPort = CY_DISP1_DATA_A0_9_PORT, .u8Pin = CY_DISP1_DATA_A0_9_PIN, .enMuxCfg = CY_DISP1_DATA_A0_9_PIN_MUX, .u8DriveMode = CY_GPIO_DM_STRONG, .u8GpioOutVal = 0 },
{ .enGroup = Display1, .pstcPort = CY_DISP1_DATA_A0_10_PORT, .u8Pin = CY_DISP1_DATA_A0_10_PIN, .enMuxCfg = CY_DISP1_DATA_A0_10_PIN_MUX, .u8DriveMode = CY_GPIO_DM_STRONG, .u8GpioOutVal = 0 },
{ .enGroup = Display1, .pstcPort = CY_DISP1_DATA_A0_11_PORT, .u8Pin = CY_DISP1_DATA_A0_11_PIN, .enMuxCfg = CY_DISP1_DATA_A0_11_PIN_MUX, .u8DriveMode = CY_GPIO_DM_STRONG, .u8GpioOutVal = 0 },
{ .enGroup = Display1, .pstcPort = CY_DISP1_DATA_A1_0_PORT, .u8Pin = CY_DISP1_DATA_A1_0_PIN, .enMuxCfg = CY_DISP1_DATA_A1_0_PIN_MUX, .u8DriveMode = CY_GPIO_DM_STRONG, .u8GpioOutVal = 0 },
{ .enGroup = Display1, .pstcPort = CY_DISP1_DATA_A1_1_PORT, .u8Pin = CY_DISP1_DATA_A1_1_PIN, .enMuxCfg = CY_DISP1_DATA_A1_1_PIN_MUX, .u8DriveMode = CY_GPIO_DM_STRONG, .u8GpioOutVal = 0 },
{ .enGroup = Display1, .pstcPort = CY_DISP1_DATA_A1_2_PORT, .u8Pin = CY_DISP1_DATA_A1_2_PIN, .enMuxCfg = CY_DISP1_DATA_A1_2_PIN_MUX, .u8DriveMode = CY_GPIO_DM_STRONG, .u8GpioOutVal = 0 },
{ .enGroup = Display1, .pstcPort = CY_DISP1_DATA_A1_3_PORT, .u8Pin = CY_DISP1_DATA_A1_3_PIN, .enMuxCfg = CY_DISP1_DATA_A1_3_PIN_MUX, .u8DriveMode = CY_GPIO_DM_STRONG, .u8GpioOutVal = 0 },
{ .enGroup = Display1, .pstcPort = CY_DISP1_DATA_A1_4_PORT, .u8Pin = CY_DISP1_DATA_A1_4_PIN, .enMuxCfg = CY_DISP1_DATA_A1_4_PIN_MUX, .u8DriveMode = CY_GPIO_DM_STRONG, .u8GpioOutVal = 0 },
{ .enGroup = Display1, .pstcPort = CY_DISP1_DATA_A1_5_PORT, .u8Pin = CY_DISP1_DATA_A1_5_PIN, .enMuxCfg = CY_DISP1_DATA_A1_5_PIN_MUX, .u8DriveMode = CY_GPIO_DM_STRONG, .u8GpioOutVal = 0 },
{ .enGroup = Display1, .pstcPort = CY_DISP1_DATA_A1_6_PORT, .u8Pin = CY_DISP1_DATA_A1_6_PIN, .enMuxCfg = CY_DISP1_DATA_A1_6_PIN_MUX, .u8DriveMode = CY_GPIO_DM_STRONG, .u8GpioOutVal = 0 },
{ .enGroup = Display1, .pstcPort = CY_DISP1_DATA_A1_7_PORT, .u8Pin = CY_DISP1_DATA_A1_7_PIN, .enMuxCfg = CY_DISP1_DATA_A1_7_PIN_MUX, .u8DriveMode = CY_GPIO_DM_STRONG, .u8GpioOutVal = 0 },
{ .enGroup = Display1, .pstcPort = CY_DISP1_DATA_A1_8_PORT, .u8Pin = CY_DISP1_DATA_A1_8_PIN, .enMuxCfg = CY_DISP1_DATA_A1_8_PIN_MUX, .u8DriveMode = CY_GPIO_DM_STRONG, .u8GpioOutVal = 0 },
{ .enGroup = Display1, .pstcPort = CY_DISP1_DATA_A1_9_PORT, .u8Pin = CY_DISP1_DATA_A1_9_PIN, .enMuxCfg = CY_DISP1_DATA_A1_9_PIN_MUX, .u8DriveMode = CY_GPIO_DM_STRONG, .u8GpioOutVal = 0 },
{ .enGroup = Display1, .pstcPort = CY_DISP1_DATA_A1_10_PORT, .u8Pin = CY_DISP1_DATA_A1_10_PIN, .enMuxCfg = CY_DISP1_DATA_A1_10_PIN_MUX, .u8DriveMode = CY_GPIO_DM_STRONG, .u8GpioOutVal = 0 },
{ .enGroup = Display1, .pstcPort = CY_DISP1_DATA_A1_11_PORT, .u8Pin = CY_DISP1_DATA_A1_11_PIN, .enMuxCfg = CY_DISP1_DATA_A1_11_PIN_MUX, .u8DriveMode = CY_GPIO_DM_STRONG, .u8GpioOutVal = 0 },
};
/*********************************************************************************************************************/
/*------------------------------------------------Function Prototypes------------------------------------------------*/
/*********************************************************************************************************************/
static void powerUpVRAM(void);
static void initRGBPins(void);
/*********************************************************************************************************************/
/*---------------------------------------------Function Implementations----------------------------------------------*/
/*********************************************************************************************************************/
/**********************************************************************************************************************
* Function Name: prepareGfx
* Summary:
* Initializes stuff required to make the graphics driver work properly.
* Currently it is powering up VRAM module and initializing RGB pins.
* Parameters:
* none
* Return:
* none
**********************************************************************************************************************
*/
void prepareGfx(void)
{
powerUpVRAM();
initRGBPins();
}
/**********************************************************************************************************************
* Function Name: powerUpVRAM
* Summary:
* Power up the VRAM to make it accessible. Done via direct register writes.
* Parameters:
* none
* Return:
* none
**********************************************************************************************************************
*/
static void powerUpVRAM(void)
{
#define PD_BASE 0x40B00000UL
#define PD_CTL_PWR_MODE_Msk 0x3UL
#define PD_STATUS_PWR_DONE_Msk 0x10UL
const uint32_t pdCtl = PD_BASE;
const uint32_t pdStatus = PD_BASE + 0x10;
*((volatile uint32_t *)pdCtl) |= PD_CTL_PWR_MODE_Msk;
while ((*((volatile uint32_t *)pdStatus) & PD_STATUS_PWR_DONE_Msk) == 0);
*(int*)(0x40A00000) = 0x80000000;
}
/**********************************************************************************************************************
* Function Name: initRGBPins
* Summary:
* Initializes the RGB TTL pins needed for FX3. Currently not possible to configure
* in Device Configurator.
* Parameters:
* none
* Return:
* none
**********************************************************************************************************************
*/
static void initRGBPins(void)
{
for (int i = 0; i < sizeof(rgbPinsCfg)/sizeof(rgbPinsCfg[0]); ++i)
{
const stc_portpin_cfg_t* pinCfg = &rgbPinsCfg[i];
Cy_GPIO_Pin_FastInit(pinCfg->pstcPort,
pinCfg->u8Pin,
pinCfg->u8DriveMode,
pinCfg->u8GpioOutVal,
pinCfg->enMuxCfg);
}
}
/**********************************************************************************************************************
* Function Name: Cy_SwTmr_GetTickCountUs
* Summary:
* Dummy function needed to define because used library references it. Linking will
* else fail. To be removed later.
* Parameters:
* none
* Return:
* uint64_t returns 0 as dummy value
**********************************************************************************************************************
*/
uint64_t Cy_SwTmr_GetTickCountUs(void)
{
return 0;
}
/**********************************************************************************************************************
* Function Name: Cy_Fpdlink_Init
* Summary:
* Dummy function needed to define because used library references it. Linking will
* else fail. To be removed later.
* Parameters:
* enFpdlink not used
* pstcCfg not used
* Return:
* cy_fpdlink_en_result_t returns CY_FPDLINK_SUCCESS as dummy value
**********************************************************************************************************************
*/
cy_fpdlink_en_result_t Cy_Fpdlink_Init(cy_fpdlink_en_instance_t enFpdlink, const cy_fpdlink_stc_cfg_t * pstcCfg)
{
return CY_FPDLINK_SUCCESS;
}