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Stump ISA Documentation

This document describes the STUMP ISA as implemented and used by StumpOS (or just Manchester COMP22111 specifically).

Architecture Overview

Aspect Details
Registers R1–R6: General purpose
R0: constant zero
R7: Program Counter (PC)
Condition Codes Stored in a non-accessible dedicated register; updated by {S} instruction variants
Supported Shifts ASR, ROR, RRC (Only single shift operations per instruction)

Instructions

Data Operations

Type 1 (Register)

  • ADD{S} <dest>, <srcA>, <srcB> {, shift}
    dest := (Shifted)srcA + srcB
    Updates flags if S suffix used.

  • ADC{S} <dest>, <srcA>, <srcB> {, shift}
    dest := (Shifted)srcA + srcB + 1
    Updates flags if S suffix used.

  • SUB{S} <dest>, <srcA>, <srcB> {, shift}
    dest := (Shifted)srcA - srcB
    Updates flags if S suffix used.

  • SBC{S} <dest>, <srcA>, <srcB> {, shift}
    dest := (Shifted)srcA - srcB - 1 + C
    C is the carry flag; updates flags if S suffix used.

  • AND{S} <dest>, <srcA>, <srcB> {, shift}
    dest := (Shifted)srcA AND srcB
    Updates flags if S suffix used.

  • OR{S} <dest>, <srcA>, <srcB> {, shift}
    dest := (Shifted)srcA OR srcB
    Updates flags if S suffix used.

Type 2 (Immediate)

  • ADD{S} <dest>, <srcA>, #
    dest := srcA + #<imme>

  • ADC{S} <dest>, <srcA>, #
    dest := srcA + #<imme> + 1

  • SUB{S} <dest>, <srcA>, #
    dest := srcA - #<imme>

  • SBC{S} <dest>, <srcA>, #
    dest := srcA - #<imme> + 1 + C

  • AND{S} <dest>, <srcA>, #
    dest := srcA AND #<imme>

  • OR{S} <dest>, <srcA>, #
    dest := srcA OR #<imme>

Data Pseudo-Operations

  • MOV{S} <dest>, <srcB> {, shift}
    ⟶ ADD{S} <dest>, R0, <srcB> {, shift}

  • CMP <srcA>, <srcB> {, shift}
    ⟶ SUBS R0, <srcA>, <srcB> {, shift} (sets condition codes)

  • TST <srcA>, <srcB> {, shift}
    ⟶ ANDS R0, <srcA>, <srcB> {, shift}

  • MOV{S} <dest>, #
    ⟶ ADD{S} <dest>, R0, #<imme>

  • CMP <srcA>, #
    ⟶ SUBS R0, <srcA>, #<imme>

  • TST <srcA>, #
    ⟶ ANDS R0, <srcA>, #<imme>

  • NOP
    ⟶ ADD R0, R0, R0 (no-op)

  • NEG{S} <dest>,
    ⟶ SUB{S} <dest>, R0, <srcB> (two’s complement negation)

Memory Transfers

  • LD <dest>, [<srcA>]
    dest := mem[srcA]

  • ST <dest>, [<srcA>]
    mem[srcA] := dest

  • LD <dest>, [<srcA>, #<imme>]
    dest := mem[srcA + #<imme>]
    <imme> can be a label (address truncated to 5 bits)

  • ST <dest>, [<srcA>, #<imme>]
    mem[srcA + #<imme>] := dest
    <imme> can be a label

  • LD <dest>, [<srcA>, <srcB>]
    dest := mem[srcA + srcB]

  • ST <dest>, [<srcA>, <srcB>]
    mem[srcA + srcB] := dest

  • LD <dest>, [<srcA>, <srcB>, shift]
    dest := mem[(shifted)<srcA> + <srcB>]

  • ST <dest>, [<srcA>, <srcB>, shift]
    mem[(shifted)<srcA> + <srcB>] := dest

  • LD <dest>, [R7, label]
    PC-relative load: dest := mem[PC + offset(label)]

  • LD <dest>, label
    Same as LD <dest>, [R7, label]

  • ST <dest>, [R7, label]
    PC-relative store: mem[PC + offset(label)] := dest

  • ST <dest>, label
    Same as ST <dest>, [R7, label]

Control Transfer

Branch Instructions

Mnemonic Condition Semantics
bal Always PC := label
b Always PC := label
bra Always PC := label
bnv Never PC unchanged
bhi Higher (unsigned) Branch if >
bls Lower/Same Branch if <= (unsigned)
bcc Carry Clear Branch if C == 0
bcs Carry Set Branch if C == 1
bne Not Equal Branch if Z == 0
beq Equal Branch if Z == 1
bvc Overflow Clear Branch if V == 0
bvs Overflow Set Branch if V == 1
bpl Plus (positive) Branch if N == 0
bmi Minus (negative) Branch if N == 1
bge Greater/Equal Branch if N == V
blt Less Than Branch if N != V
bgt Greater Than Branch if (Z == 0) and (N == V)
ble Less or Equal Branch if (Z == 1) or (N != V)

General semantics: If branch condition is satisfied, PC := label. I know this is quite confusing since in other ISA's bal is branch and link but I didn't make the ISA I only used it

Compiler Directives

Mnemonic Syntax Semantics Example
EQU label EQU <expr> Label receives constant value <expr> for compilation CONST EQU 5
ORG ORG <expr> Sets code/data origin address
DEFW DEFW <expr> [, ...] Defines memory words, initialized with given values `DATA DEFW 4, 7, 2
DATA DATA <expr> [, ...] Defines memory words, synonym for DEFW Pointer DEFW 0

Notes

  • All instructions may use <dest>, <srcA>, and <srcB> referring to general-purpose registers (R1–R7).
  • All immediate parameters (e.g. #<imme>) are constant values and are two's complement 5 bits (-16 to 15 only)
  • Condition codes are referenced using N (negative), Z (zero), V (overflow), C (carry).
  • PC-relative addressing uses R7 as the program counter; labels within instructions enable position-independent code/support data tables.

This document describes the machine-level language for the STUMP architecture. For examples and usage, see StumpOS source code and demos.