RAM Update?

[alucard87pl]

Could the RAM memory have two additional inputs? CLK_READ and CLK_WRITE. When the state changes from low to high, the memory would write or read from a set address. This would make it easier to operate the memory and build computers.

[CD4017BE]

Hmm, I don't really see why this should make RAM operation easier, it rather seems to make it more complicated.

The read part currently just instantly outputs the value stored at Read Address IN to Read Value OUT whenever the address changes, which is very convenient for using the RAM as simple lookup table (probably the most common use case).
Similarly any change of Write Value IN is immediately written to current address but only if that address value is within valid range (so you can disable writing by intentionally sending an invalid address like -1).

Changing that would break old circuits from other people or I would have to implement complicated special cases (with different timing behaviors) where the RAM switches back to instant mode if nothing is connected to the clock ports.

If for some reason you really need read output latched by clock and/or write controlled by clock, you could just create yourself an appropriate RAM driver circuit (which you probably need anyways if you're building a fully functional computer). This is an example implementation:

Read Address and Write Value would be connected directly to RAM without going through the driver.

The schematic file: unpack into .minecraft/circuitSchematics/
RAM driver.zip