From 0f74fde83781cf3643d8b260b55f3bcdf390fda2 Mon Sep 17 00:00:00 2001 From: Suke0811 <49264928+Suke0811@users.noreply.github.com> Date: Mon, 30 Jun 2025 13:05:41 -0700 Subject: [PATCH] Fix: replace the crystal to 32MHz according to the ref design https://semtech.my.salesforce.com/sfc/p/#E0000000JelG/a/RQ000008nKCH/hp2iKwMDKWl34g1D3LBf_zC7TGBRIo2ff5LMnS8r19s --- edg/parts/Rf_Sx1262.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/edg/parts/Rf_Sx1262.py b/edg/parts/Rf_Sx1262.py index 4a7db2361..665b3de1a 100644 --- a/edg/parts/Rf_Sx1262.py +++ b/edg/parts/Rf_Sx1262.py @@ -247,7 +247,7 @@ def contents(self) -> None: with self.implicit_connect( ImplicitConnect(self.gnd, [Common]) ) as imp: - self.xtal = imp.Block(Crystal(30*MHertz(tol=30e-6))) # 30ppm for LoRaWAN systems + self.xtal = imp.Block(Crystal(32*MHertz(tol=30e-6))) # 30ppm for LoRaWAN systems self.connect(self.xtal.crystal, self.ic.xtal) self.vreg_cap = imp.Block(DecouplingCapacitor(470*nFarad(tol=0.2))).connected(pwr=self.ic.vreg)