feat(net): switch to crabnet

Signed-off-by: Anhad Singh <andypythonappdeveloper@gmail.com>

Author: Andy-Python-Programmer

.vscode/settings.json

@@ -16,5 +16,5 @@
         "termios.h": "c",
         "termios-c_iflag.h": "c"
     },
-    "rust-analyzer.check.command": "clippy",
+    // "rust-analyzer.check.command": "clippy",
 }

src/Cargo.lock

@@ -42,12 +42,15 @@ cpio_reader = { git = "https://github.com/Andy-Python-Programmer/cpio_reader" }
 static_assertions = "1.1.0"
 lru = "0.10.0"
 bytemuck = "1.13.1"
-byte_endian = { git = "https://github.com/aero-os/byte_endian" }
 limine = { git = "https://github.com/limine-bootloader/limine-rs" }
 cfg-if = "1.0"
 num-traits = { version = "0.2", default-features = false }
 vte = { git = "https://github.com/alacritty/vte", features = ["ansi"] }
 
+byte_endian = { git = "https://github.com/aero-os/byte_endian" }
+netstack = { path = "../../../orgs/aero/netstack" }
+netstack_tcp = { path = "../../../orgs/aero/netstack/netstack_tcp", default-features = false }
+
 # X86_64 specific dependencies:
 [target.'cfg(target_arch = "x86_64")'.dependencies]
 raw-cpuid = "11.0.1"

src/aero_kernel/Cargo.toml

@@ -15,6 +15,7 @@
 // You should have received a copy of the GNU General Public License
 // along with Aero. If not, see <https://www.gnu.org/licenses/>.
 
+use alloc::boxed::Box;
 use alloc::sync::Arc;
 use spin::Once;
 
@@ -23,9 +24,11 @@ use crate::arch::interrupts::{self, InterruptStack};
 use crate::drivers::pci::*;
 use crate::mem::paging::*;
 use crate::userland::scheduler;
+use crate::utils::dma::DmaAllocator;
 use crate::utils::sync::{Mutex, WaitQueue};
 
-use crate::net::{self, ethernet, MacAddr, NetworkDevice, NetworkDriver, PacketBaseTrait};
+use crate::net::{self, ethernet, NetworkDevice, NetworkDriver};
+use netstack::data_link::MacAddr;
 
 const TX_DESC_NUM: u32 = 32;
 const TX_DESC_SIZE: u32 = TX_DESC_NUM * core::mem::size_of::<TxDescriptor>() as u32;
@@ -374,35 +377,35 @@ impl E1000 {
         }
     }
 
-    fn send(&mut self, packet: net::Packet<net::Eth>) {
+    fn send(&mut self, packet: Box<[u8], DmaAllocator>) {
         let cur = self.tx_cur;
         let ring = self.tx_ring();
 
-        ring[cur].addr = unsafe { packet.addr() - crate::PHYSICAL_MEMORY_OFFSET };
+        ring[cur].addr =
+            unsafe { VirtAddr::new(packet.as_ptr() as u64) - crate::PHYSICAL_MEMORY_OFFSET };
         ring[cur].length = packet.len() as _;
         ring[cur].cmd = 0b1011;
         ring[cur].status = TStatus::empty();
 
         self.tx_cur = (self.tx_cur + 1) % TX_DESC_NUM as usize;
 
         self.write(Register::TxDescTail, self.tx_cur as u32);
+        core::mem::forget(packet); // FIXME: hack
     }
 
-    fn recv(&mut self) -> Option<net::RecvPacket> {
+    fn recv<'a>(&mut self) -> Option<net::RecvPacket<'a>> {
         let id = self.rx_cur;
         let desc = &mut self.rx_ring()[id];
 
         if desc.status & 0x1 != 0x1 {
             return None;
         }
 
-        Some(net::RecvPacket {
-            packet: net::Packet::<ethernet::Eth>::new(
-                PhysAddr::new(desc.addr).as_hhdm_virt(),
-                desc.length as usize,
-            ),
-            id,
-        })
+        let packet = PhysAddr::new(desc.addr)
+            .as_hhdm_virt()
+            .as_bytes_mut(desc.length as usize);
+
+        Some(net::RecvPacket { packet, id })
     }
 
     fn recv_end(&mut self, id: usize) {
@@ -595,7 +598,7 @@ impl Device {
 }
 
 impl NetworkDriver for Device {
-    fn send(&self, packet: net::Packet<net::Eth>) {
+    fn send(&self, packet: Box<[u8], DmaAllocator>) {
         self.e1000.lock_irq().send(packet)
     }
 
@@ -619,7 +622,7 @@ impl NetworkDriver for Device {
         self.e1000.lock_irq().recv_end(packet_id)
     }
 
-    fn mac(&self) -> net::MacAddr {
+    fn mac(&self) -> MacAddr {
         self.e1000.lock_irq().mac
     }
 }

src/aero_kernel/src/drivers/e1000.rs

@@ -125,7 +125,7 @@ impl VirtAddr {
         Ok(unsafe { &mut *self.as_mut_ptr() })
     }
 
-    pub fn as_bytes_mut(&self, size_bytes: usize) -> &mut [u8] {
+    pub fn as_bytes_mut<'a>(&self, size_bytes: usize) -> &'a mut [u8] {
         self.validate_read::<&[u8]>().unwrap();
         unsafe { core::slice::from_raw_parts_mut(self.as_mut_ptr(), size_bytes) }
     }