lai_host: pci read functions

Signed-off-by: Andy-Python-Programmer <andypythonappdeveloper@gmail.com>

Author: Andy-Python-Programmer

src/aero_kernel/src/drivers/lai.rs

@@ -8,6 +8,8 @@ use crate::mem::paging::PhysAddr;
 use crate::userland::scheduler;
 use crate::utils::io;
 
+use super::pci::PciHeader;
+
 struct LaiHost;
 
 impl lai::Host for LaiHost {
@@ -68,6 +70,24 @@ impl lai::Host for LaiHost {
     fn ind(&self, port: u16) -> u32 {
         unsafe { io::inl(port) }
     }
+
+    // PCI read functions:
+    //
+    // todo: do not ignore the segment once we use MCFG.
+    fn pci_readb(&self, _seg: u16, bus: u8, slot: u8, fun: u8, offset: u16) -> u8 {
+        let header = PciHeader::new(bus, slot, fun);
+        unsafe { header.read::<u8>(offset as u32) as u8 }
+    }
+
+    fn pci_readw(&self, _seg: u16, bus: u8, slot: u8, fun: u8, offset: u16) -> u16 {
+        let header = PciHeader::new(bus, slot, fun);
+        unsafe { header.read::<u16>(offset as u32) as u16 }
+    }
+
+    fn pci_readd(&self, _seg: u16, bus: u8, slot: u8, fun: u8, offset: u16) -> u32 {
+        let header = PciHeader::new(bus, slot, fun);
+        unsafe { header.read::<u32>(offset as u32) }
+    }
 }
 
 pub fn init_lai() {

src/aero_kernel/src/drivers/pci.rs

@@ -419,7 +419,7 @@ impl PciHeader {
         self.0.get_bits(0..3) as u8
     }
 
-    unsafe fn read<T>(&self, offset: u32) -> u32 {
+    pub unsafe fn read<T>(&self, offset: u32) -> u32 {
         let bus = self.bus() as u32;
         let device = self.device() as u32;
         let func = self.function() as u32;
@@ -490,10 +490,6 @@ impl PciHeader {
         unsafe { self.read::<u32>(0x0c) }.get_bit(23)
     }
 
-    pub fn pin(&self) -> u8 {
-        unsafe { (self.read::<u32>(0x3D) >> (0x3D & 0b11) * 8) as u8 }
-    }
-
     /// Returnes the value stored in the PCI header type register which is used to
     /// indicate layout for bytes,of the device’s configuration space.
     pub fn get_header_type(&self) -> u8 {