We are using the DE0-Nano development board.
User manuals or data sheets are the best resources when working with new hardware. Download the user manual for DE0-Nano here. To familiarize yourself with the board layout, we recommend reading through Chapter 2 (it's short and mostly contains pictures). Since we will mainly be interacting with the on-board pushbuttons, LEDs, and switches, we also recommend taking a look at Chapter 3.2, which contains details about user input/output including the pinout for the GPIO pins.
Verilog is a hardware description language (HDL), which means that all the code you write for the FPGA in Verilog represents combinational or sequential logic in hardware. During compiliation, Quartus must analyze all the logic you've written and determine how to best synthesize it onto the FPGA; this is the reason why compile times are so much longer than software compile times. When writing Verilog, it's important to understand the hardware behind your code, as this will help you to consider important logic errors. For example, signals in Verilog can be one of two data types: a reg (variable data type) or a wire (net data type). Wires can only be used to model combinational logic and they cannot store values. Regs represent data storage elements and can be used to model both combinational and sequential logic in always blocks. For many more details on Verilog syntax, check out the Verilog Quick Reference Guide here.